[Debian-coldfire-commits] r18 - trunk/doc

Wouter Verhelst wouter at costa.debian.org
Tue Jul 11 13:51:55 UTC 2006


Author: wouter
Date: 2006-07-11 13:51:55 +0000 (Tue, 11 Jul 2006)
New Revision: 18

Modified:
   trunk/doc/prm.tex
Log:
Found another difference


Modified: trunk/doc/prm.tex
===================================================================
--- trunk/doc/prm.tex	2006-06-18 21:46:46 UTC (rev 17)
+++ trunk/doc/prm.tex	2006-07-11 13:51:55 UTC (rev 18)
@@ -157,7 +157,7 @@
 registers to RAM. The problem is that it copies data from the FPU
 registers without doing any data conversion. The result is that the
 instruction overwrites 10 bytes (80 bits) on m68k, while it overwrites 8
-bytes (64 bits) on ColdFire.
+bytes (64 bits) on ColdFire (all per register).
 
 The instruction is \emph{unsafe} (and not \emph{undefined}) because it
 can also be used to copy data from RAM back to the FPU registers in the
@@ -165,4 +165,29 @@
 the FPU state on the stack during a function call, and to restore it
 when the function call finishes. Any other use of the instruction---any
 use that includes reading the data in between---is \emph{undefined}.
+\subsection{Differences in EA modes}
+Two addressing modes differ between the two architectures: the Address
+Register Indirect with PostIncrement mode, and the Address Register
+Indirect with PreDecrement mode. They behave exactly the same,
+\emph{except} if called on the stack pointer (address register 7, \%a7)
+with an operand size of a byte (rather than a word or a longword). In
+that case, the ColdFire will increment or decerement the register with
+one (as both do on the other registers), whereas m68k will increment or
+decrement the register with two (to keep it aligned). Both, however,
+require the register to be aligned at all times.
+
+This makes any instruction using the PostIncrement or PostDecrement
+modes \emph{undefined}. We could probably define them as \emph{unsafe}
+if there is a set of instructions like this:
+
+\begin{verbatim}
+	postincrement instruction on \%a7
+	addi #1,\%a7
+	predecrement instruction on \%a7
+	subi #1,\%a7
+\end{verbatim}
+
+This, however, is cumbersome, and puts the \%a7 register in an undefined
+state between both accesses, which is going to be \emph{very}
+problematic.
 \end{document}




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