[yosys] branch master updated (b1aae15 -> 04e108c)
Ruben Undheim
rubund-guest at moszumanska.debian.org
Sun Feb 1 20:38:57 UTC 2015
This is an automated email from the git hooks/post-receive script.
rubund-guest pushed a change to branch master
in repository yosys.
from b1aae15 Updated changelog
new f411628 Added watch file
adds 73f5ffc Now we are in Yoys 0.4+ development
adds 003336c Use a cache for log_id() memory management
adds d92fb5b Added missing fixup_ports() calls to "rename" command
adds 12ffe0c Some fixes in presentation
adds cb9e10b Added automatic "make clean" to abc "hg pull" make rules
adds fe829bd Added log_warning() API
adds a112b10 Introducing YS_OVERRIDE, YS_FINAL, YS_ATTRIBUTE, YS_NORETURN
adds 1e0f6b5 Added "yosys -qq" to also quiet warning messages
adds cb1b245 Split MXE "make dist" into MXE "make mxebin" and non-MXE "make vcxsrc"
adds a8cdcb3 Some fixed in "make vcxsrc" srcfiles.txt creation
adds c832b18 Another 'make vcxsrc'
adds 4e5350b Fixed parsing of nested verilog concatenation and replicate
adds 87333f3 Added warning for use of 'z' constants in HDL
adds 76cc2bf fixing incorrect buffer size allocation, and unsafe integer size type
adds 4aae465 switching from unreliable typedefs to precisely sized uint32_t and uint64_t
adds 263f672 Merge pull request #42 from slowriot/master
adds 751fb33 Some fixes in stubnets example
adds 56c7d1e Fixed two minor bugs in constant parsing
adds 76c8328 Fixed minor bug in parsing delays
adds 51cfcd8 Fixed bug in "hierarchy -top" with array of instances
adds abf81d7 Added some missing .gitignore in manual/
adds e65033e suppressing semi-colon at the end of dot files
adds 78765e6 Merge pull request #43 from Martoni/master
adds 74d70bf manual/presentation.tex: bg option is unknown with beamer 3.3 in beamercolorbox
adds 2903143 Merge branch 'master' of https://github.com/Martoni/yosys
adds fad9cec Added $_DFFE_??_ cell types
adds f1764b4 Added $dffe cell type
adds 7b62bbe Added more documentation fixmes for nontrivial register cells
adds 97487fe Added skeleton dff2dffe pass
adds bca2442 Added module->addDffe() and module->addDffeGate()
adds 7d6e586 Added bool constructors to SigBit and SigSpec
adds 032511f Added functionality to dff2dffe pass
adds 1282a11 Fixed supply0/supply1 with many wires
adds df52eed Compile fix for visual studio
adds 7775d28 Added IdString::destruct_guard hack
adds 6c768c6 Added missing prerequisites to README
adds 72f500c Removed UTF-8 chars from techmap.v
adds cf55371 Added psmisc to prerequisites
adds f7cf60b Removed psmisc from deps list (usually fuser is already installed and the package name for it varies)
adds 32dce4a Added "blif -unbuf" feature
adds 59d1197 Added "write_blif -blackbox"
adds e01254d Added "write_blif -undef" and support for special "-" true/false/undef type
adds b95051f Fixed writing of $lut cells in BLIF backend
adds 6cec188 Fixed build with gcc 4.6
adds 36f0451 Merge branch 'master' of github.com:cliffordwolf/yosys
adds 30de490 Fixed another bug in write_blif handling of $lut cells
adds bacd369 Checking existence of ports in "hierarchy -check"
adds 5df192e Added $dffe support to write_verilog
adds f7b3231 Added DFFE support to "abc" pass
adds 25844b5 Fixed "abc" pass for clk and enable signals driven by logic
adds 76fa527 Added support for multiple clock domains to "abc" pass
adds a216df0 Added "abc -markgroups"
adds 4f5b979 Added "show -colorattr"
adds 5fe02b7 Indenting fix in show.cc
adds 48ca1ff Improved ABC clock domain partitioning
adds edb3c9d Renamed extend() to extend_xx(), changed most users to extend_u0()
adds 4aa9fbb Improvements in simplemap api, added $ne $nex $eq $eqx support
adds afcacd6 Added support for gate-level cells in dff2dffe
adds 8c1a72c Added "dff2dffe -unmap"
adds 032ce57 Added "dff2dffe -direct" for direct gate mapping
adds 35f5aa3 Added "dfflibmap -prepare"
adds aad195b Added "dfflibmap -prepare" help
adds e548483 Added write_smt2 (only gate level logic supported so far)
adds b6a7e21 Fixed off-by-one bug in "hierarchy -check" for positional module args
adds 1c3d513 Added "write_smt2 -bv" and other write_smt2 improvements
adds 95f17db Added support for most BV cell types to write_smt2
adds 170788a Fixed simplemap for $ne cells with output width > 1
adds 7dece74 Added "test_cell -w" feature
adds 68233ba Various fixes and improvements in write_smt2
adds b748622 Added "test_cell -muxdiv"
adds e8c12e5 Various fixes and improvements in "write_smt2 -bv"
adds a6c96b9 Added Yosys::{dict,nodict,vector} container types
adds 35f611e Added "yosys -d" command line option
adds e0c0011 Temporary gcc 4.6 build hotfix for Yosys::dict and Yosys::nodict
adds e52d1f9 Added new_dict (hashmap.h) and re-enabled code coverage counters
adds 9e6fb0b Replaced std::unordered_map as implementation for Yosys::dict
adds ec4751e Replaced std::unordered_set (nodict) with Yosys::pool
adds 6ce6689 Using Yosys::dict and Yosys::pool in sigtools.h
adds 88d08e8 Some cleanups in dict/pool hashtable implementation
adds 66ab88d More hashtable finetuning
adds 12ca653 Fixed mem2reg warning message
adds 7751c49 Improved some warning messages
adds d6ee6f6 Better help message printing for command line tool
adds 2c2f8e6 Added memory statistics (at least on linux)
adds 6c8b0a5 More dict/pool related changes
adds 3e8e483 Various improvements in ModIndex
adds 3da46d3 Renamed hashmap.h to hashlib.h, some related improvements
adds 89723a4 Improved hashlib iterator implementation
adds f3a97b7 Fixed performance bug in object hashing
adds 137f353 Changed more code to dict<> and pool<>
adds 951c72b bugfix in opt_share
adds 445686c using dict and pool in opt_reduce
adds 8773fd5 Added memhasher (yosys -M)
adds 2ad1317 Some cleanups
adds dede535 Some changes to hashlib to make for better stl compatibility
adds a2226e5 Added mkhash_xorshift()
adds 9ff3a9f Switched most of "share" to dict<> and pool<>
adds cfe0817 Converting "share" to dict<> and pool<> complete
adds 397ae5b gcc build fixes
adds 90bc71d dict/pool changes in ast
adds 662cb54 Added newline support to Pass::call() parser
adds 7d843ad dict/pool changes in opt_clean
adds 33e2539 Fixed comment parsing in Pass::call()
adds 3ff0d04 Cleanups in opt_clean
adds ecd6418 Added "yosys -X"
adds 0bb6b24 Added global yosys_celltypes
adds 7a4d5d1 Less verbose ABC output
adds 29a555e Added statehash to ezSAT
adds ed8f1b4 Fixed memory corruption in "splice" command
adds 2f1e6aa Improved free list management in hashlib
adds d72a666 Put dummy reference to empty idstring in yosys_shutdown()
adds c64b1de Fixed build with SMALL=1
adds 3857e1c Improvements in hashlib
adds 120a831 Small optimization in hashlib
adds ba43cf5 Fixed simlib entries for $memrd and $memwr
adds 0675098 added hashlib::mkhash_init
adds 4606add Fixed typo in ABC command
adds eceecfe Added more information to CodingReadme
adds 972faab Fixed a bug in "select %ci %co %x"
adds 50fff2b print timing details (-d) in -q mode
adds 11c3b81 typo fix for "opt -fast"
adds 1909edf improved -v option
adds 6fef4b8 using pool<> in bitpattern.h
adds 60f16e1 hotfix for ModInfo
adds 7d6a7fe IdString optimization
adds c4bd6cb major rewrite of hashlib::dict<>
adds 429ccb6 new hashlib::pool<> (derived from new dict)
adds 12b05df gcc-4.6 compile fixes
adds b9e4124 hashlib cleanups and a fix
adds ba48b6b improved bitpattern (proc_mux) performance
adds 539dd80 Improvements in CodingReadme
adds 1e08621 Added hashlib .count(key, iterator) and it1 < it2
adds 94e6b70 Added memory_bram (not functional yet)
adds 327a5d4 Progress in memory_bram
adds e62d838 Removed SigSpec::extend_xx() api
adds 17c1c55 Progress in memory_bram
adds eefe78b Fixed memory->start_offset handling
adds f29f4e7 Progress in memory_bram
adds 340e769 Bram testbench (incomplete)
adds 24ae156 Progress in bram testbench
adds 36c20f2 Progress in memory_bram
adds bbf89c4 Progress in memory_bram
adds 4748316 New $mem simlib model
adds 1bd67d7 Define YOSYS and SYNTHESIS in preproc
adds 03b3c02 Progress in bram testbench
adds 1dca7ae Fixes and improvements in bram test
adds 90f4017 Added proper clkpol support to memory_bram
adds 146f769 Cosmetic changes in verilog output format
adds a7e43ae Progress in memory_bram
adds fd2c224 memory_bram transp support
adds a7fe87f Added memory_bram 'or_next_if_better' feature
adds 45918b8 Added "memory -bram"
adds f9304e6 Print non-errors to stdout
adds 0648e28 Fixed pattern matching in "hierarchy -generate"
adds 5d631f0 Removed left over debug code from memory_bram
adds daae353 Added memory_bram "shuffle_enable" feature
adds 8898897 Towards Xilinx bram support
adds 9ea2511 Towards Xilinx bram support
adds 462b22f dict<> ref vs insert bugfix
adds 9c7f47b Towards Xilinx bram support
adds 081e1a4 Towards Xilinx bram support
adds 4a0b3a5 Various small improvements to synth_xilinx
adds 9474928 Towards Xilinx bram support
adds 9fb715d build fix for mxe
adds 859e3e4 hashlib iterator fix
adds da72050 removed old debug code
adds 07703bd fixed compiler warning on non-linux archs
adds 7cc5192 small fix in xilinx/brams.v
adds ec2eef8 Towards Xilinx bram support
adds 08c13f6 Xilinx RAMB36/RAMB18 memory_bram support complete
adds b26590f memory_bram hotfix for memories with width 1
adds 584c5f3 Cleanups in xilinx bram descriptions
adds d1e3869 More Xilinx bram cleanups
adds fd78760 disabled problematic mux -> and/or transform
adds 38dfc5c added minimalistic xilinx sim models
adds 1d96277 Added add_share_file Makefile macro
adds 0ca889a Add homebrew's readline paths
adds b16ed78 Add homebrew's libffi paths
adds fff6f00 Enable bison to be customized
adds 0a231f9 Enable use of homebrew's provided bison if available
adds bd3dd80 Merge pull request #46 from utzig/master
adds 95f1eb9 Only enable code coverage counters on linux
adds dd699e0 Small Makefile typo fix
adds dfa42e2 Tiny fix in vcdcd.pl
adds 8426884 Re-enabled mux->and/or transform (and fixed lm32 in yosys-bigsim)
adds 153d3dd Various cleanups in synth_xilinx command
adds 8e8e791 Consolidate "Blocking assignment to memory.." msgs for the same line
adds a588a4a Fixed handling of "input foo; reg [0:0] foo;"
adds df9d096 Ignoring more system task and functions
adds 9065fb2 Fixed handling of foo.__TECHMAP_...
adds 2e36fae Added "abc -lut w1:w2"
adds b197279 Added Xilinx MUXF7 and MUXF8 support
adds fd8c8d4 Added FF cells to xilinx/cells_sim.v
adds 6b09153 Fixed xilinx bram clock inverted config
adds 7bde74c Added more FF types to xilinx/cells.v
adds dff8bd3 Added dff2dffe to synth_xilinx
adds 3ed4e34 Added cells.lib
adds 8ce8a23 Bugfix in dff2dffe
adds b32ba6f Optimizing no-op cell->setPort()
adds 3628ca9 Improved opt_muxtree
adds a95c229 Fixed a bug in opt_muxtree for "mux forests"
adds 7031231 Added MUXCY and XORCY support to synth_xilinx
adds 8658eed Added support for memories to flatten (techmap)
adds 279a18c Added synth_xilinx -retime -flatten
adds 6119251 Various cleanups and improvements in opt_muxtree
adds 0217ea0 Added hashlib::idict<>
adds d3b3501 More opt_muxtree cleanups
adds f630868 Improvements in opt_muxtree
adds 694cc01 improvements in muxtree/select_leaves test
adds 8d29573 Refactoring of memory_bram and xilinx brams
adds d29d26f Various cleanups in xilinx techlib
adds 026b94a Add "echo-yosys-ver" and "echo-git-rev" Makefile targets.
adds f6f51cd Merge pull request #47 from mschmoelzer/master
adds 3a58b8d Merge branch 'master' of github.com:cliffordwolf/yosys
adds e13a45a Added $equiv cell type
adds 76c5d86 Added equiv_make command
adds 615c2e1 Added equiv_status
adds 5febbe3 Added equiv_simple
adds 8102026 README stuff
adds 0bfec8e Faster "make clean-abc"
adds 74e1de1 Fixed opt_muxtree performance bug
adds abf8398 Progress in equiv_simple
adds 0a225f8 Moved equiv stuff to passes/equiv/
adds a6aa32e Various equiv_simple improvements
adds f6d94e8 Added equiv_induct
adds 5707ba2 Improved xdot calling
adds 1cb4c92 Improvements in equiv_make, equiv_induct
adds 4395109 Added dict/pool.sort()
adds 75bbeb8 Various equiv_* improvements
adds 909a951 Fixed xilinx FDSE sim model
adds 8fe9ab5 Added #ifdef NDEBUG for log_assert()
adds 2a9ad48 Added ENABLE_NDEBUG makefile options
adds 66a6b86 Added equiv_miter
adds acfaeb8 Added equiv_remove
adds 13b50ba Rethrow with "catch(...) throw;"
adds c7c99a6 Updaed ABC to hg rev 61ad5f908c03
adds e666611 Bugfix in resource sharing test
adds 23e54bd Added "sat -show-ports"
adds df64542 Fixed bug in equiv_miter
adds 9ebf803 Improved an error message
adds 114a78d Some cleanups in log.cc
adds aabd509 More log_id() stuff
adds bedd463 Added "fsm -encfile"
adds cb9d0a4 Synced RTLIL::unescape_id() to log_id() behavior
adds f80f5b7 Added "equiv_make -blacklist <file> -encfile <file>"
adds e9cfc4a Added "equiv_simple -undef"
adds bc86b4a Added "equiv_induct -undef"
adds 1d92915 Fixed equiv_make for partially undriven nets (e.g. after "clean -purge")
adds 6721844 Log msg change
adds 8dfa105 Bugfix in opt_const $eq -> buffer code
adds fb8c755 Shorter "dump" options
adds 9abbeef Using selections in "ls" command
adds 0732694 Added <algorithm> include to hashlib.h
adds 9948ff2 Added yosys_banner(), Updated Copyright range
adds b59bb8a Removed TODO list from README file
adds 3fe2441 Minor README changes
adds 1df81f9 Added "make mklibyosys", some minor API changes
adds 1b159bc Added missing ports and parameters to xilinx brams
adds 6978f3a Added EDIF backend support for multi-bit cell ports
adds 816fe6b Added Xilinx example for Basys3 board
adds 3cbfa38 Removed old XST-based xilinx examples
new 9a316a6 Merge tag 'upstream/0.4.0+20150201git3cbfa38'
new 69eaa6a Added new changelog line
new 04e108c Refreshed patches
The 4 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
.gitignore | 1 +
CHANGELOG | 8 +-
CodingReadme | 153 ++-
Makefile | 82 +-
README | 46 +-
backends/blif/blif.cc | 99 +-
backends/btor/btor.cc | 4 +-
backends/edif/edif.cc | 21 +-
backends/ilang/ilang_backend.cc | 110 +-
backends/smt2/.gitignore | 1 +
backends/smt2/Makefile.inc | 3 +
backends/smt2/smt2.cc | 570 ++++++++++
backends/smt2/test_cells.sh | 55 +
backends/spice/spice.cc | 4 +-
backends/verilog/verilog_backend.cc | 84 +-
debian/changelog | 6 +
debian/patches/01_gitrevision.patch | 10 +-
debian/patches/02_removeabc.patch | 6 +-
debian/patches/03_notruntests.patch | 10 +-
debian/patches/04_installpath.patch | 10 +-
debian/patches/05_abc_executable.patch | 8 +-
debian/patches/06_cflags_ldflags.patch | 20 +-
debian/watch | 2 +
frontends/ast/ast.cc | 10 +-
frontends/ast/ast.h | 18 +-
frontends/ast/genrtlil.cc | 33 +-
frontends/ast/simplify.cc | 59 +-
frontends/ilang/Makefile.inc | 2 +-
frontends/ilang/ilang_parser.y | 5 +-
frontends/verific/verific.cc | 2 +-
frontends/verilog/Makefile.inc | 2 +-
frontends/verilog/const2ast.cc | 16 +-
frontends/verilog/preproc.cc | 3 +-
frontends/verilog/verilog_frontend.h | 2 +-
frontends/verilog/verilog_lexer.l | 35 +-
frontends/verilog/verilog_parser.y | 28 +-
kernel/bitpattern.h | 85 +-
kernel/celltypes.h | 107 +-
kernel/cost.h | 20 +-
kernel/driver.cc | 290 +++--
kernel/hashlib.h | 859 ++++++++++++++
kernel/log.cc | 178 ++-
kernel/log.h | 31 +-
kernel/macc.h | 4 +-
kernel/modtools.h | 139 ++-
kernel/register.cc | 23 +-
kernel/register.h | 4 +-
kernel/rtlil.cc | 345 ++++--
kernel/rtlil.h | 651 ++++++-----
kernel/satgen.h | 33 +
kernel/sigtools.h | 22 +-
kernel/utils.h | 10 +-
kernel/yosys.cc | 109 +-
kernel/yosys.h | 112 +-
libs/ezsat/ezsat.cc | 51 +-
libs/ezsat/ezsat.h | 3 +
libs/sha1/sha1.cpp | 108 +-
libs/sha1/sha1.h | 46 +-
.../APPNOTE_011_Design_Investigation/cmos_00.dot | 2 +-
.../APPNOTE_011_Design_Investigation/cmos_01.dot | 2 +-
.../example_00.dot | 2 +-
.../example_01.dot | 2 +-
.../example_02.dot | 2 +-
.../example_03.dot | 2 +-
.../memdemo_00.dot | 2 +-
.../memdemo_01.dot | 2 +-
manual/APPNOTE_011_Design_Investigation/splice.dot | 2 +-
.../APPNOTE_011_Design_Investigation/submod_00.dot | 2 +-
.../APPNOTE_011_Design_Investigation/submod_01.dot | 2 +-
.../APPNOTE_011_Design_Investigation/submod_02.dot | 2 +-
.../APPNOTE_011_Design_Investigation/submod_03.dot | 2 +-
.../sumprod_00.dot | 2 +-
.../sumprod_01.dot | 2 +-
.../sumprod_02.dot | 2 +-
.../sumprod_03.dot | 2 +-
.../sumprod_04.dot | 2 +-
.../sumprod_05.dot | 2 +-
manual/CHAPTER_CellLib.tex | 12 +-
manual/CHAPTER_Prog.tex | 21 +-
manual/CHAPTER_Prog/.gitignore | 3 +
manual/CHAPTER_Prog/stubnets.cc | 8 +-
manual/PRESENTATION_Intro.tex | 2 +-
manual/PRESENTATION_Prog/.gitignore | 1 +
manual/presentation.sh | 2 +-
manual/presentation.tex | 2 +-
misc/example.cc | 21 +
passes/abc/abc.cc | 404 +++++--
passes/abc/blifparse.cc | 3 +-
passes/cmds/cover.cc | 4 +-
passes/cmds/delete.cc | 8 +-
passes/cmds/rename.cc | 12 +-
passes/cmds/select.cc | 79 +-
passes/cmds/setattr.cc | 2 +-
passes/cmds/show.cc | 47 +-
passes/cmds/splice.cc | 29 +-
passes/cmds/splitnets.cc | 2 +-
passes/cmds/tee.cc | 4 +-
passes/cmds/trace.cc | 16 +-
passes/equiv/Makefile.inc | 8 +
passes/equiv/equiv_induct.cc | 240 ++++
passes/equiv/equiv_make.cc | 474 ++++++++
passes/equiv/equiv_miter.cc | 343 ++++++
passes/equiv/equiv_remove.cc | 83 ++
passes/equiv/equiv_simple.cc | 309 ++++++
passes/equiv/equiv_status.cc | 94 ++
passes/fsm/fsm.cc | 10 +-
passes/fsm/fsm_detect.cc | 2 +-
passes/fsm/fsm_export.cc | 4 +-
passes/fsm/fsm_extract.cc | 2 +-
passes/fsm/fsm_recode.cc | 43 +-
passes/hierarchy/hierarchy.cc | 34 +-
passes/hierarchy/submod.cc | 4 +-
passes/memory/Makefile.inc | 1 +
passes/memory/memory.cc | 13 +-
passes/memory/memory_bram.cc | 1169 ++++++++++++++++++++
passes/memory/memory_collect.cc | 24 +-
passes/memory/memory_share.cc | 4 +-
passes/opt/Makefile.inc | 3 +
passes/opt/opt.cc | 2 +-
passes/opt/opt_clean.cc | 36 +-
passes/opt/opt_const.cc | 43 +-
passes/opt/opt_muxtree.cc | 336 +++---
passes/opt/opt_reduce.cc | 10 +-
passes/opt/opt_share.cc | 19 +-
passes/opt/share.cc | 133 ++-
passes/opt/wreduce.cc | 4 +-
passes/proc/proc_arst.cc | 2 +-
passes/proc/proc_dff.cc | 4 +-
passes/sat/eval.cc | 2 +-
passes/sat/expose.cc | 2 +-
passes/sat/sat.cc | 15 +-
passes/techmap/Makefile.inc | 3 +-
passes/techmap/alumacc.cc | 6 +-
passes/techmap/dff2dffe.cc | 337 ++++++
passes/techmap/dfflibmap.cc | 99 +-
passes/techmap/extract.cc | 4 +-
passes/techmap/iopadmap.cc | 4 +-
passes/techmap/maccmap.cc | 6 +-
passes/techmap/simplemap.cc | 105 +-
passes/techmap/simplemap.h | 48 +
passes/techmap/techmap.cc | 39 +-
passes/tests/test_abcloop.cc | 4 +-
passes/tests/test_autotb.cc | 24 +-
passes/tests/test_cell.cc | 77 +-
techlibs/common/Makefile.inc | 34 +-
techlibs/common/cells.lib | 108 ++
techlibs/common/simcells.v | 32 +
techlibs/common/simlib.v | 179 ++-
techlibs/common/synth.cc | 21 +-
techlibs/common/techmap.v | 58 +-
techlibs/xilinx/Makefile.inc | 10 +-
techlibs/xilinx/arith_map.v | 91 ++
techlibs/xilinx/brams.txt | 101 ++
techlibs/xilinx/brams_map.v | 267 +++++
techlibs/xilinx/cells.v | 53 -
techlibs/xilinx/cells_map.v | 84 ++
techlibs/xilinx/cells_sim.v | 158 +++
techlibs/xilinx/example_basys3/README | 16 +
techlibs/xilinx/example_basys3/example.v | 21 +
techlibs/xilinx/example_basys3/example.xdc | 21 +
techlibs/xilinx/example_basys3/run.sh | 4 +
techlibs/xilinx/example_basys3/run_prog.tcl | 4 +
techlibs/xilinx/example_basys3/run_vivado.tcl | 9 +
techlibs/xilinx/example_basys3/run_yosys.ys | 2 +
techlibs/xilinx/example_mojo_counter/README | 10 -
techlibs/xilinx/example_mojo_counter/example.sh | 18 -
techlibs/xilinx/example_mojo_counter/example.ucf | 14 -
techlibs/xilinx/example_mojo_counter/example.v | 14 -
techlibs/xilinx/example_sim_counter/counter.v | 12 -
techlibs/xilinx/example_sim_counter/counter_tb.v | 61 -
techlibs/xilinx/example_sim_counter/run_sim.sh | 23 -
techlibs/xilinx/example_zed_counter/README | 10 -
techlibs/xilinx/example_zed_counter/example.sh | 18 -
techlibs/xilinx/example_zed_counter/example.ucf | 14 -
techlibs/xilinx/example_zed_counter/example.v | 14 -
techlibs/xilinx/synth_xilinx.cc | 120 +-
techlibs/xilinx/tests/.gitignore | 3 +
techlibs/xilinx/tests/bram1.sh | 63 ++
techlibs/xilinx/tests/bram1.v | 24 +
techlibs/xilinx/tests/bram1_tb.v | 116 ++
tests/{fsm => bram}/.gitignore | 0
tests/bram/generate.py | 264 +++++
tests/bram/run-single.sh | 12 +
tests/bram/run-test.sh | 32 +
tests/realmath/run-test.sh | 2 +-
tests/share/run-test.sh | 2 +-
tests/simple/muxtree.v | 11 +
tests/tools/cmp_tbdata.c | 2 +
tests/tools/vcdcd.pl | 4 +-
189 files changed, 9677 insertions(+), 2165 deletions(-)
create mode 100644 backends/smt2/.gitignore
create mode 100644 backends/smt2/Makefile.inc
create mode 100644 backends/smt2/smt2.cc
create mode 100644 backends/smt2/test_cells.sh
create mode 100644 debian/watch
create mode 100644 kernel/hashlib.h
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create mode 100644 passes/memory/memory_bram.cc
create mode 100644 passes/techmap/dff2dffe.cc
create mode 100644 passes/techmap/simplemap.h
create mode 100644 techlibs/common/cells.lib
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create mode 100644 techlibs/xilinx/cells_sim.v
create mode 100644 techlibs/xilinx/example_basys3/README
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create mode 100644 techlibs/xilinx/example_basys3/example.xdc
create mode 100644 techlibs/xilinx/example_basys3/run.sh
create mode 100644 techlibs/xilinx/example_basys3/run_prog.tcl
create mode 100644 techlibs/xilinx/example_basys3/run_vivado.tcl
create mode 100644 techlibs/xilinx/example_basys3/run_yosys.ys
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create mode 100644 techlibs/xilinx/tests/bram1.v
create mode 100644 techlibs/xilinx/tests/bram1_tb.v
copy tests/{fsm => bram}/.gitignore (100%)
create mode 100644 tests/bram/generate.py
create mode 100644 tests/bram/run-single.sh
create mode 100755 tests/bram/run-test.sh
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