[qflow] branch master updated (fdee28d -> 37cabb8)
Ruben Undheim
rubund-guest at moszumanska.debian.org
Thu Jul 23 08:37:29 UTC 2015
This is an automated email from the git hooks/post-receive script.
rubund-guest pushed a change to branch master
in repository qflow.
from fdee28d Updated copyright
adds 7987e38 Corrected the liberty file reading of scalar values instead of tables for vesta static timing analysis and in the readliberty library. Also, added a hash table for reading and looking up nets in vesta to speed up the verilog file reading, which was a bottleneck for large netlists.
adds 91d6c11 Update at Sun May 31 19:36:05 EDT 2015 by tim
adds 07c87b9 Merge branch 'master' into work
adds c4354ac Removed an unused backup file.
adds 77eadd0 Modified readliberty.c to ignore cells marked "dont_use". Corrected synthesis script to no longer require a "gate.cfg" file to run blifFanout, since this has been deprecated (and is no longer in the set of installed files). Modified blifFanout to use the first buffer found in the liberty file, so details of the buffer cell do not need to be provided in the tech shell script (although they will be used, if passed to the program).
adds 0ecb6e4 Update at Tue Jun 2 10:08:55 EDT 2015 by tim
adds 9728768 Merge branch 'master' into work
adds 6427ddc Corrected missing tagging of flop and latch output with an appropriate flag; otherwise, clock source searches don't stop at flop outputs and can get into infinite loops.
adds 6d0fd58 Corrected Makefile.in in the src directory, or else vesta won't compile.
adds 19915e5 Modified scripts such that all TCL scripts are annotated with the correct path to "tclsh" on installation.
adds 2b11055 Update at Wed Jun 3 17:34:02 EDT 2015 by tim
adds 0528f7d Merge branch 'master' into work
adds fe6d7d9 Added files for support of OSU018 (for TSMC). Also: Corrected the BLIF-to-verilog conversion so that trailing brackets <*> are converted back into verilog syntax square brackets [*] but brackets in the middle created by multi-dimensional arrays are replaced with underscores. The result appears to be compatible with gate-level simulations in Icarus verilog.
adds 3b0d7d2 Update at Tue Jun 9 11:30:38 EDT 2015 by tim
adds ad83eea Merge branch 'master' into work
adds 591e874 Added OFFSET lines back into the OSU standard cell LEF files. These are no longer needed now that qrouter has been corrected with respect to the default OFFSET when not specified; however, leaving the OFFSET in does no harm and maintains backwards compatibility with previous versions of qrouter.
new e2e12c1 Merge tag 'upstream/1.1.7'
new aafd7e3 Updated changelog
new 37cabb8 Refreshed some patches
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
VERSION | 2 +-
config.log | 55 +-
config.status | 15 +-
configure | 56 +-
configure.in | 15 +-
debian/changelog | 4 +-
debian/patches/01_fix_install_dir.patch | 52 +-
debian/patches/03_fix_path_of_tclsh.patch | 92 -
debian/patches/series | 1 -
scripts/Makefile | 57 +-
scripts/Makefile.in | 53 +-
scripts/{addspacers.tcl => addspacers.tcl.in} | 2 +-
scripts/{blif2cel.tcl => blif2cel.tcl.in} | 2 +-
scripts/{blif2sim.tcl => blif2sim.tcl.in} | 2 +-
scripts/{blifanno.tcl => blifanno.tcl.in} | 2 +-
scripts/{decongest.tcl => decongest.tcl.in} | 2 +-
scripts/{getfillcell.tcl => getfillcell.tcl.in} | 2 +-
scripts/{place2def.tcl => place2def.tcl.in} | 2 +-
scripts/{place2def2.tcl => place2def2.tcl.in} | 2 +-
scripts/{place2lef2.tcl => place2lef2.tcl.in} | 1 +
scripts/{place2net2.tcl => place2net2.tcl.in} | 2 +-
scripts/{rtl2sim.tcl => rtl2sim.tcl.in} | 2 +-
scripts/synthesize.sh | 17 +-
scripts/{ybuffer.tcl => ybuffer.tcl.in} | 2 +-
scripts/{ypostproc.tcl => ypostproc.tcl.in} | 2 +-
src/Makefile | 6 +-
src/Makefile.in | 4 +-
src/blif2Verilog.c | 36 +-
src/blifFanout.c | 49 +-
src/hash.o | Bin 14952 -> 14952 bytes
src/readliberty.c | 50 +-
src/readliberty.o | Bin 43464 -> 44368 bytes
src/vesta.c | 97 +-
tech/Makefile | 4 +-
tech/Makefile.in | 2 +-
tech/osu018/Makefile | 41 +
tech/osu018/Makefile.in | 41 +
tech/osu018/SCN6M_DEEP.09.tech | 11605 +++++++++++++++++++
.../osu035.magicrc.in => osu018/osu018.magicrc.in} | 8 +-
tech/{osu035/osu035.par => osu018/osu018.par} | 6 +-
tech/{osu035/osu035.prm => osu018/osu018.prm} | 2 +-
tech/{osu035/osu035.sh => osu018/osu018.sh} | 10 +-
tech/osu018/osu018_stdcells.lef | 2941 +++++
tech/osu018/osu018_stdcells.lib | 6141 ++++++++++
tech/osu018/osu018_stdcells.sp | 803 ++
.../osu05_stdcells.v => osu018/osu018_stdcells.v} | 424 +-
tech/osu035/Makefile | 2 +-
tech/osu035/osu035_stdcells.lef | 8 +-
tech/osu050/Makefile | 2 +-
tech/osu050/osu050_stdcells.lef | 6 +-
50 files changed, 22163 insertions(+), 569 deletions(-)
delete mode 100644 debian/patches/03_fix_path_of_tclsh.patch
rename scripts/{addspacers.tcl => addspacers.tcl.in} (99%)
rename scripts/{blif2cel.tcl => blif2cel.tcl.in} (99%)
rename scripts/{blif2sim.tcl => blif2sim.tcl.in} (99%)
rename scripts/{blifanno.tcl => blifanno.tcl.in} (99%)
rename scripts/{decongest.tcl => decongest.tcl.in} (99%)
rename scripts/{getfillcell.tcl => getfillcell.tcl.in} (99%)
rename scripts/{place2def.tcl => place2def.tcl.in} (99%)
rename scripts/{place2def2.tcl => place2def2.tcl.in} (99%)
rename scripts/{place2lef2.tcl => place2lef2.tcl.in} (99%)
rename scripts/{place2net2.tcl => place2net2.tcl.in} (99%)
rename scripts/{rtl2sim.tcl => rtl2sim.tcl.in} (99%)
rename scripts/{ybuffer.tcl => ybuffer.tcl.in} (99%)
rename scripts/{ypostproc.tcl => ypostproc.tcl.in} (99%)
create mode 100644 tech/osu018/Makefile
create mode 100644 tech/osu018/Makefile.in
create mode 100644 tech/osu018/SCN6M_DEEP.09.tech
copy tech/{osu035/osu035.magicrc.in => osu018/osu018.magicrc.in} (56%)
copy tech/{osu035/osu035.par => osu018/osu018.par} (93%)
copy tech/{osu035/osu035.prm => osu018/osu018.prm} (94%)
copy tech/{osu035/osu035.sh => osu018/osu018.sh} (93%)
create mode 100755 tech/osu018/osu018_stdcells.lef
create mode 100755 tech/osu018/osu018_stdcells.lib
create mode 100755 tech/osu018/osu018_stdcells.sp
copy tech/{osu050/osu05_stdcells.v => osu018/osu018_stdcells.v} (68%)
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