[clblas] 95/125: Minor fix for the autogenerated kernels to work on intel CPUs

[Ghislain Vaillant]

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ghisvail-guest pushed a commit to branch master
in repository clblas.

commit 0a079a90933363b7e12f2cbaf2e7a9944a954b7f
Author: Pavan Yalamanchili <pavan at arrayfire.com>
Date:   Wed Sep 3 19:17:03 2014 -0400

    Minor fix for the autogenerated kernels to work on intel CPUs
    
    intel OpenCL driver does not support operations between
    unsigned int vectors and unsigned long scalars
---
 src/library/blas/gens/fetch.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/library/blas/gens/fetch.c b/src/library/blas/gens/fetch.c
index b3c3011..34d62f1 100644
--- a/src/library/blas/gens/fetch.c
+++ b/src/library/blas/gens/fetch.c
@@ -359,7 +359,7 @@ sprintfNormalizedBaseCoord(
         kstrcpy(kstr, name);
     }
     else {
-        ksprintf(kstr, "(%s >> %d)", name, shift);
+        ksprintf(kstr, "(uint)(%s >> %d)", name, shift);
     }
 }
 
@@ -515,7 +515,7 @@ sprintfLeadingDimension(Kstring *ld, const FetchContext *fctx)
 
         shift = findHighestSetBit(fctx->physTile.vecLen);
         if (shift != 0) {
-            ksprintf(ld, "(%s >> %d)", varName, shift);
+            ksprintf(ld, "(uint)(%s >> %d)", varName, shift);
             done = true;
         }
     }
@@ -564,10 +564,10 @@ sprintfGboundK(Kstring *kstr, const FetchContext *fctx)
     }
     else {
         if (fctx->addrMode & FETCH_ADDR_TAILK_PADD) {
-            ksprintf(kstr, "((%s + %u) >> %d)", varK, vecLen - 1, shift);
+            ksprintf(kstr, "(uint)((%s + %u) >> %d)", varK, vecLen - 1, shift);
         }
         else {
-            ksprintf(kstr, "(%s >> %d)", varK, shift);
+            ksprintf(kstr, "(uint)(%s >> %d)", varK, shift);
         }
     }
 }

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