[tbb] 32/64: Imported Debian patch 4.0+r233+update5-0.1
Graham Inggs
ginggs at moszumanska.debian.org
Mon Jul 3 12:27:57 UTC 2017
This is an automated email from the git hooks/post-receive script.
ginggs pushed a commit to branch master
in repository tbb.
commit c3a2df63c2c2f888bd1f18012ab27331e73321ad
Merge: e56c892 93c457a
Author: Andrew Lee (李健秋) <ajqlee at debian.org>
Date: Wed Jun 12 13:57:09 2013 +0800
Imported Debian patch 4.0+r233+update5-0.1
CHANGES | 174 +-
Makefile | 4 +-
build/AIX.gcc.inc | 2 +-
build/AIX.inc | 4 +-
build/FreeBSD.gcc.inc | 2 +-
build/FreeBSD.inc | 4 +-
build/Makefile.rml | 12 +-
build/Makefile.tbb | 9 +-
build/Makefile.tbbmalloc | 30 +-
build/Makefile.tbbproxy | 2 +-
build/Makefile.test | 96 +-
build/SunOS.gcc.inc | 2 +-
build/SunOS.inc | 4 +-
build/SunOS.suncc.inc | 2 +-
build/big_iron.inc | 4 +-
build/common.inc | 3 +-
build/common_rules.inc | 16 +-
build/detect.js | 67 +-
build/generate_tbbvars.bat | 2 +-
build/generate_tbbvars.sh | 2 +-
build/index.html | 2 +-
build/linux.gcc.inc | 18 +-
build/linux.icc.inc | 35 +-
build/linux.inc | 8 +-
build/linux.xl.inc | 2 +-
build/macos.clang.inc | 109 +
build/macos.gcc.inc | 2 +-
build/macos.icc.inc | 13 +-
build/macos.inc | 8 +-
build/test_launcher.bat | 2 +-
build/test_launcher.sh | 2 +-
build/version_info_aix.sh | 22 +-
build/version_info_linux.sh | 22 +-
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build/version_info_sunos.sh | 18 +-
build/version_info_windows.js | 20 +-
build/vsproject/index.html | 2 +-
build/vsproject/tbbmalloc.vcproj | 18 +-
build/vsproject/tbbmalloc_proxy.vcproj | 16 +-
build/vsproject/version_string.tmp | 1 -
build/vsproject/version_string.ver | 1 +
build/windows.cl.inc | 2 +-
build/windows.gcc.inc | 13 +-
build/windows.icl.inc | 21 +-
build/windows.inc | 4 +-
build/xbox360.cl.inc | 2 +-
build/xbox360.inc | 4 +-
debian/changelog | 9 +-
debian/control | 6 +-
debian/patches/series | 3 +
.../tbb40_20120613oss-0001-Endianness.patch | 42 +
.../tbb40_20120613oss-0002-ARM-support.patch | 289 +++
...s-0003-Add-machine_fetchadd-48-intrinsics.patch | 160 ++
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doc/html/a00250.html | 572 +----
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doc/html/a00263.html | 394 ++-
doc/html/a00263.png | Bin 4876 -> 2898 bytes
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doc/html/{a00242.png => a00268.png} | Bin
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doc/html/a00311.html | 598 +----
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doc/html/a00337.html | 625 +++++
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doc/html/a00544.html | 256 ++
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doc/html/a00623.html | 274 ++
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doc/html/a00640.html | 782 ++++++
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doc/html/annotated.html | 211 +-
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doc/html/functions.html | 35 +-
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doc/html/functions_rela.html | 8 +-
doc/html/functions_type.html | 32 +-
doc/html/functions_vars.html | 24 +-
doc/html/globals.html | 20 +-
doc/html/globals_func.html | 20 +-
doc/html/hierarchy.html | 255 +-
doc/html/index.html | 2 +-
doc/html/modules.html | 14 +-
doc/html/namespacemembers.html | 40 +-
doc/html/namespacemembers_enum.html | 7 +-
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examples/parallel_for/tachyon/src/imageio.cpp | 4 +-
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examples/parallel_for/tachyon/src/imap.cpp | 4 +-
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examples/parallel_for/tachyon/src/trace.serial.cpp | 2 +-
examples/parallel_for/tachyon/src/trace.tbb.cpp | 78 +-
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examples/parallel_reduce/convex_hull/Makefile | 2 +-
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examples/parallel_reduce/primes/primes.cpp | 5 +-
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examples/pipeline/square/index.html | 10 +-
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include/index.html | 6 +-
include/serial/tbb/parallel_for.h | 2 +-
include/serial/tbb/tbb_annotate.h | 2 +-
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include/tbb/compat/tuple | 220 +-
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include/tbb/concurrent_lru_cache.h | 238 ++
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include/tbb/internal/_flow_graph_join_impl.h | 443 +---
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src/perf/coarse_grained_raii_lru_cache.h | 153 ++
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src/rml/perfor/omp_nested.cpp | 2 +-
src/rml/perfor/omp_simple.cpp | 2 +-
src/rml/perfor/tbb_multi_omp.cpp | 2 +-
src/rml/perfor/tbb_simple.cpp | 2 +-
src/rml/perfor/thread_level.h | 2 +-
src/rml/server/index.html | 2 +-
src/rml/server/irml.rc | 4 +-
src/rml/server/job_automaton.h | 2 +-
src/rml/server/lin-rml-export.def | 2 +-
src/rml/server/rml_server.cpp | 326 +--
src/rml/server/thread_monitor.h | 4 +-
src/rml/server/wait_counter.h | 2 +-
src/rml/server/win32-rml-export.def | 2 +-
src/rml/server/win64-rml-export.def | 2 +-
src/rml/test/rml_omp_stub.cpp | 2 +-
src/rml/test/test_job_automaton.cpp | 2 +-
src/rml/test/test_rml_mixed.cpp | 53 +-
src/rml/test/test_rml_omp.cpp | 14 +-
src/rml/test/test_rml_omp_c_linkage.c | 2 +-
src/rml/test/test_rml_tbb.cpp | 2 +-
src/rml/test/test_server.h | 2 +-
src/rml/test/test_thread_monitor.cpp | 4 +-
src/tbb/arena.cpp | 28 +-
src/tbb/arena.h | 71 +-
src/tbb/cache_aligned_allocator.cpp | 28 +-
src/tbb/cilk-tbb-interop.h | 2 +-
src/tbb/concurrent_hash_map.cpp | 2 +-
src/tbb/concurrent_monitor.cpp | 52 +-
src/tbb/concurrent_monitor.h | 77 +-
src/tbb/concurrent_queue.cpp | 162 +-
src/tbb/concurrent_vector.cpp | 19 +-
src/tbb/condition_variable.cpp | 2 +-
src/tbb/critical_section.cpp | 2 +-
src/tbb/custom_scheduler.h | 23 +-
src/tbb/dynamic_link.cpp | 133 +-
src/tbb/dynamic_link.h | 2 +-
src/tbb/governor.cpp | 21 +-
src/tbb/governor.h | 16 +-
src/tbb/ia32-masm/atomic_support.asm | 2 +-
src/tbb/ia32-masm/lock_byte.asm | 2 +-
src/tbb/ia64-gas/atomic_support.s | 2 +-
src/tbb/ia64-gas/ia64_misc.s | 2 +-
src/tbb/ia64-gas/lock_byte.s | 2 +-
src/tbb/ia64-gas/log2.s | 3 +-
src/tbb/ia64-gas/pause.s | 2 +-
src/tbb/ibm_aix51/atomic_support.c | 2 +-
src/tbb/index.html | 2 +-
src/tbb/intel64-masm/atomic_support.asm | 2 +-
src/tbb/intel64-masm/intel64_misc.asm | 2 +-
src/tbb/intrusive_list.h | 2 +-
src/tbb/itt_notify.cpp | 25 +-
src/tbb/itt_notify.h | 7 +-
src/tbb/lin32-tbb-export.def | 2 +-
src/tbb/lin32-tbb-export.lst | 9 +-
src/tbb/lin64-tbb-export.def | 2 +-
src/tbb/lin64-tbb-export.lst | 10 +-
src/tbb/lin64ipf-tbb-export.def | 2 +-
src/tbb/lin64ipf-tbb-export.lst | 9 +-
src/tbb/mac32-tbb-export.def | 2 +-
src/tbb/mac32-tbb-export.lst | 9 +-
src/tbb/mac64-tbb-export.def | 2 +-
src/tbb/mac64-tbb-export.lst | 10 +-
src/tbb/mailbox.h | 7 +-
src/tbb/market.cpp | 64 +-
src/tbb/market.h | 10 +-
src/tbb/mutex.cpp | 2 +-
src/tbb/observer_proxy.cpp | 2 +-
src/tbb/observer_proxy.h | 2 +-
src/tbb/pipeline.cpp | 92 +-
src/tbb/private_server.cpp | 6 +-
src/tbb/queuing_mutex.cpp | 5 +-
src/tbb/queuing_rw_mutex.cpp | 36 +-
src/tbb/reader_writer_lock.cpp | 89 +-
src/tbb/recursive_mutex.cpp | 2 +-
src/tbb/scheduler.cpp | 75 +-
src/tbb/scheduler.h | 12 +-
src/tbb/scheduler_common.h | 20 +-
src/tbb/scheduler_utility.h | 16 +-
src/tbb/semaphore.cpp | 2 +-
src/tbb/semaphore.h | 2 +-
src/tbb/spin_mutex.cpp | 2 +-
src/tbb/spin_rw_mutex.cpp | 30 +-
src/tbb/task.cpp | 2 +-
src/tbb/task_group_context.cpp | 38 +-
src/tbb/task_stream.h | 4 +-
src/tbb/tbb_assert_impl.h | 15 +-
src/tbb/tbb_main.cpp | 11 +-
src/tbb/tbb_main.h | 2 +-
src/tbb/tbb_misc.cpp | 16 +-
src/tbb/tbb_misc.h | 27 +-
src/tbb/tbb_misc_ex.cpp | 15 +-
src/tbb/tbb_resource.rc | 4 +-
src/tbb/tbb_statistics.cpp | 11 +-
src/tbb/tbb_statistics.h | 2 +-
src/tbb/tbb_thread.cpp | 2 +-
src/tbb/tbb_version.h | 61 +-
src/tbb/tls.h | 2 +-
src/tbb/tools_api/disable_warnings.h | 2 +-
src/tbb/tools_api/internal/ittnotify.h | 2 +-
src/tbb/tools_api/ittnotify.h | 2614 +++++++++++++++++---
src/tbb/tools_api/ittnotify_config.h | 379 ++-
src/tbb/tools_api/ittnotify_static.c | 1033 +++++---
src/tbb/tools_api/ittnotify_static.h | 194 +-
src/tbb/tools_api/ittnotify_types.h | 72 +-
src/tbb/tools_api/legacy/ittnotify.h | 256 +-
src/tbb/tools_api/prototype/ittnotify.h | 2 +-
src/tbb/win32-tbb-export.def | 2 +-
src/tbb/win32-tbb-export.lst | 4 +-
src/tbb/win64-gcc-tbb-export.def | 2 +-
src/tbb/win64-gcc-tbb-export.lst | 9 +-
src/tbb/win64-tbb-export.def | 2 +-
src/tbb/win64-tbb-export.lst | 4 +-
src/tbb/xbox360-tbb-export.def | 2 +-
src/tbbmalloc/Customize.h | 17 +-
src/tbbmalloc/MapMemory.h | 23 +-
src/tbbmalloc/Statistics.h | 6 +-
src/tbbmalloc/TypeDefinitions.h | 15 +-
src/tbbmalloc/backend.cpp | 633 +++--
src/tbbmalloc/backref.cpp | 100 +-
src/tbbmalloc/frontend.cpp | 627 +++--
src/tbbmalloc/large_objects.cpp | 168 +-
src/tbbmalloc/lin32-proxy-export.def | 2 +-
src/tbbmalloc/lin32-tbbmalloc-export.def | 5 +-
src/tbbmalloc/lin64-proxy-export.def | 2 +-
src/tbbmalloc/lin64-tbbmalloc-export.def | 5 +-
src/tbbmalloc/lin64ipf-proxy-export.def | 2 +-
src/tbbmalloc/lin64ipf-tbbmalloc-export.def | 8 +-
src/tbbmalloc/mac32-tbbmalloc-export.def | 5 +-
src/tbbmalloc/mac64-tbbmalloc-export.def | 5 +-
src/tbbmalloc/proxy.cpp | 26 +-
src/tbbmalloc/proxy.h | 2 +-
src/tbbmalloc/tbb_function_replacement.cpp | 2 +-
src/tbbmalloc/tbb_function_replacement.h | 3 +-
src/tbbmalloc/tbbmalloc.cpp | 77 +-
src/tbbmalloc/tbbmalloc.rc | 4 +-
src/tbbmalloc/tbbmalloc_internal.h | 307 ++-
src/tbbmalloc/tbbmalloc_internal_api.h | 45 +
src/tbbmalloc/win32-gcc-tbbmalloc-export.def | 5 +-
src/tbbmalloc/win32-tbbmalloc-export.def | 6 +-
src/tbbmalloc/win64-gcc-tbbmalloc-export.def | 5 +-
src/tbbmalloc/win64-tbbmalloc-export.def | 5 +-
src/tbbmalloc/xbox360-tbbmalloc-export.def | 2 +-
src/tbbproxy/tbbproxy-windows.asm | 2 +-
src/tbbproxy/tbbproxy.cpp | 4 +-
src/test/harness.h | 34 +-
src/test/harness_allocator.h | 2 +-
src/test/harness_assert.h | 2 +-
src/test/harness_bad_expr.h | 2 +-
src/test/harness_barrier.h | 4 +-
src/test/harness_concurrency_tracker.h | 2 +-
src/test/harness_cpu.h | 2 +-
src/test/harness_defs.h | 50 +
src/test/harness_dynamic_libs.h | 85 +
src/test/harness_eh.h | 2 +-
src/test/harness_graph.h | 42 +-
src/test/harness_inject_scheduler.h | 8 +-
src/test/harness_iterator.h | 2 +-
src/test/harness_m128.h | 2 +-
src/test/harness_memory.h | 2 +-
src/test/harness_report.h | 10 +-
src/test/harness_task.h | 2 +-
src/test/harness_tbb_independence.h | 21 +-
src/test/harness_test_cases_framework.h | 243 ++
src/test/test_ScalableAllocator.cpp | 63 +-
src/test/test_ScalableAllocator_STL.cpp | 2 +-
src/test/test_aggregator.cpp | 193 ++
src/test/test_aligned_space.cpp | 2 +-
src/test/test_allocator.h | 5 +-
src/test/test_allocator_STL.h | 4 +-
src/test/test_assembly.cpp | 12 +-
src/test/test_atomic.cpp | 244 +-
src/test/test_blocked_range.cpp | 2 +-
src/test/test_blocked_range2d.cpp | 2 +-
src/test/test_blocked_range3d.cpp | 2 +-
src/test/test_broadcast_node.cpp | 12 +-
src/test/test_buffer_node.cpp | 4 +-
src/test/test_cache_aligned_allocator.cpp | 2 +-
src/test/test_cache_aligned_allocator_STL.cpp | 2 +-
src/test/test_cilk_common.h | 2 +-
src/test/test_cilk_dynamic_load.cpp | 54 +-
src/test/test_cilk_interop.cpp | 2 +-
src/test/test_combinable.cpp | 2 +-
src/test/test_concurrent_hash_map.cpp | 2 +-
src/test/test_concurrent_lru_cache.cpp | 412 +++
src/test/test_concurrent_monitor.cpp | 148 +-
src/test/test_concurrent_priority_queue.cpp | 2 +-
src/test/test_concurrent_queue.cpp | 725 ++++--
src/test/test_concurrent_queue.h | 98 +
src/test/test_concurrent_unordered.cpp | 2 +-
src/test/test_concurrent_vector.cpp | 63 +-
src/test/test_condition_variable.h | 26 +-
src/test/test_continue_node.cpp | 25 +-
src/test/test_critical_section.cpp | 2 +-
src/test/test_eh_algorithms.cpp | 329 +--
src/test/test_eh_flow_graph.cpp | 113 +
src/test/test_eh_tasks.cpp | 6 +-
src/test/test_enumerable_thread_specific.cpp | 2 +-
src/test/test_fast_random.cpp | 4 +-
src/test/test_flow_graph.cpp | 93 +-
src/test/test_fp.cpp | 2 +-
src/test/test_function_node.cpp | 4 +-
src/test/test_halt.cpp | 2 +-
src/test/test_handle_perror.cpp | 2 +-
src/test/test_hw_concurrency.cpp | 13 +-
src/test/test_inits_loop.cpp | 2 +-
src/test/test_intrusive_list.cpp | 2 +-
src/test/test_ittnotify.cpp | 2 +-
src/test/test_join_node.cpp | 252 +-
src/test/test_lambda.cpp | 21 +-
src/test/test_limiter_node.cpp | 2 +-
src/test/test_malloc_atexit.cpp | 2 +-
src/test/test_malloc_compliance.cpp | 76 +-
src/test/test_malloc_init_shutdown.cpp | 58 +-
src/test/test_malloc_lib_unload.cpp | 49 +-
src/test/test_malloc_overload.cpp | 2 +-
src/test/test_malloc_pools.cpp | 166 +-
src/test/test_malloc_pure_c.c | 2 +-
src/test/test_malloc_regression.cpp | 2 +-
src/test/test_malloc_used_by_lib.cpp | 173 ++
src/test/test_malloc_whitebox.cpp | 177 +-
src/test/test_model_plugin.cpp | 70 +-
src/test/test_multifunction_node.cpp | 470 ++++
src/test/test_multioutput_function_node.cpp | 471 ----
src/test/test_mutex.cpp | 128 +-
src/test/test_mutex_native_threads.cpp | 6 +-
src/test/test_openmp.cpp | 8 +-
src/test/test_or_node.cpp | 6 +-
src/test/test_overwrite_node.cpp | 8 +-
src/test/test_parallel_do.cpp | 2 +-
src/test/test_parallel_for.cpp | 2 +-
src/test/test_parallel_for_each.cpp | 2 +-
src/test/test_parallel_invoke.cpp | 2 +-
src/test/test_parallel_pipeline.cpp | 253 +-
src/test/test_parallel_reduce.cpp | 10 +-
src/test/test_parallel_scan.cpp | 2 +-
src/test/test_parallel_sort.cpp | 2 +-
src/test/test_parallel_while.cpp | 2 +-
src/test/test_pipeline.cpp | 2 +-
src/test/test_pipeline_with_tbf.cpp | 2 +-
src/test/test_priority_queue_node.cpp | 2 +-
src/test/test_queue_node.cpp | 4 +-
src/test/test_reader_writer_lock.cpp | 37 +-
src/test/test_runtime_loader.cpp | 2 +-
src/test/test_rwm_upgrade_downgrade.cpp | 2 +-
src/test/test_semaphore.cpp | 10 +-
src/test/test_sequencer_node.cpp | 2 +-
src/test/test_source_node.cpp | 2 +-
src/test/test_split_node.cpp | 2 +-
src/test/test_std_thread.cpp | 2 +-
src/test/test_task.cpp | 78 +-
src/test/test_task_assertions.cpp | 4 +-
src/test/test_task_auto_init.cpp | 14 +-
src/test/test_task_enqueue.cpp | 80 +-
src/test/test_task_group.cpp | 2 +-
src/test/test_task_leaks.cpp | 6 +-
src/test/test_task_priority.cpp | 59 +-
src/test/test_task_scheduler_init.cpp | 2 +-
src/test/test_task_scheduler_observer.cpp | 2 +-
src/test/test_task_steal_limit.cpp | 81 +
src/test/test_tbb_condition_variable.cpp | 12 +-
src/test/test_tbb_header.cpp | 29 +-
src/test/test_tbb_thread.cpp | 2 +-
src/test/test_tbb_version.cpp | 74 +-
src/test/test_thread.h | 2 +-
src/test/test_tick_count.cpp | 2 +-
src/test/test_tuple.cpp | 4 +-
src/test/test_write_once_node.cpp | 8 +-
src/test/test_yield.cpp | 2 +-
1210 files changed, 53151 insertions(+), 41231 deletions(-)
diff --cc debian/changelog
index de26a9b,0000000..8cec318
mode 100644,000000..100644
--- a/debian/changelog
+++ b/debian/changelog
@@@ -1,151 -1,0 +1,154 @@@
- tbb (4.0+r233-1+powerpcspe1) unreleased; urgency=low
++tbb (4.0+r233+update5-0.1) unstable; urgency=low
+
- * Enable build on powerpcspe, see #695685
++ * Non-maintainer upload.
++ * Updated to upstream 4.0 Update 5 release.
++ + Added 64-bit PowerPC support
++ * Applied ARMv7-A support patches from linaro. (Closes: #692033)
+
- -- Roland Stigge <stigge at antcom.de> Mon, 22 Apr 2013 11:25:29 +0200
++ -- Andrew Lee (李健秋) <ajqlee at debian.org> Wed, 12 Jun 2013 13:57:09 +0800
+
+tbb (4.0+r233-1) unstable; urgency=low
+
+ * New upstream release
+ + Add 32-bit PowerPC support
+ * Update to Standards-Version 3.9.2 (no changes)
+ * Add note to package descriptions that Pentium4-compatible and higher is
+ supported for i386 architecture users (Closes: #642248)
+ * Do not run test suite when DEB_BUILD_OPTIONS=nocheck (Closes: #642251)
+ * Do not ignore 'make clean' errors (Closes: #642242)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sat, 24 Sep 2011 17:16:45 -0400
+
+tbb (3.0+r147-1) unstable; urgency=low
+
+ * New upstream release
+ * debian/copyright: update years
+ * debian/control: Add ppc64 to the Architecture fields
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Thu, 31 Mar 2011 15:02:52 -0400
+
+tbb (3.0+r035-2) unstable; urgency=low
+
+ * Make examples build properly (Closes: #608347)
+ + Ship common Makefile snippets from upstream
+ + Document that upstream's _debug library versions are not shipped
+ * Update to Standards-Version 3.9.1 (no changes)
+
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Fri, 31 Dec 2010 15:21:02 -0500
+
+tbb (3.0+r035-1) unstable; urgency=low
+
+ * New upstream release
+ * Update to Standards-Version 3.9.0 (no changes)
+ * Switch to dpkg-source 3.0 (quilt) format
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Mon, 28 Jun 2010 19:29:45 -0400
+
+tbb (3.0+r018-1) unstable; urgency=low
+
+ * New upstream release (Closes: #581614)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sat, 15 May 2010 07:58:17 -0400
+
+tbb (2.2+r013-1) unstable; urgency=low
+
+ * New upstream release
+ * debian/copyright: update years
+ * Update to Standards-Version 3.8.4 (no changes)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sat, 20 Feb 2010 12:22:19 -0500
+
+tbb (2.2+r012-1) unstable; urgency=low
+
+ * New upstream release
+ * Update pkg-config metadata file
+ * Add ${misc:Depends} as recommended by lintian
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Wed, 27 Jan 2010 09:50:16 -0500
+
+tbb (2.2+r009-1) unstable; urgency=low
+
+ * New upstream release
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sun, 18 Oct 2009 14:50:25 -0400
+
+tbb (2.2+r004-1) unstable; urgency=low
+
+ * New upstream release (Closes: #545702)
+ * Update to Standards-Version 3.8.3 (no changes)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Wed, 09 Sep 2009 17:22:22 -0400
+
+tbb (2.1r017-1) unstable; urgency=low
+
+ * New upstream release
+ * Change libtbb2-dbg to section debug for new archive layout
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sun, 10 May 2009 21:15:34 -0400
+
+tbb (2.1r015-1) unstable; urgency=low
+
+ * New upstream release
+ * 02_replace_arch_command.dpatch: merged upstream
+ * Remove build dependency on dpatch and modify debian-rules accordingly
+ * Add .pc file to help when building against the library
+ * Update to Standards-Version 3.8.1 (no changes)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Tue, 17 Mar 2009 15:52:47 -0400
+
+tbb (2.1~20080605-1) unstable; urgency=low
+
+ * New upstream release
+ * Drop patches
+ - 01_add_soname: suitable fascimile implemented upstream
+ - 03_ias_patch: upstream now using as instead of ias
+ * Update to Standards-Version 3.8.0 (no changes)
+ * Add new upstream Doxygen documentation (in libtbb-doc package)
+ * Register new documentation with doc-base
+ * debian/copyright: Update years of copyright
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Tue, 08 Jul 2008 18:51:22 -0400
+
+tbb (2.0r020-1) unstable; urgency=low
+
+ * New upstream release.
+ * debian/patches/04_g++-4.3.dpatch: Removed, integrated upstream
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Tue, 29 Apr 2008 15:31:09 -0400
+
+tbb (2.0r017-1) unstable; urgency=low
+
+ * New upstream release.
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sat, 08 Mar 2008 22:15:13 -0500
+
+tbb (2.0r014-4) unstable; urgency=low
+
+ * Make tbb-examples recommend libtbb-dev.
+ * Make libtbb-dev suggest tbb-examples.
+ * Patch to allow building with g++-4.3 (Closes: #462415)
+ * Only conditionally create symlink (Closes: #465617)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Thu, 14 Feb 2008 18:36:15 -0500
+
+tbb (2.0r014-3) unstable; urgency=low
+
+ * Fix short descriptions of tbb-examples (Closes: #457442)
+ * Fix short descriptions of libtbb2-dbg (Closes: #457443)
+ * Add patch to allow build to succeed on Itanium
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Thu, 3 Jan 2008 15:21:50 -0500
+
+tbb (2.0r014-2) unstable; urgency=low
+
+ * debian/copyright: Fix license statement.
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Wed, 19 Dec 2007 21:17:16 -0500
+
+tbb (2.0r014-1) unstable; urgency=low
+
+ * Initial release (Closes: #434583)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Fri, 14 Dec 2007 23:10:58 -0500
+
diff --cc debian/control
index a796e07,0000000..ce09ef4
mode 100644,000000..100644
--- a/debian/control
+++ b/debian/control
@@@ -1,87 -1,0 +1,87 @@@
+Source: tbb
+Priority: extra
+Maintainer: Athena Capital Research <acr-debian at athenacr.com>
+Uploaders: Roberto C. Sanchez <roberto at connexer.com>
+Build-Depends: debhelper (>= 5)
+Standards-Version: 3.9.2
+Section: libs
+Homepage: http://threadingbuildingblocks.org/
+
+Package: libtbb-dev
+Section: libdevel
- Architecture: i386 amd64 ia64 powerpc powerpcspe ppc64
++Architecture: i386 amd64 ia64 powerpc ppc64
+Depends: libtbb2 (= ${binary:Version}), ${misc:Depends}
+Suggests: tbb-examples, libtbb-doc
+Description: parallelism library for C++ - development files
+ TBB is a library that helps you leverage multi-core processor
+ performance without having to be a threading expert. It represents a
+ higher-level, task-based parallelism that abstracts platform details
+ and threading mechanism for performance and scalability.
+ .
+ (Note: if you are a user of the i386 architecture, i.e., 32-bit Intel
+ or compatible hardware, this package only supports Pentium4-compatible
+ and higher processors.)
+ .
+ This package includes the TBB development files.
+
+Package: libtbb2
- Architecture: i386 amd64 ia64 powerpc powerpcspe ppc64
++Architecture: i386 amd64 ia64 powerpc ppc64
+Depends: ${shlibs:Depends}, ${misc:Depends}
+Description: parallelism library for C++ - runtime files
+ TBB is a library that helps you leverage multi-core processor
+ performance without having to be a threading expert. It represents a
+ higher-level, task-based parallelism that abstracts platform details
+ and threading mechanism for performance and scalability.
+ .
+ (Note: if you are a user of the i386 architecture, i.e., 32-bit Intel
+ or compatible hardware, this package only supports Pentium4-compatible
+ and higher processors.)
+ .
+ This package includes the TBB runtime files.
+
+Package: libtbb2-dbg
+Section: debug
- Architecture: i386 amd64 ia64 powerpc powerpcspe ppc64
++Architecture: i386 amd64 ia64 powerpc ppc64
+Depends: libtbb2 (= ${binary:Version}), ${misc:Depends}
+Description: parallelism library for C++ - debugging symbols
+ TBB is a library that helps you leverage multi-core processor
+ performance without having to be a threading expert. It represents a
+ higher-level, task-based parallelism that abstracts platform details
+ and threading mechanism for performance and scalability.
+ .
+ (Note: if you are a user of the i386 architecture, i.e., 32-bit Intel
+ or compatible hardware, this package only supports Pentium4-compatible
+ and higher processors.)
+ .
+ This package includes the TBB debugging symbols.
+
+Package: libtbb-doc
+Section: doc
+Architecture: all
+Depends: ${misc:Depends}
+Recommends: libtbb-dev, tbb-examples
+Description: parallelism library for C++ - documentation
+ TBB is a library that helps you leverage multi-core processor
+ performance without having to be a threading expert. It represents a
+ higher-level, task-based parallelism that abstracts platform details
+ and threading mechanism for performance and scalability.
+ .
+ This package includes the TBB documentation files.
+
+Package: tbb-examples
+Section: doc
+Architecture: all
+Depends: ${misc:Depends}
+Recommends: libtbb-dev, libtbb-doc
+Description: parallelism library for C++ - example files
+ TBB is a library that helps you leverage multi-core processor
+ performance without having to be a threading expert. It represents a
+ higher-level, task-based parallelism that abstracts platform details
+ and threading mechanism for performance and scalability.
+ .
+ (Note: if you are a user of the i386 architecture, i.e., 32-bit Intel
+ or compatible hardware, this package only supports Pentium4-compatible
+ and higher processors.)
+ .
+ This package includes the TBB example files.
+
diff --cc debian/patches/series
index 0000000,0000000..d678c09
new file mode 100644
--- /dev/null
+++ b/debian/patches/series
@@@ -1,0 -1,0 +1,3 @@@
++tbb40_20120613oss-0001-Endianness.patch
++tbb40_20120613oss-0002-ARM-support.patch
++tbb40_20120613oss-0003-Add-machine_fetchadd-48-intrinsics.patch
diff --cc debian/patches/tbb40_20120613oss-0001-Endianness.patch
index 0000000,0000000..71fc039
new file mode 100644
--- /dev/null
+++ b/debian/patches/tbb40_20120613oss-0001-Endianness.patch
@@@ -1,0 -1,0 +1,42 @@@
++From 2abd332fee526be68a0c30d1175599056a79f917 Mon Sep 17 00:00:00 2001
++From: Steve Capper <steve.capper at linaro.org>
++Date: Tue, 28 Aug 2012 04:11:16 -0400
++Subject: [PATCH 1/3] Endianness
++
++Fix the __TBB_BIG_ENDIAN preprocessor logic to correctly identify
++the unknown (at compile time) endianess check.
++
++Signed-off-by: Steve Capper <steve.capper at linaro.org>
++---
++ include/tbb/tbb_machine.h | 5 +++--
++ 1 file changed, 3 insertions(+), 2 deletions(-)
++
++diff --git a/include/tbb/tbb_machine.h b/include/tbb/tbb_machine.h
++index 6c83942..803fcda 100644
++--- a/include/tbb/tbb_machine.h
+++++ b/include/tbb/tbb_machine.h
++@@ -378,10 +378,12 @@ void spin_wait_until_eq( const volatile T& location, const U value ) {
++ // - The operation assumes that the architecture consistently uses either little-endian or big-endian:
++ // it does not support mixed-endian or page-specific bi-endian architectures.
++ // This function is the only use of __TBB_BIG_ENDIAN.
++-#if (__TBB_BIG_ENDIAN!=-1)
+++#if (__TBB_BIG_ENDIAN==-1)
++ #if ( __TBB_USE_GENERIC_PART_WORD_CAS)
++ #error generic implementation of part-word CAS was explicitly disabled for this configuration
++ #endif
+++#endif
+++
++ template<typename T>
++ inline T __TBB_MaskedCompareAndSwap (volatile T * const ptr, const T value, const T comparand ) {
++ struct endianness{ static bool is_big_endian(){
++@@ -419,7 +421,6 @@ inline T __TBB_MaskedCompareAndSwap (volatile T * const ptr, const T value, cons
++ else continue; // CAS failed but the bits of interest left unchanged
++ }
++ }
++-#endif
++ template<size_t S, typename T>
++ inline T __TBB_CompareAndSwapGeneric (volatile void *ptr, T value, T comparand );
++
++--
++1.7.11.4
++
diff --cc debian/patches/tbb40_20120613oss-0002-ARM-support.patch
index 0000000,0000000..c403ede
new file mode 100644
--- /dev/null
+++ b/debian/patches/tbb40_20120613oss-0002-ARM-support.patch
@@@ -1,0 -1,0 +1,289 @@@
++From 5690a53639758f6a15c0d2a60acea4aa86ae9209 Mon Sep 17 00:00:00 2001
++From: Steve Capper <steve.capper at linaro.org>
++Date: Tue, 28 Aug 2012 07:11:51 -0400
++Subject: [PATCH 2/3] ARM support.
++
++Add ARMv7 support to libTBB.
++
++Signed-off-by: Steve Capper <steve.capper at linaro.org>
++---
++ build/linux.gcc.inc | 5 ++
++ build/linux.inc | 6 ++
++ include/tbb/machine/linux_armv7.h | 177 ++++++++++++++++++++++++++++++++++++++
++ include/tbb/tbb_machine.h | 2 +
++ src/tbbmalloc/frontend.cpp | 8 +-
++ src/test/harness.h | 2 +-
++ 6 files changed, 198 insertions(+), 2 deletions(-)
++ create mode 100644 include/tbb/machine/linux_armv7.h
++
++diff --git a/build/linux.gcc.inc b/build/linux.gcc.inc
++index 8e455a8..7871fc2 100644
++--- a/build/linux.gcc.inc
+++++ b/build/linux.gcc.inc
++@@ -110,6 +110,11 @@ ifeq (sparc,$(arch))
++ LIB_LINK_FLAGS += -mcpu=v9 -m64
++ endif
++
+++# automatically generate "IT" instructions when compiling for Thumb ISA
+++ifeq (armv7,$(arch))
+++ CPLUS_FLAGS += -Wa,-mimplicit-it=thumb
+++endif
+++
++ #------------------------------------------------------------------------------
++ # Setting assembler data.
++ #------------------------------------------------------------------------------
++diff --git a/build/linux.inc b/build/linux.inc
++index a27408f..a098b57 100644
++--- a/build/linux.inc
+++++ b/build/linux.inc
++@@ -56,6 +56,9 @@ ifndef arch
++ ifeq ($(uname_m),sparc64)
++ export arch:=sparc
++ endif
+++ ifeq ($(uname_m),armv7l)
+++ export arch:=armv7
+++ endif
++ ifndef arch
++ export arch:=$(uname_m)
++ endif
++@@ -103,6 +106,9 @@ endif
++ ifeq ($(arch),sparc)
++ def_prefix = lin64
++ endif
+++ifeq ($(arch),armv7)
+++ def_prefix = lin32
+++endif
++ ifeq (,$(def_prefix))
++ ifeq (64,$(findstring 64,$(arch)))
++ def_prefix = lin64
++diff --git a/include/tbb/machine/linux_armv7.h b/include/tbb/machine/linux_armv7.h
++new file mode 100644
++index 0000000..517d419
++--- /dev/null
+++++ b/include/tbb/machine/linux_armv7.h
++@@ -0,0 +1,177 @@
+++/*
+++ Copyright 2012 ARM Limited All Rights Reserved.
+++
+++ This file is part of Threading Building Blocks.
+++
+++ Threading Building Blocks is free software; you can redistribute it
+++ and/or modify it under the terms of the GNU General Public License
+++ version 2 as published by the Free Software Foundation.
+++
+++ Threading Building Blocks is distributed in the hope that it will be
+++ useful, but WITHOUT ANY WARRANTY; without even the implied warranty
+++ of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+++ GNU General Public License for more details.
+++
+++ You should have received a copy of the GNU General Public License
+++ along with Threading Building Blocks; if not, write to the Free Software
+++ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+++
+++ As a special exception, you may use this file as part of a free software
+++ library without restriction. Specifically, if other files instantiate
+++ templates or use macros or inline functions from this file, or you compile
+++ this file and link it with other files to produce an executable, this
+++ file does not by itself cause the resulting executable to be covered by
+++ the GNU General Public License. This exception does not however
+++ invalidate any other reasons why the executable file might be covered by
+++ the GNU General Public License.
+++*/
+++
+++/*
+++ This is the TBB implementation for the ARMv7-a architecture.
+++*/
+++
+++#ifndef __TBB_machine_H
+++#error Do not include this file directly; include tbb_machine.h instead
+++#endif
+++
+++#if !(__ARM_ARCH_7A__)
+++#error Threading Building Blocks ARM port requires an ARMv7-a architecture.
+++#endif
+++
+++#include <sys/param.h>
+++#include <unistd.h>
+++
+++#define __TBB_WORDSIZE 4
+++
+++#ifndef __BYTE_ORDER__
+++ // Hopefully endianness can be validly determined at runtime.
+++ // This may silently fail in some embedded systems with page-specific endianness.
+++#elif __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
+++ #define __TBB_BIG_ENDIAN 1
+++#elif __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
+++ #define __TBB_BIG_ENDIAN 0
+++#else
+++ #define __TBB_BIG_ENDIAN -1 // not currently supported
+++#endif
+++
+++
+++#define __TBB_compiler_fence() __asm__ __volatile__("": : :"memory")
+++#define __TBB_control_consistency_helper() __TBB_compiler_fence()
+++
+++#define __TBB_armv7_inner_shareable_barrier() __asm__ __volatile__("dmb ish": : :"memory")
+++#define __TBB_acquire_consistency_helper() __TBB_armv7_inner_shareable_barrier()
+++#define __TBB_release_consistency_helper() __TBB_armv7_inner_shareable_barrier()
+++#define __TBB_full_memory_fence() __TBB_armv7_inner_shareable_barrier()
+++
+++
+++//--------------------------------------------------
+++// Compare and swap
+++//--------------------------------------------------
+++
+++/**
+++ * Atomic CAS for 32 bit values, if *ptr==comparand, then *ptr=value, returns *ptr
+++ * @param ptr pointer to value in memory to be swapped with value if *ptr==comparand
+++ * @param value value to assign *ptr to if *ptr==comparand
+++ * @param comparand value to compare with *ptr
+++ * @return value originally in memory at ptr, regardless of success
+++*/
+++static inline int32_t __TBB_machine_cmpswp4(volatile void *ptr, int32_t value, int32_t comparand )
+++{
+++ int32_t oldval, res;
+++
+++ __TBB_full_memory_fence();
+++
+++ do {
+++ __asm__ __volatile__(
+++ "ldrex %1, [%3]\n"
+++ "mov %0, #0\n"
+++ "cmp %1, %4\n"
+++ "strexeq %0, %5, [%3]\n"
+++ : "=&r" (res), "=&r" (oldval), "+Qo" (*(volatile int32_t*)ptr)
+++ : "r" ((int32_t *)ptr), "Ir" (comparand), "r" (value)
+++ : "cc");
+++ } while (res);
+++
+++ __TBB_full_memory_fence();
+++
+++ return oldval;
+++}
+++
+++/**
+++ * Atomic CAS for 64 bit values, if *ptr==comparand, then *ptr=value, returns *ptr
+++ * @param ptr pointer to value in memory to be swapped with value if *ptr==comparand
+++ * @param value value to assign *ptr to if *ptr==comparand
+++ * @param comparand value to compare with *ptr
+++ * @return value originally in memory at ptr, regardless of success
+++ */
+++static inline int64_t __TBB_machine_cmpswp8(volatile void *ptr, int64_t value, int64_t comparand )
+++{
+++ int64_t oldval;
+++ int32_t res;
+++
+++ __TBB_full_memory_fence();
+++
+++ do {
+++ __asm__ __volatile__(
+++ "mov %0, #0\n"
+++ "ldrexd %1, %H1, [%3]\n"
+++ "cmp %1, %4\n"
+++ "cmpeq %H1, %H4\n"
+++ "strexdeq %0, %5, %H5, [%3]"
+++ : "=&r" (res), "=&r" (oldval), "+Qo" (*(volatile int64_t*)ptr)
+++ : "r" ((int64_t *)ptr), "r" (comparand), "r" (value)
+++ : "cc");
+++ } while (res);
+++
+++ __TBB_full_memory_fence();
+++
+++ return oldval;
+++}
+++
+++inline void __TBB_machine_pause (int32_t delay )
+++{
+++ while(delay>0)
+++ {
+++ __TBB_compiler_fence();
+++ delay--;
+++ }
+++}
+++
+++namespace tbb {
+++namespace internal {
+++ template <typename T, size_t S>
+++ struct machine_load_store_relaxed {
+++ static inline T load ( const volatile T& location ) {
+++ const T value = location;
+++
+++ /*
+++ * An extra memory barrier is required for errata #761319
+++ * Please see http://infocenter.arm.com/help/topic/com.arm.doc.uan0004a
+++ */
+++ __TBB_armv7_inner_shareable_barrier();
+++ return value;
+++ }
+++
+++ static inline void store ( volatile T& location, T value ) {
+++ location = value;
+++ }
+++ };
+++}} // namespaces internal, tbb
+++
+++// Machine specific atomic operations
+++
+++#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4(P,V,C)
+++#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8(P,V,C)
+++#define __TBB_CompareAndSwapW(P,V,C) __TBB_machine_cmpswp4(P,V,C)
+++#define __TBB_Pause(V) __TBB_machine_pause(V)
+++
+++// Use generics for some things
+++#define __TBB_USE_GENERIC_PART_WORD_CAS 1
+++#define __TBB_USE_GENERIC_PART_WORD_FETCH_ADD 1
+++#define __TBB_USE_GENERIC_PART_WORD_FETCH_STORE 1
+++#define __TBB_USE_GENERIC_FETCH_ADD 1
+++#define __TBB_USE_GENERIC_FETCH_STORE 1
+++#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
+++#define __TBB_USE_GENERIC_DWORD_LOAD_STORE 1
+++#define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
+++
++diff --git a/include/tbb/tbb_machine.h b/include/tbb/tbb_machine.h
++index 803fcda..f12f6ba 100644
++--- a/include/tbb/tbb_machine.h
+++++ b/include/tbb/tbb_machine.h
++@@ -218,6 +218,8 @@ template<> struct atomic_selector<8> {
++ #include "machine/linux_ia64.h"
++ #elif __powerpc__
++ #include "machine/mac_ppc.h"
+++ #elif __arm__
+++ #include "machine/linux_armv7.h"
++ #elif __TBB_GCC_BUILTIN_ATOMICS_PRESENT
++ #include "machine/gcc_generic.h"
++ #endif
++diff --git a/src/tbbmalloc/frontend.cpp b/src/tbbmalloc/frontend.cpp
++index 7002e71..02c7838 100644
++--- a/src/tbbmalloc/frontend.cpp
+++++ b/src/tbbmalloc/frontend.cpp
++@@ -615,7 +615,13 @@ static inline unsigned int highestBitPos(unsigned int n)
++ # else
++ # error highestBitPos() not implemented for this platform
++ # endif
++-
+++#elif __arm__
+++ __asm__ __volatile__
+++ (
+++ "clz %0, %1\n"
+++ "rsb %0, %0, %2\n"
+++ :"=r" (pos) :"r" (n), "I" (31)
+++ );
++ #else
++ static unsigned int bsr[16] = {0/*N/A*/,6,7,7,8,8,8,8,9,9,9,9,9,9,9,9};
++ pos = bsr[ n>>6 ];
++diff --git a/src/test/harness.h b/src/test/harness.h
++index e435b39..6cff55e 100644
++--- a/src/test/harness.h
+++++ b/src/test/harness.h
++@@ -348,7 +348,7 @@ public:
++ // Therefore we set the stack size explicitly (as for TBB worker threads).
++ // TODO: make a single definition of MByte used by all tests.
++ const size_t MByte = 1024*1024;
++-#if __i386__||__i386
+++#if __i386__||__i386||__arm__
++ const size_t stack_size = 1*MByte;
++ #elif __x86_64__
++ const size_t stack_size = 2*MByte;
++--
++1.7.11.4
++
diff --cc debian/patches/tbb40_20120613oss-0003-Add-machine_fetchadd-48-intrinsics.patch
index 0000000,0000000..3446008
new file mode 100644
--- /dev/null
+++ b/debian/patches/tbb40_20120613oss-0003-Add-machine_fetchadd-48-intrinsics.patch
@@@ -1,0 -1,0 +1,160 @@@
++From 327bde31309e8ce049f427f538c30af567d3783e Mon Sep 17 00:00:00 2001
++From: Steve Capper <steve.capper at linaro.org>
++Date: Tue, 28 Aug 2012 07:20:08 -0400
++Subject: [PATCH 3/3] Add machine_fetchadd[48] intrinsics.
++
++Unfortunately ittnotify also requires its own copy of fetchadd4.
++
++Signed-off-by: Steve Capper <steve.capper at linaro.org>
++---
++ include/tbb/machine/linux_armv7.h | 49 ++++++++++++++++++++++++++++++++++--
++ src/tbb/tools_api/ittnotify.h | 2 +-
++ src/tbb/tools_api/ittnotify_config.h | 32 ++++++++++++++++++++++-
++ 3 files changed, 79 insertions(+), 4 deletions(-)
++
++diff --git a/include/tbb/machine/linux_armv7.h b/include/tbb/machine/linux_armv7.h
++index 517d419..5288236 100644
++--- a/include/tbb/machine/linux_armv7.h
+++++ b/include/tbb/machine/linux_armv7.h
++@@ -128,6 +128,53 @@ static inline int64_t __TBB_machine_cmpswp8(volatile void *ptr, int64_t value, i
++ return oldval;
++ }
++
+++static inline int32_t __TBB_machine_fetchadd4(volatile void* ptr, int32_t addend)
+++{
+++ unsigned long tmp;
+++ int32_t result, tmp2;
+++
+++ __TBB_full_memory_fence();
+++
+++ __asm__ __volatile__(
+++"1: ldrex %0, [%4]\n"
+++" add %3, %0, %5\n"
+++" strex %1, %3, [%4]\n"
+++" cmp %1, #0\n"
+++" bne 1b\n"
+++ : "=&r" (result), "=&r" (tmp), "+Qo" (*(volatile int32_t*)ptr), "=&r"(tmp2)
+++ : "r" ((int32_t *)ptr), "Ir" (addend)
+++ : "cc");
+++
+++ __TBB_full_memory_fence();
+++
+++ return result;
+++}
+++
+++static inline int64_t __TBB_machine_fetchadd8(volatile void *ptr, int64_t addend)
+++{
+++ unsigned long tmp;
+++ int64_t result, tmp2;
+++
+++ __TBB_full_memory_fence();
+++
+++ __asm__ __volatile__(
+++"1: ldrexd %0, %H0, [%4]\n"
+++" adds %3, %0, %5\n"
+++" adc %H3, %H0, %H5\n"
+++" strexd %1, %3, %H3, [%4]\n"
+++" cmp %1, #0\n"
+++" bne 1b"
+++ : "=&r" (result), "=&r" (tmp), "+Qo" (*(volatile int64_t*)ptr), "=&r"(tmp2)
+++ : "r" ((int64_t *)ptr), "r" (addend)
+++ : "cc");
+++
+++
+++ __TBB_full_memory_fence();
+++
+++ return result;
+++}
+++
+++
++ inline void __TBB_machine_pause (int32_t delay )
++ {
++ while(delay>0)
++@@ -169,9 +216,7 @@ namespace internal {
++ #define __TBB_USE_GENERIC_PART_WORD_CAS 1
++ #define __TBB_USE_GENERIC_PART_WORD_FETCH_ADD 1
++ #define __TBB_USE_GENERIC_PART_WORD_FETCH_STORE 1
++-#define __TBB_USE_GENERIC_FETCH_ADD 1
++ #define __TBB_USE_GENERIC_FETCH_STORE 1
++ #define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
++ #define __TBB_USE_GENERIC_DWORD_LOAD_STORE 1
++ #define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
++-
++diff --git a/src/tbb/tools_api/ittnotify.h b/src/tbb/tools_api/ittnotify.h
++index a3935bf..feee5c3 100644
++--- a/src/tbb/tools_api/ittnotify.h
+++++ b/src/tbb/tools_api/ittnotify.h
++@@ -152,7 +152,7 @@ The same ID may not be reused for different instances, unless a previous
++ # if ITT_PLATFORM==ITT_PLATFORM_WIN
++ # define CDECL __cdecl
++ # else /* ITT_PLATFORM==ITT_PLATFORM_WIN */
++-# if defined _M_X64 || defined _M_AMD64 || defined __x86_64__
+++# if defined _M_X64 || defined _M_AMD64 || defined __x86_64__ || defined __arm__
++ # define CDECL /* not actual on x86_64 platform */
++ # else /* _M_X64 || _M_AMD64 || __x86_64__ */
++ # define CDECL __attribute__ ((cdecl))
++diff --git a/src/tbb/tools_api/ittnotify_config.h b/src/tbb/tools_api/ittnotify_config.h
++index fe1c1c6..7f007a6 100644
++--- a/src/tbb/tools_api/ittnotify_config.h
+++++ b/src/tbb/tools_api/ittnotify_config.h
++@@ -86,7 +86,7 @@
++ # if ITT_PLATFORM==ITT_PLATFORM_WIN
++ # define CDECL __cdecl
++ # else /* ITT_PLATFORM==ITT_PLATFORM_WIN */
++-# if defined _M_X64 || defined _M_AMD64 || defined __x86_64__
+++# if defined _M_X64 || defined _M_AMD64 || defined __x86_64__ || defined __arm__
++ # define CDECL /* not actual on x86_64 platform */
++ # else /* _M_X64 || _M_AMD64 || __x86_64__ */
++ # define CDECL __attribute__ ((cdecl))
++@@ -144,11 +144,17 @@
++ # define ITT_ARCH_IA64 3
++ #endif /* ITT_ARCH_IA64 */
++
+++#ifndef ITT_ARCH_ARM
+++# define ITT_ARCH_ARM 4
+++#endif /* ITT_ARCH_ARM */
+++
++ #ifndef ITT_ARCH
++ # if defined _M_X64 || defined _M_AMD64 || defined __x86_64__
++ # define ITT_ARCH ITT_ARCH_IA32E
++ # elif defined _M_IA64 || defined __ia64
++ # define ITT_ARCH ITT_ARCH_IA64
+++# elif defined __arm__
+++# define ITT_ARCH ITT_ARCH_ARM
++ # else
++ # define ITT_ARCH ITT_ARCH_IA32
++ # endif
++@@ -258,6 +264,30 @@ INLINE int __itt_interlocked_increment(volatile long* ptr)
++ #else /* __INTEL_COMPILER */
++ /* TODO: Add Support for not Intel compilers for IA64 */
++ #endif /* __INTEL_COMPILER */
+++#elif ITT_ARCH==ITT_ARCH_ARM
+++#define __TBB_armv7_inner_shareable_barrier() __asm__ __volatile__("dmb ish": : :"memory")
+++#define __TBB_full_memory_fence() __TBB_armv7_inner_shareable_barrier()
+++INLINE int32_t __TBB_machine_fetchadd4(volatile void* ptr, int32_t addend)
+++{
+++ unsigned long tmp;
+++ int32_t result, tmp2;
+++
+++ __TBB_full_memory_fence();
+++
+++ __asm__ __volatile__(
+++"1: ldrex %0, [%4]\n"
+++" add %3, %0, %5\n"
+++" strex %1, %3, [%4]\n"
+++" cmp %1, #0\n"
+++" bne 1b\n"
+++ : "=&r" (result), "=&r" (tmp), "+Qo" (*(volatile int32_t*)ptr), "=&r"(tmp2)
+++ : "r" ((int32_t *)ptr), "Ir" (addend)
+++ : "cc");
+++
+++ __TBB_full_memory_fence();
+++
+++ return result;
+++}
++ #else /* ITT_ARCH!=ITT_ARCH_IA64 */
++ INLINE int __TBB_machine_fetchadd4(volatile void* ptr, long addend)
++ {
++--
++1.7.11.4
++
--
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