[Gnuk-users] [PATCH] Add board config for "Blue Pill"

[Paul Fertser]

This adds a board config for the cheapest (currently $2.24) STM32F103
board widely available from numerous shops.

The D+ pullup is permanently attached but can be safely overriden by
pulling PA12 (D+) low in GPIO mode.

The chip officially has only 64KB of flash but all the reports so far
indicate that it has 128KB, all properly working with a suitable
OpenOCD config directive:

flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME

USB and LED operation runtime-tested with Gnuk.
---
 board/board-blue-pill.h | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 board/board-blue-pill.h

diff --git a/board/board-blue-pill.h b/board/board-blue-pill.h
new file mode 100644
index 0000000..a7dab87
--- /dev/null
+++ b/board/board-blue-pill.h
@@ -0,0 +1,36 @@
+#define BOARD_NAME "Blue Pill"
+/* http://wiki.stm32duino.com/index.php?title=Blue_Pill */
+/* echo -n "Blue Pill" | shasum -a 256 | sed -e 's/^.*\(........\)  -$/\1/' */
+#define BOARD_ID    0xa1099d43
+
+#define STM32F10X_MD		/* Medium-density device */
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              9
+#define STM32_HSECLK                    8000000
+
+#define GPIO_LED_BASE   GPIOC_BASE
+#define GPIO_LED_CLEAR_TO_EMIT		13
+#define GPIO_USB_BASE   GPIOA_BASE
+#define GPIO_USB_SET_TO_ENABLE          12
+#undef  GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ * PC13 - Push pull output 50MHz (LED 1:ON 0:OFF)
+ * ------------------------ Default
+ * PAx  - input with pull-up
+ * PCx  - input with pull-up
+ */
+#define VAL_GPIO_USB_ODR            0xFFFFE7FF
+#define VAL_GPIO_USB_CRL            0x88888888      /*  PA7...PA0 */
+#define VAL_GPIO_USB_CRH            0x88811888      /* PA15...PA8 */
+
+#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_CRL            0x88888888      /*  PC7...PC0 */
+#define VAL_GPIO_LED_CRH            0x88388888      /* PC15...PC8 */
+
+#define RCC_ENR_IOP_EN      (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPCEN)
+#define RCC_RSTR_IOP_RST    (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPCRST)
-- 
2.7.3