r911 - trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches

Sven Luther luther@haydn.debian.org
Sun, 18 Jul 2004 11:39:30 -0600


Author: luther
Date: 2004-07-18 11:39:27 -0600 (Sun, 18 Jul 2004)
New Revision: 911

Added:
   trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/powerpc-g4-errata.dpatch
   trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/powerpc-pegasos.dpatch
Removed:
   trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/pegasos.dpatch
Modified:
   trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/00list-4
Log:
Added powerpc g4 errata fic dpatch.


Modified: trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/00list-4
===================================================================
--- trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/00list-4	2004-07-16 16:16:59 UTC (rev 910)
+++ trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/00list-4	2004-07-18 17:39:27 UTC (rev 911)
@@ -43,4 +43,5 @@
 marvell-mm
 marvell-pegasos
 netfilter-signedcharbug
-pegasos
+powerpc-pegasos
+powerpc-g4-errata

Deleted: trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/pegasos.dpatch
===================================================================
--- trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/pegasos.dpatch	2004-07-16 16:16:59 UTC (rev 910)
+++ trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/pegasos.dpatch	2004-07-18 17:39:27 UTC (rev 911)
@@ -1,266 +0,0 @@
-#! /bin/sh -e 
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Description: Add Pegasos 1 and 2 support.
-## DP: Patch author: Sven Luther <luther@debian.org>
-## DP: Upstream status: submitted and approved.
-
-. $(dirname $0)/DPATCH
-
-@DPATCH@
-diff -ur kernel-source-2.6.7.orig/arch/ppc/platforms/chrp_pci.c kernel-source-2.6.7.peg2/arch/ppc/platforms/chrp_pci.c
---- kernel-source-2.6.7.orig/arch/ppc/platforms/chrp_pci.c	2004-06-16 07:20:26.000000000 +0200
-+++ kernel-source-2.6.7.peg2/arch/ppc/platforms/chrp_pci.c	2004-06-29 18:10:43.000000000 +0200
-@@ -97,8 +97,9 @@
- rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
- 		 int len, u32 *val)
- {
-+	struct pci_controller *hose = bus->sysdata;
- 	unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
--		| ((bus->number & 0xff) << 16);
-+		| (((bus->number - hose->first_busno) & 0xff) << 16) | (pci_domain_nr(bus) << 24);
-         unsigned long ret = ~0UL;
- 	int rval;
- 
-@@ -111,8 +112,9 @@
- rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
- 		  int len, u32 val)
- {
-+	struct pci_controller *hose = bus->sysdata;
- 	unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
--		| ((bus->number & 0xff) << 16);
-+		| (((bus->number - hose->first_busno) & 0xff) << 16) | (pci_domain_nr(bus) << 24);
- 	int rval;
- 
- 	rval = call_rtas("write-pci-config", 3, 1, NULL, addr, len, val);
-@@ -186,6 +188,26 @@
- 	iounmap(reg);
- }
- 
-+/* Marvell Discovery II based Pegasos 2 */
-+//#define PEGASOS_USE_PCI_DOMAINS
-+
-+static void __init
-+setup_peg2(struct pci_controller *hose, struct device_node *dev)
-+{
-+	struct device_node *root = find_path_device("/");
-+	struct device_node *rtas;
-+
-+	rtas = of_find_node_by_name (root, "rtas");
-+	if (rtas) {
-+		hose->ops = &rtas_pci_ops;
-+	} else {
-+		printk ("RTAS supporting Pegasos OF not found, please upgrade your firmware\n");
-+	}
-+#ifndef PEGASOS_USE_PCI_DOMAINS
-+	pci_assign_all_busses = 1;
-+#endif
-+}
-+
- void __init
- chrp_find_bridges(void)
- {
-@@ -195,7 +217,7 @@
- 	struct pci_controller *hose;
- 	unsigned int *dma;
- 	char *model, *machine;
--	int is_longtrail = 0, is_mot = 0;
-+	int is_longtrail = 0, is_mot = 0, is_pegasos = 0;
- 	struct device_node *root = find_path_device("/");
- 
- 	/*
-@@ -207,6 +229,8 @@
- 	if (machine != NULL) {
- 		is_longtrail = strncmp(machine, "IBM,LongTrail", 13) == 0;
- 		is_mot = strncmp(machine, "MOT", 3) == 0;
-+		if (strncmp(machine, "Pegasos2", 8) == 0) is_pegasos = 2;
-+		else if (strncmp(machine, "Pegasos", 7) == 0) is_pegasos = 1;
- 	}
- 	for (dev = root->child; dev != NULL; dev = dev->sibling) {
- 		if (dev->type == NULL || strcmp(dev->type, "pci") != 0)
-@@ -257,6 +281,10 @@
- 			hose->cfg_data = (unsigned char *)
- 				ioremap(GG2_PCI_CONFIG_BASE, 0x80000);
- 			gg2_pci_config_base = (unsigned long) hose->cfg_data;
-+		} else if (is_pegasos == 1) {
-+			setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc);
-+		} else if (is_pegasos == 2) {
-+			setup_peg2(hose, dev);
- 		} else {
- 			printk("No methods for %s (model %s), using RTAS\n",
- 			       dev->full_name, model);
-@@ -274,6 +302,9 @@
- 			printk("pci_dram_offset = %lx\n", pci_dram_offset);
- 		}
- 	}
--
--	ppc_md.pcibios_fixup = chrp_pcibios_fixup;
-+	
-+	if (is_pegasos)
-+		ppc_md.pcibios_fixup = NULL;
-+	else
-+		ppc_md.pcibios_fixup = chrp_pcibios_fixup;
- }
-diff -ur kernel-source-2.6.7.orig/arch/ppc/platforms/chrp_setup.c kernel-source-2.6.7.peg2/arch/ppc/platforms/chrp_setup.c
---- kernel-source-2.6.7.orig/arch/ppc/platforms/chrp_setup.c	2004-06-16 07:19:52.000000000 +0200
-+++ kernel-source-2.6.7.peg2/arch/ppc/platforms/chrp_setup.c	2004-06-29 18:10:44.000000000 +0200
-@@ -214,6 +214,37 @@
- 	}
- }
- 
-+void pegasos_set_l2cr(void)
-+{
-+	struct device_node *root = find_path_device("/");
-+	char *machine;
-+	struct device_node *np;
-+	int l2cr_value;
-+
-+	/* On Pegasos, enable the l2 cache if needed, as the OF forgets it */
-+	if (root == NULL)
-+		return;
-+	machine = get_property(root, "model", NULL);
-+	if (machine == NULL)
-+		return;
-+	if (strncmp(machine, "Pegasos", 7) == 0) {
-+		/* Enable L2 cache if needed */
-+		np = find_type_devices("cpu");
-+		if (np != NULL) {
-+			unsigned int *l2cr = (unsigned int *)
-+				get_property (np, "l2cr", NULL);
-+			if (l2cr == NULL) {
-+				printk ("Pegasos l2cr : no cpu l2cr property found\n");
-+				return;
-+			}
-+			if (!((*l2cr) & 0x80000000)) {
-+				printk ("Pegasos l2cr : L2 cache was not active, activating\n");
-+				_set_L2CR(0);
-+				_set_L2CR((*l2cr) | 0x80000000);
-+			}
-+		}
-+	}
-+}
- 
- void __init
- chrp_setup_arch(void)
-@@ -236,6 +267,9 @@
- 	/* Lookup PCI host bridges */
- 	chrp_find_bridges();
- 
-+	/* On pegasos, enable the L2 cache if not already done by OF */
-+	pegasos_set_l2cr();
-+
- #ifndef CONFIG_PPC64BRIDGE
- 	/*
- 	 *  Temporary fixes for PCI devices.
-@@ -387,6 +421,8 @@
- #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
- 	struct device_node *kbd;
- #endif
-+	struct device_node *root = find_path_device ("/");
-+	char *machine;
- 
- 	for (np = find_devices("pci"); np != NULL; np = np->next) {
- 		unsigned int *addrp = (unsigned int *)
-@@ -400,16 +436,20 @@
- 	if (np == NULL)
- 		printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n");
- 
--	chrp_find_openpic();
--
--	prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS);
--	OpenPIC_InitSenses = init_senses;
--	OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
--
--	openpic_init(NUM_8259_INTERRUPTS);
--	/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
--	openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
-+	/* Pegasos doesn't have openpic */
-+	machine = get_property(root, "model", NULL);
-+	if (strncmp(machine, "Pegasos", 7) != 0) {
-+		chrp_find_openpic();
-+
-+		prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS);
-+		OpenPIC_InitSenses = init_senses;
-+		OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
-+
-+		openpic_init(NUM_8259_INTERRUPTS);
-+		/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
-+		openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
- 			       i8259_irq);
-+	}
- 
- 	for (i = 0; i < NUM_8259_INTERRUPTS; i++)
- 		irq_desc[i].handler = &i8259_pic;
-@@ -450,6 +490,8 @@
- chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
- 	  unsigned long r6, unsigned long r7)
- {
-+	struct device_node *root = find_path_device ("/");
-+	char *machine;
- #ifdef CONFIG_BLK_DEV_INITRD
- 	/* take care of initrd if we have one */
- 	if ( r6 )
-@@ -469,7 +511,11 @@
- 	ppc_md.show_cpuinfo   = chrp_show_cpuinfo;
- 	ppc_md.irq_canonicalize = chrp_irq_canonicalize;
- 	ppc_md.init_IRQ       = chrp_init_IRQ;
--	ppc_md.get_irq        = openpic_get_irq;
-+	machine = get_property(root, "model", NULL);
-+	if (strncmp(machine, "Pegasos", 7) == 0)
-+		ppc_md.get_irq        = i8259_irq;
-+	else
-+		ppc_md.get_irq        = openpic_get_irq;
- 
- 	ppc_md.init           = chrp_init2;
- 
-diff -ur kernel-source-2.6.7.orig/arch/ppc/platforms/chrp_time.c kernel-source-2.6.7.peg2/arch/ppc/platforms/chrp_time.c
---- kernel-source-2.6.7.orig/arch/ppc/platforms/chrp_time.c	2004-06-16 07:18:57.000000000 +0200
-+++ kernel-source-2.6.7.peg2/arch/ppc/platforms/chrp_time.c	2004-06-29 18:10:44.000000000 +0200
-@@ -41,6 +41,8 @@
- 	int base;
- 
- 	rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
-+	if (rtcs == NULL)
-+		rtcs = find_compatible_devices("rtc", "ds1385-rtc");
- 	if (rtcs == NULL || rtcs->addrs == NULL)
- 		return 0;
- 	base = rtcs->addrs[0].address;
-diff -ur kernel-source-2.6.7.orig/arch/ppc/syslib/prom_init.c kernel-source-2.6.7.peg2/arch/ppc/syslib/prom_init.c
---- kernel-source-2.6.7.orig/arch/ppc/syslib/prom_init.c	2004-06-16 07:20:24.000000000 +0200
-+++ kernel-source-2.6.7.peg2/arch/ppc/syslib/prom_init.c	2004-06-30 07:51:49.975232432 +0200
-@@ -794,6 +794,9 @@
- 	char *p, *d;
-  	unsigned long phys;
- 	void *result[3];
-+	char model[32];
-+	phandle node;
-+	int rc;
- 
-  	/* Default */
-  	phys = (unsigned long) &_stext;
-@@ -850,11 +853,20 @@
- 
- 	klimit = (char *) (mem - offset);
- 
--	/* If we are already running at 0xc0000000, we assume we were
--	 * loaded by an OF bootloader which did set a BAT for us.
--	 * This breaks OF translate so we force phys to be 0.
--	 */
--	if (offset == 0) {
-+	node = call_prom("finddevice", 1, 1, "/");
-+	rc = call_prom("getprop", 4, 1, node, "model", model, sizeof(model));
-+	if (rc > 0 && !strncmp (model, "Pegasos", 7)
-+		&& strncmp (model, "Pegasos2", 8)) {
-+		/* Pegasos 1 has a broken translate method in the OF,
-+		 * and furthermore the BATs are mapped 1:1 so the phys
-+		 * address calculated above is correct, so let's use
-+		 * it directly.
-+		 */
-+	} else if (offset == 0) {
-+		/* If we are already running at 0xc0000000, we assume we were
-+	 	* loaded by an OF bootloader which did set a BAT for us.
-+	 	* This breaks OF translate so we force phys to be 0.
-+	 	*/
- 		prom_print("(already at 0xc0000000) phys=0\n");
- 		phys = 0;
- 	} else if ((int) call_prom("getprop", 4, 1, prom_chosen, "mmu",

Added: trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/powerpc-g4-errata.dpatch
===================================================================
--- trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/powerpc-g4-errata.dpatch	2004-07-16 16:16:59 UTC (rev 910)
+++ trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/powerpc-g4-errata.dpatch	2004-07-18 17:39:27 UTC (rev 911)
@@ -0,0 +1,152 @@
+#! /bin/sh -e 
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Description: G4 errata fix.
+## DP: Patch author: Benjamin Herrenschmidt <benh@kernel.crashing.org> 
+## DP: Upstream status: benh is checking with paulus, and it will be submitted.
+
+. $(dirname $0)/DPATCH
+
+@DPATCH@
+===== arch/ppc/kernel/cpu_setup_6xx.S 1.4 vs edited =====
+--- 1.4/arch/ppc/kernel/cpu_setup_6xx.S	2004-02-04 23:24:33 -05:00
++++ edited/arch/ppc/kernel/cpu_setup_6xx.S	2004-07-15 12:16:53 -04:00
+@@ -218,7 +218,10 @@
+ 
+ 	/* All of the bits we have to set.....
+ 	 */
+-	ori	r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE | HID0_BTIC | HID0_LRSTK
++	ori	r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE | HID0_LRSTK
++BEGIN_FTR_SECTION
++	ori	r11,r11,HID0_BTIC
++END_FTR_SECTION_IFCLR(CPU_FTR_NO_BTIC)
+ BEGIN_FTR_SECTION
+ 	oris	r11,r11,HID0_DPM@h	/* enable dynamic power mgmt */
+ END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)
+===== arch/ppc/kernel/cputable.c 1.23 vs edited =====
+--- 1.23/arch/ppc/kernel/cputable.c	2004-06-18 02:41:08 -04:00
++++ edited/arch/ppc/kernel/cputable.c	2004-07-15 18:36:12 -04:00
+@@ -55,7 +56,8 @@
+ #endif
+ 
+ /* We need to mark all pages as being coherent if we're SMP or we
+- * have a 754x and an MPC107 host bridge. */
++ * have a 754x and an MPC107 host bridge.
++ */
+ #if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE)
+ #define CPU_FTR_COMMON                  CPU_FTR_NEED_COHERENT
+ #else
+@@ -263,7 +265,7 @@
+ 	CPU_FTR_COMMON |
+     	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+ 	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+-	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450,
++	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NEED_COHERENT,
+ 	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+ 	32, 32,
+ 	__setup_cpu_745x
+@@ -274,7 +276,7 @@
+     	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
+ 	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+ 	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+-	CPU_FTR_L3_DISABLE_NAP,
++	CPU_FTR_L3_DISABLE_NAP | CPU_FTR_NEED_COHERENT,
+ 	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+ 	32, 32,
+ 	__setup_cpu_745x
+@@ -284,7 +286,8 @@
+ 	CPU_FTR_COMMON |
+     	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
+ 	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+-	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR,
++	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
++	CPU_FTR_NEED_COHERENT,
+ 	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+ 	32, 32,
+ 	__setup_cpu_745x
+@@ -294,7 +297,8 @@
+ 	CPU_FTR_COMMON |
+     	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+ 	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+-	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS,
++	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS |
++	CPU_FTR_NEED_COHERENT,
+ 	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+ 	32, 32,
+ 	__setup_cpu_745x
+@@ -305,7 +309,7 @@
+     	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
+ 	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+ 	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+-	CPU_FTR_L3_DISABLE_NAP | CPU_FTR_HAS_HIGH_BATS,
++	CPU_FTR_L3_DISABLE_NAP | CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
+ 	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+ 	32, 32,
+ 	__setup_cpu_745x
+@@ -316,18 +320,40 @@
+     	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
+ 	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+ 	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+-	CPU_FTR_HAS_HIGH_BATS,
++	CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
++	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
++	32, 32,
++	__setup_cpu_745x
++    },
++    {	/* 7447/7457 Rev 1.0 */
++    	0xffffffff, 0x80020100, "7447/7457",
++	CPU_FTR_COMMON |
++    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
++	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
++	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
++	CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
++	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
++	32, 32,
++	__setup_cpu_745x
++    },
++    {	/* 7447/7457 Rev 1.1 */
++    	0xffffffff, 0x80020101, "7447/7457",
++	CPU_FTR_COMMON |
++    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
++	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
++	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
++	CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
+ 	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+ 	32, 32,
+ 	__setup_cpu_745x
+     },
+-    {	/* 7457 */
+-    	0xffff0000, 0x80020000, "7457",
++    {	/* 7447/7457 Rev 1.2 and later */
++    	0xffff0000, 0x80020000, "7447/7457",
+ 	CPU_FTR_COMMON |
+     	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
+ 	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+ 	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+-	CPU_FTR_HAS_HIGH_BATS,
++	CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
+ 	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+ 	32, 32,
+ 	__setup_cpu_745x
+@@ -338,7 +364,7 @@
+     	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
+ 	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
+ 	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+-	CPU_FTR_HAS_HIGH_BATS,
++	CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
+ 	COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+ 	32, 32,
+ 	__setup_cpu_745x
+===== include/asm-ppc/cputable.h 1.8 vs edited =====
+--- 1.8/include/asm-ppc/cputable.h	2004-04-01 10:16:57 -05:00
++++ edited/include/asm-ppc/cputable.h	2004-07-15 12:15:03 -04:00
+@@ -76,6 +76,7 @@
+ #define CPU_FTR_NO_DPM			0x00008000
+ #define CPU_FTR_HAS_HIGH_BATS		0x00010000
+ #define CPU_FTR_NEED_COHERENT           0x00020000
++#define CPU_FTR_NO_BTIC			0x00040000
+ 
+ #ifdef __ASSEMBLY__
+ 
+
+

Copied: trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/powerpc-pegasos.dpatch (from rev 910, trunk/kernel/source/kernel-source-2.6.7-2.6.7/debian/patches/pegasos.dpatch)