r3749 - in trunk/kernel/mips: . kernel-patch-2.6.12-mips-2.6.12/debian kernel-patch-2.6.12-mips-2.6.12/debian/config/mips kernel-patch-2.6.12-mips-2.6.12/debian/control.in kernel-patch-2.6.12-mips-2.6.12/debian/patches
Thiemo Seufer
ths-guest at costa.debian.org
Mon Aug 8 18:06:21 UTC 2005
Author: ths-guest
Date: 2005-08-08 18:03:31 +0000 (Mon, 08 Aug 2005)
New Revision: 3749
Added:
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/Makefile
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/abiversion
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r10k-ip30
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r10k-ip30
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/header-flavour-hook
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/header-generic-hook
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/image-hook
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/12_makefile.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/20_ioc3.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/21_ip30.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/sourceversion
Removed:
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/20_addrspace-64bit.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/21_nptl.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/53_ip22-zilogtimeout.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/56_p2-matrox.dpatch
Modified:
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/changelog
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r10k-ip27
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r4k-ip22
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r5k-ip32
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/sb1-swarm-bn
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r10k-ip27
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r3k-kn02
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r4k-ip22
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r4k-kn04
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-cobalt
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-ip32
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-lasat
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/sb1-swarm-bn
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/stub
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/xxs1500
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/flavours.mips
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/00_linux-mips.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/00list
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/10_arch-makefile.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/40_ip27-horribles.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/51_iomap.dpatch
trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/rules
Log:
Mips 2.6.12.
Copied: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12 (from rev 3479, trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11)
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/Makefile
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/Makefile 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/Makefile 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,106 @@
+#
+# This Makefile is run from the debian subdirectory.
+#
+# Copyright (C) 2005 Thiemo Seufer
+#
+
+#
+# Mips tools rules.
+#
+MT_CFLAGS := -W -Wall -g -pipe
+ifneq (,$(findstring noopt,$(DEB_BUILD_OPTIONS)))
+ MT_CFLAGS += -O0
+else
+ MT_CFLAGS += -O2
+endif
+
+MT_INSTALL := install -m 755 -o root -g root
+ifeq (,$(findstring nostrip,$(DEB_BUILD_OPTIONS)))
+ MT_INSTALL += -s
+endif
+
+build-mips-tools: bdir = $(CURDIR)/build-mips-tools
+build-mips-tools: ../stamps/build-mips-tools
+../stamps/build-mips-tools:
+ @rm -rf $(bdir)
+ @cp -al $(kdir) $(bdir)
+
+ @echo "Building mips tools"
+ @cd $(bdir) && make-kpkg clean && make-kpkg debian
+ @cd $(bdir)/arch/mips/boot \
+ && $(CC) $(MT_CFLAGS) -o elf2ecoff elf2ecoff.c
+
+ @touch $@
+
+install-mips-tools: build-mips-tools
+ $(MT_INSTALL) -D $(kdir)/arch/mips/boot/elf2ecoff debian/$(mtdir)/usr/bin/elf2ecoff
+
+clean-mips-tools:
+ rm -rf build-mips-tools
+
+.PHONY: build-mips-tools install-mips-tools clean-mips-tools
+
+#
+# Generic mips header package rules.
+#
+build-generic-headers: bdir = $(CURDIR)/build-generic-headers
+build-generic-headers: ../stamps/build-generic-headers
+../stamps/build-generic-headers:
+ @rm -rf $(bdir)
+ @cp -al $(kdir) $(bdir)
+
+ @echo "Building common headers"
+ @cd $(bdir) && make-kpkg clean && make-kpkg debian
+ # Random config to satisfy make-kpkg
+ @cp config/$(debarch)/$(shell ls config/$(debarch) |head -1) $(bdir)/.config
+ @cp -p changelog control copyright post-install $(bdir)/debian/
+ @echo official > $(bdir)/debian/official
+ @cd $(bdir) && HEADER_CLEAN_HOOK='$(CURDIR)/header-generic-hook' \
+ bdir=$(bdir) \
+ make-kpkg \
+ --append-to-version=-$(abiver) \
+ --stem linux kernel_headers
+
+ @touch $@
+
+install-generic-headers:
+
+clean-generic-headers:
+ rm -f ../stamps/build-generic-headers
+ rm -rf build-generic-headers
+
+.PHONY: install-generic-headers clean-generic-headers
+
+#
+# Per-flavour rules.
+#
+build-flavour: bdir = $(CURDIR)/build-flavour-$(flavour)
+build-flavour: ../stamps/build-flavour-$(flavour)
+../stamps/build-flavour-$(flavour):
+ @rm -rf $(bdir)
+ @cp -al $(kdir) $(bdir)
+
+ @echo "Building image and headers for $(flavour)"
+ @cd $(bdir) && make-kpkg clean && make-kpkg debian
+ @cp config/$(debarch)/$(flavour) $(bdir)/.config
+ @cp -p changelog control copyright post-install $(bdir)/debian/
+ @echo official > $(bdir)/debian/official
+ @cd $(bdir) && CONCURRENCY_LEVEL=$(NUM_CPUS) \
+ IMAGE_CLEAN_HOOK='$(CURDIR)/image-hook' \
+ HEADER_CLEAN_HOOK='$(CURDIR)/header-flavour-hook' \
+ bdir=$(bdir) \
+ make-kpkg \
+ --subarch $(flavour) \
+ --append-to-version=-$(abiver)-$(flavour) \
+ --stem linux --initrd binary-arch
+
+ touch $@
+
+
+install-flavour:
+
+clean-flavour:
+ rm -f ../stamps/build-flavour-$(flavour)
+ rm -rf build-flavour-$(flavour)
+
+.PHONY: build-flavour install-flavour clean-flavour
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/abiversion
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/abiversion 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/abiversion 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1 @@
+1
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/changelog
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/changelog 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/changelog 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,5 +1,5 @@
-kernel-patch-2.6.11-mips (2.6.11-1-0) UNRELEASED; urgency=low
+linux-patch-2.6.12-mips (2.6.12-0) UNRELEASED; urgency=low
* Initial mips/mipsel 2.6 kernel.
- -- Thiemo Seufer <ths at debian.org> Mon, 04 Apr 2005 19:20:07 +0200
+ -- Thiemo Seufer <ths at debian.org> Tue, 12 Jul 2005 19:39:46 +0200
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r10k-ip27
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/config/mips/r10k-ip27 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r10k-ip27 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11
-# Tue Apr 5 01:23:31 2005
+# Linux kernel version: 2.6.12
+# Wed Jul 13 16:22:47 2005
#
CONFIG_MIPS=y
@@ -13,6 +13,7 @@
CONFIG_BROKEN=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
@@ -25,14 +26,17 @@
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
CONFIG_AUDIT=y
-CONFIG_LOG_BUF_SHIFT=15
CONFIG_HOTPLUG=y
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
+CONFIG_CPUSETS=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -42,6 +46,7 @@
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
#
# Loadable module support
@@ -91,11 +96,11 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
CONFIG_SGI_IP27=y
+# CONFIG_SGI_IP30 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SIBYTE_SENTOSA is not set
@@ -130,8 +135,8 @@
#
# CPU selection
#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
@@ -178,6 +183,7 @@
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_LEGACY_PROC=y
CONFIG_PCI_NAMES=y
+CONFIG_SGI_IOC3=y
CONFIG_MMU=y
#
@@ -186,10 +192,6 @@
# CONFIG_PCCARD is not set
#
-# PC-card bridges
-#
-
-#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
@@ -311,13 +313,10 @@
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
@@ -328,6 +327,7 @@
CONFIG_SCSI_QLOGIC_ISP=y
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_DEBUG is not set
@@ -350,6 +350,8 @@
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
+CONFIG_DM_MULTIPATH=m
+CONFIG_DM_MULTIPATH_EMC=m
#
# Fusion MPT device support
@@ -376,7 +378,6 @@
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
@@ -480,7 +481,7 @@
CONFIG_IP_NF_ARP_MANGLE=m
#
-# IPv6: Netfilter Configuration
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
#
CONFIG_IP6_NF_QUEUE=m
CONFIG_IP6_NF_IPTABLES=m
@@ -549,6 +550,7 @@
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
@@ -559,6 +561,12 @@
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
@@ -576,7 +584,6 @@
CONFIG_BONDING=m
CONFIG_EQUALIZER=m
CONFIG_TUN=m
-CONFIG_ETHERTAP=m
#
# ARCnet devices
@@ -612,6 +619,8 @@
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
#
# Ethernet (10000 Mbit)
@@ -667,31 +676,23 @@
# CONFIG_INPUT is not set
#
-# Userland interfaces
+# Hardware I/O ports
#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
CONFIG_SERIO=y
+CONFIG_SERIO_SGI_IOC3=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_LIBPS2 is not set
CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
#
-# Input Device Drivers
-#
-
-#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_SGI_IOC3_UART=y
#
# Serial drivers
@@ -699,18 +700,14 @@
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@@ -751,6 +748,11 @@
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
@@ -787,15 +789,11 @@
#
# USB support
#
-# CONFIG_USB is not set
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
-
-#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
@@ -1010,7 +1008,9 @@
#
# Kernel hacking
#
+# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=15
# CONFIG_CROSSCOMPILE is not set
CONFIG_CMDLINE=""
@@ -1032,6 +1032,7 @@
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r10k-ip30
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/config/mips/r10k-ip30 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r10k-ip30 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,1083 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.12
+# Sat Aug 6 07:29:19 2005
+#
+CONFIG_MIPS=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_CLEAN_COMPILE is not set
+CONFIG_BROKEN=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_CPUSETS is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_KMOD=y
+CONFIG_STOP_MACHINE=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_PB1550 is not set
+# CONFIG_MIPS_PB1200 is not set
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_DB1550 is not set
+# CONFIG_MIPS_DB1200 is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+CONFIG_SGI_IP30=y
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_PTSWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_ARC=y
+CONFIG_DMA_IP30=y
+CONFIG_CPU_BIG_ENDIAN=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=7
+CONFIG_ARC_MEMORY=y
+CONFIG_ARC_PROMLIB=y
+CONFIG_ARC64=y
+CONFIG_BOOT_ELF64=y
+CONFIG_QL_ISP_A64=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+CONFIG_CPU_R10000=y
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
+
+#
+# Kernel type
+#
+# CONFIG_MIPS32 is not set
+CONFIG_MIPS64=y
+CONFIG_64BIT=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+# CONFIG_PREEMPT is not set
+# CONFIG_MIPS_INSANE_LARGE is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+# CONFIG_PCI_DEBUG is not set
+CONFIG_SGI_IOC3=y
+CONFIG_MMU=y
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PCI Hotplug Support
+#
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_BUILD_ELF64=y
+CONFIG_MIPS32_COMPAT=y
+CONFIG_COMPAT=y
+CONFIG_MIPS32_O32=y
+CONFIG_MIPS32_N32=y
+CONFIG_BINFMT_ELF32=y
+# CONFIG_SECCOMP is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+# CONFIG_DEBUG_DRIVER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+
+#
+# SCSI Transport Attributes
+#
+CONFIG_SCSI_SPI_ATTRS=y
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+CONFIG_SCSI_QLOGIC_1280=y
+CONFIG_SCSI_QLOGIC_1280_1040=y
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=y
+CONFIG_MD_RAID1=y
+# CONFIG_MD_RAID10 is not set
+CONFIG_MD_RAID5=y
+CONFIG_MD_RAID6=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_FAULTY=m
+CONFIG_BLK_DEV_DM=m
+CONFIG_DM_CRYPT=m
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_ZERO=m
+# CONFIG_DM_MULTIPATH is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+CONFIG_NET_SCHED=y
+# CONFIG_NET_SCH_CLK_JIFFIES is not set
+CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
+# CONFIG_NET_SCH_CLK_CPU is not set
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_QOS=y
+CONFIG_NET_ESTIMATOR=y
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_CLS_POLICE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_SGI_IOC3_ETH=y
+CONFIG_SGI_IOC3_ETH_HW_RX_CSUM=y
+CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SGI_IOC3=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_SGI_IOC3_UART=y
+CONFIG_SGI_IP30_LEDS=y
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_RTC is not set
+CONFIG_SGI_IP30_RTC=y
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+CONFIG_FB=y
+# CONFIG_FB_CFB_FILLRECT is not set
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+CONFIG_FB_SOFT_CURSOR=y
+# CONFIG_FB_MACMODES is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+CONFIG_FB_IMPACTSR=y
+CONFIG_FB_ODYSSEY=y
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON_OLD is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_SMIVGX is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_E1356 is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+CONFIG_LOGO_SGI_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_SEQUENCER=y
+CONFIG_SND_SEQ_DUMMY=y
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_SEQUENCER_OSS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_VIRMIDI is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_YMFPCI is not set
+# CONFIG_SND_ALS4000 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_HDA_INTEL is not set
+CONFIG_SND_RAD1=y
+
+#
+# ALSA MIPS devices
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+CONFIG_JBD_DEBUG=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+
+#
+# XFS support
+#
+CONFIG_XFS_FS=m
+CONFIG_XFS_EXPORT=y
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_SECURITY is not set
+CONFIG_XFS_POSIX_ACL=y
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=m
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS_XATTR=y
+# CONFIG_DEVPTS_FS_SECURITY is not set
+CONFIG_TMPFS=y
+CONFIG_TMPFS_XATTR=y
+# CONFIG_TMPFS_SECURITY is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ASFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_LOG_BUF_SHIFT=15
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_CROSSCOMPILE is not set
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_KGDB is not set
+# CONFIG_RUNTIME_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=y
+CONFIG_CRYPTO_TGR192=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_SERPENT=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_CAST5=y
+CONFIG_CRYPTO_CAST6=y
+CONFIG_CRYPTO_TEA=y
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_KHAZAD=y
+CONFIG_CRYPTO_ANUBIS=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r4k-ip22
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/config/mips/r4k-ip22 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r4k-ip22 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11
-# Tue Apr 5 00:45:31 2005
+# Linux kernel version: 2.6.12-1
+# Wed Jul 13 16:13:31 2005
#
CONFIG_MIPS=y
@@ -12,6 +12,7 @@
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
@@ -24,7 +25,6 @@
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
CONFIG_AUDIT=y
-CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
@@ -32,6 +32,9 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_BASE_FULL is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +44,7 @@
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
#
# Loadable module support
@@ -89,11 +93,11 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
CONFIG_SGI_IP22=y
# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP30 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SIBYTE_SENTOSA is not set
@@ -125,8 +129,8 @@
#
# CPU selection
#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
@@ -179,11 +183,6 @@
# CONFIG_PCCARD is not set
#
-# PC-card bridges
-#
-CONFIG_PCMCIA_PROBE=y
-
-#
# PCI Hotplug Support
#
@@ -221,7 +220,7 @@
#
CONFIG_PARPORT=m
# CONFIG_PARPORT_PC is not set
-# CONFIG_PARPORT_OTHER is not set
+# CONFIG_PARPORT_GSC is not set
CONFIG_PARPORT_1284=y
#
@@ -233,7 +232,6 @@
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=m
@@ -295,20 +293,15 @@
# SCSI low-level drivers
#
CONFIG_SGIWD93_SCSI=y
-# CONFIG_SCSI_7000FASST is not set
-# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DTC3280 is not set
-# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
# CONFIG_SCSI_PPA is not set
@@ -320,7 +313,6 @@
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_T128 is not set
-# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set
#
@@ -346,6 +338,7 @@
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
+# CONFIG_DM_MULTIPATH is not set
#
# Fusion MPT device support
@@ -370,7 +363,6 @@
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
@@ -474,7 +466,7 @@
CONFIG_IP_NF_ARP_MANGLE=y
#
-# IPv6: Netfilter Configuration
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
#
CONFIG_IP6_NF_QUEUE=m
CONFIG_IP6_NF_IPTABLES=m
@@ -543,6 +535,7 @@
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
@@ -553,6 +546,12 @@
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
@@ -570,7 +569,6 @@
CONFIG_BONDING=m
CONFIG_EQUALIZER=m
CONFIG_TUN=m
-CONFIG_ETHERTAP=m
#
# ARCnet devices
@@ -583,7 +581,6 @@
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
@@ -666,19 +663,6 @@
# CONFIG_INPUT_EVBUG is not set
#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PARKBD is not set
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SERIO_RAW=y
-
-#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
@@ -699,6 +683,17 @@
# CONFIG_INPUT_MISC is not set
#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PARKBD is not set
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
+
+#
# Character devices
#
CONFIG_VT=y
@@ -763,6 +758,10 @@
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
+
+#
# I2C support
#
CONFIG_I2C=m
@@ -797,7 +796,9 @@
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM75 is not set
@@ -808,6 +809,7 @@
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
@@ -819,6 +821,7 @@
#
# Other I2C Chip support
#
+# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCF8591 is not set
@@ -915,13 +918,10 @@
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
-CONFIG_SND_HWDEP=m
-CONFIG_SND_RAWMIDI=m
# CONFIG_SND_SEQUENCER is not set
CONFIG_SND_OSSEMUL=y
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
-CONFIG_SND_BIT32_EMUL=m
CONFIG_SND_RTCTIMER=m
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
@@ -987,10 +987,6 @@
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
-
-#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
@@ -1207,7 +1203,9 @@
#
# Kernel hacking
#
+# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CROSSCOMPILE is not set
CONFIG_CMDLINE=""
@@ -1229,6 +1227,7 @@
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r5k-ip32
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/config/mips/r5k-ip32 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/r5k-ip32 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11
-# Tue Apr 5 01:20:19 2005
+# Linux kernel version: 2.6.12
+# Wed Jul 13 16:20:07 2005
#
CONFIG_MIPS=y
@@ -12,6 +12,7 @@
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
@@ -24,7 +25,6 @@
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
CONFIG_AUDIT=y
-CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
@@ -32,6 +32,9 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -41,6 +44,7 @@
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
#
# Loadable module support
@@ -89,11 +93,11 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP30 is not set
CONFIG_SGI_IP32=y
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SIBYTE_SENTOSA is not set
@@ -125,8 +129,8 @@
#
# CPU selection
#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
@@ -171,6 +175,7 @@
CONFIG_PCI=y
CONFIG_PCI_LEGACY_PROC=y
CONFIG_PCI_NAMES=y
+# CONFIG_SGI_IOC3 is not set
CONFIG_MMU=y
#
@@ -179,10 +184,6 @@
# CONFIG_PCCARD is not set
#
-# PC-card bridges
-#
-
-#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
@@ -216,8 +217,8 @@
#
CONFIG_MTD=m
# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_PARTITIONS is not set
-# CONFIG_MTD_CONCAT is not set
#
# User Modules And Translation Layers
@@ -281,7 +282,7 @@
#
CONFIG_PARPORT=y
# CONFIG_PARPORT_PC is not set
-# CONFIG_PARPORT_OTHER is not set
+# CONFIG_PARPORT_GSC is not set
CONFIG_PARPORT_1284=y
#
@@ -373,13 +374,10 @@
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
@@ -392,6 +390,7 @@
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_DEBUG is not set
@@ -414,6 +413,7 @@
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
+# CONFIG_DM_MULTIPATH is not set
#
# Fusion MPT device support
@@ -440,7 +440,6 @@
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
@@ -544,7 +543,7 @@
CONFIG_IP_NF_ARP_MANGLE=m
#
-# IPv6: Netfilter Configuration
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
#
CONFIG_IP6_NF_QUEUE=m
CONFIG_IP6_NF_IPTABLES=m
@@ -613,6 +612,7 @@
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
@@ -623,6 +623,12 @@
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
@@ -640,7 +646,6 @@
# CONFIG_BONDING is not set
CONFIG_EQUALIZER=m
CONFIG_TUN=m
-CONFIG_ETHERTAP=m
#
# ARCnet devices
@@ -674,6 +679,8 @@
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
#
# Ethernet (10000 Mbit)
@@ -742,21 +749,6 @@
# CONFIG_INPUT_EVBUG is not set
#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PARKBD is not set
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_MACEPS2=y
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SERIO_RAW=m
-
-#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
@@ -774,6 +766,19 @@
# CONFIG_INPUT_MISC is not set
#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PARKBD is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_MACEPS2=y
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
+
+#
# Character devices
#
CONFIG_VT=y
@@ -794,6 +799,7 @@
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@@ -837,6 +843,11 @@
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
CONFIG_I2C=m
@@ -860,6 +871,7 @@
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_ISA is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT is not set
@@ -887,7 +899,9 @@
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM75 is not set
@@ -898,9 +912,11 @@
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SIS5595 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_VIA686A is not set
# CONFIG_SENSORS_W83781D is not set
@@ -910,6 +926,7 @@
#
# Other I2C Chip support
#
+# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCF8591 is not set
@@ -942,6 +959,11 @@
# Graphics support
#
CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+CONFIG_FB_SOFT_CURSOR=y
+# CONFIG_FB_MACMODES is not set
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_TILEBLITTING=y
# CONFIG_FB_CIRRUS is not set
@@ -951,6 +973,7 @@
# CONFIG_FB_IMSTT is not set
CONFIG_FB_GBE=y
CONFIG_FB_GBE_MEM=4
+# CONFIG_FB_NVIDIA is not set
# CONFIG_FB_RIVA is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_RADEON_OLD is not set
@@ -963,9 +986,11 @@
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_SMIVGX is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_PM3 is not set
# CONFIG_FB_E1356 is not set
+# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
#
@@ -1006,7 +1031,6 @@
# CONFIG_SND_SEQUENCER is not set
# CONFIG_SND_MIXER_OSS is not set
# CONFIG_SND_PCM_OSS is not set
-# CONFIG_SND_BIT32_EMUL is not set
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
@@ -1059,6 +1083,7 @@
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
# CONFIG_SND_VX222 is not set
+# CONFIG_SND_HDA_INTEL is not set
#
# ALSA MIPS devices
@@ -1094,15 +1119,11 @@
#
# USB support
#
-# CONFIG_USB is not set
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
-
-#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
@@ -1321,7 +1342,9 @@
#
# Kernel hacking
#
+# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CROSSCOMPILE is not set
CONFIG_CMDLINE=""
@@ -1343,6 +1366,7 @@
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/sb1-swarm-bn
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/config/mips/sb1-swarm-bn 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/config/mips/sb1-swarm-bn 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11
-# Tue Apr 5 01:30:19 2005
+# Linux kernel version: 2.6.12
+# Wed Jul 13 16:26:48 2005
#
CONFIG_MIPS=y
@@ -13,6 +13,7 @@
CONFIG_BROKEN=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
@@ -25,14 +26,17 @@
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
CONFIG_AUDIT=y
-CONFIG_LOG_BUF_SHIFT=15
CONFIG_HOTPLUG=y
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
+# CONFIG_CPUSETS is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -42,6 +46,7 @@
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
#
# Loadable module support
@@ -91,11 +96,11 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP30 is not set
# CONFIG_SGI_IP32 is not set
CONFIG_SIBYTE_SWARM=y
# CONFIG_SIBYTE_SENTOSA is not set
@@ -138,8 +143,8 @@
#
# CPU selection
#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
@@ -187,6 +192,7 @@
CONFIG_PCI=y
CONFIG_PCI_LEGACY_PROC=y
CONFIG_PCI_NAMES=y
+# CONFIG_SGI_IOC3 is not set
CONFIG_MMU=y
#
@@ -395,6 +401,7 @@
CONFIG_MEGARAID_NEWGEN=y
CONFIG_MEGARAID_MM=m
CONFIG_MEGARAID_MAILBOX=m
+CONFIG_MEGARAID_LEGACY=m
CONFIG_SCSI_SATA=y
CONFIG_SCSI_SATA_AHCI=m
CONFIG_SCSI_SATA_SVW=m
@@ -408,17 +415,10 @@
CONFIG_SCSI_SATA_ULI=m
CONFIG_SCSI_SATA_VIA=m
CONFIG_SCSI_SATA_VITESSE=m
-CONFIG_SCSI_BUSLOGIC=m
-# CONFIG_SCSI_OMIT_FLASHPOINT is not set
# CONFIG_SCSI_CPQFCTS is not set
CONFIG_SCSI_DMX3191D=m
-CONFIG_SCSI_EATA=m
-CONFIG_SCSI_EATA_TAGGED_QUEUE=y
-CONFIG_SCSI_EATA_LINKED_COMMANDS=y
-CONFIG_SCSI_EATA_MAX_TAGS=16
CONFIG_SCSI_EATA_PIO=m
CONFIG_SCSI_FUTURE_DOMAIN=m
-CONFIG_SCSI_GDTH=m
# CONFIG_SCSI_IPS is not set
CONFIG_SCSI_INITIO=m
CONFIG_SCSI_INIA100=m
@@ -435,6 +435,7 @@
CONFIG_SCSI_QLOGIC_FC_FIRMWARE=y
CONFIG_SCSI_QLOGIC_1280=m
CONFIG_SCSI_QLOGIC_1280_1040=y
+CONFIG_SCSI_LPFC=m
# CONFIG_SCSI_DC395x is not set
CONFIG_SCSI_DC390T=m
# CONFIG_SCSI_DEBUG is not set
@@ -464,6 +465,7 @@
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
+# CONFIG_DM_MULTIPATH is not set
#
# Fusion MPT device support
@@ -490,7 +492,6 @@
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=m
CONFIG_UNIX=y
CONFIG_NET_KEY=m
CONFIG_INET=y
@@ -593,7 +594,7 @@
CONFIG_IP_NF_ARP_MANGLE=m
#
-# IPv6: Netfilter Configuration
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
#
CONFIG_IP6_NF_QUEUE=m
CONFIG_IP6_NF_IPTABLES=m
@@ -662,6 +663,7 @@
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
@@ -672,6 +674,12 @@
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+CONFIG_NET_EMATCH_CMP=m
+CONFIG_NET_EMATCH_NBYTE=m
+CONFIG_NET_EMATCH_U32=m
+CONFIG_NET_EMATCH_META=m
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
@@ -689,7 +697,6 @@
CONFIG_BONDING=m
CONFIG_EQUALIZER=m
CONFIG_TUN=m
-CONFIG_ETHERTAP=m
#
# ARCnet devices
@@ -730,7 +737,6 @@
# CONFIG_FORCEDETH is not set
CONFIG_EEPRO100=m
CONFIG_E100=m
-CONFIG_E100_NAPI=y
CONFIG_FEALNX=m
CONFIG_NATSEMI=m
CONFIG_NE2K_PCI=m
@@ -762,6 +768,8 @@
CONFIG_NET_SB1250_MAC=y
CONFIG_SK98LIN=m
CONFIG_VIA_VELOCITY=m
+CONFIG_TIGON3=m
+CONFIG_BNX2=m
#
# Ethernet (10000 Mbit)
@@ -837,19 +845,6 @@
# CONFIG_INPUT_EVBUG is not set
#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_LIBPS2 is not set
-CONFIG_SERIO_RAW=m
-
-#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
@@ -867,6 +862,17 @@
# CONFIG_INPUT_MISC is not set
#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
+
+#
# Character devices
#
CONFIG_VT=y
@@ -884,6 +890,8 @@
#
# Non-8250 serial port support
#
+CONFIG_SERIAL_CORE=m
+CONFIG_SERIAL_JSM=m
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@@ -933,6 +941,11 @@
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
CONFIG_I2C=m
@@ -956,6 +969,7 @@
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_ISA is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
@@ -983,7 +997,9 @@
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM75 is not set
@@ -994,9 +1010,11 @@
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SIS5595 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_VIA686A is not set
# CONFIG_SENSORS_W83781D is not set
@@ -1006,6 +1024,7 @@
#
# Other I2C Chip support
#
+# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCF8591 is not set
@@ -1069,6 +1088,11 @@
# Graphics support
#
CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=m
+CONFIG_FB_CFB_COPYAREA=m
+CONFIG_FB_CFB_IMAGEBLIT=m
+CONFIG_FB_SOFT_CURSOR=m
+# CONFIG_FB_MACMODES is not set
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_TILEBLITTING=y
CONFIG_FB_CIRRUS=m
@@ -1077,6 +1101,8 @@
CONFIG_FB_CYBER2000=m
# CONFIG_FB_ASILIANT is not set
# CONFIG_FB_IMSTT is not set
+CONFIG_FB_NVIDIA=m
+CONFIG_FB_NVIDIA_I2C=y
CONFIG_FB_RIVA=m
CONFIG_FB_RIVA_I2C=y
# CONFIG_FB_RIVA_DEBUG is not set
@@ -1098,18 +1124,20 @@
CONFIG_FB_ATY_XL_INIT=y
CONFIG_FB_ATY_GX=y
CONFIG_FB_SAVAGE=m
-CONFIG_FB_SAVAGE_I2C=m
-CONFIG_FB_SAVAGE_ACCEL=m
+CONFIG_FB_SAVAGE_I2C=y
+CONFIG_FB_SAVAGE_ACCEL=y
# CONFIG_FB_SIS is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
CONFIG_FB_3DFX=m
CONFIG_FB_3DFX_ACCEL=y
CONFIG_FB_VOODOO1=m
+CONFIG_FB_SMIVGX=m
CONFIG_FB_TRIDENT=m
CONFIG_FB_TRIDENT_ACCEL=y
# CONFIG_FB_PM3 is not set
# CONFIG_FB_E1356 is not set
+CONFIG_FB_S1D13XXX=m
# CONFIG_FB_VIRTUAL is not set
#
@@ -1148,13 +1176,10 @@
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
-CONFIG_SND_HWDEP=m
-CONFIG_SND_RAWMIDI=m
# CONFIG_SND_SEQUENCER is not set
CONFIG_SND_OSSEMUL=y
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
-CONFIG_SND_BIT32_EMUL=m
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
@@ -1207,6 +1232,7 @@
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
# CONFIG_SND_VX222 is not set
+# CONFIG_SND_HDA_INTEL is not set
#
# ALSA MIPS devices
@@ -1252,6 +1278,8 @@
#
# USB support
#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB=m
# CONFIG_USB_DEBUG is not set
@@ -1262,8 +1290,6 @@
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Host Controller Drivers
@@ -1289,12 +1315,11 @@
#
CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set
-CONFIG_USB_STORAGE_RW_DETECT=y
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_ISD200=y
CONFIG_USB_STORAGE_DPCM=y
-CONFIG_USB_STORAGE_HP8200e=y
+CONFIG_USB_STORAGE_USBAT=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_STORAGE_JUMPSHOT=y
@@ -1329,7 +1354,6 @@
#
CONFIG_USB_MDC800=m
CONFIG_USB_MICROTEK=m
-CONFIG_USB_HPUSBSCSI=m
#
# USB Multimedia devices
@@ -1342,6 +1366,7 @@
CONFIG_USB_SE401=m
CONFIG_USB_SN9C102=m
CONFIG_USB_STV680=m
+CONFIG_USB_PWC=m
#
# USB Network Adapters
@@ -1375,6 +1400,7 @@
# USB Network Adapters
#
CONFIG_USB_AX8817X=y
+CONFIG_USB_MON=m
#
# USB port drivers
@@ -1385,9 +1411,11 @@
#
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_AIRPRIME=m
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+CONFIG_USB_SERIAL_CP2101=m
# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
@@ -1402,6 +1430,7 @@
# CONFIG_USB_SERIAL_KOBIL_SCT is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
+CONFIG_USB_SERIAL_HP4X=m
# CONFIG_USB_SERIAL_SAFE is not set
# CONFIG_USB_SERIAL_TI is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
@@ -1411,7 +1440,6 @@
#
# USB Miscellaneous drivers
#
-# CONFIG_USB_EMI26 is not set
CONFIG_USB_AUERSWALD=m
CONFIG_USB_RIO500=m
CONFIG_USB_LEGOTOWER=m
@@ -1421,6 +1449,7 @@
CONFIG_USB_PHIDGETKIT=m
CONFIG_USB_PHIDGETSERVO=m
CONFIG_USB_IDMOUSE=m
+CONFIG_USB_SISUSBVGA=m
CONFIG_USB_TEST=m
#
@@ -1630,7 +1659,9 @@
#
# Kernel hacking
#
+# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=15
# CONFIG_CROSSCOMPILE is not set
CONFIG_CMDLINE=""
# CONFIG_SB1XXX_CORELIS is not set
@@ -1653,6 +1684,7 @@
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r10k-ip27
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/r10k-ip27 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r10k-ip27 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,12 +1,24 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-r10k-ip27
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on SGI Origin
+ This package provides the header files for Linux kernel @kernver@ on
+ SGI Origin 200/2000 machines, generally used for building out-of-tree
+ kernel modules. These files are going to be installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mips
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@
-Description: Linux kernel image for @@KERNVER@@-r10k-ip27
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
- .
- This version is for the SGI Origin with R1X000 processors.
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@, arcboot (>= 0.3.8.4)
+Description: Linux kernel @kernver@ image on SGI Origin
+ This package provides the binary image and pre-built loadable modules of
+ Linux kernel @kernver@ for SGI Origin 200/2000 machines.
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r10k-ip30
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/r10k-ip30 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r10k-ip30 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,24 @@
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on SGI Octane
+ This package provides the header files for Linux kernel @kernver@ on
+ SGI Octane1/Octane2 machines, generally used for building out-of-tree
+ kernel modules. These files are going to be installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: base
+Priority: optional
+Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@, arcboot (>= 0.3.8.4)
+Description: Linux kernel @kernver@ image on SGI Octane
+ This package provides the binary image and pre-built loadable modules of
+ Linux kernel @kernver@ for SGI Octane1/Octane2 machines.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r3k-kn02
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/r3k-kn02 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r3k-kn02 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,14 +1,26 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-r3k-kn02
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on DECstation with R3000 CPU
+ This package provides the header files for Linux kernel @kernver@ on
+ Digital DECstation 5000/20, 5000/25, 5000/33, 5000/125, and 5000/240
+ machines, generally used for building out-of-tree kernel modules.
+ These files are going to be installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mipsel
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@, delo
-Description: Linux kernel image for @@KERNVER@@-r3k-kn02
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
- .
- This version is for R3000 based DECstations with KN02 (or compatible)
- mainboard, such as the DECstation 5000/1xx series with xx=20,25,33
- and the DECstation 5000/240.
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@, delo (>= 0.9)
+Description: Linux kernel @kernver@ image on DECstation with R3000 CPU
+ This package provides the binary image and pre-built loadable modules
+ of Linux kernel @kernver@ for Digital DECstation 5000/20, 5000/25,
+ 5000/33, 5000/125, and 5000/240 machines.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r4k-ip22
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/r4k-ip22 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r4k-ip22 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,12 +1,28 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-r4k-ip22
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on SGI Indy/Indigo2
+ This package provides the header files for Linux kernel @kernver@ on
+ SGI Indy and Indigo2 machines with R4x00/R5000 CPUs, generally used for
+ building out-of-tree kernel modules. These files are going to be
+ installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mips
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@, arcboot (>=0.3.1)
-Description: Linux kernel image for @@KERNVER@@-r4k-ip22
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@, arcboot (>= 0.3.8.4)
+Description: Linux kernel @kernver@ image on SGI Indy/Indigo2
+ This package provides the binary image and pre-built loadable modules
+ of Linux kernel @kernver@ for SGI Indy and Indigo2 machines with
+ R4x00/R5000 CPUs.
.
- This version is for the SGI Indy and Indigo2.
+ The Indigo2 with R8000/R10000 is not yet supported.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r4k-kn04
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/r4k-kn04 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r4k-kn04 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,14 +1,26 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-r4k-kn04
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on DECstation with R4x00 CPU
+ This package provides the header files for Linux kernel @kernver@ on
+ Digital DECstation 5000/50, 5000/150, and 5000/260 machines, generally
+ used for building out-of-tree kernel modules. These files are going to
+ be installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mipsel
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@, delo
-Description: Linux kernel image for @@KERNVER@@-r4k-kn04
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
- .
- This version is for R4X00 based DECstations with KN04 (or compatible)
- mainboard, such as the DECstation 5000/150, the Personal DECstation
- 5000/50 and the DECstation 5000/260.
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@, delo (>= 0.9)
+Description: Linux kernel @kernver@ image on DECstation with R4x00 CPU
+ This package provides the binary image and pre-built loadable modules of
+ Linux kernel @kernver@ for Digital DECstation 5000/50, 5000/150, and
+ 5000/260 machines.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-cobalt
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/r5k-cobalt 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-cobalt 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,13 +1,24 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-r5k-cobalt
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on Cobalt
+ This package provides the header files for Linux kernel @kernver@ on
+ Cobalt Qube1/RaQ1/Qube2/RaQ2 machines, generally used for building
+ out-of-tree kernel modules. These files are going to be installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mipsel
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@, colo
-Description: Linux kernel image for @@KERNVER@@-r5k-cobalt
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
- .
- This version is for MIPS based Cobalt machines (such as the Qube,
- RaQ, Qube2 and RaQ2).
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@, colo
+Description: Linux kernel @kernver@ image on Cobalt
+ This package provides the binary image and pre-built loadable modules of
+ Linux kernel @kernver@ for Cobalt Qube1/RaQ1/Qube2/RaQ2 machines.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-ip32
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/r5k-ip32 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-ip32 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,12 +1,27 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-r5k-ip32
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on SGI O2 with R5x00 CPU
+ This package provides the header files for Linux kernel @kernver@ on
+ SGI O2 machines with R5000/R5200/RM7000 CPUs, generally used for
+ building out-of-tree kernel modules. These files are going to be
+ installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mips
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@, arcboot (>=0.3.8)
-Description: Linux kernel image for @@KERNVER@@-r5k-ip32
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@, arcboot (>= 0.3.8.4)
+Description: Linux kernel @kernver@ image on SGI O2 with R5x00 CPU
+ This package provides the binary image and pre-built loadable modules of
+ Linux kernel @kernver@ for SGI O2 machines with R5000/R5200/RM7000 CPUs.
.
- This version is for the SGI O2 with R5000/R5200/RM7000 processors.
+ The SGI O2 with R10000/R12000 CPUs are not yet supported.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-lasat
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/r5k-lasat 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/r5k-lasat 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,12 +1,24 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-r5k-lasat
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on LASAT
+ This package provides the header files for Linux kernel @kernver@ on
+ LASAT Masqerade Pro machines, generally used for building out-of-tree
+ kernel modules. These files are going to be installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mipsel
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@
-Description: Linux kernel image for @@KERNVER@@-r5k-lasat
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
- .
- This version is for R5000 processors on the Lasat Masquerade Pro.
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@
+Description: Linux kernel @kernver@ image on LASAT
+ This package provides the binary image and pre-built loadable modules of
+ Linux kernel @kernver@ for LASAT Masqerade Pro.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/sb1-swarm-bn
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/sb1-swarm-bn 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/sb1-swarm-bn 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,13 +1,25 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-sb1-swarm-bn
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on SWARM
+ This package provides the header files for Linux kernel @kernver@ on
+ SWARM machines, generally used for building out-of-tree kernel
+ modules. These files are going to be installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mips mipsel
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@, sibyl
-Description: Linux kernel image for @@KERNVER@@-sb1-swarm-bn
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
- .
- This version is for the Broadcom BCM91250A (aka SWARM), pass 2.2 and
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@, sibyl
+Description: Linux kernel @kernver@ image on SWARM
+ This package provides the binary image and pre-built loadable modules of
+ Linux kernel @kernver@ for Broadcom BCM91250A (aka SWARM), pass 2.2 and
later.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/stub
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/stub 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/stub 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,23 +1,33 @@
-Source: kernel-patch-@@KERNVER@@-mips
+Source: linux-patch- at kernver@-mips
Section: devel
Priority: optional
-Build-Depends: kernel-source-@@KERNVER@@ (>=@@KERNVER@@-2), kernel-package, debhelper (>=4.1.0), module-init-tools, dpatch, bzip2
+Build-Depends: linux-source- at kernver@ (= @sourcever@), kernel-package (>= 9.000), debhelper (>= 4.1.0), module-init-tools, dpatch, bzip2
Maintainer: Debian kernel team <debian-kernel at lists.debian.org>
Uploaders: Thiemo Seufer <ths at debian.org>
Standards-Version: 3.6.1
-Package: kernel-headers-@@KERNVER@@-@@ABIVER@@
-Architecture: mips mipsel
+Package: linux-headers- at kernver@- at abiver@
+Architecture: @arch@
Section: devel
Priority: optional
-Depends: coreutils, kernel-kbuild-2.6-3
-Provides: kernel-headers, kernel-headers-2.6
-Description: Header files related to Linux kernel version @@KERNVER@@
- This package provides kernel header files for version @@KERNVER@@, for
- sites that want the latest kernel headers. Please read
- /usr/share/doc/kernel-headers-@@KERNVER@@-@@ABIVER@@/debian.README.gz
- for details.
+Depends: coreutils
+Description: Common header files for @arch@ Linux kernel @kernver@
+ This package provides the @arch at -specific kernel header files for
+ Linux kernel @kernver@ common to all kernel flavours. It is only
+ useful in combination with at least one flavour-specific headers
+ package.
+Package: linux-headers- at kernver@- at abiver@- at arch@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: @flavour-headers@
+Description: All header files for @arch@ Linux kernel @kernver@
+ This package installs the @arch at -specific kernel header files for
+ Linux kernel @kernver@ for all flavours. It is mainly useful as a
+ build dependency to build module for all flavors of an architecture,
+ without having to maintain a list with each flavor.
+
Package: mips-tools
Architecture: any
Depends: ${shlibs:Depends}
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/xxs1500
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/control.in/xxs1500 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/control.in/xxs1500 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,12 +1,24 @@
-Package: kernel-image-@@KERNVER@@-@@ABIVER@@-xxs1500
+Package: linux-headers- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
+Section: devel
+Priority: optional
+Depends: coreutils, linux-headers- at kernver@- at abiver@
+Provides: linux-headers, linux-headers- at major@
+Description: Header files for Linux kernel @kernver@ on xxs1500
+ This package provides the header files for Linux kernel @kernver@ on
+ the MyCable xxs1500, generally used for building out-of-tree kernel
+ modules. These files are going to be installed into
+ /usr/src/linux-headers- at kernver@- at abiver@- at flavour@,
+ and can be used to build modules for the kernel provided by the
+ linux-image- at kernver@- at abiver@- at flavour@ package.
+
+Package: linux-image- at kernver@- at abiver@- at flavour@
+Architecture: @arch@
Section: base
-Architecture: mipsel
Priority: optional
-Provides: kernel-image, kernel-image-2.6
Depends: initrd-tools (>= 0.1.76), coreutils, module-init-tools
-Suggests: kernel-doc-@@KERNVER@@
-Description: Linux kernel image for @@KERNVER@@-xxs1500
- This package contains the Linux/MIPS kernel image, the System.map
- file, and the modules built by the package.
- .
- This version is for the Au1500 based XXS1500 board.
+Provides: linux-image, linux-image- at major@, linux-image- at flavour@, linux-image- at major@- at flavour@
+Suggests: linux-doc- at kernver@
+Description: Linux kernel @kernver@ image on xxs1500
+ This package provides the binary image and pre-built loadable modules of
+ Linux kernel @kernver@ for the Au1500 based MyCable xxs1500.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/flavours.mips
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/flavours.mips 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/flavours.mips 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,5 +1,6 @@
# Kernel flavours we build for mips
r4k-ip22
r10k-ip27
+r10k-ip30
r5k-ip32
sb1-swarm-bn
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/header-flavour-hook
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/header-flavour-hook 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/header-flavour-hook 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,56 @@
+#!/bin/sh
+#
+# This is the hook which runs when make-kpkg is invoked to create the
+# flavour-dependent kernel-headers packages.
+#
+set -e
+
+version=$kernver-$abiver
+
+rm_ln ()
+{
+ _tdir=$1
+ _dirdepth=$2
+
+ while [ ${#} -ge 3 ]; do
+ _file=${3#./*}
+ rm -r $_file
+ ln -s --target-directory=${_tdir} ${_dirdepth}/linux-headers-$version/$_file
+ shift
+ done
+}
+
+# Replace flavour-independent makefiles with symlinks to the generic
+# linux-headers package.
+rm_ln . .. Makefile \
+ $(set -e; find . -mindepth 1 -maxdepth 1 \
+ ! -type d \
+ -o -path './include' -o -path './scripts' \
+ -prune -o -print)
+
+# Replace flavour-independent headers with symlinks to the generic
+# linux-headers package.
+find . -mindepth 2 -maxdepth 2 \
+ -path './include/asm-mips' \
+ -o -path './include/asm' \
+ -o -path './include/linux' \
+ -o -path './include/config' -prune \
+ -o -path './include/*' \
+ -exec rm -r '{}' \+
+
+rm_ln include/asm-mips ../../.. \
+ $(set -e; find . -mindepth 3 -maxdepth 3 \
+ -path './include/asm-mips/offset.h' -prune \
+ -o -path './include/asm-mips/*' -print)
+
+rm_ln include/linux ../../.. \
+ $(set -e; find . -mindepth 3 -maxdepth 3 \
+ -path './include/linux/autoconf.h' \
+ -o -path './include/linux/compile.h' \
+ -o -path './include/linux/version.h' -prune \
+ -o -path './include/linux/*' -print)
+
+echo "$abiver-$flavour" > .extraversion
+
+mkdir -p ../../../lib/modules/$version
+(set -e; cd ../../../lib/modules/$version && ln -s /usr/src/linux-headers-$version build)
Property changes on: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/header-flavour-hook
___________________________________________________________________
Name: svn:executable
+ *
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/header-generic-hook
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/header-generic-hook 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/header-generic-hook 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,25 @@
+#!/bin/sh
+#
+# This is the hook which runs when make-kpkg is invoked to create the
+# flavour-independent kernel-headers package.
+#
+set -e
+
+# Remove unneeded include/asm-* directories.
+find . -mindepth 2 -maxdepth 2 \
+ -path './include/asm-generic' -o -path './include/asm-mips' -prune \
+ -o -path './include/asm-*' -exec rm -r '{}' \+
+
+find . -mindepth 2 -maxdepth 2 \
+ -path './arch/mips' -prune \
+ -o -path './arch/*' -exec rm -r '{}' \+
+
+# Remove flavour-specific configuration.
+rm -r .config include/config include/asm include/asm-mips/offset.h
+# include/linux/autoconf.h \
+# include/linux/compile.h \
+# include/linux/version.h
+
+# The scripts/ directory should be supplied for each flavour, since some
+# archs do some *very* strange things...
+rm -rf scripts
Property changes on: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/header-generic-hook
___________________________________________________________________
Name: svn:executable
+ *
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/image-hook
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/image-hook 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/image-hook 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,35 @@
+#!/bin/sh
+#
+# This is the hook which runs when make-kpkg is invoked to create the
+# kernel-image packages.
+#
+set -e
+
+version=$kernver-$abiver-$flavour
+
+#
+# Check whether we should force any modules to be available
+# on the initrd.
+#
+#cd ${IMAGE_TOP}/lib/modules/${version}
+#modules='@initrd_modules@'
+#if [ -n "${modules}" ]; then
+# mkdir initrd
+# for i in ${modules}; do
+# if [ -f "${i}" ]; then
+# ln "${i}" initrd
+# fi
+# done
+#fi
+
+# Execute any extra post-install command provided by the arch/subarch/flavour
+#if [ '@extra_postinstall_command@' ]; then
+# @extra_postinstall_command@
+#fi
+
+#
+# Clean up the source symlink
+#
+if [ -L lib/modules/$version/source ]; then
+ rm -f lib/modules/$version/source
+fi
Property changes on: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/image-hook
___________________________________________________________________
Name: svn:executable
+ *
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/00_linux-mips.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/00_linux-mips.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/00_linux-mips.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -2,8 +2,8 @@
## 00_linux-mips.dpatch by Thiemo Seufer <ths at debian.org>
##
## All lines beginning with `## DP:' are a description of the patch.
-## DP: Diff between kernel.org 2.6.12-rc1 and linux-mips.org, CVS HEAD,
-## DP: taken at 2005-04-02.
+## DP: Diff between kernel.org 2.6.12 and linux-mips.org, CVS HEAD,
+## DP: taken at 2005-07-10.
if [ $# -lt 1 ]; then
echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
@@ -23,33 +23,10 @@
exit 0
-diff -urpNX dontdiff linux-2.6.11.6/Makefile linux_HEAD/Makefile
---- linux-2.6.11.6/Makefile 2005-04-02 23:39:51.000000000 +0200
-+++ linux_HEAD/Makefile 2005-03-21 20:03:31.000000000 +0100
-@@ -167,9 +167,7 @@ KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$
- # then ARCH is assigned, getting whatever value it gets normally, and
- # SUBARCH is subsequently ignored.
-
--SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
-- -e s/arm.*/arm/ -e s/sa110/arm/ \
-- -e s/s390x/s390/ -e s/parisc64/parisc/ )
-+SUBARCH := mips
-
- # Cross compiling and selecting different set of gcc/bin-utils
- # ---------------------------------------------------------------------------
-@@ -532,7 +530,7 @@ endif
- include $(srctree)/arch/$(ARCH)/Makefile
-
- # warn about C99 declaration after statement
--CFLAGS += $(call cc-option,-Wdeclaration-after-statement,)
-+#CFLAGS += $(call cc-option,-Wdeclaration-after-statement,)
-
- # disable pointer signedness warnings in gcc 4.0
- CFLAGS += $(call cc-option,-Wno-pointer-sign,)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/Kconfig linux_HEAD/arch/mips/Kconfig
---- linux-2.6.11.6/arch/mips/Kconfig 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/Kconfig 2005-03-21 20:03:43.000000000 +0100
-@@ -4,180 +4,130 @@ config MIPS
+diff -urpNX dontdiff linux-2.6.12/arch/mips/Kconfig linux_HEAD/arch/mips/Kconfig
+--- linux-2.6.12/arch/mips/Kconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/Kconfig 2005-07-10 12:16:37.000000000 +0200
+@@ -4,176 +4,131 @@ config MIPS
# Horrible source of confusion. Die, die, die ...
select EMBEDDED
@@ -214,10 +191,6 @@
- Please refer to <http://www.tanbac.co.jp/> about VR4131DIMM.
+ select SYS_SUPPORTS_LITTLE_ENDIAN
--config TANBAC_TB0219
-- bool "Added TANBAC TB0219 Base board support"
-- depends on TANBAC_TB0229
--
-config VICTOR_MPC30X
- bool "Support for Victor MP-C303/304"
+config MIPS_DB1100
@@ -239,6 +212,7 @@
select HW_HAS_PCI
- select IRQ_CPU
+ select MIPS_DISABLE_OBSOLETE_IDE
++ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_LITTLE_ENDIAN
-config PCI_VR41XX
@@ -309,7 +283,7 @@
This enables support for DEC's MIPS based workstations. For details
see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
DECstation porting pages on <http://decstation.unix-ag.org/>.
-@@ -194,6 +148,9 @@ config MIPS_EV64120
+@@ -194,6 +149,9 @@ config MIPS_EV64120
select DMA_NONCOHERENT
select HW_HAS_PCI
select MIPS_GT64120
@@ -319,7 +293,7 @@
help
This is an evaluation board based on the Galileo GT-64120
single-chip system controller that contains a MIPS R5000 compatible
-@@ -201,10 +158,6 @@ config MIPS_EV64120
+@@ -201,10 +159,6 @@ config MIPS_EV64120
<http://www.marvell.com/>. Say Y here if you wish to build a
kernel for this platform.
@@ -330,7 +304,7 @@
config MIPS_EV96100
bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
depends on EXPERIMENTAL
-@@ -214,6 +167,9 @@ config MIPS_EV96100
+@@ -214,6 +168,9 @@ config MIPS_EV96100
select MIPS_GT96100
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
@@ -340,7 +314,7 @@
help
This is an evaluation board based on the Galileo GT-96100 LAN/WAN
communications controllers containing a MIPS R5000 compatible core
-@@ -224,6 +180,10 @@ config MIPS_IVR
+@@ -224,6 +181,10 @@ config MIPS_IVR
bool "Support for Globespan IVR board"
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -351,7 +325,7 @@
help
This is an evaluation board built by Globespan to showcase thir
iVR (Internet Video Recorder) design. It utilizes a QED RM5231
-@@ -231,33 +191,14 @@ config MIPS_IVR
+@@ -231,33 +192,14 @@ config MIPS_IVR
located at <http://www.globespan.net/>. Say Y here if you wish to
build a kernel for this platform.
@@ -389,7 +363,7 @@
help
Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
with ATX form factor that utilizes a MIPS R5000 to work with its
-@@ -265,24 +206,49 @@ config MIPS_ITE8172
+@@ -265,24 +207,49 @@ config MIPS_ITE8172
either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
a kernel for this platform.
@@ -447,7 +421,7 @@
board.
config MIPS_MALTA
-@@ -293,10 +259,17 @@ config MIPS_MALTA
+@@ -293,10 +260,17 @@ config MIPS_MALTA
select GENERIC_ISA_DMA
select HW_HAS_PCI
select I8259
@@ -466,7 +440,7 @@
board.
config MIPS_SEAD
-@@ -304,42 +277,46 @@ config MIPS_SEAD
+@@ -304,42 +278,46 @@ config MIPS_SEAD
depends on EXPERIMENTAL
select IRQ_CPU
select DMA_NONCOHERENT
@@ -532,7 +506,7 @@
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
-@@ -355,70 +332,80 @@ config MOMENCO_OCELOT_3
+@@ -355,70 +333,80 @@ config MOMENCO_OCELOT_3
select PCI_MARVELL
select RM7000_CPU_SCACHE
select SWAP_IO_SPACE
@@ -635,7 +609,7 @@
help
This enables support for the R5432-based NEC DDB Vrc-5476
evaluation board.
-@@ -429,10 +416,14 @@ config DDB5476
+@@ -429,10 +417,14 @@ config DDB5476
config DDB5477
bool "Support for NEC DDB Vrc-5477"
@@ -650,7 +624,7 @@
help
This enables support for the R5432-based NEC DDB Vrc-5477,
or Rockhopper/SolutionGear boards with R5432/R5500 CPUs.
-@@ -440,15 +431,32 @@ config DDB5477
+@@ -440,15 +432,23 @@ config DDB5477
Features : kernel debugging, serial terminal, NFS root fs, on-board
ether port USB, AC97, PCI, etc.
@@ -658,24 +632,17 @@
- int "bus frequency (in kHZ, 0 for auto-detect)"
- depends on DDB5477
- default 0
--
- config NEC_OSPREY
- bool "Support for NEC Osprey board"
- select DMA_NONCOHERENT
- select IRQ_CPU
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select VR4181
-+
+config MACH_VR41XX
+ bool "Support for NEC VR41XX-based machines"
-+
+
+-config NEC_OSPREY
+- bool "Support for NEC Osprey board"
+- select DMA_NONCOHERENT
+config PMC_YOSEMITE
+ bool "Support for PMC-Sierra Yosemite eval board"
+ select DMA_COHERENT
+ select HW_HAS_PCI
-+ select IRQ_CPU
+ select IRQ_CPU
+ select IRQ_CPU_RM7K
+ select IRQ_CPU_RM9K
+ select SWAP_IO_SPACE
@@ -688,7 +655,7 @@
config SGI_IP22
bool "Support for SGI IP22 (Indy/Indigo2)"
-@@ -456,9 +464,13 @@ config SGI_IP22
+@@ -456,9 +456,13 @@ config SGI_IP22
select ARC32
select BOOT_ELF32
select DMA_NONCOHERENT
@@ -702,7 +669,7 @@
help
This are the SGI Indy, Challenge S and Indigo2, as well as certain
OEM variants like the Tandem CMN B006S. To compile a Linux kernel
-@@ -466,75 +478,23 @@ config SGI_IP22
+@@ -466,75 +470,23 @@ config SGI_IP22
config SGI_IP27
bool "Support for SGI IP27 (Origin200/2000)"
@@ -783,7 +750,7 @@
select ARC
select ARC32
select BOOT_ELF32
-@@ -544,330 +504,89 @@ config SGI_IP32
+@@ -544,330 +496,89 @@ config SGI_IP32
select HW_HAS_PCI
select R5000_CPU_SCACHE
select RM7000_CPU_SCACHE
@@ -1170,7 +1137,7 @@
config SNI_RM200_PCI
bool "Support for SNI RM200 PCI"
-@@ -877,31 +596,61 @@ config SNI_RM200_PCI
+@@ -877,31 +588,61 @@ config SNI_RM200_PCI
select DMA_NONCOHERENT
select GENERIC_ISA_DMA
select HAVE_STD_PC_SERIAL_PORT
@@ -1236,7 +1203,7 @@
config RWSEM_GENERIC_SPINLOCK
bool
-@@ -923,32 +672,30 @@ config HAVE_DEC_LOCK
+@@ -923,32 +664,30 @@ config HAVE_DEC_LOCK
#
config ARC
bool
@@ -1248,16 +1215,16 @@
+ bool
+
+config DMA_IP27
++ bool
++
++config DMA_IP32
bool
-config DMA_IP27
-+config DMA_IP32
++config OWN_DMA
bool
-config DMA_NONCOHERENT
-+config OWN_DMA
-+ bool
-+
+config DMA_NONCOHERENT
bool
@@ -1278,7 +1245,7 @@
config LIMITED_DMA
bool
-@@ -956,30 +703,46 @@ config LIMITED_DMA
+@@ -956,30 +695,46 @@ config LIMITED_DMA
config MIPS_BONITO64
bool
@@ -1337,7 +1304,7 @@
config IRQ_CPU
bool
-@@ -987,42 +750,57 @@ config IRQ_CPU
+@@ -987,42 +742,57 @@ config IRQ_CPU
config IRQ_CPU_RM7K
bool
@@ -1407,7 +1374,7 @@
config SWAP_IO_SPACE
bool
-@@ -1049,6 +827,9 @@ config SYSCLK_100
+@@ -1049,6 +819,9 @@ config SYSCLK_100
endchoice
@@ -1417,7 +1384,7 @@
config AU1X00_USB_DEVICE
bool
depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
-@@ -1056,11 +837,7 @@ config AU1X00_USB_DEVICE
+@@ -1056,11 +829,7 @@ config AU1X00_USB_DEVICE
config MIPS_GT96100
bool
@@ -1430,7 +1397,7 @@
config IT8172_CIR
bool
-@@ -1074,8 +851,6 @@ config IT8712
+@@ -1074,8 +843,6 @@ config IT8712
config BOOT_ELF32
bool
@@ -1439,7 +1406,7 @@
config MIPS_L1_CACHE_SHIFT
int
-@@ -1083,53 +858,11 @@ config MIPS_L1_CACHE_SHIFT
+@@ -1083,53 +850,11 @@ config MIPS_L1_CACHE_SHIFT
default "7" if SGI_IP27
default "5"
@@ -1493,7 +1460,7 @@
config ARC_CONSOLE
bool "ARC console support"
-@@ -1147,30 +880,15 @@ config ARC_PROMLIB
+@@ -1147,30 +872,15 @@ config ARC_PROMLIB
config ARC64
bool
@@ -1524,18 +1491,37 @@
menu "CPU selection"
-@@ -1180,13 +898,18 @@ choice
+@@ -1178,15 +888,32 @@ choice
+ prompt "CPU type"
+ default CPU_R4X00
- config CPU_MIPS32
- bool "MIPS32"
+-config CPU_MIPS32
+- bool "MIPS32"
+-
+-config CPU_MIPS64
+- bool "MIPS64"
++config CPU_MIPS32_R1
++ bool "MIPS32 Release 1"
+ select CPU_SUPPORTS_32BIT_KERNEL
+ select CPU_HAS_PREFETCH
-
- config CPU_MIPS64
- bool "MIPS64"
++ help
++ Choose this option to build a kernel for release 1 or later of the
++ MIPS32 architecture. Most modern embedded systems with a 32-bit
++ MIPS processor are based on a MIPS32 processor. If you know the
++ specific type of processor in your system, choose those that one
++ otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
++
++config CPU_MIPS64_R1
++ bool "MIPS64 Release 1"
+ select CPU_SUPPORTS_32BIT_KERNEL
+ select CPU_SUPPORTS_64BIT_KERNEL
+ select CPU_HAS_PREFETCH
++ help
++ Choose this option to build a kernel for release 1 or later of the
++ MIPS64 architecture. Many modern embedded systems with a 64-bit
++ MIPS processor are based on a MIPS64 processor. If you know the
++ specific type of processor in your system, choose those that one
++ otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
config CPU_R3000
bool "R3000"
@@ -1544,7 +1530,7 @@
help
Please make sure to pick the right CPU type. Linux/MIPS is not
designed to be generic, i.e. Kernels compiled for R3000 CPUs will
-@@ -1197,10 +920,12 @@ config CPU_R3000
+@@ -1197,10 +924,12 @@ config CPU_R3000
config CPU_TX39XX
bool "R39XX"
@@ -1558,7 +1544,7 @@
help
The options selects support for the NEC VR41xx series of processors.
Only choose this option if you have one of these processors as a
-@@ -1209,61 +934,126 @@ config CPU_VR41XX
+@@ -1209,61 +938,126 @@ config CPU_VR41XX
config CPU_R4300
bool "R4300"
@@ -1687,7 +1673,7 @@
choice
prompt "Kernel page size"
default PAGE_SIZE_4KB
-@@ -1332,12 +1122,7 @@ config SIBYTE_DMA_PAGEOPS
+@@ -1332,12 +1126,7 @@ config SIBYTE_DMA_PAGEOPS
SiByte Linux port. Seems to give a small performance benefit.
config CPU_HAS_PREFETCH
@@ -1701,7 +1687,25 @@
config SB1_PASS_1_WORKAROUNDS
bool
-@@ -1462,6 +1247,17 @@ config PREEMPT
+@@ -1356,7 +1145,7 @@ config SB1_PASS_2_1_WORKAROUNDS
+
+ config 64BIT_PHYS_ADDR
+ bool "Support for 64-bit physical address space"
+- depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32
++ depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && MIPS32
+
+ config CPU_ADVANCED
+ bool "Override CPU Options"
+@@ -1379,7 +1168,7 @@ config CPU_HAS_LLSC
+
+ config CPU_HAS_LLDSCD
+ bool "lld/scd Instructions available" if CPU_ADVANCED
+- default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32
++ default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1
+ help
+ Say Y here if your CPU has the lld and scd instructions, the 64-bit
+ equivalents of ll and sc. Say Y here for better performance, N if
+@@ -1462,6 +1251,17 @@ config PREEMPT
This allows applications to run more reliably even when the system is
under load.
@@ -1719,7 +1723,7 @@
config RTC_DS1742
bool "DS1742 BRAM/RTC support"
depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
-@@ -1476,14 +1272,16 @@ config MIPS_INSANE_LARGE
+@@ -1476,14 +1276,16 @@ config MIPS_INSANE_LARGE
This will result in additional memory usage, so it is not
recommended for normal users.
@@ -1738,7 +1742,7 @@
config HW_HAS_PCI
bool
-@@ -1517,7 +1315,7 @@ config ISA
+@@ -1517,7 +1319,7 @@ config ISA
config EISA
bool "EISA support"
@@ -1747,7 +1751,7 @@
select ISA
---help---
The Extended Industry Standard Architecture (EISA) bus was
-@@ -1551,12 +1349,6 @@ config MMU
+@@ -1551,12 +1353,6 @@ config MMU
bool
default y
@@ -1760,7 +1764,7 @@
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
-@@ -1569,7 +1361,6 @@ source "fs/Kconfig.binfmt"
+@@ -1569,7 +1365,6 @@ source "fs/Kconfig.binfmt"
config TRAD_SIGNALS
bool
@@ -1768,7 +1772,7 @@
config BUILD_ELF64
bool "Use 64-bit ELF format for building"
-@@ -1588,7 +1379,7 @@ config BUILD_ELF64
+@@ -1588,7 +1383,7 @@ config BUILD_ELF64
config BINFMT_IRIX
bool "Include IRIX binary compatibility"
@@ -1777,7 +1781,7 @@
config MIPS32_COMPAT
bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
-@@ -1628,9 +1419,26 @@ config BINFMT_ELF32
+@@ -1628,9 +1423,26 @@ config BINFMT_ELF32
bool
default y if MIPS32_O32 || MIPS32_N32
@@ -1805,7 +1809,7 @@
endmenu
-@@ -1638,6 +1446,8 @@ source "drivers/Kconfig"
+@@ -1638,6 +1450,8 @@ source "drivers/Kconfig"
source "fs/Kconfig"
@@ -1814,9 +1818,17 @@
source "arch/mips/Kconfig.debug"
source "security/Kconfig"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/Makefile linux_HEAD/arch/mips/Makefile
---- linux-2.6.11.6/arch/mips/Makefile 2005-03-26 04:28:14.000000000 +0100
-+++ linux_HEAD/arch/mips/Makefile 2005-04-02 19:49:57.000000000 +0200
+@@ -1656,7 +1470,3 @@ config GENERIC_HARDIRQS
+ config GENERIC_IRQ_PROBE
+ bool
+ default y
+-
+-config ISA_DMA_API
+- bool
+- default y
+diff -urpNX dontdiff linux-2.6.12/arch/mips/Makefile linux_HEAD/arch/mips/Makefile
+--- linux-2.6.12/arch/mips/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/Makefile 2005-07-10 12:16:33.000000000 +0200
@@ -52,6 +52,16 @@ ifdef CONFIG_CROSSCOMPILE
CROSS_COMPILE := $(tool-prefix)
endif
@@ -1834,7 +1846,7 @@
ifdef CONFIG_BUILD_ELF64
gas-abi = 64
ld-emul = $(64bit-emul)
-@@ -79,10 +89,11 @@ endif
+@@ -79,10 +89,20 @@ endif
cflags-y += -I $(TOPDIR)/include/asm/gcc
cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
cflags-y += $(call cc-option, -finline-limit=100000)
@@ -1843,12 +1855,35 @@
MODFLAGS += -mlong-calls
-cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer
++#
++# We explicitly add the endianness specifier if needed, this allows
++# to compile kernels with a toolchain for the other endianness. We
++# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
++# when fed the toolchain default!
++#
++cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
++cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
++
+cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
+ -fno-omit-frame-pointer
#
# Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
-@@ -266,6 +277,13 @@ cflags-$(CONFIG_MIPS_PB1550) += -Iinclud
+@@ -167,11 +187,11 @@ cflags-$(CONFIG_CPU_TX49XX) += \
+ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
+ -Wa,--trap
+
+-cflags-$(CONFIG_CPU_MIPS32) += \
++cflags-$(CONFIG_CPU_MIPS32_R1) += \
+ $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
+ -Wa,--trap
+
+-cflags-$(CONFIG_CPU_MIPS64) += \
++cflags-$(CONFIG_CPU_MIPS64_R1) += \
+ $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
+ -Wa,--trap
+
+@@ -266,6 +286,13 @@ cflags-$(CONFIG_MIPS_PB1550) += -Iinclud
load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
#
@@ -1862,7 +1897,7 @@
# AMD Alchemy Db1000 eval board
#
libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
-@@ -294,6 +312,13 @@ cflags-$(CONFIG_MIPS_DB1550) += -Iinclud
+@@ -294,6 +321,13 @@ cflags-$(CONFIG_MIPS_DB1550) += -Iinclud
load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
#
@@ -1876,7 +1911,7 @@
# AMD Alchemy Bosporus eval board
#
libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
-@@ -323,6 +348,7 @@ load-$(CONFIG_MIPS_XXS1500) += 0xfffffff
+@@ -323,6 +357,7 @@ load-$(CONFIG_MIPS_XXS1500) += 0xfffffff
# Cobalt Server
#
core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
@@ -1884,8 +1919,41 @@
load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
#
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/arc/Makefile linux_HEAD/arch/mips/arc/Makefile
---- linux-2.6.11.6/arch/mips/arc/Makefile 2005-03-26 04:28:17.000000000 +0100
+@@ -469,13 +504,6 @@ cflags-$(CONFIG_LASAT) += -Iinclude/asm
+ load-$(CONFIG_LASAT) += 0xffffffff80000000
+
+ #
+-# NEC Osprey (vr4181) board
+-#
+-core-$(CONFIG_NEC_OSPREY) += arch/mips/vr4181/common/ \
+- arch/mips/vr4181/osprey/
+-load-$(CONFIG_NEC_OSPREY) += 0xffffffff80002000
+-
+-#
+ # Common VR41xx
+ #
+ core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
+@@ -711,6 +739,18 @@ ifdef CONFIG_BOOT_ELF64
+ all: $(vmlinux-64)
+ endif
+
++ifdef CONFIG_MIPS_ATLAS
++all: vmlinux.srec
++endif
++
++ifdef CONFIG_MIPS_MALTA
++all: vmlinux.srec
++endif
++
++ifdef CONFIG_MIPS_SEAD
++all: vmlinux.srec
++endif
++
+ ifdef CONFIG_SNI_RM200_PCI
+ all: vmlinux.ecoff
+ endif
+diff -urpNX dontdiff linux-2.6.12/arch/mips/arc/Makefile linux_HEAD/arch/mips/arc/Makefile
+--- linux-2.6.12/arch/mips/arc/Makefile 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/arc/Makefile 2005-03-09 22:46:10.000000000 +0100
@@ -3,7 +3,7 @@
#
@@ -1896,8 +1964,23 @@
lib-$(CONFIG_ARC_MEMORY) += memory.o
lib-$(CONFIG_ARC_CONSOLE) += arc_con.o
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/common/au1xxx_irqmap.c linux_HEAD/arch/mips/au1000/common/au1xxx_irqmap.c
---- linux-2.6.11.6/arch/mips/au1000/common/au1xxx_irqmap.c 2005-03-26 04:28:17.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/arc/identify.c linux_HEAD/arch/mips/arc/identify.c
+--- linux-2.6.12/arch/mips/arc/identify.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/arc/identify.c 2005-07-08 12:04:09.000000000 +0200
+@@ -44,6 +44,11 @@ static struct smatch mach_table[] = {
+ MACH_GROUP_SGI,
+ MACH_SGI_IP28,
+ PROM_FLAG_ARCS
++ }, { "SGI-IP30",
++ "SGI Octane",
++ MACH_GROUP_SGI,
++ MACH_SGI_IP30,
++ PROM_FLAG_ARCS
+ }, { "SGI-IP32",
+ "SGI O2",
+ MACH_GROUP_SGI,
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/au1xxx_irqmap.c linux_HEAD/arch/mips/au1000/common/au1xxx_irqmap.c
+--- linux-2.6.12/arch/mips/au1000/common/au1xxx_irqmap.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/common/au1xxx_irqmap.c 2005-03-01 15:00:11.000000000 +0100
@@ -173,14 +173,14 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
{ AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
@@ -1945,8 +2028,8 @@
{ AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
{ AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
{ AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/common/cputable.c linux_HEAD/arch/mips/au1000/common/cputable.c
---- linux-2.6.11.6/arch/mips/au1000/common/cputable.c 2005-03-26 04:28:15.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/cputable.c linux_HEAD/arch/mips/au1000/common/cputable.c
+--- linux-2.6.12/arch/mips/au1000/common/cputable.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/common/cputable.c 2005-03-01 15:00:11.000000000 +0100
@@ -37,7 +37,8 @@ struct cpu_spec cpu_specs[] = {
{ 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
@@ -1958,8 +2041,8 @@
{ 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
};
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/common/dbdma.c linux_HEAD/arch/mips/au1000/common/dbdma.c
---- linux-2.6.11.6/arch/mips/au1000/common/dbdma.c 2005-03-26 04:28:17.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/dbdma.c linux_HEAD/arch/mips/au1000/common/dbdma.c
+--- linux-2.6.12/arch/mips/au1000/common/dbdma.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/common/dbdma.c 2005-03-01 15:00:11.000000000 +0100
@@ -29,6 +29,7 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
@@ -2569,8 +2652,19 @@
+
#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/common/irq.c linux_HEAD/arch/mips/au1000/common/irq.c
---- linux-2.6.11.6/arch/mips/au1000/common/irq.c 2005-03-26 04:28:18.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/dma.c linux_HEAD/arch/mips/au1000/common/dma.c
+--- linux-2.6.12/arch/mips/au1000/common/dma.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/au1000/common/dma.c 2005-04-14 16:40:12.000000000 +0200
+@@ -39,7 +39,6 @@
+ #include <linux/string.h>
+ #include <linux/delay.h>
+ #include <linux/interrupt.h>
+-#include <linux/module.h>
+ #include <asm/system.h>
+ #include <asm/mach-au1x00/au1000.h>
+ #include <asm/mach-au1x00/au1000_dma.h>
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/irq.c linux_HEAD/arch/mips/au1000/common/irq.c
+--- linux-2.6.12/arch/mips/au1000/common/irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/common/irq.c 2005-03-17 22:10:46.000000000 +0100
@@ -253,52 +253,70 @@ void restore_local_and_enable(int contro
@@ -2713,9 +2807,121 @@
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/common/time.c linux_HEAD/arch/mips/au1000/common/time.c
---- linux-2.6.11.6/arch/mips/au1000/common/time.c 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/arch/mips/au1000/common/time.c 2005-03-17 22:10:46.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/platform.c linux_HEAD/arch/mips/au1000/common/platform.c
+--- linux-2.6.12/arch/mips/au1000/common/platform.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/au1000/common/platform.c 2005-04-14 16:40:12.000000000 +0200
+@@ -7,6 +7,7 @@
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
++#include <linux/config.h>
+ #include <linux/device.h>
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+@@ -41,8 +42,42 @@ static struct platform_device au1xxx_usb
+ .resource = au1xxx_usb_ohci_resources,
+ };
+
++/*** AU1100 LCD controller ***/
++
++#ifdef CONFIG_FB_AU1100
++static struct resource au1100_lcd_resources[] = {
++ [0] = {
++ .start = LCD_PHYS_ADDR,
++ .end = LCD_PHYS_ADDR + 0x800 - 1,
++ .flags = IORESOURCE_MEM,
++ },
++ [1] = {
++ .start = AU1100_LCD_INT,
++ .end = AU1100_LCD_INT,
++ .flags = IORESOURCE_IRQ,
++ }
++};
++
++static u64 au1100_lcd_dmamask = ~(u32)0;
++
++static struct platform_device au1100_lcd_device = {
++ .name = "au1100-lcd",
++ .id = 0,
++ .dev = {
++ .dma_mask = &au1100_lcd_dmamask,
++ .coherent_dma_mask = 0xffffffff,
++ },
++ .num_resources = ARRAY_SIZE(au1100_lcd_resources),
++ .resource = au1100_lcd_resources,
++};
++#endif
++
++
+ static struct platform_device *au1xxx_platform_devices[] __initdata = {
+ &au1xxx_usb_ohci_device,
++#ifdef CONFIG_FB_AU1100
++ &au1100_lcd_device,
++#endif
+ };
+
+ int au1xxx_platform_init(void)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/power.c linux_HEAD/arch/mips/au1000/common/power.c
+--- linux-2.6.12/arch/mips/au1000/common/power.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/au1000/common/power.c 2005-04-08 22:40:40.000000000 +0200
+@@ -297,7 +297,6 @@ static int pm_do_suspend(ctl_table * ctl
+ void *buffer, size_t * len)
+ {
+ int retval = 0;
+- void au1k_wait(void);
+
+ if (!write) {
+ *len = 0;
+@@ -306,7 +305,7 @@ static int pm_do_suspend(ctl_table * ctl
+ if (retval)
+ return retval;
+ suspend_mode = 1;
+- au1k_wait();
++
+ retval = pm_send_all(PM_RESUME, (void *) 0);
+ }
+ return retval;
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/setup.c linux_HEAD/arch/mips/au1000/common/setup.c
+--- linux-2.6.12/arch/mips/au1000/common/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/au1000/common/setup.c 2005-07-01 12:09:16.000000000 +0200
+@@ -57,7 +57,7 @@ extern void au1xxx_time_init(void);
+ extern void au1xxx_timer_setup(struct irqaction *irq);
+ extern void set_cpuspec(void);
+
+-static int __init au1x00_setup(void)
++void __init plat_setup(void)
+ {
+ struct cpu_spec *sp;
+ char *argptr;
+@@ -106,8 +106,6 @@ static int __init au1x00_setup(void)
+ /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
+ #ifdef CONFIG_MIPS_HYDROGEN3
+ strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
+-#else
+- strcat(argptr, " video=au1100fb:panel:s10,nohwcursor");
+ #endif
+ }
+ #endif
+@@ -153,15 +151,11 @@ static int __init au1x00_setup(void)
+ au_sync();
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
+ au_writel(0, SYS_TOYTRIM);
+-
+- return 0;
+ }
+
+-early_initcall(au1x00_setup);
+-
+ #if defined(CONFIG_64BIT_PHYS_ADDR)
+ /* This routine should be valid for all Au1x based boards */
+-phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
++phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+ {
+ u32 start, end;
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/common/time.c linux_HEAD/arch/mips/au1000/common/time.c
+--- linux-2.6.12/arch/mips/au1000/common/time.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/au1000/common/time.c 2005-04-08 22:40:40.000000000 +0200
@@ -50,7 +50,6 @@
#include <linux/mc146818rtc.h>
#include <linux/timex.h>
@@ -2724,8 +2930,16 @@
extern void do_softirq(void);
extern volatile unsigned long wall_jiffies;
unsigned long missed_heart_beats = 0;
-@@ -65,7 +64,7 @@ static unsigned int timerhi = 0, timerlo
+@@ -58,14 +57,14 @@ unsigned long missed_heart_beats = 0;
+ static unsigned long r4k_offset; /* Amount to increment compare reg each time */
+ static unsigned long r4k_cur; /* What counter should be at next timer irq */
+ int no_au1xxx_32khz;
+-void (*au1k_wait_ptr)(void);
++extern int allow_au1k_wait; /* default off for CP0 Counter */
+ /* Cycle counter value at the previous timer interrupt.. */
+ static unsigned int timerhi = 0, timerlo = 0;
+
#ifdef CONFIG_PM
#define MATCH20_INC 328
-extern void startup_match20_interrupt(void);
@@ -2733,7 +2947,15 @@
static unsigned long last_pc0, last_match20;
#endif
-@@ -446,7 +445,7 @@ void au1xxx_timer_setup(struct irqaction
+@@ -388,7 +387,6 @@ void au1xxx_timer_setup(struct irqaction
+ {
+ unsigned int est_freq;
+ extern unsigned long (*do_gettimeoffset)(void);
+- extern void au1k_wait(void);
+
+ printk("calculating r4koff... ");
+ r4k_offset = cal_r4koff();
+@@ -446,13 +444,13 @@ void au1xxx_timer_setup(struct irqaction
au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
@@ -2742,8 +2964,26 @@
do_gettimeoffset = do_fast_pm_gettimeoffset;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/db1x00/irqmap.c linux_HEAD/arch/mips/au1000/db1x00/irqmap.c
---- linux-2.6.11.6/arch/mips/au1000/db1x00/irqmap.c 2005-03-26 04:28:16.000000000 +0100
+ /* We can use the real 'wait' instruction.
+ */
+- au1k_wait_ptr = au1k_wait;
++ allow_au1k_wait = 1;
+ }
+
+ #else
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/csb250/init.c linux_HEAD/arch/mips/au1000/csb250/init.c
+--- linux-2.6.12/arch/mips/au1000/csb250/init.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/au1000/csb250/init.c 2005-04-14 16:40:13.000000000 +0200
+@@ -35,7 +35,6 @@
+ #include <asm/bootinfo.h>
+ #include <linux/string.h>
+ #include <linux/kernel.h>
+-#include <linux/sched.h>
+
+ int prom_argc;
+ char **prom_argv, **prom_envp;
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/db1x00/irqmap.c linux_HEAD/arch/mips/au1000/db1x00/irqmap.c
+--- linux-2.6.12/arch/mips/au1000/db1x00/irqmap.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/db1x00/irqmap.c 2005-03-01 15:00:11.000000000 +0100
@@ -48,6 +48,38 @@
#include <asm/system.h>
@@ -2784,8 +3024,8 @@
au1xxx_irq_map_t au1xxx_irq_map[] = {
#ifndef CONFIG_MIPS_MIRAGE
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/db1x00/mirage_ts.c linux_HEAD/arch/mips/au1000/db1x00/mirage_ts.c
---- linux-2.6.11.6/arch/mips/au1000/db1x00/mirage_ts.c 2005-03-26 04:28:23.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/db1x00/mirage_ts.c linux_HEAD/arch/mips/au1000/db1x00/mirage_ts.c
+--- linux-2.6.12/arch/mips/au1000/db1x00/mirage_ts.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/db1x00/mirage_ts.c 2005-02-28 16:56:39.000000000 +0100
@@ -102,15 +102,15 @@ static struct {
} mirage_ts_cal =
@@ -2811,20 +3051,30 @@
#endif
};
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/mtx-1/init.c linux_HEAD/arch/mips/au1000/mtx-1/init.c
---- linux-2.6.11.6/arch/mips/au1000/mtx-1/init.c 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/au1000/mtx-1/init.c 2005-02-17 21:48:53.000000000 +0100
-@@ -59,7 +59,7 @@ void __init prom_init(void)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/hydrogen3/init.c linux_HEAD/arch/mips/au1000/hydrogen3/init.c
+--- linux-2.6.12/arch/mips/au1000/hydrogen3/init.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/au1000/hydrogen3/init.c 2005-04-14 16:40:13.000000000 +0200
+@@ -37,7 +37,6 @@
+ #include <linux/config.h>
+ #include <linux/string.h>
+ #include <linux/kernel.h>
+-#include <linux/sched.h>
- mips_machgroup = MACH_GROUP_ALCHEMY;
- mips_machtype = MACH_MTX1; /* set the platform # */
--
-+
- prom_init_cmdline();
-
- memsize_str = prom_getenv("memsize");
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/mtx-1/irqmap.c linux_HEAD/arch/mips/au1000/mtx-1/irqmap.c
---- linux-2.6.11.6/arch/mips/au1000/mtx-1/irqmap.c 2005-03-26 04:28:15.000000000 +0100
+ int prom_argc;
+ char **prom_argv, **prom_envp;
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/mtx-1/init.c linux_HEAD/arch/mips/au1000/mtx-1/init.c
+--- linux-2.6.12/arch/mips/au1000/mtx-1/init.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/au1000/mtx-1/init.c 2005-07-10 12:28:27.000000000 +0200
+@@ -33,7 +33,6 @@
+ #include <linux/sched.h>
+ #include <linux/init.h>
+ #include <linux/mm.h>
+-#include <linux/sched.h>
+ #include <linux/bootmem.h>
+ #include <asm/addrspace.h>
+ #include <asm/bootinfo.h>
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/mtx-1/irqmap.c linux_HEAD/arch/mips/au1000/mtx-1/irqmap.c
+--- linux-2.6.12/arch/mips/au1000/mtx-1/irqmap.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/mtx-1/irqmap.c 2005-03-01 15:00:11.000000000 +0100
@@ -47,6 +47,17 @@
#include <asm/system.h>
@@ -2844,8 +3094,8 @@
au1xxx_irq_map_t au1xxx_irq_map[] = {
{ AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
{ AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/pb1200/Makefile linux_HEAD/arch/mips/au1000/pb1200/Makefile
---- linux-2.6.11.6/arch/mips/au1000/pb1200/Makefile 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/pb1200/Makefile linux_HEAD/arch/mips/au1000/pb1200/Makefile
+--- linux-2.6.12/arch/mips/au1000/pb1200/Makefile 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/au1000/pb1200/Makefile 2005-03-01 07:33:16.000000000 +0100
@@ -0,0 +1,5 @@
+#
@@ -2853,8 +3103,8 @@
+#
+
+lib-y := init.o board_setup.o irqmap.o
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/pb1200/board_setup.c linux_HEAD/arch/mips/au1000/pb1200/board_setup.c
---- linux-2.6.11.6/arch/mips/au1000/pb1200/board_setup.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/pb1200/board_setup.c linux_HEAD/arch/mips/au1000/pb1200/board_setup.c
+--- linux-2.6.12/arch/mips/au1000/pb1200/board_setup.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/au1000/pb1200/board_setup.c 2005-03-04 20:36:08.000000000 +0100
@@ -0,0 +1,183 @@
+/*
@@ -3040,8 +3290,8 @@
+ board_init_irq = _board_init_irq;
+ }
+}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/pb1200/init.c linux_HEAD/arch/mips/au1000/pb1200/init.c
---- linux-2.6.11.6/arch/mips/au1000/pb1200/init.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/pb1200/init.c linux_HEAD/arch/mips/au1000/pb1200/init.c
+--- linux-2.6.12/arch/mips/au1000/pb1200/init.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/au1000/pb1200/init.c 2005-03-01 07:33:16.000000000 +0100
@@ -0,0 +1,69 @@
+/*
@@ -3113,10 +3363,10 @@
+ }
+ add_memory_region(0, memsize, BOOT_MEM_RAM);
+}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/pb1200/irqmap.c linux_HEAD/arch/mips/au1000/pb1200/irqmap.c
---- linux-2.6.11.6/arch/mips/au1000/pb1200/irqmap.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/arch/mips/au1000/pb1200/irqmap.c 2005-03-01 07:33:16.000000000 +0100
-@@ -0,0 +1,180 @@
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/pb1200/irqmap.c linux_HEAD/arch/mips/au1000/pb1200/irqmap.c
+--- linux-2.6.12/arch/mips/au1000/pb1200/irqmap.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/arch/mips/au1000/pb1200/irqmap.c 2005-04-14 16:40:13.000000000 +0200
+@@ -0,0 +1,181 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
@@ -3141,6 +3391,7 @@
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
++#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
@@ -3297,8 +3548,8 @@
+ request of any source attached to the cascade */
+}
+
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/pb1500/irqmap.c linux_HEAD/arch/mips/au1000/pb1500/irqmap.c
---- linux-2.6.11.6/arch/mips/au1000/pb1500/irqmap.c 2005-03-26 04:28:39.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/pb1500/irqmap.c linux_HEAD/arch/mips/au1000/pb1500/irqmap.c
+--- linux-2.6.12/arch/mips/au1000/pb1500/irqmap.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/pb1500/irqmap.c 2005-03-01 15:00:11.000000000 +0100
@@ -47,6 +47,11 @@
#include <asm/system.h>
@@ -3312,8 +3563,8 @@
au1xxx_irq_map_t au1xxx_irq_map[] = {
{ AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
{ AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/au1000/pb1550/irqmap.c linux_HEAD/arch/mips/au1000/pb1550/irqmap.c
---- linux-2.6.11.6/arch/mips/au1000/pb1550/irqmap.c 2005-03-26 04:28:38.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/au1000/pb1550/irqmap.c linux_HEAD/arch/mips/au1000/pb1550/irqmap.c
+--- linux-2.6.12/arch/mips/au1000/pb1550/irqmap.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/au1000/pb1550/irqmap.c 2005-03-01 15:00:12.000000000 +0100
@@ -47,6 +47,11 @@
#include <asm/system.h>
@@ -3327,8 +3578,19 @@
au1xxx_irq_map_t au1xxx_irq_map[] = {
{ AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/cobalt/int-handler.S linux_HEAD/arch/mips/cobalt/int-handler.S
---- linux-2.6.11.6/arch/mips/cobalt/int-handler.S 2005-03-26 04:28:36.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/cobalt/Makefile linux_HEAD/arch/mips/cobalt/Makefile
+--- linux-2.6.12/arch/mips/cobalt/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/cobalt/Makefile 2005-04-12 15:07:55.000000000 +0200
+@@ -2,6 +2,6 @@
+ # Makefile for the Cobalt micro systems family specific parts of the kernel
+ #
+
+-obj-y := irq.o int-handler.o reset.o setup.o promcon.o
++obj-y := irq.o int-handler.o reset.o setup.o
+
+ EXTRA_AFLAGS := $(CFLAGS)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/cobalt/int-handler.S linux_HEAD/arch/mips/cobalt/int-handler.S
+--- linux-2.6.12/arch/mips/cobalt/int-handler.S 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/cobalt/int-handler.S 2005-02-21 22:17:43.000000000 +0100
@@ -18,8 +18,8 @@
SAVE_ALL
@@ -3341,18 +3603,19 @@
j cobalt_irq
END(cobalt_handle_int)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/cobalt/irq.c linux_HEAD/arch/mips/cobalt/irq.c
---- linux-2.6.11.6/arch/mips/cobalt/irq.c 2005-03-26 04:28:23.000000000 +0100
-+++ linux_HEAD/arch/mips/cobalt/irq.c 2005-02-21 22:17:43.000000000 +0100
-@@ -10,6 +10,7 @@
+diff -urpNX dontdiff linux-2.6.12/arch/mips/cobalt/irq.c linux_HEAD/arch/mips/cobalt/irq.c
+--- linux-2.6.12/arch/mips/cobalt/irq.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/cobalt/irq.c 2005-04-12 15:07:55.000000000 +0200
+@@ -10,6 +10,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <linux/interrupt.h>
++#include <linux/pci.h>
#include <asm/i8259.h>
#include <asm/irq_cpu.h>
-@@ -25,8 +26,8 @@ extern void cobalt_handle_int(void);
+@@ -25,8 +27,8 @@ extern void cobalt_handle_int(void);
* the CPU interrupt lines, and ones that come in on the via chip. The CPU
* mappings are:
*
@@ -3363,14 +3626,107 @@
* 18 - Galileo chip (timer) IE_IRQ0
* 19 - Tulip 0 + NCR SCSI IE_IRQ1
* 20 - Tulip 1 IE_IRQ2
-@@ -82,11 +83,15 @@ asmlinkage void cobalt_irq(struct pt_reg
+@@ -42,61 +44,94 @@ extern void cobalt_handle_int(void);
+ * 15 - IDE1
+ */
+
+-asmlinkage void cobalt_irq(struct pt_regs *regs)
++static inline void galileo_irq(struct pt_regs *regs)
+ {
+- unsigned int pending = read_c0_status() & read_c0_cause();
++ unsigned int mask, pending, devfn;
+
+- if (pending & CAUSEF_IP2) { /* int 18 */
+- unsigned long irq_src = GALILEO_INL(GT_INTRCAUSE_OFS);
++ mask = GALILEO_INL(GT_INTRMASK_OFS);
++ pending = GALILEO_INL(GT_INTRCAUSE_OFS) & mask;
+
+- /* Check for timer irq ... */
+- if (irq_src & GALILEO_T0EXP) {
+- /* Clear the int line */
+- GALILEO_OUTL(0, GT_INTRCAUSE_OFS);
+- do_IRQ(COBALT_TIMER_IRQ, regs);
+- }
+- return;
+- }
++ if (pending & GALILEO_INTR_T0EXP) {
+
+- if (pending & CAUSEF_IP6) { /* int 22 */
+- int irq = i8259_irq();
++ GALILEO_OUTL(~GALILEO_INTR_T0EXP, GT_INTRCAUSE_OFS);
++ do_IRQ(COBALT_GALILEO_IRQ, regs);
+
+- if (irq >= 0)
+- do_IRQ(irq, regs);
+- return;
+- }
++ } else if (pending & GALILEO_INTR_RETRY_CTR) {
+
+- if (pending & CAUSEF_IP3) { /* int 19 */
+- do_IRQ(COBALT_ETH0_IRQ, regs);
+- return;
+- }
++ devfn = GALILEO_INL(GT_PCI0_CFGADDR_OFS) >> 8;
++ GALILEO_OUTL(~GALILEO_INTR_RETRY_CTR, GT_INTRCAUSE_OFS);
++ printk(KERN_WARNING "Galileo: PCI retry count exceeded (%02x.%u)\n",
++ PCI_SLOT(devfn), PCI_FUNC(devfn));
+
+- if (pending & CAUSEF_IP4) { /* int 20 */
+- do_IRQ(COBALT_ETH1_IRQ, regs);
+- return;
+- }
++ } else {
+
+- if (pending & CAUSEF_IP5) { /* int 21 */
+- do_IRQ(COBALT_SERIAL_IRQ, regs);
+- return;
++ GALILEO_OUTL(mask & ~pending, GT_INTRMASK_OFS);
++ printk(KERN_WARNING "Galileo: masking unexpected interrupt %08x\n", pending);
}
++}
- if (pending & CAUSEF_IP7) { /* int 23 */
+- if (pending & CAUSEF_IP7) { /* int 23 */
- do_IRQ(COBALT_QUBE_SLOT_IRQ, regs);
-+ do_IRQ(23, regs);
- return;
- }
+- return;
+- }
++static inline void via_pic_irq(struct pt_regs *regs)
++{
++ int irq;
++
++ irq = i8259_irq();
++ if (irq >= 0)
++ do_IRQ(irq, regs);
++}
++
++asmlinkage void cobalt_irq(struct pt_regs *regs)
++{
++ unsigned pending;
++
++ pending = read_c0_status() & read_c0_cause();
++
++ if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */
++
++ galileo_irq(regs);
++
++ else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */
++
++ via_pic_irq(regs);
++
++ else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */
++
++ do_IRQ(COBALT_CPU_IRQ + 3, regs);
++
++ else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */
++
++ do_IRQ(COBALT_CPU_IRQ + 4, regs);
++
++ else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */
++
++ do_IRQ(COBALT_CPU_IRQ + 5, regs);
++
++ else if (pending & CAUSEF_IP7) /* IRQ 23 */
++
++ do_IRQ(COBALT_CPU_IRQ + 7, regs);
}
+static struct irqaction irq_via = {
@@ -3379,16 +3735,119 @@
+
void __init arch_init_irq(void)
{
++ /*
++ * Mask all Galileo interrupts. The Galileo
++ * handler is set in cobalt_timer_setup()
++ */
++ GALILEO_OUTL(0, GT_INTRMASK_OFS);
++
set_except_vector(0, cobalt_handle_int);
-@@ -99,4 +104,6 @@ void __init arch_init_irq(void)
+
+ init_i8259_irqs(); /* 0 ... 15 */
+- mips_cpu_irq_init(16); /* 16 ... 23 */
++ mips_cpu_irq_init(COBALT_CPU_IRQ); /* 16 ... 23 */
+
+ /*
+ * Mask all cpu interrupts
* (except IE4, we already masked those at VIA level)
*/
change_c0_status(ST0_IM, IE_IRQ4);
+
+ setup_irq(COBALT_VIA_IRQ, &irq_via);
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/cobalt/reset.c linux_HEAD/arch/mips/cobalt/reset.c
---- linux-2.6.11.6/arch/mips/cobalt/reset.c 2005-03-26 04:28:13.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/cobalt/promcon.c linux_HEAD/arch/mips/cobalt/promcon.c
+--- linux-2.6.12/arch/mips/cobalt/promcon.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/cobalt/promcon.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,87 +0,0 @@
+-/*
+- * PROM console for Cobalt Raq2
+- *
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
+- * Copyright (C) 2001 by Liam Davies (ldavies at agile.tv)
+- *
+- */
+-
+-#include <linux/init.h>
+-#include <linux/console.h>
+-#include <linux/kdev_t.h>
+-#include <linux/serial_reg.h>
+-
+-#include <asm/delay.h>
+-#include <asm/serial.h>
+-#include <asm/io.h>
+-
+-static unsigned long port = 0xc800000;
+-
+-static __inline__ void ns16550_cons_put_char(char ch, unsigned long ioaddr)
+-{
+- char lsr;
+-
+- do {
+- lsr = inb(ioaddr + UART_LSR);
+- } while ((lsr & (UART_LSR_TEMT | UART_LSR_THRE)) != (UART_LSR_TEMT | UART_LSR_THRE));
+- outb(ch, ioaddr + UART_TX);
+-}
+-
+-static __inline__ char ns16550_cons_get_char(unsigned long ioaddr)
+-{
+- while ((inb(ioaddr + UART_LSR) & UART_LSR_DR) == 0)
+- udelay(1);
+- return inb(ioaddr + UART_RX);
+-}
+-
+-void ns16550_console_write(struct console *co, const char *s, unsigned count)
+-{
+- char lsr, ier;
+- unsigned i;
+-
+- ier = inb(port + UART_IER);
+- outb(0x00, port + UART_IER);
+- for (i=0; i < count; i++, s++) {
+-
+- if(*s == '\n')
+- ns16550_cons_put_char('\r', port);
+- ns16550_cons_put_char(*s, port);
+- }
+-
+- do {
+- lsr = inb(port + UART_LSR);
+- } while ((lsr & (UART_LSR_TEMT | UART_LSR_THRE)) != (UART_LSR_TEMT | UART_LSR_THRE));
+-
+- outb(ier, port + UART_IER);
+-}
+-
+-char getDebugChar(void)
+-{
+- return ns16550_cons_get_char(port);
+-}
+-
+-void putDebugChar(char kgdb_char)
+-{
+- ns16550_cons_put_char(kgdb_char, port);
+-}
+-
+-static struct console ns16550_console = {
+- .name = "prom",
+- .setup = NULL,
+- .write = ns16550_console_write,
+- .flags = CON_PRINTBUFFER,
+- .index = -1,
+-};
+-
+-static int __init ns16550_setup_console(void)
+-{
+- register_console(&ns16550_console);
+-
+- return 0;
+-}
+-
+-console_initcall(ns16550_setup_console);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/cobalt/reset.c linux_HEAD/arch/mips/cobalt/reset.c
+--- linux-2.6.12/arch/mips/cobalt/reset.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/cobalt/reset.c 2005-02-21 22:17:43.000000000 +0100
@@ -16,48 +16,45 @@
#include <asm/reboot.h>
@@ -3467,9 +3926,9 @@
/*
* This triggers the luser mode device driver for the power switch ;-)
*/
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/cobalt/setup.c linux_HEAD/arch/mips/cobalt/setup.c
---- linux-2.6.11.6/arch/mips/cobalt/setup.c 2005-03-26 04:28:14.000000000 +0100
-+++ linux_HEAD/arch/mips/cobalt/setup.c 2005-03-04 20:36:08.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/cobalt/setup.c linux_HEAD/arch/mips/cobalt/setup.c
+--- linux-2.6.12/arch/mips/cobalt/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/cobalt/setup.c 2005-07-07 13:02:52.000000000 +0200
@@ -13,6 +13,8 @@
#include <linux/interrupt.h>
#include <linux/pci.h>
@@ -3487,7 +3946,7 @@
#include <asm/cobalt/cobalt.h>
-@@ -30,27 +33,25 @@ extern void cobalt_machine_power_off(voi
+@@ -30,45 +33,44 @@ extern void cobalt_machine_power_off(voi
int cobalt_board_id;
@@ -3522,17 +3981,23 @@
{
- /* Load timer value for 150 Hz */
- GALILEO_OUTL(500000, GT_TC0_OFS);
-+ /* Load timer value for 1KHz */
++ /* Load timer value for 1KHz (TCLK is 50MHz) */
+ GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS);
++
++ /* Enable timer */
++ GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS);
- /* Register our timer interrupt */
- setup_irq(COBALT_TIMER_IRQ, irq);
-@@ -58,17 +59,17 @@ static void __init cobalt_timer_setup(st
- /* Enable timer ints */
- GALILEO_OUTL((GALILEO_ENTC0 | GALILEO_SELTC0), GT_TC_CONTROL_OFS);
- /* Unmask timer int */
+- /* Register our timer interrupt */
+- setup_irq(COBALT_TIMER_IRQ, irq);
++ /* Register interrupt */
++ setup_irq(COBALT_GALILEO_IRQ, irq);
+
+- /* Enable timer ints */
+- GALILEO_OUTL((GALILEO_ENTC0 | GALILEO_SELTC0), GT_TC_CONTROL_OFS);
+- /* Unmask timer int */
- GALILEO_OUTL(0x100, GT_INTRMASK_OFS);
-+ GALILEO_OUTL(GALILEO_T0EXP, GT_INTRMASK_OFS);
++ /* Enable interrupt */
++ GALILEO_OUTL(GALILEO_INTR_T0EXP | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
}
extern struct pci_ops gt64111_pci_ops;
@@ -3548,7 +4013,7 @@
};
static struct resource cobalt_io_resources[] = {
-@@ -86,11 +87,12 @@ static struct pci_controller cobalt_pci_
+@@ -86,11 +88,12 @@ static struct pci_controller cobalt_pci_
.mem_resource = &cobalt_mem_resource,
.mem_offset = 0,
.io_resource = &cobalt_io_resource,
@@ -3557,13 +4022,13 @@
};
-static void __init cobalt_setup(void)
-+static int __init cobalt_setup(void)
++void __init plat_setup(void)
{
+ static struct uart_port uart;
unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
int i;
-@@ -100,7 +102,10 @@ static void __init cobalt_setup(void)
+@@ -100,7 +103,10 @@ static void __init cobalt_setup(void)
board_timer_setup = cobalt_timer_setup;
@@ -3575,7 +4040,7 @@
/*
* This is a prom style console. We just poke at the
-@@ -120,27 +125,65 @@ static void __init cobalt_setup(void)
+@@ -120,27 +126,61 @@ static void __init cobalt_setup(void)
cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
@@ -3584,7 +4049,9 @@
#ifdef CONFIG_PCI
register_pci_controller(&cobalt_pci_controller);
#endif
-+
+-}
+
+-early_initcall(cobalt_setup);
+#ifdef CONFIG_SERIAL_8250
+ if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
+
@@ -3599,12 +4066,8 @@
+ early_serial_setup(&uart);
+ }
+#endif
-+
-+ return 0;
- }
++}
- early_initcall(cobalt_setup);
-
/*
* Prom init. We read our one and only communication with the firmware.
- * Grab the amount of installed memory
@@ -3646,16 +4109,16 @@
}
unsigned long __init prom_free_prom_memory(void)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/atlas_defconfig linux_HEAD/arch/mips/configs/atlas_defconfig
---- linux-2.6.11.6/arch/mips/configs/atlas_defconfig 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/atlas_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/atlas_defconfig linux_HEAD/arch/mips/configs/atlas_defconfig
+--- linux-2.6.12/arch/mips/configs/atlas_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/atlas_defconfig 2005-07-07 11:22:47.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:00 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:24 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:01 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -3664,7 +4127,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -3675,11 +4146,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -3687,7 +4160,7 @@
#
# Loadable module support
-@@ -56,33 +54,55 @@ CONFIG_KMOD=y
+@@ -56,33 +57,54 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -3732,7 +4205,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -3753,7 +4226,7 @@
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
-@@ -90,7 +110,10 @@ CONFIG_HAVE_DEC_LOCK=y
+@@ -90,7 +112,10 @@ CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_MIPS_BONITO64=y
CONFIG_MIPS_MSC=y
@@ -3765,7 +4238,18 @@
CONFIG_MIPS_BOARDS_GEN=y
CONFIG_MIPS_GT64120=y
CONFIG_SWAP_IO_SPACE=y
-@@ -117,10 +140,22 @@ CONFIG_CPU_MIPS32=y
+@@ -100,8 +125,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -117,10 +142,22 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -3788,7 +4272,7 @@
CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
-@@ -143,10 +178,6 @@ CONFIG_MMU=y
+@@ -143,10 +180,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -3799,15 +4283,20 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -290,7 +321,6 @@ CONFIG_SCSI_ISCSI_ATTRS=m
- # CONFIG_SCSI_BUSLOGIC is not set
+@@ -287,12 +320,8 @@ CONFIG_SCSI_ISCSI_ATTRS=m
+ # CONFIG_MEGARAID_NEWGEN is not set
+ # CONFIG_MEGARAID_LEGACY is not set
+ # CONFIG_SCSI_SATA is not set
+-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
- # CONFIG_SCSI_EATA is not set
+-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
- # CONFIG_SCSI_GDTH is not set
+-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
-@@ -302,7 +332,6 @@ CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+ # CONFIG_SCSI_INITIO is not set
+ # CONFIG_SCSI_INIA100 is not set
+@@ -302,7 +331,6 @@ CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_IPR is not set
@@ -3815,6 +4304,14 @@
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
CONFIG_SCSI_QLA2XXX=y
+@@ -311,6 +339,7 @@ CONFIG_SCSI_QLA2XXX=y
+ # CONFIG_SCSI_QLA2300 is not set
+ # CONFIG_SCSI_QLA2322 is not set
+ # CONFIG_SCSI_QLA6312 is not set
++# CONFIG_SCSI_LPFC is not set
+ # CONFIG_SCSI_DC395x is not set
+ # CONFIG_SCSI_DC390T is not set
+ # CONFIG_SCSI_NSP32 is not set
@@ -334,6 +363,8 @@ CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
@@ -3824,6 +4321,22 @@
#
# Fusion MPT device support
+@@ -360,7 +391,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -369,6 +399,7 @@ CONFIG_IP_ADVANCED_ROUTER=y
+ CONFIG_IP_MULTIPLE_TABLES=y
+ CONFIG_IP_ROUTE_FWMARK=y
+ CONFIG_IP_ROUTE_MULTIPATH=y
++# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
+ CONFIG_IP_ROUTE_VERBOSE=y
+ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
@@ -502,7 +533,7 @@ CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
@@ -3849,6 +4362,22 @@
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
+@@ -628,7 +661,6 @@ CONFIG_DUMMY=m
+ CONFIG_BONDING=m
+ CONFIG_EQUALIZER=m
+ CONFIG_TUN=m
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -683,6 +715,7 @@ CONFIG_LAN_SAA9730=y
+ # CONFIG_SK98LIN is not set
+ # CONFIG_VIA_VELOCITY is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
@@ -740,19 +773,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
@@ -3869,7 +4398,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -765,6 +785,18 @@ CONFIG_MOUSE_SERIAL=m
+@@ -765,6 +785,17 @@ CONFIG_MOUSE_SERIAL=m
# CONFIG_INPUT_MISC is not set
#
@@ -3882,12 +4411,19 @@
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
+@@ -785,6 +816,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
@@ -811,6 +843,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
@@ -3954,16 +4490,16 @@
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/capcella_defconfig linux_HEAD/arch/mips/configs/capcella_defconfig
---- linux-2.6.11.6/arch/mips/configs/capcella_defconfig 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/capcella_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/capcella_defconfig linux_HEAD/arch/mips/configs/capcella_defconfig
+--- linux-2.6.12/arch/mips/configs/capcella_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/capcella_defconfig 2005-07-07 11:22:47.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:00 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:25 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:01 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -3972,7 +4508,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -3983,11 +4527,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -3995,7 +4541,7 @@
#
# Loadable module support
-@@ -56,48 +54,73 @@ CONFIG_KMOD=y
+@@ -56,56 +57,80 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -4049,7 +4595,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -4088,7 +4634,17 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -121,6 +144,17 @@ CONFIG_CPU_VR41XX=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ CONFIG_CPU_VR41XX=y
+@@ -121,6 +146,17 @@ CONFIG_CPU_VR41XX=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -4106,7 +4662,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -144,10 +178,6 @@ CONFIG_MMU=y
+@@ -144,10 +180,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -4117,7 +4673,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -428,19 +458,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -274,7 +306,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -337,7 +368,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -372,6 +402,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -428,19 +459,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -4137,7 +4717,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -450,6 +467,18 @@ CONFIG_SERIO_RAW=m
+@@ -450,6 +468,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -4150,21 +4730,21 @@
+CONFIG_SERIO_LIBPS2=m
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -470,6 +499,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+@@ -470,6 +499,8 @@ CONFIG_SERIAL_8250_NR_UARTS=4
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_VR41XX is not set
++# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-@@ -508,6 +538,11 @@ CONFIG_WATCHDOG=y
+@@ -508,6 +539,11 @@ CONFIG_WATCHDOG=y
# CONFIG_RAW_DRIVER is not set
#
@@ -4176,7 +4756,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -541,7 +576,6 @@ CONFIG_WATCHDOG=y
+@@ -541,7 +577,6 @@ CONFIG_WATCHDOG=y
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -4184,7 +4764,7 @@
#
# Sound
-@@ -551,13 +585,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -551,13 +586,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -4199,7 +4779,7 @@
#
# USB Gadget Support
-@@ -583,6 +613,10 @@ CONFIG_EXT2_FS=y
+@@ -583,6 +614,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -4210,7 +4790,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -675,7 +709,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -675,7 +710,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -4220,16 +4800,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/cobalt_defconfig linux_HEAD/arch/mips/configs/cobalt_defconfig
---- linux-2.6.11.6/arch/mips/configs/cobalt_defconfig 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/cobalt_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/cobalt_defconfig linux_HEAD/arch/mips/configs/cobalt_defconfig
+--- linux-2.6.12/arch/mips/configs/cobalt_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/cobalt_defconfig 2005-07-07 11:22:47.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:00 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:26 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:02 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -4238,7 +4818,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -4249,11 +4837,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -4261,7 +4851,7 @@
#
# Loadable module support
-@@ -50,40 +48,64 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -50,40 +51,63 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -4306,7 +4896,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -4336,7 +4926,18 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_GT64111=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -108,6 +130,17 @@ CONFIG_CPU_NEVADA=y
+@@ -91,8 +115,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -108,6 +132,17 @@ CONFIG_CPU_NEVADA=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -4354,7 +4955,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -133,10 +166,6 @@ CONFIG_MMU=y
+@@ -133,10 +168,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -4365,7 +4966,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -414,19 +443,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -264,7 +295,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -323,7 +353,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -358,6 +387,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -414,19 +444,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -4385,7 +5010,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -436,6 +452,18 @@ CONFIG_SERIO_RAW=y
+@@ -436,6 +453,17 @@ CONFIG_SERIO_RAW=y
# CONFIG_INPUT_MISC is not set
#
@@ -4398,13 +5023,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -482,6 +510,11 @@ CONFIG_COBALT_LCD=y
+@@ -456,6 +484,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -482,6 +511,11 @@ CONFIG_COBALT_LCD=y
# CONFIG_RAW_DRIVER is not set
#
@@ -4416,7 +5048,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -515,7 +548,6 @@ CONFIG_COBALT_LCD=y
+@@ -515,7 +549,6 @@ CONFIG_COBALT_LCD=y
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -4424,7 +5056,7 @@
#
# Sound
-@@ -525,13 +557,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -525,13 +558,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -4439,7 +5071,7 @@
#
# USB Gadget Support
-@@ -561,6 +589,10 @@ CONFIG_FS_MBCACHE=y
+@@ -561,6 +590,10 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -4450,7 +5082,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -621,7 +653,6 @@ CONFIG_NFS_FS=y
+@@ -621,7 +654,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
@@ -4458,7 +5090,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -650,7 +681,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -650,7 +682,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -4468,16 +5100,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/db1000_defconfig linux_HEAD/arch/mips/configs/db1000_defconfig
---- linux-2.6.11.6/arch/mips/configs/db1000_defconfig 2005-03-26 04:28:43.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/db1000_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/db1000_defconfig linux_HEAD/arch/mips/configs/db1000_defconfig
+--- linux-2.6.12/arch/mips/configs/db1000_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/db1000_defconfig 2005-07-07 11:22:47.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:01 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:27 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:02 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -4486,7 +5118,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -4497,11 +5137,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -4509,7 +5151,7 @@
#
# Loadable module support
-@@ -56,55 +54,65 @@ CONFIG_KMOD=y
+@@ -56,62 +57,71 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -4554,7 +5196,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -4601,7 +5243,16 @@
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
-@@ -127,6 +135,15 @@ CONFIG_CPU_MIPS32=y
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -127,6 +137,15 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -4617,7 +5268,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -168,6 +185,7 @@ CONFIG_PCMCIA=m
+@@ -168,6 +187,7 @@ CONFIG_PCMCIA=m
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
@@ -4625,7 +5276,7 @@
#
# Device Drivers
-@@ -183,7 +201,75 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -183,7 +203,75 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
#
@@ -4702,6 +5353,22 @@
#
# Parallel port support
+@@ -256,7 +344,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -334,7 +421,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # Ethernet (10 or 100Mbit)
@@ -417,18 +503,6 @@ CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
@@ -4721,7 +5388,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -438,6 +512,17 @@ CONFIG_SERIO_RAW=m
+@@ -438,6 +512,16 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -4733,13 +5400,12 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -472,7 +557,8 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -472,7 +556,8 @@ CONFIG_LEGACY_PTY_COUNT=256
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
@@ -4749,19 +5415,18 @@
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-@@ -488,6 +574,11 @@ CONFIG_SYNCLINK_CS=m
+@@ -488,6 +573,10 @@ CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -521,7 +612,6 @@ CONFIG_SYNCLINK_CS=m
+@@ -521,7 +610,6 @@ CONFIG_SYNCLINK_CS=m
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -4769,7 +5434,7 @@
#
# Sound
-@@ -531,12 +621,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -531,12 +619,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -4785,7 +5450,7 @@
#
# USB Gadget Support
-@@ -575,6 +662,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
+@@ -575,6 +660,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -4796,7 +5461,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -620,6 +711,8 @@ CONFIG_RAMFS=y
+@@ -620,6 +709,8 @@ CONFIG_RAMFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
@@ -4805,7 +5470,7 @@
CONFIG_CRAMFS=m
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
-@@ -708,7 +801,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
+@@ -708,7 +799,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
#
# Kernel hacking
#
@@ -4815,7 +5480,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -731,6 +826,7 @@ CONFIG_CRYPTO_NULL=y
+@@ -731,6 +824,7 @@ CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -4823,16 +5488,16 @@
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/db1100_defconfig linux_HEAD/arch/mips/configs/db1100_defconfig
---- linux-2.6.11.6/arch/mips/configs/db1100_defconfig 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/db1100_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/db1100_defconfig linux_HEAD/arch/mips/configs/db1100_defconfig
+--- linux-2.6.12/arch/mips/configs/db1100_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/db1100_defconfig 2005-07-07 11:22:47.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:01 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:27 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:03 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -4841,7 +5506,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -4852,11 +5525,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -4864,7 +5539,7 @@
#
# Loadable module support
-@@ -56,55 +54,65 @@ CONFIG_KMOD=y
+@@ -56,62 +57,71 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -4909,7 +5584,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -4956,7 +5631,16 @@
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
-@@ -127,12 +135,21 @@ CONFIG_CPU_MIPS32=y
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -127,12 +137,21 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -4979,7 +5663,24 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
-@@ -166,6 +183,7 @@ CONFIG_PCMCIA=m
+@@ -146,15 +165,7 @@ CONFIG_MMU=y
+ #
+ # PCCARD (PCMCIA/CardBus) support
+ #
+-CONFIG_PCCARD=m
+-# CONFIG_PCMCIA_DEBUG is not set
+-CONFIG_PCMCIA=m
+-
+-#
+-# PC-card bridges
+-#
+-# CONFIG_TCIC is not set
+-# CONFIG_PCMCIA_AU1X00 is not set
++# CONFIG_PCCARD is not set
+
+ #
+ # PCI Hotplug Support
+@@ -166,6 +177,7 @@ CONFIG_PCMCIA=m
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
@@ -4987,7 +5688,7 @@
#
# Device Drivers
-@@ -181,7 +199,75 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -181,7 +193,75 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
#
@@ -5064,7 +5765,51 @@
#
# Parallel port support
-@@ -415,18 +501,6 @@ CONFIG_INPUT_EVDEV=y
+@@ -254,7 +334,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -332,14 +411,13 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # Ethernet (10 or 100Mbit)
+ #
+ CONFIG_NET_ETHERNET=y
+ CONFIG_MII=m
+-# CONFIG_MIPS_AU1X00_ENET is not set
++CONFIG_MIPS_AU1X00_ENET=y
+
+ #
+ # Ethernet (1000 Mbit)
+@@ -359,19 +437,6 @@ CONFIG_MII=m
+ # CONFIG_NET_RADIO is not set
+
+ #
+-# PCMCIA network device support
+-#
+-CONFIG_NET_PCMCIA=y
+-CONFIG_PCMCIA_3C589=m
+-CONFIG_PCMCIA_3C574=m
+-CONFIG_PCMCIA_FMVJ18X=m
+-CONFIG_PCMCIA_PCNET=m
+-CONFIG_PCMCIA_NMCLAN=m
+-CONFIG_PCMCIA_SMC91C92=m
+-CONFIG_PCMCIA_XIRC2PS=m
+-CONFIG_PCMCIA_AXNET=m
+-
+-#
+ # Wan interfaces
+ #
+ # CONFIG_WAN is not set
+@@ -415,18 +480,6 @@ CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
@@ -5083,7 +5828,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -436,6 +510,17 @@ CONFIG_SERIO_RAW=m
+@@ -436,6 +489,16 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -5095,13 +5840,24 @@
+CONFIG_SERIO_LIBPS2=m
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -467,7 +552,8 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -453,7 +516,10 @@ CONFIG_HW_CONSOLE=y
+ #
+ # Non-8250 serial port support
+ #
+-# CONFIG_SERIAL_AU1X00 is not set
++CONFIG_SERIAL_AU1X00=y
++CONFIG_SERIAL_AU1X00_CONSOLE=y
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -467,7 +533,8 @@ CONFIG_LEGACY_PTY_COUNT=256
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
@@ -5111,27 +5867,65 @@
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-@@ -483,6 +569,11 @@ CONFIG_SYNCLINK_CS=m
- # CONFIG_RAW_DRIVER is not set
+@@ -475,12 +542,11 @@ CONFIG_RTC=y
+ # Ftape, the floppy tape device driver
+ #
+ # CONFIG_DRM is not set
++# CONFIG_RAW_DRIVER is not set
#
+-# PCMCIA character devices
+# TPM devices
-+#
-+# CONFIG_TCG_TPM is not set
-+
-+#
+ #
+-CONFIG_SYNCLINK_CS=m
+-# CONFIG_RAW_DRIVER is not set
+
+ #
# I2C support
+@@ -509,13 +575,41 @@ CONFIG_SYNCLINK_CS=m
#
- # CONFIG_I2C is not set
-@@ -516,7 +607,6 @@ CONFIG_SYNCLINK_CS=m
+ # Graphics support
#
+-# CONFIG_FB is not set
++CONFIG_FB=y
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++CONFIG_FB_SOFT_CURSOR=y
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++CONFIG_FB_AU1100=y
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_VIRTUAL is not set
+
+ #
+ # Console display driver support
+ #
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
--# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++CONFIG_FRAMEBUFFER_CONSOLE=y
++CONFIG_FONTS=y
++CONFIG_FONT_8x8=y
++CONFIG_FONT_8x16=y
++# CONFIG_FONT_6x11 is not set
++# CONFIG_FONT_PEARL_8x8 is not set
++# CONFIG_FONT_ACORN_8x8 is not set
++# CONFIG_FONT_MINI_4x6 is not set
++# CONFIG_FONT_SUN8x16 is not set
++# CONFIG_FONT_SUN12x22 is not set
++
++#
++# Logo configuration
++#
++CONFIG_LOGO=y
++CONFIG_LOGO_LINUX_MONO=y
++CONFIG_LOGO_LINUX_VGA16=y
++CONFIG_LOGO_LINUX_CLUT224=y
+ # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
- # Sound
-@@ -526,12 +616,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -526,12 +620,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -5147,7 +5941,7 @@
#
# USB Gadget Support
-@@ -570,6 +657,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
+@@ -570,6 +661,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -5158,7 +5952,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -615,6 +706,8 @@ CONFIG_RAMFS=y
+@@ -615,6 +710,8 @@ CONFIG_RAMFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
@@ -5167,7 +5961,7 @@
CONFIG_CRAMFS=m
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
-@@ -703,7 +796,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
+@@ -703,7 +800,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
#
# Kernel hacking
#
@@ -5177,24 +5971,24 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -726,6 +821,7 @@ CONFIG_CRYPTO_NULL=y
+@@ -726,6 +825,7 @@ CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
-+CONFIG_CRYPTO_TGR192=m
++# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/db1500_defconfig linux_HEAD/arch/mips/configs/db1500_defconfig
---- linux-2.6.11.6/arch/mips/configs/db1500_defconfig 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/db1500_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/db1500_defconfig linux_HEAD/arch/mips/configs/db1500_defconfig
+--- linux-2.6.12/arch/mips/configs/db1500_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/db1500_defconfig 2005-07-07 11:22:47.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:01 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:28 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:03 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -5203,7 +5997,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -5214,11 +6016,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -5226,7 +6030,7 @@
#
# Loadable module support
-@@ -56,56 +54,66 @@ CONFIG_KMOD=y
+@@ -56,63 +57,73 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -5271,7 +6075,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -5314,13 +6118,23 @@
CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
+# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_LITTLE_ENDIAN=y
++CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_SOC_AU1500=y
+CONFIG_SOC_AU1X00=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
-@@ -128,6 +136,15 @@ CONFIG_CPU_MIPS32=y
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -128,6 +139,15 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -5336,7 +6150,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -176,6 +193,7 @@ CONFIG_PCMCIA_AU1X00=m
+@@ -176,6 +196,7 @@ CONFIG_PCMCIA_AU1X00=m
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
@@ -5344,7 +6158,7 @@
#
# Device Drivers
-@@ -193,8 +211,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -193,8 +214,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
@@ -5354,7 +6168,7 @@
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
-@@ -239,9 +257,7 @@ CONFIG_MTD_CFI_UTIL=y
+@@ -239,9 +260,7 @@ CONFIG_MTD_CFI_UTIL=y
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
@@ -5365,7 +6179,31 @@
#
# Self-contained MTD device drivers
-@@ -549,19 +565,6 @@ CONFIG_INPUT_EVDEV=y
+@@ -367,7 +386,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -445,7 +463,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -481,6 +498,7 @@ CONFIG_MIPS_AU1X00_ENET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -549,19 +567,6 @@ CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
@@ -5385,7 +6223,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -571,6 +574,18 @@ CONFIG_SERIO_RAW=m
+@@ -571,6 +576,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -5398,13 +6236,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
# CONFIG_VT is not set
-@@ -603,7 +618,8 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -590,6 +606,7 @@ CONFIG_SERIAL_AU1X00=y
+ CONFIG_SERIAL_AU1X00_CONSOLE=y
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -603,7 +620,8 @@ CONFIG_LEGACY_PTY_COUNT=256
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
@@ -5414,7 +6259,7 @@
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-@@ -620,6 +636,11 @@ CONFIG_SYNCLINK_CS=m
+@@ -620,6 +638,11 @@ CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
@@ -5426,7 +6271,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -647,7 +668,6 @@ CONFIG_SYNCLINK_CS=m
+@@ -647,7 +670,6 @@ CONFIG_SYNCLINK_CS=m
# Graphics support
#
# CONFIG_FB is not set
@@ -5434,7 +6279,7 @@
#
# Sound
-@@ -689,6 +709,8 @@ CONFIG_SOUND_AU1000=y
+@@ -689,6 +711,8 @@ CONFIG_SOUND_AU1000=y
#
# USB support
#
@@ -5443,7 +6288,7 @@
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set
-@@ -699,14 +721,14 @@ CONFIG_USB=y
+@@ -699,14 +723,14 @@ CONFIG_USB=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
@@ -5460,7 +6305,7 @@
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
-@@ -762,6 +784,7 @@ CONFIG_USB_HIDINPUT=y
+@@ -762,6 +786,7 @@ CONFIG_USB_HIDINPUT=y
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_USBNET is not set
@@ -5468,7 +6313,7 @@
#
# USB port drivers
-@@ -828,6 +851,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
+@@ -828,6 +853,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -5479,7 +6324,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -963,7 +990,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
+@@ -963,7 +992,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
#
# Kernel hacking
#
@@ -5489,7 +6334,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -986,6 +1015,7 @@ CONFIG_CRYPTO_NULL=y
+@@ -986,6 +1017,7 @@ CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -5497,16 +6342,16 @@
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/db1550_defconfig linux_HEAD/arch/mips/configs/db1550_defconfig
---- linux-2.6.11.6/arch/mips/configs/db1550_defconfig 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/db1550_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/db1550_defconfig linux_HEAD/arch/mips/configs/db1550_defconfig
+--- linux-2.6.12/arch/mips/configs/db1550_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/db1550_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:02 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:29 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:04 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -5515,7 +6360,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -5526,11 +6379,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -5538,7 +6393,7 @@
#
# Loadable module support
-@@ -56,56 +54,66 @@ CONFIG_KMOD=y
+@@ -56,63 +57,72 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -5583,7 +6438,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -5632,7 +6487,16 @@
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
-@@ -128,6 +136,15 @@ CONFIG_CPU_MIPS32=y
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -128,6 +138,15 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -5648,7 +6512,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -176,6 +193,7 @@ CONFIG_PCMCIA_AU1X00=m
+@@ -176,6 +195,7 @@ CONFIG_PCMCIA_AU1X00=m
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
@@ -5656,7 +6520,7 @@
#
# Device Drivers
-@@ -193,8 +211,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -193,8 +213,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
@@ -5666,7 +6530,7 @@
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
-@@ -238,9 +256,7 @@ CONFIG_MTD_CFI_UTIL=y
+@@ -238,9 +258,7 @@ CONFIG_MTD_CFI_UTIL=y
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
@@ -5677,7 +6541,31 @@
#
# Self-contained MTD device drivers
-@@ -588,19 +604,6 @@ CONFIG_INPUT_EVDEV=y
+@@ -398,7 +416,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -476,7 +493,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -512,6 +528,7 @@ CONFIG_MIPS_AU1X00_ENET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -588,19 +605,6 @@ CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
@@ -5697,7 +6585,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -610,6 +613,18 @@ CONFIG_SERIO_RAW=m
+@@ -610,6 +614,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -5710,13 +6598,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
# CONFIG_VT is not set
-@@ -660,6 +675,11 @@ CONFIG_SYNCLINK_CS=m
+@@ -629,6 +644,7 @@ CONFIG_SERIAL_AU1X00=y
+ CONFIG_SERIAL_AU1X00_CONSOLE=y
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -660,6 +676,11 @@ CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
@@ -5728,7 +6623,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -687,7 +707,6 @@ CONFIG_SYNCLINK_CS=m
+@@ -687,7 +708,6 @@ CONFIG_SYNCLINK_CS=m
# Graphics support
#
# CONFIG_FB is not set
@@ -5736,7 +6631,7 @@
#
# Sound
-@@ -697,13 +716,9 @@ CONFIG_SYNCLINK_CS=m
+@@ -697,13 +717,9 @@ CONFIG_SYNCLINK_CS=m
#
# USB support
#
@@ -5751,7 +6646,7 @@
#
# USB Gadget Support
-@@ -742,6 +757,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
+@@ -742,6 +758,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -5762,7 +6657,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -877,7 +896,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
+@@ -877,7 +897,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
#
# Kernel hacking
#
@@ -5772,7 +6667,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -900,6 +921,7 @@ CONFIG_CRYPTO_NULL=y
+@@ -900,6 +922,7 @@ CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -5780,16 +6675,16 @@
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ddb5476_defconfig linux_HEAD/arch/mips/configs/ddb5476_defconfig
---- linux-2.6.11.6/arch/mips/configs/ddb5476_defconfig 2005-03-26 04:28:40.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ddb5476_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ddb5476_defconfig linux_HEAD/arch/mips/configs/ddb5476_defconfig
+--- linux-2.6.12/arch/mips/configs/ddb5476_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ddb5476_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:02 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:30 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:04 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -5798,7 +6693,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -5809,11 +6712,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -5821,7 +6726,7 @@
#
# Loadable module support
-@@ -50,40 +48,64 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -50,40 +51,63 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -5866,7 +6771,7 @@
# CONFIG_DDB5074 is not set
CONFIG_DDB5476=y
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -5896,7 +6801,18 @@
CONFIG_IRQ_CPU=y
CONFIG_DDB5XXX_COMMON=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -109,6 +131,17 @@ CONFIG_CPU_R5432=y
+@@ -92,8 +116,8 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -109,6 +133,17 @@ CONFIG_CPU_R5432=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -5914,7 +6830,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -135,11 +168,6 @@ CONFIG_MMU=y
+@@ -135,11 +170,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -5926,7 +6842,47 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -434,19 +462,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -181,7 +211,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+ # Block devices
+ #
+ # CONFIG_BLK_DEV_FD is not set
+-# CONFIG_BLK_DEV_XD is not set
+ # CONFIG_BLK_CPQ_DA is not set
+ # CONFIG_BLK_CPQ_CISS_DA is not set
+ # CONFIG_BLK_DEV_DAC960 is not set
+@@ -274,7 +303,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -336,7 +364,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -351,7 +378,6 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_HAPPYMEAL is not set
+ # CONFIG_SUNGEM is not set
+ # CONFIG_NET_VENDOR_3COM is not set
+-# CONFIG_LANCE is not set
+ # CONFIG_NET_VENDOR_SMC is not set
+ # CONFIG_NET_VENDOR_RACAL is not set
+
+@@ -378,6 +404,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -434,19 +461,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -5946,7 +6902,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -456,6 +471,18 @@ CONFIG_SERIO_RAW=y
+@@ -456,6 +470,17 @@ CONFIG_SERIO_RAW=y
# CONFIG_INPUT_MISC is not set
#
@@ -5959,13 +6915,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -502,6 +529,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -476,6 +501,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -502,6 +528,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -5977,7 +6940,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -529,6 +561,10 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -529,6 +560,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# Graphics support
#
CONFIG_FB=y
@@ -5985,6 +6948,7 @@
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_SOFT_CURSOR is not set
++# CONFIG_FB_MACMODES is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_CIRRUS is not set
@@ -5996,8 +6960,19 @@
# CONFIG_FB_RIVA is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_RADEON_OLD is not set
-@@ -574,13 +611,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -548,8 +585,10 @@ CONFIG_FB=y
+ # CONFIG_FB_KYRO is not set
+ # CONFIG_FB_3DFX is not set
+ # CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_SMIVGX is not set
+ # CONFIG_FB_TRIDENT is not set
+ # CONFIG_FB_E1356 is not set
++# CONFIG_FB_S1D13XXX is not set
+ # CONFIG_FB_VIRTUAL is not set
+
#
+@@ -574,13 +613,9 @@ CONFIG_DUMMY_CONSOLE=y
+ #
# USB support
#
-# CONFIG_USB is not set
@@ -6011,7 +6986,7 @@
#
# USB Gadget Support
-@@ -606,6 +639,10 @@ CONFIG_EXT2_FS=y
+@@ -606,6 +641,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -6022,7 +6997,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -667,7 +704,6 @@ CONFIG_NFS_FS=y
+@@ -667,7 +706,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -6030,7 +7005,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -696,7 +732,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -696,7 +734,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -6040,16 +7015,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="ip=any"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ddb5477_defconfig linux_HEAD/arch/mips/configs/ddb5477_defconfig
---- linux-2.6.11.6/arch/mips/configs/ddb5477_defconfig 2005-03-26 04:28:24.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ddb5477_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ddb5477_defconfig linux_HEAD/arch/mips/configs/ddb5477_defconfig
+--- linux-2.6.12/arch/mips/configs/ddb5477_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ddb5477_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:02 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:30 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:05 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -6058,7 +7033,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -6069,11 +7052,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -6081,7 +7066,7 @@
#
# Loadable module support
-@@ -50,41 +48,65 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -50,41 +51,64 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -6127,7 +7112,7 @@
# CONFIG_DDB5476 is not set
CONFIG_DDB5477=y
-CONFIG_DDB5477_BUS_FREQUENCY=0
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -6158,7 +7143,18 @@
CONFIG_IRQ_CPU=y
CONFIG_DDB5XXX_COMMON=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -109,6 +131,17 @@ CONFIG_CPU_R5432=y
+@@ -92,8 +116,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -109,6 +133,17 @@ CONFIG_CPU_R5432=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -6176,7 +7172,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -134,10 +167,6 @@ CONFIG_MMU=y
+@@ -134,10 +169,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -6187,7 +7183,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -415,19 +444,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -242,7 +273,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -304,7 +334,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -359,6 +388,7 @@ CONFIG_PCNET32=y
+ # CONFIG_SK98LIN is not set
+ # CONFIG_VIA_VELOCITY is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -415,19 +445,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -6207,7 +7227,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -437,6 +453,18 @@ CONFIG_SERIO_RAW=y
+@@ -437,6 +454,17 @@ CONFIG_SERIO_RAW=y
# CONFIG_INPUT_MISC is not set
#
@@ -6220,13 +7240,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -483,6 +511,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -457,6 +485,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -483,6 +512,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -6238,7 +7265,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -516,7 +549,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -516,7 +550,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -6246,7 +7273,7 @@
#
# Sound
-@@ -526,13 +558,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -526,13 +559,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -6261,7 +7288,7 @@
#
# USB Gadget Support
-@@ -558,6 +586,10 @@ CONFIG_EXT2_FS=y
+@@ -558,6 +587,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -6272,7 +7299,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -650,7 +682,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -650,7 +683,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -6282,16 +7309,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="ip=any"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/decstation_defconfig linux_HEAD/arch/mips/configs/decstation_defconfig
---- linux-2.6.11.6/arch/mips/configs/decstation_defconfig 2005-03-26 04:28:23.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/decstation_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/decstation_defconfig linux_HEAD/arch/mips/configs/decstation_defconfig
+--- linux-2.6.12/arch/mips/configs/decstation_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/decstation_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:03 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:31 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:15 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -6300,7 +7327,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -6311,11 +7346,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -6323,7 +7360,7 @@
#
# Loadable module support
-@@ -56,40 +54,64 @@ CONFIG_KMOD=y
+@@ -56,40 +57,63 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -6368,7 +7405,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -6398,7 +7435,18 @@
CONFIG_IRQ_CPU=y
CONFIG_BOOT_ELF32=y
CONFIG_MIPS_L1_CACHE_SHIFT=4
-@@ -114,6 +136,16 @@ CONFIG_CPU_R3000=y
+@@ -97,8 +121,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=4
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ CONFIG_CPU_R3000=y
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -114,6 +138,16 @@ CONFIG_CPU_R3000=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -6415,7 +7463,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -134,10 +166,6 @@ CONFIG_MMU=y
+@@ -134,10 +168,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -6426,6 +7474,22 @@
# PCI Hotplug Support
#
+@@ -266,7 +296,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -328,7 +357,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # Ethernet (10 or 100Mbit)
@@ -391,18 +419,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
@@ -6445,7 +7509,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -412,6 +428,17 @@ CONFIG_SERIO_RAW=m
+@@ -412,12 +428,23 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -6457,25 +7521,30 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -456,6 +483,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+ CONFIG_VT_CONSOLE=y
+ CONFIG_HW_CONSOLE=y
+ # CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_SERIAL_DEC is not set
+
+ #
+ # Serial drivers
+@@ -456,6 +483,10 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -489,7 +521,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -489,7 +520,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -6483,7 +7552,7 @@
#
# Sound
-@@ -503,10 +534,6 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -503,10 +533,6 @@ CONFIG_DUMMY_CONSOLE=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -6494,7 +7563,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -534,6 +561,10 @@ CONFIG_FS_MBCACHE=y
+@@ -534,6 +560,10 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -6505,7 +7574,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -590,7 +621,6 @@ CONFIG_RAMFS=y
+@@ -590,7 +620,6 @@ CONFIG_RAMFS=y
#
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
@@ -6513,7 +7582,7 @@
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
-@@ -630,7 +660,9 @@ CONFIG_ULTRIX_PARTITION=y
+@@ -630,7 +659,9 @@ CONFIG_ULTRIX_PARTITION=y
#
# Kernel hacking
#
@@ -6523,16 +7592,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/e55_defconfig linux_HEAD/arch/mips/configs/e55_defconfig
---- linux-2.6.11.6/arch/mips/configs/e55_defconfig 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/e55_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/e55_defconfig linux_HEAD/arch/mips/configs/e55_defconfig
+--- linux-2.6.12/arch/mips/configs/e55_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/e55_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:03 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:32 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:15 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -6541,7 +7610,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -6552,11 +7629,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -6564,7 +7643,7 @@
#
# Loadable module support
-@@ -56,47 +54,72 @@ CONFIG_KMOD=y
+@@ -56,55 +57,79 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -6617,7 +7696,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -6655,7 +7734,17 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -120,6 +143,17 @@ CONFIG_CPU_VR41XX=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ CONFIG_CPU_VR41XX=y
+@@ -120,6 +145,17 @@ CONFIG_CPU_VR41XX=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -6673,7 +7762,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -140,11 +174,6 @@ CONFIG_MMU=y
+@@ -140,11 +176,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -6685,7 +7774,39 @@
# PCI Hotplug Support
#
-@@ -408,18 +437,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -185,7 +216,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+ # Block devices
+ #
+ # CONFIG_BLK_DEV_FD is not set
+-# CONFIG_BLK_DEV_XD is not set
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ # CONFIG_BLK_DEV_LOOP is not set
+ # CONFIG_BLK_DEV_NBD is not set
+@@ -270,7 +300,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -330,7 +359,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -343,7 +371,6 @@ CONFIG_NETDEVICES=y
+ CONFIG_NET_ETHERNET=y
+ # CONFIG_MII is not set
+ # CONFIG_NET_VENDOR_3COM is not set
+-# CONFIG_LANCE is not set
+ # CONFIG_NET_VENDOR_SMC is not set
+ # CONFIG_NET_VENDOR_RACAL is not set
+ # CONFIG_AT1700 is not set
+@@ -408,18 +435,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -6704,7 +7825,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -429,6 +446,17 @@ CONFIG_SERIO_RAW=m
+@@ -429,6 +444,16 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -6716,13 +7837,12 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -449,6 +477,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+@@ -449,6 +474,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
@@ -6730,19 +7850,18 @@
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-@@ -487,6 +516,11 @@ CONFIG_WATCHDOG=y
+@@ -487,6 +513,10 @@ CONFIG_WATCHDOG=y
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -521,7 +555,6 @@ CONFIG_WATCHDOG=y
+@@ -521,7 +551,6 @@ CONFIG_WATCHDOG=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -6750,7 +7869,7 @@
#
# Sound
-@@ -535,10 +568,6 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -535,10 +564,6 @@ CONFIG_DUMMY_CONSOLE=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -6761,7 +7880,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -562,6 +591,10 @@ CONFIG_EXT2_FS=y
+@@ -562,6 +587,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -6772,7 +7891,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -653,7 +686,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -653,7 +682,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -6782,16 +7901,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ev64120_defconfig linux_HEAD/arch/mips/configs/ev64120_defconfig
---- linux-2.6.11.6/arch/mips/configs/ev64120_defconfig 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ev64120_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ev64120_defconfig linux_HEAD/arch/mips/configs/ev64120_defconfig
+--- linux-2.6.12/arch/mips/configs/ev64120_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ev64120_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:03 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:33 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:16 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -6800,7 +7919,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -6811,11 +7938,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -6823,7 +7952,7 @@
#
# Loadable module support
-@@ -56,40 +54,64 @@ CONFIG_MODULE_SRCVERSION_ALL=y
+@@ -56,40 +57,63 @@ CONFIG_MODULE_SRCVERSION_ALL=y
#
# Machine selection
#
@@ -6869,7 +7998,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -6899,7 +8028,18 @@
CONFIG_MIPS_GT64120=y
# CONFIG_SYSCLK_75 is not set
# CONFIG_SYSCLK_83 is not set
-@@ -116,6 +138,17 @@ CONFIG_CPU_R5000=y
+@@ -99,8 +123,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -116,6 +140,17 @@ CONFIG_CPU_R5000=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -6917,7 +8057,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -142,10 +175,6 @@ CONFIG_MMU=y
+@@ -142,10 +177,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -6928,7 +8068,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -409,19 +438,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -249,7 +280,6 @@ CONFIG_NET=y
+ # Networking options
+ #
+ # CONFIG_PACKET is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -311,7 +341,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -346,6 +375,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -409,19 +439,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -6948,7 +8112,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -431,6 +447,18 @@ CONFIG_SERIO_RAW=m
+@@ -431,6 +448,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -6961,13 +8125,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -477,6 +505,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -451,6 +479,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -477,6 +506,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -6979,7 +8150,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -510,7 +543,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -510,7 +544,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -6987,7 +8158,7 @@
#
# Sound
-@@ -520,13 +552,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -520,13 +553,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -7002,7 +8173,7 @@
#
# USB Gadget Support
-@@ -552,6 +580,10 @@ CONFIG_EXT2_FS=y
+@@ -552,6 +581,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -7013,7 +8184,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -613,7 +645,6 @@ CONFIG_NFS_FS=y
+@@ -613,7 +646,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -7021,7 +8192,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -642,7 +673,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -642,7 +674,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -7031,16 +8202,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/disk2/fs.gal ip=192.168.1.211:192.168.1.1:::gt::"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ev96100_defconfig linux_HEAD/arch/mips/configs/ev96100_defconfig
---- linux-2.6.11.6/arch/mips/configs/ev96100_defconfig 2005-03-26 04:28:23.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ev96100_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ev96100_defconfig linux_HEAD/arch/mips/configs/ev96100_defconfig
+--- linux-2.6.12/arch/mips/configs/ev96100_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ev96100_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:03 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:33 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:16 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -7049,7 +8220,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -7060,11 +8239,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -7072,7 +8253,7 @@
#
# Loadable module support
-@@ -56,39 +54,63 @@ CONFIG_MODULE_SRCVERSION_ALL=y
+@@ -56,39 +57,62 @@ CONFIG_MODULE_SRCVERSION_ALL=y
#
# Machine selection
#
@@ -7117,7 +8298,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -7146,7 +8327,18 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_GT64120=y
CONFIG_SWAP_IO_SPACE=y
-@@ -115,6 +137,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+@@ -98,8 +122,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -115,6 +139,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_CPU_RM7000=y
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -7164,7 +8356,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -142,10 +175,6 @@ CONFIG_MMU=y
+@@ -142,10 +177,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -7175,6 +8367,22 @@
# PCI Hotplug Support
#
+@@ -241,7 +272,6 @@ CONFIG_NET=y
+ # Networking options
+ #
+ # CONFIG_PACKET is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -303,7 +333,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # Ethernet (10 or 100Mbit)
@@ -366,18 +395,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
@@ -7194,7 +8402,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -387,6 +404,17 @@ CONFIG_SERIO_RAW=m
+@@ -387,6 +404,16 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -7206,25 +8414,23 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -432,6 +460,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -432,6 +459,10 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -465,7 +498,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -465,7 +496,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -7232,7 +8438,7 @@
#
# Sound
-@@ -479,10 +511,6 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -479,10 +509,6 @@ CONFIG_DUMMY_CONSOLE=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -7243,7 +8449,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -506,6 +534,10 @@ CONFIG_EXT2_FS=y
+@@ -506,6 +532,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -7254,7 +8460,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -567,7 +599,6 @@ CONFIG_NFS_FS=y
+@@ -567,7 +597,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -7262,7 +8468,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -596,7 +627,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -596,7 +625,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -7272,16 +8478,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ip22_defconfig linux_HEAD/arch/mips/configs/ip22_defconfig
---- linux-2.6.11.6/arch/mips/configs/ip22_defconfig 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ip22_defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ip22_defconfig linux_HEAD/arch/mips/configs/ip22_defconfig
+--- linux-2.6.12/arch/mips/configs/ip22_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ip22_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:04 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:34 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:17 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -7290,7 +8496,15 @@
#
# Code maturity level options
-@@ -25,7 +22,6 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,7 +23,6 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -7298,15 +8512,17 @@
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
-@@ -33,6 +29,7 @@ CONFIG_IKCONFIG_PROC=y
+@@ -33,6 +30,9 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -42,6 +39,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -42,6 +42,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -7314,7 +8530,7 @@
#
# Loadable module support
-@@ -57,40 +55,64 @@ CONFIG_KMOD=y
+@@ -57,40 +58,63 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -7359,7 +8575,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
CONFIG_SGI_IP22=y
@@ -7389,7 +8605,18 @@
CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_ARC32=y
-@@ -119,6 +141,17 @@ CONFIG_CPU_R5000=y
+@@ -102,8 +126,8 @@ CONFIG_ARC_PROMLIB=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -119,6 +143,17 @@ CONFIG_CPU_R5000=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -7407,7 +8634,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -135,6 +168,7 @@ CONFIG_CPU_HAS_SYNC=y
+@@ -135,6 +170,7 @@ CONFIG_CPU_HAS_SYNC=y
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
@@ -7415,7 +8642,7 @@
# CONFIG_EISA is not set
CONFIG_MMU=y
-@@ -144,10 +178,6 @@ CONFIG_MMU=y
+@@ -144,10 +180,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -7426,7 +8653,15 @@
# PCI Hotplug Support
#
-@@ -409,7 +439,7 @@ CONFIG_IP_NF_ARPFILTER=m
+@@ -276,7 +308,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -409,7 +440,7 @@ CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
#
@@ -7435,7 +8670,7 @@
#
CONFIG_IP6_NF_QUEUE=m
CONFIG_IP6_NF_IPTABLES=m
-@@ -478,6 +508,7 @@ CONFIG_NET_SCH_INGRESS=m
+@@ -478,6 +509,7 @@ CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
@@ -7443,7 +8678,7 @@
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
-@@ -488,6 +519,7 @@ CONFIG_NET_CLS_U32=m
+@@ -488,6 +520,7 @@ CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_MARK is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
@@ -7451,6 +8686,14 @@
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
+@@ -505,7 +538,6 @@ CONFIG_DUMMY=m
+ CONFIG_BONDING=m
+ CONFIG_EQUALIZER=m
+ CONFIG_TUN=m
+-CONFIG_ETHERTAP=m
+
+ #
+ # Ethernet (10 or 100Mbit)
@@ -568,18 +600,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
@@ -7470,7 +8713,7 @@
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
-@@ -597,6 +617,17 @@ CONFIG_MOUSE_SERIAL=m
+@@ -597,6 +617,16 @@ CONFIG_MOUSE_SERIAL=m
# CONFIG_INPUT_MISC is not set
#
@@ -7482,25 +8725,23 @@
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -648,6 +679,11 @@ CONFIG_RAW_DRIVER=m
+@@ -648,6 +678,10 @@ CONFIG_RAW_DRIVER=m
CONFIG_MAX_RAW_DEVS=256
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -692,7 +728,6 @@ CONFIG_LOGO=y
+@@ -692,7 +726,6 @@ CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_LOGO_SGI_CLUT224=y
@@ -7508,7 +8749,7 @@
#
# Sound
-@@ -706,10 +741,6 @@ CONFIG_LOGO_SGI_CLUT224=y
+@@ -706,10 +739,6 @@ CONFIG_LOGO_SGI_CLUT224=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -7519,7 +8760,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -739,7 +770,12 @@ CONFIG_FS_MBCACHE=y
+@@ -739,7 +768,12 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -7532,7 +8773,7 @@
# CONFIG_XFS_RT is not set
CONFIG_XFS_QUOTA=y
CONFIG_XFS_SECURITY=y
-@@ -907,7 +943,9 @@ CONFIG_NLS_UTF8=m
+@@ -907,7 +941,9 @@ CONFIG_NLS_UTF8=m
#
# Kernel hacking
#
@@ -7542,7 +8783,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -930,6 +968,7 @@ CONFIG_CRYPTO_SHA1=m
+@@ -930,6 +966,7 @@ CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
@@ -7550,7 +8791,7 @@
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
-@@ -944,7 +983,7 @@ CONFIG_CRYPTO_ANUBIS=m
+@@ -944,7 +981,7 @@ CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_CRC32C=m
@@ -7559,16 +8800,16 @@
#
# Hardware crypto devices
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ip27_defconfig linux_HEAD/arch/mips/configs/ip27_defconfig
---- linux-2.6.11.6/arch/mips/configs/ip27_defconfig 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ip27_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ip27_defconfig linux_HEAD/arch/mips/configs/ip27_defconfig
+--- linux-2.6.12/arch/mips/configs/ip27_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ip27_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,11 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:04 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:35 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:17 2005
#
CONFIG_MIPS=y
-CONFIG_MIPS64=y
@@ -7576,7 +8817,15 @@
#
# Code maturity level options
-@@ -24,14 +22,15 @@ CONFIG_POSIX_MQUEUE=y
+@@ -13,6 +11,7 @@ CONFIG_64BIT=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -24,14 +23,17 @@ CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -7590,11 +8839,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +40,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -7602,7 +8853,7 @@
#
# Loadable module support
-@@ -57,45 +57,70 @@ CONFIG_STOP_MACHINE=y
+@@ -57,45 +60,69 @@ CONFIG_STOP_MACHINE=y
#
# Machine selection
#
@@ -7646,7 +8897,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -7683,7 +8934,18 @@
CONFIG_MIPS_L1_CACHE_SHIFT=7
CONFIG_ARC64=y
CONFIG_BOOT_ELF64=y
-@@ -121,6 +146,16 @@ CONFIG_CPU_R10000=y
+@@ -104,8 +131,8 @@ CONFIG_QL_ISP_A64=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -121,6 +148,16 @@ CONFIG_CPU_R10000=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -7700,7 +8962,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -150,10 +185,6 @@ CONFIG_MMU=y
+@@ -150,10 +187,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -7711,7 +8973,7 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -163,7 +194,7 @@ CONFIG_MMU=y
+@@ -163,7 +196,7 @@ CONFIG_MMU=y
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
@@ -7720,7 +8982,7 @@
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_MIPS32_O32=y
-@@ -179,7 +210,7 @@ CONFIG_BINFMT_ELF32=y
+@@ -179,7 +212,7 @@ CONFIG_BINFMT_ELF32=y
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
@@ -7729,7 +8991,7 @@
#
# Memory Technology Devices (MTD)
-@@ -256,7 +287,7 @@ CONFIG_SCSI_LOGGING=y
+@@ -256,7 +289,7 @@ CONFIG_SCSI_LOGGING=y
#
CONFIG_SCSI_SPI_ATTRS=y
# CONFIG_SCSI_FC_ATTRS is not set
@@ -7738,15 +9000,18 @@
#
# SCSI low-level drivers
-@@ -274,7 +305,6 @@ CONFIG_SCSI_SPI_ATTRS=y
- # CONFIG_SCSI_BUSLOGIC is not set
+@@ -271,18 +304,13 @@ CONFIG_SCSI_SPI_ATTRS=y
+ # CONFIG_MEGARAID_NEWGEN is not set
+ # CONFIG_MEGARAID_LEGACY is not set
+ # CONFIG_SCSI_SATA is not set
+-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
- # CONFIG_SCSI_EATA is not set
+-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
- # CONFIG_SCSI_GDTH is not set
+-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
-@@ -282,7 +312,6 @@ CONFIG_SCSI_SPI_ATTRS=y
+ # CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
@@ -7754,6 +9019,14 @@
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
CONFIG_SCSI_QLA2XXX=y
+@@ -291,6 +319,7 @@ CONFIG_SCSI_QLA2XXX=y
+ # CONFIG_SCSI_QLA2300 is not set
+ # CONFIG_SCSI_QLA2322 is not set
+ # CONFIG_SCSI_QLA6312 is not set
++# CONFIG_SCSI_LPFC is not set
+ # CONFIG_SCSI_DC395x is not set
+ # CONFIG_SCSI_DC390T is not set
+ # CONFIG_SCSI_DEBUG is not set
@@ -313,6 +342,8 @@ CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
@@ -7763,7 +9036,15 @@
#
# Fusion MPT device support
-@@ -404,6 +435,7 @@ CONFIG_NET_SCH_INGRESS=m
+@@ -339,7 +370,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -404,6 +434,7 @@ CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
@@ -7771,7 +9052,7 @@
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
-@@ -413,6 +445,7 @@ CONFIG_NET_CLS_U32=m
+@@ -413,6 +444,7 @@ CONFIG_NET_CLS_U32=m
# CONFIG_NET_CLS_IND is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
@@ -7779,17 +9060,33 @@
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
-@@ -513,25 +546,16 @@ CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
+@@ -430,7 +462,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -468,6 +499,7 @@ CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -513,25 +545,15 @@ CONFIG_SGI_IOC3_ETH_HW_TX_CSUM=y
# CONFIG_INPUT is not set
#
-# Userland interfaces
-+# Hardware I/O ports
- #
+-#
-
-#
-# Input I/O drivers
--#
++# Hardware I/O ports
+ #
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
CONFIG_SERIO=y
@@ -7805,11 +9102,18 @@
-# Input Device Drivers
-#
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
#
# Character devices
-@@ -584,6 +608,11 @@ CONFIG_SGI_IP27_RTC=y
+@@ -557,6 +579,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -584,6 +607,11 @@ CONFIG_SGI_IP27_RTC=y
# CONFIG_RAW_DRIVER is not set
#
@@ -7821,7 +9125,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -611,7 +640,6 @@ CONFIG_SGI_IP27_RTC=y
+@@ -611,7 +639,6 @@ CONFIG_SGI_IP27_RTC=y
# Graphics support
#
# CONFIG_FB is not set
@@ -7829,7 +9133,7 @@
#
# Sound
-@@ -621,13 +649,9 @@ CONFIG_SGI_IP27_RTC=y
+@@ -621,13 +648,9 @@ CONFIG_SGI_IP27_RTC=y
#
# USB support
#
@@ -7844,7 +9148,7 @@
#
# USB Gadget Support
-@@ -642,7 +666,11 @@ CONFIG_USB_ARCH_HAS_OHCI=y
+@@ -642,7 +665,11 @@ CONFIG_USB_ARCH_HAS_OHCI=y
#
# InfiniBand support
#
@@ -7857,7 +9161,7 @@
#
# File systems
-@@ -661,6 +689,10 @@ CONFIG_FS_MBCACHE=y
+@@ -661,6 +688,10 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -7868,7 +9172,7 @@
CONFIG_XFS_FS=m
# CONFIG_XFS_RT is not set
CONFIG_XFS_QUOTA=y
-@@ -728,7 +760,6 @@ CONFIG_NFS_V3=y
+@@ -728,7 +759,6 @@ CONFIG_NFS_V3=y
# CONFIG_ROOT_NFS is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
@@ -7876,7 +9180,7 @@
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
-@@ -772,7 +803,9 @@ CONFIG_SGI_PARTITION=y
+@@ -772,7 +802,9 @@ CONFIG_SGI_PARTITION=y
#
# Kernel hacking
#
@@ -7886,7 +9190,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -795,6 +828,7 @@ CONFIG_CRYPTO_SHA1=y
+@@ -795,6 +827,7 @@ CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -7894,7 +9198,7 @@
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
-@@ -809,7 +843,7 @@ CONFIG_CRYPTO_ANUBIS=m
+@@ -809,7 +842,7 @@ CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
@@ -7903,16 +9207,16 @@
#
# Hardware crypto devices
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ip32_defconfig linux_HEAD/arch/mips/configs/ip32_defconfig
---- linux-2.6.11.6/arch/mips/configs/ip32_defconfig 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ip32_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ip32_defconfig linux_HEAD/arch/mips/configs/ip32_defconfig
+--- linux-2.6.12/arch/mips/configs/ip32_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ip32_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,11 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:04 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:36 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:18 2005
#
CONFIG_MIPS=y
-CONFIG_MIPS64=y
@@ -7920,7 +9224,15 @@
#
# Code maturity level options
-@@ -25,13 +23,13 @@ CONFIG_BSD_PROCESS_ACCT=y
+@@ -13,6 +11,7 @@ CONFIG_64BIT=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +24,15 @@ CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -7931,11 +9243,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +39,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +42,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -7943,7 +9257,7 @@
#
# Loadable module support
-@@ -50,33 +49,56 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -50,33 +52,55 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -7987,7 +9301,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -8008,7 +9322,7 @@
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y
-@@ -84,7 +106,9 @@ CONFIG_ARC=y
+@@ -84,7 +108,9 @@ CONFIG_ARC=y
CONFIG_DMA_IP32=y
CONFIG_OWN_DMA=y
CONFIG_DMA_NONCOHERENT=y
@@ -8018,7 +9332,18 @@
CONFIG_ARC32=y
CONFIG_BOOT_ELF32=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -111,6 +135,16 @@ CONFIG_CPU_R5000=y
+@@ -94,8 +120,8 @@ CONFIG_ARC_PROMLIB=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -111,6 +137,16 @@ CONFIG_CPU_R5000=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -8035,7 +9360,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -138,10 +172,6 @@ CONFIG_MMU=y
+@@ -138,10 +174,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -8046,15 +9371,27 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -268,7 +298,6 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
- # CONFIG_SCSI_BUSLOGIC is not set
+@@ -243,7 +275,7 @@ CONFIG_SCSI_LOGGING=y
+ #
+ # SCSI Transport Attributes
+ #
+-# CONFIG_SCSI_SPI_ATTRS is not set
++CONFIG_SCSI_SPI_ATTRS=y
+ # CONFIG_SCSI_FC_ATTRS is not set
+ # CONFIG_SCSI_ISCSI_ATTRS is not set
+
+@@ -265,18 +297,13 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+ # CONFIG_MEGARAID_NEWGEN is not set
+ # CONFIG_MEGARAID_LEGACY is not set
+ # CONFIG_SCSI_SATA is not set
+-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
- # CONFIG_SCSI_EATA is not set
+-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
- # CONFIG_SCSI_GDTH is not set
+-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
-@@ -276,7 +305,6 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+ # CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
@@ -8062,7 +9399,39 @@
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
CONFIG_SCSI_QLA2XXX=y
-@@ -474,27 +502,26 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -285,6 +312,7 @@ CONFIG_SCSI_QLA2XXX=y
+ # CONFIG_SCSI_QLA2300 is not set
+ # CONFIG_SCSI_QLA2322 is not set
+ # CONFIG_SCSI_QLA6312 is not set
++# CONFIG_SCSI_LPFC is not set
+ # CONFIG_SCSI_DC395x is not set
+ # CONFIG_SCSI_DC390T is not set
+ # CONFIG_SCSI_DEBUG is not set
+@@ -319,7 +347,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -381,7 +408,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -417,6 +443,7 @@ CONFIG_SGI_O2MACE_ETH=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -474,27 +501,25 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -8098,11 +9467,18 @@
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
#
# Character devices
-@@ -543,6 +570,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -517,6 +542,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -543,6 +569,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -8114,7 +9490,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -576,7 +608,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -576,7 +607,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -8122,7 +9498,7 @@
#
# Sound
-@@ -586,13 +617,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -586,13 +616,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -8137,7 +9513,7 @@
#
# USB Gadget Support
-@@ -618,6 +645,10 @@ CONFIG_EXT2_FS=y
+@@ -618,6 +644,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -8148,7 +9524,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -681,7 +712,6 @@ CONFIG_NFS_V3=y
+@@ -681,7 +711,6 @@ CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
@@ -8156,7 +9532,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -720,7 +750,9 @@ CONFIG_SGI_PARTITION=y
+@@ -720,7 +749,9 @@ CONFIG_SGI_PARTITION=y
#
# Kernel hacking
#
@@ -8166,16 +9542,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/it8172_defconfig linux_HEAD/arch/mips/configs/it8172_defconfig
---- linux-2.6.11.6/arch/mips/configs/it8172_defconfig 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/it8172_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/it8172_defconfig linux_HEAD/arch/mips/configs/it8172_defconfig
+--- linux-2.6.12/arch/mips/configs/it8172_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/it8172_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:05 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:36 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:19 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -8184,7 +9560,15 @@
#
# Code maturity level options
-@@ -26,13 +23,13 @@ CONFIG_BSD_PROCESS_ACCT=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -26,13 +24,15 @@ CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -8195,11 +9579,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -42,6 +39,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -42,6 +42,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -8207,7 +9593,7 @@
#
# Loadable module support
-@@ -57,40 +55,64 @@ CONFIG_KMOD=y
+@@ -57,40 +58,63 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -8253,7 +9639,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -8283,7 +9669,18 @@
CONFIG_ITE_BOARD_GEN=y
CONFIG_IT8172_CIR=y
CONFIG_IT8712=y
-@@ -116,6 +138,17 @@ CONFIG_CPU_NEVADA=y
+@@ -99,8 +123,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -116,6 +140,17 @@ CONFIG_CPU_NEVADA=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -8301,7 +9698,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -139,10 +172,6 @@ CONFIG_MMU=y
+@@ -139,10 +174,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -8312,7 +9709,7 @@
# PCI Hotplug Support
#
-@@ -169,8 +198,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -169,8 +200,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
@@ -8322,6 +9719,22 @@
#
# User Modules And Translation Layers
+@@ -330,7 +361,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -392,7 +422,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # Ethernet (10 or 100Mbit)
@@ -454,18 +483,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
@@ -8341,7 +9754,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -475,6 +492,17 @@ CONFIG_SERIO_RAW=m
+@@ -475,6 +492,16 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -8353,25 +9766,23 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -524,6 +552,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -524,6 +551,10 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -557,7 +590,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -557,7 +588,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -8379,7 +9790,7 @@
#
# Sound
-@@ -591,10 +623,6 @@ CONFIG_SOUND_IT8172=y
+@@ -591,10 +621,6 @@ CONFIG_SOUND_IT8172=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -8390,7 +9801,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -618,6 +646,10 @@ CONFIG_EXT2_FS=y
+@@ -618,6 +644,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -8401,7 +9812,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -681,7 +713,6 @@ CONFIG_NFS_FS=y
+@@ -681,7 +711,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -8409,7 +9820,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -710,7 +741,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -710,7 +739,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -8419,16 +9830,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ivr_defconfig linux_HEAD/arch/mips/configs/ivr_defconfig
---- linux-2.6.11.6/arch/mips/configs/ivr_defconfig 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ivr_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ivr_defconfig linux_HEAD/arch/mips/configs/ivr_defconfig
+--- linux-2.6.12/arch/mips/configs/ivr_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ivr_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:05 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:37 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:19 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -8437,7 +9848,15 @@
#
# Code maturity level options
-@@ -26,13 +23,13 @@ CONFIG_BSD_PROCESS_ACCT=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -26,13 +24,15 @@ CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -8448,11 +9867,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -42,6 +39,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -42,6 +42,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -8460,7 +9881,7 @@
#
# Loadable module support
-@@ -57,39 +55,63 @@ CONFIG_KMOD=y
+@@ -57,39 +58,62 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -8505,7 +9926,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -8534,7 +9955,18 @@
CONFIG_ITE_BOARD_GEN=y
CONFIG_IT8172_CIR=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -114,6 +136,17 @@ CONFIG_CPU_NEVADA=y
+@@ -97,8 +121,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -114,6 +138,17 @@ CONFIG_CPU_NEVADA=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -8552,7 +9984,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -139,10 +172,6 @@ CONFIG_MMU=y
+@@ -139,10 +174,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -8563,7 +9995,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -422,19 +451,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -269,7 +300,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -331,7 +361,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -366,6 +395,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -422,19 +452,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -8583,7 +10039,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -444,6 +460,18 @@ CONFIG_SERIO_RAW=m
+@@ -444,6 +461,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -8596,13 +10052,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -491,6 +519,11 @@ CONFIG_RTC=y
+@@ -466,6 +494,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -491,6 +520,11 @@ CONFIG_RTC=y
# CONFIG_RAW_DRIVER is not set
#
@@ -8614,7 +10077,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -524,7 +557,6 @@ CONFIG_RTC=y
+@@ -524,7 +558,6 @@ CONFIG_RTC=y
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -8622,7 +10085,7 @@
#
# Sound
-@@ -534,13 +566,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -534,13 +567,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -8637,7 +10100,7 @@
#
# USB Gadget Support
-@@ -566,6 +594,10 @@ CONFIG_EXT2_FS=y
+@@ -566,6 +595,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -8648,7 +10111,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -627,7 +659,6 @@ CONFIG_NFS_FS=y
+@@ -627,7 +660,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -8656,7 +10119,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -656,7 +687,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -656,7 +688,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -8666,16 +10129,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/jaguar-atx_defconfig linux_HEAD/arch/mips/configs/jaguar-atx_defconfig
---- linux-2.6.11.6/arch/mips/configs/jaguar-atx_defconfig 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/jaguar-atx_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/jaguar-atx_defconfig linux_HEAD/arch/mips/configs/jaguar-atx_defconfig
+--- linux-2.6.12/arch/mips/configs/jaguar-atx_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/jaguar-atx_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:05 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:38 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:20 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -8684,7 +10147,15 @@
#
# Code maturity level options
-@@ -24,7 +21,6 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ # CONFIG_EXPERIMENTAL is not set
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -24,7 +22,6 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -8692,15 +10163,17 @@
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
-@@ -32,6 +28,7 @@ CONFIG_IKCONFIG_PROC=y
+@@ -32,6 +29,9 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -8708,7 +10181,7 @@
#
# Loadable module support
-@@ -54,35 +52,65 @@ CONFIG_KMOD=y
+@@ -54,35 +55,64 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -8754,7 +10227,7 @@
+# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -8784,7 +10257,18 @@
CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y
CONFIG_IRQ_MV64340=y
-@@ -111,6 +139,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+@@ -94,8 +124,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -111,6 +141,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_CPU_RM7000 is not set
CONFIG_CPU_RM9000=y
# CONFIG_CPU_SB1 is not set
@@ -8802,7 +10286,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -142,10 +181,6 @@ CONFIG_MMU=y
+@@ -142,10 +183,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -8813,7 +10297,15 @@
# PCI Hotplug Support
#
-@@ -265,7 +300,14 @@ CONFIG_IP_PNP_BOOTP=y
+@@ -247,7 +284,6 @@ CONFIG_NET=y
+ # Networking options
+ #
+ # CONFIG_PACKET is not set
+-# CONFIG_NETLINK_DEV is not set
+ CONFIG_UNIX=y
+ # CONFIG_NET_KEY is not set
+ CONFIG_INET=y
+@@ -265,7 +301,14 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_IPCOMP is not set
CONFIG_INET_TUNNEL=m
CONFIG_IP_TCPDIAG=m
@@ -8829,30 +10321,46 @@
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
CONFIG_XFRM_USER=m
-@@ -390,20 +432,11 @@ CONFIG_MV643XX_ETH_2=y
+@@ -345,6 +388,7 @@ CONFIG_EEPRO100=y
+ # CONFIG_SK98LIN is not set
+ # CONFIG_VIA_VELOCITY is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+ CONFIG_MV643XX_ETH=y
+ CONFIG_MV643XX_ETH_0=y
+ CONFIG_MV643XX_ETH_1=y
+@@ -390,20 +434,10 @@ CONFIG_MV643XX_ETH_2=y
# CONFIG_INPUT is not set
#
-# Userland interfaces
-#
-
--#
--# Input I/O drivers
+# Hardware I/O ports
#
-+# CONFIG_SERIO is not set
- # CONFIG_GAMEPORT is not set
- CONFIG_SOUND_GAMEPORT=y
--# CONFIG_SERIO is not set
+-# Input I/O drivers
+-#
+-# CONFIG_GAMEPORT is not set
+-CONFIG_SOUND_GAMEPORT=y
+ # CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
++# CONFIG_GAMEPORT is not set
#
# Character devices
-@@ -450,6 +483,10 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -424,6 +458,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -450,6 +485,10 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -8863,7 +10371,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -477,7 +514,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -477,7 +516,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# Graphics support
#
# CONFIG_FB is not set
@@ -8871,7 +10379,7 @@
#
# Sound
-@@ -487,13 +523,9 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -487,13 +525,9 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# USB support
#
@@ -8886,7 +10394,7 @@
#
# USB Gadget Support
-@@ -518,6 +550,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
+@@ -518,6 +552,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -8897,7 +10405,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -569,7 +605,6 @@ CONFIG_NFS_FS=y
+@@ -569,7 +607,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -8905,7 +10413,7 @@
CONFIG_SUNRPC=y
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
-@@ -590,7 +625,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -590,7 +627,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -8915,7 +10423,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -604,7 +641,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
+@@ -604,7 +643,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
#
# Cryptographic options
#
@@ -8948,7 +10456,7 @@
#
# Hardware crypto devices
-@@ -615,6 +676,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
+@@ -615,6 +678,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
@@ -8958,16 +10466,16 @@
+CONFIG_ZLIB_DEFLATE=m
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/jmr3927_defconfig linux_HEAD/arch/mips/configs/jmr3927_defconfig
---- linux-2.6.11.6/arch/mips/configs/jmr3927_defconfig 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/jmr3927_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/jmr3927_defconfig linux_HEAD/arch/mips/configs/jmr3927_defconfig
+--- linux-2.6.12/arch/mips/configs/jmr3927_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/jmr3927_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:06 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:39 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:20 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -8976,7 +10484,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -8987,11 +10503,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -8999,7 +10517,7 @@
#
# Loadable module support
-@@ -50,39 +48,63 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -50,39 +51,62 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -9044,7 +10562,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -9073,7 +10591,18 @@
CONFIG_MIPS_TX3927=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -108,6 +130,15 @@ CONFIG_CPU_TX39XX=y
+@@ -91,8 +115,8 @@ CONFIG_TOSHIBA_BOARDS=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ CONFIG_CPU_TX39XX=y
+ # CONFIG_CPU_VR41XX is not set
+@@ -108,6 +132,15 @@ CONFIG_CPU_TX39XX=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -9089,7 +10618,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -132,10 +163,6 @@ CONFIG_MMU=y
+@@ -132,10 +165,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -9100,7 +10629,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -393,19 +420,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -240,7 +269,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -302,7 +330,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -337,6 +364,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -393,19 +421,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -9120,7 +10673,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -415,6 +429,18 @@ CONFIG_SERIO_RAW=y
+@@ -415,6 +430,17 @@ CONFIG_SERIO_RAW=y
# CONFIG_INPUT_MISC is not set
#
@@ -9133,13 +10686,12 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -425,7 +451,6 @@ CONFIG_SERIAL_NONSTANDARD=y
+@@ -425,11 +451,9 @@ CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_ROCKETPORT is not set
# CONFIG_CYCLADES is not set
# CONFIG_DIGIEPCA is not set
@@ -9147,7 +10699,11 @@
# CONFIG_MOXA_INTELLIO is not set
# CONFIG_MOXA_SMARTIO is not set
# CONFIG_ISI is not set
-@@ -437,10 +462,6 @@ CONFIG_SERIAL_NONSTANDARD=y
+-# CONFIG_SYNCLINK is not set
+ # CONFIG_SYNCLINKMP is not set
+ # CONFIG_N_HDLC is not set
+ # CONFIG_RISCOM8 is not set
+@@ -437,10 +461,6 @@ CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_SX is not set
# CONFIG_RIO is not set
# CONFIG_STALDRV is not set
@@ -9158,7 +10714,7 @@
#
# Serial drivers
-@@ -450,6 +471,12 @@ CONFIG_TXX927_SERIAL_CONSOLE=y
+@@ -450,6 +470,13 @@ CONFIG_TXX927_SERIAL_CONSOLE=y
#
# Non-8250 serial port support
#
@@ -9168,6 +10724,7 @@
+CONFIG_HAS_TXX9_SERIAL=y
+CONFIG_SERIAL_TXX9_CONSOLE=y
+CONFIG_SERIAL_TXX9_STDSERIAL=y
++# CONFIG_SERIAL_JSM is not set
# CONFIG_UNIX98_PTYS is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@@ -9183,7 +10740,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -503,6 +535,10 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -503,6 +535,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# Graphics support
#
CONFIG_FB=y
@@ -9191,10 +10748,11 @@
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_SOFT_CURSOR is not set
++# CONFIG_FB_MACMODES is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_CIRRUS is not set
-@@ -510,6 +546,7 @@ CONFIG_FB=y
+@@ -510,6 +547,7 @@ CONFIG_FB=y
# CONFIG_FB_CYBER2000 is not set
# CONFIG_FB_ASILIANT is not set
# CONFIG_FB_IMSTT is not set
@@ -9202,8 +10760,19 @@
# CONFIG_FB_RIVA is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_RADEON_OLD is not set
-@@ -547,13 +584,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -522,8 +560,10 @@ CONFIG_FB=y
+ # CONFIG_FB_KYRO is not set
+ # CONFIG_FB_3DFX is not set
+ # CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_SMIVGX is not set
+ # CONFIG_FB_TRIDENT is not set
+ # CONFIG_FB_E1356 is not set
++# CONFIG_FB_S1D13XXX is not set
+ # CONFIG_FB_VIRTUAL is not set
+
#
+@@ -547,13 +587,9 @@ CONFIG_DUMMY_CONSOLE=y
+ #
# USB support
#
-# CONFIG_USB is not set
@@ -9217,7 +10786,7 @@
#
# USB Gadget Support
-@@ -578,6 +611,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
+@@ -578,6 +614,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -9228,7 +10797,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -637,7 +674,6 @@ CONFIG_NFS_FS=y
+@@ -637,7 +677,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -9236,7 +10805,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -666,7 +702,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -666,7 +705,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -9246,16 +10815,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/lasat200_defconfig linux_HEAD/arch/mips/configs/lasat200_defconfig
---- linux-2.6.11.6/arch/mips/configs/lasat200_defconfig 2005-03-26 04:28:22.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/lasat200_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/lasat200_defconfig linux_HEAD/arch/mips/configs/lasat200_defconfig
+--- linux-2.6.12/arch/mips/configs/lasat200_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/lasat200_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:06 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:39 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:21 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -9264,7 +10833,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -9275,11 +10852,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -9287,7 +10866,7 @@
#
# Loadable module support
-@@ -56,44 +54,68 @@ CONFIG_KMOD=y
+@@ -56,52 +57,75 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -9336,7 +10915,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -9370,7 +10949,17 @@
CONFIG_MIPS_GT64120=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -117,6 +139,17 @@ CONFIG_CPU_R5000=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -117,6 +141,17 @@ CONFIG_CPU_R5000=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -9388,7 +10977,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -145,10 +178,6 @@ CONFIG_MMU=y
+@@ -145,10 +180,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -9399,7 +10988,7 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -176,8 +205,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -176,8 +207,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
@@ -9409,7 +10998,23 @@
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
-@@ -521,19 +550,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -372,7 +403,6 @@ CONFIG_NET=y
+ # Networking options
+ #
+ # CONFIG_PACKET is not set
+-# CONFIG_NETLINK_DEV is not set
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -465,6 +495,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -521,19 +552,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -9429,7 +11034,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -543,6 +559,18 @@ CONFIG_SERIO_RAW=m
+@@ -543,6 +561,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -9442,13 +11047,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -589,6 +617,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -563,6 +592,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -589,6 +619,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -9460,7 +11072,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -622,7 +655,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -622,7 +657,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -9468,7 +11080,7 @@
#
# Sound
-@@ -632,13 +664,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -632,13 +666,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -9483,7 +11095,7 @@
#
# USB Gadget Support
-@@ -669,6 +697,10 @@ CONFIG_JBD=y
+@@ -669,6 +699,10 @@ CONFIG_JBD=y
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -9494,7 +11106,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -732,7 +764,6 @@ CONFIG_NFS_V3=y
+@@ -732,7 +766,6 @@ CONFIG_NFS_V3=y
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
@@ -9502,7 +11114,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -761,7 +792,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -761,7 +794,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -9512,16 +11124,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/malta_defconfig linux_HEAD/arch/mips/configs/malta_defconfig
---- linux-2.6.11.6/arch/mips/configs/malta_defconfig 2005-03-26 04:28:26.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/malta_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/malta_defconfig linux_HEAD/arch/mips/configs/malta_defconfig
+--- linux-2.6.12/arch/mips/configs/malta_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/malta_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:53:14 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:40 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:22 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -9530,7 +11142,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -9541,11 +11161,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -9553,7 +11175,7 @@
#
# Loadable module support
-@@ -56,33 +54,55 @@ CONFIG_KMOD=y
+@@ -56,33 +57,54 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -9598,7 +11220,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -9619,7 +11241,7 @@
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
-@@ -92,7 +112,10 @@ CONFIG_GENERIC_ISA_DMA=y
+@@ -92,7 +114,10 @@ CONFIG_GENERIC_ISA_DMA=y
CONFIG_I8259=y
CONFIG_MIPS_BONITO64=y
CONFIG_MIPS_MSC=y
@@ -9630,7 +11252,18 @@
CONFIG_MIPS_BOARDS_GEN=y
CONFIG_MIPS_GT64120=y
CONFIG_SWAP_IO_SPACE=y
-@@ -120,10 +143,21 @@ CONFIG_CPU_MIPS32=y
+@@ -103,8 +128,8 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
+ #
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -120,10 +145,21 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -9652,7 +11285,7 @@
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
-@@ -145,10 +179,6 @@ CONFIG_MMU=y
+@@ -145,10 +181,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -9663,15 +11296,18 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -326,7 +356,6 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
- # CONFIG_SCSI_BUSLOGIC is not set
+@@ -323,18 +355,13 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+ # CONFIG_MEGARAID_NEWGEN is not set
+ # CONFIG_MEGARAID_LEGACY is not set
+ # CONFIG_SCSI_SATA is not set
+-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
- # CONFIG_SCSI_EATA is not set
+-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
- # CONFIG_SCSI_GDTH is not set
+-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
-@@ -334,7 +363,6 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+ # CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
@@ -9679,6 +11315,14 @@
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
CONFIG_SCSI_QLA2XXX=m
+@@ -343,6 +370,7 @@ CONFIG_SCSI_QLA2XXX=m
+ # CONFIG_SCSI_QLA2300 is not set
+ # CONFIG_SCSI_QLA2322 is not set
+ # CONFIG_SCSI_QLA6312 is not set
++# CONFIG_SCSI_LPFC is not set
+ # CONFIG_SCSI_DC395x is not set
+ # CONFIG_SCSI_DC390T is not set
+ # CONFIG_SCSI_NSP32 is not set
@@ -366,6 +394,8 @@ CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
@@ -9688,6 +11332,22 @@
#
# Fusion MPT device support
+@@ -392,7 +422,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -401,6 +430,7 @@ CONFIG_IP_ADVANCED_ROUTER=y
+ CONFIG_IP_MULTIPLE_TABLES=y
+ CONFIG_IP_ROUTE_FWMARK=y
+ CONFIG_IP_ROUTE_MULTIPATH=y
++# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
+ CONFIG_IP_ROUTE_VERBOSE=y
+ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
@@ -534,7 +564,7 @@ CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
@@ -9713,6 +11373,22 @@
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
+@@ -660,7 +692,6 @@ CONFIG_DUMMY=m
+ CONFIG_BONDING=m
+ CONFIG_EQUALIZER=m
+ CONFIG_TUN=m
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -715,6 +746,7 @@ CONFIG_PCNET32=y
+ # CONFIG_SK98LIN is not set
+ # CONFIG_VIA_VELOCITY is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
@@ -772,19 +804,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
@@ -9733,7 +11409,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -794,6 +813,18 @@ CONFIG_SERIO_SERPORT=y
+@@ -794,6 +813,17 @@ CONFIG_SERIO_SERPORT=y
# CONFIG_INPUT_MISC is not set
#
@@ -9746,12 +11422,19 @@
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
+@@ -814,6 +844,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
@@ -839,6 +870,11 @@ CONFIG_RTC=y
# CONFIG_RAW_DRIVER is not set
@@ -9818,16 +11501,16 @@
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/mpc30x_defconfig linux_HEAD/arch/mips/configs/mpc30x_defconfig
---- linux-2.6.11.6/arch/mips/configs/mpc30x_defconfig 2005-03-26 04:28:32.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/mpc30x_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/mpc30x_defconfig linux_HEAD/arch/mips/configs/mpc30x_defconfig
+--- linux-2.6.12/arch/mips/configs/mpc30x_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/mpc30x_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:07 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:41 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:22 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -9836,7 +11519,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -9847,11 +11538,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -9859,7 +11552,7 @@
#
# Loadable module support
-@@ -56,48 +54,73 @@ CONFIG_KMOD=y
+@@ -56,56 +57,80 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -9913,7 +11606,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -9952,7 +11645,17 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -121,6 +144,17 @@ CONFIG_CPU_VR41XX=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ CONFIG_CPU_VR41XX=y
+@@ -121,6 +146,17 @@ CONFIG_CPU_VR41XX=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -9970,7 +11673,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -144,10 +178,6 @@ CONFIG_MMU=y
+@@ -144,10 +180,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -9981,7 +11684,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -406,19 +436,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -252,7 +284,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -315,7 +346,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -350,6 +380,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -406,19 +437,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -10001,7 +11728,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -428,6 +445,18 @@ CONFIG_SERIO_RAW=m
+@@ -428,6 +446,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -10014,21 +11741,21 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -448,6 +477,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+@@ -448,6 +477,8 @@ CONFIG_SERIAL_8250_NR_UARTS=4
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_VR41XX is not set
++# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-@@ -474,6 +504,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -474,6 +505,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -10040,7 +11767,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -507,7 +542,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -507,7 +543,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -10048,7 +11775,7 @@
#
# Sound
-@@ -517,13 +551,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -517,13 +552,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -10063,7 +11790,7 @@
#
# USB Gadget Support
-@@ -549,6 +579,10 @@ CONFIG_EXT2_FS=y
+@@ -549,6 +580,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -10074,7 +11801,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -610,7 +644,6 @@ CONFIG_NFS_FS=y
+@@ -610,7 +645,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -10082,7 +11809,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -639,7 +672,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -639,7 +673,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -10092,7 +11819,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -662,6 +697,7 @@ CONFIG_CRYPTO_NULL=y
+@@ -662,6 +698,7 @@ CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -10100,16 +11827,16 @@
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ocelot_3_defconfig linux_HEAD/arch/mips/configs/ocelot_3_defconfig
---- linux-2.6.11.6/arch/mips/configs/ocelot_3_defconfig 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ocelot_3_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ocelot_3_defconfig linux_HEAD/arch/mips/configs/ocelot_3_defconfig
+--- linux-2.6.12/arch/mips/configs/ocelot_3_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ocelot_3_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:07 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:42 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:23 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -10118,7 +11845,15 @@
#
# Code maturity level options
-@@ -25,7 +22,6 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,7 +23,6 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -10126,15 +11861,17 @@
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
-@@ -33,6 +29,7 @@ CONFIG_IKCONFIG_PROC=y
+@@ -33,6 +30,9 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -42,6 +39,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -42,6 +42,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -10142,7 +11879,7 @@
#
# Loadable module support
-@@ -57,39 +55,63 @@ CONFIG_KMOD=y
+@@ -57,39 +58,62 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -10187,7 +11924,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -10216,7 +11953,18 @@
CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y
CONFIG_IRQ_MV64340=y
-@@ -118,6 +140,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+@@ -101,8 +125,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -118,6 +142,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_CPU_RM7000 is not set
CONFIG_CPU_RM9000=y
# CONFIG_CPU_SB1 is not set
@@ -10234,7 +11982,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -149,10 +182,6 @@ CONFIG_MMU=y
+@@ -149,10 +184,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -10245,15 +11993,18 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -268,7 +297,6 @@ CONFIG_SCSI_PROC_FS=y
- # CONFIG_SCSI_BUSLOGIC is not set
+@@ -265,18 +296,13 @@ CONFIG_SCSI_PROC_FS=y
+ # CONFIG_MEGARAID_NEWGEN is not set
+ # CONFIG_MEGARAID_LEGACY is not set
+ # CONFIG_SCSI_SATA is not set
+-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
- # CONFIG_SCSI_EATA is not set
+-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
- # CONFIG_SCSI_GDTH is not set
+-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
-@@ -276,7 +304,6 @@ CONFIG_SCSI_PROC_FS=y
+ # CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
@@ -10261,7 +12012,23 @@
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
CONFIG_SCSI_QLA2XXX=m
-@@ -365,7 +392,7 @@ CONFIG_NETFILTER=y
+@@ -285,6 +311,7 @@ CONFIG_SCSI_QLA2XXX=m
+ # CONFIG_SCSI_QLA2300 is not set
+ # CONFIG_SCSI_QLA2322 is not set
+ # CONFIG_SCSI_QLA6312 is not set
++# CONFIG_SCSI_LPFC is not set
+ # CONFIG_SCSI_DC395x is not set
+ # CONFIG_SCSI_DC390T is not set
+ # CONFIG_SCSI_NSP32 is not set
+@@ -320,7 +347,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -365,7 +391,7 @@ CONFIG_NETFILTER=y
# CONFIG_IP_NF_ARPTABLES is not set
#
@@ -10270,7 +12037,15 @@
#
# CONFIG_IP6_NF_QUEUE is not set
# CONFIG_IP6_NF_IPTABLES is not set
-@@ -439,7 +466,6 @@ CONFIG_NET_PCI=y
+@@ -409,7 +435,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -439,7 +464,6 @@ CONFIG_NET_PCI=y
# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
CONFIG_E100=y
@@ -10278,7 +12053,15 @@
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
-@@ -530,19 +556,6 @@ CONFIG_INPUT=y
+@@ -465,6 +489,7 @@ CONFIG_E100=y
+ # CONFIG_SK98LIN is not set
+ # CONFIG_VIA_VELOCITY is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+ CONFIG_MV643XX_ETH=y
+ CONFIG_MV643XX_ETH_0=y
+ CONFIG_MV643XX_ETH_1=y
+@@ -530,19 +555,6 @@ CONFIG_INPUT=y
# CONFIG_INPUT_EVBUG is not set
#
@@ -10298,7 +12081,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -552,6 +565,18 @@ CONFIG_SERIO=y
+@@ -552,6 +564,17 @@ CONFIG_SERIO=y
# CONFIG_INPUT_MISC is not set
#
@@ -10311,13 +12094,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -597,6 +622,11 @@ CONFIG_RTC=y
+@@ -572,6 +595,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -597,6 +621,11 @@ CONFIG_RTC=y
# CONFIG_RAW_DRIVER is not set
#
@@ -10329,7 +12119,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -624,6 +654,10 @@ CONFIG_RTC=y
+@@ -624,6 +653,11 @@ CONFIG_RTC=y
# Graphics support
#
CONFIG_FB=y
@@ -10337,6 +12127,7 @@
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_SOFT_CURSOR is not set
++# CONFIG_FB_MACMODES is not set
CONFIG_FB_MODE_HELPERS=y
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_CIRRUS is not set
@@ -10348,8 +12139,19 @@
# CONFIG_FB_RIVA is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_RADEON_OLD is not set
-@@ -674,13 +709,9 @@ CONFIG_LOGO_LINUX_CLUT224=y
+@@ -643,8 +678,10 @@ CONFIG_FB_MODE_HELPERS=y
+ # CONFIG_FB_KYRO is not set
+ # CONFIG_FB_3DFX is not set
+ # CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_SMIVGX is not set
+ # CONFIG_FB_TRIDENT is not set
+ # CONFIG_FB_E1356 is not set
++# CONFIG_FB_S1D13XXX is not set
+ # CONFIG_FB_VIRTUAL is not set
+
#
+@@ -674,13 +711,9 @@ CONFIG_LOGO_LINUX_CLUT224=y
+ #
# USB support
#
-# CONFIG_USB is not set
@@ -10363,7 +12165,7 @@
#
# USB Gadget Support
-@@ -714,7 +745,12 @@ CONFIG_REISERFS_FS=m
+@@ -714,7 +747,12 @@ CONFIG_REISERFS_FS=m
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_REISERFS_FS_XATTR is not set
# CONFIG_JFS_FS is not set
@@ -10376,7 +12178,7 @@
# CONFIG_XFS_RT is not set
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_SECURITY is not set
-@@ -855,7 +891,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
+@@ -855,7 +893,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
#
# Kernel hacking
#
@@ -10386,16 +12188,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="ip=any root=nfs"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ocelot_c_defconfig linux_HEAD/arch/mips/configs/ocelot_c_defconfig
---- linux-2.6.11.6/arch/mips/configs/ocelot_c_defconfig 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ocelot_c_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ocelot_c_defconfig linux_HEAD/arch/mips/configs/ocelot_c_defconfig
+--- linux-2.6.12/arch/mips/configs/ocelot_c_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ocelot_c_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,11 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:07 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:43 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:23 2005
#
CONFIG_MIPS=y
-CONFIG_MIPS64=y
@@ -10403,7 +12205,15 @@
#
# Code maturity level options
-@@ -24,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -13,6 +11,7 @@ CONFIG_64BIT=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -24,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -10414,11 +12224,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -40,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -40,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -10426,7 +12238,7 @@
#
# Loadable module support
-@@ -49,38 +48,63 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -49,38 +51,62 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -10470,7 +12282,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -10498,7 +12310,18 @@
CONFIG_IRQ_CPU=y
CONFIG_IRQ_MV64340=y
CONFIG_PCI_MARVELL=y
-@@ -107,6 +131,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+@@ -90,8 +116,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -107,6 +133,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_CPU_RM7000=y
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -10516,7 +12339,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -134,10 +169,6 @@ CONFIG_MMU=y
+@@ -134,10 +171,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -10527,7 +12350,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -399,19 +430,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -245,7 +278,6 @@ CONFIG_NET=y
+ # Networking options
+ #
+ # CONFIG_PACKET is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -307,7 +339,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -342,6 +373,7 @@ CONFIG_NET_ETHERNET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+ # CONFIG_MV643XX_ETH is not set
+
+ #
+@@ -399,19 +431,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -10547,7 +12394,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -421,6 +439,18 @@ CONFIG_SERIO_RAW=y
+@@ -421,6 +440,17 @@ CONFIG_SERIO_RAW=y
# CONFIG_INPUT_MISC is not set
#
@@ -10560,13 +12407,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -467,6 +497,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -441,6 +471,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -467,6 +498,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -10578,7 +12432,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -500,7 +535,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -500,7 +536,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -10586,7 +12440,7 @@
#
# Sound
-@@ -510,13 +544,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -510,13 +545,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -10601,7 +12455,7 @@
#
# USB Gadget Support
-@@ -542,6 +572,10 @@ CONFIG_EXT2_FS=y
+@@ -542,6 +573,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -10612,7 +12466,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -634,7 +668,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -634,7 +669,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -10622,16 +12476,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ocelot_defconfig linux_HEAD/arch/mips/configs/ocelot_defconfig
---- linux-2.6.11.6/arch/mips/configs/ocelot_defconfig 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ocelot_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ocelot_defconfig linux_HEAD/arch/mips/configs/ocelot_defconfig
+--- linux-2.6.12/arch/mips/configs/ocelot_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ocelot_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:08 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:44 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:24 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -10640,7 +12494,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -10651,11 +12513,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -10663,7 +12527,7 @@
#
# Loadable module support
-@@ -50,39 +48,63 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -50,39 +51,62 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -10708,7 +12572,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -10737,7 +12601,18 @@
CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y
CONFIG_MIPS_GT64120=y
-@@ -112,6 +134,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+@@ -95,8 +119,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -112,6 +136,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_CPU_RM7000=y
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -10755,7 +12630,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -139,10 +172,6 @@ CONFIG_MMU=y
+@@ -139,10 +174,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -10766,6 +12641,22 @@
# PCI Hotplug Support
#
+@@ -238,7 +269,6 @@ CONFIG_NET=y
+ # Networking options
+ #
+ # CONFIG_PACKET is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -300,7 +330,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # Ethernet (10 or 100Mbit)
@@ -362,18 +391,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
@@ -10785,7 +12676,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -383,6 +400,17 @@ CONFIG_SERIO_RAW=y
+@@ -383,6 +400,16 @@ CONFIG_SERIO_RAW=y
# CONFIG_INPUT_MISC is not set
#
@@ -10797,25 +12688,23 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -428,6 +456,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -428,6 +455,10 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -461,7 +494,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -461,7 +492,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -10823,7 +12712,7 @@
#
# Sound
-@@ -475,10 +507,6 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -475,10 +505,6 @@ CONFIG_DUMMY_CONSOLE=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -10834,7 +12723,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -502,6 +530,10 @@ CONFIG_EXT2_FS=y
+@@ -502,6 +528,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -10845,7 +12734,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -594,7 +626,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -594,7 +624,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -10855,16 +12744,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/ocelot_g_defconfig linux_HEAD/arch/mips/configs/ocelot_g_defconfig
---- linux-2.6.11.6/arch/mips/configs/ocelot_g_defconfig 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/ocelot_g_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/ocelot_g_defconfig linux_HEAD/arch/mips/configs/ocelot_g_defconfig
+--- linux-2.6.12/arch/mips/configs/ocelot_g_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/ocelot_g_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,11 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:08 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:45 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:24 2005
#
CONFIG_MIPS=y
-CONFIG_MIPS64=y
@@ -10872,7 +12761,15 @@
#
# Code maturity level options
-@@ -24,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -13,6 +11,7 @@ CONFIG_64BIT=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -24,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -10883,11 +12780,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -40,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -40,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -10895,7 +12794,7 @@
#
# Loadable module support
-@@ -49,38 +48,63 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -49,38 +51,62 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -10939,7 +12838,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -10967,7 +12866,18 @@
CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y
CONFIG_PCI_MARVELL=y
-@@ -110,6 +134,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+@@ -93,8 +119,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -110,6 +136,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_CPU_RM7000=y
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -10985,7 +12895,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -137,10 +172,6 @@ CONFIG_MMU=y
+@@ -137,10 +174,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -10996,7 +12906,31 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -402,19 +433,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -248,7 +281,6 @@ CONFIG_NET=y
+ # Networking options
+ #
+ # CONFIG_PACKET is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -310,7 +342,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -346,6 +377,7 @@ CONFIG_GALILEO_64240_ETH=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -402,19 +434,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -11016,7 +12950,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -424,6 +442,18 @@ CONFIG_SERIO_RAW=y
+@@ -424,6 +443,17 @@ CONFIG_SERIO_RAW=y
# CONFIG_INPUT_MISC is not set
#
@@ -11029,13 +12963,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -470,6 +500,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -444,6 +474,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -470,6 +501,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -11047,7 +12988,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -503,7 +538,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -503,7 +539,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -11055,7 +12996,7 @@
#
# Sound
-@@ -513,13 +547,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -513,13 +548,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -11070,7 +13011,7 @@
#
# USB Gadget Support
-@@ -545,6 +575,10 @@ CONFIG_EXT2_FS=y
+@@ -545,6 +576,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -11081,7 +13022,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -637,7 +671,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -637,7 +672,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -11091,154 +13032,368 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/osprey_defconfig linux_HEAD/arch/mips/configs/osprey_defconfig
---- linux-2.6.11.6/arch/mips/configs/osprey_defconfig 2005-03-26 04:28:39.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/osprey_defconfig 2005-03-21 20:03:44.000000000 +0100
-@@ -1,12 +1,9 @@
- #
- # Automatically generated make config: don't edit
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/osprey_defconfig linux_HEAD/arch/mips/configs/osprey_defconfig
+--- linux-2.6.12/arch/mips/configs/osprey_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/osprey_defconfig 1970-01-01 01:00:00.000000000 +0100
+@@ -1,618 +0,0 @@
+-#
+-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:08 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:46 2005
- #
- CONFIG_MIPS=y
+-#
+-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
- #
- # Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
- # CONFIG_BSD_PROCESS_ACCT is not set
- CONFIG_SYSCTL=y
- # CONFIG_AUDIT is not set
+-
+-#
+-# Code maturity level options
+-#
+-CONFIG_EXPERIMENTAL=y
+-CONFIG_CLEAN_COMPILE=y
+-CONFIG_BROKEN_ON_SMP=y
+-
+-#
+-# General setup
+-#
+-CONFIG_LOCALVERSION=""
+-CONFIG_SWAP=y
+-CONFIG_SYSVIPC=y
+-# CONFIG_POSIX_MQUEUE is not set
+-# CONFIG_BSD_PROCESS_ACCT is not set
+-CONFIG_SYSCTL=y
+-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
- # CONFIG_HOTPLUG is not set
- CONFIG_KOBJECT_UEVENT=y
- # CONFIG_IKCONFIG is not set
- CONFIG_EMBEDDED=y
- CONFIG_KALLSYMS=y
- # CONFIG_KALLSYMS_EXTRA_PASS is not set
-+CONFIG_BASE_FULL=y
- CONFIG_FUTEX=y
- CONFIG_EPOLL=y
- # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
- CONFIG_CC_ALIGN_LOOPS=0
- CONFIG_CC_ALIGN_JUMPS=0
- # CONFIG_TINY_SHMEM is not set
-+CONFIG_BASE_SMALL=0
-
- #
- # Loadable module support
-@@ -56,39 +54,63 @@ CONFIG_KMOD=y
- #
- # Machine selection
- #
+-# CONFIG_HOTPLUG is not set
+-CONFIG_KOBJECT_UEVENT=y
+-# CONFIG_IKCONFIG is not set
+-CONFIG_EMBEDDED=y
+-CONFIG_KALLSYMS=y
+-# CONFIG_KALLSYMS_EXTRA_PASS is not set
+-CONFIG_FUTEX=y
+-CONFIG_EPOLL=y
+-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+-CONFIG_SHMEM=y
+-CONFIG_CC_ALIGN_FUNCTIONS=0
+-CONFIG_CC_ALIGN_LABELS=0
+-CONFIG_CC_ALIGN_LOOPS=0
+-CONFIG_CC_ALIGN_JUMPS=0
+-# CONFIG_TINY_SHMEM is not set
+-
+-#
+-# Loadable module support
+-#
+-CONFIG_MODULES=y
+-CONFIG_MODULE_UNLOAD=y
+-# CONFIG_MODULE_FORCE_UNLOAD is not set
+-CONFIG_OBSOLETE_MODPARM=y
+-CONFIG_MODVERSIONS=y
+-CONFIG_MODULE_SRCVERSION_ALL=y
+-CONFIG_KMOD=y
+-
+-#
+-# Machine selection
+-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-+# CONFIG_MIPS_MTX1 is not set
-+# CONFIG_MIPS_BOSPORUS is not set
-+# CONFIG_MIPS_PB1000 is not set
-+# CONFIG_MIPS_PB1100 is not set
-+# CONFIG_MIPS_PB1500 is not set
-+# CONFIG_MIPS_PB1550 is not set
-+# CONFIG_MIPS_PB1200 is not set
-+# CONFIG_MIPS_DB1000 is not set
-+# CONFIG_MIPS_DB1100 is not set
-+# CONFIG_MIPS_DB1500 is not set
-+# CONFIG_MIPS_DB1550 is not set
-+# CONFIG_MIPS_DB1200 is not set
-+# CONFIG_MIPS_MIRAGE is not set
- # CONFIG_MIPS_COBALT is not set
- # CONFIG_MACH_DECSTATION is not set
- # CONFIG_MIPS_EV64120 is not set
- # CONFIG_MIPS_EV96100 is not set
- # CONFIG_MIPS_IVR is not set
+-# CONFIG_MIPS_COBALT is not set
+-# CONFIG_MACH_DECSTATION is not set
+-# CONFIG_MIPS_EV64120 is not set
+-# CONFIG_MIPS_EV96100 is not set
+-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
- # CONFIG_MIPS_ITE8172 is not set
-+# CONFIG_MACH_JAZZ is not set
-+# CONFIG_LASAT is not set
- # CONFIG_MIPS_ATLAS is not set
- # CONFIG_MIPS_MALTA is not set
- # CONFIG_MIPS_SEAD is not set
-+# CONFIG_MOMENCO_JAGUAR_ATX is not set
- # CONFIG_MOMENCO_OCELOT is not set
+-# CONFIG_MIPS_ITE8172 is not set
+-# CONFIG_MIPS_ATLAS is not set
+-# CONFIG_MIPS_MALTA is not set
+-# CONFIG_MIPS_SEAD is not set
+-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
- # CONFIG_MOMENCO_OCELOT_3 is not set
+-# CONFIG_MOMENCO_OCELOT_3 is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-+# CONFIG_MOMENCO_OCELOT_C is not set
-+# CONFIG_MOMENCO_OCELOT_G is not set
-+# CONFIG_MIPS_XXS1500 is not set
- # CONFIG_DDB5074 is not set
- # CONFIG_DDB5476 is not set
- # CONFIG_DDB5477 is not set
- CONFIG_NEC_OSPREY=y
-+# CONFIG_MACH_VR41XX is not set
-+# CONFIG_PMC_YOSEMITE is not set
- # CONFIG_SGI_IP22 is not set
+-# CONFIG_DDB5074 is not set
+-# CONFIG_DDB5476 is not set
+-# CONFIG_DDB5477 is not set
+-CONFIG_NEC_OSPREY=y
+-# CONFIG_SGI_IP22 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-+# CONFIG_SGI_IP27 is not set
-+# CONFIG_SGI_IP32 is not set
-+# CONFIG_SIBYTE_SWARM is not set
-+# CONFIG_SIBYTE_SENTOSA is not set
-+# CONFIG_SIBYTE_RHONE is not set
-+# CONFIG_SIBYTE_CARMEL is not set
-+# CONFIG_SIBYTE_PTSWARM is not set
-+# CONFIG_SIBYTE_LITTLESUR is not set
-+# CONFIG_SIBYTE_CRHINE is not set
-+# CONFIG_SIBYTE_CRHONE is not set
- # CONFIG_SNI_RM200_PCI is not set
-+# CONFIG_TOSHIBA_JMR3927 is not set
- # CONFIG_TOSHIBA_RBTX4927 is not set
- CONFIG_RWSEM_GENERIC_SPINLOCK=y
- CONFIG_GENERIC_CALIBRATE_DELAY=y
- CONFIG_HAVE_DEC_LOCK=y
- CONFIG_DMA_NONCOHERENT=y
-+# CONFIG_CPU_BIG_ENDIAN is not set
- CONFIG_CPU_LITTLE_ENDIAN=y
-+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
- CONFIG_IRQ_CPU=y
- CONFIG_MIPS_L1_CACHE_SHIFT=5
- CONFIG_VR4181=y
-@@ -113,6 +135,17 @@ CONFIG_CPU_VR41XX=y
- # CONFIG_CPU_RM7000 is not set
- # CONFIG_CPU_RM9000 is not set
- # CONFIG_CPU_SB1 is not set
-+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-+CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
-+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-+CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
-+
-+#
-+# Kernel type
-+#
-+CONFIG_MIPS32=y
-+# CONFIG_MIPS64 is not set
-+# CONFIG_64BIT is not set
- CONFIG_PAGE_SIZE_4KB=y
- # CONFIG_PAGE_SIZE_8KB is not set
- # CONFIG_PAGE_SIZE_16KB is not set
-@@ -132,10 +165,6 @@ CONFIG_MMU=y
- # CONFIG_PCCARD is not set
-
- #
+-# CONFIG_SNI_RM200_PCI is not set
+-# CONFIG_TOSHIBA_RBTX4927 is not set
+-CONFIG_RWSEM_GENERIC_SPINLOCK=y
+-CONFIG_GENERIC_CALIBRATE_DELAY=y
+-CONFIG_HAVE_DEC_LOCK=y
+-CONFIG_DMA_NONCOHERENT=y
+-CONFIG_CPU_LITTLE_ENDIAN=y
+-CONFIG_IRQ_CPU=y
+-CONFIG_MIPS_L1_CACHE_SHIFT=5
+-CONFIG_VR4181=y
+-
+-#
+-# CPU selection
+-#
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
+-# CONFIG_CPU_R3000 is not set
+-# CONFIG_CPU_TX39XX is not set
+-CONFIG_CPU_VR41XX=y
+-# CONFIG_CPU_R4300 is not set
+-# CONFIG_CPU_R4X00 is not set
+-# CONFIG_CPU_TX49XX is not set
+-# CONFIG_CPU_R5000 is not set
+-# CONFIG_CPU_R5432 is not set
+-# CONFIG_CPU_R6000 is not set
+-# CONFIG_CPU_NEVADA is not set
+-# CONFIG_CPU_R8000 is not set
+-# CONFIG_CPU_R10000 is not set
+-# CONFIG_CPU_RM7000 is not set
+-# CONFIG_CPU_RM9000 is not set
+-# CONFIG_CPU_SB1 is not set
+-CONFIG_PAGE_SIZE_4KB=y
+-# CONFIG_PAGE_SIZE_8KB is not set
+-# CONFIG_PAGE_SIZE_16KB is not set
+-# CONFIG_PAGE_SIZE_64KB is not set
+-# CONFIG_CPU_ADVANCED is not set
+-CONFIG_CPU_HAS_SYNC=y
+-# CONFIG_PREEMPT is not set
+-
+-#
+-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+-#
+-CONFIG_MMU=y
+-
+-#
+-# PCCARD (PCMCIA/CardBus) support
+-#
+-# CONFIG_PCCARD is not set
+-
+-#
-# PC-card bridges
-#
-
-#
- # PCI Hotplug Support
- #
-
-@@ -356,18 +385,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
- # CONFIG_INPUT_EVBUG is not set
-
- #
+-# PCI Hotplug Support
+-#
+-
+-#
+-# Executable file formats
+-#
+-CONFIG_BINFMT_ELF=y
+-# CONFIG_BINFMT_MISC is not set
+-CONFIG_TRAD_SIGNALS=y
+-
+-#
+-# Device Drivers
+-#
+-
+-#
+-# Generic Driver Options
+-#
+-CONFIG_STANDALONE=y
+-CONFIG_PREVENT_FIRMWARE_BUILD=y
+-# CONFIG_FW_LOADER is not set
+-
+-#
+-# Memory Technology Devices (MTD)
+-#
+-# CONFIG_MTD is not set
+-
+-#
+-# Parallel port support
+-#
+-# CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-
+-#
+-# Block devices
+-#
+-# CONFIG_BLK_DEV_FD is not set
+-# CONFIG_BLK_DEV_COW_COMMON is not set
+-# CONFIG_BLK_DEV_LOOP is not set
+-# CONFIG_BLK_DEV_NBD is not set
+-# CONFIG_BLK_DEV_RAM is not set
+-CONFIG_BLK_DEV_RAM_COUNT=16
+-CONFIG_INITRAMFS_SOURCE=""
+-# CONFIG_LBD is not set
+-CONFIG_CDROM_PKTCDVD=m
+-CONFIG_CDROM_PKTCDVD_BUFFERS=8
+-# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+-
+-#
+-# IO Schedulers
+-#
+-CONFIG_IOSCHED_NOOP=y
+-CONFIG_IOSCHED_AS=y
+-CONFIG_IOSCHED_DEADLINE=y
+-CONFIG_IOSCHED_CFQ=y
+-CONFIG_ATA_OVER_ETH=m
+-
+-#
+-# ATA/ATAPI/MFM/RLL support
+-#
+-# CONFIG_IDE is not set
+-
+-#
+-# SCSI device support
+-#
+-# CONFIG_SCSI is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+-# CONFIG_MD is not set
+-
+-#
+-# Fusion MPT device support
+-#
+-
+-#
+-# IEEE 1394 (FireWire) support
+-#
+-
+-#
+-# I2O device support
+-#
+-
+-#
+-# Networking support
+-#
+-CONFIG_NET=y
+-
+-#
+-# Networking options
+-#
+-CONFIG_PACKET=y
+-# CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+-CONFIG_UNIX=y
+-CONFIG_NET_KEY=y
+-CONFIG_INET=y
+-# CONFIG_IP_MULTICAST is not set
+-# CONFIG_IP_ADVANCED_ROUTER is not set
+-CONFIG_IP_PNP=y
+-# CONFIG_IP_PNP_DHCP is not set
+-CONFIG_IP_PNP_BOOTP=y
+-# CONFIG_IP_PNP_RARP is not set
+-# CONFIG_NET_IPIP is not set
+-# CONFIG_NET_IPGRE is not set
+-# CONFIG_ARPD is not set
+-# CONFIG_SYN_COOKIES is not set
+-# CONFIG_INET_AH is not set
+-# CONFIG_INET_ESP is not set
+-# CONFIG_INET_IPCOMP is not set
+-CONFIG_INET_TUNNEL=m
+-CONFIG_IP_TCPDIAG=m
+-# CONFIG_IP_TCPDIAG_IPV6 is not set
+-# CONFIG_IPV6 is not set
+-# CONFIG_NETFILTER is not set
+-CONFIG_XFRM=y
+-CONFIG_XFRM_USER=m
+-
+-#
+-# SCTP Configuration (EXPERIMENTAL)
+-#
+-# CONFIG_IP_SCTP is not set
+-# CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
+-# CONFIG_VLAN_8021Q is not set
+-# CONFIG_DECNET is not set
+-# CONFIG_LLC2 is not set
+-# CONFIG_IPX is not set
+-# CONFIG_ATALK is not set
+-# CONFIG_X25 is not set
+-# CONFIG_LAPB is not set
+-# CONFIG_NET_DIVERT is not set
+-# CONFIG_ECONET is not set
+-# CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+-# CONFIG_NET_SCHED is not set
+-# CONFIG_NET_CLS_ROUTE is not set
+-
+-#
+-# Network testing
+-#
+-# CONFIG_NET_PKTGEN is not set
+-# CONFIG_NETPOLL is not set
+-# CONFIG_NET_POLL_CONTROLLER is not set
+-# CONFIG_HAMRADIO is not set
+-# CONFIG_IRDA is not set
+-# CONFIG_BT is not set
+-CONFIG_NETDEVICES=y
+-# CONFIG_DUMMY is not set
+-# CONFIG_BONDING is not set
+-# CONFIG_EQUALIZER is not set
+-# CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+-
+-#
+-# Ethernet (10 or 100Mbit)
+-#
+-CONFIG_NET_ETHERNET=y
+-# CONFIG_MII is not set
+-
+-#
+-# Ethernet (1000 Mbit)
+-#
+-
+-#
+-# Ethernet (10000 Mbit)
+-#
+-
+-#
+-# Token Ring devices
+-#
+-
+-#
+-# Wireless LAN (non-hamradio)
+-#
+-# CONFIG_NET_RADIO is not set
+-
+-#
+-# Wan interfaces
+-#
+-# CONFIG_WAN is not set
+-# CONFIG_PPP is not set
+-# CONFIG_SLIP is not set
+-# CONFIG_SHAPER is not set
+-# CONFIG_NETCONSOLE is not set
+-
+-#
+-# ISDN subsystem
+-#
+-# CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+-# CONFIG_PHONE is not set
+-
+-#
+-# Input device support
+-#
+-CONFIG_INPUT=y
+-
+-#
+-# Userland interfaces
+-#
+-CONFIG_INPUT_MOUSEDEV=y
+-CONFIG_INPUT_MOUSEDEV_PSAUX=y
+-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+-# CONFIG_INPUT_JOYDEV is not set
+-# CONFIG_INPUT_TSDEV is not set
+-# CONFIG_INPUT_EVDEV is not set
+-# CONFIG_INPUT_EVBUG is not set
+-
+-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
@@ -11251,97 +13406,264 @@
-CONFIG_SERIO_RAW=m
-
-#
- # Input Device Drivers
- #
- # CONFIG_INPUT_KEYBOARD is not set
-@@ -377,6 +394,17 @@ CONFIG_SERIO_RAW=m
- # CONFIG_INPUT_MISC is not set
-
- #
-+# Hardware I/O ports
-+#
-+CONFIG_SERIO=y
-+# CONFIG_SERIO_I8042 is not set
-+CONFIG_SERIO_SERPORT=y
-+# CONFIG_SERIO_LIBPS2 is not set
-+CONFIG_SERIO_RAW=m
-+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
-+
-+#
- # Character devices
- #
- CONFIG_VT=y
-@@ -397,6 +425,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
- #
- CONFIG_SERIAL_CORE=y
- CONFIG_SERIAL_CORE_CONSOLE=y
-+# CONFIG_SERIAL_VR41XX is not set
- CONFIG_UNIX98_PTYS=y
- CONFIG_LEGACY_PTYS=y
- CONFIG_LEGACY_PTY_COUNT=256
-@@ -422,6 +451,11 @@ CONFIG_LEGACY_PTY_COUNT=256
- # CONFIG_RAW_DRIVER is not set
-
- #
-+# TPM devices
-+#
-+# CONFIG_TCG_TPM is not set
-+
-+#
- # I2C support
- #
- # CONFIG_I2C is not set
-@@ -455,7 +489,6 @@ CONFIG_LEGACY_PTY_COUNT=256
- #
- # CONFIG_VGA_CONSOLE is not set
- CONFIG_DUMMY_CONSOLE=y
+-# Input Device Drivers
+-#
+-# CONFIG_INPUT_KEYBOARD is not set
+-# CONFIG_INPUT_MOUSE is not set
+-# CONFIG_INPUT_JOYSTICK is not set
+-# CONFIG_INPUT_TOUCHSCREEN is not set
+-# CONFIG_INPUT_MISC is not set
+-
+-#
+-# Character devices
+-#
+-CONFIG_VT=y
+-CONFIG_VT_CONSOLE=y
+-CONFIG_HW_CONSOLE=y
+-# CONFIG_SERIAL_NONSTANDARD is not set
+-
+-#
+-# Serial drivers
+-#
+-CONFIG_SERIAL_8250=y
+-CONFIG_SERIAL_8250_CONSOLE=y
+-CONFIG_SERIAL_8250_NR_UARTS=4
+-# CONFIG_SERIAL_8250_EXTENDED is not set
+-
+-#
+-# Non-8250 serial port support
+-#
+-CONFIG_SERIAL_CORE=y
+-CONFIG_SERIAL_CORE_CONSOLE=y
+-CONFIG_UNIX98_PTYS=y
+-CONFIG_LEGACY_PTYS=y
+-CONFIG_LEGACY_PTY_COUNT=256
+-
+-#
+-# IPMI
+-#
+-# CONFIG_IPMI_HANDLER is not set
+-
+-#
+-# Watchdog Cards
+-#
+-# CONFIG_WATCHDOG is not set
+-# CONFIG_RTC is not set
+-# CONFIG_GEN_RTC is not set
+-# CONFIG_DTLK is not set
+-# CONFIG_R3964 is not set
+-
+-#
+-# Ftape, the floppy tape device driver
+-#
+-# CONFIG_DRM is not set
+-# CONFIG_RAW_DRIVER is not set
+-
+-#
+-# I2C support
+-#
+-# CONFIG_I2C is not set
+-
+-#
+-# Dallas's 1-wire bus
+-#
+-# CONFIG_W1 is not set
+-
+-#
+-# Misc devices
+-#
+-
+-#
+-# Multimedia devices
+-#
+-# CONFIG_VIDEO_DEV is not set
+-
+-#
+-# Digital Video Broadcasting Devices
+-#
+-# CONFIG_DVB is not set
+-
+-#
+-# Graphics support
+-#
+-# CONFIG_FB is not set
+-
+-#
+-# Console display driver support
+-#
+-# CONFIG_VGA_CONSOLE is not set
+-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
- #
- # Sound
-@@ -469,10 +502,6 @@ CONFIG_DUMMY_CONSOLE=y
- # CONFIG_USB_ARCH_HAS_OHCI is not set
-
- #
+-
+-#
+-# Sound
+-#
+-# CONFIG_SOUND is not set
+-
+-#
+-# USB support
+-#
+-# CONFIG_USB_ARCH_HAS_HCD is not set
+-# CONFIG_USB_ARCH_HAS_OHCI is not set
+-
+-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
-
-#
- # USB Gadget Support
- #
- # CONFIG_USB_GADGET is not set
-@@ -496,6 +525,10 @@ CONFIG_EXT2_FS=y
- # CONFIG_JBD is not set
- # CONFIG_REISERFS_FS is not set
- # CONFIG_JFS_FS is not set
-+
-+#
-+# XFS support
-+#
- # CONFIG_XFS_FS is not set
- # CONFIG_MINIX_FS is not set
- # CONFIG_ROMFS_FS is not set
-@@ -588,7 +621,9 @@ CONFIG_MSDOS_PARTITION=y
- #
- # Kernel hacking
- #
-+# CONFIG_PRINTK_TIME is not set
- # CONFIG_DEBUG_KERNEL is not set
-+CONFIG_LOG_BUF_SHIFT=14
- CONFIG_CROSSCOMPILE=y
- CONFIG_CMDLINE="ip=bootp ether=46,0x03fe0300,eth0"
-
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/pb1100_defconfig linux_HEAD/arch/mips/configs/pb1100_defconfig
---- linux-2.6.11.6/arch/mips/configs/pb1100_defconfig 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/pb1100_defconfig 2005-03-21 20:03:44.000000000 +0100
+-# USB Gadget Support
+-#
+-# CONFIG_USB_GADGET is not set
+-
+-#
+-# MMC/SD Card support
+-#
+-# CONFIG_MMC is not set
+-
+-#
+-# InfiniBand support
+-#
+-# CONFIG_INFINIBAND is not set
+-
+-#
+-# File systems
+-#
+-CONFIG_EXT2_FS=y
+-# CONFIG_EXT2_FS_XATTR is not set
+-# CONFIG_EXT3_FS is not set
+-# CONFIG_JBD is not set
+-# CONFIG_REISERFS_FS is not set
+-# CONFIG_JFS_FS is not set
+-# CONFIG_XFS_FS is not set
+-# CONFIG_MINIX_FS is not set
+-# CONFIG_ROMFS_FS is not set
+-# CONFIG_QUOTA is not set
+-CONFIG_DNOTIFY=y
+-# CONFIG_AUTOFS_FS is not set
+-# CONFIG_AUTOFS4_FS is not set
+-
+-#
+-# CD-ROM/DVD Filesystems
+-#
+-# CONFIG_ISO9660_FS is not set
+-# CONFIG_UDF_FS is not set
+-
+-#
+-# DOS/FAT/NT Filesystems
+-#
+-# CONFIG_MSDOS_FS is not set
+-# CONFIG_VFAT_FS is not set
+-# CONFIG_NTFS_FS is not set
+-
+-#
+-# Pseudo filesystems
+-#
+-CONFIG_PROC_FS=y
+-CONFIG_PROC_KCORE=y
+-CONFIG_SYSFS=y
+-# CONFIG_DEVFS_FS is not set
+-CONFIG_DEVPTS_FS_XATTR=y
+-CONFIG_DEVPTS_FS_SECURITY=y
+-# CONFIG_TMPFS is not set
+-# CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-
+-#
+-# Miscellaneous filesystems
+-#
+-# CONFIG_ADFS_FS is not set
+-# CONFIG_AFFS_FS is not set
+-# CONFIG_HFS_FS is not set
+-# CONFIG_HFSPLUS_FS is not set
+-# CONFIG_BEFS_FS is not set
+-# CONFIG_BFS_FS is not set
+-# CONFIG_EFS_FS is not set
+-# CONFIG_CRAMFS is not set
+-# CONFIG_VXFS_FS is not set
+-# CONFIG_HPFS_FS is not set
+-# CONFIG_QNX4FS_FS is not set
+-# CONFIG_SYSV_FS is not set
+-# CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
+-CONFIG_NFS_FS=y
+-# CONFIG_NFS_V3 is not set
+-# CONFIG_NFS_V4 is not set
+-# CONFIG_NFS_DIRECTIO is not set
+-CONFIG_NFSD=y
+-# CONFIG_NFSD_V3 is not set
+-# CONFIG_NFSD_TCP is not set
+-CONFIG_ROOT_NFS=y
+-CONFIG_LOCKD=y
+-CONFIG_EXPORTFS=y
+-CONFIG_SUNRPC=y
+-# CONFIG_RPCSEC_GSS_KRB5 is not set
+-# CONFIG_RPCSEC_GSS_SPKM3 is not set
+-# CONFIG_SMB_FS is not set
+-# CONFIG_CIFS is not set
+-# CONFIG_NCP_FS is not set
+-# CONFIG_CODA_FS is not set
+-# CONFIG_AFS_FS is not set
+-
+-#
+-# Partition Types
+-#
+-# CONFIG_PARTITION_ADVANCED is not set
+-CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+-# CONFIG_NLS is not set
+-
+-#
+-# Profiling support
+-#
+-# CONFIG_PROFILING is not set
+-
+-#
+-# Kernel hacking
+-#
+-# CONFIG_DEBUG_KERNEL is not set
+-CONFIG_CROSSCOMPILE=y
+-CONFIG_CMDLINE="ip=bootp ether=46,0x03fe0300,eth0"
+-
+-#
+-# Security options
+-#
+-CONFIG_KEYS=y
+-CONFIG_KEYS_DEBUG_PROC_KEYS=y
+-# CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+-# CONFIG_CRYPTO is not set
+-
+-#
+-# Hardware crypto devices
+-#
+-
+-#
+-# Library routines
+-#
+-# CONFIG_CRC_CCITT is not set
+-# CONFIG_CRC32 is not set
+-CONFIG_LIBCRC32C=m
+-CONFIG_GENERIC_HARDIRQS=y
+-CONFIG_GENERIC_IRQ_PROBE=y
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/pb1100_defconfig linux_HEAD/arch/mips/configs/pb1100_defconfig
+--- linux-2.6.12/arch/mips/configs/pb1100_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/pb1100_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:08 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:47 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:25 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -11350,7 +13672,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -11361,11 +13691,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -11373,7 +13705,7 @@
#
# Loadable module support
-@@ -56,55 +54,65 @@ CONFIG_KMOD=y
+@@ -56,55 +57,64 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -11418,7 +13750,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -11465,7 +13797,18 @@
CONFIG_SWAP_IO_SPACE=y
# CONFIG_AU1X00_USB_DEVICE is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -129,12 +137,21 @@ CONFIG_CPU_MIPS32=y
+@@ -112,8 +122,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -129,12 +139,21 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -11488,7 +13831,7 @@
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
-@@ -170,6 +187,7 @@ CONFIG_PCMCIA=m
+@@ -170,6 +189,7 @@ CONFIG_PCMCIA=m
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
@@ -11496,7 +13839,7 @@
#
# Device Drivers
-@@ -187,8 +205,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -187,8 +207,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
@@ -11506,7 +13849,7 @@
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
-@@ -232,9 +250,7 @@ CONFIG_MTD_CFI_UTIL=y
+@@ -232,9 +252,7 @@ CONFIG_MTD_CFI_UTIL=y
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
@@ -11517,6 +13860,22 @@
#
# Self-contained MTD device drivers
+@@ -328,7 +346,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -406,7 +423,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # Ethernet (10 or 100Mbit)
@@ -481,18 +497,6 @@ CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
@@ -11536,7 +13895,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -502,6 +506,17 @@ CONFIG_SERIO_RAW=m
+@@ -502,6 +506,16 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -11548,13 +13907,12 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -533,7 +548,8 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -533,7 +547,8 @@ CONFIG_LEGACY_PTY_COUNT=256
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
@@ -11564,19 +13922,18 @@
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-@@ -549,6 +565,11 @@ CONFIG_SYNCLINK_CS=m
+@@ -549,6 +564,10 @@ CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -582,7 +603,6 @@ CONFIG_SYNCLINK_CS=m
+@@ -582,7 +601,6 @@ CONFIG_SYNCLINK_CS=m
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -11584,7 +13941,7 @@
#
# Sound
-@@ -592,12 +612,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -592,12 +610,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -11600,7 +13957,7 @@
#
# USB Gadget Support
-@@ -636,6 +653,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
+@@ -636,6 +651,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -11611,7 +13968,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -771,7 +792,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
+@@ -771,7 +790,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
#
# Kernel hacking
#
@@ -11621,7 +13978,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -794,6 +817,7 @@ CONFIG_CRYPTO_NULL=y
+@@ -794,6 +815,7 @@ CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -11629,16 +13986,16 @@
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/pb1500_defconfig linux_HEAD/arch/mips/configs/pb1500_defconfig
---- linux-2.6.11.6/arch/mips/configs/pb1500_defconfig 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/pb1500_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/pb1500_defconfig linux_HEAD/arch/mips/configs/pb1500_defconfig
+--- linux-2.6.12/arch/mips/configs/pb1500_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/pb1500_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:09 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:48 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:25 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -11647,7 +14004,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -11658,11 +14023,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -11670,7 +14037,7 @@
#
# Loadable module support
-@@ -56,55 +54,65 @@ CONFIG_KMOD=y
+@@ -56,63 +57,72 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -11715,7 +14082,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -11763,7 +14130,17 @@
# CONFIG_AU1X00_USB_DEVICE is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -128,6 +136,15 @@ CONFIG_CPU_MIPS32=y
+ #
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -128,6 +138,15 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -11779,7 +14156,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -177,6 +194,7 @@ CONFIG_PCCARD_NONSTATIC=m
+@@ -177,6 +196,7 @@ CONFIG_PCCARD_NONSTATIC=m
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
@@ -11787,7 +14164,7 @@
#
# Device Drivers
-@@ -192,7 +210,76 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -192,7 +212,76 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
#
@@ -11865,7 +14242,31 @@
#
# Parallel port support
-@@ -513,19 +600,6 @@ CONFIG_INPUT_EVDEV=y
+@@ -323,7 +412,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -401,7 +489,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -437,6 +524,7 @@ CONFIG_MIPS_AU1X00_ENET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -513,19 +601,6 @@ CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
@@ -11885,7 +14286,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -535,6 +609,18 @@ CONFIG_SERIO_RAW=m
+@@ -535,6 +610,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -11898,13 +14299,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
# CONFIG_VT is not set
-@@ -585,6 +671,11 @@ CONFIG_SYNCLINK_CS=m
+@@ -554,6 +640,7 @@ CONFIG_SERIAL_AU1X00=y
+ CONFIG_SERIAL_AU1X00_CONSOLE=y
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -585,6 +672,11 @@ CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
@@ -11916,7 +14324,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -612,7 +703,6 @@ CONFIG_SYNCLINK_CS=m
+@@ -612,7 +704,6 @@ CONFIG_SYNCLINK_CS=m
# Graphics support
#
# CONFIG_FB is not set
@@ -11924,7 +14332,7 @@
#
# Sound
-@@ -622,13 +712,9 @@ CONFIG_SYNCLINK_CS=m
+@@ -622,13 +713,9 @@ CONFIG_SYNCLINK_CS=m
#
# USB support
#
@@ -11939,7 +14347,7 @@
#
# USB Gadget Support
-@@ -667,6 +753,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
+@@ -667,6 +754,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -11950,7 +14358,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -712,6 +802,8 @@ CONFIG_RAMFS=y
+@@ -712,6 +803,8 @@ CONFIG_RAMFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
@@ -11959,7 +14367,7 @@
CONFIG_CRAMFS=m
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
-@@ -800,7 +892,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
+@@ -800,7 +893,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
#
# Kernel hacking
#
@@ -11969,7 +14377,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -823,6 +917,7 @@ CONFIG_CRYPTO_NULL=y
+@@ -823,6 +918,7 @@ CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -11977,16 +14385,16 @@
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/pb1550_defconfig linux_HEAD/arch/mips/configs/pb1550_defconfig
---- linux-2.6.11.6/arch/mips/configs/pb1550_defconfig 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/pb1550_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/pb1550_defconfig linux_HEAD/arch/mips/configs/pb1550_defconfig
+--- linux-2.6.12/arch/mips/configs/pb1550_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/pb1550_defconfig 2005-07-07 11:22:48.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:09 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:49 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:26 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -11995,7 +14403,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -12006,11 +14422,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -12018,7 +14436,7 @@
#
# Loadable module support
-@@ -56,56 +54,66 @@ CONFIG_KMOD=y
+@@ -56,63 +57,72 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -12063,7 +14481,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -12112,7 +14530,16 @@
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
-@@ -128,6 +136,15 @@ CONFIG_CPU_MIPS32=y
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -128,6 +138,15 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -12128,7 +14555,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -177,6 +194,7 @@ CONFIG_PCCARD_NONSTATIC=m
+@@ -177,6 +196,7 @@ CONFIG_PCCARD_NONSTATIC=m
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
@@ -12136,7 +14563,7 @@
#
# Device Drivers
-@@ -192,7 +210,76 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -192,7 +212,76 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Memory Technology Devices (MTD)
#
@@ -12214,7 +14641,31 @@
#
# Parallel port support
-@@ -505,19 +592,6 @@ CONFIG_INPUT_EVDEV=y
+@@ -323,7 +412,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -401,7 +489,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -437,6 +524,7 @@ CONFIG_MIPS_AU1X00_ENET=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -505,19 +593,6 @@ CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
#
@@ -12234,7 +14685,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -527,6 +601,18 @@ CONFIG_SERIO_RAW=m
+@@ -527,6 +602,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -12247,13 +14698,20 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
# CONFIG_VT is not set
-@@ -577,6 +663,11 @@ CONFIG_SYNCLINK_CS=m
+@@ -546,6 +632,7 @@ CONFIG_SERIAL_AU1X00=y
+ CONFIG_SERIAL_AU1X00_CONSOLE=y
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -577,6 +664,11 @@ CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
@@ -12265,7 +14723,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -604,7 +695,6 @@ CONFIG_SYNCLINK_CS=m
+@@ -604,7 +696,6 @@ CONFIG_SYNCLINK_CS=m
# Graphics support
#
# CONFIG_FB is not set
@@ -12273,7 +14731,7 @@
#
# Sound
-@@ -614,13 +704,9 @@ CONFIG_SYNCLINK_CS=m
+@@ -614,13 +705,9 @@ CONFIG_SYNCLINK_CS=m
#
# USB support
#
@@ -12288,7 +14746,7 @@
#
# USB Gadget Support
-@@ -659,6 +745,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
+@@ -659,6 +746,10 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -12299,7 +14757,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -704,6 +794,8 @@ CONFIG_RAMFS=y
+@@ -704,6 +795,8 @@ CONFIG_RAMFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
@@ -12308,7 +14766,7 @@
CONFIG_CRAMFS=m
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
-@@ -792,7 +884,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
+@@ -792,7 +885,9 @@ CONFIG_NLS_DEFAULT="iso8859-1"
#
# Kernel hacking
#
@@ -12318,7 +14776,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -815,6 +909,7 @@ CONFIG_CRYPTO_NULL=y
+@@ -815,6 +910,7 @@ CONFIG_CRYPTO_NULL=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -12326,16 +14784,16 @@
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/rm200_defconfig linux_HEAD/arch/mips/configs/rm200_defconfig
---- linux-2.6.11.6/arch/mips/configs/rm200_defconfig 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/rm200_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/rm200_defconfig linux_HEAD/arch/mips/configs/rm200_defconfig
+--- linux-2.6.12/arch/mips/configs/rm200_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/rm200_defconfig 2005-07-07 11:22:49.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:09 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:50 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:26 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -12344,23 +14802,34 @@
#
# Code maturity level options
-@@ -26,7 +23,6 @@ CONFIG_BSD_PROCESS_ACCT=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -26,14 +24,16 @@ CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
- # CONFIG_HOTPLUG is not set
+-# CONFIG_HOTPLUG is not set
++CONFIG_HOTPLUG=y
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
-@@ -34,6 +30,7 @@ CONFIG_IKCONFIG_PROC=y
+ CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -43,6 +40,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -43,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -12368,7 +14837,7 @@
#
# Loadable module support
-@@ -58,33 +56,55 @@ CONFIG_KMOD=y
+@@ -58,33 +59,54 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -12413,7 +14882,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -12434,7 +14903,7 @@
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
-@@ -93,7 +113,10 @@ CONFIG_ARC=y
+@@ -93,7 +115,10 @@ CONFIG_ARC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_I8259=y
@@ -12445,7 +14914,18 @@
CONFIG_ARC32=y
CONFIG_BOOT_ELF32=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -122,6 +145,17 @@ CONFIG_CPU_R4X00=y
+@@ -105,8 +130,8 @@ CONFIG_ARC_PROMLIB=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -122,6 +147,17 @@ CONFIG_CPU_R4X00=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -12463,7 +14943,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -136,6 +170,7 @@ CONFIG_CPU_HAS_SYNC=y
+@@ -136,6 +172,7 @@ CONFIG_CPU_HAS_SYNC=y
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
@@ -12471,7 +14951,7 @@
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
CONFIG_PCI_LEGACY_PROC=y
-@@ -150,11 +185,6 @@ CONFIG_MMU=y
+@@ -150,11 +187,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -12483,8 +14963,17 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -187,11 +217,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+@@ -175,7 +207,7 @@ CONFIG_TRAD_SIGNALS=y
#
+ CONFIG_STANDALONE=y
+ CONFIG_PREVENT_FIRMWARE_BUILD=y
+-# CONFIG_FW_LOADER is not set
++CONFIG_FW_LOADER=m
+
+ #
+ # Memory Technology Devices (MTD)
+@@ -187,11 +219,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+ #
CONFIG_PARPORT=m
CONFIG_PARPORT_PC=m
-CONFIG_PARPORT_PC_CML1=m
@@ -12497,15 +14986,48 @@
CONFIG_PARPORT_1284=y
#
-@@ -321,7 +351,6 @@ CONFIG_MEGARAID_MAILBOX=m
+@@ -203,7 +235,6 @@ CONFIG_PARPORT_1284=y
+ # Block devices
+ #
+ CONFIG_BLK_DEV_FD=m
+-# CONFIG_BLK_DEV_XD is not set
+ CONFIG_PARIDE=m
+ CONFIG_PARIDE_PARPORT=m
+
+@@ -296,17 +327,15 @@ CONFIG_SCSI_CONSTANTS=y
+ #
+ CONFIG_SCSI_SPI_ATTRS=y
+ # CONFIG_SCSI_FC_ATTRS is not set
+-# CONFIG_SCSI_ISCSI_ATTRS is not set
++CONFIG_SCSI_ISCSI_ATTRS=m
+
+ #
+ # SCSI low-level drivers
+ #
+ # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+ # CONFIG_SCSI_3W_9XXX is not set
+-# CONFIG_SCSI_7000FASST is not set
+ # CONFIG_SCSI_ACARD is not set
+ # CONFIG_SCSI_AHA152X is not set
+-# CONFIG_SCSI_AHA1542 is not set
+ # CONFIG_SCSI_AACRAID is not set
+ # CONFIG_SCSI_AIC7XXX is not set
+ # CONFIG_SCSI_AIC7XXX_OLD is not set
+@@ -317,13 +346,9 @@ CONFIG_MEGARAID_NEWGEN=y
+ CONFIG_MEGARAID_MM=m
+ CONFIG_MEGARAID_MAILBOX=m
+ # CONFIG_SCSI_SATA is not set
+-# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
- # CONFIG_SCSI_EATA is not set
+-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
- # CONFIG_SCSI_GDTH is not set
+-# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
-@@ -343,7 +372,6 @@ CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+ # CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
+ # CONFIG_SCSI_IPS is not set
+@@ -343,7 +368,6 @@ CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
@@ -12513,7 +15035,20 @@
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
CONFIG_SCSI_QLA2XXX=y
-@@ -383,6 +411,8 @@ CONFIG_BLK_DEV_DM=m
+@@ -352,11 +376,11 @@ CONFIG_SCSI_QLA2XXX=y
+ # CONFIG_SCSI_QLA2300 is not set
+ # CONFIG_SCSI_QLA2322 is not set
+ # CONFIG_SCSI_QLA6312 is not set
++# CONFIG_SCSI_LPFC is not set
+ # CONFIG_SCSI_SYM53C416 is not set
+ # CONFIG_SCSI_DC395x is not set
+ # CONFIG_SCSI_DC390T is not set
+ # CONFIG_SCSI_T128 is not set
+-# CONFIG_SCSI_U14_34F is not set
+ # CONFIG_SCSI_NSP32 is not set
+ # CONFIG_SCSI_DEBUG is not set
+
+@@ -383,6 +407,8 @@ CONFIG_BLK_DEV_DM=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
@@ -12522,7 +15057,15 @@
#
# Fusion MPT device support
-@@ -515,7 +545,7 @@ CONFIG_IP_NF_ARPFILTER=m
+@@ -409,7 +435,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=m
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=m
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=m
+ CONFIG_INET=y
+@@ -515,7 +540,7 @@ CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
#
@@ -12531,7 +15074,16 @@
#
CONFIG_IP6_NF_QUEUE=m
CONFIG_IP6_NF_IPTABLES=m
-@@ -610,6 +640,7 @@ CONFIG_NET_SCH_INGRESS=m
+@@ -566,7 +591,7 @@ CONFIG_BRIDGE_EBT_MARK_T=m
+ CONFIG_BRIDGE_EBT_REDIRECT=m
+ CONFIG_BRIDGE_EBT_SNAT=m
+ CONFIG_BRIDGE_EBT_LOG=m
+-# CONFIG_BRIDGE_EBT_ULOG is not set
++CONFIG_BRIDGE_EBT_ULOG=m
+ CONFIG_XFRM=y
+ # CONFIG_XFRM_USER is not set
+
+@@ -610,6 +635,7 @@ CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
@@ -12539,7 +15091,7 @@
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
-@@ -620,6 +651,7 @@ CONFIG_NET_CLS_U32=m
+@@ -620,6 +646,7 @@ CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_MARK is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
@@ -12547,7 +15099,48 @@
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
-@@ -793,20 +825,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -645,8 +672,6 @@ CONFIG_ROSE=m
+ CONFIG_MKISS=m
+ CONFIG_6PACK=m
+ CONFIG_BPQETHER=m
+-# CONFIG_DMASCC is not set
+-# CONFIG_SCC is not set
+ # CONFIG_BAYCOM_SER_FDX is not set
+ # CONFIG_BAYCOM_SER_HDX is not set
+ # CONFIG_BAYCOM_PAR is not set
+@@ -659,7 +684,6 @@ CONFIG_DUMMY=m
+ CONFIG_BONDING=m
+ CONFIG_EQUALIZER=m
+ CONFIG_TUN=m
+-CONFIG_ETHERTAP=m
+
+ #
+ # ARCnet devices
+@@ -674,7 +698,6 @@ CONFIG_MII=y
+ # CONFIG_HAPPYMEAL is not set
+ # CONFIG_SUNGEM is not set
+ # CONFIG_NET_VENDOR_3COM is not set
+-# CONFIG_LANCE is not set
+ # CONFIG_NET_VENDOR_SMC is not set
+ # CONFIG_NET_VENDOR_RACAL is not set
+
+@@ -695,7 +718,6 @@ CONFIG_NET_ISA=y
+ # CONFIG_LP486E is not set
+ # CONFIG_ETH16I is not set
+ CONFIG_NE2000=m
+-# CONFIG_ZNET is not set
+ # CONFIG_SEEQ8005 is not set
+ CONFIG_NET_PCI=y
+ CONFIG_PCNET32=y
+@@ -735,6 +757,7 @@ CONFIG_EEPRO100=m
+ # CONFIG_SK98LIN is not set
+ CONFIG_VIA_VELOCITY=m
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -793,20 +816,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -12568,7 +15161,7 @@
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
-@@ -827,6 +845,19 @@ CONFIG_MOUSE_PS2=y
+@@ -827,6 +836,18 @@ CONFIG_MOUSE_PS2=y
# CONFIG_INPUT_MISC is not set
#
@@ -12582,13 +15175,20 @@
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -880,6 +911,11 @@ CONFIG_RTC=m
+@@ -850,6 +871,7 @@ CONFIG_SERIAL_8250_RSA=y
+ # Non-8250 serial port support
+ #
+ CONFIG_SERIAL_CORE=m
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -880,6 +902,11 @@ CONFIG_RTC=m
# CONFIG_RAW_DRIVER is not set
#
@@ -12600,7 +15200,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -919,7 +955,6 @@ CONFIG_W1_SMEM=m
+@@ -919,7 +946,6 @@ CONFIG_W1_SMEM=m
CONFIG_VGA_CONSOLE=y
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -12608,7 +15208,7 @@
#
# Sound
-@@ -929,6 +964,8 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -929,6 +955,8 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -12617,7 +15217,7 @@
CONFIG_USB=m
# CONFIG_USB_DEBUG is not set
-@@ -939,8 +976,6 @@ CONFIG_USB_DEVICEFS=y
+@@ -939,8 +967,6 @@ CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
@@ -12626,7 +15226,7 @@
#
# USB Host Controller Drivers
-@@ -949,6 +984,8 @@ CONFIG_USB_EHCI_HCD=m
+@@ -949,6 +975,8 @@ CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_EHCI_SPLIT_ISO is not set
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
CONFIG_USB_OHCI_HCD=m
@@ -12635,7 +15235,11 @@
CONFIG_USB_UHCI_HCD=m
# CONFIG_USB_SL811_HCD is not set
-@@ -968,7 +1005,7 @@ CONFIG_USB_STORAGE=m
+@@ -964,11 +992,10 @@ CONFIG_USB_PRINTER=m
+ #
+ CONFIG_USB_STORAGE=m
+ # CONFIG_USB_STORAGE_DEBUG is not set
+-# CONFIG_USB_STORAGE_RW_DETECT is not set
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_DPCM=y
@@ -12644,7 +15248,7 @@
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_STORAGE_JUMPSHOT=y
-@@ -1045,6 +1082,7 @@ CONFIG_USB_CDCETHER=y
+@@ -1045,6 +1072,7 @@ CONFIG_USB_CDCETHER=y
# USB Network Adapters
#
CONFIG_USB_AX8817X=y
@@ -12652,7 +15256,27 @@
#
# USB port drivers
-@@ -1109,6 +1147,7 @@ CONFIG_USB_CYTHERM=m
+@@ -1056,9 +1084,11 @@ CONFIG_USB_USS720=m
+ #
+ CONFIG_USB_SERIAL=m
+ CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRPRIME=m
+ CONFIG_USB_SERIAL_BELKIN=m
+ CONFIG_USB_SERIAL_WHITEHEAT=m
+ CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++# CONFIG_USB_SERIAL_CP2101 is not set
+ CONFIG_USB_SERIAL_CYPRESS_M8=m
+ CONFIG_USB_SERIAL_EMPEG=m
+ CONFIG_USB_SERIAL_FTDI_SIO=m
+@@ -1087,6 +1117,7 @@ CONFIG_USB_SERIAL_KLSI=m
+ CONFIG_USB_SERIAL_KOBIL_SCT=m
+ CONFIG_USB_SERIAL_MCT_U232=m
+ CONFIG_USB_SERIAL_PL2303=m
++CONFIG_USB_SERIAL_HP4X=m
+ CONFIG_USB_SERIAL_SAFE=m
+ CONFIG_USB_SERIAL_SAFE_PADDED=y
+ # CONFIG_USB_SERIAL_TI is not set
+@@ -1109,6 +1140,7 @@ CONFIG_USB_CYTHERM=m
CONFIG_USB_PHIDGETKIT=m
CONFIG_USB_PHIDGETSERVO=m
# CONFIG_USB_IDMOUSE is not set
@@ -12660,7 +15284,7 @@
CONFIG_USB_TEST=m
#
-@@ -1150,7 +1189,12 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
+@@ -1150,7 +1182,12 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -12673,7 +15297,7 @@
# CONFIG_XFS_RT is not set
CONFIG_XFS_QUOTA=y
CONFIG_XFS_SECURITY=y
-@@ -1328,7 +1372,9 @@ CONFIG_NLS_UTF8=m
+@@ -1328,7 +1365,9 @@ CONFIG_NLS_UTF8=m
#
# Kernel hacking
#
@@ -12683,7 +15307,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -1351,6 +1397,7 @@ CONFIG_CRYPTO_SHA1=m
+@@ -1351,6 +1390,7 @@ CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
@@ -12691,7 +15315,7 @@
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
-@@ -1365,7 +1412,7 @@ CONFIG_CRYPTO_ANUBIS=m
+@@ -1365,7 +1405,7 @@ CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=m
CONFIG_CRYPTO_MICHAEL_MIC=m
# CONFIG_CRYPTO_CRC32C is not set
@@ -12700,16 +15324,16 @@
#
# Hardware crypto devices
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/sb1250-swarm_defconfig linux_HEAD/arch/mips/configs/sb1250-swarm_defconfig
---- linux-2.6.11.6/arch/mips/configs/sb1250-swarm_defconfig 2005-03-26 04:28:38.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/sb1250-swarm_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/sb1250-swarm_defconfig linux_HEAD/arch/mips/configs/sb1250-swarm_defconfig
+--- linux-2.6.12/arch/mips/configs/sb1250-swarm_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/sb1250-swarm_defconfig 2005-07-07 11:22:49.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:10 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:51 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:27 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -12718,7 +15342,15 @@
#
# Code maturity level options
-@@ -25,13 +22,14 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,16 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -12730,11 +15362,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +39,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +42,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -12742,7 +15376,7 @@
#
# Loadable module support
-@@ -57,32 +56,45 @@ CONFIG_STOP_MACHINE=y
+@@ -57,32 +59,44 @@ CONFIG_STOP_MACHINE=y
#
# Machine selection
#
@@ -12787,7 +15421,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -12798,7 +15432,7 @@
CONFIG_SIBYTE_SWARM=y
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_RHONE is not set
-@@ -91,9 +103,11 @@ CONFIG_SIBYTE_SWARM=y
+@@ -91,9 +105,11 @@ CONFIG_SIBYTE_SWARM=y
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
@@ -12812,7 +15446,7 @@
CONFIG_CPU_SB1_PASS_1=y
# CONFIG_CPU_SB1_PASS_2_1250 is not set
# CONFIG_CPU_SB1_PASS_2_2 is not set
-@@ -107,13 +121,14 @@ CONFIG_SIBYTE_CFE=y
+@@ -107,13 +123,14 @@ CONFIG_SIBYTE_CFE=y
# CONFIG_SIBYTE_BUS_WATCHER is not set
# CONFIG_SIBYTE_SB1250_PROF is not set
# CONFIG_SIBYTE_TBPROF is not set
@@ -12829,7 +15463,18 @@
CONFIG_SWAP_IO_SPACE=y
CONFIG_BOOT_ELF32=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -138,6 +153,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+@@ -121,8 +138,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -138,6 +155,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
CONFIG_CPU_SB1=y
@@ -12847,7 +15492,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -145,12 +171,9 @@ CONFIG_PAGE_SIZE_4KB=y
+@@ -145,12 +173,9 @@ CONFIG_PAGE_SIZE_4KB=y
# CONFIG_SIBYTE_DMA_PAGEOPS is not set
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_SB1_PASS_1_WORKAROUNDS=y
@@ -12860,7 +15505,7 @@
CONFIG_SMP=y
CONFIG_NR_CPUS=2
# CONFIG_PREEMPT is not set
-@@ -170,10 +193,6 @@ CONFIG_MMU=y
+@@ -170,10 +195,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -12871,7 +15516,7 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -183,7 +202,12 @@ CONFIG_MMU=y
+@@ -183,7 +204,12 @@ CONFIG_MMU=y
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
@@ -12885,7 +15530,7 @@
#
# Device Drivers
-@@ -227,7 +251,6 @@ CONFIG_BLK_DEV_RAM_COUNT=16
+@@ -227,7 +253,6 @@ CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=9220
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
@@ -12893,7 +15538,7 @@
CONFIG_CDROM_PKTCDVD=m
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
-@@ -263,7 +286,7 @@ CONFIG_BLK_DEV_IDEFLOPPY=y
+@@ -263,7 +288,7 @@ CONFIG_BLK_DEV_IDEFLOPPY=y
#
CONFIG_IDE_GENERIC=y
# CONFIG_BLK_DEV_IDEPCI is not set
@@ -12902,17 +15547,41 @@
# CONFIG_IDE_ARM is not set
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_IDEDMA_AUTO is not set
-@@ -445,25 +468,16 @@ CONFIG_NET_SB1250_MAC=y
+@@ -303,7 +328,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -365,7 +389,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -401,6 +424,7 @@ CONFIG_MII=y
+ CONFIG_NET_SB1250_MAC=y
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -445,25 +469,15 @@ CONFIG_NET_SB1250_MAC=y
# CONFIG_INPUT is not set
#
-# Userland interfaces
-+# Hardware I/O ports
- #
+-#
-
-#
-# Input I/O drivers
--#
++# Hardware I/O ports
+ #
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
CONFIG_SERIO=y
@@ -12927,11 +15596,30 @@
-# Input Device Drivers
-#
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
#
# Character devices
-@@ -515,6 +529,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -474,9 +488,10 @@ CONFIG_SERIAL_NONSTANDARD=y
+ # CONFIG_CYCLADES is not set
+ # CONFIG_MOXA_SMARTIO is not set
+ # CONFIG_ISI is not set
+-# CONFIG_SYNCLINK is not set
+ # CONFIG_SYNCLINKMP is not set
+ # CONFIG_N_HDLC is not set
++# CONFIG_SPECIALIX is not set
++# CONFIG_SX is not set
+ # CONFIG_STALDRV is not set
+ CONFIG_SIBYTE_SB1250_DUART=y
+ CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
+@@ -489,6 +504,7 @@ CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
+ #
+ # Non-8250 serial port support
+ #
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -515,6 +531,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -12943,7 +15631,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -542,7 +561,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -542,7 +563,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# Graphics support
#
# CONFIG_FB is not set
@@ -12951,7 +15639,7 @@
#
# Sound
-@@ -552,13 +570,9 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -552,13 +572,9 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# USB support
#
@@ -12966,7 +15654,7 @@
#
# USB Gadget Support
-@@ -588,6 +602,10 @@ CONFIG_FS_MBCACHE=y
+@@ -588,6 +604,10 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -12977,7 +15665,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -649,7 +667,6 @@ CONFIG_NFS_V3=y
+@@ -649,7 +669,6 @@ CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
@@ -12985,7 +15673,7 @@
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
-@@ -678,7 +695,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -678,7 +697,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -12995,7 +15683,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
# CONFIG_SB1XXX_CORELIS is not set
-@@ -702,6 +721,7 @@ CONFIG_CRYPTO_SHA1=y
+@@ -702,6 +723,7 @@ CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=m
@@ -13003,16 +15691,16 @@
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/sead_defconfig linux_HEAD/arch/mips/configs/sead_defconfig
---- linux-2.6.11.6/arch/mips/configs/sead_defconfig 2005-03-26 04:28:22.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/sead_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/sead_defconfig linux_HEAD/arch/mips/configs/sead_defconfig
+--- linux-2.6.12/arch/mips/configs/sead_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/sead_defconfig 2005-07-07 11:22:49.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:10 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:52 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:27 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -13021,7 +15709,13 @@
#
# Code maturity level options
-@@ -19,17 +16,17 @@ CONFIG_BROKEN_ON_SMP=y
+@@ -14,22 +11,25 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
# General setup
#
CONFIG_LOCALVERSION=""
@@ -13038,11 +15732,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -39,6 +36,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -39,6 +39,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -13050,7 +15746,7 @@
#
# Loadable module support
-@@ -48,39 +46,64 @@ CONFIG_CC_ALIGN_JUMPS=0
+@@ -48,39 +49,63 @@ CONFIG_CC_ALIGN_JUMPS=0
#
# Machine selection
#
@@ -13095,7 +15791,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -13125,7 +15821,18 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_BOARDS_GEN=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -105,6 +128,16 @@ CONFIG_CPU_MIPS32=y
+@@ -88,8 +113,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-CONFIG_CPU_MIPS32=y
+-# CONFIG_CPU_MIPS64 is not set
++CONFIG_CPU_MIPS32_R1=y
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -105,6 +130,16 @@ CONFIG_CPU_MIPS32=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -13142,7 +15849,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -127,10 +160,6 @@ CONFIG_MMU=y
+@@ -127,10 +162,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -13153,7 +15860,7 @@
# PCI Hotplug Support
#
-@@ -179,9 +208,7 @@ CONFIG_BLK_DEV_RAM_SIZE=18432
+@@ -179,9 +210,7 @@ CONFIG_BLK_DEV_RAM_SIZE=18432
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
@@ -13164,13 +15871,14 @@
#
# IO Schedulers
-@@ -237,47 +264,19 @@ CONFIG_IOSCHED_CFQ=y
+@@ -237,47 +266,18 @@ CONFIG_IOSCHED_CFQ=y
#
# Input device support
#
-CONFIG_INPUT=y
--
--#
++# CONFIG_INPUT is not set
+
+ #
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
@@ -13181,15 +15889,14 @@
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-+# CONFIG_INPUT is not set
-
- #
+-
+-#
-# Input I/O drivers
+# Hardware I/O ports
#
+# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
- CONFIG_SOUND_GAMEPORT=y
+-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
@@ -13216,7 +15923,7 @@
# CONFIG_SERIAL_NONSTANDARD is not set
#
-@@ -293,7 +292,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+@@ -293,7 +293,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
@@ -13225,13 +15932,12 @@
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-@@ -318,6 +317,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -318,6 +318,10 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
@@ -13331,16 +16037,16 @@
# CONFIG_SECURITY is not set
#
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/tb0226_defconfig linux_HEAD/arch/mips/configs/tb0226_defconfig
---- linux-2.6.11.6/arch/mips/configs/tb0226_defconfig 2005-03-26 04:28:22.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/tb0226_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/tb0226_defconfig linux_HEAD/arch/mips/configs/tb0226_defconfig
+--- linux-2.6.12/arch/mips/configs/tb0226_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/tb0226_defconfig 2005-07-07 11:22:49.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:12 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:53 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:28 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -13349,7 +16055,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -13360,11 +16074,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -13372,7 +16088,7 @@
#
# Loadable module support
-@@ -56,46 +54,71 @@ CONFIG_KMOD=y
+@@ -56,54 +57,78 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -13424,7 +16140,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -13461,7 +16177,17 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -119,6 +142,17 @@ CONFIG_CPU_VR41XX=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ CONFIG_CPU_VR41XX=y
+@@ -119,6 +144,17 @@ CONFIG_CPU_VR41XX=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -13479,7 +16205,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -140,10 +174,6 @@ CONFIG_MMU=y
+@@ -140,10 +176,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -13490,7 +16216,31 @@
# PCI Hotplug Support
#
-@@ -430,18 +460,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -295,7 +327,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=m
+ CONFIG_UNIX=y
+ # CONFIG_NET_KEY is not set
+ CONFIG_INET=y
+@@ -303,6 +334,7 @@ CONFIG_IP_MULTICAST=y
+ CONFIG_IP_ADVANCED_ROUTER=y
+ CONFIG_IP_MULTIPLE_TABLES=y
+ CONFIG_IP_ROUTE_MULTIPATH=y
++# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
+ CONFIG_IP_ROUTE_VERBOSE=y
+ CONFIG_IP_PNP=y
+ # CONFIG_IP_PNP_DHCP is not set
+@@ -361,7 +393,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # Ethernet (10 or 100Mbit)
+@@ -430,18 +461,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -13509,7 +16259,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -451,6 +469,17 @@ CONFIG_SERIO_RAW=m
+@@ -451,6 +470,16 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -13521,7 +16271,6 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
@@ -13535,19 +16284,18 @@
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-@@ -496,6 +526,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -496,6 +526,10 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -523,6 +558,10 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -523,8 +557,14 @@ CONFIG_LEGACY_PTY_COUNT=256
# Graphics support
#
CONFIG_FB=y
@@ -13555,10 +16303,14 @@
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_SOFT_CURSOR is not set
++# CONFIG_FB_MACMODES is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
++# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
-@@ -562,10 +601,6 @@ CONFIG_SOUND=y
+
+ #
+@@ -562,10 +602,6 @@ CONFIG_SOUND=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -13569,7 +16321,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -589,6 +624,10 @@ CONFIG_EXT2_FS=y
+@@ -589,6 +625,10 @@ CONFIG_EXT2_FS=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -13580,7 +16332,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
CONFIG_ROMFS_FS=m
-@@ -731,7 +770,9 @@ CONFIG_NLS_ISO8859_1=m
+@@ -731,7 +771,9 @@ CONFIG_NLS_ISO8859_1=m
#
# Kernel hacking
#
@@ -13590,16 +16342,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/tb0229_defconfig linux_HEAD/arch/mips/configs/tb0229_defconfig
---- linux-2.6.11.6/arch/mips/configs/tb0229_defconfig 2005-03-26 04:28:37.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/tb0229_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/tb0229_defconfig linux_HEAD/arch/mips/configs/tb0229_defconfig
+--- linux-2.6.12/arch/mips/configs/tb0229_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/tb0229_defconfig 2005-07-07 11:22:49.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:12 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:54 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:28 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -13608,7 +16360,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -13619,11 +16379,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -13631,7 +16393,7 @@
#
# Loadable module support
-@@ -56,49 +54,73 @@ CONFIG_KMOD=y
+@@ -56,57 +57,80 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -13686,7 +16448,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -13725,7 +16487,17 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -122,6 +144,17 @@ CONFIG_CPU_VR41XX=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ CONFIG_CPU_VR41XX=y
+@@ -122,6 +146,17 @@ CONFIG_CPU_VR41XX=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -13743,7 +16515,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -145,10 +178,6 @@ CONFIG_MMU=y
+@@ -145,10 +180,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -13754,7 +16526,39 @@
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
-@@ -444,19 +473,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -256,7 +287,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+-CONFIG_NETLINK_DEV=m
+ CONFIG_UNIX=y
+ # CONFIG_NET_KEY is not set
+ CONFIG_INET=y
+@@ -264,6 +294,7 @@ CONFIG_IP_MULTICAST=y
+ CONFIG_IP_ADVANCED_ROUTER=y
+ CONFIG_IP_MULTIPLE_TABLES=y
+ CONFIG_IP_ROUTE_MULTIPATH=y
++# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
+ CONFIG_IP_ROUTE_VERBOSE=y
+ CONFIG_IP_PNP=y
+ # CONFIG_IP_PNP_DHCP is not set
+@@ -323,7 +354,6 @@ CONFIG_DUMMY=m
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -378,6 +408,7 @@ CONFIG_EEPRO100=y
+ # CONFIG_SK98LIN is not set
+ # CONFIG_VIA_VELOCITY is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+
+ #
+ # Ethernet (10000 Mbit)
+@@ -444,19 +475,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -13774,7 +16578,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -466,6 +482,18 @@ CONFIG_SERIO_RAW=m
+@@ -466,6 +484,17 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -13787,21 +16591,21 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -486,6 +514,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+@@ -486,6 +515,8 @@ CONFIG_SERIAL_8250_NR_UARTS=4
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_VR41XX is not set
++# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-@@ -504,6 +533,7 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -504,6 +535,7 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
@@ -13809,7 +16613,7 @@
#
# Ftape, the floppy tape device driver
-@@ -512,6 +542,11 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -512,6 +544,11 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
#
@@ -13821,7 +16625,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -545,7 +580,6 @@ CONFIG_LEGACY_PTY_COUNT=256
+@@ -545,7 +582,6 @@ CONFIG_LEGACY_PTY_COUNT=256
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -13829,7 +16633,7 @@
#
# Sound
-@@ -555,13 +589,9 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -555,13 +591,9 @@ CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
@@ -13844,7 +16648,7 @@
#
# USB Gadget Support
-@@ -596,7 +626,12 @@ CONFIG_JFS_FS=m
+@@ -596,7 +628,12 @@ CONFIG_JFS_FS=m
# CONFIG_JFS_SECURITY is not set
# CONFIG_JFS_DEBUG is not set
# CONFIG_JFS_STATISTICS is not set
@@ -13857,7 +16661,7 @@
# CONFIG_XFS_RT is not set
CONFIG_XFS_QUOTA=y
# CONFIG_XFS_SECURITY is not set
-@@ -743,7 +778,9 @@ CONFIG_NLS_ISO8859_1=m
+@@ -743,7 +780,9 @@ CONFIG_NLS_ISO8859_1=m
#
# Kernel hacking
#
@@ -13867,16 +16671,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="mem=64M console=ttyS0,38400 ip=bootp root=/dev/nfs"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/workpad_defconfig linux_HEAD/arch/mips/configs/workpad_defconfig
---- linux-2.6.11.6/arch/mips/configs/workpad_defconfig 2005-03-26 04:28:25.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/workpad_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/workpad_defconfig linux_HEAD/arch/mips/configs/workpad_defconfig
+--- linux-2.6.12/arch/mips/configs/workpad_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/workpad_defconfig 2005-07-07 11:22:49.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:12 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:54 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:29 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -13885,7 +16689,15 @@
#
# Code maturity level options
-@@ -25,13 +22,13 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,13 +23,15 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -13896,11 +16708,13 @@
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -41,6 +38,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -41,6 +41,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -13908,7 +16722,7 @@
#
# Loadable module support
-@@ -56,47 +54,72 @@ CONFIG_KMOD=y
+@@ -56,55 +57,79 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -13961,7 +16775,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
@@ -13999,7 +16813,17 @@
CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-@@ -120,6 +143,17 @@ CONFIG_CPU_VR41XX=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ CONFIG_CPU_VR41XX=y
+@@ -120,6 +145,17 @@ CONFIG_CPU_VR41XX=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -14017,7 +16841,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -140,11 +174,6 @@ CONFIG_MMU=y
+@@ -140,11 +176,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -14029,7 +16853,39 @@
# PCI Hotplug Support
#
-@@ -408,18 +437,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+@@ -185,7 +216,6 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
+ # Block devices
+ #
+ # CONFIG_BLK_DEV_FD is not set
+-# CONFIG_BLK_DEV_XD is not set
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ # CONFIG_BLK_DEV_LOOP is not set
+ # CONFIG_BLK_DEV_NBD is not set
+@@ -270,7 +300,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -330,7 +359,6 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ # CONFIG_TUN is not set
+-# CONFIG_ETHERTAP is not set
+
+ #
+ # ARCnet devices
+@@ -343,7 +371,6 @@ CONFIG_NETDEVICES=y
+ CONFIG_NET_ETHERNET=y
+ # CONFIG_MII is not set
+ # CONFIG_NET_VENDOR_3COM is not set
+-# CONFIG_LANCE is not set
+ # CONFIG_NET_VENDOR_SMC is not set
+ # CONFIG_NET_VENDOR_RACAL is not set
+ # CONFIG_AT1700 is not set
+@@ -408,18 +435,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
#
@@ -14048,7 +16904,7 @@
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
-@@ -429,6 +446,17 @@ CONFIG_SERIO_RAW=m
+@@ -429,6 +444,16 @@ CONFIG_SERIO_RAW=m
# CONFIG_INPUT_MISC is not set
#
@@ -14060,13 +16916,12 @@
+# CONFIG_SERIO_LIBPS2 is not set
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -449,6 +477,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+@@ -449,6 +474,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
@@ -14074,19 +16929,18 @@
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-@@ -487,6 +516,11 @@ CONFIG_WATCHDOG=y
+@@ -487,6 +513,10 @@ CONFIG_WATCHDOG=y
# CONFIG_RAW_DRIVER is not set
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -521,7 +555,6 @@ CONFIG_WATCHDOG=y
+@@ -521,7 +551,6 @@ CONFIG_WATCHDOG=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
@@ -14094,7 +16948,7 @@
#
# Sound
-@@ -535,10 +568,6 @@ CONFIG_DUMMY_CONSOLE=y
+@@ -535,10 +564,6 @@ CONFIG_DUMMY_CONSOLE=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -14105,7 +16959,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -566,6 +595,10 @@ CONFIG_FS_MBCACHE=y
+@@ -566,6 +591,10 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -14116,7 +16970,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -657,7 +690,9 @@ CONFIG_MSDOS_PARTITION=y
+@@ -657,7 +686,9 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -14126,16 +16980,16 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/configs/yosemite_defconfig linux_HEAD/arch/mips/configs/yosemite_defconfig
---- linux-2.6.11.6/arch/mips/configs/yosemite_defconfig 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/arch/mips/configs/yosemite_defconfig 2005-03-21 20:03:44.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/configs/yosemite_defconfig linux_HEAD/arch/mips/configs/yosemite_defconfig
+--- linux-2.6.12/arch/mips/configs/yosemite_defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/configs/yosemite_defconfig 2005-07-07 11:22:49.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:49:13 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:55 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:29 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -14144,7 +16998,15 @@
#
# Code maturity level options
-@@ -24,15 +21,16 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ # CONFIG_EXPERIMENTAL is not set
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -24,15 +22,18 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -14158,11 +17020,13 @@
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -42,6 +40,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -42,6 +43,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -14170,7 +17034,7 @@
#
# Loadable module support
-@@ -56,34 +55,64 @@ CONFIG_STOP_MACHINE=y
+@@ -56,34 +58,63 @@ CONFIG_STOP_MACHINE=y
#
# Machine selection
#
@@ -14216,7 +17080,7 @@
+# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+CONFIG_PMC_YOSEMITE=y
# CONFIG_SGI_IP22 is not set
@@ -14245,7 +17109,18 @@
CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y
CONFIG_IRQ_CPU_RM9K=y
-@@ -110,6 +139,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+@@ -93,8 +124,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -110,6 +141,17 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_CPU_RM7000 is not set
CONFIG_CPU_RM9000=y
# CONFIG_CPU_SB1 is not set
@@ -14263,7 +17138,15 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -140,10 +180,6 @@ CONFIG_MMU=y
+@@ -132,6 +174,7 @@ CONFIG_HW_HAS_PCI=y
+ CONFIG_PCI=y
+ CONFIG_PCI_LEGACY_PROC=y
+ CONFIG_PCI_NAMES=y
++# CONFIG_PCI_DEBUG is not set
+ CONFIG_MMU=y
+
+ #
+@@ -140,10 +183,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -14274,7 +17157,15 @@
# PCI Hotplug Support
#
-@@ -265,7 +301,14 @@ CONFIG_IP_PNP_BOOTP=y
+@@ -247,7 +286,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=m
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=m
+ CONFIG_UNIX=y
+ # CONFIG_NET_KEY is not set
+ CONFIG_INET=y
+@@ -265,7 +303,14 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_IPCOMP is not set
CONFIG_INET_TUNNEL=m
CONFIG_IP_TCPDIAG=m
@@ -14290,30 +17181,46 @@
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
CONFIG_XFRM_USER=m
-@@ -371,20 +414,11 @@ CONFIG_TITAN_GE=y
+@@ -329,6 +374,7 @@ CONFIG_MII=y
+ # CONFIG_R8169 is not set
+ # CONFIG_SK98LIN is not set
+ # CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
+ CONFIG_TITAN_GE=y
+
+ #
+@@ -371,20 +417,10 @@ CONFIG_TITAN_GE=y
# CONFIG_INPUT is not set
#
-# Userland interfaces
-#
-
--#
--# Input I/O drivers
+# Hardware I/O ports
#
-+# CONFIG_SERIO is not set
- # CONFIG_GAMEPORT is not set
- CONFIG_SOUND_GAMEPORT=y
--# CONFIG_SERIO is not set
+-# Input I/O drivers
+-#
+-# CONFIG_GAMEPORT is not set
+-CONFIG_SOUND_GAMEPORT=y
+ # CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
++# CONFIG_GAMEPORT is not set
#
# Character devices
-@@ -432,6 +466,10 @@ CONFIG_GEN_RTC_X=y
+@@ -405,6 +441,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
+ #
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
+ CONFIG_UNIX98_PTYS=y
+ CONFIG_LEGACY_PTYS=y
+ CONFIG_LEGACY_PTY_COUNT=256
+@@ -432,6 +469,10 @@ CONFIG_GEN_RTC_X=y
# CONFIG_RAW_DRIVER is not set
#
@@ -14324,7 +17231,7 @@
# I2C support
#
# CONFIG_I2C is not set
-@@ -459,7 +497,6 @@ CONFIG_GEN_RTC_X=y
+@@ -459,7 +500,6 @@ CONFIG_GEN_RTC_X=y
# Graphics support
#
# CONFIG_FB is not set
@@ -14332,7 +17239,7 @@
#
# Sound
-@@ -469,13 +506,9 @@ CONFIG_GEN_RTC_X=y
+@@ -469,13 +509,9 @@ CONFIG_GEN_RTC_X=y
#
# USB support
#
@@ -14347,7 +17254,7 @@
#
# USB Gadget Support
-@@ -500,6 +533,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
+@@ -500,6 +536,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
@@ -14358,7 +17265,7 @@
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
-@@ -552,7 +589,6 @@ CONFIG_NFS_FS=y
+@@ -552,7 +592,6 @@ CONFIG_NFS_FS=y
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -14366,7 +17273,7 @@
CONFIG_SUNRPC=y
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
-@@ -573,8 +609,10 @@ CONFIG_MSDOS_PARTITION=y
+@@ -573,8 +612,10 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
@@ -14377,7 +17284,7 @@
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_SPINLOCK is not set
-@@ -599,7 +637,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
+@@ -599,7 +640,31 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
#
# Cryptographic options
#
@@ -14410,7 +17317,7 @@
#
# Hardware crypto devices
-@@ -610,6 +672,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
+@@ -610,6 +675,8 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
@@ -14420,16 +17327,16 @@
+CONFIG_ZLIB_DEFLATE=m
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/ddb5xxx/Kconfig linux_HEAD/arch/mips/ddb5xxx/Kconfig
---- linux-2.6.11.6/arch/mips/ddb5xxx/Kconfig 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ddb5xxx/Kconfig linux_HEAD/arch/mips/ddb5xxx/Kconfig
+--- linux-2.6.12/arch/mips/ddb5xxx/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/ddb5xxx/Kconfig 2005-01-30 21:45:36.000000000 +0100
@@ -0,0 +1,4 @@
+config DDB5477_BUS_FREQUENCY
+ int "bus frequency (in kHZ, 0 for auto-detect)"
+ depends on DDB5477
+ default 0
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/ddb5xxx/ddb5074/nile4_pic.c linux_HEAD/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
---- linux-2.6.11.6/arch/mips/ddb5xxx/ddb5074/nile4_pic.c 2005-03-26 04:28:41.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ddb5xxx/ddb5074/nile4_pic.c linux_HEAD/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
+--- linux-2.6.12/arch/mips/ddb5xxx/ddb5074/nile4_pic.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/ddb5xxx/ddb5074/nile4_pic.c 2005-02-28 16:56:41.000000000 +0100
@@ -209,14 +209,13 @@ static void nile4_irq_end(unsigned int i
#define nile4_irq_shutdown nile4_disable_irq
@@ -14453,8 +17360,50 @@
};
void nile4_irq_setup(u32 base) {
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c linux_HEAD/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c
---- linux-2.6.11.6/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c 2005-03-26 04:28:30.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ddb5xxx/ddb5074/setup.c linux_HEAD/arch/mips/ddb5xxx/ddb5074/setup.c
+--- linux-2.6.12/arch/mips/ddb5xxx/ddb5074/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/ddb5xxx/ddb5074/setup.c 2005-07-01 12:09:17.000000000 +0200
+@@ -85,7 +85,7 @@ static void __init ddb_time_init(void)
+
+
+
+-static void __init ddb5074_setup(void)
++void __init plat_setup(void)
+ {
+ set_io_port_base(NILE4_PCI_IO_BASE);
+ isa_slot_offset = NILE4_PCI_MEM_BASE;
+@@ -106,8 +106,6 @@ static void __init ddb5074_setup(void)
+ panic_timeout = 180;
+ }
+
+-early_initcall(ddb5074_setup);
+-
+ #define USE_NILE4_SERIAL 0
+
+ #if USE_NILE4_SERIAL
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ddb5xxx/ddb5476/setup.c linux_HEAD/arch/mips/ddb5xxx/ddb5476/setup.c
+--- linux-2.6.12/arch/mips/ddb5xxx/ddb5476/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/ddb5xxx/ddb5476/setup.c 2005-07-01 12:09:17.000000000 +0200
+@@ -124,7 +124,7 @@ static struct {
+
+ static void ddb5476_board_init(void);
+
+-static void __init ddb5476_setup(void)
++void __init plat_setup(void)
+ {
+ set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE));
+
+@@ -158,8 +158,6 @@ static void __init ddb5476_setup(void)
+ ddb5476_board_init();
+ }
+
+-early_initcall(ddb5476_setup);
+-
+ /*
+ * We don't trust bios. We essentially does hardware re-initialization
+ * as complete as possible, as far as we know we can safely do.
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c linux_HEAD/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c
+--- linux-2.6.12/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c 2005-02-28 16:56:41.000000000 +0100
@@ -53,14 +53,13 @@ static void vrc5476_irq_end(uint irq)
}
@@ -14478,8 +17427,8 @@
};
void __init
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/ddb5xxx/ddb5477/irq_5477.c linux_HEAD/arch/mips/ddb5xxx/ddb5477/irq_5477.c
---- linux-2.6.11.6/arch/mips/ddb5xxx/ddb5477/irq_5477.c 2005-03-26 04:28:17.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ddb5xxx/ddb5477/irq_5477.c linux_HEAD/arch/mips/ddb5xxx/ddb5477/irq_5477.c
+--- linux-2.6.12/arch/mips/ddb5xxx/ddb5477/irq_5477.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/ddb5xxx/ddb5477/irq_5477.c 2005-02-28 16:56:41.000000000 +0100
@@ -90,14 +90,13 @@ vrc5477_irq_end(unsigned int irq)
}
@@ -14503,16 +17452,974 @@
};
void __init vrc5477_irq_init(u32 irq_base)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/defconfig linux_HEAD/arch/mips/defconfig
---- linux-2.6.11.6/arch/mips/defconfig 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/arch/mips/defconfig 2005-03-21 20:03:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ddb5xxx/ddb5477/setup.c linux_HEAD/arch/mips/ddb5xxx/ddb5477/setup.c
+--- linux-2.6.12/arch/mips/ddb5xxx/ddb5477/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/ddb5xxx/ddb5477/setup.c 2005-07-01 12:09:17.000000000 +0200
+@@ -170,7 +170,7 @@ static void ddb5477_board_init(void);
+ extern struct pci_controller ddb5477_ext_controller;
+ extern struct pci_controller ddb5477_io_controller;
+
+-static int ddb5477_setup(void)
++static void ddb5477_setup(void)
+ {
+ /* initialize board - we don't trust the loader */
+ ddb5477_board_init();
+@@ -193,12 +193,8 @@ static int ddb5477_setup(void)
+
+ register_pci_controller (&ddb5477_ext_controller);
+ register_pci_controller (&ddb5477_io_controller);
+-
+- return 0;
+ }
+
+-early_initcall(ddb5477_setup);
+-
+ static void __init ddb5477_board_init(void)
+ {
+ /* ----------- setup PDARs ------------ */
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/Makefile linux_HEAD/arch/mips/dec/Makefile
+--- linux-2.6.12/arch/mips/dec/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/Makefile 2005-07-01 12:09:17.000000000 +0200
+@@ -2,8 +2,8 @@
+ # Makefile for the DECstation family specific parts of the kernel
+ #
+
+-obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn02-irq.o reset.o \
+- setup.o time.o
++obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \
++ kn02-irq.o kn02xa-berr.o reset.o setup.o time.o
+
+ obj-$(CONFIG_PROM_CONSOLE) += promcon.o
+ obj-$(CONFIG_CPU_HAS_WB) += wbflush.o
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/ecc-berr.c linux_HEAD/arch/mips/dec/ecc-berr.c
+--- linux-2.6.12/arch/mips/dec/ecc-berr.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/ecc-berr.c 2005-07-03 16:44:19.000000000 +0200
+@@ -6,7 +6,7 @@
+ * 5000/240 (KN03), 5000/260 (KN05) and DECsystem 5900 (KN03),
+ * 5900/260 (KN05) systems.
+ *
+- * Copyright (c) 2003 Maciej W. Rozycki
++ * Copyright (c) 2003, 2005 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+@@ -15,6 +15,7 @@
+ */
+
+ #include <linux/init.h>
++#include <linux/interrupt.h>
+ #include <linux/kernel.h>
+ #include <linux/sched.h>
+ #include <linux/spinlock.h>
+@@ -57,7 +58,7 @@ static int dec_ecc_be_backend(struct pt_
+
+ const char *kind, *agent, *cycle, *event;
+ const char *status = "", *xbit = "", *fmt = "";
+- dma_addr_t address;
++ unsigned long address;
+ u16 syn = 0, sngl;
+
+ int i = 0;
+@@ -66,7 +67,7 @@ static int dec_ecc_be_backend(struct pt_
+ u32 chksyn = *kn0x_chksyn;
+ int action = MIPS_BE_FATAL;
+
+- /* For non-ECC ack ASAP, so any subsequent errors get caught. */
++ /* For non-ECC ack ASAP, so that any subsequent errors get caught. */
+ if ((erraddr & (KN0X_EAR_VALID | KN0X_EAR_ECCERR)) == KN0X_EAR_VALID)
+ dec_ecc_be_ack();
+
+@@ -74,7 +75,7 @@ static int dec_ecc_be_backend(struct pt_
+
+ if (!(erraddr & KN0X_EAR_VALID)) {
+ /* No idea what happened. */
+- printk(KERN_ALERT "Unidentified bus error %s.\n", kind);
++ printk(KERN_ALERT "Unidentified bus error %s\n", kind);
+ return action;
+ }
+
+@@ -126,7 +127,7 @@ static int dec_ecc_be_backend(struct pt_
+ /* Ack now, no rewrite will happen. */
+ dec_ecc_be_ack();
+
+- fmt = KERN_ALERT "%s" "invalid.\n";
++ fmt = KERN_ALERT "%s" "invalid\n";
+ } else {
+ sngl = syn & KN0X_ESR_SNGLO;
+ syn &= KN0X_ESR_SYNLO;
+@@ -144,7 +145,8 @@ static int dec_ecc_be_backend(struct pt_
+ } else if (!sngl) {
+ status = dbestr;
+ } else {
+- volatile u32 *ptr = (void *)KSEG1ADDR(address);
++ volatile u32 *ptr =
++ (void *)CKSEG1ADDR(address);
+
+ *ptr = *ptr; /* Rewrite. */
+ iob();
+@@ -160,12 +162,12 @@ static int dec_ecc_be_backend(struct pt_
+ if (syn == 0x01) {
+ fmt = KERN_ALERT "%s"
+ "%#04x -- %s bit error "
+- "at check bit C%s.\n";
++ "at check bit C%s\n";
+ xbit = "X";
+ } else {
+ fmt = KERN_ALERT "%s"
+ "%#04x -- %s bit error "
+- "at check bit C%s%u.\n";
++ "at check bit C%s%u\n";
+ }
+ i = syn >> 2;
+ } else {
+@@ -175,16 +177,16 @@ static int dec_ecc_be_backend(struct pt_
+ if (i < 32)
+ fmt = KERN_ALERT "%s"
+ "%#04x -- %s bit error "
+- "at data bit D%s%u.\n";
++ "at data bit D%s%u\n";
+ else
+ fmt = KERN_ALERT "%s"
+- "%#04x -- %s bit error.\n";
++ "%#04x -- %s bit error\n";
+ }
+ }
+ }
+
+ if (action != MIPS_BE_FIXUP)
+- printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx.\n",
++ printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx\n",
+ kind, agent, cycle, event, address);
+
+ if (action != MIPS_BE_FIXUP && erraddr & KN0X_EAR_ECCERR)
+@@ -203,11 +205,11 @@ irqreturn_t dec_ecc_be_interrupt(int irq
+ int action = dec_ecc_be_backend(regs, 0, 1);
+
+ if (action == MIPS_BE_DISCARD)
+- return IRQ_NONE;
++ return IRQ_HANDLED;
+
+ /*
+- * FIXME: Find affected processes and kill them, otherwise we
+- * must die.
++ * FIXME: Find the affected processes and kill them, otherwise
++ * we must die.
+ *
+ * The interrupt is asynchronously delivered thus EPC and RA
+ * may be irrelevant, but are printed for a reference.
+@@ -225,16 +227,16 @@ irqreturn_t dec_ecc_be_interrupt(int irq
+ */
+ static inline void dec_kn02_be_init(void)
+ {
+- volatile u32 *csr = (void *)KN02_CSR_BASE;
++ volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
+ unsigned long flags;
+
+- kn0x_erraddr = (void *)(KN02_SLOT_BASE + KN02_ERRADDR);
+- kn0x_chksyn = (void *)(KN02_SLOT_BASE + KN02_CHKSYN);
++ kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);
++ kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN);
+
+ spin_lock_irqsave(&kn02_lock, flags);
+
+ /* Preset write-only bits of the Control Register cache. */
+- cached_kn02_csr = *csr | KN03_CSR_LEDS;
++ cached_kn02_csr = *csr | KN02_CSR_LEDS;
+
+ /* Set normal ECC detection and generation. */
+ cached_kn02_csr &= ~(KN02_CSR_DIAGCHK | KN02_CSR_DIAGGEN);
+@@ -248,11 +250,11 @@ static inline void dec_kn02_be_init(void
+
+ static inline void dec_kn03_be_init(void)
+ {
+- volatile u32 *mcr = (void *)(KN03_SLOT_BASE + IOASIC_MCR);
+- volatile u32 *mbcs = (void *)(KN03_SLOT_BASE + KN05_MB_CSR);
++ volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
++ volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);
+
+- kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR);
+- kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN);
++ kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR);
++ kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN);
+
+ /*
+ * Set normal ECC detection and generation, enable ECC correction.
+@@ -264,7 +266,7 @@ static inline void dec_kn03_be_init(void
+ *mcr = (*mcr & ~(KN03_MCR_DIAGCHK | KN03_MCR_DIAGGEN)) |
+ KN03_MCR_CORRECT;
+ if (current_cpu_data.cputype == CPU_R4400SC)
+- *mbcs |= KN05_MB_CSR_EE;
++ *mbcs |= KN4K_MB_CSR_EE;
+ fast_iob();
+ }
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/int-handler.S linux_HEAD/arch/mips/dec/int-handler.S
+--- linux-2.6.12/arch/mips/dec/int-handler.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/int-handler.S 2005-07-03 16:44:20.000000000 +0200
+@@ -2,9 +2,9 @@
+ * arch/mips/dec/int-handler.S
+ *
+ * Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen
+- * Copyright (C) 2000, 2001, 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki
+ *
+- * Written by Ralf Baechle and Andreas Busse, modified for DECStation
++ * Written by Ralf Baechle and Andreas Busse, modified for DECstation
+ * support by Paul Antoine and Harald Koerfgen.
+ *
+ * completly rewritten:
+@@ -14,11 +14,12 @@
+ * by Maciej W. Rozycki.
+ */
+ #include <linux/config.h>
++
++#include <asm/addrspace.h>
+ #include <asm/asm.h>
+-#include <asm/regdef.h>
+ #include <asm/mipsregs.h>
++#include <asm/regdef.h>
+ #include <asm/stackframe.h>
+-#include <asm/addrspace.h>
+
+ #include <asm/dec/interrupts.h>
+ #include <asm/dec/ioasic_addrs.h>
+@@ -28,11 +29,14 @@
+ #include <asm/dec/kn02xa.h>
+ #include <asm/dec/kn03.h>
+
++#define KN02_CSR_BASE CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)
++#define KN02XA_IOASIC_BASE CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)
++#define KN03_IOASIC_BASE CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)
+
+ .text
+ .set noreorder
+ /*
+- * decstation_handle_int: Interrupt handler for DECStations
++ * decstation_handle_int: Interrupt handler for DECstations
+ *
+ * We follow the model in the Indy interrupt code by David Miller, where he
+ * says: a lot of complication here is taken away because:
+@@ -48,7 +52,7 @@
+ * 3) Linux only thinks in terms of all IRQs on or all IRQs
+ * off, nothing in between like BSD spl() brain-damage.
+ *
+- * Furthermore, the IRQs on the DECStations look basically (barring
++ * Furthermore, the IRQs on the DECstations look basically (barring
+ * software IRQs which we don't use at all) like...
+ *
+ * DS2100/3100's, aka kn01, aka Pmax:
+@@ -61,7 +65,7 @@
+ * 3 Lance Ethernet
+ * 4 DZ11 serial
+ * 5 RTC
+- * 6 Memory Controller
++ * 6 Memory Controller & Video
+ * 7 FPU
+ *
+ * DS5000/200, aka kn02, aka 3max:
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/kn01-berr.c linux_HEAD/arch/mips/dec/kn01-berr.c
+--- linux-2.6.12/arch/mips/dec/kn01-berr.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/arch/mips/dec/kn01-berr.c 2005-07-03 16:44:20.000000000 +0200
+@@ -0,0 +1,201 @@
++/*
++ * linux/arch/mips/dec/kn01-berr.c
++ *
++ * Bus error event handling code for DECstation/DECsystem 3100
++ * and 2100 (KN01) systems equipped with parity error detection
++ * logic.
++ *
++ * Copyright (c) 2005 Maciej W. Rozycki
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/types.h>
++
++#include <asm/inst.h>
++#include <asm/mipsregs.h>
++#include <asm/page.h>
++#include <asm/system.h>
++#include <asm/traps.h>
++#include <asm/uaccess.h>
++
++#include <asm/dec/kn01.h>
++
++
++/* CP0 hazard avoidance. */
++#define BARRIER \
++ __asm__ __volatile__( \
++ ".set push\n\t" \
++ ".set noreorder\n\t" \
++ "nop\n\t" \
++ ".set pop\n\t")
++
++/*
++ * Bits 7:0 of the Control Register are write-only -- the
++ * corresponding bits of the Status Register have a different
++ * meaning. Hence we use a cache. It speeds up things a bit
++ * as well.
++ *
++ * There is no default value -- it has to be initialized.
++ */
++u16 cached_kn01_csr;
++DEFINE_SPINLOCK(kn01_lock);
++
++
++static inline void dec_kn01_be_ack(void)
++{
++ volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
++ unsigned long flags;
++
++ spin_lock_irqsave(&kn01_lock, flags);
++
++ *csr = cached_kn01_csr | KN01_CSR_MEMERR; /* Clear bus IRQ. */
++ iob();
++
++ spin_unlock_irqrestore(&kn01_lock, flags);
++}
++
++static int dec_kn01_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
++{
++ volatile u32 *kn01_erraddr = (void *)CKSEG1ADDR(KN01_SLOT_BASE +
++ KN01_ERRADDR);
++
++ static const char excstr[] = "exception";
++ static const char intstr[] = "interrupt";
++ static const char cpustr[] = "CPU";
++ static const char mreadstr[] = "memory read";
++ static const char readstr[] = "read";
++ static const char writestr[] = "write";
++ static const char timestr[] = "timeout";
++ static const char paritystr[] = "parity error";
++
++ int data = regs->cp0_cause & 4;
++ unsigned int __user *pc = (unsigned int __user *)regs->cp0_epc +
++ ((regs->cp0_cause & CAUSEF_BD) != 0);
++ union mips_instruction insn;
++ unsigned long entrylo, offset;
++ long asid, entryhi, vaddr;
++
++ const char *kind, *agent, *cycle, *event;
++ unsigned long address;
++
++ u32 erraddr = *kn01_erraddr;
++ int action = MIPS_BE_FATAL;
++
++ /* Ack ASAP, so that any subsequent errors get caught. */
++ dec_kn01_be_ack();
++
++ kind = invoker ? intstr : excstr;
++
++ agent = cpustr;
++
++ if (invoker)
++ address = erraddr;
++ else {
++ /* Bloody hardware doesn't record the address for reads... */
++ if (data) {
++ /* This never faults. */
++ __get_user(insn.word, pc);
++ vaddr = regs->regs[insn.i_format.rs] +
++ insn.i_format.simmediate;
++ } else
++ vaddr = (long)pc;
++ if (KSEGX(vaddr) == CKSEG0 || KSEGX(vaddr) == CKSEG1)
++ address = CPHYSADDR(vaddr);
++ else {
++ /* Peek at what physical address the CPU used. */
++ asid = read_c0_entryhi();
++ entryhi = asid & (PAGE_SIZE - 1);
++ entryhi |= vaddr & ~(PAGE_SIZE - 1);
++ write_c0_entryhi(entryhi);
++ BARRIER;
++ tlb_probe();
++ /* No need to check for presence. */
++ tlb_read();
++ entrylo = read_c0_entrylo0();
++ write_c0_entryhi(asid);
++ offset = vaddr & (PAGE_SIZE - 1);
++ address = (entrylo & ~(PAGE_SIZE - 1)) | offset;
++ }
++ }
++
++ /* Treat low 256MB as memory, high -- as I/O. */
++ if (address < 0x10000000) {
++ cycle = mreadstr;
++ event = paritystr;
++ } else {
++ cycle = invoker ? writestr : readstr;
++ event = timestr;
++ }
++
++ if (is_fixup)
++ action = MIPS_BE_FIXUP;
++
++ if (action != MIPS_BE_FIXUP)
++ printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx\n",
++ kind, agent, cycle, event, address);
++
++ return action;
++}
++
++int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup)
++{
++ return dec_kn01_be_backend(regs, is_fixup, 0);
++}
++
++irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
++ struct pt_regs *regs)
++{
++ volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
++ int action;
++
++ if (!(*csr & KN01_CSR_MEMERR))
++ return IRQ_NONE; /* Must have been video. */
++
++ action = dec_kn01_be_backend(regs, 0, 1);
++
++ if (action == MIPS_BE_DISCARD)
++ return IRQ_HANDLED;
++
++ /*
++ * FIXME: Find the affected processes and kill them, otherwise
++ * we must die.
++ *
++ * The interrupt is asynchronously delivered thus EPC and RA
++ * may be irrelevant, but are printed for a reference.
++ */
++ printk(KERN_ALERT "Fatal bus interrupt, epc == %08lx, ra == %08lx\n",
++ regs->cp0_epc, regs->regs[31]);
++ die("Unrecoverable bus error", regs);
++}
++
++
++void __init dec_kn01_be_init(void)
++{
++ volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
++ unsigned long flags;
++
++ spin_lock_irqsave(&kn01_lock, flags);
++
++ /* Preset write-only bits of the Control Register cache. */
++ cached_kn01_csr = *csr;
++ cached_kn01_csr &= KN01_CSR_STATUS | KN01_CSR_PARDIS | KN01_CSR_TXDIS;
++ cached_kn01_csr |= KN01_CSR_LEDS;
++
++ /* Enable parity error detection. */
++ cached_kn01_csr &= ~KN01_CSR_PARDIS;
++ *csr = cached_kn01_csr;
++ iob();
++
++ spin_unlock_irqrestore(&kn01_lock, flags);
++
++ /* Clear any leftover errors from the firmware. */
++ dec_kn01_be_ack();
++}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/kn02-irq.c linux_HEAD/arch/mips/dec/kn02-irq.c
+--- linux-2.6.12/arch/mips/dec/kn02-irq.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/kn02-irq.c 2005-07-03 16:44:20.000000000 +0200
+@@ -4,7 +4,7 @@
+ * DECstation 5000/200 (KN02) Control and Status Register
+ * interrupts.
+ *
+- * Copyright (c) 2002, 2003 Maciej W. Rozycki
++ * Copyright (c) 2002, 2003, 2005 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+@@ -37,7 +37,8 @@ static int kn02_irq_base;
+
+ static inline void unmask_kn02_irq(unsigned int irq)
+ {
+- volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
++ volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
++ KN02_CSR);
+
+ cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16));
+ *csr = cached_kn02_csr;
+@@ -45,7 +46,8 @@ static inline void unmask_kn02_irq(unsig
+
+ static inline void mask_kn02_irq(unsigned int irq)
+ {
+- volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
++ volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
++ KN02_CSR);
+
+ cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16));
+ *csr = cached_kn02_csr;
+@@ -105,13 +107,14 @@ static struct hw_interrupt_type kn02_irq
+
+ void __init init_kn02_irqs(int base)
+ {
+- volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
++ volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
++ KN02_CSR);
+ unsigned long flags;
+ int i;
+
+ /* Mask interrupts. */
+ spin_lock_irqsave(&kn02_lock, flags);
+- cached_kn02_csr &= ~KN03_CSR_IOINTEN;
++ cached_kn02_csr &= ~KN02_CSR_IOINTEN;
+ *csr = cached_kn02_csr;
+ iob();
+ spin_unlock_irqrestore(&kn02_lock, flags);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/kn02xa-berr.c linux_HEAD/arch/mips/dec/kn02xa-berr.c
+--- linux-2.6.12/arch/mips/dec/kn02xa-berr.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/arch/mips/dec/kn02xa-berr.c 2005-07-03 16:44:20.000000000 +0200
+@@ -0,0 +1,139 @@
++/*
++ * linux/arch/mips/dec/kn02xa-berr.c
++ *
++ * Bus error event handling code for 5000-series systems equipped
++ * with parity error detection logic, i.e. DECstation/DECsystem
++ * 5000/120, /125, /133 (KN02-BA), 5000/150 (KN04-BA) and Personal
++ * DECstation/DECsystem 5000/20, /25, /33 (KN02-CA), 5000/50
++ * (KN04-CA) systems.
++ *
++ * Copyright (c) 2005 Maciej W. Rozycki
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/types.h>
++
++#include <asm/addrspace.h>
++#include <asm/system.h>
++#include <asm/traps.h>
++
++#include <asm/dec/kn02ca.h>
++#include <asm/dec/kn02xa.h>
++#include <asm/dec/kn05.h>
++
++static inline void dec_kn02xa_be_ack(void)
++{
++ volatile u32 *mer = (void *)CKSEG1ADDR(KN02XA_MER);
++ volatile u32 *mem_intr = (void *)CKSEG1ADDR(KN02XA_MEM_INTR);
++
++ *mer = KN02CA_MER_INTR; /* Clear errors; keep the ARC IRQ. */
++ *mem_intr = 0; /* Any write clears the bus IRQ. */
++ iob();
++}
++
++static int dec_kn02xa_be_backend(struct pt_regs *regs, int is_fixup,
++ int invoker)
++{
++ volatile u32 *kn02xa_mer = (void *)CKSEG1ADDR(KN02XA_MER);
++ volatile u32 *kn02xa_ear = (void *)CKSEG1ADDR(KN02XA_EAR);
++
++ static const char excstr[] = "exception";
++ static const char intstr[] = "interrupt";
++ static const char cpustr[] = "CPU";
++ static const char mreadstr[] = "memory read";
++ static const char readstr[] = "read";
++ static const char writestr[] = "write";
++ static const char timestr[] = "timeout";
++ static const char paritystr[] = "parity error";
++ static const char lanestat[][4] = { " OK", "BAD" };
++
++ const char *kind, *agent, *cycle, *event;
++ unsigned long address;
++
++ u32 mer = *kn02xa_mer;
++ u32 ear = *kn02xa_ear;
++ int action = MIPS_BE_FATAL;
++
++ /* Ack ASAP, so that any subsequent errors get caught. */
++ dec_kn02xa_be_ack();
++
++ kind = invoker ? intstr : excstr;
++
++ /* No DMA errors? */
++ agent = cpustr;
++
++ address = ear & KN02XA_EAR_ADDRESS;
++
++ /* Low 256MB is decoded as memory, high -- as TC. */
++ if (address < 0x10000000) {
++ cycle = mreadstr;
++ event = paritystr;
++ } else {
++ cycle = invoker ? writestr : readstr;
++ event = timestr;
++ }
++
++ if (is_fixup)
++ action = MIPS_BE_FIXUP;
++
++ if (action != MIPS_BE_FIXUP)
++ printk(KERN_ALERT "Bus error %s: %s %s %s at %#010lx\n",
++ kind, agent, cycle, event, address);
++
++ if (action != MIPS_BE_FIXUP && address < 0x10000000)
++ printk(KERN_ALERT " Byte lane status %#3x -- "
++ "#3: %s, #2: %s, #1: %s, #0: %s\n",
++ (mer & KN02XA_MER_BYTERR) >> 8,
++ lanestat[(mer & KN02XA_MER_BYTERR_3) != 0],
++ lanestat[(mer & KN02XA_MER_BYTERR_2) != 0],
++ lanestat[(mer & KN02XA_MER_BYTERR_1) != 0],
++ lanestat[(mer & KN02XA_MER_BYTERR_0) != 0]);
++
++ return action;
++}
++
++int dec_kn02xa_be_handler(struct pt_regs *regs, int is_fixup)
++{
++ return dec_kn02xa_be_backend(regs, is_fixup, 0);
++}
++
++irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id,
++ struct pt_regs *regs)
++{
++ int action = dec_kn02xa_be_backend(regs, 0, 1);
++
++ if (action == MIPS_BE_DISCARD)
++ return IRQ_HANDLED;
++
++ /*
++ * FIXME: Find the affected processes and kill them, otherwise
++ * we must die.
++ *
++ * The interrupt is asynchronously delivered thus EPC and RA
++ * may be irrelevant, but are printed for a reference.
++ */
++ printk(KERN_ALERT "Fatal bus interrupt, epc == %08lx, ra == %08lx\n",
++ regs->cp0_epc, regs->regs[31]);
++ die("Unrecoverable bus error", regs);
++}
++
++
++void __init dec_kn02xa_be_init(void)
++{
++ volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);
++
++ /* For KN04 we need to make sure EE (?) is enabled in the MB. */
++ if (current_cpu_data.cputype == CPU_R4000SC)
++ *mbcs |= KN4K_MB_CSR_EE;
++ fast_iob();
++
++ /* Clear any leftover errors from the firmware. */
++ dec_kn02xa_be_ack();
++}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/prom/identify.c linux_HEAD/arch/mips/dec/prom/identify.c
+--- linux-2.6.12/arch/mips/dec/prom/identify.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/prom/identify.c 2005-07-03 16:44:20.000000000 +0200
+@@ -2,7 +2,7 @@
+ * identify.c: machine identification code.
+ *
+ * Copyright (C) 1998 Harald Koerfgen and Paul M. Antoine
+- * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
++ * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki
+ */
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+@@ -12,6 +12,7 @@
+ #include <linux/types.h>
+
+ #include <asm/bootinfo.h>
++
+ #include <asm/dec/ioasic.h>
+ #include <asm/dec/ioasic_addrs.h>
+ #include <asm/dec/kn01.h>
+@@ -21,6 +22,7 @@
+ #include <asm/dec/kn03.h>
+ #include <asm/dec/kn230.h>
+ #include <asm/dec/prom.h>
++#include <asm/dec/system.h>
+
+ #include "dectypes.h"
+
+@@ -68,34 +70,44 @@ EXPORT_SYMBOL(dec_rtc_base);
+
+ static inline void prom_init_kn01(void)
+ {
+- dec_rtc_base = (void *)KN01_RTC_BASE;
++ dec_kn_slot_base = KN01_SLOT_BASE;
+ dec_kn_slot_size = KN01_SLOT_SIZE;
++
++ dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC);
+ }
+
+ static inline void prom_init_kn230(void)
+ {
+- dec_rtc_base = (void *)KN01_RTC_BASE;
++ dec_kn_slot_base = KN01_SLOT_BASE;
+ dec_kn_slot_size = KN01_SLOT_SIZE;
++
++ dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC);
+ }
+
+ static inline void prom_init_kn02(void)
+ {
+- dec_rtc_base = (void *)KN02_RTC_BASE;
++ dec_kn_slot_base = KN02_SLOT_BASE;
+ dec_kn_slot_size = KN02_SLOT_SIZE;
++
++ dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN02_RTC);
+ }
+
+ static inline void prom_init_kn02xa(void)
+ {
+- ioasic_base = (void *)KN02XA_IOASIC_BASE;
+- dec_rtc_base = (void *)KN02XA_RTC_BASE;
++ dec_kn_slot_base = KN02XA_SLOT_BASE;
+ dec_kn_slot_size = IOASIC_SLOT_SIZE;
++
++ ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL);
++ dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY);
+ }
+
+ static inline void prom_init_kn03(void)
+ {
+- ioasic_base = (void *)KN03_IOASIC_BASE;
+- dec_rtc_base = (void *)KN03_RTC_BASE;
++ dec_kn_slot_base = KN03_SLOT_BASE;
+ dec_kn_slot_size = IOASIC_SLOT_SIZE;
++
++ ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL);
++ dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY);
+ }
+
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/prom/init.c linux_HEAD/arch/mips/dec/prom/init.c
+--- linux-2.6.12/arch/mips/dec/prom/init.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/prom/init.c 2005-07-01 12:09:17.000000000 +0200
+@@ -6,6 +6,8 @@
+ */
+ #include <linux/config.h>
+ #include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/linkage.h>
+ #include <linux/smp.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+@@ -85,17 +87,13 @@ void __init which_prom(s32 magic, s32 *p
+
+ void __init prom_init(void)
+ {
+- extern void dec_machine_halt(void);
++ extern void ATTRIB_NORET dec_machine_halt(void);
+ static char cpu_msg[] __initdata =
+ "Sorry, this kernel is compiled for a wrong CPU type!\n";
+- static char r3k_msg[] __initdata =
+- "Please recompile with \"CONFIG_CPU_R3000 = y\".\n";
+- static char r4k_msg[] __initdata =
+- "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n";
+ s32 argc = fw_arg0;
+- s32 argv = fw_arg1;
++ s32 *argv = (void *)fw_arg1;
+ u32 magic = fw_arg2;
+- s32 prom_vec = fw_arg3;
++ s32 *prom_vec = (void *)fw_arg3;
+
+ /*
+ * Determine which PROM we have
+@@ -113,6 +111,8 @@ void __init prom_init(void)
+ #if defined(CONFIG_CPU_R3000)
+ if ((current_cpu_data.cputype == CPU_R4000SC) ||
+ (current_cpu_data.cputype == CPU_R4400SC)) {
++ static char r4k_msg[] __initdata =
++ "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n";
+ printk(cpu_msg);
+ printk(r4k_msg);
+ dec_machine_halt();
+@@ -122,6 +122,8 @@ void __init prom_init(void)
+ #if defined(CONFIG_CPU_R4X00)
+ if ((current_cpu_data.cputype == CPU_R3000) ||
+ (current_cpu_data.cputype == CPU_R3000A)) {
++ static char r3k_msg[] __initdata =
++ "Please recompile with \"CONFIG_CPU_R3000 = y\".\n";
+ printk(cpu_msg);
+ printk(r3k_msg);
+ dec_machine_halt();
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/prom/memory.c linux_HEAD/arch/mips/dec/prom/memory.c
+--- linux-2.6.12/arch/mips/dec/prom/memory.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/prom/memory.c 2005-07-01 12:09:17.000000000 +0200
+@@ -35,22 +35,22 @@ static inline void pmax_setup_memory_reg
+ extern char genexcept_early;
+
+ /* Install exception handler */
+- memcpy(&old_handler, (void *)(KSEG0 + 0x80), 0x80);
+- memcpy((void *)(KSEG0 + 0x80), &genexcept_early, 0x80);
++ memcpy(&old_handler, (void *)(CKSEG0 + 0x80), 0x80);
++ memcpy((void *)(CKSEG0 + 0x80), &genexcept_early, 0x80);
+
+ /* read unmapped and uncached (KSEG1)
+ * DECstations have at least 4MB RAM
+ * Assume less than 480MB of RAM, as this is max for 5000/2xx
+ * FIXME this should be replaced by the first free page!
+ */
+- for (memory_page = (unsigned char *) KSEG1 + CHUNK_SIZE;
+- (mem_err== 0) && (memory_page < ((unsigned char *) KSEG1+0x1E000000));
++ for (memory_page = (unsigned char *)CKSEG1 + CHUNK_SIZE;
++ mem_err == 0 && memory_page < (unsigned char *)CKSEG1 + 0x1e00000;
+ memory_page += CHUNK_SIZE) {
+ dummy = *memory_page;
+ }
+- memcpy((void *)(KSEG0 + 0x80), &old_handler, 0x80);
++ memcpy((void *)(CKSEG0 + 0x80), &old_handler, 0x80);
+
+- add_memory_region(0, (unsigned long)memory_page - KSEG1 - CHUNK_SIZE,
++ add_memory_region(0, (unsigned long)memory_page - CKSEG1 - CHUNK_SIZE,
+ BOOT_MEM_RAM);
+ }
+
+@@ -65,7 +65,7 @@ static inline void rex_setup_memory_regi
+ memmap *bm;
+
+ /* some free 64k */
+- bm = (memmap *)KSEG0ADDR(0x28000);
++ bm = (memmap *)CKSEG0ADDR(0x28000);
+
+ bitmap_size = rex_getbitmap(bm);
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/reset.c linux_HEAD/arch/mips/dec/reset.c
+--- linux-2.6.12/arch/mips/dec/reset.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/reset.c 2005-07-01 12:09:17.000000000 +0200
+@@ -14,7 +14,7 @@ typedef void ATTRIB_NORET (* noret_func_
+
+ static inline void ATTRIB_NORET back_to_prom(void)
+ {
+- noret_func_t func = (void *) KSEG1ADDR(0x1fc00000);
++ noret_func_t func = (void *)CKSEG1ADDR(0x1fc00000);
+
+ func();
+ }
+diff -urpNX dontdiff linux-2.6.12/arch/mips/dec/setup.c linux_HEAD/arch/mips/dec/setup.c
+--- linux-2.6.12/arch/mips/dec/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/dec/setup.c 2005-07-03 16:44:20.000000000 +0200
+@@ -1,19 +1,20 @@
+ /*
+- * Setup the interrupt stuff.
++ * System-specific setup, especially interrupts.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998 Harald Koerfgen
+- * Copyright (C) 2000, 2001, 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki
+ */
+-#include <linux/sched.h>
+-#include <linux/interrupt.h>
+-#include <linux/param.h>
+ #include <linux/console.h>
+ #include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
+ #include <linux/module.h>
++#include <linux/param.h>
++#include <linux/sched.h>
+ #include <linux/spinlock.h>
+ #include <linux/types.h>
+
+@@ -38,6 +39,7 @@
+ #include <asm/dec/kn02ca.h>
+ #include <asm/dec/kn03.h>
+ #include <asm/dec/kn230.h>
++#include <asm/dec/system.h>
+
+
+ extern void dec_machine_restart(char *command);
+@@ -47,10 +49,16 @@ extern irqreturn_t dec_intr_halt(int irq
+
+ extern asmlinkage void decstation_handle_int(void);
+
++unsigned long dec_kn_slot_base, dec_kn_slot_size;
++
++EXPORT_SYMBOL(dec_kn_slot_base);
++EXPORT_SYMBOL(dec_kn_slot_size);
++
+ spinlock_t ioasic_ssr_lock;
+
+ volatile u32 *ioasic_base;
+-unsigned long dec_kn_slot_size;
++
++EXPORT_SYMBOL(ioasic_base);
+
+ /*
+ * IRQ routing and priority tables. Priorites are set as follows:
+@@ -77,6 +85,9 @@ unsigned long dec_kn_slot_size;
+ int dec_interrupt[DEC_NR_INTS] = {
+ [0 ... DEC_NR_INTS - 1] = -1
+ };
++
++EXPORT_SYMBOL(dec_interrupt);
++
+ int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = {
+ { { .i = ~0 }, { .p = dec_intr_unimplemented } },
+ };
+@@ -112,7 +123,16 @@ void __init dec_be_init(void)
+ {
+ switch (mips_machtype) {
+ case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */
++ board_be_handler = dec_kn01_be_handler;
++ busirq.handler = dec_kn01_be_interrupt;
+ busirq.flags |= SA_SHIRQ;
++ dec_kn01_be_init();
++ break;
++ case MACH_DS5000_1XX: /* DS5000/1xx 3min */
++ case MACH_DS5000_XX: /* DS5000/xx Maxine */
++ board_be_handler = dec_kn02xa_be_handler;
++ busirq.handler = dec_kn02xa_be_interrupt;
++ dec_kn02xa_be_init();
+ break;
+ case MACH_DS5000_200: /* DS5000/200 3max */
+ case MACH_DS5000_2X0: /* DS5000/240 3max+ */
+@@ -128,7 +148,7 @@ void __init dec_be_init(void)
+ extern void dec_time_init(void);
+ extern void dec_timer_setup(struct irqaction *);
+
+-static void __init decstation_setup(void)
++void __init decstation_setup(void)
+ {
+ board_be_init = dec_be_init;
+ board_time_init = dec_time_init;
+@@ -139,9 +159,10 @@ static void __init decstation_setup(void
+ _machine_restart = dec_machine_restart;
+ _machine_halt = dec_machine_halt;
+ _machine_power_off = dec_machine_power_off;
+-}
+
+-early_initcall(decstation_setup);
++ ioport_resource.start = ~0UL;
++ ioport_resource.end = 0UL;
++}
+
+ /*
+ * Machine-specific initialisation for KN01, aka DS2100 (aka Pmin)
+@@ -744,7 +765,3 @@ void __init arch_init_irq(void)
+ if (dec_interrupt[DEC_IRQ_HALT] >= 0)
+ setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq);
+ }
+-
+-EXPORT_SYMBOL(ioasic_base);
+-EXPORT_SYMBOL(dec_kn_slot_size);
+-EXPORT_SYMBOL(dec_interrupt);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/defconfig linux_HEAD/arch/mips/defconfig
+--- linux-2.6.12/arch/mips/defconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/defconfig 2005-07-07 11:22:47.000000000 +0200
@@ -1,12 +1,9 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Wed Jan 26 02:48:59 2005
-+# Linux kernel version: 2.6.12-rc1
-+# Fri Mar 18 15:41:23 2005
++# Linux kernel version: 2.6.12
++# Sat Jun 18 14:53:00 2005
#
CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
@@ -14521,7 +18428,15 @@
#
# Code maturity level options
-@@ -25,7 +22,6 @@ CONFIG_SYSVIPC=y
+@@ -14,6 +11,7 @@ CONFIG_MIPS32=y
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_CLEAN_COMPILE=y
+ CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
+
+ #
+ # General setup
+@@ -25,7 +23,6 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@@ -14529,15 +18444,17 @@
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
-@@ -33,6 +29,7 @@ CONFIG_IKCONFIG_PROC=y
+@@ -33,6 +30,9 @@ CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_PRINTK=y
++CONFIG_BUG=y
+CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-@@ -42,6 +39,7 @@ CONFIG_CC_ALIGN_LABELS=0
+@@ -42,6 +42,7 @@ CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
@@ -14545,7 +18462,7 @@
#
# Loadable module support
-@@ -57,40 +55,64 @@ CONFIG_KMOD=y
+@@ -57,40 +58,63 @@ CONFIG_KMOD=y
#
# Machine selection
#
@@ -14590,7 +18507,7 @@
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
- # CONFIG_NEC_OSPREY is not set
+-# CONFIG_NEC_OSPREY is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
CONFIG_SGI_IP22=y
@@ -14620,7 +18537,18 @@
CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_ARC32=y
-@@ -119,6 +141,17 @@ CONFIG_CPU_R5000=y
+@@ -102,8 +126,8 @@ CONFIG_ARC_PROMLIB=y
+ #
+ # CPU selection
+ #
+-# CONFIG_CPU_MIPS32 is not set
+-# CONFIG_CPU_MIPS64 is not set
++# CONFIG_CPU_MIPS32_R1 is not set
++# CONFIG_CPU_MIPS64_R1 is not set
+ # CONFIG_CPU_R3000 is not set
+ # CONFIG_CPU_TX39XX is not set
+ # CONFIG_CPU_VR41XX is not set
+@@ -119,6 +143,17 @@ CONFIG_CPU_R5000=y
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
@@ -14638,7 +18566,7 @@
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
-@@ -135,6 +168,7 @@ CONFIG_CPU_HAS_SYNC=y
+@@ -135,6 +170,7 @@ CONFIG_CPU_HAS_SYNC=y
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
@@ -14646,7 +18574,7 @@
# CONFIG_EISA is not set
CONFIG_MMU=y
-@@ -144,10 +178,6 @@ CONFIG_MMU=y
+@@ -144,10 +180,6 @@ CONFIG_MMU=y
# CONFIG_PCCARD is not set
#
@@ -14657,7 +18585,15 @@
# PCI Hotplug Support
#
-@@ -409,7 +439,7 @@ CONFIG_IP_NF_ARPFILTER=m
+@@ -276,7 +308,6 @@ CONFIG_NET=y
+ #
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+-CONFIG_NETLINK_DEV=y
+ CONFIG_UNIX=y
+ CONFIG_NET_KEY=y
+ CONFIG_INET=y
+@@ -409,7 +440,7 @@ CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
#
@@ -14666,7 +18602,7 @@
#
CONFIG_IP6_NF_QUEUE=m
CONFIG_IP6_NF_IPTABLES=m
-@@ -478,6 +508,7 @@ CONFIG_NET_SCH_INGRESS=m
+@@ -478,6 +509,7 @@ CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
@@ -14674,7 +18610,7 @@
CONFIG_NET_CLS_TCINDEX=m
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
-@@ -488,6 +519,7 @@ CONFIG_NET_CLS_U32=m
+@@ -488,6 +520,7 @@ CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_MARK is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
@@ -14682,6 +18618,14 @@
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
+@@ -505,7 +538,6 @@ CONFIG_DUMMY=m
+ CONFIG_BONDING=m
+ CONFIG_EQUALIZER=m
+ CONFIG_TUN=m
+-CONFIG_ETHERTAP=m
+
+ #
+ # Ethernet (10 or 100Mbit)
@@ -568,18 +600,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_EVBUG is not set
@@ -14701,7 +18645,7 @@
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
-@@ -597,6 +617,17 @@ CONFIG_MOUSE_SERIAL=m
+@@ -597,6 +617,16 @@ CONFIG_MOUSE_SERIAL=m
# CONFIG_INPUT_MISC is not set
#
@@ -14713,25 +18657,23 @@
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
-+CONFIG_SOUND_GAMEPORT=y
+
+#
# Character devices
#
CONFIG_VT=y
-@@ -648,6 +679,11 @@ CONFIG_RAW_DRIVER=m
+@@ -648,6 +678,10 @@ CONFIG_RAW_DRIVER=m
CONFIG_MAX_RAW_DEVS=256
#
+# TPM devices
+#
-+# CONFIG_TCG_TPM is not set
+
+#
# I2C support
#
# CONFIG_I2C is not set
-@@ -692,7 +728,6 @@ CONFIG_LOGO=y
+@@ -692,7 +726,6 @@ CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_LOGO_SGI_CLUT224=y
@@ -14739,7 +18681,7 @@
#
# Sound
-@@ -706,10 +741,6 @@ CONFIG_LOGO_SGI_CLUT224=y
+@@ -706,10 +739,6 @@ CONFIG_LOGO_SGI_CLUT224=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
@@ -14750,7 +18692,7 @@
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-@@ -739,7 +770,12 @@ CONFIG_FS_MBCACHE=y
+@@ -739,7 +768,12 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
@@ -14763,7 +18705,7 @@
# CONFIG_XFS_RT is not set
CONFIG_XFS_QUOTA=y
CONFIG_XFS_SECURITY=y
-@@ -907,7 +943,9 @@ CONFIG_NLS_UTF8=m
+@@ -907,7 +941,9 @@ CONFIG_NLS_UTF8=m
#
# Kernel hacking
#
@@ -14773,7 +18715,7 @@
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-@@ -930,6 +968,7 @@ CONFIG_CRYPTO_SHA1=m
+@@ -930,6 +966,7 @@ CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
@@ -14781,15 +18723,78 @@
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/gt64120/ev64120/Kconfig linux_HEAD/arch/mips/gt64120/ev64120/Kconfig
---- linux-2.6.11.6/arch/mips/gt64120/ev64120/Kconfig 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/galileo-boards/ev96100/setup.c linux_HEAD/arch/mips/galileo-boards/ev96100/setup.c
+--- linux-2.6.12/arch/mips/galileo-boards/ev96100/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/galileo-boards/ev96100/setup.c 2005-07-01 12:09:17.000000000 +0200
+@@ -55,7 +55,7 @@ extern void mips_reboot_setup(void);
+
+ unsigned char mac_0_1[12];
+
+-static void __init ev96100_setup(void)
++void __init plat_setup(void)
+ {
+ unsigned int config = read_c0_config();
+ unsigned int status = read_c0_status();
+@@ -142,8 +142,6 @@ static void __init ev96100_setup(void)
+ tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
+ }
+
+-early_initcall(ev96100_setup);
+-
+ unsigned short get_gt_devid(void)
+ {
+ u32 gt_devid;
+diff -urpNX dontdiff linux-2.6.12/arch/mips/gt64120/ev64120/Kconfig linux_HEAD/arch/mips/gt64120/ev64120/Kconfig
+--- linux-2.6.12/arch/mips/gt64120/ev64120/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/gt64120/ev64120/Kconfig 2005-01-30 21:45:37.000000000 +0100
@@ -0,0 +1,3 @@
+config EVB_PCI1
+ bool "Enable Second PCI (PCI1)"
+ depends on MIPS_EV64120
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/ite-boards/Kconfig linux_HEAD/arch/mips/ite-boards/Kconfig
---- linux-2.6.11.6/arch/mips/ite-boards/Kconfig 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/gt64120/ev64120/setup.c linux_HEAD/arch/mips/gt64120/ev64120/setup.c
+--- linux-2.6.12/arch/mips/gt64120/ev64120/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/gt64120/ev64120/setup.c 2005-07-01 12:09:17.000000000 +0200
+@@ -69,7 +69,7 @@ unsigned long __init prom_free_prom_memo
+ */
+ extern void gt64120_time_init(void);
+
+-static void __init ev64120_setup(void)
++void __init plat_setup(void)
+ {
+ _machine_restart = galileo_machine_restart;
+ _machine_halt = galileo_machine_halt;
+@@ -79,8 +79,6 @@ static void __init ev64120_setup(void)
+ set_io_port_base(KSEG1);
+ }
+
+-early_initcall(ev64120_setup);
+-
+ const char *get_system_type(void)
+ {
+ return "Galileo EV64120A";
+diff -urpNX dontdiff linux-2.6.12/arch/mips/gt64120/momenco_ocelot/setup.c linux_HEAD/arch/mips/gt64120/momenco_ocelot/setup.c
+--- linux-2.6.12/arch/mips/gt64120/momenco_ocelot/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/gt64120/momenco_ocelot/setup.c 2005-07-01 12:09:17.000000000 +0200
+@@ -150,7 +150,7 @@ void PMON_v2_setup()
+ gt64120_base = 0xe0000000;
+ }
+
+-static void __init momenco_ocelot_setup(void)
++void __init plat_setup(void)
+ {
+ void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
+ unsigned int tmpword;
+@@ -307,8 +307,6 @@ static void __init momenco_ocelot_setup(
+ GT_WRITE(GT_DEV_B3_OFS, 0xfef73);
+ }
+
+-early_initcall(momenco_ocelot_setup);
+-
+ extern int rm7k_tcache_enabled;
+ /*
+ * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache()
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ite-boards/Kconfig linux_HEAD/arch/mips/ite-boards/Kconfig
+--- linux-2.6.12/arch/mips/ite-boards/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/ite-boards/Kconfig 2005-01-30 21:45:36.000000000 +0100
@@ -0,0 +1,8 @@
+config IT8172_REVC
@@ -14800,8 +18805,8 @@
+ Technology Express, Inc. ITE8172 SBC. Vendor page at
+ <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
+ board at <http://www.mvista.com/partners/semiconductor/ite.html>.
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/ite-boards/generic/irq.c linux_HEAD/arch/mips/ite-boards/generic/irq.c
---- linux-2.6.11.6/arch/mips/ite-boards/generic/irq.c 2005-03-26 04:28:21.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ite-boards/generic/irq.c linux_HEAD/arch/mips/ite-boards/generic/irq.c
+--- linux-2.6.12/arch/mips/ite-boards/generic/irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/ite-boards/generic/irq.c 2005-02-28 16:56:41.000000000 +0100
@@ -138,14 +138,13 @@ static void end_ite_irq(unsigned int irq
}
@@ -14846,8 +18851,29 @@
};
void enable_cpu_timer(void)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/jazz/Kconfig linux_HEAD/arch/mips/jazz/Kconfig
---- linux-2.6.11.6/arch/mips/jazz/Kconfig 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/ite-boards/generic/it8172_setup.c linux_HEAD/arch/mips/ite-boards/generic/it8172_setup.c
+--- linux-2.6.12/arch/mips/ite-boards/generic/it8172_setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/ite-boards/generic/it8172_setup.c 2005-07-01 12:09:17.000000000 +0200
+@@ -105,7 +105,7 @@ void __init it8172_init_ram_resource(uns
+ it8172_resources.ram.end = memsize;
+ }
+
+-static void __init it8172_setup(void)
++void __init plat_setup(void)
+ {
+ unsigned short dsr;
+ char *argptr;
+@@ -251,8 +251,6 @@ static void __init it8172_setup(void)
+ #endif /* CONFIG_IT8172_SCR1 */
+ }
+
+-early_initcall(it8172_setup);
+-
+ #ifdef CONFIG_SERIO_I8042
+ /*
+ * According to the ITE Special BIOS Note for waking up the
+diff -urpNX dontdiff linux-2.6.12/arch/mips/jazz/Kconfig linux_HEAD/arch/mips/jazz/Kconfig
+--- linux-2.6.12/arch/mips/jazz/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/jazz/Kconfig 2005-01-30 21:45:36.000000000 +0100
@@ -0,0 +1,33 @@
+config ACER_PICA_61
@@ -14883,8 +18909,8 @@
+ kernel that runs on these, say Y here. For details about Linux on
+ the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
+ <http://www.linux-mips.org/>.
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/jazz/irq.c linux_HEAD/arch/mips/jazz/irq.c
---- linux-2.6.11.6/arch/mips/jazz/irq.c 2005-03-26 04:28:14.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/jazz/irq.c linux_HEAD/arch/mips/jazz/irq.c
+--- linux-2.6.12/arch/mips/jazz/irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/jazz/irq.c 2005-02-28 16:56:41.000000000 +0100
@@ -58,14 +58,13 @@ static void end_r4030_irq(unsigned int i
}
@@ -14908,8 +18934,26 @@
};
void __init init_r4030_ints(void)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/jmr3927/rbhma3100/irq.c linux_HEAD/arch/mips/jmr3927/rbhma3100/irq.c
---- linux-2.6.11.6/arch/mips/jmr3927/rbhma3100/irq.c 2005-03-26 04:28:19.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/jazz/setup.c linux_HEAD/arch/mips/jazz/setup.c
+--- linux-2.6.12/arch/mips/jazz/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/jazz/setup.c 2005-07-01 12:09:17.000000000 +0200
+@@ -50,7 +50,7 @@ static struct resource jazz_io_resources
+ { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+ };
+
+-static void __init jazz_setup(void)
++void __init plat_setup(void)
+ {
+ int i;
+
+@@ -97,5 +97,3 @@ static void __init jazz_setup(void)
+
+ vdma_init();
+ }
+-
+-early_initcall(jazz_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/jmr3927/rbhma3100/irq.c linux_HEAD/arch/mips/jmr3927/rbhma3100/irq.c
+--- linux-2.6.12/arch/mips/jmr3927/rbhma3100/irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/jmr3927/rbhma3100/irq.c 2005-02-28 16:56:41.000000000 +0100
@@ -412,13 +412,13 @@ void __init arch_init_irq(void)
}
@@ -14932,9 +18976,9 @@
};
void jmr3927_irq_init(u32 irq_base)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/jmr3927/rbhma3100/setup.c linux_HEAD/arch/mips/jmr3927/rbhma3100/setup.c
---- linux-2.6.11.6/arch/mips/jmr3927/rbhma3100/setup.c 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/arch/mips/jmr3927/rbhma3100/setup.c 2005-03-04 20:36:08.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/jmr3927/rbhma3100/setup.c linux_HEAD/arch/mips/jmr3927/rbhma3100/setup.c
+--- linux-2.6.12/arch/mips/jmr3927/rbhma3100/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/jmr3927/rbhma3100/setup.c 2005-07-01 12:09:17.000000000 +0200
@@ -44,6 +44,11 @@
#include <linux/ioport.h>
#include <linux/param.h> /* for HZ */
@@ -14947,6 +18991,15 @@
#include <asm/addrspace.h>
#include <asm/time.h>
+@@ -193,7 +198,7 @@ static void jmr3927_board_init(void);
+ extern struct resource pci_io_resource;
+ extern struct resource pci_mem_resource;
+
+-static void __init jmr3927_setup(void)
++void __init plat_setup(void)
+ {
+ char *argptr;
+
@@ -211,8 +216,8 @@ static void __init jmr3927_setup(void)
*/
ioport_resource.start = pci_io_resource.start;
@@ -14958,7 +19011,7 @@
/* Reboot on panic */
panic_timeout = 180;
-@@ -265,13 +270,33 @@ static void __init jmr3927_setup(void)
+@@ -265,18 +270,35 @@ static void __init jmr3927_setup(void)
strcat(argptr, " ip=bootp");
}
@@ -14992,10 +19045,24 @@
+#endif
}
- early_initcall(jmr3927_setup);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/Makefile linux_HEAD/arch/mips/kernel/Makefile
---- linux-2.6.11.6/arch/mips/kernel/Makefile 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/Makefile 2005-01-31 03:10:53.000000000 +0100
+-early_initcall(jmr3927_setup);
+-
+-
+ static void tx3927_setup(void);
+
+ #ifdef CONFIG_PCI
+@@ -335,7 +357,7 @@ static void __init jmr3927_board_init(vo
+ jmr3927_io_dipsw());
+ }
+
+-static void __init tx3927_setup(void)
++void __init plat_setup(void)
+ {
+ int i;
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/Makefile linux_HEAD/arch/mips/kernel/Makefile
+--- linux-2.6.12/arch/mips/kernel/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/Makefile 2005-07-07 11:22:49.000000000 +0200
@@ -11,11 +11,7 @@ obj-y += cpu-probe.o branch.o entry.o g
binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \
irix5sys.o sysirix.o
@@ -15009,8 +19076,19 @@
obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o
obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o r2300_switch.o
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/binfmt_elfn32.c linux_HEAD/arch/mips/kernel/binfmt_elfn32.c
---- linux-2.6.11.6/arch/mips/kernel/binfmt_elfn32.c 2005-03-26 04:28:22.000000000 +0100
+@@ -32,8 +28,8 @@ obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4
+ obj-$(CONFIG_CPU_NEVADA) += r4k_fpu.o r4k_switch.o
+ obj-$(CONFIG_CPU_R10000) += r4k_fpu.o r4k_switch.o
+ obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o
+-obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o
+-obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o
++obj-$(CONFIG_CPU_MIPS32_R1) += r4k_fpu.o r4k_switch.o
++obj-$(CONFIG_CPU_MIPS64_R1) += r4k_fpu.o r4k_switch.o
+ obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o
+
+ obj-$(CONFIG_SMP) += smp.o
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/binfmt_elfn32.c linux_HEAD/arch/mips/kernel/binfmt_elfn32.c
+--- linux-2.6.12/arch/mips/kernel/binfmt_elfn32.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/binfmt_elfn32.c 2005-02-17 21:48:54.000000000 +0100
@@ -52,7 +52,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_N
@@ -15028,8 +19106,8 @@
+#define TASK_SIZE TASK_SIZE32
+
#include "../../../fs/binfmt_elf.c"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/binfmt_elfo32.c linux_HEAD/arch/mips/kernel/binfmt_elfo32.c
---- linux-2.6.11.6/arch/mips/kernel/binfmt_elfo32.c 2005-03-26 04:28:18.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/binfmt_elfo32.c linux_HEAD/arch/mips/kernel/binfmt_elfo32.c
+--- linux-2.6.12/arch/mips/kernel/binfmt_elfo32.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/binfmt_elfo32.c 2005-02-17 21:48:54.000000000 +0100
@@ -54,7 +54,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_N
@@ -15095,19 +19173,322 @@
+#define TASK_SIZE TASK_SIZE32
+
#include "../../../fs/binfmt_elf.c"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/cpu-probe.c linux_HEAD/arch/mips/kernel/cpu-probe.c
---- linux-2.6.11.6/arch/mips/kernel/cpu-probe.c 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/cpu-probe.c 2005-03-01 15:00:12.000000000 +0100
-@@ -116,6 +116,8 @@ static inline void check_wait(void)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/branch.c linux_HEAD/arch/mips/kernel/branch.c
+--- linux-2.6.12/arch/mips/kernel/branch.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/branch.c 2005-07-01 12:09:17.000000000 +0200
+@@ -12,6 +12,7 @@
+ #include <asm/branch.h>
+ #include <asm/cpu.h>
+ #include <asm/cpu-features.h>
++#include <asm/fpu.h>
+ #include <asm/inst.h>
+ #include <asm/ptrace.h>
+ #include <asm/uaccess.h>
+@@ -21,7 +22,7 @@
+ */
+ int __compute_return_epc(struct pt_regs *regs)
+ {
+- unsigned int *addr, bit, fcr31;
++ unsigned int *addr, bit, fcr31, dspcontrol;
+ long epc;
+ union mips_instruction insn;
+
+@@ -98,6 +99,18 @@ int __compute_return_epc(struct pt_regs
+ epc += 8;
+ regs->cp0_epc = epc;
+ break;
++ case bposge32_op:
++ if (!cpu_has_dsp)
++ goto sigill;
++
++ dspcontrol = rddsp(0x01);
++
++ if (dspcontrol >= 32) {
++ epc = epc + 4 + (insn.i_format.simmediate << 2);
++ } else
++ epc += 8;
++ regs->cp0_epc = epc;
++ break;
+ }
+ break;
+
+@@ -161,10 +174,13 @@ int __compute_return_epc(struct pt_regs
+ * And now the FPA/cp1 branch instructions.
+ */
+ case cop1_op:
+- if (!cpu_has_fpu)
+- fcr31 = current->thread.fpu.soft.fcr31;
+- else
++ preempt_disable();
++ if (is_fpu_owner())
+ asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
++ else
++ fcr31 = current->thread.fpu.hard.fcr31;
++ preempt_enable();
++
+ bit = (insn.i_format.rt >> 2);
+ bit += (bit != 0);
+ bit += 23;
+@@ -196,4 +212,9 @@ unaligned:
+ printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
+ force_sig(SIGBUS, current);
+ return -EFAULT;
++
++sigill:
++ printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
++ force_sig(SIGBUS, current);
++ return -EFAULT;
+ }
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/cpu-probe.c linux_HEAD/arch/mips/kernel/cpu-probe.c
+--- linux-2.6.12/arch/mips/kernel/cpu-probe.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/cpu-probe.c 2005-07-01 12:09:17.000000000 +0200
+@@ -2,9 +2,9 @@
+ * Processor capabilities determination functions.
+ *
+ * Copyright (C) xxxx the Anonymous
+- * Copyright (C) 2003 Maciej W. Rozycki
++ * Copyright (C) 2003, 2004 Maciej W. Rozycki
+ * Copyright (C) 1994 - 2003 Ralf Baechle
+- * Copyright (C) 2001 MIPS Inc.
++ * Copyright (C) 2001, 2004 MIPS Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+@@ -17,7 +17,6 @@
+ #include <linux/ptrace.h>
+ #include <linux/stddef.h>
+
+-#include <asm/bugs.h>
+ #include <asm/cpu.h>
+ #include <asm/fpu.h>
+ #include <asm/mipsregs.h>
+@@ -51,29 +50,25 @@ static void r4k_wait(void)
+ ".set\tmips0");
+ }
+
+-/*
+- * The Au1xxx wait is available only if we run CONFIG_PM and
+- * the timer setup found we had a 32KHz counter available.
+- * There are still problems with functions that may call au1k_wait
+- * directly, but that will be discovered pretty quickly.
+- */
+-extern void (*au1k_wait_ptr)(void);
++/* The Au1xxx wait is available only if using 32khz counter or
++ * external timer source, but specifically not CP0 Counter. */
++int allow_au1k_wait;
+
+-void au1k_wait(void)
++static void au1k_wait(void)
+ {
+-#ifdef CONFIG_PM
+ /* using the wait instruction makes CP0 counter unusable */
+- __asm__(".set\tmips3\n\t"
++ __asm__(".set mips3\n\t"
++ "cache 0x14, 0(%0)\n\t"
++ "cache 0x14, 32(%0)\n\t"
++ "sync\n\t"
++ "nop\n\t"
+ "wait\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+ "nop\n\t"
+- ".set\tmips0");
+-#else
+- __asm__("nop\n\t"
+- "nop");
+-#endif
++ ".set mips0\n\t"
++ : : "r" (au1k_wait));
+ }
+
+ static inline void check_wait(void)
+@@ -112,19 +107,17 @@ static inline void check_wait(void)
+ cpu_wait = r4k_wait;
+ printk(" available.\n");
+ break;
+-#ifdef CONFIG_PM
case CPU_AU1000:
case CPU_AU1100:
case CPU_AU1500:
+- if (au1k_wait_ptr != NULL) {
+- cpu_wait = au1k_wait_ptr;
+ case CPU_AU1550:
+ case CPU_AU1200:
- if (au1k_wait_ptr != NULL) {
- cpu_wait = au1k_wait_ptr;
++ if (allow_au1k_wait) {
++ cpu_wait = au1k_wait;
printk(" available.\n");
-@@ -511,6 +513,9 @@ static inline void cpu_probe_alchemy(str
+- }
+- else {
++ } else
+ printk(" unavailable.\n");
+- }
+ break;
+-#endif
+ default:
+ printk(" unavailable.\n");
+ break;
+@@ -427,65 +420,127 @@ static inline void cpu_probe_legacy(stru
+ }
+ }
+
+-static inline void decode_config1(struct cpuinfo_mips *c)
++static inline unsigned int decode_config0(struct cpuinfo_mips *c)
+ {
+- unsigned long config0 = read_c0_config();
+- unsigned long config1;
++ unsigned int config0;
++ int isa;
++
++ config0 = read_c0_config();
++
++ if (((config0 & MIPS_CONF_MT) >> 7) == 1)
++ c->options |= MIPS_CPU_TLB | MIPS_CPU_4KTLB;
++ isa = (config0 & MIPS_CONF_AT) >> 13;
++ switch (isa) {
++ case 0:
++ c->isa_level = MIPS_CPU_ISA_M32;
++ break;
++ case 2:
++ c->isa_level = MIPS_CPU_ISA_M64;
++ break;
++ default:
++ panic("Unsupported ISA type, cp0.config0.at: %d.", isa);
++ }
++
++ return config0 & MIPS_CONF_M;
++}
+
+- if ((config0 & (1 << 31)) == 0)
+- return; /* actually wort a panic() */
++static inline unsigned int decode_config1(struct cpuinfo_mips *c)
++{
++ unsigned int config1;
+
+- /* MIPS32 or MIPS64 compliant CPU. Read Config 1 register. */
+- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+- MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
+- MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
+ config1 = read_c0_config1();
+- if (config1 & (1 << 3))
++
++ if (config1 & MIPS_CONF1_MD)
++ c->ases |= MIPS_ASE_MDMX;
++ if (config1 & MIPS_CONF1_WR)
+ c->options |= MIPS_CPU_WATCH;
+- if (config1 & (1 << 2))
+- c->options |= MIPS_CPU_MIPS16;
+- if (config1 & (1 << 1))
++ if (config1 & MIPS_CONF1_CA)
++ c->ases |= MIPS_ASE_MIPS16;
++ if (config1 & MIPS_CONF1_EP)
+ c->options |= MIPS_CPU_EJTAG;
+- if (config1 & 1) {
++ if (config1 & MIPS_CONF1_FP) {
+ c->options |= MIPS_CPU_FPU;
+ c->options |= MIPS_CPU_32FPR;
+ }
++ if (cpu_has_tlb)
++ c->tlbsize = ((config1 & MIPS_CONF1_TLBS) >> 25) + 1;
++
++ return config1 & MIPS_CONF_M;
++}
++
++static inline unsigned int decode_config2(struct cpuinfo_mips *c)
++{
++ unsigned int config2;
++
++ config2 = read_c0_config2();
++
++ if (config2 & MIPS_CONF2_SL)
++ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
++
++ return config2 & MIPS_CONF_M;
++}
++
++static inline unsigned int decode_config3(struct cpuinfo_mips *c)
++{
++ unsigned int config3;
++
++ config3 = read_c0_config3();
++
++ if (config3 & MIPS_CONF3_SM)
++ c->ases |= MIPS_ASE_SMARTMIPS;
++ if (config3 & MIPS_CONF3_DSP)
++ c->ases |= MIPS_ASE_DSP;
++
++ return config3 & MIPS_CONF_M;
++}
++
++static inline void decode_configs(struct cpuinfo_mips *c)
++{
++ /* MIPS32 or MIPS64 compliant CPU. */
++ c->options = MIPS_CPU_4KEX | MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
++ MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
++
+ c->scache.flags = MIPS_CACHE_NOT_PRESENT;
+
+- c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
++ /* Read Config registers. */
++ if (!decode_config0(c))
++ return; /* actually worth a panic() */
++ if (!decode_config1(c))
++ return;
++ if (!decode_config2(c))
++ return;
++ if (!decode_config3(c))
++ return;
+ }
+
+ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
+ {
+- decode_config1(c);
++ decode_configs(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_4KC:
+ c->cputype = CPU_4KC;
+- c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ case PRID_IMP_4KEC:
+ c->cputype = CPU_4KEC;
+- c->isa_level = MIPS_CPU_ISA_M32;
++ break;
++ case PRID_IMP_4KECR2:
++ c->cputype = CPU_4KEC;
+ break;
+ case PRID_IMP_4KSC:
+ c->cputype = CPU_4KSC;
+- c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ case PRID_IMP_5KC:
+ c->cputype = CPU_5KC;
+- c->isa_level = MIPS_CPU_ISA_M64;
+ break;
+ case PRID_IMP_20KC:
+ c->cputype = CPU_20KC;
+- c->isa_level = MIPS_CPU_ISA_M64;
+ break;
+ case PRID_IMP_24K:
++ case PRID_IMP_24KE:
+ c->cputype = CPU_24K;
+- c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ case PRID_IMP_25KF:
+ c->cputype = CPU_25KF;
+- c->isa_level = MIPS_CPU_ISA_M64;
+ /* Probe for L2 cache */
+ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
+ break;
+@@ -494,7 +549,7 @@ static inline void cpu_probe_mips(struct
+
+ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
+ {
+- decode_config1(c);
++ decode_configs(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_AU1_REV1:
+ case PRID_IMP_AU1_REV2:
+@@ -511,29 +566,26 @@ static inline void cpu_probe_alchemy(str
case 3:
c->cputype = CPU_AU1550;
break;
@@ -15117,8 +19498,74 @@
default:
panic("Unknown Au Core!");
break;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/dma-no-isa.c linux_HEAD/arch/mips/kernel/dma-no-isa.c
---- linux-2.6.11.6/arch/mips/kernel/dma-no-isa.c 1970-01-01 01:00:00.000000000 +0100
+ }
+- c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ }
+ }
+
+ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
+ {
+- decode_config1(c);
++ decode_configs(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_SB1:
+ c->cputype = CPU_SB1;
+- c->isa_level = MIPS_CPU_ISA_M64;
+- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+- MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
+- MIPS_CPU_MCHECK | MIPS_CPU_EJTAG |
+- MIPS_CPU_WATCH | MIPS_CPU_LLSC;
+-#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
++#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
+ /* FPU in pass1 is known to have issues. */
+- c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR;
++ c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
+ #endif
+ break;
+ }
+@@ -541,14 +593,10 @@ static inline void cpu_probe_sibyte(stru
+
+ static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
+ {
+- decode_config1(c);
++ decode_configs(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_SR71000:
+ c->cputype = CPU_SR71000;
+- c->isa_level = MIPS_CPU_ISA_M64;
+- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+- MIPS_CPU_4KTLB | MIPS_CPU_FPU |
+- MIPS_CPU_COUNTER | MIPS_CPU_MCHECK;
+ c->scache.ways = 8;
+ c->tlbsize = 64;
+ break;
+@@ -577,15 +625,21 @@ __init void cpu_probe(void)
+ case PRID_COMP_SIBYTE:
+ cpu_probe_sibyte(c);
+ break;
+-
+ case PRID_COMP_SANDCRAFT:
+ cpu_probe_sandcraft(c);
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ }
+- if (c->options & MIPS_CPU_FPU)
++ if (c->options & MIPS_CPU_FPU) {
+ c->fpu_id = cpu_get_fpu_id();
++
++ if (c->isa_level == MIPS_CPU_ISA_M32 ||
++ c->isa_level == MIPS_CPU_ISA_M64) {
++ if (c->fpu_id & MIPS_FPIR_3D)
++ c->ases |= MIPS_ASE_MIPS3D;
++ }
++ }
+ }
+
+ __init void cpu_report(void)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/dma-no-isa.c linux_HEAD/arch/mips/kernel/dma-no-isa.c
+--- linux-2.6.12/arch/mips/kernel/dma-no-isa.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/kernel/dma-no-isa.c 2005-02-17 21:48:54.000000000 +0100
@@ -0,0 +1,28 @@
+/*
@@ -15149,8 +19596,8 @@
+EXPORT_SYMBOL(dma_spin_lock);
+EXPORT_SYMBOL(request_dma);
+EXPORT_SYMBOL(free_dma);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/entry.S linux_HEAD/arch/mips/kernel/entry.S
---- linux-2.6.11.6/arch/mips/kernel/entry.S 2005-03-26 04:28:16.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/entry.S linux_HEAD/arch/mips/kernel/entry.S
+--- linux-2.6.12/arch/mips/kernel/entry.S 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/entry.S 2005-03-04 20:36:08.000000000 +0100
@@ -19,11 +19,11 @@
#include <asm/war.h>
@@ -15272,8 +19719,8 @@
#endif
j ret_from_irq
END(spurious_interrupt)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/gdb-stub.c linux_HEAD/arch/mips/kernel/gdb-stub.c
---- linux-2.6.11.6/arch/mips/kernel/gdb-stub.c 2005-03-26 04:28:38.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/gdb-stub.c linux_HEAD/arch/mips/kernel/gdb-stub.c
+--- linux-2.6.12/arch/mips/kernel/gdb-stub.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/gdb-stub.c 2005-02-17 21:48:54.000000000 +0100
@@ -176,7 +176,7 @@ int kgdb_enabled;
/*
@@ -15303,9 +19750,9 @@
async_bp.addr = *epc;
*epc = (unsigned long)async_breakpoint;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/genex.S linux_HEAD/arch/mips/kernel/genex.S
---- linux-2.6.11.6/arch/mips/kernel/genex.S 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/genex.S 2004-12-21 03:25:15.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/genex.S linux_HEAD/arch/mips/kernel/genex.S
+--- linux-2.6.12/arch/mips/kernel/genex.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/genex.S 2005-07-01 12:09:17.000000000 +0200
@@ -82,7 +82,7 @@ NESTED(except_vec3_r4000, 0, sp)
li k0, 14<<2
beq k1, k0, handle_vcei
@@ -15337,8 +19784,16 @@
#ifdef CONFIG_PROC_FS
PTR_LA k0, vced_count
lw k1, (k0)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/genrtc.c linux_HEAD/arch/mips/kernel/genrtc.c
---- linux-2.6.11.6/arch/mips/kernel/genrtc.c 2005-03-26 04:28:27.000000000 +0100
+@@ -291,6 +291,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
+ BUILD_HANDLER mdmx mdmx sti silent /* #22 */
+ BUILD_HANDLER watch watch sti verbose /* #23 */
+ BUILD_HANDLER mcheck mcheck cli verbose /* #24 */
++ BUILD_HANDLER dsp dsp sti silent /* #26 */
+ BUILD_HANDLER reserved reserved sti verbose /* others */
+
+ #ifdef CONFIG_MIPS64
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/genrtc.c linux_HEAD/arch/mips/kernel/genrtc.c
+--- linux-2.6.12/arch/mips/kernel/genrtc.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/genrtc.c 2005-02-17 21:48:54.000000000 +0100
@@ -14,7 +14,7 @@
#include <asm/rtc.h>
@@ -15349,8 +19804,8 @@
unsigned int get_rtc_time(struct rtc_time *time)
{
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/head.S linux_HEAD/arch/mips/kernel/head.S
---- linux-2.6.11.6/arch/mips/kernel/head.S 2005-03-26 04:28:24.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/head.S linux_HEAD/arch/mips/kernel/head.S
+--- linux-2.6.12/arch/mips/kernel/head.S 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/head.S 2005-03-28 22:29:17.000000000 +0200
@@ -157,6 +157,7 @@ NESTED(kernel_entry, 16, sp) # kernel
LONG_S a2, fw_arg2
@@ -15384,8 +19839,8 @@
*/
page swapper_pg_dir, _PGD_ORDER
#ifdef CONFIG_MIPS64
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/i8259.c linux_HEAD/arch/mips/kernel/i8259.c
---- linux-2.6.11.6/arch/mips/kernel/i8259.c 2005-03-26 04:28:16.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/i8259.c linux_HEAD/arch/mips/kernel/i8259.c
+--- linux-2.6.12/arch/mips/kernel/i8259.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/i8259.c 2005-03-01 22:49:39.000000000 +0100
@@ -31,7 +31,7 @@ void disable_8259A_irq(unsigned int irq)
* moves to arch independent land
@@ -15427,8 +19882,542 @@
irq_desc[i].depth = 1;
irq_desc[i].handler = &i8259A_irq_type;
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/irixinv.c linux_HEAD/arch/mips/kernel/irixinv.c
---- linux-2.6.11.6/arch/mips/kernel/irixinv.c 2005-04-02 23:39:54.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irixelf.c linux_HEAD/arch/mips/kernel/irixelf.c
+--- linux-2.6.12/arch/mips/kernel/irixelf.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/irixelf.c 2005-04-08 22:40:40.000000000 +0200
+@@ -8,7 +8,7 @@
+ *
+ * Copyright (C) 1993 - 1994 Eric Youngdale <ericy at cais.com>
+ * Copyright (C) 1996 - 2004 David S. Miller <dm at engr.sgi.com>
+- * Copyright (C) 2004 Steven J. Hill <sjhill at realitydiluted.com>
++ * Copyright (C) 2004 - 2005 Steven J. Hill <sjhill at realitydiluted.com>
+ */
+ #include <linux/module.h>
+ #include <linux/fs.h>
+@@ -31,15 +31,16 @@
+ #include <linux/elfcore.h>
+ #include <linux/smp_lock.h>
+
+-#include <asm/uaccess.h>
+ #include <asm/mipsregs.h>
++#include <asm/namei.h>
+ #include <asm/prctl.h>
++#include <asm/uaccess.h>
+
+ #define DLINFO_ITEMS 12
+
+ #include <linux/elf.h>
+
+-#undef DEBUG_ELF
++#undef DEBUG
+
+ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs);
+ static int load_irix_library(struct file *);
+@@ -55,7 +56,7 @@ static struct linux_binfmt irix_format =
+ #define elf_addr_t unsigned long
+ #endif
+
+-#ifdef DEBUG_ELF
++#ifdef DEBUG
+ /* Debugging routines. */
+ static char *get_elf_p_type(Elf32_Word p_type)
+ {
+@@ -120,7 +121,7 @@ static void dump_phdrs(struct elf_phdr *
+ print_phdr(i, ep);
+ }
+ }
+-#endif /* (DEBUG_ELF) */
++#endif /* DEBUG */
+
+ static void set_brk(unsigned long start, unsigned long end)
+ {
+@@ -146,20 +147,20 @@ static void padzero(unsigned long elf_bs
+ nbyte = elf_bss & (PAGE_SIZE-1);
+ if (nbyte) {
+ nbyte = PAGE_SIZE - nbyte;
+- clear_user((void *) elf_bss, nbyte);
++ clear_user((void __user *) elf_bss, nbyte);
+ }
+ }
+
+-unsigned long * create_irix_tables(char * p, int argc, int envc,
+- struct elfhdr * exec, unsigned int load_addr,
+- unsigned int interp_load_addr,
+- struct pt_regs *regs, struct elf_phdr *ephdr)
++static unsigned long * create_irix_tables(char * p, int argc, int envc,
++ struct elfhdr * exec, unsigned int load_addr,
++ unsigned int interp_load_addr, struct pt_regs *regs,
++ struct elf_phdr *ephdr)
+ {
+ elf_addr_t *argv;
+ elf_addr_t *envp;
+ elf_addr_t *sp, *csp;
+
+-#ifdef DEBUG_ELF
++#ifdef DEBUG
+ printk("create_irix_tables: p[%p] argc[%d] envc[%d] "
+ "load_addr[%08x] interp_load_addr[%08x]\n",
+ p, argc, envc, load_addr, interp_load_addr);
+@@ -248,14 +249,13 @@ static unsigned int load_irix_interp(str
+ last_bss = 0;
+ error = load_addr = 0;
+
+-#ifdef DEBUG_ELF
++#ifdef DEBUG
+ print_elfhdr(interp_elf_ex);
+ #endif
+
+ /* First of all, some simple consistency checks */
+ if ((interp_elf_ex->e_type != ET_EXEC &&
+ interp_elf_ex->e_type != ET_DYN) ||
+- !irix_elf_check_arch(interp_elf_ex) ||
+ !interpreter->f_op->mmap) {
+ printk("IRIX interp has bad e_type %d\n", interp_elf_ex->e_type);
+ return 0xffffffff;
+@@ -290,7 +290,7 @@ static unsigned int load_irix_interp(str
+ (char *) elf_phdata,
+ sizeof(struct elf_phdr) * interp_elf_ex->e_phnum);
+
+-#ifdef DEBUG_ELF
++#ifdef DEBUG
+ dump_phdrs(elf_phdata, interp_elf_ex->e_phnum);
+ #endif
+
+@@ -306,13 +306,11 @@ static unsigned int load_irix_interp(str
+ elf_type |= MAP_FIXED;
+ vaddr = eppnt->p_vaddr;
+
+-#ifdef DEBUG_ELF
+- printk("INTERP do_mmap(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ",
++ pr_debug("INTERP do_mmap(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ",
+ interpreter, vaddr,
+ (unsigned long) (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)),
+ (unsigned long) elf_prot, (unsigned long) elf_type,
+ (unsigned long) (eppnt->p_offset & 0xfffff000));
+-#endif
+ down_write(¤t->mm->mmap_sem);
+ error = do_mmap(interpreter, vaddr,
+ eppnt->p_filesz + (eppnt->p_vaddr & 0xfff),
+@@ -324,14 +322,10 @@ static unsigned int load_irix_interp(str
+ printk("Aieee IRIX interp mmap error=%d\n", error);
+ break; /* Real error */
+ }
+-#ifdef DEBUG_ELF
+- printk("error=%08lx ", (unsigned long) error);
+-#endif
++ pr_debug("error=%08lx ", (unsigned long) error);
+ if(!load_addr && interp_elf_ex->e_type == ET_DYN) {
+ load_addr = error;
+-#ifdef DEBUG_ELF
+- printk("load_addr = error ");
+-#endif
++ pr_debug("load_addr = error ");
+ }
+
+ /* Find the end of the file mapping for this phdr, and keep
+@@ -345,17 +339,13 @@ static unsigned int load_irix_interp(str
+ */
+ k = eppnt->p_memsz + eppnt->p_vaddr;
+ if(k > last_bss) last_bss = k;
+-#ifdef DEBUG_ELF
+- printk("\n");
+-#endif
++ pr_debug("\n");
+ }
+ }
+
+ /* Now use mmap to map the library into memory. */
+ if(error < 0 && error > -1024) {
+-#ifdef DEBUG_ELF
+- printk("got error %d\n", error);
+-#endif
++ pr_debug("got error %d\n", error);
+ kfree(elf_phdata);
+ return 0xffffffff;
+ }
+@@ -365,16 +355,12 @@ static unsigned int load_irix_interp(str
+ * that there are zero-mapped pages up to and including the
+ * last bss page.
+ */
+-#ifdef DEBUG_ELF
+- printk("padzero(%08lx) ", (unsigned long) (elf_bss));
+-#endif
++ pr_debug("padzero(%08lx) ", (unsigned long) (elf_bss));
+ padzero(elf_bss);
+ len = (elf_bss + 0xfff) & 0xfffff000; /* What we have mapped so far */
+
+-#ifdef DEBUG_ELF
+- printk("last_bss[%08lx] len[%08lx]\n", (unsigned long) last_bss,
+- (unsigned long) len);
+-#endif
++ pr_debug("last_bss[%08lx] len[%08lx]\n", (unsigned long) last_bss,
++ (unsigned long) len);
+
+ /* Map the last of the bss segment */
+ if (last_bss > len) {
+@@ -396,12 +382,7 @@ static int verify_binary(struct elfhdr *
+
+ /* First of all, some simple consistency checks */
+ if((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) ||
+- !irix_elf_check_arch(ehp) || !bprm->file->f_op->mmap) {
+- return -ENOEXEC;
+- }
+-
+- /* Only support MIPS ARCH2 or greater IRIX binaries for now. */
+- if(!(ehp->e_flags & EF_MIPS_ARCH) && !(ehp->e_flags & 0x04)) {
++ !bprm->file->f_op->mmap) {
+ return -ENOEXEC;
+ }
+
+@@ -411,16 +392,17 @@ static int verify_binary(struct elfhdr *
+ * XXX all registers as 64bits on cpu's capable of this at
+ * XXX exception time plus frob the XTLB exception vector.
+ */
+- if((ehp->e_flags & 0x20)) {
++ if((ehp->e_flags & EF_MIPS_ABI2))
+ return -ENOEXEC;
+- }
+
+- return 0; /* It's ok. */
++ return 0;
+ }
+
+-#define IRIX_INTERP_PREFIX "/usr/gnemul/irix"
+-
+-/* Look for an IRIX ELF interpreter. */
++/*
++ * This is where the detailed check is performed. Irix binaries
++ * use interpreters with 'libc.so' in the name, so this function
++ * can differentiate between Linux and Irix binaries.
++ */
+ static inline int look_for_irix_interpreter(char **name,
+ struct file **interpreter,
+ struct elfhdr *interp_elf_ex,
+@@ -440,12 +422,13 @@ static inline int look_for_irix_interpre
+ if (*name != NULL)
+ goto out;
+
+- *name = kmalloc((epp->p_filesz + strlen(IRIX_INTERP_PREFIX)),
+- GFP_KERNEL);
++ *name = (char *) kmalloc((epp->p_filesz +
++ strlen(IRIX_EMUL)),
++ GFP_KERNEL);
+ if (!*name)
+ return -ENOMEM;
+
+- strcpy(*name, IRIX_INTERP_PREFIX);
++ strcpy(*name, IRIX_EMUL);
+ retval = kernel_read(bprm->file, epp->p_offset, (*name + 16),
+ epp->p_filesz);
+ if (retval < 0)
+@@ -562,7 +545,7 @@ static inline int map_interpreter(struct
+ * process and the system, here we map the page and fill the
+ * structure
+ */
+-void irix_map_prda_page (void)
++static void irix_map_prda_page(void)
+ {
+ unsigned long v;
+ struct prda *pp;
+@@ -601,14 +584,33 @@ static int load_irix_binary(struct linux
+
+ load_addr = 0;
+ has_interp = has_ephdr = 0;
+- elf_ihdr = elf_ephdr = 0;
++ elf_ihdr = elf_ephdr = NULL;
+ elf_ex = *((struct elfhdr *) bprm->buf);
+ retval = -ENOEXEC;
+
+ if (verify_binary(&elf_ex, bprm))
+ goto out;
+
+-#ifdef DEBUG_ELF
++ /*
++ * Telling -o32 static binaries from Linux and Irix apart from each
++ * other is difficult. There are 2 differences to be noted for static
++ * binaries from the 2 operating systems:
++ *
++ * 1) Irix binaries have their .text section before their .init
++ * section. Linux binaries are just the opposite.
++ *
++ * 2) Irix binaries usually have <= 12 sections and Linux
++ * binaries have > 20.
++ *
++ * We will use Method #2 since Method #1 would require us to read in
++ * the section headers which is way too much overhead. This appears
++ * to work for everything we have ran into so far. If anyone has a
++ * better method to tell the binaries apart, I'm listening.
++ */
++ if (elf_ex.e_shnum > 20)
++ goto out;
++
++#ifdef DEBUG
+ print_elfhdr(&elf_ex);
+ #endif
+
+@@ -623,11 +625,10 @@ static int load_irix_binary(struct linux
+ }
+
+ retval = kernel_read(bprm->file, elf_ex.e_phoff, (char *)elf_phdata, size);
+-
+ if (retval < 0)
+ goto out_free_ph;
+
+-#ifdef DEBUG_ELF
++#ifdef DEBUG
+ dump_phdrs(elf_phdata, elf_ex.e_phnum);
+ #endif
+
+@@ -644,9 +645,8 @@ static int load_irix_binary(struct linux
+ break;
+ };
+ }
+-#ifdef DEBUG_ELF
+- printk("\n");
+-#endif
++
++ pr_debug("\n");
+
+ elf_bss = 0;
+ elf_brk = 0;
+@@ -657,12 +657,19 @@ static int load_irix_binary(struct linux
+ end_code = 0;
+ end_data = 0;
+
+- retval = look_for_irix_interpreter(&elf_interpreter,
+- &interpreter,
++ /*
++ * If we get a return value, we change the value to be ENOEXEC
++ * so that we can exit gracefully and the main binary format
++ * search loop in 'fs/exec.c' will move onto the next handler
++ * which should be the normal ELF binary handler.
++ */
++ retval = look_for_irix_interpreter(&elf_interpreter, &interpreter,
+ &interp_elf_ex, elf_phdata, bprm,
+ elf_ex.e_phnum);
+- if (retval)
++ if (retval) {
++ retval = -ENOEXEC;
+ goto out_free_file;
++ }
+
+ if (elf_interpreter) {
+ retval = verify_irix_interpreter(&interp_elf_ex);
+@@ -746,18 +753,16 @@ static int load_irix_binary(struct linux
+ * IRIX maps a page at 0x200000 which holds some system
+ * information. Programs depend on this.
+ */
+- irix_map_prda_page ();
++ irix_map_prda_page();
+
+ padzero(elf_bss);
+
+-#ifdef DEBUG_ELF
+- printk("(start_brk) %lx\n" , (long) current->mm->start_brk);
+- printk("(end_code) %lx\n" , (long) current->mm->end_code);
+- printk("(start_code) %lx\n" , (long) current->mm->start_code);
+- printk("(end_data) %lx\n" , (long) current->mm->end_data);
+- printk("(start_stack) %lx\n" , (long) current->mm->start_stack);
+- printk("(brk) %lx\n" , (long) current->mm->brk);
+-#endif
++ pr_debug("(start_brk) %lx\n" , (long) current->mm->start_brk);
++ pr_debug("(end_code) %lx\n" , (long) current->mm->end_code);
++ pr_debug("(start_code) %lx\n" , (long) current->mm->start_code);
++ pr_debug("(end_data) %lx\n" , (long) current->mm->end_data);
++ pr_debug("(start_stack) %lx\n" , (long) current->mm->start_stack);
++ pr_debug("(brk) %lx\n" , (long) current->mm->brk);
+
+ #if 0 /* XXX No fucking way dude... */
+ /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
+@@ -813,7 +818,7 @@ static int load_irix_library(struct file
+
+ /* First of all, some simple consistency checks. */
+ if(elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 ||
+- !irix_elf_check_arch(&elf_ex) || !file->f_op->mmap)
++ !file->f_op->mmap)
+ return -ENOEXEC;
+
+ /* Now read in all of the header information. */
+@@ -874,35 +879,36 @@ static int load_irix_library(struct file
+ * phdrs there are in the USER_PHDRP array. We return the vaddr the
+ * first phdr was successfully mapped to.
+ */
+-unsigned long irix_mapelf(int fd, struct elf_phdr *user_phdrp, int cnt)
++unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt)
+ {
+- struct elf_phdr *hp;
++ unsigned long type, vaddr, filesz, offset, flags;
++ struct elf_phdr __user *hp;
+ struct file *filp;
+ int i, retval;
+
+-#ifdef DEBUG_ELF
+- printk("irix_mapelf: fd[%d] user_phdrp[%p] cnt[%d]\n",
+- fd, user_phdrp, cnt);
+-#endif
++ pr_debug("irix_mapelf: fd[%d] user_phdrp[%p] cnt[%d]\n",
++ fd, user_phdrp, cnt);
+
+ /* First get the verification out of the way. */
+ hp = user_phdrp;
+ if (!access_ok(VERIFY_READ, hp, (sizeof(struct elf_phdr) * cnt))) {
+-#ifdef DEBUG_ELF
+- printk("irix_mapelf: access_ok fails!\n");
+-#endif
++ pr_debug("irix_mapelf: bad pointer to ELF PHDR!\n");
++
+ return -EFAULT;
+ }
+
+-#ifdef DEBUG_ELF
++#ifdef DEBUG
+ dump_phdrs(user_phdrp, cnt);
+ #endif
+
+- for(i = 0; i < cnt; i++, hp++)
+- if(hp->p_type != PT_LOAD) {
++ for (i = 0; i < cnt; i++, hp++) {
++ if (__get_user(type, &hp->p_type))
++ return -EFAULT;
++ if (type != PT_LOAD) {
+ printk("irix_mapelf: One section is not PT_LOAD!\n");
+ return -ENOEXEC;
+ }
++ }
+
+ filp = fget(fd);
+ if (!filp)
+@@ -917,29 +923,40 @@ unsigned long irix_mapelf(int fd, struct
+ for(i = 0; i < cnt; i++, hp++) {
+ int prot;
+
+- prot = (hp->p_flags & PF_R) ? PROT_READ : 0;
+- prot |= (hp->p_flags & PF_W) ? PROT_WRITE : 0;
+- prot |= (hp->p_flags & PF_X) ? PROT_EXEC : 0;
++ retval = __get_user(vaddr, &hp->p_vaddr);
++ retval |= __get_user(filesz, &hp->p_filesz);
++ retval |= __get_user(offset, &hp->p_offset);
++ retval |= __get_user(flags, &hp->p_flags);
++ if (retval)
++ return retval;
++
++ prot = (flags & PF_R) ? PROT_READ : 0;
++ prot |= (flags & PF_W) ? PROT_WRITE : 0;
++ prot |= (flags & PF_X) ? PROT_EXEC : 0;
++
+ down_write(¤t->mm->mmap_sem);
+- retval = do_mmap(filp, (hp->p_vaddr & 0xfffff000),
+- (hp->p_filesz + (hp->p_vaddr & 0xfff)),
++ retval = do_mmap(filp, (vaddr & 0xfffff000),
++ (filesz + (vaddr & 0xfff)),
+ prot, (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE),
+- (hp->p_offset & 0xfffff000));
++ (offset & 0xfffff000));
+ up_write(¤t->mm->mmap_sem);
+
+- if(retval != (hp->p_vaddr & 0xfffff000)) {
++ if (retval != (vaddr & 0xfffff000)) {
+ printk("irix_mapelf: do_mmap fails with %d!\n", retval);
+ fput(filp);
+ return retval;
+ }
+ }
+
+-#ifdef DEBUG_ELF
+- printk("irix_mapelf: Success, returning %08lx\n",
+- (unsigned long) user_phdrp->p_vaddr);
+-#endif
++ pr_debug("irix_mapelf: Success, returning %08lx\n",
++ (unsigned long) user_phdrp->p_vaddr);
++
+ fput(filp);
+- return user_phdrp->p_vaddr;
++
++ if (__get_user(vaddr, &user_phdrp->p_vaddr))
++ return -EFAULT;
++
++ return vaddr;
+ }
+
+ /*
+@@ -952,9 +969,9 @@ unsigned long irix_mapelf(int fd, struct
+ /* These are the only things you should do on a core-file: use only these
+ * functions to write out all the necessary info.
+ */
+-static int dump_write(struct file *file, const void *addr, int nr)
++static int dump_write(struct file *file, const void __user *addr, int nr)
+ {
+- return file->f_op->write(file, addr, nr, &file->f_pos) == nr;
++ return file->f_op->write(file, (const char __user *) addr, nr, &file->f_pos) == nr;
+ }
+
+ static int dump_seek(struct file *file, off_t off)
+@@ -1073,7 +1090,7 @@ static int irix_core_dump(long signr, st
+ /* Count what's needed to dump, up to the limit of coredump size. */
+ segs = 0;
+ size = 0;
+- for(vma = current->mm->mmap; vma != NULL; vma = vma->vm_next) {
++ for (vma = current->mm->mmap; vma != NULL; vma = vma->vm_next) {
+ if (maydump(vma))
+ {
+ int sz = vma->vm_end-vma->vm_start;
+@@ -1187,9 +1204,9 @@ static int irix_core_dump(long signr, st
+
+ len = current->mm->arg_end - current->mm->arg_start;
+ len = len >= ELF_PRARGSZ ? ELF_PRARGSZ : len;
+- copy_from_user(&psinfo.pr_psargs,
+- (const char *)current->mm->arg_start, len);
+- for(i = 0; i < len; i++)
++ (void *) copy_from_user(&psinfo.pr_psargs,
++ (const char __user *)current->mm->arg_start, len);
++ for (i = 0; i < len; i++)
+ if (psinfo.pr_psargs[i] == 0)
+ psinfo.pr_psargs[i] = ' ';
+ psinfo.pr_psargs[len] = 0;
+@@ -1256,8 +1273,10 @@ static int irix_core_dump(long signr, st
+ phdr.p_memsz = sz;
+ offset += phdr.p_filesz;
+ phdr.p_flags = vma->vm_flags & VM_READ ? PF_R : 0;
+- if (vma->vm_flags & VM_WRITE) phdr.p_flags |= PF_W;
+- if (vma->vm_flags & VM_EXEC) phdr.p_flags |= PF_X;
++ if (vma->vm_flags & VM_WRITE)
++ phdr.p_flags |= PF_W;
++ if (vma->vm_flags & VM_EXEC)
++ phdr.p_flags |= PF_X;
+ phdr.p_align = PAGE_SIZE;
+
+ DUMP_WRITE(&phdr, sizeof(phdr));
+@@ -1283,7 +1302,7 @@ static int irix_core_dump(long signr, st
+ #ifdef DEBUG
+ printk("elf_core_dump: writing %08lx %lx\n", addr, len);
+ #endif
+- DUMP_WRITE((void *)addr, len);
++ DUMP_WRITE((void __user *)addr, len);
+ }
+
+ if ((off_t) file->f_pos != offset) {
+@@ -1299,7 +1318,7 @@ end_coredump:
+
+ static int __init init_irix_binfmt(void)
+ {
+- int init_inventory(void);
++ extern int init_inventory(void);
+ extern asmlinkage unsigned long sys_call_table;
+ extern asmlinkage unsigned long sys_call_table_irix5;
+
+@@ -1318,7 +1337,9 @@ static int __init init_irix_binfmt(void)
+
+ static void __exit exit_irix_binfmt(void)
+ {
+- /* Remove the IRIX ELF loaders. */
++ /*
++ * Remove the Irix ELF loader.
++ */
+ unregister_binfmt(&irix_format);
+ }
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irixinv.c linux_HEAD/arch/mips/kernel/irixinv.c
+--- linux-2.6.12/arch/mips/kernel/irixinv.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/irixinv.c 2005-03-17 22:20:26.000000000 +0100
@@ -30,10 +30,10 @@ void add_to_inventory (int class, int ty
inventory_items++;
@@ -15453,8 +20442,8 @@
user++;
}
return inventory_items * sizeof (inventory_t);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/irixioctl.c linux_HEAD/arch/mips/kernel/irixioctl.c
---- linux-2.6.11.6/arch/mips/kernel/irixioctl.c 2005-03-26 04:28:24.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irixioctl.c linux_HEAD/arch/mips/kernel/irixioctl.c
+--- linux-2.6.12/arch/mips/kernel/irixioctl.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/irixioctl.c 2005-03-17 22:20:26.000000000 +0100
@@ -58,7 +58,7 @@ asmlinkage int irix_ioctl(int fd, unsign
{
@@ -15591,8 +20580,663 @@
#ifdef DEBUG_IOCTLS
printk("UNIMP_IOCTL, %08lx)\n", arg);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/irq-msc01.c linux_HEAD/arch/mips/kernel/irq-msc01.c
---- linux-2.6.11.6/arch/mips/kernel/irq-msc01.c 2005-03-26 04:28:14.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irixsig.c linux_HEAD/arch/mips/kernel/irixsig.c
+--- linux-2.6.12/arch/mips/kernel/irixsig.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/irixsig.c 2005-03-17 22:20:26.000000000 +0100
+@@ -79,33 +79,36 @@ static inline void dump_irix5_sigctx(str
+ static void setup_irix_frame(struct k_sigaction *ka, struct pt_regs *regs,
+ int signr, sigset_t *oldmask)
+ {
++ struct sigctx_irix5 __user *ctx;
+ unsigned long sp;
+- struct sigctx_irix5 *ctx;
+- int i;
++ int error, i;
+
+ sp = regs->regs[29];
+ sp -= sizeof(struct sigctx_irix5);
+ sp &= ~(0xf);
+- ctx = (struct sigctx_irix5 *) sp;
++ ctx = (struct sigctx_irix5 __user *) sp;
+ if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
+ goto segv_and_exit;
+
+- __put_user(0, &ctx->weird_fpu_thing);
+- __put_user(~(0x00000001), &ctx->rmask);
+- __put_user(0, &ctx->regs[0]);
++ error = __put_user(0, &ctx->weird_fpu_thing);
++ error |= __put_user(~(0x00000001), &ctx->rmask);
++ error |= __put_user(0, &ctx->regs[0]);
+ for(i = 1; i < 32; i++)
+- __put_user((u64) regs->regs[i], &ctx->regs[i]);
++ error |= __put_user((u64) regs->regs[i], &ctx->regs[i]);
+
+- __put_user((u64) regs->hi, &ctx->hi);
+- __put_user((u64) regs->lo, &ctx->lo);
+- __put_user((u64) regs->cp0_epc, &ctx->pc);
+- __put_user(!!used_math(), &ctx->usedfp);
+- __put_user((u64) regs->cp0_cause, &ctx->cp0_cause);
+- __put_user((u64) regs->cp0_badvaddr, &ctx->cp0_badvaddr);
++ error |= __put_user((u64) regs->hi, &ctx->hi);
++ error |= __put_user((u64) regs->lo, &ctx->lo);
++ error |= __put_user((u64) regs->cp0_epc, &ctx->pc);
++ error |= __put_user(!!used_math(), &ctx->usedfp);
++ error |= __put_user((u64) regs->cp0_cause, &ctx->cp0_cause);
++ error |= __put_user((u64) regs->cp0_badvaddr, &ctx->cp0_badvaddr);
+
+- __put_user(0, &ctx->sstk_flags); /* XXX sigstack unimp... todo... */
++ error |= __put_user(0, &ctx->sstk_flags); /* XXX sigstack unimp... todo... */
+
+- __copy_to_user(&ctx->sigset, oldmask, sizeof(irix_sigset_t));
++ error |= __copy_to_user(&ctx->sigset, oldmask, sizeof(irix_sigset_t)) ? -EFAULT : 0;
++
++ if (error)
++ goto segv_and_exit;
+
+ #ifdef DEBUG_SIG
+ dump_irix5_sigctx(ctx);
+@@ -209,10 +212,11 @@ no_signal:
+ asmlinkage void
+ irix_sigreturn(struct pt_regs *regs)
+ {
+- struct sigctx_irix5 *context, *magic;
++ struct sigctx_irix5 __user *context, *magic;
+ unsigned long umask, mask;
+ u64 *fregs;
+- int sig, i, base = 0;
++ u32 usedfp;
++ int error, sig, i, base = 0;
+ sigset_t blocked;
+
+ /* Always make any pending restarted system calls return -EINTR */
+@@ -221,8 +225,8 @@ irix_sigreturn(struct pt_regs *regs)
+ if (regs->regs[2] == 1000)
+ base = 1;
+
+- context = (struct sigctx_irix5 *) regs->regs[base + 4];
+- magic = (struct sigctx_irix5 *) regs->regs[base + 5];
++ context = (struct sigctx_irix5 __user *) regs->regs[base + 4];
++ magic = (struct sigctx_irix5 __user *) regs->regs[base + 5];
+ sig = (int) regs->regs[base + 6];
+ #ifdef DEBUG_SIG
+ printk("[%s:%d] IRIX sigreturn(scp[%p],ucp[%p],sig[%d])\n",
+@@ -237,25 +241,31 @@ irix_sigreturn(struct pt_regs *regs)
+ dump_irix5_sigctx(context);
+ #endif
+
+- __get_user(regs->cp0_epc, &context->pc);
+- umask = context->rmask; mask = 2;
++ error = __get_user(regs->cp0_epc, &context->pc);
++ error |= __get_user(umask, &context->rmask);
++
++ mask = 2;
+ for (i = 1; i < 32; i++, mask <<= 1) {
+- if(umask & mask)
+- __get_user(regs->regs[i], &context->regs[i]);
++ if (umask & mask)
++ error |= __get_user(regs->regs[i], &context->regs[i]);
+ }
+- __get_user(regs->hi, &context->hi);
+- __get_user(regs->lo, &context->lo);
++ error |= __get_user(regs->hi, &context->hi);
++ error |= __get_user(regs->lo, &context->lo);
+
+- if ((umask & 1) && context->usedfp) {
++ error |= __get_user(usedfp, &context->usedfp);
++ if ((umask & 1) && usedfp) {
+ fregs = (u64 *) ¤t->thread.fpu;
++
+ for(i = 0; i < 32; i++)
+- fregs[i] = (u64) context->fpregs[i];
+- __get_user(current->thread.fpu.hard.fcr31, &context->fpcsr);
++ error |= __get_user(fregs[i], &context->fpregs[i]);
++ error |= __get_user(current->thread.fpu.hard.fcr31, &context->fpcsr);
+ }
+
+ /* XXX do sigstack crapola here... XXX */
+
+- if (__copy_from_user(&blocked, &context->sigset, sizeof(blocked)))
++ error |= __copy_from_user(&blocked, &context->sigset, sizeof(blocked)) ? -EFAULT : 0;
++
++ if (error)
+ goto badframe;
+
+ sigdelsetmask(&blocked, ~_BLOCKABLE);
+@@ -297,8 +307,8 @@ static inline void dump_sigact_irix5(str
+ #endif
+
+ asmlinkage int
+-irix_sigaction(int sig, const struct sigaction *act,
+- struct sigaction *oact, void *trampoline)
++irix_sigaction(int sig, const struct sigaction __user *act,
++ struct sigaction __user *oact, void __user *trampoline)
+ {
+ struct k_sigaction new_ka, old_ka;
+ int ret;
+@@ -312,12 +322,16 @@ irix_sigaction(int sig, const struct sig
+ #endif
+ if (act) {
+ sigset_t mask;
+- if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
+- __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
+- __get_user(new_ka.sa.sa_flags, &act->sa_flags))
++ int err;
++
++ if (!access_ok(VERIFY_READ, act, sizeof(*act)))
+ return -EFAULT;
++ err = __get_user(new_ka.sa.sa_handler, &act->sa_handler);
++ err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
+
+- __copy_from_user(&mask, &act->sa_mask, sizeof(sigset_t));
++ err |= __copy_from_user(&mask, &act->sa_mask, sizeof(sigset_t)) ? -EFAULT : 0;
++ if (err)
++ return err;
+
+ /*
+ * Hmmm... methinks IRIX libc always passes a valid trampoline
+@@ -331,30 +345,37 @@ irix_sigaction(int sig, const struct sig
+ ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+
+ if (!ret && oact) {
+- if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
+- __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
+- __put_user(old_ka.sa.sa_flags, &oact->sa_flags))
++ int err;
++
++ if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
++ return -EFAULT;
++
++ err = __put_user(old_ka.sa.sa_handler, &oact->sa_handler);
++ err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
++ err |= __copy_to_user(&oact->sa_mask, &old_ka.sa.sa_mask,
++ sizeof(sigset_t)) ? -EFAULT : 0;
++ if (err)
+ return -EFAULT;
+- __copy_to_user(&old_ka.sa.sa_mask, &oact->sa_mask,
+- sizeof(sigset_t));
+ }
+
+ return ret;
+ }
+
+-asmlinkage int irix_sigpending(irix_sigset_t *set)
++asmlinkage int irix_sigpending(irix_sigset_t __user *set)
+ {
+ return do_sigpending(set, sizeof(*set));
+ }
+
+-asmlinkage int irix_sigprocmask(int how, irix_sigset_t *new, irix_sigset_t *old)
++asmlinkage int irix_sigprocmask(int how, irix_sigset_t __user *new,
++ irix_sigset_t __user *old)
+ {
+ sigset_t oldbits, newbits;
+
+ if (new) {
+ if (!access_ok(VERIFY_READ, new, sizeof(*new)))
+ return -EFAULT;
+- __copy_from_user(&newbits, new, sizeof(unsigned long)*4);
++ if (__copy_from_user(&newbits, new, sizeof(unsigned long)*4))
++ return -EFAULT;
+ sigdelsetmask(&newbits, ~_BLOCKABLE);
+
+ spin_lock_irq(¤t->sighand->siglock);
+@@ -382,20 +403,19 @@ asmlinkage int irix_sigprocmask(int how,
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+ }
+- if(old) {
+- if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
+- return -EFAULT;
+- __copy_to_user(old, ¤t->blocked, sizeof(unsigned long)*4);
+- }
++ if (old)
++ return copy_to_user(old, ¤t->blocked,
++ sizeof(unsigned long)*4) ? -EFAULT : 0;
+
+ return 0;
+ }
+
+ asmlinkage int irix_sigsuspend(struct pt_regs *regs)
+ {
+- sigset_t *uset, saveset, newset;
++ sigset_t saveset, newset;
++ sigset_t __user *uset;
+
+- uset = (sigset_t *) regs->regs[4];
++ uset = (sigset_t __user *) regs->regs[4];
+ if (copy_from_user(&newset, uset, sizeof(sigset_t)))
+ return -EFAULT;
+ sigdelsetmask(&newset, ~_BLOCKABLE);
+@@ -453,12 +473,13 @@ static inline unsigned long timespectoji
+ return HZ * sec + nsec;
+ }
+
+-asmlinkage int irix_sigpoll_sys(unsigned long *set, struct irix5_siginfo *info,
+- struct timespec *tp)
++asmlinkage int irix_sigpoll_sys(unsigned long __user *set,
++ struct irix5_siginfo __user *info, struct timespec __user *tp)
+ {
+ long expire = MAX_SCHEDULE_TIMEOUT;
+ sigset_t kset;
+ int i, sig, error, timeo = 0;
++ struct timespec ktp;
+
+ #ifdef DEBUG_SIG
+ printk("[%s:%d] irix_sigpoll_sys(%p,%p,%p)\n",
+@@ -469,14 +490,8 @@ asmlinkage int irix_sigpoll_sys(unsigned
+ if (!set)
+ return -EINVAL;
+
+- if (!access_ok(VERIFY_READ, set, sizeof(kset))) {
+- error = -EFAULT;
+- goto out;
+- }
+-
+- __copy_from_user(&kset, set, sizeof(set));
+- if (error)
+- goto out;
++ if (copy_from_user(&kset, set, sizeof(set)))
++ return -EFAULT;
+
+ if (info && clear_user(info, sizeof(*info))) {
+ error = -EFAULT;
+@@ -484,13 +499,13 @@ asmlinkage int irix_sigpoll_sys(unsigned
+ }
+
+ if (tp) {
+- if (!access_ok(VERIFY_READ, tp, sizeof(*tp)))
++ if (copy_from_user(&ktp, tp, sizeof(*tp)))
+ return -EFAULT;
+- if (!tp->tv_sec && !tp->tv_nsec) {
+- error = -EINVAL;
+- goto out;
+- }
+- expire = timespectojiffies(tp)+(tp->tv_sec||tp->tv_nsec);
++
++ if (!ktp.tv_sec && !ktp.tv_nsec)
++ return -EINVAL;
++
++ expire = timespectojiffies(&ktp) + (ktp.tv_sec || ktp.tv_nsec);
+ }
+
+ while(1) {
+@@ -514,15 +529,14 @@ asmlinkage int irix_sigpoll_sys(unsigned
+ if (timeo)
+ return -EAGAIN;
+
+- for(sig = 1; i <= 65 /* IRIX_NSIG */; sig++) {
++ for (sig = 1; i <= 65 /* IRIX_NSIG */; sig++) {
+ if (sigismember (&kset, sig))
+ continue;
+ if (sigismember (¤t->pending.signal, sig)) {
+ /* XXX need more than this... */
+ if (info)
+- info->sig = sig;
+- error = 0;
+- goto out;
++ return copy_to_user(&info->sig, &sig, sizeof(sig));
++ return 0;
+ }
+ }
+
+@@ -548,8 +562,9 @@ extern int getrusage(struct task_struct
+
+ #define W_MASK (W_EXITED | W_TRAPPED | W_STOPPED | W_CONT | W_NOHANG)
+
+-asmlinkage int irix_waitsys(int type, int pid, struct irix5_siginfo *info,
+- int options, struct rusage *ru)
++asmlinkage int irix_waitsys(int type, int pid,
++ struct irix5_siginfo __user *info, int options,
++ struct rusage __user *ru)
+ {
+ int flag, retval;
+ DECLARE_WAITQUEUE(wait, current);
+@@ -557,28 +572,22 @@ asmlinkage int irix_waitsys(int type, in
+ struct task_struct *p;
+ struct list_head *_p;
+
+- if (!info) {
+- retval = -EINVAL;
+- goto out;
+- }
+- if (!access_ok(VERIFY_WRITE, info, sizeof(*info))) {
+- retval = -EFAULT;
+- goto out;
+- }
+- if (ru) {
+- if (!access_ok(VERIFY_WRITE, ru, sizeof(*ru))) {
+- retval = -EFAULT;
+- goto out;
+- }
+- }
+- if (options & ~(W_MASK)) {
+- retval = -EINVAL;
+- goto out;
+- }
+- if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL) {
+- retval = -EINVAL;
+- goto out;
+- }
++ if (!info)
++ return -EINVAL;
++
++ if (!access_ok(VERIFY_WRITE, info, sizeof(*info)))
++ return -EFAULT;
++
++ if (ru)
++ if (!access_ok(VERIFY_WRITE, ru, sizeof(*ru)))
++ return -EFAULT;
++
++ if (options & ~W_MASK)
++ return -EINVAL;
++
++ if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL)
++ return -EINVAL;
++
+ add_wait_queue(¤t->signal->wait_chldexit, &wait);
+ repeat:
+ flag = 0;
+@@ -609,18 +618,20 @@ repeat:
+ add_parent(p, p->parent);
+ write_unlock_irq(&tasklist_lock);
+ retval = ru ? getrusage(p, RUSAGE_BOTH, ru) : 0;
+- if (!retval && ru) {
+- retval |= __put_user(SIGCHLD, &info->sig);
+- retval |= __put_user(0, &info->code);
+- retval |= __put_user(p->pid, &info->stuff.procinfo.pid);
+- retval |= __put_user((p->exit_code >> 8) & 0xff,
+- &info->stuff.procinfo.procdata.child.status);
+- retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime);
+- retval |= __put_user(p->stime, &info->stuff.procinfo.procdata.child.stime);
+- }
+- if (!retval) {
+- p->exit_code = 0;
+- }
++ if (retval)
++ goto end_waitsys;
++
++ retval = __put_user(SIGCHLD, &info->sig);
++ retval |= __put_user(0, &info->code);
++ retval |= __put_user(p->pid, &info->stuff.procinfo.pid);
++ retval |= __put_user((p->exit_code >> 8) & 0xff,
++ &info->stuff.procinfo.procdata.child.status);
++ retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime);
++ retval |= __put_user(p->stime, &info->stuff.procinfo.procdata.child.stime);
++ if (retval)
++ goto end_waitsys;
++
++ p->exit_code = 0;
+ goto end_waitsys;
+
+ case EXIT_ZOMBIE:
+@@ -628,16 +639,18 @@ repeat:
+ current->signal->cstime += p->stime + p->signal->cstime;
+ if (ru != NULL)
+ getrusage(p, RUSAGE_BOTH, ru);
+- __put_user(SIGCHLD, &info->sig);
+- __put_user(1, &info->code); /* CLD_EXITED */
+- __put_user(p->pid, &info->stuff.procinfo.pid);
+- __put_user((p->exit_code >> 8) & 0xff,
++ retval = __put_user(SIGCHLD, &info->sig);
++ retval |= __put_user(1, &info->code); /* CLD_EXITED */
++ retval |= __put_user(p->pid, &info->stuff.procinfo.pid);
++ retval |= __put_user((p->exit_code >> 8) & 0xff,
+ &info->stuff.procinfo.procdata.child.status);
+- __put_user(p->utime,
++ retval |= __put_user(p->utime,
+ &info->stuff.procinfo.procdata.child.utime);
+- __put_user(p->stime,
++ retval |= __put_user(p->stime,
+ &info->stuff.procinfo.procdata.child.stime);
+- retval = 0;
++ if (retval)
++ return retval;
++
+ if (p->real_parent != p->parent) {
+ write_lock_irq(&tasklist_lock);
+ remove_parent(p);
+@@ -670,7 +683,6 @@ end_waitsys:
+ current->state = TASK_RUNNING;
+ remove_wait_queue(¤t->signal->wait_chldexit, &wait);
+
+-out:
+ return retval;
+ }
+
+@@ -689,39 +701,39 @@ struct irix5_context {
+
+ asmlinkage int irix_getcontext(struct pt_regs *regs)
+ {
+- int i, base = 0;
+- struct irix5_context *ctx;
++ int error, i, base = 0;
++ struct irix5_context __user *ctx;
+ unsigned long flags;
+
+ if (regs->regs[2] == 1000)
+ base = 1;
+- ctx = (struct irix5_context *) regs->regs[base + 4];
++ ctx = (struct irix5_context __user *) regs->regs[base + 4];
+
+ #ifdef DEBUG_SIG
+ printk("[%s:%d] irix_getcontext(%p)\n",
+ current->comm, current->pid, ctx);
+ #endif
+
+- if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
++ if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)));
+ return -EFAULT;
+
+- __put_user(current->thread.irix_oldctx, &ctx->link);
++ error = __put_user(current->thread.irix_oldctx, &ctx->link);
+
+- __copy_to_user(&ctx->sigmask, ¤t->blocked, sizeof(irix_sigset_t));
++ error |= __copy_to_user(&ctx->sigmask, ¤t->blocked, sizeof(irix_sigset_t)) ? -EFAULT : 0;
+
+ /* XXX Do sigstack stuff someday... */
+- __put_user(0, &ctx->stack.sp);
+- __put_user(0, &ctx->stack.size);
+- __put_user(0, &ctx->stack.flags);
++ error |= __put_user(0, &ctx->stack.sp);
++ error |= __put_user(0, &ctx->stack.size);
++ error |= __put_user(0, &ctx->stack.flags);
+
+- __put_user(0, &ctx->weird_graphics_thing);
+- __put_user(0, &ctx->regs[0]);
++ error |= __put_user(0, &ctx->weird_graphics_thing);
++ error |= __put_user(0, &ctx->regs[0]);
+ for (i = 1; i < 32; i++)
+- __put_user(regs->regs[i], &ctx->regs[i]);
+- __put_user(regs->lo, &ctx->regs[32]);
+- __put_user(regs->hi, &ctx->regs[33]);
+- __put_user(regs->cp0_cause, &ctx->regs[34]);
+- __put_user(regs->cp0_epc, &ctx->regs[35]);
++ error |= __put_user(regs->regs[i], &ctx->regs[i]);
++ error |= __put_user(regs->lo, &ctx->regs[32]);
++ error |= __put_user(regs->hi, &ctx->regs[33]);
++ error |= __put_user(regs->cp0_cause, &ctx->regs[34]);
++ error |= __put_user(regs->cp0_epc, &ctx->regs[35]);
+
+ flags = 0x0f;
+ if (!used_math()) {
+@@ -730,119 +742,124 @@ asmlinkage int irix_getcontext(struct pt
+ /* XXX wheee... */
+ printk("Wheee, no code for saving IRIX FPU context yet.\n");
+ }
+- __put_user(flags, &ctx->flags);
++ error |= __put_user(flags, &ctx->flags);
+
+- return 0;
++ return error;
+ }
+
+-asmlinkage unsigned long irix_setcontext(struct pt_regs *regs)
++asmlinkage void irix_setcontext(struct pt_regs *regs)
+ {
+- int error, base = 0;
+- struct irix5_context *ctx;
++ struct irix5_context __user *ctx;
++ int err, base = 0;
++ u32 flags;
+
+- if(regs->regs[2] == 1000)
++ if (regs->regs[2] == 1000)
+ base = 1;
+- ctx = (struct irix5_context *) regs->regs[base + 4];
++ ctx = (struct irix5_context __user *) regs->regs[base + 4];
+
+ #ifdef DEBUG_SIG
+ printk("[%s:%d] irix_setcontext(%p)\n",
+ current->comm, current->pid, ctx);
+ #endif
+
+- if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))) {
+- error = -EFAULT;
+- goto out;
+- }
++ if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)))
++ goto segv_and_exit;
+
+- if (ctx->flags & 0x02) {
++ err = __get_user(flags, &ctx->flags);
++ if (flags & 0x02) {
+ /* XXX sigstack garbage, todo... */
+ printk("Wheee, cannot do sigstack stuff in setcontext\n");
+ }
+
+- if (ctx->flags & 0x04) {
++ if (flags & 0x04) {
+ int i;
+
+ /* XXX extra control block stuff... todo... */
+- for(i = 1; i < 32; i++)
+- regs->regs[i] = ctx->regs[i];
+- regs->lo = ctx->regs[32];
+- regs->hi = ctx->regs[33];
+- regs->cp0_epc = ctx->regs[35];
++ for (i = 1; i < 32; i++)
++ err |= __get_user(regs->regs[i], &ctx->regs[i]);
++ err |= __get_user(regs->lo, &ctx->regs[32]);
++ err |= __get_user(regs->hi, &ctx->regs[33]);
++ err |= __get_user(regs->cp0_epc, &ctx->regs[35]);
+ }
+
+- if (ctx->flags & 0x08) {
++ if (flags & 0x08)
+ /* XXX fpu context, blah... */
+- printk("Wheee, cannot restore FPU context yet...\n");
+- }
+- current->thread.irix_oldctx = ctx->link;
+- error = regs->regs[2];
++ printk(KERN_ERR "Wheee, cannot restore FPU context yet...\n");
+
+-out:
+- return error;
++ err |= __get_user(current->thread.irix_oldctx, &ctx->link);
++ if (err)
++ goto segv_and_exit;
++
++ /*
++ * Don't let your children do this ...
++ */
++ if (current_thread_info()->flags & TIF_SYSCALL_TRACE)
++ do_syscall_trace(regs, 1);
++ __asm__ __volatile__(
++ "move\t$29,%0\n\t"
++ "j\tsyscall_exit"
++ :/* no outputs */
++ :"r" (®s));
++ /* Unreached */
++
++segv_and_exit:
++ force_sigsegv(SIGSEGV, current);
+ }
+
+-struct irix_sigstack { unsigned long sp; int status; };
++struct irix_sigstack {
++ unsigned long sp;
++ int status;
++};
+
+-asmlinkage int irix_sigstack(struct irix_sigstack *new, struct irix_sigstack *old)
++asmlinkage int irix_sigstack(struct irix_sigstack __user *new,
++ struct irix_sigstack __user *old)
+ {
+- int error = -EFAULT;
+-
+ #ifdef DEBUG_SIG
+ printk("[%s:%d] irix_sigstack(%p,%p)\n",
+ current->comm, current->pid, new, old);
+ #endif
+- if(new) {
++ if (new) {
+ if (!access_ok(VERIFY_READ, new, sizeof(*new)))
+- goto out;
++ return -EFAULT;
+ }
+
+- if(old) {
++ if (old) {
+ if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
+- goto out;
++ return -EFAULT;
+ }
+- error = 0;
+
+-out:
+- return error;
++ return 0;
+ }
+
+ struct irix_sigaltstack { unsigned long sp; int size; int status; };
+
+-asmlinkage int irix_sigaltstack(struct irix_sigaltstack *new,
+- struct irix_sigaltstack *old)
++asmlinkage int irix_sigaltstack(struct irix_sigaltstack __user *new,
++ struct irix_sigaltstack __user *old)
+ {
+- int error = -EFAULT;
+-
+ #ifdef DEBUG_SIG
+ printk("[%s:%d] irix_sigaltstack(%p,%p)\n",
+ current->comm, current->pid, new, old);
+ #endif
+- if (new) {
++ if (new)
+ if (!access_ok(VERIFY_READ, new, sizeof(*new)))
+- goto out;
+- }
++ return -EFAULT;
+
+ if (old) {
+ if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
+- goto out;
++ return -EFAULT;
+ }
+- error = 0;
+-
+-out:
+- error = 0;
+
+- return error;
++ return 0;
+ }
+
+ struct irix_procset {
+ int cmd, ltype, lid, rtype, rid;
+ };
+
+-asmlinkage int irix_sigsendset(struct irix_procset *pset, int sig)
++asmlinkage int irix_sigsendset(struct irix_procset __user *pset, int sig)
+ {
+ if (!access_ok(VERIFY_READ, pset, sizeof(*pset)))
+ return -EFAULT;
+-
+ #ifdef DEBUG_SIG
+ printk("[%s:%d] irix_sigsendset([%d,%d,%d,%d,%d],%d)\n",
+ current->comm, current->pid,
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irq-msc01.c linux_HEAD/arch/mips/kernel/irq-msc01.c
+--- linux-2.6.12/arch/mips/kernel/irq-msc01.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/irq-msc01.c 2005-02-28 16:56:41.000000000 +0100
@@ -129,25 +129,23 @@ msc_bind_eic_interrupt (unsigned int irq
#define shutdown_msc_irq disable_msc_irq
@@ -15634,8 +21278,8 @@
};
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/irq-mv6434x.c linux_HEAD/arch/mips/kernel/irq-mv6434x.c
---- linux-2.6.11.6/arch/mips/kernel/irq-mv6434x.c 2005-03-26 04:28:14.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irq-mv6434x.c linux_HEAD/arch/mips/kernel/irq-mv6434x.c
+--- linux-2.6.12/arch/mips/kernel/irq-mv6434x.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/irq-mv6434x.c 2005-02-28 16:56:41.000000000 +0100
@@ -135,14 +135,13 @@ void ll_mv64340_irq(struct pt_regs *regs
#define shutdown_mv64340_irq disable_mv64340_irq
@@ -15659,8 +21303,8 @@
};
void __init mv64340_irq_init(unsigned int base)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/irq-rm7000.c linux_HEAD/arch/mips/kernel/irq-rm7000.c
---- linux-2.6.11.6/arch/mips/kernel/irq-rm7000.c 2005-03-26 04:28:36.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irq-rm7000.c linux_HEAD/arch/mips/kernel/irq-rm7000.c
+--- linux-2.6.12/arch/mips/kernel/irq-rm7000.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/irq-rm7000.c 2005-02-28 16:56:41.000000000 +0100
@@ -72,13 +72,13 @@ static void rm7k_cpu_irq_end(unsigned in
}
@@ -15683,8 +21327,8 @@
};
void __init rm7k_cpu_irq_init(int base)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/irq-rm9000.c linux_HEAD/arch/mips/kernel/irq-rm9000.c
---- linux-2.6.11.6/arch/mips/kernel/irq-rm9000.c 2005-03-26 04:28:40.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irq-rm9000.c linux_HEAD/arch/mips/kernel/irq-rm9000.c
+--- linux-2.6.12/arch/mips/kernel/irq-rm9000.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/irq-rm9000.c 2005-02-28 16:56:41.000000000 +0100
@@ -106,23 +106,23 @@ static void rm9k_cpu_irq_end(unsigned in
}
@@ -15724,8 +21368,8 @@
};
unsigned int rm9000_perfcount_irq;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/irq_cpu.c linux_HEAD/arch/mips/kernel/irq_cpu.c
---- linux-2.6.11.6/arch/mips/kernel/irq_cpu.c 2005-03-26 04:28:21.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/irq_cpu.c linux_HEAD/arch/mips/kernel/irq_cpu.c
+--- linux-2.6.12/arch/mips/kernel/irq_cpu.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/irq_cpu.c 2005-02-28 16:56:41.000000000 +0100
@@ -3,6 +3,8 @@
* Author: Jun Sun, jsun at mvista.com or jsun at junsun.net
@@ -15777,9 +21421,9 @@
for (i = irq_base; i < irq_base + 8; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/linux32.c linux_HEAD/arch/mips/kernel/linux32.c
---- linux-2.6.11.6/arch/mips/kernel/linux32.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/kernel/linux32.c 2005-02-17 21:48:55.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/linux32.c linux_HEAD/arch/mips/kernel/linux32.c
+--- linux-2.6.12/arch/mips/kernel/linux32.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/linux32.c 2005-04-13 19:06:33.000000000 +0200
@@ -215,81 +215,35 @@ sys32_readdir(unsigned int fd, void * di
return(n);
}
@@ -15812,7 +21456,7 @@
{
- int err;
-
-- if (verify_area(VERIFY_WRITE, ru, sizeof *ru))
+- if (!access_ok(VERIFY_WRITE, ru, sizeof *ru))
- return -EFAULT;
-
- err = __put_user (r->ru_utime.tv_sec, &ru->ru_utime.tv_sec);
@@ -15883,7 +21527,7 @@
}
struct sysinfo32 {
-@@ -1467,3 +1421,53 @@ asmlinkage long sys32_socketcall(int cal
+@@ -1467,3 +1421,80 @@ asmlinkage long sys32_socketcall(int cal
}
return err;
}
@@ -15937,8 +21581,35 @@
+ }
+ return sys_rt_sigtimedwait(uthese, uinfo, uts, sigsetsize);
+}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/module-elf32.c linux_HEAD/arch/mips/kernel/module-elf32.c
---- linux-2.6.11.6/arch/mips/kernel/module-elf32.c 2005-03-26 04:28:15.000000000 +0100
++
++save_static_function(sys32_clone);
++__attribute_used__ noinline static int
++_sys32_clone(nabi_no_regargs struct pt_regs regs)
++{
++ unsigned long clone_flags;
++ unsigned long newsp;
++ int __user *parent_tidptr, *child_tidptr;
++
++ clone_flags = regs.regs[4];
++ newsp = regs.regs[5];
++ if (!newsp)
++ newsp = regs.regs[29];
++ parent_tidptr = (int *) regs.regs[6];
++
++ /* Use __dummy4 instead of getting it off the stack, so that
++ syscall() works. */
++ child_tidptr = (int __user *) __dummy4;
++ return do_fork(clone_flags, newsp, ®s, 0,
++ parent_tidptr, child_tidptr);
++}
++
++extern asmlinkage void sys_set_thread_area(u32 addr);
++asmlinkage void sys32_set_thread_area(u32 addr)
++{
++ sys_set_thread_area(AA(addr));
++}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/module-elf32.c linux_HEAD/arch/mips/kernel/module-elf32.c
+--- linux-2.6.12/arch/mips/kernel/module-elf32.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/module-elf32.c 1970-01-01 01:00:00.000000000 +0100
@@ -1,250 +0,0 @@
-/*
@@ -16191,8 +21862,8 @@
- me->name);
- return -ENOEXEC;
-}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/module-elf64.c linux_HEAD/arch/mips/kernel/module-elf64.c
---- linux-2.6.11.6/arch/mips/kernel/module-elf64.c 2005-03-26 04:28:24.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/module-elf64.c linux_HEAD/arch/mips/kernel/module-elf64.c
+--- linux-2.6.12/arch/mips/kernel/module-elf64.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/module-elf64.c 1970-01-01 01:00:00.000000000 +0100
@@ -1,274 +0,0 @@
-/*
@@ -16469,8 +22140,8 @@
-
- return 0;
-}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/module.c linux_HEAD/arch/mips/kernel/module.c
---- linux-2.6.11.6/arch/mips/kernel/module.c 2005-03-26 04:28:17.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/module.c linux_HEAD/arch/mips/kernel/module.c
+--- linux-2.6.12/arch/mips/kernel/module.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/module.c 2005-03-30 09:06:31.000000000 +0200
@@ -1,9 +1,345 @@
+/*
@@ -16818,10 +22489,71 @@
/* Given an address, look for it in the module exception tables. */
const struct exception_table_entry *search_module_dbetables(unsigned long addr)
{
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/proc.c linux_HEAD/arch/mips/kernel/proc.c
---- linux-2.6.11.6/arch/mips/kernel/proc.c 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/proc.c 2005-03-01 15:00:12.000000000 +0100
-@@ -19,63 +19,66 @@
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/offset.c linux_HEAD/arch/mips/kernel/offset.c
+--- linux-2.6.12/arch/mips/kernel/offset.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/offset.c 2005-07-01 12:09:18.000000000 +0200
+@@ -95,6 +95,7 @@ void output_thread_info_defines(void)
+ offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count);
+ offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
+ offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
++ offset("#define TI_TP_VALUE ", struct thread_info, tp_value);
+ constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
+ constant("#define _THREAD_SIZE ", THREAD_SIZE);
+ constant("#define _THREAD_MASK ", THREAD_MASK);
+@@ -240,6 +241,7 @@ void output_mm_defines(void)
+ linefeed;
+ }
+
++#ifdef CONFIG_MIPS32
+ void output_sc_defines(void)
+ {
+ text("/* Linux sigcontext offsets. */");
+@@ -251,10 +253,29 @@ void output_sc_defines(void)
+ offset("#define SC_STATUS ", struct sigcontext, sc_status);
+ offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr);
+ offset("#define SC_FPC_EIR ", struct sigcontext, sc_fpc_eir);
+- offset("#define SC_CAUSE ", struct sigcontext, sc_cause);
+- offset("#define SC_BADVADDR ", struct sigcontext, sc_badvaddr);
++ offset("#define SC_HI1 ", struct sigcontext, sc_hi1);
++ offset("#define SC_LO1 ", struct sigcontext, sc_lo1);
++ offset("#define SC_HI2 ", struct sigcontext, sc_hi2);
++ offset("#define SC_LO2 ", struct sigcontext, sc_lo2);
++ offset("#define SC_HI3 ", struct sigcontext, sc_hi3);
++ offset("#define SC_LO3 ", struct sigcontext, sc_lo3);
+ linefeed;
+ }
++#endif
++
++#ifdef CONFIG_MIPS64
++void output_sc_defines(void)
++{
++ text("/* Linux sigcontext offsets. */");
++ offset("#define SC_REGS ", struct sigcontext, sc_regs);
++ offset("#define SC_FPREGS ", struct sigcontext, sc_fpregs);
++ offset("#define SC_MDHI ", struct sigcontext, sc_hi);
++ offset("#define SC_MDLO ", struct sigcontext, sc_lo);
++ offset("#define SC_PC ", struct sigcontext, sc_pc);
++ offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr);
++ linefeed;
++}
++#endif
+
+ #ifdef CONFIG_MIPS32_COMPAT
+ void output_sc32_defines(void)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/proc.c linux_HEAD/arch/mips/kernel/proc.c
+--- linux-2.6.12/arch/mips/kernel/proc.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/proc.c 2005-05-09 13:20:25.000000000 +0200
+@@ -2,7 +2,8 @@
+ * linux/arch/mips/kernel/proc.c
+ *
+ * Copyright (C) 1995, 1996, 2001 Ralf Baechle
+- * Copyright (C) 2001 MIPS Technologies, Inc.
++ * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
++ * Copyright (C) 2004 Maciej W. Rozycki
+ */
+ #include <linux/config.h>
+ #include <linux/delay.h>
+@@ -19,63 +20,66 @@
unsigned int vced_count, vcei_count;
static const char *cpu_name[] = {
@@ -16945,7 +22677,7 @@
};
-@@ -105,8 +108,8 @@ static int show_cpuinfo(struct seq_file
+@@ -105,8 +109,8 @@ static int show_cpuinfo(struct seq_file
(version >> 4) & 0x0f, version & 0x0f,
(fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
@@ -16956,10 +22688,33 @@
seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
seq_printf(m, "microsecond timers\t: %s\n",
cpu_has_counter ? "yes" : "no");
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/process.c linux_HEAD/arch/mips/kernel/process.c
---- linux-2.6.11.6/arch/mips/kernel/process.c 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/process.c 2005-03-17 22:10:47.000000000 +0100
-@@ -39,14 +39,6 @@
+@@ -115,6 +119,11 @@ static int show_cpuinfo(struct seq_file
+ cpu_has_divec ? "yes" : "no");
+ seq_printf(m, "hardware watchpoint\t: %s\n",
+ cpu_has_watch ? "yes" : "no");
++ seq_printf(m, "ASEs implemented\t:%s%s%s%s\n",
++ cpu_has_mips16 ? " mips16" : "",
++ cpu_has_mdmx ? " mdmx" : "",
++ cpu_has_mips3d ? " mips3d" : "",
++ cpu_has_smartmips ? " smartmips" : "");
+
+ sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
+ cpu_has_vce ? "%u" : "not available");
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/process.c linux_HEAD/arch/mips/kernel/process.c
+--- linux-2.6.12/arch/mips/kernel/process.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/process.c 2005-07-01 12:09:18.000000000 +0200
+@@ -25,8 +25,10 @@
+ #include <linux/init.h>
+ #include <linux/completion.h>
+
++#include <asm/abi.h>
+ #include <asm/bootinfo.h>
+ #include <asm/cpu.h>
++#include <asm/dsp.h>
+ #include <asm/fpu.h>
+ #include <asm/pgtable.h>
+ #include <asm/system.h>
+@@ -39,14 +41,6 @@
#include <asm/inst.h>
/*
@@ -16974,7 +22729,101 @@
* The idle thread. There's no useful work to be done, so just try to conserve
* power and have a low exit latency (ie sit in a loop waiting for somebody to
* say that they'd like to reschedule)
-@@ -175,6 +167,14 @@ void dump_regs(elf_greg_t *gp, struct pt
+@@ -62,6 +56,54 @@ ATTRIB_NORET void cpu_idle(void)
+ }
+ }
+
++extern int do_signal(sigset_t *oldset, struct pt_regs *regs);
++extern int do_signal32(sigset_t *oldset, struct pt_regs *regs);
++
++/*
++ * Native o32 and N64 ABI without DSP ASE
++ */
++extern void setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
++ int signr, sigset_t *set);
++extern void setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
++ int signr, sigset_t *set, siginfo_t *info);
++
++struct mips_abi mips_abi = {
++ .do_signal = do_signal,
++#ifdef CONFIG_TRAD_SIGNALS
++ .setup_frame = setup_frame,
++#endif
++ .setup_rt_frame = setup_rt_frame
++};
++
++#ifdef CONFIG_MIPS32_O32
++/*
++ * o32 compatibility on 64-bit kernels, without DSP ASE
++ */
++extern void setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
++ int signr, sigset_t *set);
++extern void setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
++ int signr, sigset_t *set, siginfo_t *info);
++
++struct mips_abi mips_abi_32 = {
++ .do_signal = do_signal32,
++ .setup_frame = setup_frame_32,
++ .setup_rt_frame = setup_rt_frame_32
++};
++#endif /* CONFIG_MIPS32_O32 */
++
++#ifdef CONFIG_MIPS32_N32
++/*
++ * N32 on 64-bit kernels, without DSP ASE
++ */
++extern void setup_rt_frame_n32(struct k_sigaction * ka, struct pt_regs *regs,
++ int signr, sigset_t *set, siginfo_t *info);
++
++struct mips_abi mips_abi_n32 = {
++ .do_signal = do_signal,
++ .setup_rt_frame = setup_rt_frame_n32
++};
++#endif /* CONFIG_MIPS32_N32 */
++
+ asmlinkage void ret_from_fork(void);
+
+ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
+@@ -78,6 +120,8 @@ void start_thread(struct pt_regs * regs,
+ regs->cp0_status = status;
+ clear_used_math();
+ lose_fpu();
++ if (cpu_has_dsp)
++ __init_dsp();
+ regs->cp0_epc = pc;
+ regs->regs[29] = sp;
+ current_thread_info()->addr_limit = USER_DS;
+@@ -97,14 +141,17 @@ int copy_thread(int nr, unsigned long cl
+ struct thread_info *ti = p->thread_info;
+ struct pt_regs *childregs;
+ long childksp;
++ p->set_child_tid = p->clear_child_tid = NULL;
+
+ childksp = (unsigned long)ti + THREAD_SIZE - 32;
+
+ preempt_disable();
+
+- if (is_fpu_owner()) {
++ if (is_fpu_owner())
+ save_fp(p);
+- }
++
++ if (cpu_has_dsp)
++ save_dsp(p);
+
+ preempt_enable();
+
+@@ -142,6 +189,9 @@ int copy_thread(int nr, unsigned long cl
+ childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
+ clear_tsk_thread_flag(p, TIF_USEDFPU);
+
++ if (clone_flags & CLONE_SETTLS)
++ ti->tp_value = regs->regs[7];
++
+ return 0;
+ }
+
+@@ -175,6 +225,14 @@ void dump_regs(elf_greg_t *gp, struct pt
#endif
}
@@ -16989,7 +22838,7 @@
int dump_task_fpu (struct task_struct *t, elf_fpregset_t *fpr)
{
memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
-@@ -211,22 +211,48 @@ long kernel_thread(int (*fn)(void *), vo
+@@ -211,22 +269,48 @@ long kernel_thread(int (*fn)(void *), vo
return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
}
@@ -17046,7 +22895,7 @@
for (i = 0; i < 128; i++, ip++) {
/* if jal, jalr, jr, stop. */
if (ip->j_format.opcode == jal_op ||
-@@ -247,14 +273,16 @@ static int __init get_frame_info(struct
+@@ -247,14 +331,16 @@ static int __init get_frame_info(struct
/* sw / sd $ra, offset($sp) */
if (ip->i_format.rt == 31) {
if (info->pc_offset != -1)
@@ -17065,7 +22914,7 @@
info->frame_offset =
ip->i_format.simmediate / sizeof(long);
}
-@@ -272,13 +300,25 @@ static int __init get_frame_info(struct
+@@ -272,13 +358,25 @@ static int __init get_frame_info(struct
static int __init frame_info_init(void)
{
@@ -17098,7 +22947,7 @@
return 0;
}
-@@ -311,53 +351,27 @@ unsigned long get_wchan(struct task_stru
+@@ -311,53 +409,27 @@ unsigned long get_wchan(struct task_stru
if (!mips_frame_info_initialized)
return 0;
pc = thread_saved_pc(p);
@@ -17166,10 +23015,29 @@
return pc;
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/ptrace.c linux_HEAD/arch/mips/kernel/ptrace.c
---- linux-2.6.11.6/arch/mips/kernel/ptrace.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/kernel/ptrace.c 2005-03-21 20:03:46.000000000 +0100
-@@ -103,7 +103,7 @@ asmlinkage int sys_ptrace(long request,
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/ptrace.c linux_HEAD/arch/mips/kernel/ptrace.c
+--- linux-2.6.12/arch/mips/kernel/ptrace.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/ptrace.c 2005-07-01 12:09:18.000000000 +0200
+@@ -21,14 +21,16 @@
+ #include <linux/mm.h>
+ #include <linux/errno.h>
+ #include <linux/ptrace.h>
+-#include <linux/audit.h>
+ #include <linux/smp.h>
+ #include <linux/smp_lock.h>
+ #include <linux/user.h>
+ #include <linux/security.h>
+-#include <linux/signal.h>
++#include <linux/audit.h>
++#include <linux/seccomp.h>
+
++#include <asm/byteorder.h>
+ #include <asm/cpu.h>
++#include <asm/dsp.h>
+ #include <asm/fpu.h>
+ #include <asm/mipsregs.h>
+ #include <asm/pgtable.h>
+@@ -103,7 +105,7 @@ asmlinkage int sys_ptrace(long request,
ret = -EIO;
if (copied != sizeof(tmp))
break;
@@ -17178,7 +23046,36 @@
break;
}
-@@ -180,7 +180,7 @@ asmlinkage int sys_ptrace(long request,
+@@ -175,12 +177,36 @@ asmlinkage int sys_ptrace(long request,
+ write_c0_status(flags);
+ break;
+ }
++ case DSP_BASE ... DSP_BASE + 5: {
++ dspreg_t *dregs;
++
++ if (!cpu_has_dsp) {
++ tmp = 0;
++ ret = -EIO;
++ goto out_tsk;
++ }
++ if (child->thread.dsp.used_dsp) {
++ dregs = __get_dsp_regs(child);
++ tmp = (unsigned long) (dregs[addr - DSP_BASE]);
++ } else {
++ tmp = -1; /* DSP registers yet used */
++ }
++ break;
++ }
++ case DSP_CONTROL:
++ if (!cpu_has_dsp) {
++ tmp = 0;
++ ret = -EIO;
++ goto out_tsk;
++ }
++ tmp = child->thread.dsp.dspcontrol;
++ break;
+ default:
+ tmp = 0;
ret = -EIO;
goto out_tsk;
}
@@ -17187,33 +23084,190 @@
break;
}
-@@ -307,14 +307,20 @@ out:
+@@ -247,6 +273,25 @@ asmlinkage int sys_ptrace(long request,
+ else
+ child->thread.fpu.soft.fcr31 = data;
+ break;
++ case DSP_BASE ... DSP_BASE + 5: {
++ dspreg_t *dregs;
++
++ if (!cpu_has_dsp) {
++ ret = -EIO;
++ break;
++ }
++
++ dregs = __get_dsp_regs(child);
++ dregs[addr - DSP_BASE] = data;
++ break;
++ }
++ case DSP_CONTROL:
++ if (!cpu_has_dsp) {
++ ret = -EIO;
++ break;
++ }
++ child->thread.dsp.dspcontrol = data;
++ break;
+ default:
+ /* The rest are not allowed. */
+ ret = -EIO;
+@@ -289,6 +334,11 @@ asmlinkage int sys_ptrace(long request,
+ ret = ptrace_detach(child, data);
+ break;
+
++ case PTRACE_GET_THREAD_AREA:
++ ret = put_user(child->thread_info->tp_value,
++ (unsigned long __user *) data);
++ break;
++
+ default:
+ ret = ptrace_request(child, request, addr, data);
+ break;
+@@ -303,21 +353,14 @@ out:
+
+ static inline int audit_arch(void)
+ {
+-#ifdef CONFIG_CPU_LITTLE_ENDIAN
+-#ifdef CONFIG_MIPS64
+- if (!(current->thread.mflags & MF_32BIT_REGS))
+- return AUDIT_ARCH_MIPSEL64;
+-#endif /* MIPS64 */
+- return AUDIT_ARCH_MIPSEL;
+-
+-#else /* big endian... */
++ int arch = EM_MIPS;
+ #ifdef CONFIG_MIPS64
+- if (!(current->thread.mflags & MF_32BIT_REGS))
+- return AUDIT_ARCH_MIPS64;
+-#endif /* MIPS64 */
+- return AUDIT_ARCH_MIPS;
+-
+-#endif /* endian */
++ arch |= __AUDIT_ARCH_64BIT;
++#endif
++#if defined(__LITTLE_ENDIAN)
++ arch |= __AUDIT_ARCH_LE;
++#endif
++ return arch;
+ }
+
+ /*
+@@ -326,14 +369,19 @@ static inline int audit_arch(void)
*/
asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
{
-- if (unlikely(current->audit_context)) {
++ /* do the secure computing check first */
++ secure_computing(regs->orig_eax);
++
+ if (unlikely(current->audit_context) && entryexit)
+- audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]), regs->regs[2]);
++ audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]),
++ regs->regs[2]);
+
+- if (!test_thread_flag(TIF_SYSCALL_TRACE))
+- goto out;
+ if (!(current->ptrace & PT_PTRACED))
+ goto out;
+
++ if (!test_thread_flag(TIF_SYSCALL_TRACE))
++ goto out;
++
+ /* The 0x80 provides a way for the tracing parent to distinguish
+ between a syscall stop and SIGTRAP delivery */
+ ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
+@@ -348,9 +396,14 @@ asmlinkage void do_syscall_trace(struct
+ send_sig(current->exit_code, current, 1);
+ current->exit_code = 0;
+ }
+- out:
++
++out:
+ /* There is no ->orig_eax and that's quite intensional for now making
+ this work will require some work in various other place before it's
+ more than a placebo. */
-+ /* do the secure computing check first */
-+ /* secure_computing(regs->orig_eax); */
+
-+ /* if (unlikely(current->audit_context)) {
- if (!entryexit)
- audit_syscall_entry(current, regs->orig_eax,
- regs->regs[4], regs->regs[5],
- regs->regs[6], regs->regs[7]);
- else
- audit_syscall_exit(current, regs->regs[2]);
-- }
-+ } */
+ if (unlikely(current->audit_context) && !entryexit)
+- audit_syscall_entry(current, audit_arch(), regs->regs[2],
+- regs->regs[4], regs->regs[5],
+- regs->regs[6], regs->regs[7]);
++ audit_syscall_entry(current, audit_arch(), regs->orig_eax,
++ regs->regs[4], regs->regs[5],
++ regs->regs[6], regs->regs[7]);
+ }
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/ptrace32.c linux_HEAD/arch/mips/kernel/ptrace32.c
+--- linux-2.6.12/arch/mips/kernel/ptrace32.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/ptrace32.c 2005-07-01 12:09:18.000000000 +0200
+@@ -24,9 +24,9 @@
+ #include <linux/smp_lock.h>
+ #include <linux/user.h>
+ #include <linux/security.h>
+-#include <linux/signal.h>
- if (!test_thread_flag(TIF_SYSCALL_TRACE))
- return;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/ptrace32.c linux_HEAD/arch/mips/kernel/ptrace32.c
---- linux-2.6.11.6/arch/mips/kernel/ptrace32.c 2005-03-26 04:28:20.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/ptrace32.c 2005-02-17 21:48:55.000000000 +0100
-@@ -272,6 +272,11 @@ asmlinkage int sys32_ptrace(int request,
+ #include <asm/cpu.h>
++#include <asm/dsp.h>
+ #include <asm/fpu.h>
+ #include <asm/mipsregs.h>
+ #include <asm/pgtable.h>
+@@ -162,6 +162,27 @@ asmlinkage int sys32_ptrace(int request,
+ write_c0_status(flags);
+ break;
+ }
++ case DSP_BASE ... DSP_BASE + 5:
++ if (!cpu_has_dsp) {
++ tmp = 0;
++ ret = -EIO;
++ goto out_tsk;
++ }
++ if (child->thread.dsp.used_dsp) {
++ dspreg_t *dregs = __get_dsp_regs(child);
++ tmp = (unsigned long) (dregs[addr - DSP_BASE]);
++ } else {
++ tmp = -1; /* DSP registers yet used */
++ }
++ break;
++ case DSP_CONTROL:
++ if (!cpu_has_dsp) {
++ tmp = 0;
++ ret = -EIO;
++ goto out_tsk;
++ }
++ tmp = child->thread.dsp.dspcontrol;
++ break;
+ default:
+ tmp = 0;
+ ret = -EIO;
+@@ -231,6 +252,22 @@ asmlinkage int sys32_ptrace(int request,
+ else
+ child->thread.fpu.soft.fcr31 = data;
+ break;
++ case DSP_BASE ... DSP_BASE + 5:
++ if (!cpu_has_dsp) {
++ ret = -EIO;
++ break;
++ }
++
++ dspreg_t *dregs = __get_dsp_regs(child);
++ dregs[addr - DSP_BASE] = data;
++ break;
++ case DSP_CONTROL:
++ if (!cpu_has_dsp) {
++ ret = -EIO;
++ break;
++ }
++ child->thread.dsp.dspcontrol = data;
++ break;
+ default:
+ /* The rest are not allowed. */
+ ret = -EIO;
+@@ -269,10 +306,20 @@ asmlinkage int sys32_ptrace(int request,
+ wake_up_process(child);
+ break;
+
++ case PTRACE_GET_THREAD_AREA:
++ ret = put_user(child->thread_info->tp_value,
++ (unsigned int __user *) (unsigned long) data);
++ break;
++
+ case PTRACE_DETACH: /* detach a process that was attached. */
ret = ptrace_detach(child, data);
break;
@@ -17225,9 +23279,43 @@
default:
ret = ptrace_request(child, request, addr, data);
break;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/scall32-o32.S linux_HEAD/arch/mips/kernel/scall32-o32.S
---- linux-2.6.11.6/arch/mips/kernel/scall32-o32.S 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/scall32-o32.S 2005-03-13 00:27:29.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/r4k_fpu.S linux_HEAD/arch/mips/kernel/r4k_fpu.S
+--- linux-2.6.12/arch/mips/kernel/r4k_fpu.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/r4k_fpu.S 2005-07-01 12:09:18.000000000 +0200
+@@ -32,7 +32,7 @@
+
+ .set noreorder
+ .set mips3
+- /* Save floating point context */
++
+ LEAF(_save_fp_context)
+ cfc1 t1, fcr31
+
+@@ -74,9 +74,6 @@ LEAF(_save_fp_context)
+ EX sdc1 $f28, SC_FPREGS+224(a0)
+ EX sdc1 $f30, SC_FPREGS+240(a0)
+ EX sw t1, SC_FPC_CSR(a0)
+- cfc1 t0, $0 # implementation/version
+- EX sw t0, SC_FPC_EIR(a0)
+-
+ jr ra
+ li v0, 0 # success
+ END(_save_fp_context)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/r4k_switch.S linux_HEAD/arch/mips/kernel/r4k_switch.S
+--- linux-2.6.12/arch/mips/kernel/r4k_switch.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/r4k_switch.S 2005-07-07 11:22:49.000000000 +0200
+@@ -165,7 +165,7 @@ LEAF(_init_fpu)
+ 1:
+ #endif
+
+-#ifdef CONFIG_CPU_MIPS32
++#ifdef CONFIG_CPU_MIPS32_R1
+ mtc1 t1, $f0
+ mtc1 t1, $f1
+ mtc1 t1, $f2
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/scall32-o32.S linux_HEAD/arch/mips/kernel/scall32-o32.S
+--- linux-2.6.12/arch/mips/kernel/scall32-o32.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/scall32-o32.S 2005-07-01 12:09:18.000000000 +0200
@@ -578,7 +578,7 @@ einval: li v0, -EINVAL
sys sys_fremovexattr 2 /* 4235 */
sys sys_tkill 2
@@ -17237,18 +23325,32 @@
sys sys_sched_setaffinity 3
sys sys_sched_getaffinity 3 /* 4240 */
sys sys_io_setup 2
-@@ -618,7 +618,7 @@ einval: li v0, -EINVAL
+@@ -618,11 +618,12 @@ einval: li v0, -EINVAL
sys sys_mq_notify 2 /* 4275 */
sys sys_mq_getsetattr 3
sys sys_ni_syscall 0 /* sys_vserver */
- sys sys_waitid 4
+ sys sys_waitid 5
sys sys_ni_syscall 0 /* available, was setaltroot */
- sys sys_add_key 5
+- sys sys_add_key 5
++ sys sys_add_key 5 /* 4280 */
sys sys_request_key 4
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/scall64-n32.S linux_HEAD/arch/mips/kernel/scall64-n32.S
---- linux-2.6.11.6/arch/mips/kernel/scall64-n32.S 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/scall64-n32.S 2005-02-17 21:48:55.000000000 +0100
+ sys sys_keyctl 5
++ sys sys_set_thread_area 1
+
+ .endm
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/scall64-64.S linux_HEAD/arch/mips/kernel/scall64-64.S
+--- linux-2.6.12/arch/mips/kernel/scall64-64.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/scall64-64.S 2005-04-13 19:06:33.000000000 +0200
+@@ -449,3 +449,4 @@ sys_call_table:
+ PTR sys_add_key
+ PTR sys_request_key /* 5240 */
+ PTR sys_keyctl
++ PTR sys_set_thread_area
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/scall64-n32.S linux_HEAD/arch/mips/kernel/scall64-n32.S
+--- linux-2.6.12/arch/mips/kernel/scall64-n32.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/scall64-n32.S 2005-04-16 22:59:17.000000000 +0200
@@ -176,7 +176,7 @@ EXPORT(sysn32_call_table)
PTR sys_fork
PTR sys32_execve
@@ -17258,7 +23360,7 @@
PTR sys_kill /* 6060 */
PTR sys32_newuname
PTR sys_semget
-@@ -243,8 +243,8 @@ EXPORT(sysn32_call_table)
+@@ -243,14 +243,14 @@ EXPORT(sysn32_call_table)
PTR sys_capget
PTR sys_capset
PTR sys32_rt_sigpending /* 6125 */
@@ -17269,6 +23371,22 @@
PTR sys32_rt_sigsuspend
PTR sys32_sigaltstack
PTR compat_sys_utime /* 6130 */
+ PTR sys_mknod
+ PTR sys32_personality
+- PTR sys_ustat
++ PTR sys32_ustat
+ PTR compat_sys_statfs
+ PTR compat_sys_fstatfs /* 6135 */
+ PTR sys_sysfs
+@@ -329,7 +329,7 @@ EXPORT(sysn32_call_table)
+ PTR sys_epoll_wait
+ PTR sys_remap_file_pages /* 6210 */
+ PTR sysn32_rt_sigreturn
+- PTR sys_fcntl
++ PTR compat_sys_fcntl64
+ PTR sys_set_tid_address
+ PTR sys_restart_syscall
+ PTR sys_semtimedop /* 6215 */
@@ -337,15 +337,15 @@ EXPORT(sysn32_call_table)
PTR compat_sys_statfs64
PTR compat_sys_fstatfs64
@@ -17292,7 +23410,7 @@
PTR sys_tgkill
PTR compat_sys_utimes /* 6230 */
PTR sys_ni_syscall /* sys_mbind */
-@@ -358,7 +358,7 @@ EXPORT(sysn32_call_table)
+@@ -358,8 +358,9 @@ EXPORT(sysn32_call_table)
PTR compat_sys_mq_notify
PTR compat_sys_mq_getsetattr
PTR sys_ni_syscall /* 6240, sys_vserver */
@@ -17301,10 +23419,12 @@
PTR sys_ni_syscall /* available, was setaltroot */
PTR sys_add_key
PTR sys_request_key
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/scall64-o32.S linux_HEAD/arch/mips/kernel/scall64-o32.S
---- linux-2.6.11.6/arch/mips/kernel/scall64-o32.S 2005-03-26 04:28:13.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/scall64-o32.S 2005-02-17 21:48:55.000000000 +0100
-@@ -316,7 +316,7 @@ sys_call_table:
+ PTR sys_keyctl /* 6245 */
++ PTR sys_set_thread_area
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/scall64-o32.S linux_HEAD/arch/mips/kernel/scall64-o32.S
+--- linux-2.6.12/arch/mips/kernel/scall64-o32.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/scall64-o32.S 2005-05-09 13:20:25.000000000 +0200
+@@ -316,13 +316,13 @@ sys_call_table:
PTR sys_vhangup
PTR sys_ni_syscall /* was sys_idle */
PTR sys_ni_syscall /* sys_vm86 */
@@ -17313,6 +23433,22 @@
PTR sys_swapoff /* 4115 */
PTR sys32_sysinfo
PTR sys32_ipc
+ PTR sys_fsync
+ PTR sys32_sigreturn
+- PTR sys_clone /* 4120 */
++ PTR sys32_clone /* 4120 */
+ PTR sys_setdomainname
+ PTR sys32_newuname
+ PTR sys_ni_syscall /* sys_modify_ldt */
+@@ -391,7 +391,7 @@ sys_call_table:
+ PTR sys_getresuid
+ PTR sys_ni_syscall /* was query_module */
+ PTR sys_poll
+- PTR sys_nfsservctl
++ PTR compat_sys_nfsservctl
+ PTR sys_setresgid /* 4190 */
+ PTR sys_getresgid
+ PTR sys_prctl
@@ -459,7 +459,7 @@ sys_call_table:
PTR sys_fadvise64_64
PTR compat_sys_statfs64 /* 4255 */
@@ -17322,7 +23458,7 @@
PTR compat_sys_timer_settime
PTR compat_sys_timer_gettime
PTR sys_timer_getoverrun /* 4260 */
-@@ -480,7 +480,7 @@ sys_call_table:
+@@ -480,9 +480,10 @@ sys_call_table:
PTR compat_sys_mq_notify /* 4275 */
PTR compat_sys_mq_getsetattr
PTR sys_ni_syscall /* sys_vserver */
@@ -17331,23 +23467,283 @@
PTR sys_ni_syscall /* available, was setaltroot */
PTR sys_add_key /* 4280 */
PTR sys_request_key
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/signal-common.h linux_HEAD/arch/mips/kernel/signal-common.h
---- linux-2.6.11.6/arch/mips/kernel/signal-common.h 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/signal-common.h 2005-02-17 21:48:55.000000000 +0100
-@@ -61,8 +61,8 @@ out:
+ PTR sys_keyctl
++ PTR sys_set_thread_area
+ .size sys_call_table,.-sys_call_table
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/semaphore.c linux_HEAD/arch/mips/kernel/semaphore.c
+--- linux-2.6.12/arch/mips/kernel/semaphore.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/semaphore.c 2005-07-01 12:09:18.000000000 +0200
+@@ -42,24 +42,28 @@ static inline int __sem_update_count(str
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+- "1: ll %0, %2 \n"
++ " .set mips3 \n"
++ "1: ll %0, %2 # __sem_update_count \n"
+ " sra %1, %0, 31 \n"
+ " not %1 \n"
+ " and %1, %0, %1 \n"
+- " add %1, %1, %3 \n"
++ " addu %1, %1, %3 \n"
+ " sc %1, %2 \n"
+ " beqzl %1, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
+ : "r" (incr), "m" (sem->count));
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
+- "1: ll %0, %2 \n"
++ " .set mips3 \n"
++ "1: ll %0, %2 # __sem_update_count \n"
+ " sra %1, %0, 31 \n"
+ " not %1 \n"
+ " and %1, %0, %1 \n"
+- " add %1, %1, %3 \n"
++ " addu %1, %1, %3 \n"
+ " sc %1, %2 \n"
+ " beqz %1, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
+ : "r" (incr), "m" (sem->count));
+ } else {
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/setup.c linux_HEAD/arch/mips/kernel/setup.c
+--- linux-2.6.12/arch/mips/kernel/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/setup.c 2005-07-10 12:16:33.000000000 +0200
+@@ -507,32 +507,6 @@ static inline void resource_init(void)
+ #undef MAXMEM
+ #undef MAXMEM_PFN
+
+-static int __initdata earlyinit_debug;
+-
+-static int __init earlyinit_debug_setup(char *str)
+-{
+- earlyinit_debug = 1;
+- return 1;
+-}
+-__setup("earlyinit_debug", earlyinit_debug_setup);
+-
+-extern initcall_t __earlyinitcall_start, __earlyinitcall_end;
+-
+-static void __init do_earlyinitcalls(void)
+-{
+- initcall_t *call, *start, *end;
+-
+- start = &__earlyinitcall_start;
+- end = &__earlyinitcall_end;
+-
+- for (call = start; call < end; call++) {
+- if (earlyinit_debug)
+- printk("calling earlyinitcall 0x%p\n", *call);
+-
+- (*call)();
+- }
+-}
+-
+ void __init setup_arch(char **cmdline_p)
+ {
+ cpu_probe();
+@@ -548,7 +522,7 @@ void __init setup_arch(char **cmdline_p)
+ #endif
+
+ /* call board setup routine */
+- do_earlyinitcalls();
++ plat_setup();
+
+ strlcpy(command_line, arcs_cmdline, sizeof(command_line));
+ strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE);
+@@ -569,3 +543,12 @@ int __init fpu_disable(char *s)
+ }
+
+ __setup("nofpu", fpu_disable);
++
++int __init dsp_disable(char *s)
++{
++ cpu_data[0].options &= ~MIPS_ASE_DSP;
++
++ return 1;
++}
++
++__setup("nodsp", dsp_disable);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/signal-common.h linux_HEAD/arch/mips/kernel/signal-common.h
+--- linux-2.6.12/arch/mips/kernel/signal-common.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/signal-common.h 2005-07-01 12:09:18.000000000 +0200
+@@ -8,13 +8,14 @@
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+
++#include <linux/config.h>
++
static inline int
+ setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
+ {
+ int err = 0;
+
+ err |= __put_user(regs->cp0_epc, &sc->sc_pc);
+- err |= __put_user(regs->cp0_status, &sc->sc_status);
+
+ #define save_gp_reg(i) do { \
+ err |= __put_user(regs->regs[i], &sc->sc_regs[i]); \
+@@ -30,10 +31,32 @@ setup_sigcontext(struct pt_regs *regs, s
+ save_gp_reg(31);
+ #undef save_gp_reg
+
++#ifdef CONFIG_MIPS32
+ err |= __put_user(regs->hi, &sc->sc_mdhi);
+ err |= __put_user(regs->lo, &sc->sc_mdlo);
+- err |= __put_user(regs->cp0_cause, &sc->sc_cause);
+- err |= __put_user(regs->cp0_badvaddr, &sc->sc_badvaddr);
++ if (cpu_has_dsp) {
++ err |= __put_user(mfhi1(), &sc->sc_hi1);
++ err |= __put_user(mflo1(), &sc->sc_lo1);
++ err |= __put_user(mfhi2(), &sc->sc_hi2);
++ err |= __put_user(mflo2(), &sc->sc_lo2);
++ err |= __put_user(mfhi3(), &sc->sc_hi3);
++ err |= __put_user(mflo3(), &sc->sc_lo3);
++ err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
++ }
++#endif
++#ifdef CONFIG_MIPS64
++ err |= __put_user(regs->hi, &sc->sc_hi[0]);
++ err |= __put_user(regs->lo, &sc->sc_lo[0]);
++ if (cpu_has_dsp) {
++ err |= __put_user(mfhi1(), &sc->sc_hi[1]);
++ err |= __put_user(mflo1(), &sc->sc_lo[1]);
++ err |= __put_user(mfhi2(), &sc->sc_hi[2]);
++ err |= __put_user(mflo2(), &sc->sc_lo[2]);
++ err |= __put_user(mfhi3(), &sc->sc_hi[3]);
++ err |= __put_user(mflo3(), &sc->sc_lo[3]);
++ err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
++ }
++#endif
+
+ err |= __put_user(!!used_math(), &sc->sc_used_math);
+
+@@ -61,15 +84,40 @@ out:
+ static inline int
restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
{
- int err = 0;
unsigned int used_math;
++ unsigned long treg;
+ int err = 0;
/* Always make any pending restarted system calls return -EINTR */
current_thread_info()->restart_block.fn = do_no_restart_syscall;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/signal.c linux_HEAD/arch/mips/kernel/signal.c
---- linux-2.6.11.6/arch/mips/kernel/signal.c 2005-03-26 04:28:47.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/signal.c 2005-03-01 22:49:39.000000000 +0100
-@@ -47,9 +47,10 @@ save_static_function(sys_sigsuspend);
+
+ err |= __get_user(regs->cp0_epc, &sc->sc_pc);
++#ifdef CONFIG_MIPS32
+ err |= __get_user(regs->hi, &sc->sc_mdhi);
+ err |= __get_user(regs->lo, &sc->sc_mdlo);
++ if (cpu_has_dsp) {
++ err |= __get_user(treg, &sc->sc_hi1); mthi1(treg);
++ err |= __get_user(treg, &sc->sc_lo1); mtlo1(treg);
++ err |= __get_user(treg, &sc->sc_hi2); mthi2(treg);
++ err |= __get_user(treg, &sc->sc_lo2); mtlo2(treg);
++ err |= __get_user(treg, &sc->sc_hi3); mthi3(treg);
++ err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
++ err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
++ }
++#endif
++#ifdef CONFIG_MIPS64
++ err |= __get_user(regs->hi, &sc->sc_hi[0]);
++ err |= __get_user(regs->lo, &sc->sc_lo[0]);
++ if (cpu_has_dsp) {
++ err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
++ err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
++ err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
++ err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
++ err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
++ err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
++ err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
++ }
++#endif
+
+ #define restore_gp_reg(i) do { \
+ err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
+@@ -112,7 +160,7 @@ restore_sigcontext(struct pt_regs *regs,
+ static inline void *
+ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
+ {
+- unsigned long sp, almask;
++ unsigned long sp;
+
+ /* Default to using normal stack */
+ sp = regs->regs[29];
+@@ -128,10 +176,32 @@ get_sigframe(struct k_sigaction *ka, str
+ if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0))
+ sp = current->sas_ss_sp + current->sas_ss_size;
+
+- if (PLAT_TRAMPOLINE_STUFF_LINE)
+- almask = ~(PLAT_TRAMPOLINE_STUFF_LINE - 1);
+- else
+- almask = ALMASK;
++ return (void *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? 32 : ALMASK));
++}
++
++static inline int install_sigtramp(unsigned int __user *tramp,
++ unsigned int syscall)
++{
++ int err;
++
++ /*
++ * Set up the return code ...
++ *
++ * li v0, __NR__foo_sigreturn
++ * syscall
++ */
++
++ err |= __put_user(0x24020000 + syscall, tramp + 0);
++ err |= __put_user(0x0000000c , tramp + 1);
++ if (ICACHE_REFILLS_WORKAROUND_WAR) {
++ err |= __put_user(0, tramp + 2);
++ err |= __put_user(0, tramp + 3);
++ err |= __put_user(0, tramp + 4);
++ err |= __put_user(0, tramp + 5);
++ err |= __put_user(0, tramp + 6);
++ err |= __put_user(0, tramp + 7);
++ }
++ flush_cache_sigtramp((unsigned long) tramp);
+
+- return (void *)((sp - frame_size) & almask);
++ return err;
+ }
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/signal.c linux_HEAD/arch/mips/kernel/signal.c
+--- linux-2.6.12/arch/mips/kernel/signal.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/signal.c 2005-07-01 12:09:18.000000000 +0200
+@@ -8,6 +8,7 @@
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+ #include <linux/config.h>
++#include <linux/cache.h>
+ #include <linux/sched.h>
+ #include <linux/mm.h>
+ #include <linux/personality.h>
+@@ -21,6 +22,7 @@
+ #include <linux/unistd.h>
+ #include <linux/compiler.h>
+
++#include <asm/abi.h>
+ #include <asm/asm.h>
+ #include <linux/bitops.h>
+ #include <asm/cacheflush.h>
+@@ -29,6 +31,7 @@
+ #include <asm/uaccess.h>
+ #include <asm/ucontext.h>
+ #include <asm/cpu-features.h>
++#include <asm/war.h>
+
+ #include "signal-common.h"
+
+@@ -36,7 +39,7 @@
+
+ #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+-static int do_signal(sigset_t *oldset, struct pt_regs *regs);
++int do_signal(sigset_t *oldset, struct pt_regs *regs);
+
+ /*
+ * Atomically swap in the new signal mask, and wait for a signal.
+@@ -47,9 +50,10 @@ save_static_function(sys_sigsuspend);
__attribute_used__ noinline static int
_sys_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
@@ -17360,7 +23756,7 @@
if (copy_from_user(&newset, uset, sizeof(sigset_t)))
return -EFAULT;
sigdelsetmask(&newset, ~_BLOCKABLE);
-@@ -75,7 +76,8 @@ save_static_function(sys_rt_sigsuspend);
+@@ -75,7 +79,8 @@ save_static_function(sys_rt_sigsuspend);
__attribute_used__ noinline static int
_sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
@@ -17370,7 +23766,7 @@
size_t sigsetsize;
/* XXX Don't preclude handling different sized sigset_t's. */
-@@ -83,7 +85,7 @@ _sys_rt_sigsuspend(nabi_no_regargs struc
+@@ -83,7 +88,7 @@ _sys_rt_sigsuspend(nabi_no_regargs struc
if (sigsetsize != sizeof(sigset_t))
return -EINVAL;
@@ -17379,7 +23775,7 @@
if (copy_from_user(&newset, unewset, sizeof(newset)))
return -EFAULT;
sigdelsetmask(&newset, ~_BLOCKABLE);
-@@ -147,8 +149,8 @@ asmlinkage int sys_sigaction(int sig, co
+@@ -147,33 +152,46 @@ asmlinkage int sys_sigaction(int sig, co
asmlinkage int sys_sigaltstack(nabi_no_regargs struct pt_regs regs)
{
@@ -17390,11 +23786,217 @@
unsigned long usp = regs.regs[29];
return do_sigaltstack(uss, uoss, usp);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/signal32.c linux_HEAD/arch/mips/kernel/signal32.c
---- linux-2.6.11.6/arch/mips/kernel/signal32.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/kernel/signal32.c 2005-03-21 20:03:46.000000000 +0100
-@@ -76,8 +76,10 @@ typedef struct compat_siginfo {
+ }
+-#if PLAT_TRAMPOLINE_STUFF_LINE
+-#define __tramp __attribute__((aligned(PLAT_TRAMPOLINE_STUFF_LINE)))
+-#else
+-#define __tramp
+-#endif
+-
++/*
++ * Horribly complicated - with the bloody RM9000 workarounds enabled
++ * the signal trampolines is moving to the end of the structure so we can
++ * increase the alignment without breaking software compatibility.
++ */
+ #ifdef CONFIG_TRAD_SIGNALS
+ struct sigframe {
+ u32 sf_ass[4]; /* argument save space for o32 */
+- u32 sf_code[2] __tramp; /* signal trampoline */
+- struct sigcontext sf_sc __tramp;
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 sf_pad[2];
++#else
++ u32 sf_code[2]; /* signal trampoline */
++#endif
++ struct sigcontext sf_sc;
+ sigset_t sf_mask;
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
++#endif
+ };
+ #endif
+
+ struct rt_sigframe {
+ u32 rs_ass[4]; /* argument save space for o32 */
+- u32 rs_code[2] __tramp; /* signal trampoline */
+- struct siginfo rs_info __tramp;
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 rs_pad[2];
++#else
++ u32 rs_code[2]; /* signal trampoline */
++#endif
++ struct siginfo rs_info;
+ struct ucontext rs_uc;
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */
++#endif
+ };
+
+ #ifdef CONFIG_TRAD_SIGNALS
+@@ -214,7 +232,7 @@ _sys_sigreturn(nabi_no_regargs struct pt
+ badframe:
+ force_sig(SIGSEGV, current);
+ }
+-#endif
++#endif /* CONFIG_TRAD_SIGNALS */
+
+ save_static_function(sys_rt_sigreturn);
+ __attribute_used__ noinline static void
+@@ -260,7 +278,7 @@ badframe:
+ }
+
+ #ifdef CONFIG_TRAD_SIGNALS
+-static void inline setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
++void setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set)
+ {
+ struct sigframe *frame;
+@@ -270,17 +288,7 @@ static void inline setup_frame(struct k_
+ if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
+ goto give_sigsegv;
+
+- /*
+- * Set up the return code ...
+- *
+- * li v0, __NR_sigreturn
+- * syscall
+- */
+- if (PLAT_TRAMPOLINE_STUFF_LINE)
+- __clear_user(frame->sf_code, PLAT_TRAMPOLINE_STUFF_LINE);
+- err |= __put_user(0x24020000 + __NR_sigreturn, frame->sf_code + 0);
+- err |= __put_user(0x0000000c , frame->sf_code + 1);
+- flush_cache_sigtramp((unsigned long) frame->sf_code);
++ install_sigtramp(frame->sf_code, __NR_sigreturn);
+
+ err |= setup_sigcontext(regs, &frame->sf_sc);
+ err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set));
+@@ -316,7 +324,7 @@ give_sigsegv:
+ }
+ #endif
+
+-static void inline setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
++void setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set, siginfo_t *info)
+ {
+ struct rt_sigframe *frame;
+@@ -326,17 +334,7 @@ static void inline setup_rt_frame(struct
+ if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
+ goto give_sigsegv;
+
+- /*
+- * Set up the return code ...
+- *
+- * li v0, __NR_rt_sigreturn
+- * syscall
+- */
+- if (PLAT_TRAMPOLINE_STUFF_LINE)
+- __clear_user(frame->rs_code, PLAT_TRAMPOLINE_STUFF_LINE);
+- err |= __put_user(0x24020000 + __NR_rt_sigreturn, frame->rs_code + 0);
+- err |= __put_user(0x0000000c , frame->rs_code + 1);
+- flush_cache_sigtramp((unsigned long) frame->rs_code);
++ install_sigtramp(frame->rs_code, __NR_rt_sigreturn);
+
+ /* Create siginfo. */
+ err |= copy_siginfo_to_user(&frame->rs_info, info);
+@@ -408,22 +406,10 @@ static inline void handle_signal(unsigne
+
+ regs->regs[0] = 0; /* Don't deal with this again. */
+
+-#ifdef CONFIG_TRAD_SIGNALS
+- if (ka->sa.sa_flags & SA_SIGINFO) {
+-#else
+- if (1) {
+-#endif
+-#ifdef CONFIG_MIPS32_N32
+- if ((current->thread.mflags & MF_ABI_MASK) == MF_N32)
+- setup_rt_frame_n32 (ka, regs, sig, oldset, info);
+- else
+-#endif
+- setup_rt_frame(ka, regs, sig, oldset, info);
+- }
+-#ifdef CONFIG_TRAD_SIGNALS
++ if (sig_uses_siginfo(ka))
++ current->thread.abi->setup_rt_frame(ka, regs, sig, oldset, info);
+ else
+- setup_frame(ka, regs, sig, oldset);
+-#endif
++ current->thread.abi->setup_frame(ka, regs, sig, oldset);
+
+ if (!(ka->sa.sa_flags & SA_NODEFER)) {
+ spin_lock_irq(¤t->sighand->siglock);
+@@ -434,21 +420,12 @@ static inline void handle_signal(unsigne
+ }
+ }
+
+-extern int do_signal32(sigset_t *oldset, struct pt_regs *regs);
+-extern int do_irix_signal(sigset_t *oldset, struct pt_regs *regs);
+-
+-static int do_signal(sigset_t *oldset, struct pt_regs *regs)
++int do_signal(sigset_t *oldset, struct pt_regs *regs)
+ {
+ struct k_sigaction ka;
+ siginfo_t info;
+ int signr;
+
+-#ifdef CONFIG_BINFMT_ELF32
+- if ((current->thread.mflags & MF_ABI_MASK) == MF_O32) {
+- return do_signal32(oldset, regs);
+- }
+-#endif
+-
+ /*
+ * We want the common case to go fast, which is why we may in certain
+ * cases get here from kernel mode. Just return without doing anything
+@@ -500,18 +477,6 @@ asmlinkage void do_notify_resume(struct
+ {
+ /* deal with pending signal delivery */
+ if (thread_info_flags & _TIF_SIGPENDING) {
+-#ifdef CONFIG_BINFMT_ELF32
+- if (likely((current->thread.mflags & MF_ABI_MASK) == MF_O32)) {
+- do_signal32(oldset, regs);
+- return;
+- }
+-#endif
+-#ifdef CONFIG_BINFMT_IRIX
+- if (unlikely(current->personality != PER_LINUX)) {
+- do_irix_signal(oldset, regs);
+- return;
+- }
+-#endif
+- do_signal(oldset, regs);
++ current->thread.abi->do_signal(oldset, regs);
+ }
+ }
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/signal32.c linux_HEAD/arch/mips/kernel/signal32.c
+--- linux-2.6.12/arch/mips/kernel/signal32.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/signal32.c 2005-07-01 12:09:18.000000000 +0200
+@@ -7,6 +7,7 @@
+ * Copyright (C) 1994 - 2000 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
++#include <linux/cache.h>
+ #include <linux/sched.h>
+ #include <linux/mm.h>
+ #include <linux/smp.h>
+@@ -21,6 +22,7 @@
+ #include <linux/suspend.h>
+ #include <linux/compiler.h>
+
++#include <asm/abi.h>
+ #include <asm/asm.h>
+ #include <linux/bitops.h>
+ #include <asm/cacheflush.h>
+@@ -29,6 +31,7 @@
+ #include <asm/ucontext.h>
+ #include <asm/system.h>
+ #include <asm/fpu.h>
++#include <asm/war.h>
+
+ #define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3)
+
+@@ -76,8 +79,10 @@ typedef struct compat_siginfo {
+
/* POSIX.1b timers */
struct {
- unsigned int _timer1;
@@ -17406,7 +24008,7 @@
} _timer;
/* POSIX.1b signals */
-@@ -259,11 +261,12 @@ asmlinkage int sys32_sigaction(int sig,
+@@ -259,11 +264,12 @@ asmlinkage int sys32_sigaction(int sig,
if (act) {
old_sigset_t mask;
@@ -17421,7 +24023,65 @@
err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
err |= __get_user(mask, &act->sa_mask.sig[0]);
if (err)
-@@ -411,6 +414,11 @@ int copy_siginfo_to_user32(compat_siginf
+@@ -331,8 +337,9 @@ asmlinkage int sys32_sigaltstack(nabi_no
+
+ static int restore_sigcontext32(struct pt_regs *regs, struct sigcontext32 *sc)
+ {
++ u32 used_math;
+ int err = 0;
+- __u32 used_math;
++ s32 treg;
+
+ /* Always make any pending restarted system calls return -EINTR */
+ current_thread_info()->restart_block.fn = do_no_restart_syscall;
+@@ -340,6 +347,15 @@ static int restore_sigcontext32(struct p
+ err |= __get_user(regs->cp0_epc, &sc->sc_pc);
+ err |= __get_user(regs->hi, &sc->sc_mdhi);
+ err |= __get_user(regs->lo, &sc->sc_mdlo);
++ if (cpu_has_dsp) {
++ err |= __get_user(treg, &sc->sc_hi1); mthi1(treg);
++ err |= __get_user(treg, &sc->sc_lo1); mtlo1(treg);
++ err |= __get_user(treg, &sc->sc_hi2); mthi2(treg);
++ err |= __get_user(treg, &sc->sc_lo2); mtlo2(treg);
++ err |= __get_user(treg, &sc->sc_hi3); mthi3(treg);
++ err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
++ err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
++ }
+
+ #define restore_gp_reg(i) do { \
+ err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
+@@ -378,16 +394,30 @@ static int restore_sigcontext32(struct p
+
+ struct sigframe {
+ u32 sf_ass[4]; /* argument save space for o32 */
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 sf_pad[2];
++#else
+ u32 sf_code[2]; /* signal trampoline */
++#endif
+ struct sigcontext32 sf_sc;
+ sigset_t sf_mask;
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */
++#endif
+ };
+
+ struct rt_sigframe32 {
+ u32 rs_ass[4]; /* argument save space for o32 */
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 rs_pad[2];
++#else
+ u32 rs_code[2]; /* signal trampoline */
++#endif
+ compat_siginfo_t rs_info;
+ struct ucontext32 rs_uc;
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 rs_code[8] __attribute__((aligned(32))); /* signal trampoline */
++#endif
+ };
+
+ int copy_siginfo_to_user32(compat_siginfo_t *to, siginfo_t *from)
+@@ -411,6 +441,11 @@ int copy_siginfo_to_user32(compat_siginf
err |= __copy_to_user(&to->_sifields._pad, &from->_sifields._pad, SI_PAD_SIZE);
else {
switch (from->si_code >> 16) {
@@ -17433,7 +24093,76 @@
case __SI_CHLD >> 16:
err |= __put_user(from->si_utime, &to->si_utime);
err |= __put_user(from->si_stime, &to->si_stime);
-@@ -820,12 +828,13 @@ asmlinkage int sys32_rt_sigaction(int si
+@@ -480,6 +515,7 @@ __attribute_used__ noinline static void
+ _sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
+ {
+ struct rt_sigframe32 *frame;
++ mm_segment_t old_fs;
+ sigset_t set;
+ stack_t st;
+ s32 sp;
+@@ -510,7 +546,10 @@ _sys32_rt_sigreturn(nabi_no_regargs stru
+
+ /* It is more difficult to avoid calling this function than to
+ call it and ignore errors. */
++ old_fs = get_fs();
++ set_fs (KERNEL_DS);
+ do_sigaltstack(&st, NULL, regs.regs[29]);
++ set_fs (old_fs);
+
+ /*
+ * Don't let your children do this ...
+@@ -550,8 +589,15 @@ static inline int setup_sigcontext32(str
+
+ err |= __put_user(regs->hi, &sc->sc_mdhi);
+ err |= __put_user(regs->lo, &sc->sc_mdlo);
+- err |= __put_user(regs->cp0_cause, &sc->sc_cause);
+- err |= __put_user(regs->cp0_badvaddr, &sc->sc_badvaddr);
++ if (cpu_has_dsp) {
++ err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1);
++ err |= __put_user(mfhi1(), &sc->sc_hi1);
++ err |= __put_user(mflo1(), &sc->sc_lo1);
++ err |= __put_user(mfhi2(), &sc->sc_hi2);
++ err |= __put_user(mflo2(), &sc->sc_lo2);
++ err |= __put_user(mfhi3(), &sc->sc_hi3);
++ err |= __put_user(mflo3(), &sc->sc_lo3);
++ }
+
+ err |= __put_user(!!used_math(), &sc->sc_used_math);
+
+@@ -601,7 +647,7 @@ static inline void *get_sigframe(struct
+ return (void *)((sp - frame_size) & ALMASK);
+ }
+
+-static inline void setup_frame(struct k_sigaction * ka, struct pt_regs *regs,
++void setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs,
+ int signr, sigset_t *set)
+ {
+ struct sigframe *frame;
+@@ -654,9 +700,7 @@ give_sigsegv:
+ force_sigsegv(signr, current);
+ }
+
+-static inline void setup_rt_frame(struct k_sigaction * ka,
+- struct pt_regs *regs, int signr,
+- sigset_t *set, siginfo_t *info)
++void setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info)
+ {
+ struct rt_sigframe32 *frame;
+ int err = 0;
+@@ -747,9 +791,9 @@ static inline void handle_signal(unsigne
+ regs->regs[0] = 0; /* Don't deal with this again. */
+
+ if (ka->sa.sa_flags & SA_SIGINFO)
+- setup_rt_frame(ka, regs, sig, oldset, info);
++ current->thread.abi->setup_rt_frame(ka, regs, sig, oldset, info);
+ else
+- setup_frame(ka, regs, sig, oldset);
++ current->thread.abi->setup_frame(ka, regs, sig, oldset);
+
+ if (!(ka->sa.sa_flags & SA_NODEFER)) {
+ spin_lock_irq(¤t->sighand->siglock);
+@@ -820,12 +864,13 @@ asmlinkage int sys32_rt_sigaction(int si
goto out;
if (act) {
@@ -17449,7 +24178,7 @@
err |= __get_user(new_sa.sa.sa_flags, &act->sa_flags);
err |= get_sigset(&new_sa.sa.sa_mask, &act->sa_mask);
if (err)
-@@ -903,3 +912,30 @@ asmlinkage int sys32_rt_sigqueueinfo(int
+@@ -903,3 +948,30 @@ asmlinkage int sys32_rt_sigqueueinfo(int
set_fs (old_fs);
return ret;
}
@@ -17480,9 +24209,75 @@
+ info.si_code |= __SI_CHLD;
+ return copy_siginfo_to_user32(uinfo, &info);
+}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/smp.c linux_HEAD/arch/mips/kernel/smp.c
---- linux-2.6.11.6/arch/mips/kernel/smp.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/kernel/smp.c 2005-03-21 20:03:46.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/signal_n32.c linux_HEAD/arch/mips/kernel/signal_n32.c
+--- linux-2.6.12/arch/mips/kernel/signal_n32.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/signal_n32.c 2005-07-01 12:09:18.000000000 +0200
+@@ -15,6 +15,8 @@
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
++#include <linux/cache.h>
++#include <linux/sched.h>
+ #include <linux/sched.h>
+ #include <linux/mm.h>
+ #include <linux/smp.h>
+@@ -36,6 +38,7 @@
+ #include <asm/system.h>
+ #include <asm/fpu.h>
+ #include <asm/cpu-features.h>
++#include <asm/war.h>
+
+ #include "signal-common.h"
+
+@@ -62,17 +65,18 @@ struct ucontextn32 {
+ sigset_t uc_sigmask; /* mask last for extensibility */
+ };
+
+-#if PLAT_TRAMPOLINE_STUFF_LINE
+-#define __tramp __attribute__((aligned(PLAT_TRAMPOLINE_STUFF_LINE)))
+-#else
+-#define __tramp
+-#endif
+-
+ struct rt_sigframe_n32 {
+ u32 rs_ass[4]; /* argument save space for o32 */
+- u32 rs_code[2] __tramp; /* signal trampoline */
+- struct siginfo rs_info __tramp;
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 rs_pad[2];
++#else
++ u32 rs_code[2]; /* signal trampoline */
++#endif
++ struct siginfo rs_info;
+ struct ucontextn32 rs_uc;
++#if ICACHE_REFILLS_WORKAROUND_WAR
++ u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */
++#endif
+ };
+
+ save_static_function(sysn32_rt_sigreturn);
+@@ -137,17 +141,7 @@ void setup_rt_frame_n32(struct k_sigacti
+ if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame)))
+ goto give_sigsegv;
+
+- /*
+- * Set up the return code ...
+- *
+- * li v0, __NR_rt_sigreturn
+- * syscall
+- */
+- if (PLAT_TRAMPOLINE_STUFF_LINE)
+- __clear_user(frame->rs_code, PLAT_TRAMPOLINE_STUFF_LINE);
+- err |= __put_user(0x24020000 + __NR_N32_rt_sigreturn, frame->rs_code + 0);
+- err |= __put_user(0x0000000c , frame->rs_code + 1);
+- flush_cache_sigtramp((unsigned long) frame->rs_code);
++ install_sigtramp(frame->rs_code, __NR_N32_rt_sigreturn);
+
+ /* Create siginfo. */
+ err |= copy_siginfo_to_user(&frame->rs_info, info);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/smp.c linux_HEAD/arch/mips/kernel/smp.c
+--- linux-2.6.12/arch/mips/kernel/smp.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/smp.c 2005-04-13 19:06:33.000000000 +0200
@@ -121,7 +121,19 @@ struct call_data_struct *call_data;
* or are or have executed.
*
@@ -17504,7 +24299,15 @@
*/
int smp_call_function (void (*func) (void *info), void *info, int retry,
int wait)
-@@ -236,23 +248,28 @@ void __devinit smp_prepare_boot_cpu(void
+@@ -214,7 +226,6 @@ void __init smp_cpus_done(unsigned int m
+ /* called from main before smp_init() */
+ void __init smp_prepare_cpus(unsigned int max_cpus)
+ {
+- cpu_data[0].udelay_val = loops_per_jiffy;
+ init_new_context(current, &init_mm);
+ current_thread_info()->cpu = 0;
+ smp_tune_scheduling();
+@@ -236,23 +247,28 @@ void __devinit smp_prepare_boot_cpu(void
}
/*
@@ -17537,7 +24340,7 @@
while (!cpu_isset(cpu, cpu_callin_map))
udelay(100);
-@@ -261,23 +278,6 @@ static int __init do_boot_cpu(int cpu)
+@@ -261,23 +277,6 @@ static int __init do_boot_cpu(int cpu)
return 0;
}
@@ -17561,10 +24364,18 @@
/* Not really SMP stuff ... */
int setup_profiling_timer(unsigned int multiplier)
{
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/syscall.c linux_HEAD/arch/mips/kernel/syscall.c
---- linux-2.6.11.6/arch/mips/kernel/syscall.c 2005-03-26 04:28:26.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/syscall.c 2005-03-28 22:55:50.000000000 +0200
-@@ -26,6 +26,7 @@
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/syscall.c linux_HEAD/arch/mips/kernel/syscall.c
+--- linux-2.6.12/arch/mips/kernel/syscall.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/syscall.c 2005-07-01 12:09:18.000000000 +0200
+@@ -7,6 +7,7 @@
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 MIPS Technologies, Inc.
+ */
++#include <linux/config.h>
+ #include <linux/a.out.h>
+ #include <linux/errno.h>
+ #include <linux/linkage.h>
+@@ -26,6 +27,7 @@
#include <linux/msg.h>
#include <linux/shm.h>
#include <linux/compiler.h>
@@ -17572,7 +24383,7 @@
#include <asm/branch.h>
#include <asm/cachectl.h>
-@@ -56,6 +57,8 @@ out:
+@@ -56,6 +58,8 @@ out:
unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
@@ -17581,11 +24392,1354 @@
#define COLOUR_ALIGN(addr,pgoff) \
((((addr) + shm_align_mask) & ~shm_align_mask) + \
(((pgoff) << PAGE_SHIFT) & shm_align_mask))
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/traps.c linux_HEAD/arch/mips/kernel/traps.c
---- linux-2.6.11.6/arch/mips/kernel/traps.c 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/traps.c 2005-03-01 22:49:39.000000000 +0100
-@@ -339,9 +339,9 @@ asmlinkage void do_be(struct pt_regs *re
+@@ -173,14 +177,28 @@ _sys_clone(nabi_no_regargs struct pt_reg
+ {
+ unsigned long clone_flags;
+ unsigned long newsp;
+- int *parent_tidptr, *child_tidptr;
++ int __user *parent_tidptr, *child_tidptr;
+ clone_flags = regs.regs[4];
+ newsp = regs.regs[5];
+ if (!newsp)
+ newsp = regs.regs[29];
+- parent_tidptr = (int *) regs.regs[6];
+- child_tidptr = (int *) regs.regs[7];
++ parent_tidptr = (int __user *) regs.regs[6];
++#ifdef CONFIG_MIPS32
++ /* We need to fetch the fifth argument off the stack. */
++ child_tidptr = NULL;
++ if (clone_flags & (CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID)) {
++ int __user *__user *usp = (int __user *__user *) regs.regs[29];
++ if (regs.regs[2] == __NR_syscall) {
++ if (get_user (child_tidptr, &usp[5]))
++ return -EFAULT;
++ }
++ else if (get_user (child_tidptr, &usp[4]))
++ return -EFAULT;
++ }
++#else
++ child_tidptr = (int __user *) regs.regs[8];
++#endif
+ return do_fork(clone_flags, newsp, ®s, 0,
+ parent_tidptr, child_tidptr);
+ }
+@@ -242,6 +260,16 @@ asmlinkage int sys_olduname(struct oldol
+ return error;
+ }
+
++void sys_set_thread_area(unsigned long addr)
++{
++ struct thread_info *ti = current->thread_info;
++
++ ti->tp_value = addr;
++
++ /* If some future MIPS implementation has this register in hardware,
++ * we will need to update it here (and in context switches). */
++}
++
+ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
+ {
+ int tmp, len;
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/sysirix.c linux_HEAD/arch/mips/kernel/sysirix.c
+--- linux-2.6.12/arch/mips/kernel/sysirix.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/sysirix.c 2005-03-17 22:20:26.000000000 +0100
+@@ -73,32 +73,30 @@ asmlinkage int irix_sysmp(struct pt_regs
+ }
+
+ /* The prctl commands. */
+-#define PR_MAXPROCS 1 /* Tasks/user. */
+-#define PR_ISBLOCKED 2 /* If blocked, return 1. */
+-#define PR_SETSTACKSIZE 3 /* Set largest task stack size. */
+-#define PR_GETSTACKSIZE 4 /* Get largest task stack size. */
+-#define PR_MAXPPROCS 5 /* Num parallel tasks. */
+-#define PR_UNBLKONEXEC 6 /* When task exec/exit's, unblock. */
+-#define PR_SETEXITSIG 8 /* When task exit's, set signal. */
+-#define PR_RESIDENT 9 /* Make task unswappable. */
+-#define PR_ATTACHADDR 10 /* (Re-)Connect a vma to a task. */
+-#define PR_DETACHADDR 11 /* Disconnect a vma from a task. */
+-#define PR_TERMCHILD 12 /* When parent sleeps with fishes, kill child. */
+-#define PR_GETSHMASK 13 /* Get the sproc() share mask. */
+-#define PR_GETNSHARE 14 /* Number of share group members. */
+-#define PR_COREPID 15 /* Add task pid to name when it core. */
+-#define PR_ATTACHADDRPERM 16 /* (Re-)Connect vma, with specified prot. */
+-#define PR_PTHREADEXIT 17 /* Kill a pthread without prejudice. */
++#define PR_MAXPROCS 1 /* Tasks/user. */
++#define PR_ISBLOCKED 2 /* If blocked, return 1. */
++#define PR_SETSTACKSIZE 3 /* Set largest task stack size. */
++#define PR_GETSTACKSIZE 4 /* Get largest task stack size. */
++#define PR_MAXPPROCS 5 /* Num parallel tasks. */
++#define PR_UNBLKONEXEC 6 /* When task exec/exit's, unblock. */
++#define PR_SETEXITSIG 8 /* When task exit's, set signal. */
++#define PR_RESIDENT 9 /* Make task unswappable. */
++#define PR_ATTACHADDR 10 /* (Re-)Connect a vma to a task. */
++#define PR_DETACHADDR 11 /* Disconnect a vma from a task. */
++#define PR_TERMCHILD 12 /* Kill child if the parent dies. */
++#define PR_GETSHMASK 13 /* Get the sproc() share mask. */
++#define PR_GETNSHARE 14 /* Number of share group members. */
++#define PR_COREPID 15 /* Add task pid to name when it core. */
++#define PR_ATTACHADDRPERM 16 /* (Re-)Connect vma, with specified prot. */
++#define PR_PTHREADEXIT 17 /* Kill a pthread, only for IRIX 6.[234] */
+
+-asmlinkage int irix_prctl(struct pt_regs *regs)
++asmlinkage int irix_prctl(unsigned option, ...)
+ {
+- unsigned long cmd;
+- int error = 0, base = 0;
++ va_list args;
++ int error = 0;
+
+- if (regs->regs[2] == 1000)
+- base = 1;
+- cmd = regs->regs[base + 4];
+- switch (cmd) {
++ va_start(args, option);
++ switch (option) {
+ case PR_MAXPROCS:
+ printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n",
+ current->comm, current->pid);
+@@ -111,7 +109,7 @@ asmlinkage int irix_prctl(struct pt_regs
+ printk("irix_prctl[%s:%d]: Wants PR_ISBLOCKED\n",
+ current->comm, current->pid);
+ read_lock(&tasklist_lock);
+- task = find_task_by_pid(regs->regs[base + 5]);
++ task = find_task_by_pid(va_arg(args, pid_t));
+ error = -ESRCH;
+ if (error)
+ error = (task->run_list.next != NULL);
+@@ -121,7 +119,7 @@ asmlinkage int irix_prctl(struct pt_regs
+ }
+
+ case PR_SETSTACKSIZE: {
+- long value = regs->regs[base + 5];
++ long value = va_arg(args, long);
+
+ printk("irix_prctl[%s:%d]: Wants PR_SETSTACKSIZE<%08lx>\n",
+ current->comm, current->pid, (unsigned long) value);
+@@ -222,24 +220,20 @@ asmlinkage int irix_prctl(struct pt_regs
+ error = -EINVAL;
+ break;
+
+- case PR_PTHREADEXIT:
+- printk("irix_prctl[%s:%d]: Wants PR_PTHREADEXIT\n",
+- current->comm, current->pid);
+- do_exit(regs->regs[base + 5]);
+-
+ default:
+ printk("irix_prctl[%s:%d]: Non-existant opcode %d\n",
+- current->comm, current->pid, (int)cmd);
++ current->comm, current->pid, option);
+ error = -EINVAL;
+ break;
+ }
++ va_end(args);
+
+ return error;
+ }
+
+ #undef DEBUG_PROCGRPS
+
+-extern unsigned long irix_mapelf(int fd, struct elf_phdr *user_phdrp, int cnt);
++extern unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt);
+ extern int getrusage(struct task_struct *p, int who, struct rusage __user *ru);
+ extern char *prom_getenv(char *name);
+ extern long prom_setenv(char *name, char *value);
+@@ -276,23 +270,19 @@ asmlinkage int irix_syssgi(struct pt_reg
+ cmd = regs->regs[base + 4];
+ switch(cmd) {
+ case SGI_SYSID: {
+- char *buf = (char *) regs->regs[base + 5];
++ char __user *buf = (char __user *) regs->regs[base + 5];
+
+ /* XXX Use ethernet addr.... */
+- retval = clear_user(buf, 64);
++ retval = clear_user(buf, 64) ? -EFAULT : 0;
+ break;
+ }
+ #if 0
+ case SGI_RDNAME: {
+ int pid = (int) regs->regs[base + 5];
+- char *buf = (char *) regs->regs[base + 6];
++ char __user *buf = (char *) regs->regs[base + 6];
+ struct task_struct *p;
+ char tcomm[sizeof(current->comm)];
+
+- if (!access_ok(VERIFY_WRITE, buf, sizeof(tcomm))) {
+- retval = -EFAULT;
+- break;
+- }
+ read_lock(&tasklist_lock);
+ p = find_task_by_pid(pid);
+ if (!p) {
+@@ -304,34 +294,28 @@ asmlinkage int irix_syssgi(struct pt_reg
+ read_unlock(&tasklist_lock);
+
+ /* XXX Need to check sizes. */
+- copy_to_user(buf, tcomm, sizeof(tcomm));
+- retval = 0;
++ retval = copy_to_user(buf, tcomm, sizeof(tcomm)) ? -EFAULT : 0;
+ break;
+ }
+
+ case SGI_GETNVRAM: {
+- char *name = (char *) regs->regs[base+5];
+- char *buf = (char *) regs->regs[base+6];
++ char __user *name = (char __user *) regs->regs[base+5];
++ char __user *buf = (char __user *) regs->regs[base+6];
+ char *value;
+ return -EINVAL; /* til I fix it */
+- if (!access_ok(VERIFY_WRITE, buf, 128)) {
+- retval = -EFAULT;
+- break;
+- }
+ value = prom_getenv(name); /* PROM lock? */
+ if (!value) {
+ retval = -EINVAL;
+ break;
+ }
+ /* Do I strlen() for the length? */
+- copy_to_user(buf, value, 128);
+- retval = 0;
++ retval = copy_to_user(buf, value, 128) ? -EFAULT : 0;
+ break;
+ }
+
+ case SGI_SETNVRAM: {
+- char *name = (char *) regs->regs[base+5];
+- char *value = (char *) regs->regs[base+6];
++ char __user *name = (char __user *) regs->regs[base+5];
++ char __user *value = (char __user *) regs->regs[base+6];
+ return -EINVAL; /* til I fix it */
+ retval = prom_setenv(name, value);
+ /* XXX make sure retval conforms to syssgi(2) */
+@@ -407,16 +391,16 @@ asmlinkage int irix_syssgi(struct pt_reg
+
+ case SGI_SETGROUPS:
+ retval = sys_setgroups((int) regs->regs[base + 5],
+- (gid_t *) regs->regs[base + 6]);
++ (gid_t __user *) regs->regs[base + 6]);
+ break;
+
+ case SGI_GETGROUPS:
+ retval = sys_getgroups((int) regs->regs[base + 5],
+- (gid_t *) regs->regs[base + 6]);
++ (gid_t __user *) regs->regs[base + 6]);
+ break;
+
+ case SGI_RUSAGE: {
+- struct rusage *ru = (struct rusage *) regs->regs[base + 6];
++ struct rusage __user *ru = (struct rusage __user *) regs->regs[base + 6];
+
+ switch((int) regs->regs[base + 5]) {
+ case 0:
+@@ -453,7 +437,7 @@ asmlinkage int irix_syssgi(struct pt_reg
+
+ case SGI_ELFMAP:
+ retval = irix_mapelf((int) regs->regs[base + 5],
+- (struct elf_phdr *) regs->regs[base + 6],
++ (struct elf_phdr __user *) regs->regs[base + 6],
+ (int) regs->regs[base + 7]);
+ break;
+
+@@ -468,24 +452,24 @@ asmlinkage int irix_syssgi(struct pt_reg
+
+ case SGI_PHYSP: {
+ unsigned long addr = regs->regs[base + 5];
+- int *pageno = (int *) (regs->regs[base + 6]);
++ int __user *pageno = (int __user *) (regs->regs[base + 6]);
+ struct mm_struct *mm = current->mm;
+ pgd_t *pgdp;
++ pud_t *pudp;
+ pmd_t *pmdp;
+ pte_t *ptep;
+
+- if (!access_ok(VERIFY_WRITE, pageno, sizeof(int)))
+- return -EFAULT;
+-
+ down_read(&mm->mmap_sem);
+ pgdp = pgd_offset(mm, addr);
+- pmdp = pmd_offset(pgdp, addr);
++ pudp = pud_offset(pgdp, addr);
++ pmdp = pmd_offset(pudp, addr);
+ ptep = pte_offset(pmdp, addr);
+ retval = -EINVAL;
+ if (ptep) {
+ pte_t pte = *ptep;
+
+ if (pte_val(pte) & (_PAGE_VALID | _PAGE_PRESENT)) {
++ /* b0rked on 64-bit */
+ retval = put_user((pte_val(pte) & PAGE_MASK) >>
+ PAGE_SHIFT, pageno);
+ }
+@@ -496,7 +480,7 @@ asmlinkage int irix_syssgi(struct pt_reg
+
+ case SGI_INVENT: {
+ int arg1 = (int) regs->regs [base + 5];
+- void *buffer = (void *) regs->regs [base + 6];
++ void __user *buffer = (void __user *) regs->regs [base + 6];
+ int count = (int) regs->regs [base + 7];
+
+ switch (arg1) {
+@@ -700,8 +684,8 @@ asmlinkage int irix_pause(void)
+ }
+
+ /* XXX need more than this... */
+-asmlinkage int irix_mount(char *dev_name, char *dir_name, unsigned long flags,
+- char *type, void *data, int datalen)
++asmlinkage int irix_mount(char __user *dev_name, char __user *dir_name,
++ unsigned long flags, char __user *type, void __user *data, int datalen)
+ {
+ printk("[%s:%d] irix_mount(%p,%p,%08lx,%p,%p,%d)\n",
+ current->comm, current->pid,
+@@ -716,8 +700,8 @@ struct irix_statfs {
+ char f_fname[6], f_fpack[6];
+ };
+
+-asmlinkage int irix_statfs(const char *path, struct irix_statfs *buf,
+- int len, int fs_type)
++asmlinkage int irix_statfs(const char __user *path,
++ struct irix_statfs __user *buf, int len, int fs_type)
+ {
+ struct nameidata nd;
+ struct kstatfs kbuf;
+@@ -732,6 +716,7 @@ asmlinkage int irix_statfs(const char *p
+ error = -EFAULT;
+ goto out;
+ }
++
+ error = user_path_walk(path, &nd);
+ if (error)
+ goto out;
+@@ -740,18 +725,17 @@ asmlinkage int irix_statfs(const char *p
+ if (error)
+ goto dput_and_out;
+
+- __put_user(kbuf.f_type, &buf->f_type);
+- __put_user(kbuf.f_bsize, &buf->f_bsize);
+- __put_user(kbuf.f_frsize, &buf->f_frsize);
+- __put_user(kbuf.f_blocks, &buf->f_blocks);
+- __put_user(kbuf.f_bfree, &buf->f_bfree);
+- __put_user(kbuf.f_files, &buf->f_files);
+- __put_user(kbuf.f_ffree, &buf->f_ffree);
++ error = __put_user(kbuf.f_type, &buf->f_type);
++ error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
++ error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
++ error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
++ error |= __put_user(kbuf.f_files, &buf->f_files);
++ error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
+ for (i = 0; i < 6; i++) {
+- __put_user(0, &buf->f_fname[i]);
+- __put_user(0, &buf->f_fpack[i]);
++ error |= __put_user(0, &buf->f_fname[i]);
++ error |= __put_user(0, &buf->f_fpack[i]);
+ }
+- error = 0;
+
+ dput_and_out:
+ path_release(&nd);
+@@ -759,7 +743,7 @@ out:
+ return error;
+ }
+
+-asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs *buf)
++asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs __user *buf)
+ {
+ struct kstatfs kbuf;
+ struct file *file;
+@@ -769,6 +753,7 @@ asmlinkage int irix_fstatfs(unsigned int
+ error = -EFAULT;
+ goto out;
+ }
++
+ if (!(file = fget(fd))) {
+ error = -EBADF;
+ goto out;
+@@ -778,16 +763,17 @@ asmlinkage int irix_fstatfs(unsigned int
+ if (error)
+ goto out_f;
+
+- __put_user(kbuf.f_type, &buf->f_type);
+- __put_user(kbuf.f_bsize, &buf->f_bsize);
+- __put_user(kbuf.f_frsize, &buf->f_frsize);
+- __put_user(kbuf.f_blocks, &buf->f_blocks);
+- __put_user(kbuf.f_bfree, &buf->f_bfree);
+- __put_user(kbuf.f_files, &buf->f_files);
+- __put_user(kbuf.f_ffree, &buf->f_ffree);
+- for(i = 0; i < 6; i++) {
+- __put_user(0, &buf->f_fname[i]);
+- __put_user(0, &buf->f_fpack[i]);
++ error = __put_user(kbuf.f_type, &buf->f_type);
++ error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
++ error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
++ error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
++ error |= __put_user(kbuf.f_files, &buf->f_files);
++ error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
++
++ for (i = 0; i < 6; i++) {
++ error |= __put_user(0, &buf->f_fname[i]);
++ error |= __put_user(0, &buf->f_fpack[i]);
+ }
+
+ out_f:
+@@ -814,14 +800,15 @@ asmlinkage int irix_setpgrp(int flags)
+ return error;
+ }
+
+-asmlinkage int irix_times(struct tms * tbuf)
++asmlinkage int irix_times(struct tms __user *tbuf)
+ {
+ int err = 0;
+
+ if (tbuf) {
+ if (!access_ok(VERIFY_WRITE,tbuf,sizeof *tbuf))
+ return -EFAULT;
+- err |= __put_user(current->utime, &tbuf->tms_utime);
++
++ err = __put_user(current->utime, &tbuf->tms_utime);
+ err |= __put_user(current->stime, &tbuf->tms_stime);
+ err |= __put_user(current->signal->cutime, &tbuf->tms_cutime);
+ err |= __put_user(current->signal->cstime, &tbuf->tms_cstime);
+@@ -837,13 +824,13 @@ asmlinkage int irix_exec(struct pt_regs
+
+ if(regs->regs[2] == 1000)
+ base = 1;
+- filename = getname((char *) (long)regs->regs[base + 4]);
++ filename = getname((char __user *) (long)regs->regs[base + 4]);
+ error = PTR_ERR(filename);
+ if (IS_ERR(filename))
+ return error;
+
+- error = do_execve(filename, (char **) (long)regs->regs[base + 5],
+- (char **) 0, regs);
++ error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
++ NULL, regs);
+ putname(filename);
+
+ return error;
+@@ -856,12 +843,12 @@ asmlinkage int irix_exece(struct pt_regs
+
+ if (regs->regs[2] == 1000)
+ base = 1;
+- filename = getname((char *) (long)regs->regs[base + 4]);
++ filename = getname((char __user *) (long)regs->regs[base + 4]);
+ error = PTR_ERR(filename);
+ if (IS_ERR(filename))
+ return error;
+- error = do_execve(filename, (char **) (long)regs->regs[base + 5],
+- (char **) (long)regs->regs[base + 6], regs);
++ error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
++ (char __user * __user *) (long)regs->regs[base + 6], regs);
+ putname(filename);
+
+ return error;
+@@ -917,22 +904,17 @@ asmlinkage int irix_socket(int family, i
+ return sys_socket(family, type, protocol);
+ }
+
+-asmlinkage int irix_getdomainname(char *name, int len)
++asmlinkage int irix_getdomainname(char __user *name, int len)
+ {
+- int error;
+-
+- if (!access_ok(VERIFY_WRITE, name, len))
+- return -EFAULT;
++ int err;
+
+ down_read(&uts_sem);
+ if (len > __NEW_UTS_LEN)
+ len = __NEW_UTS_LEN;
+- error = 0;
+- if (copy_to_user(name, system_utsname.domainname, len))
+- error = -EFAULT;
++ err = copy_to_user(name, system_utsname.domainname, len) ? -EFAULT : 0;
+ up_read(&uts_sem);
+
+- return error;
++ return err;
+ }
+
+ asmlinkage unsigned long irix_getpagesize(void)
+@@ -948,12 +930,13 @@ asmlinkage int irix_msgsys(int opcode, u
+ case 0:
+ return sys_msgget((key_t) arg0, (int) arg1);
+ case 1:
+- return sys_msgctl((int) arg0, (int) arg1, (struct msqid_ds *)arg2);
++ return sys_msgctl((int) arg0, (int) arg1,
++ (struct msqid_ds __user *)arg2);
+ case 2:
+- return sys_msgrcv((int) arg0, (struct msgbuf *) arg1,
++ return sys_msgrcv((int) arg0, (struct msgbuf __user *) arg1,
+ (size_t) arg2, (long) arg3, (int) arg4);
+ case 3:
+- return sys_msgsnd((int) arg0, (struct msgbuf *) arg1,
++ return sys_msgsnd((int) arg0, (struct msgbuf __user *) arg1,
+ (size_t) arg2, (int) arg3);
+ default:
+ return -EINVAL;
+@@ -965,12 +948,13 @@ asmlinkage int irix_shmsys(int opcode, u
+ {
+ switch (opcode) {
+ case 0:
+- return do_shmat((int) arg0, (char *)arg1, (int) arg2,
++ return do_shmat((int) arg0, (char __user *) arg1, (int) arg2,
+ (unsigned long *) arg3);
+ case 1:
+- return sys_shmctl((int)arg0, (int)arg1, (struct shmid_ds *)arg2);
++ return sys_shmctl((int)arg0, (int)arg1,
++ (struct shmid_ds __user *)arg2);
+ case 2:
+- return sys_shmdt((char *)arg0);
++ return sys_shmdt((char __user *)arg0);
+ case 3:
+ return sys_shmget((key_t) arg0, (int) arg1, (int) arg2);
+ default:
+@@ -988,7 +972,7 @@ asmlinkage int irix_semsys(int opcode, u
+ case 1:
+ return sys_semget((key_t) arg0, (int) arg1, (int) arg2);
+ case 2:
+- return sys_semop((int) arg0, (struct sembuf *)arg1,
++ return sys_semop((int) arg0, (struct sembuf __user *)arg1,
+ (unsigned int) arg2);
+ default:
+ return -EINVAL;
+@@ -1006,15 +990,16 @@ static inline loff_t llseek(struct file
+ lock_kernel();
+ retval = fn(file, offset, origin);
+ unlock_kernel();
++
+ return retval;
+ }
+
+ asmlinkage int irix_lseek64(int fd, int _unused, int offhi, int offlow,
+ int origin)
+ {
+- int retval;
+ struct file * file;
+ loff_t offset;
++ int retval;
+
+ retval = -EBADF;
+ file = fget(fd);
+@@ -1040,12 +1025,12 @@ asmlinkage int irix_sginap(int ticks)
+ return 0;
+ }
+
+-asmlinkage int irix_sgikopt(char *istring, char *ostring, int len)
++asmlinkage int irix_sgikopt(char __user *istring, char __user *ostring, int len)
+ {
+ return -EINVAL;
+ }
+
+-asmlinkage int irix_gettimeofday(struct timeval *tv)
++asmlinkage int irix_gettimeofday(struct timeval __user *tv)
+ {
+ time_t sec;
+ long nsec, seq;
+@@ -1086,7 +1071,7 @@ asmlinkage unsigned long irix_mmap32(uns
+
+ if (max_size > file->f_dentry->d_inode->i_size) {
+ old_pos = sys_lseek (fd, max_size - 1, 0);
+- sys_write (fd, "", 1);
++ sys_write (fd, (void __user *) "", 1);
+ sys_lseek (fd, old_pos, 0);
+ }
+ }
+@@ -1111,7 +1096,7 @@ asmlinkage int irix_madvise(unsigned lon
+ return -EINVAL;
+ }
+
+-asmlinkage int irix_pagelock(char *addr, int len, int op)
++asmlinkage int irix_pagelock(char __user *addr, int len, int op)
+ {
+ printk("[%s:%d] Wheee.. irix_pagelock(%p,%d,%d)\n",
+ current->comm, current->pid, addr, len, op);
+@@ -1151,7 +1136,7 @@ asmlinkage int irix_BSDsetpgrp(int pid,
+ return error;
+ }
+
+-asmlinkage int irix_systeminfo(int cmd, char *buf, int cnt)
++asmlinkage int irix_systeminfo(int cmd, char __user *buf, int cnt)
+ {
+ printk("[%s:%d] Wheee.. irix_systeminfo(%d,%p,%d)\n",
+ current->comm, current->pid, cmd, buf, cnt);
+@@ -1167,14 +1152,14 @@ struct iuname {
+ char _unused3[257], _unused4[257], _unused5[257];
+ };
+
+-asmlinkage int irix_uname(struct iuname *buf)
++asmlinkage int irix_uname(struct iuname __user *buf)
+ {
+ down_read(&uts_sem);
+- if (copy_to_user(system_utsname.sysname, buf->sysname, 65)
+- || copy_to_user(system_utsname.nodename, buf->nodename, 65)
+- || copy_to_user(system_utsname.release, buf->release, 65)
+- || copy_to_user(system_utsname.version, buf->version, 65)
+- || copy_to_user(system_utsname.machine, buf->machine, 65)) {
++ if (copy_from_user(system_utsname.sysname, buf->sysname, 65)
++ || copy_from_user(system_utsname.nodename, buf->nodename, 65)
++ || copy_from_user(system_utsname.release, buf->release, 65)
++ || copy_from_user(system_utsname.version, buf->version, 65)
++ || copy_from_user(system_utsname.machine, buf->machine, 65)) {
+ return -EFAULT;
+ }
+ up_read(&uts_sem);
+@@ -1184,7 +1169,7 @@ asmlinkage int irix_uname(struct iuname
+
+ #undef DEBUG_XSTAT
+
+-static int irix_xstat32_xlate(struct kstat *stat, void *ubuf)
++static int irix_xstat32_xlate(struct kstat *stat, void __user *ubuf)
+ {
+ struct xstat32 {
+ u32 st_dev, st_pad1[3], st_ino, st_mode, st_nlink, st_uid, st_gid;
+@@ -1224,7 +1209,7 @@ static int irix_xstat32_xlate(struct kst
+ return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0;
+ }
+
+-static int irix_xstat64_xlate(struct kstat *stat, void *ubuf)
++static int irix_xstat64_xlate(struct kstat *stat, void __user *ubuf)
+ {
+ struct xstat64 {
+ u32 st_dev; s32 st_pad1[3];
+@@ -1274,7 +1259,7 @@ static int irix_xstat64_xlate(struct kst
+ return copy_to_user(ubuf, &ks, sizeof(ks)) ? -EFAULT : 0;
+ }
+
+-asmlinkage int irix_xstat(int version, char *filename, struct stat *statbuf)
++asmlinkage int irix_xstat(int version, char __user *filename, struct stat __user *statbuf)
+ {
+ int retval;
+ struct kstat stat;
+@@ -1300,7 +1285,7 @@ asmlinkage int irix_xstat(int version, c
+ return retval;
+ }
+
+-asmlinkage int irix_lxstat(int version, char *filename, struct stat *statbuf)
++asmlinkage int irix_lxstat(int version, char __user *filename, struct stat __user *statbuf)
+ {
+ int error;
+ struct kstat stat;
+@@ -1327,7 +1312,7 @@ asmlinkage int irix_lxstat(int version,
+ return error;
+ }
+
+-asmlinkage int irix_fxstat(int version, int fd, struct stat *statbuf)
++asmlinkage int irix_fxstat(int version, int fd, struct stat __user *statbuf)
+ {
+ int error;
+ struct kstat stat;
+@@ -1353,7 +1338,7 @@ asmlinkage int irix_fxstat(int version,
+ return error;
+ }
+
+-asmlinkage int irix_xmknod(int ver, char *filename, int mode, unsigned dev)
++asmlinkage int irix_xmknod(int ver, char __user *filename, int mode, unsigned dev)
+ {
+ int retval;
+ printk("[%s:%d] Wheee.. irix_xmknod(%d,%s,%x,%x)\n",
+@@ -1373,7 +1358,7 @@ asmlinkage int irix_xmknod(int ver, char
+ return retval;
+ }
+
+-asmlinkage int irix_swapctl(int cmd, char *arg)
++asmlinkage int irix_swapctl(int cmd, char __user *arg)
+ {
+ printk("[%s:%d] Wheee.. irix_swapctl(%d,%p)\n",
+ current->comm, current->pid, cmd, arg);
+@@ -1389,7 +1374,7 @@ struct irix_statvfs {
+ char f_fstr[32]; u32 f_filler[16];
+ };
+
+-asmlinkage int irix_statvfs(char *fname, struct irix_statvfs *buf)
++asmlinkage int irix_statvfs(char __user *fname, struct irix_statvfs __user *buf)
+ {
+ struct nameidata nd;
+ struct kstatfs kbuf;
+@@ -1397,10 +1382,9 @@ asmlinkage int irix_statvfs(char *fname,
+
+ printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n",
+ current->comm, current->pid, fname, buf);
+- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs))) {
+- error = -EFAULT;
+- goto out;
+- }
++ if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
++ return -EFAULT;
++
+ error = user_path_walk(fname, &nd);
+ if (error)
+ goto out;
+@@ -1408,27 +1392,25 @@ asmlinkage int irix_statvfs(char *fname,
+ if (error)
+ goto dput_and_out;
+
+- __put_user(kbuf.f_bsize, &buf->f_bsize);
+- __put_user(kbuf.f_frsize, &buf->f_frsize);
+- __put_user(kbuf.f_blocks, &buf->f_blocks);
+- __put_user(kbuf.f_bfree, &buf->f_bfree);
+- __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
+- __put_user(kbuf.f_files, &buf->f_files);
+- __put_user(kbuf.f_ffree, &buf->f_ffree);
+- __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
++ error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
++ error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
++ error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
++ error |= __put_user(kbuf.f_files, &buf->f_files);
++ error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
++ error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
+ #ifdef __MIPSEB__
+- __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
++ error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
+ #else
+- __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
++ error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
+ #endif
+ for (i = 0; i < 16; i++)
+- __put_user(0, &buf->f_basetype[i]);
+- __put_user(0, &buf->f_flag);
+- __put_user(kbuf.f_namelen, &buf->f_namemax);
++ error |= __put_user(0, &buf->f_basetype[i]);
++ error |= __put_user(0, &buf->f_flag);
++ error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
+ for (i = 0; i < 32; i++)
+- __put_user(0, &buf->f_fstr[i]);
+-
+- error = 0;
++ error |= __put_user(0, &buf->f_fstr[i]);
+
+ dput_and_out:
+ path_release(&nd);
+@@ -1436,7 +1418,7 @@ out:
+ return error;
+ }
+
+-asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs *buf)
++asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs __user *buf)
+ {
+ struct kstatfs kbuf;
+ struct file *file;
+@@ -1445,10 +1427,9 @@ asmlinkage int irix_fstatvfs(int fd, str
+ printk("[%s:%d] Wheee.. irix_fstatvfs(%d,%p)\n",
+ current->comm, current->pid, fd, buf);
+
+- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs))) {
+- error = -EFAULT;
+- goto out;
+- }
++ if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
++ return -EFAULT;
++
+ if (!(file = fget(fd))) {
+ error = -EBADF;
+ goto out;
+@@ -1457,24 +1438,24 @@ asmlinkage int irix_fstatvfs(int fd, str
+ if (error)
+ goto out_f;
+
+- __put_user(kbuf.f_bsize, &buf->f_bsize);
+- __put_user(kbuf.f_frsize, &buf->f_frsize);
+- __put_user(kbuf.f_blocks, &buf->f_blocks);
+- __put_user(kbuf.f_bfree, &buf->f_bfree);
+- __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
+- __put_user(kbuf.f_files, &buf->f_files);
+- __put_user(kbuf.f_ffree, &buf->f_ffree);
+- __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
++ error = __put_user(kbuf.f_bsize, &buf->f_bsize);
++ error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
++ error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
++ error |= __put_user(kbuf.f_files, &buf->f_files);
++ error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
++ error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
+ #ifdef __MIPSEB__
+- __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
++ error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
+ #else
+- __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
++ error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
+ #endif
+ for(i = 0; i < 16; i++)
+- __put_user(0, &buf->f_basetype[i]);
+- __put_user(0, &buf->f_flag);
+- __put_user(kbuf.f_namelen, &buf->f_namemax);
+- __clear_user(&buf->f_fstr, sizeof(buf->f_fstr));
++ error |= __put_user(0, &buf->f_basetype[i]);
++ error |= __put_user(0, &buf->f_flag);
++ error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
++ error |= __clear_user(&buf->f_fstr, sizeof(buf->f_fstr)) ? -EFAULT : 0;
+
+ out_f:
+ fput(file);
+@@ -1498,7 +1479,7 @@ asmlinkage int irix_sigqueue(int pid, in
+ return -EINVAL;
+ }
+
+-asmlinkage int irix_truncate64(char *name, int pad, int size1, int size2)
++asmlinkage int irix_truncate64(char __user *name, int pad, int size1, int size2)
+ {
+ int retval;
+
+@@ -1531,6 +1512,7 @@ asmlinkage int irix_mmap64(struct pt_reg
+ int len, prot, flags, fd, off1, off2, error, base = 0;
+ unsigned long addr, pgoff, *sp;
+ struct file *file = NULL;
++ int err;
+
+ if (regs->regs[2] == 1000)
+ base = 1;
+@@ -1540,36 +1522,31 @@ asmlinkage int irix_mmap64(struct pt_reg
+ prot = regs->regs[base + 6];
+ if (!base) {
+ flags = regs->regs[base + 7];
+- if (!access_ok(VERIFY_READ, sp, (4 * sizeof(unsigned long)))) {
+- error = -EFAULT;
+- goto out;
+- }
++ if (!access_ok(VERIFY_READ, sp, (4 * sizeof(unsigned long))))
++ return -EFAULT;
+ fd = sp[0];
+- __get_user(off1, &sp[1]);
+- __get_user(off2, &sp[2]);
++ err = __get_user(off1, &sp[1]);
++ err |= __get_user(off2, &sp[2]);
+ } else {
+- if (!access_ok(VERIFY_READ, sp, (5 * sizeof(unsigned long)))) {
+- error = -EFAULT;
+- goto out;
+- }
+- __get_user(flags, &sp[0]);
+- __get_user(fd, &sp[1]);
+- __get_user(off1, &sp[2]);
+- __get_user(off2, &sp[3]);
++ if (!access_ok(VERIFY_READ, sp, (5 * sizeof(unsigned long))))
++ return -EFAULT;
++ err = __get_user(flags, &sp[0]);
++ err |= __get_user(fd, &sp[1]);
++ err |= __get_user(off1, &sp[2]);
++ err |= __get_user(off2, &sp[3]);
+ }
+
+- if (off1 & PAGE_MASK) {
+- error = -EOVERFLOW;
+- goto out;
+- }
++ if (err)
++ return err;
++
++ if (off1 & PAGE_MASK)
++ return -EOVERFLOW;
+
+ pgoff = (off1 << (32 - PAGE_SHIFT)) | (off2 >> PAGE_SHIFT);
+
+ if (!(flags & MAP_ANONYMOUS)) {
+- if (!(file = fget(fd))) {
+- error = -EBADF;
+- goto out;
+- }
++ if (!(file = fget(fd)))
++ return -EBADF;
+
+ /* Ok, bad taste hack follows, try to think in something else
+ when reading this */
+@@ -1579,7 +1556,7 @@ asmlinkage int irix_mmap64(struct pt_reg
+
+ if (max_size > file->f_dentry->d_inode->i_size) {
+ old_pos = sys_lseek (fd, max_size - 1, 0);
+- sys_write (fd, "", 1);
++ sys_write (fd, (void __user *) "", 1);
+ sys_lseek (fd, old_pos, 0);
+ }
+ }
+@@ -1594,7 +1571,6 @@ asmlinkage int irix_mmap64(struct pt_reg
+ if (file)
+ fput(file);
+
+-out:
+ return error;
+ }
+
+@@ -1606,7 +1582,7 @@ asmlinkage int irix_dmi(struct pt_regs *
+ return -EINVAL;
+ }
+
+-asmlinkage int irix_pread(int fd, char *buf, int cnt, int off64,
++asmlinkage int irix_pread(int fd, char __user *buf, int cnt, int off64,
+ int off1, int off2)
+ {
+ printk("[%s:%d] Wheee.. irix_pread(%d,%p,%d,%d,%d,%d)\n",
+@@ -1615,7 +1591,7 @@ asmlinkage int irix_pread(int fd, char *
+ return -EINVAL;
+ }
+
+-asmlinkage int irix_pwrite(int fd, char *buf, int cnt, int off64,
++asmlinkage int irix_pwrite(int fd, char __user *buf, int cnt, int off64,
+ int off1, int off2)
+ {
+ printk("[%s:%d] Wheee.. irix_pwrite(%d,%p,%d,%d,%d,%d)\n",
+@@ -1647,7 +1623,7 @@ struct irix_statvfs64 {
+ u32 f_filler[16];
+ };
+
+-asmlinkage int irix_statvfs64(char *fname, struct irix_statvfs64 *buf)
++asmlinkage int irix_statvfs64(char __user *fname, struct irix_statvfs64 __user *buf)
+ {
+ struct nameidata nd;
+ struct kstatfs kbuf;
+@@ -1659,6 +1635,7 @@ asmlinkage int irix_statvfs64(char *fnam
+ error = -EFAULT;
+ goto out;
+ }
++
+ error = user_path_walk(fname, &nd);
+ if (error)
+ goto out;
+@@ -1666,27 +1643,25 @@ asmlinkage int irix_statvfs64(char *fnam
+ if (error)
+ goto dput_and_out;
+
+- __put_user(kbuf.f_bsize, &buf->f_bsize);
+- __put_user(kbuf.f_frsize, &buf->f_frsize);
+- __put_user(kbuf.f_blocks, &buf->f_blocks);
+- __put_user(kbuf.f_bfree, &buf->f_bfree);
+- __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
+- __put_user(kbuf.f_files, &buf->f_files);
+- __put_user(kbuf.f_ffree, &buf->f_ffree);
+- __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
++ error = __put_user(kbuf.f_bsize, &buf->f_bsize);
++ error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
++ error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
++ error |= __put_user(kbuf.f_files, &buf->f_files);
++ error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
++ error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
+ #ifdef __MIPSEB__
+- __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
++ error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
+ #else
+- __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
++ error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
+ #endif
+ for(i = 0; i < 16; i++)
+- __put_user(0, &buf->f_basetype[i]);
+- __put_user(0, &buf->f_flag);
+- __put_user(kbuf.f_namelen, &buf->f_namemax);
++ error |= __put_user(0, &buf->f_basetype[i]);
++ error |= __put_user(0, &buf->f_flag);
++ error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
+ for(i = 0; i < 32; i++)
+- __put_user(0, &buf->f_fstr[i]);
+-
+- error = 0;
++ error |= __put_user(0, &buf->f_fstr[i]);
+
+ dput_and_out:
+ path_release(&nd);
+@@ -1694,7 +1669,7 @@ out:
+ return error;
+ }
+
+-asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs *buf)
++asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs __user *buf)
+ {
+ struct kstatfs kbuf;
+ struct file *file;
+@@ -1715,24 +1690,24 @@ asmlinkage int irix_fstatvfs64(int fd, s
+ if (error)
+ goto out_f;
+
+- __put_user(kbuf.f_bsize, &buf->f_bsize);
+- __put_user(kbuf.f_frsize, &buf->f_frsize);
+- __put_user(kbuf.f_blocks, &buf->f_blocks);
+- __put_user(kbuf.f_bfree, &buf->f_bfree);
+- __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
+- __put_user(kbuf.f_files, &buf->f_files);
+- __put_user(kbuf.f_ffree, &buf->f_ffree);
+- __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
++ error = __put_user(kbuf.f_bsize, &buf->f_bsize);
++ error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
++ error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
++ error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
++ error |= __put_user(kbuf.f_files, &buf->f_files);
++ error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
++ error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
+ #ifdef __MIPSEB__
+- __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
++ error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
+ #else
+- __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
++ error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
+ #endif
+ for(i = 0; i < 16; i++)
+- __put_user(0, &buf->f_basetype[i]);
+- __put_user(0, &buf->f_flag);
+- __put_user(kbuf.f_namelen, &buf->f_namemax);
+- __clear_user(buf->f_fstr, sizeof(buf->f_fstr[i]));
++ error |= __put_user(0, &buf->f_basetype[i]);
++ error |= __put_user(0, &buf->f_flag);
++ error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
++ error |= __clear_user(buf->f_fstr, sizeof(buf->f_fstr[i])) ? -EFAULT : 0;
+
+ out_f:
+ fput(file);
+@@ -1740,9 +1715,9 @@ out:
+ return error;
+ }
+
+-asmlinkage int irix_getmountid(char *fname, unsigned long *midbuf)
++asmlinkage int irix_getmountid(char __user *fname, unsigned long __user *midbuf)
+ {
+- int err = 0;
++ int err;
+
+ printk("[%s:%d] irix_getmountid(%s, %p)\n",
+ current->comm, current->pid, fname, midbuf);
+@@ -1755,7 +1730,7 @@ asmlinkage int irix_getmountid(char *fna
+ * fsid of the filesystem to try and make the right decision, but
+ * we don't have this so for now. XXX
+ */
+- err |= __put_user(0, &midbuf[0]);
++ err = __put_user(0, &midbuf[0]);
+ err |= __put_user(0, &midbuf[1]);
+ err |= __put_user(0, &midbuf[2]);
+ err |= __put_user(0, &midbuf[3]);
+@@ -1782,8 +1757,8 @@ struct irix_dirent32 {
+ };
+
+ struct irix_dirent32_callback {
+- struct irix_dirent32 *current_dir;
+- struct irix_dirent32 *previous;
++ struct irix_dirent32 __user *current_dir;
++ struct irix_dirent32 __user *previous;
+ int count;
+ int error;
+ };
+@@ -1791,13 +1766,13 @@ struct irix_dirent32_callback {
+ #define NAME_OFFSET32(de) ((int) ((de)->d_name - (char *) (de)))
+ #define ROUND_UP32(x) (((x)+sizeof(u32)-1) & ~(sizeof(u32)-1))
+
+-static int irix_filldir32(void *__buf, const char *name, int namlen,
+- loff_t offset, ino_t ino, unsigned int d_type)
++static int irix_filldir32(void *__buf, const char *name,
++ int namlen, loff_t offset, ino_t ino, unsigned int d_type)
+ {
+- struct irix_dirent32 *dirent;
+- struct irix_dirent32_callback *buf =
+- (struct irix_dirent32_callback *)__buf;
++ struct irix_dirent32 __user *dirent;
++ struct irix_dirent32_callback *buf = __buf;
+ unsigned short reclen = ROUND_UP32(NAME_OFFSET32(dirent) + namlen + 1);
++ int err = 0;
+
+ #ifdef DEBUG_GETDENTS
+ printk("\nirix_filldir32[reclen<%d>namlen<%d>count<%d>]",
+@@ -1808,25 +1783,26 @@ static int irix_filldir32(void *__buf, c
+ return -EINVAL;
+ dirent = buf->previous;
+ if (dirent)
+- __put_user(offset, &dirent->d_off);
++ err = __put_user(offset, &dirent->d_off);
+ dirent = buf->current_dir;
+- buf->previous = dirent;
+- __put_user(ino, &dirent->d_ino);
+- __put_user(reclen, &dirent->d_reclen);
+- copy_to_user(dirent->d_name, name, namlen);
+- __put_user(0, &dirent->d_name[namlen]);
+- ((char *) dirent) += reclen;
++ err |= __put_user(dirent, &buf->previous);
++ err |= __put_user(ino, &dirent->d_ino);
++ err |= __put_user(reclen, &dirent->d_reclen);
++ err |= copy_to_user((char __user *)dirent->d_name, name, namlen) ? -EFAULT : 0;
++ err |= __put_user(0, &dirent->d_name[namlen]);
++ dirent = (struct irix_dirent32 __user *) ((char __user *) dirent + reclen);
++
+ buf->current_dir = dirent;
+ buf->count -= reclen;
+
+- return 0;
++ return err;
+ }
+
+-asmlinkage int irix_ngetdents(unsigned int fd, void * dirent,
+- unsigned int count, int *eob)
++asmlinkage int irix_ngetdents(unsigned int fd, void __user * dirent,
++ unsigned int count, int __user *eob)
+ {
+ struct file *file;
+- struct irix_dirent32 *lastdirent;
++ struct irix_dirent32 __user *lastdirent;
+ struct irix_dirent32_callback buf;
+ int error;
+
+@@ -1839,7 +1815,7 @@ asmlinkage int irix_ngetdents(unsigned i
+ if (!file)
+ goto out;
+
+- buf.current_dir = (struct irix_dirent32 *) dirent;
++ buf.current_dir = (struct irix_dirent32 __user *) dirent;
+ buf.previous = NULL;
+ buf.count = count;
+ buf.error = 0;
+@@ -1879,8 +1855,8 @@ struct irix_dirent64 {
+ };
+
+ struct irix_dirent64_callback {
+- struct irix_dirent64 *curr;
+- struct irix_dirent64 *previous;
++ struct irix_dirent64 __user *curr;
++ struct irix_dirent64 __user *previous;
+ int count;
+ int error;
+ };
+@@ -1888,37 +1864,44 @@ struct irix_dirent64_callback {
+ #define NAME_OFFSET64(de) ((int) ((de)->d_name - (char *) (de)))
+ #define ROUND_UP64(x) (((x)+sizeof(u64)-1) & ~(sizeof(u64)-1))
+
+-static int irix_filldir64(void * __buf, const char * name, int namlen,
+- loff_t offset, ino_t ino, unsigned int d_type)
++static int irix_filldir64(void *__buf, const char *name,
++ int namlen, loff_t offset, ino_t ino, unsigned int d_type)
+ {
+- struct irix_dirent64 *dirent;
+- struct irix_dirent64_callback * buf =
+- (struct irix_dirent64_callback *) __buf;
++ struct irix_dirent64 __user *dirent;
++ struct irix_dirent64_callback * buf = __buf;
+ unsigned short reclen = ROUND_UP64(NAME_OFFSET64(dirent) + namlen + 1);
++ int err = 0;
+
+- buf->error = -EINVAL; /* only used if we fail.. */
++ if (!access_ok(VERIFY_WRITE, buf, sizeof(*buf)))
++ return -EFAULT;
++
++ if (__put_user(-EINVAL, &buf->error)) /* only used if we fail.. */
++ return -EFAULT;
+ if (reclen > buf->count)
+ return -EINVAL;
+ dirent = buf->previous;
+ if (dirent)
+- __put_user(offset, &dirent->d_off);
++ err = __put_user(offset, &dirent->d_off);
+ dirent = buf->curr;
+ buf->previous = dirent;
+- __put_user(ino, &dirent->d_ino);
+- __put_user(reclen, &dirent->d_reclen);
+- __copy_to_user(dirent->d_name, name, namlen);
+- __put_user(0, &dirent->d_name[namlen]);
+- ((char *) dirent) += reclen;
++ err |= __put_user(ino, &dirent->d_ino);
++ err |= __put_user(reclen, &dirent->d_reclen);
++ err |= __copy_to_user((char __user *)dirent->d_name, name, namlen)
++ ? -EFAULT : 0;
++ err |= __put_user(0, &dirent->d_name[namlen]);
++
++ dirent = (struct irix_dirent64 __user *) ((char __user *) dirent + reclen);
++
+ buf->curr = dirent;
+ buf->count -= reclen;
+
+- return 0;
++ return err;
+ }
+
+-asmlinkage int irix_getdents64(int fd, void *dirent, int cnt)
++asmlinkage int irix_getdents64(int fd, void __user *dirent, int cnt)
+ {
+ struct file *file;
+- struct irix_dirent64 *lastdirent;
++ struct irix_dirent64 __user *lastdirent;
+ struct irix_dirent64_callback buf;
+ int error;
+
+@@ -1938,7 +1921,7 @@ asmlinkage int irix_getdents64(int fd, v
+ if (cnt < (sizeof(struct irix_dirent64) + 255))
+ goto out_f;
+
+- buf.curr = (struct irix_dirent64 *) dirent;
++ buf.curr = (struct irix_dirent64 __user *) dirent;
+ buf.previous = NULL;
+ buf.count = cnt;
+ buf.error = 0;
+@@ -1950,7 +1933,8 @@ asmlinkage int irix_getdents64(int fd, v
+ error = buf.error;
+ goto out_f;
+ }
+- lastdirent->d_off = (u64) file->f_pos;
++ if (put_user(file->f_pos, &lastdirent->d_off))
++ return -EFAULT;
+ #ifdef DEBUG_GETDENTS
+ printk("returning %d\n", cnt - buf.count);
+ #endif
+@@ -1962,10 +1946,10 @@ out:
+ return error;
+ }
+
+-asmlinkage int irix_ngetdents64(int fd, void *dirent, int cnt, int *eob)
++asmlinkage int irix_ngetdents64(int fd, void __user *dirent, int cnt, int *eob)
+ {
+ struct file *file;
+- struct irix_dirent64 *lastdirent;
++ struct irix_dirent64 __user *lastdirent;
+ struct irix_dirent64_callback buf;
+ int error;
+
+@@ -1987,7 +1971,7 @@ asmlinkage int irix_ngetdents64(int fd,
+ goto out_f;
+
+ *eob = 0;
+- buf.curr = (struct irix_dirent64 *) dirent;
++ buf.curr = (struct irix_dirent64 __user *) dirent;
+ buf.previous = NULL;
+ buf.count = cnt;
+ buf.error = 0;
+@@ -1999,7 +1983,8 @@ asmlinkage int irix_ngetdents64(int fd,
+ error = buf.error;
+ goto out_f;
+ }
+- lastdirent->d_off = (u64) file->f_pos;
++ if (put_user(file->f_pos, &lastdirent->d_off))
++ return -EFAULT;
+ #ifdef DEBUG_GETDENTS
+ printk("eob=%d returning %d\n", *eob, cnt - buf.count);
+ #endif
+@@ -2062,14 +2047,14 @@ out:
+ return retval;
+ }
+
+-asmlinkage int irix_utssys(char *inbuf, int arg, int type, char *outbuf)
++asmlinkage int irix_utssys(char __user *inbuf, int arg, int type, char __user *outbuf)
+ {
+ int retval;
+
+ switch(type) {
+ case 0:
+ /* uname() */
+- retval = irix_uname((struct iuname *)inbuf);
++ retval = irix_uname((struct iuname __user *)inbuf);
+ goto out;
+
+ case 2:
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/traps.c linux_HEAD/arch/mips/kernel/traps.c
+--- linux-2.6.12/arch/mips/kernel/traps.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/traps.c 2005-07-07 11:22:49.000000000 +0200
+@@ -9,7 +9,7 @@
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Kevin D. Kissell, kevink at mips.com and Carsten Langgaard, carstenl at mips.com
+ * Copyright (C) 2000, 01 MIPS Technologies, Inc.
+- * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
++ * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki
+ */
+ #include <linux/config.h>
+ #include <linux/init.h>
+@@ -25,6 +25,7 @@
+ #include <asm/branch.h>
+ #include <asm/break.h>
+ #include <asm/cpu.h>
++#include <asm/dsp.h>
+ #include <asm/fpu.h>
+ #include <asm/module.h>
+ #include <asm/pgtable.h>
+@@ -54,6 +55,7 @@ extern asmlinkage void handle_tr(void);
+ extern asmlinkage void handle_fpe(void);
+ extern asmlinkage void handle_mdmx(void);
+ extern asmlinkage void handle_watch(void);
++extern asmlinkage void handle_dsp(void);
+ extern asmlinkage void handle_mcheck(void);
+ extern asmlinkage void handle_reserved(void);
+
+@@ -201,32 +203,47 @@ void show_regs(struct pt_regs *regs)
+
+ printk("Status: %08x ", (uint32_t) regs->cp0_status);
+
+- if (regs->cp0_status & ST0_KX)
+- printk("KX ");
+- if (regs->cp0_status & ST0_SX)
+- printk("SX ");
+- if (regs->cp0_status & ST0_UX)
+- printk("UX ");
+- switch (regs->cp0_status & ST0_KSU) {
+- case KSU_USER:
+- printk("USER ");
+- break;
+- case KSU_SUPERVISOR:
+- printk("SUPERVISOR ");
+- break;
+- case KSU_KERNEL:
+- printk("KERNEL ");
+- break;
+- default:
+- printk("BAD_MODE ");
+- break;
++ if (current_cpu_data.isa_level == MIPS_CPU_ISA_I) {
++ if (regs->cp0_status & ST0_KUO)
++ printk("KUo ");
++ if (regs->cp0_status & ST0_IEO)
++ printk("IEo ");
++ if (regs->cp0_status & ST0_KUP)
++ printk("KUp ");
++ if (regs->cp0_status & ST0_IEP)
++ printk("IEp ");
++ if (regs->cp0_status & ST0_KUC)
++ printk("KUc ");
++ if (regs->cp0_status & ST0_IEC)
++ printk("IEc ");
++ } else {
++ if (regs->cp0_status & ST0_KX)
++ printk("KX ");
++ if (regs->cp0_status & ST0_SX)
++ printk("SX ");
++ if (regs->cp0_status & ST0_UX)
++ printk("UX ");
++ switch (regs->cp0_status & ST0_KSU) {
++ case KSU_USER:
++ printk("USER ");
++ break;
++ case KSU_SUPERVISOR:
++ printk("SUPERVISOR ");
++ break;
++ case KSU_KERNEL:
++ printk("KERNEL ");
++ break;
++ default:
++ printk("BAD_MODE ");
++ break;
++ }
++ if (regs->cp0_status & ST0_ERL)
++ printk("ERL ");
++ if (regs->cp0_status & ST0_EXL)
++ printk("EXL ");
++ if (regs->cp0_status & ST0_IE)
++ printk("IE ");
+ }
+- if (regs->cp0_status & ST0_ERL)
+- printk("ERL ");
+- if (regs->cp0_status & ST0_EXL)
+- printk("EXL ");
+- if (regs->cp0_status & ST0_IE)
+- printk("IE ");
+ printk("\n");
+
+ printk("Cause : %08x\n", cause);
+@@ -252,8 +269,9 @@ void show_registers(struct pt_regs *regs
+
+ static DEFINE_SPINLOCK(die_lock);
+
+-NORET_TYPE void __die(const char * str, struct pt_regs * regs,
+- const char * file, const char * func, unsigned long line)
++NORET_TYPE void ATTRIB_NORET __die(const char * str, struct pt_regs * regs,
++ const char * file, const char * func,
++ unsigned long line)
+ {
+ static int die_counter;
+
+@@ -339,9 +357,9 @@ asmlinkage void do_be(struct pt_regs *re
+
static inline int get_insn_opcode(struct pt_regs *regs, unsigned int *opcode)
{
- unsigned int *epc;
@@ -17596,8 +25750,19 @@
((regs->cp0_cause & CAUSEF_BD) != 0);
if (!get_user(*opcode, epc))
return 0;
-@@ -371,7 +371,7 @@ static struct task_struct *ll_task = NUL
+@@ -360,6 +378,10 @@ static inline int get_insn_opcode(struct
+ #define OFFSET 0x0000ffff
+ #define LL 0xc0000000
+ #define SC 0xe0000000
++#define SPEC3 0x7c000000
++#define RD 0x0000f800
++#define FUNC 0x0000003f
++#define RDHWR 0x0000003b
+ /*
+ * The ll_bit is cleared by r*_switch.S
+@@ -371,7 +393,7 @@ static struct task_struct *ll_task = NUL
+
static inline void simulate_ll(struct pt_regs *regs, unsigned int opcode)
{
- unsigned long value, *vaddr;
@@ -17605,7 +25770,7 @@
long offset;
int signal = 0;
-@@ -385,7 +385,8 @@ static inline void simulate_ll(struct pt
+@@ -385,7 +407,8 @@ static inline void simulate_ll(struct pt
offset <<= 16;
offset >>= 16;
@@ -17615,8 +25780,20 @@
if ((unsigned long)vaddr & 3) {
signal = SIGBUS;
-@@ -418,7 +419,8 @@ sig:
+@@ -407,9 +430,10 @@ static inline void simulate_ll(struct pt
+ preempt_enable();
+
++ compute_return_epc(regs);
++
+ regs->regs[(opcode & RT) >> 16] = value;
+
+- compute_return_epc(regs);
+ return;
+
+ sig:
+@@ -418,7 +442,8 @@ sig:
+
static inline void simulate_sc(struct pt_regs *regs, unsigned int opcode)
{
- unsigned long *vaddr, reg;
@@ -17625,7 +25802,7 @@
long offset;
int signal = 0;
-@@ -432,7 +434,8 @@ static inline void simulate_sc(struct pt
+@@ -432,7 +457,8 @@ static inline void simulate_sc(struct pt
offset <<= 16;
offset >>= 16;
@@ -17635,7 +25812,67 @@
reg = (opcode & RT) >> 16;
if ((unsigned long)vaddr & 3) {
-@@ -498,7 +501,7 @@ asmlinkage void do_ov(struct pt_regs *re
+@@ -443,9 +469,9 @@ static inline void simulate_sc(struct pt
+ preempt_disable();
+
+ if (ll_bit == 0 || ll_task != current) {
++ compute_return_epc(regs);
+ regs->regs[reg] = 0;
+ preempt_enable();
+- compute_return_epc(regs);
+ return;
+ }
+
+@@ -456,9 +482,9 @@ static inline void simulate_sc(struct pt
+ goto sig;
+ }
+
++ compute_return_epc(regs);
+ regs->regs[reg] = 1;
+
+- compute_return_epc(regs);
+ return;
+
+ sig:
+@@ -491,6 +517,37 @@ static inline int simulate_llsc(struct p
+ return -EFAULT; /* Strange things going on ... */
+ }
+
++/*
++ * Simulate trapping 'rdhwr' instructions to provide user accessible
++ * registers not implemented in hardware. The only current use of this
++ * is the thread area pointer.
++ */
++static inline int simulate_rdhwr(struct pt_regs *regs)
++{
++ struct thread_info *ti = current->thread_info;
++ unsigned int opcode;
++
++ if (unlikely(get_insn_opcode(regs, &opcode)))
++ return -EFAULT;
++
++ if (unlikely(compute_return_epc(regs)))
++ return -EFAULT;
++
++ if ((opcode & OPCODE) == SPEC3 && (opcode & FUNC) == RDHWR) {
++ int rd = (opcode & RD) >> 11;
++ int rt = (opcode & RT) >> 16;
++ switch (rd) {
++ case 29:
++ regs->regs[rt] = ti->tp_value;
++ break;
++ default:
++ return -EFAULT;
++ }
++ }
++
++ return 0;
++}
++
+ asmlinkage void do_ov(struct pt_regs *regs)
+ {
+ siginfo_t info;
+@@ -498,7 +555,7 @@ asmlinkage void do_ov(struct pt_regs *re
info.si_code = FPE_INTOVF;
info.si_signo = SIGFPE;
info.si_errno = 0;
@@ -17644,7 +25881,41 @@
force_sig_info(SIGFPE, &info, current);
}
-@@ -584,7 +587,7 @@ asmlinkage void do_bp(struct pt_regs *re
+@@ -512,6 +569,14 @@ asmlinkage void do_fpe(struct pt_regs *r
+
+ preempt_disable();
+
++#ifdef CONFIG_PREEMPT
++ if (!is_fpu_owner()) {
++ /* We might lose fpu before disabling preempt... */
++ own_fpu();
++ BUG_ON(!used_math());
++ restore_fp(current);
++ }
++#endif
+ /*
+ * Unimplemented operation exception. If we've got the full
+ * software emulator on-board, let's use it...
+@@ -523,11 +588,18 @@ asmlinkage void do_fpe(struct pt_regs *r
+ * a bit extreme for what should be an infrequent event.
+ */
+ save_fp(current);
++ /* Ensure 'resume' not overwrite saved fp context again. */
++ lose_fpu();
++
++ preempt_enable();
+
+ /* Run the emulator */
+ sig = fpu_emulator_cop1Handler (0, regs,
+ ¤t->thread.fpu.soft);
+
++ preempt_disable();
++
++ own_fpu(); /* Using the FPU again. */
+ /*
+ * We can't allow the emulated instruction to leave any of
+ * the cause bit set in $fcr31.
+@@ -584,7 +656,7 @@ asmlinkage void do_bp(struct pt_regs *re
info.si_code = FPE_INTOVF;
info.si_signo = SIGFPE;
info.si_errno = 0;
@@ -17653,7 +25924,7 @@
force_sig_info(SIGFPE, &info, current);
break;
default:
-@@ -621,7 +624,7 @@ asmlinkage void do_tr(struct pt_regs *re
+@@ -621,7 +693,7 @@ asmlinkage void do_tr(struct pt_regs *re
info.si_code = FPE_INTOVF;
info.si_signo = SIGFPE;
info.si_errno = 0;
@@ -17662,8 +25933,68 @@
force_sig_info(SIGFPE, &info, current);
break;
default:
-@@ -736,16 +739,12 @@ static inline void parity_protection_ini
+@@ -637,6 +709,9 @@ asmlinkage void do_ri(struct pt_regs *re
+ if (!simulate_llsc(regs))
+ return;
+
++ if (!simulate_rdhwr(regs))
++ return;
++
+ force_sig(SIGILL, current);
+ }
+
+@@ -650,11 +725,13 @@ asmlinkage void do_cpu(struct pt_regs *r
+
+ switch (cpid) {
+ case 0:
+- if (cpu_has_llsc)
+- break;
++ if (!cpu_has_llsc)
++ if (!simulate_llsc(regs))
++ return;
+
+- if (!simulate_llsc(regs))
++ if (!simulate_rdhwr(regs))
+ return;
++
+ break;
+
+ case 1:
+@@ -668,6 +745,8 @@ asmlinkage void do_cpu(struct pt_regs *r
+ set_used_math();
+ }
+
++ preempt_enable();
++
+ if (!cpu_has_fpu) {
+ int sig = fpu_emulator_cop1Handler(0, regs,
+ ¤t->thread.fpu.soft);
+@@ -675,8 +754,6 @@ asmlinkage void do_cpu(struct pt_regs *r
+ force_sig(sig, current);
+ }
+
+- preempt_enable();
+-
+ return;
+
+ case 2:
+@@ -716,6 +793,14 @@ asmlinkage void do_mcheck(struct pt_regs
+ (regs->cp0_status & ST0_TS) ? "" : "not ");
+ }
+
++asmlinkage void do_dsp(struct pt_regs *regs)
++{
++ if (cpu_has_dsp)
++ panic("Unexpected DSP exception\n");
++
++ force_sig(SIGILL, current);
++}
++
+ asmlinkage void do_reserved(struct pt_regs *regs)
{
+ /*
+@@ -736,16 +821,12 @@ static inline void parity_protection_ini
+ {
switch (current_cpu_data.cputype) {
case CPU_24K:
- /* 24K cache parity not currently implemented in FPGA */
@@ -17684,8 +26015,79 @@
break;
case CPU_20KC:
case CPU_25KF:
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/unaligned.c linux_HEAD/arch/mips/kernel/unaligned.c
---- linux-2.6.11.6/arch/mips/kernel/unaligned.c 2005-04-02 23:39:54.000000000 +0200
+@@ -783,7 +864,7 @@ asmlinkage void cache_parity_error(void)
+ reg_val & (1<<22) ? "E0 " : "");
+ printk("IDX: 0x%08x\n", reg_val & ((1<<22)-1));
+
+-#if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64)
++#if defined(CONFIG_CPU_MIPS32_R1) || defined (CONFIG_CPU_MIPS64_R1)
+ if (reg_val & (1<<22))
+ printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0());
+
+@@ -929,9 +1010,12 @@ void __init per_cpu_trap_init(void)
+ #endif
+ if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
+ status_set |= ST0_XX;
+- change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
++ change_c0_status(ST0_CU|ST0_MX|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
+ status_set);
+
++ if (cpu_has_dsp)
++ set_c0_status(ST0_MX);
++
+ /*
+ * Some MIPS CPUs have a dedicated interrupt vector which reduces the
+ * interrupt processing overhead. Use it where available.
+@@ -1023,21 +1107,6 @@ void __init trap_init(void)
+ set_except_vector(11, handle_cpu);
+ set_except_vector(12, handle_ov);
+ set_except_vector(13, handle_tr);
+- set_except_vector(22, handle_mdmx);
+-
+- if (cpu_has_fpu && !cpu_has_nofpuex)
+- set_except_vector(15, handle_fpe);
+-
+- if (cpu_has_mcheck)
+- set_except_vector(24, handle_mcheck);
+-
+- if (cpu_has_vce)
+- /* Special exception: R4[04]00 uses also the divec space. */
+- memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x100);
+- else if (cpu_has_4kex)
+- memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
+- else
+- memcpy((void *)(CAC_BASE + 0x080), &except_vec3_generic, 0x80);
+
+ if (current_cpu_data.cputype == CPU_R6000 ||
+ current_cpu_data.cputype == CPU_R6000A) {
+@@ -1053,6 +1122,25 @@ void __init trap_init(void)
+ //set_except_vector(15, handle_ndc);
+ }
+
++ if (cpu_has_fpu && !cpu_has_nofpuex)
++ set_except_vector(15, handle_fpe);
++
++ set_except_vector(22, handle_mdmx);
++
++ if (cpu_has_mcheck)
++ set_except_vector(24, handle_mcheck);
++
++ if (cpu_has_dsp)
++ set_except_vector(26, handle_dsp);
++
++ if (cpu_has_vce)
++ /* Special exception: R4[04]00 uses also the divec space. */
++ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x100);
++ else if (cpu_has_4kex)
++ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
++ else
++ memcpy((void *)(CAC_BASE + 0x080), &except_vec3_generic, 0x80);
++
+ signal_init();
+ #ifdef CONFIG_MIPS32_COMPAT
+ signal32_init();
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/unaligned.c linux_HEAD/arch/mips/kernel/unaligned.c
+--- linux-2.6.12/arch/mips/kernel/unaligned.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/kernel/unaligned.c 2005-03-17 22:20:26.000000000 +0100
@@ -94,7 +94,7 @@ unsigned long unaligned_instructions;
#endif
@@ -17733,9 +26135,9 @@
®ptr, &newval)) {
compute_return_epc(regs);
/*
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/kernel/vmlinux.lds.S linux_HEAD/arch/mips/kernel/vmlinux.lds.S
---- linux-2.6.11.6/arch/mips/kernel/vmlinux.lds.S 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/arch/mips/kernel/vmlinux.lds.S 2005-03-17 22:10:47.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/kernel/vmlinux.lds.S linux_HEAD/arch/mips/kernel/vmlinux.lds.S
+--- linux-2.6.12/arch/mips/kernel/vmlinux.lds.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/kernel/vmlinux.lds.S 2005-07-01 12:09:18.000000000 +0200
@@ -54,13 +54,6 @@ SECTIONS
*(.data)
@@ -17750,8 +26152,21 @@
CONSTRUCTORS
}
_gp = . + 0x8000;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/lasat/Kconfig linux_HEAD/arch/mips/lasat/Kconfig
---- linux-2.6.11.6/arch/mips/lasat/Kconfig 1970-01-01 01:00:00.000000000 +0100
+@@ -96,12 +89,6 @@ SECTIONS
+ .init.setup : { *(.init.setup) }
+ __setup_end = .;
+
+- .early_initcall.init : {
+- __earlyinitcall_start = .;
+- *(.initcall.early1.init)
+- }
+- __earlyinitcall_end = .;
+-
+ __initcall_start = .;
+ .initcall.init : {
+ *(.initcall1.init)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lasat/Kconfig linux_HEAD/arch/mips/lasat/Kconfig
+--- linux-2.6.12/arch/mips/lasat/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/lasat/Kconfig 2005-01-30 21:45:37.000000000 +0100
@@ -0,0 +1,15 @@
+config PICVUE
@@ -17769,8 +26184,8 @@
+config LASAT_SYSCTL
+ bool "LASAT sysctl interface"
+ depends on LASAT
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/lasat/interrupt.c linux_HEAD/arch/mips/lasat/interrupt.c
---- linux-2.6.11.6/arch/mips/lasat/interrupt.c 2005-03-26 04:28:23.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lasat/interrupt.c linux_HEAD/arch/mips/lasat/interrupt.c
+--- linux-2.6.12/arch/mips/lasat/interrupt.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/lasat/interrupt.c 2005-02-28 16:56:42.000000000 +0100
@@ -71,14 +71,13 @@ static void end_lasat_irq(unsigned int i
}
@@ -17794,21 +26209,44 @@
};
static inline int ls1bit32(unsigned int x)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/lib/Makefile linux_HEAD/arch/mips/lib/Makefile
---- linux-2.6.11.6/arch/mips/lib/Makefile 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/arch/mips/lib/Makefile 2004-01-03 22:33:17.000000000 +0100
-@@ -2,7 +2,7 @@
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lasat/setup.c linux_HEAD/arch/mips/lasat/setup.c
+--- linux-2.6.12/arch/mips/lasat/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/lasat/setup.c 2005-07-01 12:09:18.000000000 +0200
+@@ -155,7 +155,7 @@ void __init serial_init(void)
+ }
+ #endif
+
+-static int __init lasat_setup(void)
++void __init plat_setup(void)
+ {
+ int i;
+ lasat_misc = &lasat_misc_info[mips_machtype];
+@@ -185,8 +185,4 @@ static int __init lasat_setup(void)
+ change_c0_status(ST0_BEV,0);
+
+ prom_printf("Lasat specific initialization complete\n");
+-
+- return 0;
+ }
+-
+-early_initcall(lasat_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib/Makefile linux_HEAD/arch/mips/lib/Makefile
+--- linux-2.6.12/arch/mips/lib/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/lib/Makefile 2005-04-23 05:27:41.000000000 +0200
+@@ -2,9 +2,7 @@
# Makefile for MIPS-specific library files..
#
--lib-y += csum_partial_copy.o dec_and_lock.o iomap.o memcpy.o promlib.o \
+-lib-y += csum_partial_copy.o dec_and_lock.o memcpy.o promlib.o \
- strlen_user.o strncpy_user.o strnlen_user.o
+-
+-obj-y += iomap.o
+lib-y += csum_partial_copy.o dec_and_lock.o memcpy.o promlib.o strlen_user.o \
-+ strncpy_user.o strnlen_user.o
++ strncpy_user.o strnlen_user.o uncached.o
EXTRA_AFLAGS := $(CFLAGS)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/lib/csum_partial_copy.c linux_HEAD/arch/mips/lib/csum_partial_copy.c
---- linux-2.6.11.6/arch/mips/lib/csum_partial_copy.c 2005-03-26 04:28:39.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib/csum_partial_copy.c linux_HEAD/arch/mips/lib/csum_partial_copy.c
+--- linux-2.6.12/arch/mips/lib/csum_partial_copy.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/lib/csum_partial_copy.c 2005-02-17 21:48:56.000000000 +0100
@@ -16,8 +16,8 @@
/*
@@ -17832,8 +26270,8 @@
{
int missing;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/lib/iomap.c linux_HEAD/arch/mips/lib/iomap.c
---- linux-2.6.11.6/arch/mips/lib/iomap.c 2005-03-26 04:28:15.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib/iomap.c linux_HEAD/arch/mips/lib/iomap.c
+--- linux-2.6.12/arch/mips/lib/iomap.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/lib/iomap.c 1970-01-01 01:00:00.000000000 +0100
@@ -1,78 +0,0 @@
-/*
@@ -17914,8 +26352,62 @@
-}
-EXPORT_SYMBOL(pci_iomap);
-EXPORT_SYMBOL(pci_iounmap);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/lib-32/dump_tlb.c linux_HEAD/arch/mips/lib-32/dump_tlb.c
---- linux-2.6.11.6/arch/mips/lib-32/dump_tlb.c 2005-03-26 04:28:21.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib/uncached.c linux_HEAD/arch/mips/lib/uncached.c
+--- linux-2.6.12/arch/mips/lib/uncached.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/arch/mips/lib/uncached.c 2005-04-23 17:08:56.000000000 +0200
+@@ -0,0 +1,36 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2005 Thiemo Seufer
++ */
++#include <linux/init.h>
++
++#include <asm/addrspace.h>
++
++/*
++ * FUNC is executed in the uncached segment CKSEG1. This works only if
++ * both code and stack live in CKSEG0. The stack handling works because
++ * we don't handle stack arguments or more complex return values, so we
++ * can avoid to share the same stack area between cached and uncached
++ * mode.
++ */
++unsigned long __init run_uncached(void *func)
++{
++ register unsigned long sp __asm__("$sp");
++ register unsigned long ret __asm__("$2");
++ unsigned long usp = sp - CAC_BASE + UNCAC_BASE;
++ unsigned long ufunc = func - CAC_BASE + UNCAC_BASE;
++
++ __asm__ __volatile__ (
++ " move $16, $sp\n"
++ " move $sp, %1\n"
++ " jalr $ra, %2\n"
++ " move $sp, $16"
++ : "=&r" (ret)
++ : "r" (usp), "r" (ufunc)
++ : "$16", "$31");
++
++ return ret;
++}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib-32/Makefile linux_HEAD/arch/mips/lib-32/Makefile
+--- linux-2.6.12/arch/mips/lib-32/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/lib-32/Makefile 2005-07-07 11:22:49.000000000 +0200
+@@ -4,8 +4,8 @@
+
+ lib-y += csum_partial.o memset.o watch.o
+
+-obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o
+-obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o
++obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o
++obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o
+ obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o
+ obj-$(CONFIG_CPU_R10000) += dump_tlb.o
+ obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib-32/dump_tlb.c linux_HEAD/arch/mips/lib-32/dump_tlb.c
+--- linux-2.6.12/arch/mips/lib-32/dump_tlb.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/lib-32/dump_tlb.c 2005-02-17 21:48:56.000000000 +0100
@@ -32,8 +32,6 @@ static inline const char *msk2str(unsign
case PM_256M: return "256Mb";
@@ -17963,8 +26455,8 @@
pte = pte_offset(pmd, addr);
paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
paddr |= (addr & ~PAGE_MASK);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/lib-32/r3k_dump_tlb.c linux_HEAD/arch/mips/lib-32/r3k_dump_tlb.c
---- linux-2.6.11.6/arch/mips/lib-32/r3k_dump_tlb.c 2005-03-26 04:28:15.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib-32/r3k_dump_tlb.c linux_HEAD/arch/mips/lib-32/r3k_dump_tlb.c
+--- linux-2.6.12/arch/mips/lib-32/r3k_dump_tlb.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/lib-32/r3k_dump_tlb.c 2005-02-17 21:48:56.000000000 +0100
@@ -105,6 +105,7 @@ void dump_tlb_nonwired(void)
void dump_list_process(struct task_struct *t, void *address)
@@ -18003,8 +26495,22 @@
pte = pte_offset(pmd, addr);
paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
paddr |= (addr & ~PAGE_MASK);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/lib-64/dump_tlb.c linux_HEAD/arch/mips/lib-64/dump_tlb.c
---- linux-2.6.11.6/arch/mips/lib-64/dump_tlb.c 2005-03-26 04:28:47.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib-64/Makefile linux_HEAD/arch/mips/lib-64/Makefile
+--- linux-2.6.12/arch/mips/lib-64/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/lib-64/Makefile 2005-07-07 11:22:49.000000000 +0200
+@@ -4,8 +4,8 @@
+
+ lib-y += csum_partial.o memset.o watch.o
+
+-obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o
+-obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o
++obj-$(CONFIG_CPU_MIPS32_R1) += dump_tlb.o
++obj-$(CONFIG_CPU_MIPS64_R1) += dump_tlb.o
+ obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o
+ obj-$(CONFIG_CPU_R10000) += dump_tlb.o
+ obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o
+diff -urpNX dontdiff linux-2.6.12/arch/mips/lib-64/dump_tlb.c linux_HEAD/arch/mips/lib-64/dump_tlb.c
+--- linux-2.6.12/arch/mips/lib-64/dump_tlb.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/lib-64/dump_tlb.c 2005-02-17 21:48:56.000000000 +0100
@@ -32,8 +32,6 @@ static inline const char *msk2str(unsign
case PM_256M: return "256Mb";
@@ -18052,10 +26558,38 @@
pte = pte_offset(pmd, addr);
paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
paddr |= (addr & ~PAGE_MASK);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/math-emu/cp1emu.c linux_HEAD/arch/mips/math-emu/cp1emu.c
---- linux-2.6.11.6/arch/mips/math-emu/cp1emu.c 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/arch/mips/math-emu/cp1emu.c 2005-02-28 22:37:28.000000000 +0100
-@@ -196,7 +196,7 @@ static int isBranchInstr(mips_instructio
+diff -urpNX dontdiff linux-2.6.12/arch/mips/math-emu/cp1emu.c linux_HEAD/arch/mips/math-emu/cp1emu.c
+--- linux-2.6.12/arch/mips/math-emu/cp1emu.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/math-emu/cp1emu.c 2005-05-14 14:38:21.000000000 +0200
+@@ -70,7 +70,7 @@ static int fpux_emu(struct pt_regs *,
+
+ /* Further private data for which no space exists in mips_fpu_soft_struct */
+
+-struct mips_fpu_emulator_private fpuemuprivate;
++struct mips_fpu_emulator_stats fpuemustats;
+
+ /* Control registers */
+
+@@ -79,7 +79,17 @@ struct mips_fpu_emulator_private fpuemup
+
+ /* Convert Mips rounding mode (0..3) to IEEE library modes. */
+ static const unsigned char ieee_rm[4] = {
+- IEEE754_RN, IEEE754_RZ, IEEE754_RU, IEEE754_RD
++ [FPU_CSR_RN] = IEEE754_RN,
++ [FPU_CSR_RZ] = IEEE754_RZ,
++ [FPU_CSR_RU] = IEEE754_RU,
++ [FPU_CSR_RD] = IEEE754_RD,
++};
++/* Convert IEEE library modes to Mips rounding mode (0..3). */
++static const unsigned char mips_rm[4] = {
++ [IEEE754_RN] = FPU_CSR_RN,
++ [IEEE754_RZ] = FPU_CSR_RZ,
++ [IEEE754_RD] = FPU_CSR_RD,
++ [IEEE754_RU] = FPU_CSR_RU,
+ };
+
+ #if __mips >= 4
+@@ -196,11 +206,11 @@ static int isBranchInstr(mips_instructio
static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
{
mips_instruction ir;
@@ -18064,7 +26598,12 @@
unsigned int cond;
if (get_user(ir, (mips_instruction *) xcp->cp0_epc)) {
-@@ -221,12 +221,12 @@ static int cop1Emulate(struct pt_regs *x
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+
+@@ -221,41 +231,40 @@ static int cop1Emulate(struct pt_regs *x
* Linux MIPS branch emulator operates on context, updating the
* cp0_epc.
*/
@@ -18079,7 +26618,9 @@
#endif
return SIGILL;
}
-@@ -235,13 +235,12 @@ static int cop1Emulate(struct pt_regs *x
+ if (get_user(ir, (mips_instruction *) emulpc)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
return SIGBUS;
}
/* __compute_return_epc() will have updated cp0_epc */
@@ -18098,7 +26639,8 @@
}
emul:
-@@ -249,7 +248,7 @@ static int cop1Emulate(struct pt_regs *x
+- fpuemuprivate.stats.emulated++;
++ fpuemustats.emulated++;
switch (MIPSInst_OPCODE(ir)) {
#ifndef SINGLE_ONLY_FPU
case ldc1_op:{
@@ -18107,7 +26649,15 @@
MIPSInst_SIMM(ir));
u64 val;
-@@ -263,7 +262,7 @@ static int cop1Emulate(struct pt_regs *x
+- fpuemuprivate.stats.loads++;
++ fpuemustats.loads++;
+ if (get_user(val, va)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ DITOREG(val, MIPSInst_RT(ir));
+@@ -263,14 +272,14 @@ static int cop1Emulate(struct pt_regs *x
}
case sdc1_op:{
@@ -18116,7 +26666,16 @@
MIPSInst_SIMM(ir));
u64 val;
-@@ -278,7 +277,7 @@ static int cop1Emulate(struct pt_regs *x
+- fpuemuprivate.stats.stores++;
++ fpuemustats.stores++;
+ DIFROMREG(val, MIPSInst_RT(ir));
+ if (put_user(val, va)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ break;
+@@ -278,13 +287,13 @@ static int cop1Emulate(struct pt_regs *x
#endif
case lwc1_op:{
@@ -18125,7 +26684,15 @@
MIPSInst_SIMM(ir));
u32 val;
-@@ -298,7 +297,7 @@ static int cop1Emulate(struct pt_regs *x
+- fpuemuprivate.stats.loads++;
++ fpuemustats.loads++;
+ if (get_user(val, va)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ #ifdef SINGLE_ONLY_FPU
+@@ -298,11 +307,11 @@ static int cop1Emulate(struct pt_regs *x
}
case swc1_op:{
@@ -18134,8 +26701,25 @@
MIPSInst_SIMM(ir));
u32 val;
-@@ -371,7 +370,7 @@ static int cop1Emulate(struct pt_regs *x
+- fpuemuprivate.stats.stores++;
++ fpuemustats.stores++;
+ #ifdef SINGLE_ONLY_FPU
+ if (MIPSInst_RT(ir) & 1) {
+ /* illegal register in single-float mode */
+@@ -311,7 +320,7 @@ static int cop1Emulate(struct pt_regs *x
+ #endif
+ SIFROMREG(val, MIPSInst_RT(ir));
+ if (put_user(val, va)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ break;
+@@ -369,9 +378,10 @@ static int cop1Emulate(struct pt_regs *x
+ }
+ if (MIPSInst_RD(ir) == FPCREG_CSR) {
value = ctx->fcr31;
++ value = (value & ~0x3) | mips_rm[value & 0x3];
#ifdef CSRTRACE
printk("%p gpr[%d]<-csr=%08x\n",
- REG_TO_VA(xcp->cp0_epc),
@@ -18143,7 +26727,7 @@
MIPSInst_RT(ir), value);
#endif
}
-@@ -398,7 +397,7 @@ static int cop1Emulate(struct pt_regs *x
+@@ -398,14 +408,13 @@ static int cop1Emulate(struct pt_regs *x
if (MIPSInst_RD(ir) == FPCREG_CSR) {
#ifdef CSRTRACE
printk("%p gpr[%d]->csr=%08x\n",
@@ -18151,8 +26735,19 @@
+ (void *) (xcp->cp0_epc),
MIPSInst_RT(ir), value);
#endif
- ctx->fcr31 = value;
-@@ -445,12 +444,12 @@ static int cop1Emulate(struct pt_regs *x
+- ctx->fcr31 = value;
+- /* copy new rounding mode and
+- flush bit to ieee library state! */
+- ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0;
+- ieee754_csr.rm = ieee_rm[value & 0x3];
++ value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
++ ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
++ /* convert to ieee library modes */
++ ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3];
+ }
+ if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
+ return SIGFPE;
+@@ -445,13 +454,13 @@ static int cop1Emulate(struct pt_regs *x
* instruction
*/
xcp->cp0_epc += 4;
@@ -18163,11 +26758,13 @@
if (get_user(ir, (mips_instruction *)
- REG_TO_VA xcp->cp0_epc)) {
+- fpuemuprivate.stats.errors++;
+ (void *) xcp->cp0_epc)) {
- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
return SIGBUS;
}
-@@ -480,7 +479,7 @@ static int cop1Emulate(struct pt_regs *x
+
+@@ -480,7 +489,7 @@ static int cop1Emulate(struct pt_regs *x
* Single step the non-cp1
* instruction in the dslot
*/
@@ -18176,7 +26773,7 @@
}
else {
/* branch not taken */
-@@ -539,8 +538,9 @@ static int cop1Emulate(struct pt_regs *x
+@@ -539,8 +548,9 @@ static int cop1Emulate(struct pt_regs *x
}
/* we did it !! */
@@ -18187,16 +26784,41 @@
return 0;
}
-@@ -628,7 +628,7 @@ static int fpux_emu(struct pt_regs *xcp,
+@@ -570,7 +580,7 @@ static const unsigned char cmptab[8] = {
+ static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \
+ ieee754##p t) \
+ { \
+- struct ieee754_csr ieee754_csr_save; \
++ struct _ieee754_csr ieee754_csr_save; \
+ s = f1 (s, t); \
+ ieee754_csr_save = ieee754_csr; \
+ s = f2 (s, r); \
+@@ -616,7 +626,7 @@ static int fpux_emu(struct pt_regs *xcp,
+ {
+ unsigned rcsr = 0; /* resulting csr */
+- fpuemuprivate.stats.cp1xops++;
++ fpuemustats.cp1xops++;
+
+ switch (MIPSInst_FMA_FFMT(ir)) {
+ case s_fmt:{ /* 0 */
+@@ -628,12 +638,12 @@ static int fpux_emu(struct pt_regs *xcp,
+
switch (MIPSInst_FUNC(ir)) {
case lwxc1_op:
- va = REG_TO_VA(xcp->regs[MIPSInst_FR(ir)] +
+ va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
- fpuemuprivate.stats.loads++;
-@@ -648,7 +648,7 @@ static int fpux_emu(struct pt_regs *xcp,
+- fpuemuprivate.stats.loads++;
++ fpuemustats.loads++;
+ if (get_user(val, va)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ #ifdef SINGLE_ONLY_FPU
+@@ -648,10 +658,10 @@ static int fpux_emu(struct pt_regs *xcp,
break;
case swxc1_op:
@@ -18204,17 +26826,45 @@
+ va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
- fpuemuprivate.stats.stores++;
-@@ -724,7 +724,7 @@ static int fpux_emu(struct pt_regs *xcp,
+- fpuemuprivate.stats.stores++;
++ fpuemustats.stores++;
+ #ifdef SINGLE_ONLY_FPU
+ if (MIPSInst_FS(ir) & 1) {
+ /* illegal register in single-float
+@@ -663,7 +673,7 @@ static int fpux_emu(struct pt_regs *xcp,
+ SIFROMREG(val, MIPSInst_FS(ir));
+ if (put_user(val, va)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ break;
+@@ -699,8 +709,6 @@ static int fpux_emu(struct pt_regs *xcp,
+ rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
+
+ ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
+- if (ieee754_csr.nod)
+- ctx->fcr31 |= 0x1000000;
+ if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
+ /*printk ("SIGFPE: fpu csr = %08x\n",
+ ctx->fcr31); */
+@@ -724,25 +732,25 @@ static int fpux_emu(struct pt_regs *xcp,
+
switch (MIPSInst_FUNC(ir)) {
case ldxc1_op:
- va = REG_TO_VA(xcp->regs[MIPSInst_FR(ir)] +
+ va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
- fpuemuprivate.stats.loads++;
-@@ -736,7 +736,7 @@ static int fpux_emu(struct pt_regs *xcp,
+- fpuemuprivate.stats.loads++;
++ fpuemustats.loads++;
+ if (get_user(val, va)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ DITOREG(val, MIPSInst_FD(ir));
break;
case sdxc1_op:
@@ -18222,8 +26872,25 @@
+ va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
- fpuemuprivate.stats.stores++;
-@@ -1282,7 +1282,7 @@ static int fpu_emu(struct pt_regs *xcp,
+- fpuemuprivate.stats.stores++;
++ fpuemustats.stores++;
+ DIFROMREG(val, MIPSInst_FS(ir));
+ if (put_user(val, va)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ break;
+@@ -810,7 +818,7 @@ static int fpu_emu(struct pt_regs *xcp,
+ #endif
+ } rv; /* resulting value */
+
+- fpuemuprivate.stats.cp1ops++;
++ fpuemustats.cp1ops++;
+ switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
+ case s_fmt:{ /* 0 */
+ union {
+@@ -1282,7 +1290,7 @@ static int fpu_emu(struct pt_regs *xcp,
int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp,
struct mips_fpu_soft_struct *ctx)
{
@@ -18232,9 +26899,51 @@
mips_instruction insn;
int sig = 0;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/math-emu/dsemul.c linux_HEAD/arch/mips/math-emu/dsemul.c
---- linux-2.6.11.6/arch/mips/math-emu/dsemul.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/math-emu/dsemul.c 2005-03-21 20:03:46.000000000 +0100
+@@ -1291,18 +1299,23 @@ int fpu_emulator_cop1Handler(int xcptno,
+ prevepc = xcp->cp0_epc;
+
+ if (get_user(insn, (mips_instruction *) xcp->cp0_epc)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return SIGBUS;
+ }
+ if (insn == 0)
+ xcp->cp0_epc += 4; /* skip nops */
+ else {
+- /* Update ieee754_csr. Only relevant if we have a
+- h/w FPU */
+- ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0;
+- ieee754_csr.rm = ieee_rm[ctx->fcr31 & 0x3];
+- ieee754_csr.cx = (ctx->fcr31 >> 12) & 0x1f;
++ /*
++ * The 'ieee754_csr' is an alias of
++ * ctx->fcr31. No need to copy ctx->fcr31 to
++ * ieee754_csr. But ieee754_csr.rm is ieee
++ * library modes. (not mips rounding mode)
++ */
++ /* convert to ieee library modes */
++ ieee754_csr.rm = ieee_rm[ieee754_csr.rm];
+ sig = cop1Emulate(xcp, ctx);
++ /* revert to mips rounding mode */
++ ieee754_csr.rm = mips_rm[ieee754_csr.rm];
+ }
+
+ if (cpu_has_fpu)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/math-emu/dp_sqrt.c linux_HEAD/arch/mips/math-emu/dp_sqrt.c
+--- linux-2.6.12/arch/mips/math-emu/dp_sqrt.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/math-emu/dp_sqrt.c 2005-04-30 15:33:39.000000000 +0200
+@@ -37,7 +37,7 @@ static const unsigned table[] = {
+
+ ieee754dp ieee754dp_sqrt(ieee754dp x)
+ {
+- struct ieee754_csr oldcsr;
++ struct _ieee754_csr oldcsr;
+ ieee754dp y, z, t;
+ unsigned scalx, yh;
+ COMPXDP;
+diff -urpNX dontdiff linux-2.6.12/arch/mips/math-emu/dsemul.c linux_HEAD/arch/mips/math-emu/dsemul.c
+--- linux-2.6.12/arch/mips/math-emu/dsemul.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/math-emu/dsemul.c 2005-05-14 14:38:21.000000000 +0200
@@ -28,9 +28,6 @@
#endif
#define __mips 4
@@ -18267,7 +26976,12 @@
fr = (struct emuframe *) dsemul_insns;
/* Verify that the stack pointer is not competely insane */
-@@ -108,7 +105,7 @@ int mips_dsemul(struct pt_regs *regs, mi
+@@ -104,11 +101,11 @@ int mips_dsemul(struct pt_regs *regs, mi
+ err |= __put_user(cpc, &fr->epc);
+
+ if (unlikely(err)) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
return SIGBUS;
}
@@ -18285,8 +26999,17 @@
u32 insn, cookie;
int err = 0;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/math-emu/dsemul.h linux_HEAD/arch/mips/math-emu/dsemul.h
---- linux-2.6.11.6/arch/mips/math-emu/dsemul.h 2005-03-26 04:28:23.000000000 +0100
+@@ -141,7 +138,7 @@ int do_dsemulret(struct pt_regs *xcp)
+ err |= __get_user(cookie, &fr->cookie);
+
+ if (unlikely(err || (insn != BADINST) || (cookie != BD_COOKIE))) {
+- fpuemuprivate.stats.errors++;
++ fpuemustats.errors++;
+ return 0;
+ }
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/math-emu/dsemul.h linux_HEAD/arch/mips/math-emu/dsemul.h
+--- linux-2.6.12/arch/mips/math-emu/dsemul.h 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/math-emu/dsemul.h 2005-02-28 22:37:28.000000000 +0100
@@ -1,11 +1,5 @@
-typedef long gpreg_t;
@@ -18302,9 +27025,354 @@
/* Instruction which will always cause an address error */
#define AdELOAD 0x8c000001 /* lw $0,1($0) */
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/math-emu/kernel_linkage.c linux_HEAD/arch/mips/math-emu/kernel_linkage.c
---- linux-2.6.11.6/arch/mips/math-emu/kernel_linkage.c 2005-03-26 04:28:14.000000000 +0100
-+++ linux_HEAD/arch/mips/math-emu/kernel_linkage.c 2005-02-28 22:37:28.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/math-emu/ieee754.c linux_HEAD/arch/mips/math-emu/ieee754.c
+--- linux-2.6.12/arch/mips/math-emu/ieee754.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/math-emu/ieee754.c 2005-04-30 15:33:39.000000000 +0200
+@@ -50,10 +50,6 @@ const char *const ieee754_cname[] = {
+ "SNaN",
+ };
+
+-/* the control status register
+-*/
+-struct ieee754_csr ieee754_csr;
+-
+ /* special constants
+ */
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/math-emu/ieee754.h linux_HEAD/arch/mips/math-emu/ieee754.h
+--- linux-2.6.12/arch/mips/math-emu/ieee754.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/math-emu/ieee754.h 2005-04-30 15:33:39.000000000 +0200
+@@ -1,13 +1,8 @@
+-/* single and double precision fp ops
+- * missing extended precision.
+-*/
+ /*
+ * MIPS floating point support
+ * Copyright (C) 1994-2000 Algorithmics Ltd.
+ * http://www.algor.co.uk
+ *
+- * ########################################################################
+- *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+@@ -21,20 +16,16 @@
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+- * ########################################################################
+- */
+-
+-/**************************************************************************
+ * Nov 7, 2000
+ * Modification to allow integration with Linux kernel
+ *
+ * Kevin D. Kissell, kevink at mips.com and Carsten Langgard, carstenl at mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+- *************************************************************************/
++ */
+
+-#ifdef __KERNEL__
+-/* Going from Algorithmics to Linux native environment, add this */
++#include <asm/byteorder.h>
+ #include <linux/types.h>
++#include <linux/sched.h>
+
+ /*
+ * Not very pretty, but the Linux kernel's normal va_list definition
+@@ -44,18 +35,7 @@
+ #include <stdarg.h>
+ #endif
+
+-#else
+-
+-/* Note that __KERNEL__ is taken to mean Linux kernel */
+-
+-#if #system(OpenBSD)
+-#include <machine/types.h>
+-#endif
+-#include <machine/endian.h>
+-
+-#endif /* __KERNEL__ */
+-
+-#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
++#ifdef __LITTLE_ENDIAN
+ struct ieee754dp_konst {
+ unsigned mantlo:32;
+ unsigned manthi:20;
+@@ -86,13 +66,14 @@ typedef union _ieee754sp {
+ } ieee754sp;
+ #endif
+
+-#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__)
++#ifdef __BIG_ENDIAN
+ struct ieee754dp_konst {
+ unsigned sign:1;
+ unsigned bexp:11;
+ unsigned manthi:20;
+ unsigned mantlo:32;
+ };
++
+ typedef union _ieee754dp {
+ struct ieee754dp_konst oparts;
+ struct {
+@@ -251,93 +232,109 @@ extern const char *const ieee754_cname[]
+
+ /* "normal" comparisons
+ */
+-static __inline int ieee754sp_eq(ieee754sp x, ieee754sp y)
++static inline int ieee754sp_eq(ieee754sp x, ieee754sp y)
+ {
+ return ieee754sp_cmp(x, y, IEEE754_CEQ, 0);
+ }
+
+-static __inline int ieee754sp_ne(ieee754sp x, ieee754sp y)
++static inline int ieee754sp_ne(ieee754sp x, ieee754sp y)
+ {
+ return ieee754sp_cmp(x, y,
+ IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
+ }
+
+-static __inline int ieee754sp_lt(ieee754sp x, ieee754sp y)
++static inline int ieee754sp_lt(ieee754sp x, ieee754sp y)
+ {
+ return ieee754sp_cmp(x, y, IEEE754_CLT, 0);
+ }
+
+-static __inline int ieee754sp_le(ieee754sp x, ieee754sp y)
++static inline int ieee754sp_le(ieee754sp x, ieee754sp y)
+ {
+ return ieee754sp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
+ }
+
+-static __inline int ieee754sp_gt(ieee754sp x, ieee754sp y)
++static inline int ieee754sp_gt(ieee754sp x, ieee754sp y)
+ {
+ return ieee754sp_cmp(x, y, IEEE754_CGT, 0);
+ }
+
+
+-static __inline int ieee754sp_ge(ieee754sp x, ieee754sp y)
++static inline int ieee754sp_ge(ieee754sp x, ieee754sp y)
+ {
+ return ieee754sp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
+ }
+
+-static __inline int ieee754dp_eq(ieee754dp x, ieee754dp y)
++static inline int ieee754dp_eq(ieee754dp x, ieee754dp y)
+ {
+ return ieee754dp_cmp(x, y, IEEE754_CEQ, 0);
+ }
+
+-static __inline int ieee754dp_ne(ieee754dp x, ieee754dp y)
++static inline int ieee754dp_ne(ieee754dp x, ieee754dp y)
+ {
+ return ieee754dp_cmp(x, y,
+ IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
+ }
+
+-static __inline int ieee754dp_lt(ieee754dp x, ieee754dp y)
++static inline int ieee754dp_lt(ieee754dp x, ieee754dp y)
+ {
+ return ieee754dp_cmp(x, y, IEEE754_CLT, 0);
+ }
+
+-static __inline int ieee754dp_le(ieee754dp x, ieee754dp y)
++static inline int ieee754dp_le(ieee754dp x, ieee754dp y)
+ {
+ return ieee754dp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
+ }
+
+-static __inline int ieee754dp_gt(ieee754dp x, ieee754dp y)
++static inline int ieee754dp_gt(ieee754dp x, ieee754dp y)
+ {
+ return ieee754dp_cmp(x, y, IEEE754_CGT, 0);
+ }
+
+-static __inline int ieee754dp_ge(ieee754dp x, ieee754dp y)
++static inline int ieee754dp_ge(ieee754dp x, ieee754dp y)
+ {
+ return ieee754dp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
+ }
+
+
+-/* like strtod
+-*/
++/*
++ * Like strtod
++ */
+ ieee754dp ieee754dp_fstr(const char *s, char **endp);
+ char *ieee754dp_tstr(ieee754dp x, int prec, int fmt, int af);
+
+
+-/* the control status register
+-*/
+-struct ieee754_csr {
+- unsigned pad:13;
++/*
++ * The control status register
++ */
++struct _ieee754_csr {
++#ifdef __BIG_ENDIAN
++ unsigned pad0:7;
+ unsigned nod:1; /* set 1 for no denormalised numbers */
+- unsigned cx:5; /* exceptions this operation */
++ unsigned c:1; /* condition */
++ unsigned pad1:5;
++ unsigned cx:6; /* exceptions this operation */
+ unsigned mx:5; /* exception enable mask */
+ unsigned sx:5; /* exceptions total */
+ unsigned rm:2; /* current rounding mode */
++#endif
++#ifdef __LITTLE_ENDIAN
++ unsigned rm:2; /* current rounding mode */
++ unsigned sx:5; /* exceptions total */
++ unsigned mx:5; /* exception enable mask */
++ unsigned cx:6; /* exceptions this operation */
++ unsigned pad1:5;
++ unsigned c:1; /* condition */
++ unsigned nod:1; /* set 1 for no denormalised numbers */
++ unsigned pad0:7;
++#endif
+ };
+-extern struct ieee754_csr ieee754_csr;
++#define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.soft.fcr31))
+
+-static __inline unsigned ieee754_getrm(void)
++static inline unsigned ieee754_getrm(void)
+ {
+ return (ieee754_csr.rm);
+ }
+-static __inline unsigned ieee754_setrm(unsigned rm)
++static inline unsigned ieee754_setrm(unsigned rm)
+ {
+ return (ieee754_csr.rm = rm);
+ }
+@@ -345,14 +342,14 @@ static __inline unsigned ieee754_setrm(u
+ /*
+ * get current exceptions
+ */
+-static __inline unsigned ieee754_getcx(void)
++static inline unsigned ieee754_getcx(void)
+ {
+ return (ieee754_csr.cx);
+ }
+
+ /* test for current exception condition
+ */
+-static __inline int ieee754_cxtest(unsigned n)
++static inline int ieee754_cxtest(unsigned n)
+ {
+ return (ieee754_csr.cx & n);
+ }
+@@ -360,21 +357,21 @@ static __inline int ieee754_cxtest(unsig
+ /*
+ * get sticky exceptions
+ */
+-static __inline unsigned ieee754_getsx(void)
++static inline unsigned ieee754_getsx(void)
+ {
+ return (ieee754_csr.sx);
+ }
+
+ /* clear sticky conditions
+ */
+-static __inline unsigned ieee754_clrsx(void)
++static inline unsigned ieee754_clrsx(void)
+ {
+ return (ieee754_csr.sx = 0);
+ }
+
+ /* test for sticky exception condition
+ */
+-static __inline int ieee754_sxtest(unsigned n)
++static inline int ieee754_sxtest(unsigned n)
+ {
+ return (ieee754_csr.sx & n);
+ }
+@@ -406,52 +403,34 @@ extern const struct ieee754sp_konst __ie
+ #define ieee754dp_spcvals ((const ieee754dp *)__ieee754dp_spcvals)
+ #define ieee754sp_spcvals ((const ieee754sp *)__ieee754sp_spcvals)
+
+-/* return infinity with given sign
+-*/
+-#define ieee754dp_inf(sn) \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
+-#define ieee754dp_zero(sn) \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
+-#define ieee754dp_one(sn) \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
+-#define ieee754dp_ten(sn) \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
+-#define ieee754dp_indef() \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF])
+-#define ieee754dp_max(sn) \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
+-#define ieee754dp_min(sn) \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
+-#define ieee754dp_mind(sn) \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
+-#define ieee754dp_1e31() \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31])
+-#define ieee754dp_1e63() \
+- (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63])
+-
+-#define ieee754sp_inf(sn) \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
+-#define ieee754sp_zero(sn) \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
+-#define ieee754sp_one(sn) \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
+-#define ieee754sp_ten(sn) \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
+-#define ieee754sp_indef() \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
+-#define ieee754sp_max(sn) \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
+-#define ieee754sp_min(sn) \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
+-#define ieee754sp_mind(sn) \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
+-#define ieee754sp_1e31() \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
+-#define ieee754sp_1e63() \
+- (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
++/*
++ * Return infinity with given sign
++ */
++#define ieee754dp_inf(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
++#define ieee754dp_zero(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
++#define ieee754dp_one(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
++#define ieee754dp_ten(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
++#define ieee754dp_indef() (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF])
++#define ieee754dp_max(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
++#define ieee754dp_min(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
++#define ieee754dp_mind(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
++#define ieee754dp_1e31() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31])
++#define ieee754dp_1e63() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63])
++
++#define ieee754sp_inf(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
++#define ieee754sp_zero(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
++#define ieee754sp_one(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
++#define ieee754sp_ten(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
++#define ieee754sp_indef() (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
++#define ieee754sp_max(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
++#define ieee754sp_min(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
++#define ieee754sp_mind(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
++#define ieee754sp_1e31() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
++#define ieee754sp_1e63() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
+
+-/* indefinite integer value
+-*/
++/*
++ * Indefinite integer value
++ */
+ #define ieee754si_indef() INT_MAX
+ #ifdef LONG_LONG_MAX
+ #define ieee754di_indef() LONG_LONG_MAX
+diff -urpNX dontdiff linux-2.6.12/arch/mips/math-emu/kernel_linkage.c linux_HEAD/arch/mips/math-emu/kernel_linkage.c
+--- linux-2.6.12/arch/mips/math-emu/kernel_linkage.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/math-emu/kernel_linkage.c 2005-05-14 14:38:21.000000000 +0200
@@ -27,8 +27,6 @@
#include <asm/fpu_emulator.h>
@@ -18314,8 +27382,40 @@
#define SIGNALLING_NAN 0x7ff800007ff80000LL
void fpu_emulator_init_fpu(void)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mips-boards/atlas/atlas_int.c linux_HEAD/arch/mips/mips-boards/atlas/atlas_int.c
---- linux-2.6.11.6/arch/mips/mips-boards/atlas/atlas_int.c 2005-03-26 04:28:24.000000000 +0100
+@@ -65,7 +63,6 @@ int fpu_emulator_save_context(struct sig
+ &sc->sc_fpregs[i]);
+ }
+ err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+- err |= __put_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
+
+ return err;
+ }
+@@ -81,7 +78,6 @@ int fpu_emulator_restore_context(struct
+ &sc->sc_fpregs[i]);
+ }
+ err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+- err |= __get_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
+
+ return err;
+ }
+@@ -102,7 +98,6 @@ int fpu_emulator_save_context32(struct s
+ &sc->sc_fpregs[i]);
+ }
+ err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+- err |= __put_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
+
+ return err;
+ }
+@@ -118,7 +113,6 @@ int fpu_emulator_restore_context32(struc
+ &sc->sc_fpregs[i]);
+ }
+ err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+- err |= __get_user(fpuemuprivate.eir, &sc->sc_fpc_eir);
+
+ return err;
+ }
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mips-boards/atlas/atlas_int.c linux_HEAD/arch/mips/mips-boards/atlas/atlas_int.c
+--- linux-2.6.12/arch/mips/mips-boards/atlas/atlas_int.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/mips-boards/atlas/atlas_int.c 2005-02-28 16:56:42.000000000 +0100
@@ -76,14 +76,13 @@ static void end_atlas_irq(unsigned int i
}
@@ -18339,8 +27439,36 @@
};
static inline int ls1bit32(unsigned int x)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mips-boards/generic/init.c linux_HEAD/arch/mips/mips-boards/generic/init.c
---- linux-2.6.11.6/arch/mips/mips-boards/generic/init.c 2005-03-26 04:28:14.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mips-boards/atlas/atlas_setup.c linux_HEAD/arch/mips/mips-boards/atlas/atlas_setup.c
+--- linux-2.6.12/arch/mips/mips-boards/atlas/atlas_setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mips-boards/atlas/atlas_setup.c 2005-07-01 12:09:18.000000000 +0200
+@@ -50,8 +50,10 @@ const char *get_system_type(void)
+ return "MIPS Atlas";
+ }
+
+-static int __init atlas_setup(void)
++void __init plat_setup(void)
+ {
++ mips_pcibios_init();
++
+ ioport_resource.end = 0x7fffffff;
+
+ serial_init ();
+@@ -64,12 +66,8 @@ static int __init atlas_setup(void)
+ board_time_init = mips_time_init;
+ board_timer_setup = mips_timer_setup;
+ rtc_get_time = mips_rtc_get_time;
+-
+- return 0;
+ }
+
+-early_initcall(atlas_setup);
+-
+ static void __init serial_init(void)
+ {
+ #ifdef CONFIG_SERIAL_8250
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mips-boards/generic/init.c linux_HEAD/arch/mips/mips-boards/generic/init.c
+--- linux-2.6.12/arch/mips/mips-boards/generic/init.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/mips-boards/generic/init.c 2005-02-17 21:48:56.000000000 +0100
@@ -1,6 +1,8 @@
/*
@@ -18460,9 +27588,9 @@
break;
default:
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mips-boards/generic/pci.c linux_HEAD/arch/mips/mips-boards/generic/pci.c
---- linux-2.6.11.6/arch/mips/mips-boards/generic/pci.c 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/mips-boards/generic/pci.c 2005-02-17 21:48:56.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mips-boards/generic/pci.c linux_HEAD/arch/mips/mips-boards/generic/pci.c
+--- linux-2.6.12/arch/mips/mips-boards/generic/pci.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mips-boards/generic/pci.c 2005-07-01 12:09:18.000000000 +0200
@@ -1,6 +1,8 @@
/*
- * Carsten Langgaard, carstenl at mips.com
@@ -18474,7 +27602,13 @@
*
* Copyright (C) 2004 by Ralf Baechle (ralf at linux-mips.org)
*
-@@ -25,59 +27,41 @@
+@@ -19,65 +21,46 @@
+ *
+ * MIPS boards specific PCI support.
+ */
+-#include <linux/config.h>
+ #include <linux/types.h>
+ #include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
@@ -18541,7 +27675,7 @@
.flags = IORESOURCE_IO,
};
-@@ -89,7 +73,6 @@ static struct pci_controller bonito64_co
+@@ -89,7 +72,6 @@ static struct pci_controller bonito64_co
.pci_ops = &bonito64_pci_ops,
.io_resource = &bonito64_io_resource,
.mem_resource = &bonito64_mem_resource,
@@ -18549,7 +27683,7 @@
.io_offset = 0x00000000UL,
};
-@@ -97,21 +80,18 @@ static struct pci_controller gt64120_con
+@@ -97,21 +79,18 @@ static struct pci_controller gt64120_con
.pci_ops = >64120_pci_ops,
.io_resource = >64120_io_resource,
.mem_resource = >64120_mem_resource,
@@ -18566,14 +27700,15 @@
- .io_offset = 0x00000000UL,
};
- static int __init pcibios_init(void)
+-static int __init pcibios_init(void)
++void __init mips_pcibios_init(void)
{
struct pci_controller *controller;
+ unsigned long start, end, map, start1, end1, map1, map2, map3, mask;
switch (mips_revision_corid) {
case MIPS_REVISION_CORID_QED_RM5261:
-@@ -130,29 +110,138 @@ static int __init pcibios_init(void)
+@@ -130,34 +109,139 @@ static int __init pcibios_init(void)
(0 << GT_PCI0_CFGADDR_DEVNUM_SHF) | /* GT64120 dev */
(0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | /* Function 0*/
((0x20/4) << GT_PCI0_CFGADDR_REGNUM_SHF) | /* BAR 4*/
@@ -18703,7 +27838,8 @@
controller = &msc_controller;
break;
default:
- return 1;
+- return 1;
++ return;
}
+ if (controller->io_resource->start < 0x00001000UL) /* FIXME */
@@ -18713,8 +27849,39 @@
ioport_resource.end = controller->io_resource->end;
register_pci_controller (controller);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mips-boards/sead/sead_int.c linux_HEAD/arch/mips/mips-boards/sead/sead_int.c
---- linux-2.6.11.6/arch/mips/mips-boards/sead/sead_int.c 2005-03-26 04:28:29.000000000 +0100
+-
+- return 0;
+ }
+-
+-early_initcall(pcibios_init);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mips-boards/malta/malta_setup.c linux_HEAD/arch/mips/mips-boards/malta/malta_setup.c
+--- linux-2.6.12/arch/mips/mips-boards/malta/malta_setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mips-boards/malta/malta_setup.c 2005-07-01 12:09:18.000000000 +0200
+@@ -111,10 +111,12 @@ void __init fd_activate(void)
+ }
+ #endif
+
+-static int __init malta_setup(void)
++void __init plat_setup(void)
+ {
+ unsigned int i;
+
++ mips_pcibios_init();
++
+ /* Request I/O space for devices used on the Malta board. */
+ for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
+ request_resource(&ioport_resource, standard_io_resources+i);
+@@ -224,8 +226,4 @@ static int __init malta_setup(void)
+ board_time_init = mips_time_init;
+ board_timer_setup = mips_timer_setup;
+ rtc_get_time = mips_rtc_get_time;
+-
+- return 0;
+ }
+-
+-early_initcall(malta_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mips-boards/sead/sead_int.c linux_HEAD/arch/mips/mips-boards/sead/sead_int.c
+--- linux-2.6.12/arch/mips/mips-boards/sead/sead_int.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/mips-boards/sead/sead_int.c 2005-02-17 21:48:56.000000000 +0100
@@ -2,6 +2,7 @@
* Carsten Langgaard, carstenl at mips.com
@@ -18750,10 +27917,63 @@
-
- mips_cpu_irq_init(0);
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/c-r4k.c linux_HEAD/arch/mips/mm/c-r4k.c
---- linux-2.6.11.6/arch/mips/mm/c-r4k.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/mm/c-r4k.c 2005-03-21 20:03:46.000000000 +0100
-@@ -372,12 +372,21 @@ static inline void local_r4k_flush_cache
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mips-boards/sead/sead_setup.c linux_HEAD/arch/mips/mips-boards/sead/sead_setup.c
+--- linux-2.6.12/arch/mips/mips-boards/sead/sead_setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mips-boards/sead/sead_setup.c 2005-07-01 12:09:18.000000000 +0200
+@@ -57,8 +57,6 @@ static void __init sead_setup(void)
+ mips_reboot_setup();
+ }
+
+-early_initcall(sead_setup);
+-
+ static void __init serial_init(void)
+ {
+ #ifdef CONFIG_SERIAL_8250
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/Makefile linux_HEAD/arch/mips/mm/Makefile
+--- linux-2.6.12/arch/mips/mm/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/Makefile 2005-07-07 11:22:49.000000000 +0200
+@@ -9,8 +9,8 @@ obj-$(CONFIG_MIPS32) += ioremap.o pgtab
+ obj-$(CONFIG_MIPS64) += pgtable-64.o
+ obj-$(CONFIG_HIGHMEM) += highmem.o
+
+-obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+-obj-$(CONFIG_CPU_MIPS64) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
++obj-$(CONFIG_CPU_MIPS32_R1) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
++obj-$(CONFIG_CPU_MIPS64_R1) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+ obj-$(CONFIG_CPU_NEVADA) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+ obj-$(CONFIG_CPU_R10000) += c-r4k.o cex-gen.o pg-r4k.o tlb-andes.o
+ obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o pg-r4k.o
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/c-r3k.c linux_HEAD/arch/mips/mm/c-r3k.c
+--- linux-2.6.12/arch/mips/mm/c-r3k.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/c-r3k.c 2005-07-01 12:09:18.000000000 +0200
+@@ -221,12 +221,14 @@ static inline unsigned long get_phys_pag
+ struct mm_struct *mm)
+ {
+ pgd_t *pgd;
++ pud_t *pud;
+ pmd_t *pmd;
+ pte_t *pte;
+ unsigned long physpage;
+
+ pgd = pgd_offset(mm, addr);
+- pmd = pmd_offset(pgd, addr);
++ pud = pud_offset(pgd, addr);
++ pmd = pmd_offset(pud, addr);
+ pte = pte_offset(pmd, addr);
+
+ if ((physpage = pte_val(*pte)) & _PAGE_VALID)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/c-r4k.c linux_HEAD/arch/mips/mm/c-r4k.c
+--- linux-2.6.12/arch/mips/mm/c-r4k.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/c-r4k.c 2005-07-10 12:16:57.000000000 +0200
+@@ -26,6 +26,7 @@
+ #include <asm/system.h>
+ #include <asm/mmu_context.h>
+ #include <asm/war.h>
++#include <asm/cacheflush.h> /* for run_uncached() */
+
+ static unsigned long icache_size, dcache_size, scache_size;
+
+@@ -372,12 +373,21 @@ static inline void local_r4k_flush_cache
int exec = vma->vm_flags & VM_EXEC;
struct mm_struct *mm = vma->vm_mm;
pgd_t *pgdp;
@@ -18776,7 +27996,7 @@
ptep = pte_offset(pmdp, page);
/*
-@@ -419,8 +428,8 @@ static inline void local_r4k_flush_cache
+@@ -419,8 +429,8 @@ static inline void local_r4k_flush_cache
if (cpu_has_vtag_icache) {
int cpu = smp_processor_id();
@@ -18787,7 +28007,7 @@
} else
r4k_blast_icache_page_indexed(page);
}
-@@ -430,13 +439,6 @@ static void r4k_flush_cache_page(struct
+@@ -430,13 +440,6 @@ static void r4k_flush_cache_page(struct
{
struct flush_cache_page_args args;
@@ -18801,7 +28021,7 @@
args.vma = vma;
args.page = page;
-@@ -454,8 +456,8 @@ static void r4k_flush_data_cache_page(un
+@@ -454,8 +457,8 @@ static void r4k_flush_data_cache_page(un
}
struct flush_icache_range_args {
@@ -18812,7 +28032,7 @@
};
static inline void local_r4k_flush_icache_range(void *args)
-@@ -517,7 +519,8 @@ static inline void local_r4k_flush_icach
+@@ -517,7 +520,8 @@ static inline void local_r4k_flush_icach
}
}
@@ -18822,7 +28042,7 @@
{
struct flush_icache_range_args args;
-@@ -1011,9 +1014,19 @@ static void __init probe_pcache(void)
+@@ -1011,9 +1015,19 @@ static void __init probe_pcache(void)
* normally they'd suffer from aliases but magic in the hardware deals
* with that for us so we don't need to take care ourselves.
*/
@@ -18845,7 +28065,7 @@
switch (c->cputype) {
case CPU_20KC:
-@@ -1024,7 +1037,11 @@ static void __init probe_pcache(void)
+@@ -1024,7 +1038,11 @@ static void __init probe_pcache(void)
c->icache.flags |= MIPS_CACHE_VTAG;
break;
@@ -18857,7 +28077,33 @@
c->icache.flags |= MIPS_CACHE_IC_F_DC;
break;
}
-@@ -1212,9 +1229,6 @@ void __init ld_mmu_r4xx0(void)
+@@ -1102,7 +1120,6 @@ static int __init probe_scache(void)
+ return 1;
+ }
+
+-typedef int (*probe_func_t)(unsigned long);
+ extern int r5k_sc_init(void);
+ extern int rm7k_sc_init(void);
+
+@@ -1110,7 +1127,6 @@ static void __init setup_scache(void)
+ {
+ struct cpuinfo_mips *c = ¤t_cpu_data;
+ unsigned int config = read_c0_config();
+- probe_func_t probe_scache_kseg1;
+ int sc_present = 0;
+
+ /*
+@@ -1123,8 +1139,7 @@ static void __init setup_scache(void)
+ case CPU_R4000MC:
+ case CPU_R4400SC:
+ case CPU_R4400MC:
+- probe_scache_kseg1 = (probe_func_t) (CKSEG1ADDR(&probe_scache));
+- sc_present = probe_scache_kseg1(config);
++ sc_present = run_uncached(probe_scache);
+ if (sc_present)
+ c->options |= MIPS_CPU_CACHE_CDEX_S;
+ break;
+@@ -1212,9 +1227,6 @@ void __init ld_mmu_r4xx0(void)
probe_pcache();
setup_scache();
@@ -18867,8 +28113,8 @@
r4k_blast_dcache_page_setup();
r4k_blast_dcache_page_indexed_setup();
r4k_blast_dcache_setup();
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/c-sb1.c linux_HEAD/arch/mips/mm/c-sb1.c
---- linux-2.6.11.6/arch/mips/mm/c-sb1.c 2005-04-02 23:39:54.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/c-sb1.c linux_HEAD/arch/mips/mm/c-sb1.c
+--- linux-2.6.12/arch/mips/mm/c-sb1.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/mm/c-sb1.c 2005-03-21 20:03:46.000000000 +0100
@@ -235,7 +235,7 @@ static inline void __sb1_flush_icache_ra
/*
@@ -18879,9 +28125,43 @@
{
__sb1_writeback_inv_dcache_all();
__sb1_flush_icache_all();
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/cache.c linux_HEAD/arch/mips/mm/cache.c
---- linux-2.6.11.6/arch/mips/mm/cache.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/mm/cache.c 2005-03-21 20:03:46.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/c-tx39.c linux_HEAD/arch/mips/mm/c-tx39.c
+--- linux-2.6.12/arch/mips/mm/c-tx39.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/c-tx39.c 2005-07-10 12:16:57.000000000 +0200
+@@ -183,6 +183,7 @@ static void tx39_flush_cache_page(struct
+ int exec = vma->vm_flags & VM_EXEC;
+ struct mm_struct *mm = vma->vm_mm;
+ pgd_t *pgdp;
++ pud_t *pudp;
+ pmd_t *pmdp;
+ pte_t *ptep;
+
+@@ -195,7 +196,8 @@ static void tx39_flush_cache_page(struct
+
+ page &= PAGE_MASK;
+ pgdp = pgd_offset(mm, page);
+- pmdp = pmd_offset(pgdp, page);
++ pudp = pud_offset(pgdp, page);
++ pmdp = pmd_offset(pudp, page);
+ ptep = pte_offset(pmdp, page);
+
+ /*
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/cache.c linux_HEAD/arch/mips/mm/cache.c
+--- linux-2.6.12/arch/mips/mm/cache.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/cache.c 2005-07-07 11:22:49.000000000 +0200
+@@ -23,8 +23,10 @@ void (*__flush_cache_all)(void);
+ void (*flush_cache_mm)(struct mm_struct *mm);
+ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
+ unsigned long end);
+-void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
+-void (*flush_icache_range)(unsigned long start, unsigned long end);
++void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
++ unsigned long pfn);
++void (*flush_icache_range)(unsigned long __user start,
++ unsigned long __user end);
+ void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page);
+
+ /* MIPS specific cache operations */
@@ -32,6 +34,8 @@ void (*flush_cache_sigtramp)(unsigned lo
void (*flush_data_cache_page)(unsigned long addr);
void (*flush_icache_all)(void);
@@ -18900,49 +28180,118 @@
+asmlinkage int sys_cacheflush(unsigned long __user addr,
+ unsigned long bytes, unsigned int cache)
{
-- if (verify_area(VERIFY_WRITE, (void *) addr, bytes))
-+ if (verify_area(VERIFY_WRITE, (void __user *) addr, bytes))
+- if (!access_ok(VERIFY_WRITE, (void *) addr, bytes))
++ if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
return -EFAULT;
flush_icache_range(addr, addr + bytes);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/dma-ip32.c linux_HEAD/arch/mips/mm/dma-ip32.c
---- linux-2.6.11.6/arch/mips/mm/dma-ip32.c 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/mm/dma-ip32.c 2005-02-17 21:48:56.000000000 +0100
-@@ -175,7 +175,7 @@ int dma_map_sg(struct device *dev, struc
+@@ -114,8 +118,8 @@ void __init cpu_cache_init(void)
+ #if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \
+ defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \
+ defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \
+- defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32) || \
+- defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \
++ defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32_R1) || \
++ defined(CONFIG_CPU_MIPS64_R1) || defined(CONFIG_CPU_TX49XX) || \
+ defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000)
+ ld_mmu_r4xx0();
+ #endif
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/dma-coherent.c linux_HEAD/arch/mips/mm/dma-coherent.c
+--- linux-2.6.12/arch/mips/mm/dma-coherent.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/dma-coherent.c 2005-04-14 16:40:13.000000000 +0200
+@@ -9,16 +9,16 @@
+ */
+ #include <linux/config.h>
+ #include <linux/types.h>
++#include <linux/dma-mapping.h>
+ #include <linux/mm.h>
+ #include <linux/module.h>
+ #include <linux/string.h>
+-#include <linux/pci.h>
- for (i = 0; i < nents; i++, sg++) {
- unsigned long addr;
--
-+
- addr = (unsigned long) page_address(sg->page)+sg->offset;
- if (addr)
- __dma_sync(addr, sg->length, direction);
-@@ -251,9 +251,9 @@ void dma_sync_single_for_cpu(struct devi
- size_t size, enum dma_data_direction direction)
+ #include <asm/cache.h>
+ #include <asm/io.h>
+
+ void *dma_alloc_noncoherent(struct device *dev, size_t size,
+- dma_addr_t * dma_handle, int gfp)
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
{
- unsigned long addr;
--
-+
- BUG_ON(direction == DMA_NONE);
--
-+
- dma_handle&=RAM_OFFSET_MASK;
- addr = dma_handle + PAGE_OFFSET;
- if(dma_handle>=256*1024*1024)
-@@ -315,9 +315,9 @@ void dma_sync_sg_for_cpu(struct device *
- enum dma_data_direction direction)
+ void *ret;
+ /* ignore region specifiers */
+@@ -39,7 +39,7 @@ void *dma_alloc_noncoherent(struct devic
+ EXPORT_SYMBOL(dma_alloc_noncoherent);
+
+ void *dma_alloc_coherent(struct device *dev, size_t size,
+- dma_addr_t * dma_handle, int gfp)
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
+ __attribute__((alias("dma_alloc_noncoherent")));
+
+ EXPORT_SYMBOL(dma_alloc_coherent);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/dma-ip27.c linux_HEAD/arch/mips/mm/dma-ip27.c
+--- linux-2.6.12/arch/mips/mm/dma-ip27.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/dma-ip27.c 2005-07-10 12:16:33.000000000 +0200
+@@ -22,7 +22,7 @@
+ pdev_to_baddr(to_pci_dev(dev), (addr))
+
+ void *dma_alloc_noncoherent(struct device *dev, size_t size,
+- dma_addr_t * dma_handle, int gfp)
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
{
- int i;
--
-+
- BUG_ON(direction == DMA_NONE);
--
-+
- /* Make sure that gcc doesn't leave the empty loop body. */
- for (i = 0; i < nelems; i++, sg++)
- __dma_sync((unsigned long)page_address(sg->page),
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/fault.c linux_HEAD/arch/mips/mm/fault.c
---- linux-2.6.11.6/arch/mips/mm/fault.c 2005-03-26 04:28:17.000000000 +0100
+ void *ret;
+
+@@ -44,7 +44,7 @@ void *dma_alloc_noncoherent(struct devic
+ EXPORT_SYMBOL(dma_alloc_noncoherent);
+
+ void *dma_alloc_coherent(struct device *dev, size_t size,
+- dma_addr_t * dma_handle, int gfp)
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
+ __attribute__((alias("dma_alloc_noncoherent")));
+
+ EXPORT_SYMBOL(dma_alloc_coherent);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/dma-ip32.c linux_HEAD/arch/mips/mm/dma-ip32.c
+--- linux-2.6.12/arch/mips/mm/dma-ip32.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/dma-ip32.c 2005-07-10 12:28:27.000000000 +0200
+@@ -37,7 +37,7 @@
+ #define RAM_OFFSET_MASK 0x3fffffff
+
+ void *dma_alloc_noncoherent(struct device *dev, size_t size,
+- dma_addr_t * dma_handle, int gfp)
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
+ {
+ void *ret;
+ /* ignore region specifiers */
+@@ -61,7 +61,7 @@ void *dma_alloc_noncoherent(struct devic
+ EXPORT_SYMBOL(dma_alloc_noncoherent);
+
+ void *dma_alloc_coherent(struct device *dev, size_t size,
+- dma_addr_t * dma_handle, int gfp)
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
+ {
+ void *ret;
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/dma-noncoherent.c linux_HEAD/arch/mips/mm/dma-noncoherent.c
+--- linux-2.6.12/arch/mips/mm/dma-noncoherent.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/dma-noncoherent.c 2005-04-08 22:40:41.000000000 +0200
+@@ -24,7 +24,7 @@
+ */
+
+ void *dma_alloc_noncoherent(struct device *dev, size_t size,
+- dma_addr_t * dma_handle, int gfp)
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
+ {
+ void *ret;
+ /* ignore region specifiers */
+@@ -45,7 +45,7 @@ void *dma_alloc_noncoherent(struct devic
+ EXPORT_SYMBOL(dma_alloc_noncoherent);
+
+ void *dma_alloc_coherent(struct device *dev, size_t size,
+- dma_addr_t * dma_handle, int gfp)
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
+ {
+ void *ret;
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/fault.c linux_HEAD/arch/mips/mm/fault.c
+--- linux-2.6.12/arch/mips/mm/fault.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/mm/fault.c 2005-03-01 22:49:39.000000000 +0100
@@ -25,6 +25,7 @@
#include <asm/system.h>
@@ -19003,9 +28352,9 @@
if (!pmd_present(*pmd_k))
goto no_context;
set_pmd(pmd, *pmd_k);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/init.c linux_HEAD/arch/mips/mm/init.c
---- linux-2.6.11.6/arch/mips/mm/init.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/mm/init.c 2005-03-21 20:03:46.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/init.c linux_HEAD/arch/mips/mm/init.c
+--- linux-2.6.12/arch/mips/mm/init.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/init.c 2005-07-10 12:16:33.000000000 +0200
@@ -83,7 +83,7 @@ pte_t *kmap_pte;
pgprot_t kmap_prot;
@@ -19071,9 +28420,9 @@
#endif /* CONFIG_HIGHMEM */
#ifndef CONFIG_DISCONTIGMEM
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/ioremap.c linux_HEAD/arch/mips/mm/ioremap.c
---- linux-2.6.11.6/arch/mips/mm/ioremap.c 2005-03-26 04:28:20.000000000 +0100
-+++ linux_HEAD/arch/mips/mm/ioremap.c 2005-02-17 21:48:57.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/ioremap.c linux_HEAD/arch/mips/mm/ioremap.c
+--- linux-2.6.12/arch/mips/mm/ioremap.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/ioremap.c 2005-07-01 12:09:18.000000000 +0200
@@ -79,9 +79,14 @@ static int remap_area_pages(unsigned lon
BUG();
spin_lock(&init_mm.page_table_lock);
@@ -19090,7 +28439,23 @@
if (!pmd)
break;
if (remap_area_pmd(pmd, address, end - address,
-@@ -141,7 +146,7 @@ void * __ioremap(phys_t phys_addr, phys_
+@@ -97,15 +102,6 @@ static int remap_area_pages(unsigned lon
+ }
+
+ /*
+- * Allow physical addresses to be fixed up to help 36 bit peripherals.
+- */
+-phys_t __attribute__ ((weak))
+-fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+-{
+- return phys_addr;
+-}
+-
+-/*
+ * Generic mapping function (not visible outside):
+ */
+
+@@ -141,7 +137,7 @@ void * __ioremap(phys_t phys_addr, phys_
*/
if (IS_LOW512(phys_addr) && IS_LOW512(last_addr) &&
flags == _CACHE_UNCACHED)
@@ -19099,7 +28464,7 @@
/*
* Don't allow anybody to remap normal RAM that we're using..
-@@ -180,7 +185,7 @@ void * __ioremap(phys_t phys_addr, phys_
+@@ -180,7 +176,7 @@ void * __ioremap(phys_t phys_addr, phys_
return (void *) (offset + (char *)addr);
}
@@ -19108,9 +28473,9 @@
void __iounmap(volatile void __iomem *addr)
{
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/pg-sb1.c linux_HEAD/arch/mips/mm/pg-sb1.c
---- linux-2.6.11.6/arch/mips/mm/pg-sb1.c 2005-03-26 04:28:39.000000000 +0100
-+++ linux_HEAD/arch/mips/mm/pg-sb1.c 2005-04-02 11:54:44.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/pg-sb1.c linux_HEAD/arch/mips/mm/pg-sb1.c
+--- linux-2.6.12/arch/mips/mm/pg-sb1.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/pg-sb1.c 2005-04-05 06:42:28.000000000 +0200
@@ -60,7 +60,8 @@ static inline void clear_page_cpu(void *
" .set noreorder \n"
#ifdef CONFIG_CPU_HAS_PREFETCH
@@ -19154,7 +28519,7 @@
+ for (i = 0; i < DM_NUM_CHANNELS; i++) {
+ const u64 base_val = CPHYSADDR(&page_descr[i]) |
+ V_DM_DSCR_BASE_RINGSZ(1);
-+ const volatile void *base_reg =
++ volatile void *base_reg =
+ IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
+
+ __raw_writeq(base_val, base_reg);
@@ -19231,8 +28596,8 @@
}
#else /* !CONFIG_SIBYTE_DMA_PAGEOPS */
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/pgtable-32.c linux_HEAD/arch/mips/mm/pgtable-32.c
---- linux-2.6.11.6/arch/mips/mm/pgtable-32.c 2005-03-26 04:28:15.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/pgtable-32.c linux_HEAD/arch/mips/mm/pgtable-32.c
+--- linux-2.6.12/arch/mips/mm/pgtable-32.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/mm/pgtable-32.c 2005-02-20 02:08:41.000000000 +0100
@@ -10,6 +10,7 @@
#include <linux/mm.h>
@@ -19296,8 +28661,112 @@
pte = pte_offset_kernel(pmd, vaddr);
pkmap_page_table = pte;
#endif
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/tlb-andes.c linux_HEAD/arch/mips/mm/tlb-andes.c
---- linux-2.6.11.6/arch/mips/mm/tlb-andes.c 2005-03-26 04:28:16.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/sc-rm7k.c linux_HEAD/arch/mips/mm/sc-rm7k.c
+--- linux-2.6.12/arch/mips/mm/sc-rm7k.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/sc-rm7k.c 2005-07-01 12:09:18.000000000 +0200
+@@ -15,6 +15,7 @@
+ #include <asm/cacheops.h>
+ #include <asm/mipsregs.h>
+ #include <asm/processor.h>
++#include <asm/cacheflush.h> /* for run_uncached() */
+
+ /* Primary cache parameters. */
+ #define sc_lsize 32
+@@ -96,25 +97,13 @@ static void rm7k_sc_inv(unsigned long ad
+ }
+
+ /*
+- * This function is executed in the uncached segment CKSEG1.
+- * It must not touch the stack, because the stack pointer still points
+- * into CKSEG0.
+- *
+- * Three options:
+- * - Write it in assembly and guarantee that we don't use the stack.
+- * - Disable caching for CKSEG0 before calling it.
+- * - Pray that GCC doesn't randomly start using the stack.
+- *
+- * This being Linux, we obviously take the least sane of those options -
+- * following DaveM's lead in c-r4k.c
+- *
+- * It seems we get our kicks from relying on unguaranteed behaviour in GCC
++ * This function is executed in uncached address space.
+ */
+ static __init void __rm7k_sc_enable(void)
+ {
+ int i;
+
+- set_c0_config(1 << 3); /* CONF_SE */
++ set_c0_config(RM7K_CONF_SE);
+
+ write_c0_taglo(0);
+ write_c0_taghi(0);
+@@ -127,24 +116,22 @@ static __init void __rm7k_sc_enable(void
+ ".set mips0\n\t"
+ ".set reorder"
+ :
+- : "r" (KSEG0ADDR(i)), "i" (Index_Store_Tag_SD));
++ : "r" (CKSEG0ADDR(i)), "i" (Index_Store_Tag_SD));
+ }
+ }
+
+ static __init void rm7k_sc_enable(void)
+ {
+- void (*func)(void) = (void *) KSEG1ADDR(&__rm7k_sc_enable);
+-
+- if (read_c0_config() & 0x08) /* CONF_SE */
++ if (read_c0_config() & RM7K_CONF_SE)
+ return;
+
+- printk(KERN_INFO "Enabling secondary cache...");
+- func();
++ printk(KERN_INFO "Enabling secondary cache...\n");
++ run_uncached(__rm7k_sc_enable);
+ }
+
+ static void rm7k_sc_disable(void)
+ {
+- clear_c0_config(1<<3); /* CONF_SE */
++ clear_c0_config(RM7K_CONF_SE);
+ }
+
+ struct bcache_ops rm7k_sc_ops = {
+@@ -158,19 +145,19 @@ void __init rm7k_sc_init(void)
+ {
+ unsigned int config = read_c0_config();
+
+- if ((config >> 31) & 1) /* Bit 31 set -> no S-Cache */
++ if ((config & RM7K_CONF_SC))
+ return;
+
+ printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n",
+ (scache_size >> 10), sc_lsize);
+
+- if (!((config >> 3) & 1)) /* CONF_SE */
++ if (!(config & RM7K_CONF_SE))
+ rm7k_sc_enable();
+
+ /*
+ * While we're at it let's deal with the tertiary cache.
+ */
+- if (!((config >> 17) & 1)) {
++ if (!(config & RM7K_CONF_TC)) {
+
+ /*
+ * We can't enable the L3 cache yet. There may be board-specific
+@@ -183,9 +170,9 @@ void __init rm7k_sc_init(void)
+ * to probe it.
+ */
+ printk(KERN_INFO "Tertiary cache present, %s enabled\n",
+- config&(1<<12) ? "already" : "not (yet)");
++ (config & RM7K_CONF_TE) ? "already" : "not (yet)");
+
+- if ((config >> 12) & 1)
++ if ((config & RM7K_CONF_TE))
+ rm7k_tcache_enabled = 1;
+ }
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/tlb-andes.c linux_HEAD/arch/mips/mm/tlb-andes.c
+--- linux-2.6.12/arch/mips/mm/tlb-andes.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/mm/tlb-andes.c 2005-02-17 21:48:57.000000000 +0100
@@ -195,6 +195,7 @@ void __update_tlb(struct vm_area_struct
{
@@ -19317,9 +28786,9 @@
idx = read_c0_index();
ptep = pte_offset_map(pmdp, address);
write_c0_entrylo0(pte_val(*ptep++) >> 6);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/tlb-r4k.c linux_HEAD/arch/mips/mm/tlb-r4k.c
---- linux-2.6.11.6/arch/mips/mm/tlb-r4k.c 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/arch/mips/mm/tlb-r4k.c 2005-03-30 09:19:14.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/tlb-r4k.c linux_HEAD/arch/mips/mm/tlb-r4k.c
+--- linux-2.6.12/arch/mips/mm/tlb-r4k.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/tlb-r4k.c 2005-07-07 11:22:49.000000000 +0200
@@ -21,6 +21,12 @@
extern void build_tlb_refill_handler(void);
@@ -19474,7 +28943,7 @@
- write_c0_entrylo0(ptep->pte_high);
- ptep++;
- write_c0_entrylo1(ptep->pte_high);
-+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ write_c0_entrylo0(ptep->pte_high);
+ ptep++;
+ write_c0_entrylo1(ptep->pte_high);
@@ -19514,10 +28983,18 @@
return;
reg = read_c0_config1();
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/tlb-sb1.c linux_HEAD/arch/mips/mm/tlb-sb1.c
---- linux-2.6.11.6/arch/mips/mm/tlb-sb1.c 2005-03-26 04:28:38.000000000 +0100
-+++ linux_HEAD/arch/mips/mm/tlb-sb1.c 2005-04-01 16:07:44.000000000 +0200
-@@ -94,7 +94,7 @@ void local_flush_tlb_all(void)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/tlb-sb1.c linux_HEAD/arch/mips/mm/tlb-sb1.c
+--- linux-2.6.12/arch/mips/mm/tlb-sb1.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/tlb-sb1.c 2005-07-07 11:22:49.000000000 +0200
+@@ -17,6 +17,7 @@
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
++#include <linux/config.h>
+ #include <linux/init.h>
+ #include <asm/mmu_context.h>
+ #include <asm/bootinfo.h>
+@@ -94,7 +95,7 @@ void local_flush_tlb_all(void)
local_irq_save(flags);
/* Save old context and create impossible VPN2 value */
@@ -19526,7 +29003,7 @@
write_c0_entrylo0(0);
write_c0_entrylo1(0);
-@@ -144,17 +144,17 @@ void local_flush_tlb_range(struct vm_are
+@@ -144,17 +145,17 @@ void local_flush_tlb_range(struct vm_are
unsigned long end)
{
struct mm_struct *mm = vma->vm_mm;
@@ -19549,7 +29026,7 @@
int newpid = cpu_asid(cpu, mm);
start &= (PAGE_MASK << 1);
-@@ -169,17 +169,17 @@ void local_flush_tlb_range(struct vm_are
+@@ -169,17 +170,17 @@ void local_flush_tlb_range(struct vm_are
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
@@ -19569,7 +29046,7 @@
}
void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
-@@ -189,7 +189,6 @@ void local_flush_tlb_kernel_range(unsign
+@@ -189,7 +190,6 @@ void local_flush_tlb_kernel_range(unsign
size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
size = (size + 1) >> 1;
@@ -19577,7 +29054,7 @@
local_irq_save(flags);
if (size <= (current_cpu_data.tlbsize/2)) {
int pid = read_c0_entryhi();
-@@ -207,9 +206,9 @@ void local_flush_tlb_kernel_range(unsign
+@@ -207,9 +207,9 @@ void local_flush_tlb_kernel_range(unsign
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
@@ -19588,7 +29065,7 @@
tlb_write_indexed();
}
write_c0_entryhi(pid);
-@@ -221,15 +220,16 @@ void local_flush_tlb_kernel_range(unsign
+@@ -221,15 +221,16 @@ void local_flush_tlb_kernel_range(unsign
void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
{
@@ -19608,7 +29085,7 @@
write_c0_entryhi(page | newpid);
tlb_probe();
idx = read_c0_index();
-@@ -240,10 +240,11 @@ void local_flush_tlb_page(struct vm_area
+@@ -240,10 +241,11 @@ void local_flush_tlb_page(struct vm_area
/* Make sure all entries differ. */
write_c0_entryhi(UNIQUE_ENTRYHI(idx));
tlb_write_indexed();
@@ -19621,7 +29098,7 @@
}
/*
-@@ -255,18 +256,17 @@ void local_flush_tlb_one(unsigned long p
+@@ -255,18 +257,17 @@ void local_flush_tlb_one(unsigned long p
unsigned long flags;
int oldpid, idx;
@@ -19644,7 +29121,7 @@
tlb_write_indexed();
}
-@@ -297,6 +297,7 @@ void __update_tlb(struct vm_area_struct
+@@ -297,6 +298,7 @@ void __update_tlb(struct vm_area_struct
{
unsigned long flags;
pgd_t *pgdp;
@@ -19652,7 +29129,7 @@
pmd_t *pmdp;
pte_t *ptep;
int idx, pid;
-@@ -311,19 +312,26 @@ void __update_tlb(struct vm_area_struct
+@@ -311,19 +313,26 @@ void __update_tlb(struct vm_area_struct
pid = read_c0_entryhi() & ASID_MASK;
address &= (PAGE_MASK << 1);
@@ -19666,7 +29143,7 @@
idx = read_c0_index();
ptep = pte_offset_map(pmdp, address);
+
-+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ write_c0_entrylo0(ptep->pte_high);
+ ptep++;
+ write_c0_entrylo1(ptep->pte_high);
@@ -19684,7 +29161,7 @@
local_irq_restore(flags);
}
-@@ -336,7 +344,8 @@ void __init add_wired_entry(unsigned lon
+@@ -336,7 +345,8 @@ void __init add_wired_entry(unsigned lon
unsigned long old_ctx;
local_irq_save(flags);
@@ -19694,10 +29171,18 @@
old_pagemask = read_c0_pagemask();
wired = read_c0_wired();
write_c0_wired(wired + 1);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/mm/tlbex.c linux_HEAD/arch/mips/mm/tlbex.c
---- linux-2.6.11.6/arch/mips/mm/tlbex.c 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/mm/tlbex.c 2005-03-21 20:03:47.000000000 +0100
-@@ -91,7 +91,7 @@ enum opcode {
+diff -urpNX dontdiff linux-2.6.12/arch/mips/mm/tlbex.c linux_HEAD/arch/mips/mm/tlbex.c
+--- linux-2.6.12/arch/mips/mm/tlbex.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/mm/tlbex.c 2005-07-10 12:16:57.000000000 +0200
+@@ -6,6 +6,7 @@
+ * Synthesize TLB refill handlers at runtime.
+ *
+ * Copyright (C) 2004,2005 by Thiemo Seufer
++ * Copyright (C) 2005 Maciej W. Rozycki
+ */
+
+ #include <stdarg.h>
+@@ -91,7 +92,7 @@ enum opcode {
insn_addu, insn_addiu, insn_and, insn_andi, insn_beq,
insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl,
insn_bne, insn_daddu, insn_daddiu, insn_dmfc0, insn_dmtc0,
@@ -19706,7 +29191,7 @@
insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld,
insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, insn_mtc0,
insn_ori, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll,
-@@ -134,7 +134,6 @@ static __initdata struct insn insn_table
+@@ -134,7 +135,6 @@ static __initdata struct insn insn_table
{ insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE },
{ insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE },
{ insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE },
@@ -19714,7 +29199,7 @@
{ insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD },
{ insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 },
{ insn_j, M(j_op,0,0,0,0,0), JIMM },
-@@ -366,7 +365,6 @@ I_u2u1u3(_dsll);
+@@ -366,7 +366,6 @@ I_u2u1u3(_dsll);
I_u2u1u3(_dsll32);
I_u2u1u3(_dsra);
I_u2u1u3(_dsrl);
@@ -19722,15 +29207,53 @@
I_u3u1u2(_dsubu);
I_0(_eret);
I_u1(_j);
-@@ -830,6 +828,7 @@ static __init void build_tlb_write_entry
- i_nop(p);
- break;
+@@ -412,7 +411,6 @@ enum label_id {
+ label_nopage_tlbm,
+ label_smp_pgtable_change,
+ label_r3000_write_probe_fail,
+- label_r3000_write_probe_ok
+ };
-+ case CPU_R4300:
- case CPU_R4600:
+ struct label {
+@@ -445,7 +443,6 @@ L_LA(_nopage_tlbs)
+ L_LA(_nopage_tlbm)
+ L_LA(_smp_pgtable_change)
+ L_LA(_r3000_write_probe_fail)
+-L_LA(_r3000_write_probe_ok)
+
+ /* convenience macros for instructions */
+ #ifdef CONFIG_MIPS64
+@@ -490,7 +487,7 @@ L_LA(_r3000_write_probe_ok)
+ static __init int __attribute__((unused)) in_compat_space_p(long addr)
+ {
+ /* Is this address in 32bit compat space? */
+- return (((addr) & 0xffffffff00000000) == 0xffffffff00000000);
++ return (((addr) & 0xffffffff00000000L) == 0xffffffff00000000L);
+ }
+
+ static __init int __attribute__((unused)) rel_highest(long val)
+@@ -734,7 +731,7 @@ static void __init build_r3000_tlb_refil
+ if (p > tlb_handler + 32)
+ panic("TLB refill handler space exceeded");
+
+- printk("Synthesized TLB handler (%u instructions).\n",
++ printk("Synthesized TLB refill handler (%u instructions).\n",
+ (unsigned int)(p - tlb_handler));
+ #ifdef DEBUG_TLB
+ {
+@@ -834,12 +831,19 @@ static __init void build_tlb_write_entry
case CPU_R4700:
case CPU_R5000:
-@@ -840,6 +839,7 @@ static __init void build_tlb_write_entry
+ case CPU_R5000A:
++ i_nop(p);
++ tlbw(p);
++ i_nop(p);
++ break;
++
++ case CPU_R4300:
+ case CPU_5KC:
+ case CPU_TX49XX:
+ case CPU_AU1000:
case CPU_AU1100:
case CPU_AU1500:
case CPU_AU1550:
@@ -19738,7 +29261,7 @@
i_nop(p);
tlbw(p);
break;
-@@ -942,34 +942,29 @@ build_get_pmde64(u32 **p, struct label *
+@@ -942,34 +946,29 @@ build_get_pmde64(u32 **p, struct label *
/* No i_nop needed here, since the next insn doesn't touch TMP. */
#ifdef CONFIG_SMP
@@ -19793,7 +29316,7 @@
#else
i_LA_mostly(p, ptr, pgdc);
i_ld(p, ptr, rel_lo(pgdc), ptr);
-@@ -1026,7 +1021,6 @@ build_get_pgde32(u32 **p, unsigned int t
+@@ -1026,7 +1025,6 @@ build_get_pgde32(u32 **p, unsigned int t
i_mfc0(p, ptr, C0_CONTEXT);
i_LA_mostly(p, tmp, pgdc);
i_srl(p, ptr, ptr, 23);
@@ -19801,8 +29324,26 @@
i_addu(p, ptr, tmp, ptr);
#else
i_LA_mostly(p, ptr, pgdc);
-@@ -1256,7 +1250,7 @@ static void __init build_r4000_tlb_refil
+@@ -1245,8 +1243,15 @@ static void __init build_r4000_tlb_refil
+ {
+ int i;
+- for (i = 0; i < 64; i++)
+- printk("%08x\n", final_handler[i]);
++ f = final_handler;
++#ifdef CONFIG_MIPS64
++ if (final_len > 32)
++ final_len = 64;
++ else
++ f = final_handler + 32;
++#endif /* CONFIG_MIPS64 */
++ for (i = 0; i < final_len; i++)
++ printk("%08x\n", f[i]);
+ }
+ #endif
+
+@@ -1256,7 +1261,7 @@ static void __init build_r4000_tlb_refil
+
/*
* TLB load/store/modify handlers.
- *
@@ -19810,8 +29351,321 @@
* Only the fastpath gets synthesized at runtime, the slowpath for
* do_page_fault remains normal asm.
*/
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/momentum/Kconfig linux_HEAD/arch/mips/momentum/Kconfig
---- linux-2.6.11.6/arch/mips/momentum/Kconfig 1970-01-01 01:00:00.000000000 +0100
+@@ -1277,37 +1282,41 @@ u32 __tlb_handler_align handle_tlbs[FAST
+ u32 __tlb_handler_align handle_tlbm[FASTPATH_SIZE];
+
+ static void __init
+-iPTE_LW(u32 **p, struct label **l, unsigned int pte, int offset,
+- unsigned int ptr)
++iPTE_LW(u32 **p, struct label **l, unsigned int pte, unsigned int ptr)
+ {
+ #ifdef CONFIG_SMP
+ # ifdef CONFIG_64BIT_PHYS_ADDR
+ if (cpu_has_64bits)
+- i_lld(p, pte, offset, ptr);
++ i_lld(p, pte, 0, ptr);
+ else
+ # endif
+- i_LL(p, pte, offset, ptr);
++ i_LL(p, pte, 0, ptr);
+ #else
+ # ifdef CONFIG_64BIT_PHYS_ADDR
+ if (cpu_has_64bits)
+- i_ld(p, pte, offset, ptr);
++ i_ld(p, pte, 0, ptr);
+ else
+ # endif
+- i_LW(p, pte, offset, ptr);
++ i_LW(p, pte, 0, ptr);
+ #endif
+ }
+
+ static void __init
+-iPTE_SW(u32 **p, struct reloc **r, unsigned int pte, int offset,
+- unsigned int ptr)
++iPTE_SW(u32 **p, struct reloc **r, unsigned int pte, unsigned int ptr,
++ unsigned int mode)
+ {
++#ifdef CONFIG_64BIT_PHYS_ADDR
++ unsigned int hwmode = mode & (_PAGE_VALID | _PAGE_DIRTY);
++#endif
++
++ i_ori(p, pte, pte, mode);
+ #ifdef CONFIG_SMP
+ # ifdef CONFIG_64BIT_PHYS_ADDR
+ if (cpu_has_64bits)
+- i_scd(p, pte, offset, ptr);
++ i_scd(p, pte, 0, ptr);
+ else
+ # endif
+- i_SC(p, pte, offset, ptr);
++ i_SC(p, pte, 0, ptr);
+
+ if (r10000_llsc_war())
+ il_beqzl(p, r, pte, label_smp_pgtable_change);
+@@ -1318,7 +1327,7 @@ iPTE_SW(u32 **p, struct reloc **r, unsig
+ if (!cpu_has_64bits) {
+ /* no i_nop needed */
+ i_ll(p, pte, sizeof(pte_t) / 2, ptr);
+- i_ori(p, pte, pte, _PAGE_VALID);
++ i_ori(p, pte, pte, hwmode);
+ i_sc(p, pte, sizeof(pte_t) / 2, ptr);
+ il_beqz(p, r, pte, label_smp_pgtable_change);
+ /* no i_nop needed */
+@@ -1331,15 +1340,15 @@ iPTE_SW(u32 **p, struct reloc **r, unsig
+ #else
+ # ifdef CONFIG_64BIT_PHYS_ADDR
+ if (cpu_has_64bits)
+- i_sd(p, pte, offset, ptr);
++ i_sd(p, pte, 0, ptr);
+ else
+ # endif
+- i_SW(p, pte, offset, ptr);
++ i_SW(p, pte, 0, ptr);
+
+ # ifdef CONFIG_64BIT_PHYS_ADDR
+ if (!cpu_has_64bits) {
+ i_lw(p, pte, sizeof(pte_t) / 2, ptr);
+- i_ori(p, pte, pte, _PAGE_VALID);
++ i_ori(p, pte, pte, hwmode);
+ i_sw(p, pte, sizeof(pte_t) / 2, ptr);
+ i_lw(p, pte, 0, ptr);
+ }
+@@ -1359,7 +1368,7 @@ build_pte_present(u32 **p, struct label
+ i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
+ i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
+ il_bnez(p, r, pte, lid);
+- iPTE_LW(p, l, pte, 0, ptr);
++ iPTE_LW(p, l, pte, ptr);
+ }
+
+ /* Make PTE valid, store result in PTR. */
+@@ -1367,8 +1376,9 @@ static void __init
+ build_make_valid(u32 **p, struct reloc **r, unsigned int pte,
+ unsigned int ptr)
+ {
+- i_ori(p, pte, pte, _PAGE_VALID | _PAGE_ACCESSED);
+- iPTE_SW(p, r, pte, 0, ptr);
++ unsigned int mode = _PAGE_VALID | _PAGE_ACCESSED;
++
++ iPTE_SW(p, r, pte, ptr, mode);
+ }
+
+ /*
+@@ -1382,7 +1392,7 @@ build_pte_writable(u32 **p, struct label
+ i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
+ i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
+ il_bnez(p, r, pte, lid);
+- iPTE_LW(p, l, pte, 0, ptr);
++ iPTE_LW(p, l, pte, ptr);
+ }
+
+ /* Make PTE writable, update software status bits as well, then store
+@@ -1392,9 +1402,10 @@ static void __init
+ build_make_write(u32 **p, struct reloc **r, unsigned int pte,
+ unsigned int ptr)
+ {
+- i_ori(p, pte, pte,
+- _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID | _PAGE_DIRTY);
+- iPTE_SW(p, r, pte, 0, ptr);
++ unsigned int mode = (_PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_VALID
++ | _PAGE_DIRTY);
++
++ iPTE_SW(p, r, pte, ptr, mode);
+ }
+
+ /*
+@@ -1407,41 +1418,48 @@ build_pte_modifiable(u32 **p, struct lab
+ {
+ i_andi(p, pte, pte, _PAGE_WRITE);
+ il_beqz(p, r, pte, lid);
+- iPTE_LW(p, l, pte, 0, ptr);
++ iPTE_LW(p, l, pte, ptr);
+ }
+
+ /*
+ * R3000 style TLB load/store/modify handlers.
+ */
+
+-/* This places the pte in the page table at PTR into ENTRYLO0. */
++/*
++ * This places the pte into ENTRYLO0 and writes it with tlbwi.
++ * Then it returns.
++ */
+ static void __init
+-build_r3000_pte_reload(u32 **p, unsigned int ptr)
++build_r3000_pte_reload_tlbwi(u32 **p, unsigned int pte, unsigned int tmp)
+ {
+- i_lw(p, ptr, 0, ptr);
+- i_nop(p); /* load delay */
+- i_mtc0(p, ptr, C0_ENTRYLO0);
+- i_nop(p); /* cp0 delay */
++ i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */
++ i_mfc0(p, tmp, C0_EPC); /* cp0 delay */
++ i_tlbwi(p);
++ i_jr(p, tmp);
++ i_rfe(p); /* branch delay */
+ }
+
+ /*
+- * The index register may have the probe fail bit set,
+- * because we would trap on access kseg2, i.e. without refill.
++ * This places the pte into ENTRYLO0 and writes it with tlbwi
++ * or tlbwr as appropriate. This is because the index register
++ * may have the probe fail bit set as a result of a trap on a
++ * kseg2 access, i.e. without refill. Then it returns.
+ */
+ static void __init
+-build_r3000_tlb_write(u32 **p, struct label **l, struct reloc **r,
+- unsigned int tmp)
++build_r3000_tlb_reload_write(u32 **p, struct label **l, struct reloc **r,
++ unsigned int pte, unsigned int tmp)
+ {
+ i_mfc0(p, tmp, C0_INDEX);
+- i_nop(p); /* cp0 delay */
+- il_bltz(p, r, tmp, label_r3000_write_probe_fail);
+- i_nop(p); /* branch delay */
+- i_tlbwi(p);
+- il_b(p, r, label_r3000_write_probe_ok);
+- i_nop(p); /* branch delay */
++ i_mtc0(p, pte, C0_ENTRYLO0); /* cp0 delay */
++ il_bltz(p, r, tmp, label_r3000_write_probe_fail); /* cp0 delay */
++ i_mfc0(p, tmp, C0_EPC); /* branch delay */
++ i_tlbwi(p); /* cp0 delay */
++ i_jr(p, tmp);
++ i_rfe(p); /* branch delay */
+ l_r3000_write_probe_fail(l, *p);
+- i_tlbwr(p);
+- l_r3000_write_probe_ok(l, *p);
++ i_tlbwr(p); /* cp0 delay */
++ i_jr(p, tmp);
++ i_rfe(p); /* branch delay */
+ }
+
+ static void __init
+@@ -1461,17 +1479,7 @@ build_r3000_tlbchange_handler_head(u32 *
+ i_andi(p, pte, pte, 0xffc); /* load delay */
+ i_addu(p, ptr, ptr, pte);
+ i_lw(p, pte, 0, ptr);
+- i_nop(p); /* load delay */
+- i_tlbp(p);
+-}
+-
+-static void __init
+-build_r3000_tlbchange_handler_tail(u32 **p, unsigned int tmp)
+-{
+- i_mfc0(p, tmp, C0_EPC);
+- i_nop(p); /* cp0 delay */
+- i_jr(p, tmp);
+- i_rfe(p); /* branch delay */
++ i_tlbp(p); /* load delay */
+ }
+
+ static void __init build_r3000_tlb_load_handler(void)
+@@ -1486,10 +1494,9 @@ static void __init build_r3000_tlb_load_
+
+ build_r3000_tlbchange_handler_head(&p, K0, K1);
+ build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl);
++ i_nop(&p); /* load delay */
+ build_make_valid(&p, &r, K0, K1);
+- build_r3000_pte_reload(&p, K1);
+- build_r3000_tlb_write(&p, &l, &r, K0);
+- build_r3000_tlbchange_handler_tail(&p, K0);
++ build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
+
+ l_nopage_tlbl(&l, p);
+ i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff);
+@@ -1506,7 +1513,7 @@ static void __init build_r3000_tlb_load_
+ {
+ int i;
+
+- for (i = 0; i < FASTPATH_SIZE; i++)
++ for (i = 0; i < (p - handle_tlbl); i++)
+ printk("%08x\n", handle_tlbl[i]);
+ }
+ #endif
+@@ -1527,10 +1534,9 @@ static void __init build_r3000_tlb_store
+
+ build_r3000_tlbchange_handler_head(&p, K0, K1);
+ build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs);
++ i_nop(&p); /* load delay */
+ build_make_write(&p, &r, K0, K1);
+- build_r3000_pte_reload(&p, K1);
+- build_r3000_tlb_write(&p, &l, &r, K0);
+- build_r3000_tlbchange_handler_tail(&p, K0);
++ build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
+
+ l_nopage_tlbs(&l, p);
+ i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
+@@ -1547,7 +1553,7 @@ static void __init build_r3000_tlb_store
+ {
+ int i;
+
+- for (i = 0; i < FASTPATH_SIZE; i++)
++ for (i = 0; i < (p - handle_tlbs); i++)
+ printk("%08x\n", handle_tlbs[i]);
+ }
+ #endif
+@@ -1568,10 +1574,9 @@ static void __init build_r3000_tlb_modif
+
+ build_r3000_tlbchange_handler_head(&p, K0, K1);
+ build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm);
++ i_nop(&p); /* load delay */
+ build_make_write(&p, &r, K0, K1);
+- build_r3000_pte_reload(&p, K1);
+- i_tlbwi(&p);
+- build_r3000_tlbchange_handler_tail(&p, K0);
++ build_r3000_pte_reload_tlbwi(&p, K0, K1);
+
+ l_nopage_tlbm(&l, p);
+ i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff);
+@@ -1588,7 +1593,7 @@ static void __init build_r3000_tlb_modif
+ {
+ int i;
+
+- for (i = 0; i < FASTPATH_SIZE; i++)
++ for (i = 0; i < (p - handle_tlbm); i++)
+ printk("%08x\n", handle_tlbm[i]);
+ }
+ #endif
+@@ -1620,7 +1625,7 @@ build_r4000_tlbchange_handler_head(u32 *
+ #ifdef CONFIG_SMP
+ l_smp_pgtable_change(l, *p);
+ # endif
+- iPTE_LW(p, l, pte, 0, ptr); /* get even pte */
++ iPTE_LW(p, l, pte, ptr); /* get even pte */
+ build_tlb_probe_entry(p);
+ }
+
+@@ -1680,7 +1685,7 @@ static void __init build_r4000_tlb_load_
+ {
+ int i;
+
+- for (i = 0; i < FASTPATH_SIZE; i++)
++ for (i = 0; i < (p - handle_tlbl); i++)
+ printk("%08x\n", handle_tlbl[i]);
+ }
+ #endif
+@@ -1719,7 +1724,7 @@ static void __init build_r4000_tlb_store
+ {
+ int i;
+
+- for (i = 0; i < FASTPATH_SIZE; i++)
++ for (i = 0; i < (p - handle_tlbs); i++)
+ printk("%08x\n", handle_tlbs[i]);
+ }
+ #endif
+@@ -1759,7 +1764,7 @@ static void __init build_r4000_tlb_modif
+ {
+ int i;
+
+- for (i = 0; i < FASTPATH_SIZE; i++)
++ for (i = 0; i < (p - handle_tlbm); i++)
+ printk("%08x\n", handle_tlbm[i]);
+ }
+ #endif
+diff -urpNX dontdiff linux-2.6.12/arch/mips/momentum/Kconfig linux_HEAD/arch/mips/momentum/Kconfig
+--- linux-2.6.12/arch/mips/momentum/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/momentum/Kconfig 2005-01-30 21:45:37.000000000 +0100
@@ -0,0 +1,6 @@
+config JAGUAR_DMALOW
@@ -19820,8 +29674,50 @@
+ help
+ Select to Y if jump JP5 is set on your board, N otherwise. Normally
+ the jumper is set, so if you feel unsafe, just say Y.
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/momentum/ocelot_c/cpci-irq.c linux_HEAD/arch/mips/momentum/ocelot_c/cpci-irq.c
---- linux-2.6.11.6/arch/mips/momentum/ocelot_c/cpci-irq.c 2005-03-26 04:28:36.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/momentum/jaguar_atx/setup.c linux_HEAD/arch/mips/momentum/jaguar_atx/setup.c
+--- linux-2.6.12/arch/mips/momentum/jaguar_atx/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/momentum/jaguar_atx/setup.c 2005-07-07 13:02:51.000000000 +0200
+@@ -351,7 +351,7 @@ static __init int __init ja_pci_init(voi
+
+ arch_initcall(ja_pci_init);
+
+-static int __init momenco_jaguar_atx_setup(void)
++void __init plat_setup(void)
+ {
+ unsigned int tmpword;
+
+@@ -467,8 +467,4 @@ static int __init momenco_jaguar_atx_se
+
+ }
+ #endif
+-
+- return 0;
+ }
+-
+-early_initcall(momenco_jaguar_atx_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/momentum/ocelot_3/setup.c linux_HEAD/arch/mips/momentum/ocelot_3/setup.c
+--- linux-2.6.12/arch/mips/momentum/ocelot_3/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/momentum/ocelot_3/setup.c 2005-07-07 13:02:50.000000000 +0200
+@@ -307,7 +307,7 @@ static __init int __init ja_pci_init(voi
+
+ arch_initcall(ja_pci_init);
+
+-static int __init momenco_ocelot_3_setup(void)
++void __init plat_setup(void)
+ {
+ unsigned int tmpword;
+
+@@ -391,8 +391,4 @@ static int __init momenco_ocelot_3_setup
+
+ /* Support for 128 MB memory */
+ add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM);
+-
+- return 0;
+ }
+-
+-early_initcall(momenco_ocelot_3_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/momentum/ocelot_c/cpci-irq.c linux_HEAD/arch/mips/momentum/ocelot_c/cpci-irq.c
+--- linux-2.6.12/arch/mips/momentum/ocelot_c/cpci-irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/momentum/ocelot_c/cpci-irq.c 2005-02-28 16:56:42.000000000 +0100
@@ -129,14 +129,13 @@ void ll_cpci_irq(struct pt_regs *regs)
#define shutdown_cpci_irq disable_cpci_irq
@@ -19845,8 +29741,29 @@
};
void cpci_irq_init(void)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/momentum/ocelot_c/uart-irq.c linux_HEAD/arch/mips/momentum/ocelot_c/uart-irq.c
---- linux-2.6.11.6/arch/mips/momentum/ocelot_c/uart-irq.c 2005-03-26 04:28:37.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/momentum/ocelot_c/setup.c linux_HEAD/arch/mips/momentum/ocelot_c/setup.c
+--- linux-2.6.12/arch/mips/momentum/ocelot_c/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/momentum/ocelot_c/setup.c 2005-07-01 12:09:19.000000000 +0200
+@@ -222,7 +222,7 @@ void momenco_time_init(void)
+ rtc_set_time = m48t37y_set_time;
+ }
+
+-static void __init momenco_ocelot_c_setup(void)
++void __init plat_setup(void)
+ {
+ unsigned int tmpword;
+
+@@ -340,8 +340,6 @@ static void __init momenco_ocelot_c_setu
+ }
+ }
+
+-early_initcall(momenco_ocelot_c_setup);
+-
+ #ifndef CONFIG_MIPS64
+ /* This needs to be one of the first initcalls, because no I/O port access
+ can work before this */
+diff -urpNX dontdiff linux-2.6.12/arch/mips/momentum/ocelot_c/uart-irq.c linux_HEAD/arch/mips/momentum/ocelot_c/uart-irq.c
+--- linux-2.6.12/arch/mips/momentum/ocelot_c/uart-irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/momentum/ocelot_c/uart-irq.c 2005-02-28 16:56:42.000000000 +0100
@@ -122,14 +122,13 @@ void ll_uart_irq(struct pt_regs *regs)
#define shutdown_uart_irq disable_uart_irq
@@ -19870,20 +29787,45 @@
};
void uart_irq_init(void)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/oprofile/Kconfig linux_HEAD/arch/mips/oprofile/Kconfig
---- linux-2.6.11.6/arch/mips/oprofile/Kconfig 2005-03-26 04:28:20.000000000 +0100
-+++ linux_HEAD/arch/mips/oprofile/Kconfig 2004-12-12 03:22:46.000000000 +0100
-@@ -7,7 +7,7 @@ config PROFILING
- help
- Say Y here to enable the extended profiling support mechanisms used
- by profilers such as OProfile.
+diff -urpNX dontdiff linux-2.6.12/arch/mips/momentum/ocelot_g/setup.c linux_HEAD/arch/mips/momentum/ocelot_g/setup.c
+--- linux-2.6.12/arch/mips/momentum/ocelot_g/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/momentum/ocelot_g/setup.c 2005-07-07 13:02:50.000000000 +0200
+@@ -160,7 +160,7 @@ static void __init setup_l3cache(unsigne
+ printk("Done\n");
+ }
+
+-static int __init momenco_ocelot_g_setup(void)
++void __init plat_setup(void)
+ {
+ void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache);
+ unsigned int tmpword;
+@@ -240,12 +240,8 @@ static int __init momenco_ocelot_g_setu
+
+ /* FIXME: Fix up the DiskOnChip mapping */
+ MV_WRITE(0x468, 0xfef73);
-
-+
+- return 0;
+ }
- config OPROFILE
- tristate "OProfile system profiling (EXPERIMENTAL)"
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/oprofile/common.c linux_HEAD/arch/mips/oprofile/common.c
---- linux-2.6.11.6/arch/mips/oprofile/common.c 2005-03-26 04:28:16.000000000 +0100
+-early_initcall(momenco_ocelot_g_setup);
+-
+ /* This needs to be one of the first initcalls, because no I/O port access
+ can work before this */
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/oprofile/Makefile linux_HEAD/arch/mips/oprofile/Makefile
+--- linux-2.6.12/arch/mips/oprofile/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/oprofile/Makefile 2005-07-07 11:22:49.000000000 +0200
+@@ -10,6 +10,6 @@ DRIVER_OBJS = $(addprefix ../../../drive
+
+ oprofile-y := $(DRIVER_OBJS) common.o
+
+-oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o
+-oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o
++oprofile-$(CONFIG_CPU_MIPS32_R1) += op_model_mipsxx.o
++oprofile-$(CONFIG_CPU_MIPS64_R1) += op_model_mipsxx.o
+ oprofile-$(CONFIG_CPU_RM9000) += op_model_rm9000.o
+diff -urpNX dontdiff linux-2.6.12/arch/mips/oprofile/common.c linux_HEAD/arch/mips/oprofile/common.c
+--- linux-2.6.12/arch/mips/oprofile/common.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/oprofile/common.c 2005-02-17 21:48:57.000000000 +0100
@@ -68,9 +68,18 @@ static void op_mips_stop(void)
on_each_cpu(model->cpu_stop, NULL, 0, 1);
@@ -19935,8 +29877,8 @@
}
void oprofile_arch_exit(void)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/oprofile/op_model_rm9000.c linux_HEAD/arch/mips/oprofile/op_model_rm9000.c
---- linux-2.6.11.6/arch/mips/oprofile/op_model_rm9000.c 2005-03-26 04:28:22.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/oprofile/op_model_rm9000.c linux_HEAD/arch/mips/oprofile/op_model_rm9000.c
+--- linux-2.6.12/arch/mips/oprofile/op_model_rm9000.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/oprofile/op_model_rm9000.c 2005-02-17 21:48:57.000000000 +0100
@@ -5,6 +5,7 @@
*
@@ -19955,8 +29897,8 @@
{
return request_irq(rm9000_perfcount_irq, rm9000_perfcount_handler,
0, "Perfcounter", NULL);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/fixup-atlas.c linux_HEAD/arch/mips/pci/fixup-atlas.c
---- linux-2.6.11.6/arch/mips/pci/fixup-atlas.c 2005-03-26 04:28:39.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/fixup-atlas.c linux_HEAD/arch/mips/pci/fixup-atlas.c
+--- linux-2.6.12/arch/mips/pci/fixup-atlas.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/pci/fixup-atlas.c 2005-02-17 21:48:57.000000000 +0100
@@ -1,14 +1,37 @@
+/*
@@ -20019,10 +29961,18 @@
};
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/fixup-au1000.c linux_HEAD/arch/mips/pci/fixup-au1000.c
---- linux-2.6.11.6/arch/mips/pci/fixup-au1000.c 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/fixup-au1000.c 2005-03-01 15:00:12.000000000 +0100
-@@ -34,82 +34,7 @@
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/fixup-au1000.c linux_HEAD/arch/mips/pci/fixup-au1000.c
+--- linux-2.6.12/arch/mips/pci/fixup-au1000.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pci/fixup-au1000.c 2005-04-14 16:40:13.000000000 +0200
+@@ -26,7 +26,6 @@
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+-#include <linux/config.h>
+ #include <linux/types.h>
+ #include <linux/pci.h>
+ #include <linux/kernel.h>
+@@ -34,82 +33,7 @@
#include <asm/mach-au1x00/au1000.h>
@@ -20106,9 +30056,9 @@
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/fixup-cobalt.c linux_HEAD/arch/mips/pci/fixup-cobalt.c
---- linux-2.6.11.6/arch/mips/pci/fixup-cobalt.c 2005-03-26 04:28:20.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/fixup-cobalt.c 2005-03-04 20:36:08.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/fixup-cobalt.c linux_HEAD/arch/mips/pci/fixup-cobalt.c
+--- linux-2.6.12/arch/mips/pci/fixup-cobalt.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pci/fixup-cobalt.c 2005-04-12 15:07:55.000000000 +0200
@@ -21,6 +21,20 @@
extern int cobalt_board_id;
@@ -20154,7 +30104,7 @@
* On all machines prior to Q2, we had the STOP line disconnected
* from Galileo to VIA on PCI. The new Galileo does not function
* correctly unless we have it connected.
-@@ -64,10 +88,16 @@ static void qube_raq_galileo_fixup(struc
+@@ -64,21 +88,43 @@ static void qube_raq_galileo_fixup(struc
*/
pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id);
galileo_id &= 0xff; /* mask off class info */
@@ -20172,7 +30122,16 @@
signed int timeo;
/* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */
timeo = GALILEO_INL(GT_PCI0_TOR_OFS);
-@@ -76,9 +106,18 @@ static void qube_raq_galileo_fixup(struc
+ /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */
+- GALILEO_OUTL(0xffff, GT_PCI0_TOR_OFS);
++ GALILEO_OUTL(
++ (0xff << 16) | /* retry count */
++ (0xff << 8) | /* timeout 1 */
++ 0xff, /* timeout 0 */
++ GT_PCI0_TOR_OFS);
++
++ /* enable PCI retry exceeded interrupt */
++ GALILEO_OUTL(GALILEO_INTR_RETRY_CTR | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
}
}
@@ -20192,7 +30151,7 @@
static char irq_tab_cobalt[] __initdata = {
[COBALT_PCICONF_CPU] = 0,
[COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ,
-@@ -99,6 +138,9 @@ static char irq_tab_raq2[] __initdata =
+@@ -99,6 +145,9 @@ static char irq_tab_raq2[] __initdata =
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
@@ -20202,69 +30161,8 @@
if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
return irq_tab_raq2[slot];
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/fixup-vr4133.c linux_HEAD/arch/mips/pci/fixup-vr4133.c
---- linux-2.6.11.6/arch/mips/pci/fixup-vr4133.c 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/fixup-vr4133.c 2004-12-15 15:08:18.000000000 +0100
-@@ -11,9 +11,9 @@
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
-- * Modified for support in 2.6
-+ * Modified for support in 2.6
- * Author: Manish Lachwani (mlachwani at mvista.com)
-- *
-+ *
- */
- #include <linux/config.h>
- #include <linux/init.h>
-@@ -29,21 +29,21 @@ extern void ali_m5229_init(struct pci_de
- /* Do platform specific device initialization at pci_enable_device() time */
- int pcibios_plat_dev_init(struct pci_dev *dev)
- {
-- /*
-+ /*
- * We have to reset AMD PCnet adapter on Rockhopper since
- * PMON leaves it enabled and generating interrupts. This leads
- * to a lock if some PCI device driver later enables the IRQ line
- * shared with PCnet and there is no AMD PCnet driver to catch its
-- * interrupts.
-+ * interrupts.
- */
- #ifdef CONFIG_ROCKHOPPER
-- if (dev->vendor == PCI_VENDOR_ID_AMD &&
-+ if (dev->vendor == PCI_VENDOR_ID_AMD &&
- dev->device == PCI_DEVICE_ID_AMD_LANCE) {
- inl(pci_resource_start(dev, 0) + 0x18);
- }
- #endif
-
-- /*
-+ /*
- * we have to open the bridges' windows down to 0 because otherwise
- * we cannot access ISA south bridge I/O registers that get mapped from
- * 0. for example, 8259 PIC would be unaccessible without that
-@@ -60,8 +60,8 @@ int pcibios_plat_dev_init(struct pci_dev
- return 0;
- }
-
--/*
-- * M1535 IRQ mapping
-+/*
-+ * M1535 IRQ mapping
- * Feel free to change this, although it shouldn't be needed
- */
- #define M1535_IRQ_INTA 7
-@@ -124,7 +124,7 @@ static struct irq_map_entry int_map[] =
- {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */
- {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */
- {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */
-- {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board
-+ {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board
- ethernet */
- {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */
- {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/ops-au1000.c linux_HEAD/arch/mips/pci/ops-au1000.c
---- linux-2.6.11.6/arch/mips/pci/ops-au1000.c 2005-03-26 04:28:37.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/ops-au1000.c linux_HEAD/arch/mips/pci/ops-au1000.c
+--- linux-2.6.12/arch/mips/pci/ops-au1000.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/pci/ops-au1000.c 2005-02-28 16:56:42.000000000 +0100
@@ -50,11 +50,6 @@
@@ -20307,9 +30205,9 @@
*/
if (board_pci_idsel) {
if (board_pci_idsel(device, 1) == 0) {
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/ops-bonito64.c linux_HEAD/arch/mips/pci/ops-bonito64.c
---- linux-2.6.11.6/arch/mips/pci/ops-bonito64.c 2005-03-26 04:28:14.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/ops-bonito64.c 2005-02-17 21:48:57.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/ops-bonito64.c linux_HEAD/arch/mips/pci/ops-bonito64.c
+--- linux-2.6.12/arch/mips/pci/ops-bonito64.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pci/ops-bonito64.c 2005-04-14 16:40:13.000000000 +0200
@@ -1,6 +1,8 @@
/*
- * Carsten Langgaard, carstenl at mips.com
@@ -20321,7 +30219,15 @@
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
-@@ -57,13 +59,6 @@ static int bonito64_pcibios_config_acces
+@@ -17,7 +19,6 @@
+ *
+ * MIPS boards specific PCI support.
+ */
+-#include <linux/config.h>
+ #include <linux/types.h>
+ #include <linux/pci.h>
+ #include <linux/kernel.h>
+@@ -57,13 +58,6 @@ static int bonito64_pcibios_config_acces
return -1;
}
@@ -20335,36 +30241,32 @@
/* Clear cause register bits */
BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
BONITO_PCICMD_MTABORT_CLR);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/ops-gt64111.c linux_HEAD/arch/mips/pci/ops-gt64111.c
---- linux-2.6.11.6/arch/mips/pci/ops-gt64111.c 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/ops-gt64111.c 2005-03-04 20:36:08.000000000 +0100
-@@ -20,13 +20,21 @@
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/ops-gt64111.c linux_HEAD/arch/mips/pci/ops-gt64111.c
+--- linux-2.6.12/arch/mips/pci/ops-gt64111.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pci/ops-gt64111.c 2005-04-12 15:07:55.000000000 +0200
+@@ -18,15 +18,15 @@
+ #include <asm/cobalt/cobalt.h>
+
/*
- * Accessing device 31 hangs the GT64120. Not sure if this will also hang
- * the GT64111, let's be paranoid for now.
-+ *
-+ * Accessing device COBALT_PCICONF_CPU hangs early units.
+- * Accessing device 31 hangs the GT64120. Not sure if this will also hang
+- * the GT64111, let's be paranoid for now.
++ * Device 31 on the GT64111 is used to generate PCI special
++ * cycles, so we shouldn't expected to find a device there ...
*/
static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
{
- if (bus->number == 0 && devfn == PCI_DEVFN(31, 0))
- return -1;
-+ unsigned slot;
++ if (bus->number == 0 && PCI_SLOT(devfn) < 31)
++ return 0;
- return 0;
-+ if (bus->number == 0) {
-+
-+ slot = PCI_SLOT(devfn);
-+ if (slot != COBALT_PCICONF_CPU && slot < 31)
-+ return 0;
-+ }
-+
+ return -1;
}
static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/ops-gt64120.c linux_HEAD/arch/mips/pci/ops-gt64120.c
---- linux-2.6.11.6/arch/mips/pci/ops-gt64120.c 2005-03-26 04:28:20.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/ops-gt64120.c linux_HEAD/arch/mips/pci/ops-gt64120.c
+--- linux-2.6.12/arch/mips/pci/ops-gt64120.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/pci/ops-gt64120.c 2005-02-17 21:48:57.000000000 +0100
@@ -1,6 +1,8 @@
/*
@@ -20388,22 +30290,18 @@
if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0)))
return -1; /* Because of a bug in the galileo (for slot 31). */
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/ops-msc.c linux_HEAD/arch/mips/pci/ops-msc.c
---- linux-2.6.11.6/arch/mips/pci/ops-msc.c 2005-03-26 04:28:37.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/ops-msc.c 2005-02-17 21:48:57.000000000 +0100
-@@ -1,8 +1,8 @@
- /*
- * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
-- * All rights reserved.
-- * Authors: Carsten Langgaard <carstenl at mips.com>
-- * Maciej W. Rozycki <macro at mips.com>
-+ * All rights reserved.
-+ * Authors: Carsten Langgaard <carstenl at mips.com>
-+ * Maciej W. Rozycki <macro at mips.com>
- * Copyright (C) 2005 Ralf Baechle (ralf at linux-mips.org)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/ops-msc.c linux_HEAD/arch/mips/pci/ops-msc.c
+--- linux-2.6.12/arch/mips/pci/ops-msc.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pci/ops-msc.c 2005-07-10 12:28:27.000000000 +0200
+@@ -21,7 +21,6 @@
+ * MIPS boards specific PCI support.
*
- * This program is free software; you can distribute it and/or modify it
-@@ -49,34 +49,17 @@ static int msc_pcibios_config_access(uns
+ */
+-#include <linux/config.h>
+ #include <linux/types.h>
+ #include <linux/pci.h>
+ #include <linux/kernel.h>
+@@ -49,34 +48,17 @@ static int msc_pcibios_config_access(uns
struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
{
unsigned char busnum = bus->number;
@@ -20441,7 +30339,7 @@
/* Perform access */
if (access_type == PCI_ACCESS_WRITE)
-@@ -86,15 +69,12 @@ static int msc_pcibios_config_access(uns
+@@ -86,15 +68,12 @@ static int msc_pcibios_config_access(uns
/* Detect Master/Target abort */
MSC_READ(MSC01_PCI_INTSTAT, intr);
@@ -20459,70 +30357,8 @@
return -1;
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/ops-tx4927.c linux_HEAD/arch/mips/pci/ops-tx4927.c
---- linux-2.6.11.6/arch/mips/pci/ops-tx4927.c 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/ops-tx4927.c 2005-02-17 21:48:57.000000000 +0100
-@@ -120,7 +120,7 @@ static int tx4927_pcibios_read_config(st
- switch (size) {
- case 1:
- *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr->
-- g2pcfgdata |
-+ g2pcfgdata |
- #ifdef __LITTLE_ENDIAN
- (where & 3));
- #else
-@@ -129,7 +129,7 @@ static int tx4927_pcibios_read_config(st
- break;
- case 2:
- *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr->
-- g2pcfgdata |
-+ g2pcfgdata |
- #ifdef __LITTLE_ENDIAN
- (where & 3));
- #else
-@@ -169,7 +169,7 @@ static int tx4927_pcibios_write_config(s
- switch (size) {
- case 1:
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
-- g2pcfgdata |
-+ g2pcfgdata |
- #ifdef __LITTLE_ENDIAN
- (where & 3)) = val;
- #else
-@@ -179,7 +179,7 @@ static int tx4927_pcibios_write_config(s
-
- case 2:
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
-- g2pcfgdata |
-+ g2pcfgdata |
- #ifdef __LITTLE_ENDIAN
- (where & 3)) = val;
- #else
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/ops-vr41xx.c linux_HEAD/arch/mips/pci/ops-vr41xx.c
---- linux-2.6.11.6/arch/mips/pci/ops-vr41xx.c 2005-03-26 04:28:25.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/ops-vr41xx.c 2005-03-09 22:46:10.000000000 +0100
-@@ -3,7 +3,7 @@
- *
- * Copyright (C) 2001-2003 MontaVista Software Inc.
- * Author: Yoichi Yuasa <yyuasa at mvista.com or source at mvista.com>
-- * Copyright (C) 2004 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
-+ * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
-@@ -29,8 +29,8 @@
-
- #include <asm/io.h>
-
--#define PCICONFDREG KSEG1ADDR(0x0f000c14)
--#define PCICONFAREG KSEG1ADDR(0x0f000c18)
-+#define PCICONFDREG (void __iomem *)KSEG1ADDR(0x0f000c14)
-+#define PCICONFAREG (void __iomem *)KSEG1ADDR(0x0f000c18)
-
- static inline int set_pci_configuration_address(unsigned char number,
- unsigned int devfn, int where)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/pci-ip32.c linux_HEAD/arch/mips/pci/pci-ip32.c
---- linux-2.6.11.6/arch/mips/pci/pci-ip32.c 2005-03-26 04:28:26.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/pci-ip32.c linux_HEAD/arch/mips/pci/pci-ip32.c
+--- linux-2.6.12/arch/mips/pci/pci-ip32.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/pci/pci-ip32.c 2005-02-01 13:09:52.000000000 +0100
@@ -136,7 +136,9 @@ static int __init mace_init(void)
BUG_ON(request_irq(MACE_PCI_BRIDGE_IRQ, macepci_error, 0,
@@ -20535,346 +30371,211 @@
register_pci_controller(&mace_pci_controller);
return 0;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/pci-vr41xx.c linux_HEAD/arch/mips/pci/pci-vr41xx.c
---- linux-2.6.11.6/arch/mips/pci/pci-vr41xx.c 2005-04-02 23:39:54.000000000 +0200
-+++ linux_HEAD/arch/mips/pci/pci-vr41xx.c 2005-03-09 22:46:11.000000000 +0100
-@@ -3,8 +3,8 @@
- *
- * Copyright (C) 2001-2003 MontaVista Software Inc.
- * Author: Yoichi Yuasa <yyuasa at mvista.com or source at mvista.com>
-- * Copyright (C) 2004 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
-- * Copyright (C) 2004 by Ralf Baechle (ralf at linux-mips.org)
-+ * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
-+ * Copyright (C) 2004 by Ralf Baechle (ralf at linux-mips.org)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
-@@ -31,12 +31,18 @@
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/pci-lasat.c linux_HEAD/arch/mips/pci/pci-lasat.c
+--- linux-2.6.12/arch/mips/pci/pci-lasat.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pci/pci-lasat.c 2005-07-03 21:13:58.000000000 +0200
+@@ -7,12 +7,8 @@
+ */
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+-#include <linux/interrupt.h>
+ #include <linux/pci.h>
+ #include <linux/types.h>
+-#include <linux/interrupt.h>
+-#include <linux/pci.h>
+-#include <linux/delay.h>
+ #include <asm/bootinfo.h>
- #include <asm/cpu.h>
- #include <asm/io.h>
-+#include <asm/vr41xx/pci.h>
- #include <asm/vr41xx/vr41xx.h>
+ extern struct pci_ops nile4_pci_ops;
+@@ -20,14 +16,14 @@ extern struct pci_ops gt64120_pci_ops;
+ static struct resource lasat_pci_mem_resource = {
+ .name = "LASAT PCI MEM",
+ .start = 0x18000000,
+- .end = 0x19FFFFFF,
++ .end = 0x19ffffff,
+ .flags = IORESOURCE_MEM,
+ };
- #include "pci-vr41xx.h"
+ static struct resource lasat_pci_io_resource = {
+ .name = "LASAT PCI IO",
+ .start = 0x1a000000,
+- .end = 0x1bFFFFFF,
++ .end = 0x1bffffff,
+ .flags = IORESOURCE_IO,
+ };
- extern struct pci_ops vr41xx_pci_ops;
+@@ -38,23 +34,25 @@ static struct pci_controller lasat_pci_c
-+static void __iomem *pciu_base;
-+
-+#define pciu_read(offset) readl(pciu_base + (offset))
-+#define pciu_write(offset, value) writel((value), pciu_base + (offset))
-+
- static struct pci_master_address_conversion pci_master_memory1 = {
- .bus_base_address = PCI_MASTER_MEM1_BUS_BASE_ADDRESS,
- .address_mask = PCI_MASTER_MEM1_ADDRESS_MASK,
-@@ -113,6 +119,13 @@ static int __init vr41xx_pciu_init(void)
+ static int __init lasat_pci_setup(void)
+ {
+- printk("PCI: starting\n");
++ printk("PCI: starting\n");
- setup = &vr41xx_pci_controller_unit_setup;
+- switch (mips_machtype) {
+- case MACH_LASAT_100:
++ switch (mips_machtype) {
++ case MACH_LASAT_100:
+ lasat_pci_controller.pci_ops = >64120_pci_ops;
+ break;
+- case MACH_LASAT_200:
++ case MACH_LASAT_200:
+ lasat_pci_controller.pci_ops = &nile4_pci_ops;
+ break;
+- default:
++ default:
+ panic("pcibios_init: mips_machtype incorrect");
+ }
-+ if (request_mem_region(PCIU_BASE, PCIU_SIZE, "PCIU") == NULL)
-+ return -EBUSY;
+ register_pci_controller(&lasat_pci_controller);
+- return 0;
+
-+ pciu_base = ioremap(PCIU_BASE, PCIU_SIZE);
-+ if (pciu_base == NULL)
-+ return -EBUSY;
++ return 0;
+ }
+-early_initcall(lasat_pci_setup);
+
- /* Disable PCI interrupt */
- vr41xx_disable_pciint();
++arch_initcall(lasat_pci_setup);
-@@ -129,14 +142,14 @@ static int __init vr41xx_pciu_init(void)
- pci_clock_max = PCI_CLOCK_MAX;
- vtclock = vr41xx_get_vtclock_frequency();
- if (vtclock < pci_clock_max)
-- writel(EQUAL_VTCLOCK, PCICLKSELREG);
-+ pciu_write(PCICLKSELREG, EQUAL_VTCLOCK);
- else if ((vtclock / 2) < pci_clock_max)
-- writel(HALF_VTCLOCK, PCICLKSELREG);
-+ pciu_write(PCICLKSELREG, HALF_VTCLOCK);
- else if (current_cpu_data.processor_id >= PRID_VR4131_REV2_1 &&
- (vtclock / 3) < pci_clock_max)
-- writel(ONE_THIRD_VTCLOCK, PCICLKSELREG);
-+ pciu_write(PCICLKSELREG, ONE_THIRD_VTCLOCK);
- else if ((vtclock / 4) < pci_clock_max)
-- writel(QUARTER_VTCLOCK, PCICLKSELREG);
-+ pciu_write(PCICLKSELREG, QUARTER_VTCLOCK);
- else {
- printk(KERN_ERR "PCI Clock is over 33MHz.\n");
- return -EINVAL;
-@@ -151,11 +164,11 @@ static int __init vr41xx_pciu_init(void)
- MASTER_MSK(master->address_mask) |
- WINEN |
- PCIA(master->pci_base_address);
-- writel(val, PCIMMAW1REG);
-+ pciu_write(PCIMMAW1REG, val);
- } else {
-- val = readl(PCIMMAW1REG);
-+ val = pciu_read(PCIMMAW1REG);
- val &= ~WINEN;
-- writel(val, PCIMMAW1REG);
-+ pciu_write(PCIMMAW1REG, val);
- }
+ #define LASATINT_ETH1 0
+ #define LASATINT_ETH0 1
+@@ -68,24 +66,22 @@ early_initcall(lasat_pci_setup);
- if (setup->master_memory2 != NULL) {
-@@ -164,11 +177,11 @@ static int __init vr41xx_pciu_init(void)
- MASTER_MSK(master->address_mask) |
- WINEN |
- PCIA(master->pci_base_address);
-- writel(val, PCIMMAW2REG);
-+ pciu_write(PCIMMAW2REG, val);
- } else {
-- val = readl(PCIMMAW2REG);
-+ val = pciu_read(PCIMMAW2REG);
- val &= ~WINEN;
-- writel(val, PCIMMAW2REG);
-+ pciu_write(PCIMMAW2REG, val);
- }
+ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+ {
+- switch (slot) {
+- case 1:
+- return LASATINT_PCIA; /* Expansion Module 0 */
+- case 2:
+- return LASATINT_PCIB; /* Expansion Module 1 */
+- case 3:
+- return LASATINT_PCIC; /* Expansion Module 2 */
+- case 4:
+- return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
+- case 5:
+- return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
+- case 6:
+- return LASATINT_HDC; /* IDE controller */
+- default:
+- return 0xff; /* Illegal */
+- }
++ switch (slot) {
++ case 1:
++ case 2:
++ case 3:
++ return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
++ case 4:
++ return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
++ case 5:
++ return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
++ case 6:
++ return LASATINT_HDC; /* IDE controller */
++ default:
++ return 0xff; /* Illegal */
++ }
- if (setup->target_memory1 != NULL) {
-@@ -176,11 +189,11 @@ static int __init vr41xx_pciu_init(void)
- val = TARGET_MSK(target->address_mask) |
- WINEN |
- ITA(target->bus_base_address);
-- writel(val, PCITAW1REG);
-+ pciu_write(PCITAW1REG, val);
- } else {
-- val = readl(PCITAW1REG);
-+ val = pciu_read(PCITAW1REG);
- val &= ~WINEN;
-- writel(val, PCITAW1REG);
-+ pciu_write(PCITAW1REG, val);
- }
+- return -1;
++ return -1;
+ }
- if (setup->target_memory2 != NULL) {
-@@ -188,11 +201,11 @@ static int __init vr41xx_pciu_init(void)
- val = TARGET_MSK(target->address_mask) |
- WINEN |
- ITA(target->bus_base_address);
-- writel(val, PCITAW2REG);
-+ pciu_write(PCITAW2REG, val);
- } else {
-- val = readl(PCITAW2REG);
-+ val = pciu_read(PCITAW2REG);
- val &= ~WINEN;
-- writel(val, PCITAW2REG);
-+ pciu_write(PCITAW2REG, val);
- }
+ /* Do platform specific device initialization at pci_enable_device() time */
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pci/pci-vr41xx.c linux_HEAD/arch/mips/pci/pci-vr41xx.c
+--- linux-2.6.12/arch/mips/pci/pci-vr41xx.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pci/pci-vr41xx.c 2005-03-09 22:46:11.000000000 +0100
+@@ -123,10 +123,8 @@ static int __init vr41xx_pciu_init(void)
+ return -EBUSY;
- if (setup->master_io != NULL) {
-@@ -201,50 +214,50 @@ static int __init vr41xx_pciu_init(void)
- MASTER_MSK(master->address_mask) |
- WINEN |
- PCIIA(master->pci_base_address);
-- writel(val, PCIMIOAWREG);
-+ pciu_write(PCIMIOAWREG, val);
- } else {
-- val = readl(PCIMIOAWREG);
-+ val = pciu_read(PCIMIOAWREG);
- val &= ~WINEN;
-- writel(val, PCIMIOAWREG);
-+ pciu_write(PCIMIOAWREG, val);
- }
+ pciu_base = ioremap(PCIU_BASE, PCIU_SIZE);
+- if (pciu_base == NULL) {
+- release_mem_region(PCIU_BASE, PCIU_SIZE);
++ if (pciu_base == NULL)
+ return -EBUSY;
+- }
- if (setup->exclusive_access == CANNOT_LOCK_FROM_DEVICE)
-- writel(UNLOCK, PCIEXACCREG);
-+ pciu_write(PCIEXACCREG, UNLOCK);
- else
-- writel(0, PCIEXACCREG);
-+ pciu_write(PCIEXACCREG, 0);
+ /* Disable PCI interrupt */
+ vr41xx_disable_pciint();
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pmc-sierra/Kconfig linux_HEAD/arch/mips/pmc-sierra/Kconfig
+--- linux-2.6.12/arch/mips/pmc-sierra/Kconfig 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/arch/mips/pmc-sierra/Kconfig 2005-01-30 21:45:37.000000000 +0100
+@@ -0,0 +1,3 @@
++config HYPERTRANSPORT
++ bool "Hypertransport Support for PMC-Sierra Yosemite"
++ depends on PMC_YOSEMITE
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h linux_HEAD/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h
+--- linux-2.6.12/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h 2005-04-14 16:40:13.000000000 +0200
+@@ -34,7 +34,6 @@
+ #include <linux/pci.h>
+ #include <linux/kernel.h>
+ #include <linux/slab.h>
+-#include <linux/version.h>
+ #include <asm/pci.h>
+ #include <asm/io.h>
+ #include <linux/init.h>
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pmc-sierra/yosemite/ht-irq.c linux_HEAD/arch/mips/pmc-sierra/yosemite/ht-irq.c
+--- linux-2.6.12/arch/mips/pmc-sierra/yosemite/ht-irq.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pmc-sierra/yosemite/ht-irq.c 2005-04-14 16:40:13.000000000 +0200
+@@ -26,7 +26,6 @@
+ #include <linux/types.h>
+ #include <linux/pci.h>
+ #include <linux/kernel.h>
+-#include <linux/version.h>
+ #include <linux/init.h>
+ #include <asm/pci.h>
- if (current_cpu_data.cputype == CPU_VR4122)
-- writel(TRDYV(setup->wait_time_limit_from_irdy_to_trdy), PCITRDYVREG);
-+ pciu_write(PCITRDYVREG, TRDYV(setup->wait_time_limit_from_irdy_to_trdy));
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pmc-sierra/yosemite/ht.c linux_HEAD/arch/mips/pmc-sierra/yosemite/ht.c
+--- linux-2.6.12/arch/mips/pmc-sierra/yosemite/ht.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pmc-sierra/yosemite/ht.c 2005-04-14 16:40:13.000000000 +0200
+@@ -28,7 +28,6 @@
+ #include <linux/pci.h>
+ #include <linux/kernel.h>
+ #include <linux/slab.h>
+-#include <linux/version.h>
+ #include <asm/pci.h>
+ #include <asm/io.h>
-- writel(MLTIM(setup->master_latency_timer), LATTIMEREG);
-+ pciu_write(LATTIMEREG, MLTIM(setup->master_latency_timer));
+diff -urpNX dontdiff linux-2.6.12/arch/mips/pmc-sierra/yosemite/setup.c linux_HEAD/arch/mips/pmc-sierra/yosemite/setup.c
+--- linux-2.6.12/arch/mips/pmc-sierra/yosemite/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/pmc-sierra/yosemite/setup.c 2005-07-01 12:09:20.000000000 +0200
+@@ -212,7 +212,7 @@ static void __init py_late_time_init(voi
+ py_rtc_setup();
+ }
- if (setup->mailbox != NULL) {
- mailbox = setup->mailbox;
- val = MBADD(mailbox->base_address) | TYPE_32BITSPACE |
- MSI_MEMORY | PREF_APPROVAL;
-- writel(val, MAILBAREG);
-+ pciu_write(MAILBAREG, val);
- }
+-static int __init pmc_yosemite_setup(void)
++void __init plat_setup(void)
+ {
+ board_time_init = yosemite_time_init;
+ late_time_init = py_late_time_init;
+@@ -228,8 +228,4 @@ static int __init pmc_yosemite_setup(voi
+ OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR);
+ OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0);
+ #endif
+-
+- return 0;
+ }
+-
+-early_initcall(pmc_yosemite_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip22/ip22-setup.c linux_HEAD/arch/mips/sgi-ip22/ip22-setup.c
+--- linux-2.6.12/arch/mips/sgi-ip22/ip22-setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/sgi-ip22/ip22-setup.c 2005-07-01 12:09:20.000000000 +0200
+@@ -53,7 +53,7 @@ EXPORT_SYMBOL(ip22_do_break);
+ extern void ip22_be_init(void) __init;
+ extern void ip22_time_init(void) __init;
- if (setup->target_window1) {
- window = setup->target_window1;
- val = PMBA(window->base_address) | TYPE_32BITSPACE |
- MSI_MEMORY | PREF_APPROVAL;
-- writel(val, PCIMBA1REG);
-+ pciu_write(PCIMBA1REG, val);
- }
+-static int __init ip22_setup(void)
++void __init plat_setup(void)
+ {
+ char *ctype;
- if (setup->target_window2) {
- window = setup->target_window2;
- val = PMBA(window->base_address) | TYPE_32BITSPACE |
- MSI_MEMORY | PREF_APPROVAL;
-- writel(val, PCIMBA2REG);
-+ pciu_write(PCIMBA2REG, val);
+@@ -137,8 +137,4 @@ static int __init ip22_setup(void)
+ }
}
-
-- val = readl(RETVALREG);
-+ val = pciu_read(RETVALREG);
- val &= ~RTYVAL_MASK;
- val |= RTYVAL(setup->retry_limit);
-- writel(val, RETVALREG);
-+ pciu_write(RETVALREG, val);
-
-- val = readl(PCIAPCNTREG);
-+ val = pciu_read(PCIAPCNTREG);
- val &= ~(TKYGNT | PAPC);
-
- switch (setup->arbiter_priority_control) {
-@@ -262,15 +275,16 @@ static int __init vr41xx_pciu_init(void)
- if (setup->take_away_gnt_mode == PCI_TAKE_AWAY_GNT_ENABLE)
- val |= TKYGNT_ENABLE;
-
-- writel(val, PCIAPCNTREG);
-+ pciu_write(PCIAPCNTREG, val);
-
-- writel(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
-- PCI_COMMAND_PARITY | PCI_COMMAND_SERR, COMMANDREG);
-+ pciu_write(COMMANDREG, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
-+ PCI_COMMAND_MASTER | PCI_COMMAND_PARITY |
-+ PCI_COMMAND_SERR);
-
- /* Clear bus error */
-- readl(BUSERRADREG);
-+ pciu_read(BUSERRADREG);
-
-- writel(BLOODY_CONFIG_DONE, PCIENREG);
-+ pciu_write(PCIENREG, PCIU_CONFIG_DONE);
-
- if (setup->mem_resource != NULL)
- vr41xx_pci_controller.mem_resource = setup->mem_resource;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pci/pci-vr41xx.h linux_HEAD/arch/mips/pci/pci-vr41xx.h
---- linux-2.6.11.6/arch/mips/pci/pci-vr41xx.h 2005-03-26 04:28:23.000000000 +0100
-+++ linux_HEAD/arch/mips/pci/pci-vr41xx.h 2005-03-09 22:46:11.000000000 +0100
-@@ -3,7 +3,7 @@
- *
- * Copyright (C) 2002 MontaVista Software Inc.
- * Author: Yoichi Yuasa <yyuasa at mvista.com or source at mvista.com>
-- * Copyright (C) 2004 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
-+ * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
-@@ -22,11 +22,14 @@
- #ifndef __PCI_VR41XX_H
- #define __PCI_VR41XX_H
-
--#define PCIMMAW1REG KSEG1ADDR(0x0f000c00)
--#define PCIMMAW2REG KSEG1ADDR(0x0f000c04)
--#define PCITAW1REG KSEG1ADDR(0x0f000c08)
--#define PCITAW2REG KSEG1ADDR(0x0f000c0c)
--#define PCIMIOAWREG KSEG1ADDR(0x0f000c10)
-+#define PCIU_BASE 0x0f000c00UL
-+#define PCIU_SIZE 0x200UL
-+
-+#define PCIMMAW1REG 0x00
-+#define PCIMMAW2REG 0x04
-+#define PCITAW1REG 0x08
-+#define PCITAW2REG 0x0c
-+#define PCIMIOAWREG 0x10
- #define IBA(addr) ((addr) & 0xff000000U)
- #define MASTER_MSK(mask) (((mask) >> 11) & 0x000fe000U)
- #define PCIA(addr) (((addr) >> 24) & 0x000000ffU)
-@@ -34,13 +37,13 @@
- #define ITA(addr) (((addr) >> 24) & 0x000000ffU)
- #define PCIIA(addr) (((addr) >> 24) & 0x000000ffU)
- #define WINEN 0x1000U
--#define PCICONFDREG KSEG1ADDR(0x0f000c14)
--#define PCICONFAREG KSEG1ADDR(0x0f000c18)
--#define PCIMAILREG KSEG1ADDR(0x0f000c1c)
--#define BUSERRADREG KSEG1ADDR(0x0f000c24)
-+#define PCICONFDREG 0x14
-+#define PCICONFAREG 0x18
-+#define PCIMAILREG 0x1c
-+#define BUSERRADREG 0x24
- #define EA(reg) ((reg) &0xfffffffc)
-
--#define INTCNTSTAREG KSEG1ADDR(0x0f000c28)
-+#define INTCNTSTAREG 0x28
- #define MABTCLR 0x80000000U
- #define TRDYCLR 0x40000000U
- #define PARCLR 0x20000000U
-@@ -67,34 +70,34 @@
- #define MABORT 0x00000002U
- #define TABORT 0x00000001U
-
--#define PCIEXACCREG KSEG1ADDR(0x0f000c2c)
-+#define PCIEXACCREG 0x2c
- #define UNLOCK 0x2U
- #define EAREQ 0x1U
--#define PCIRECONTREG KSEG1ADDR(0x0f000c30)
-+#define PCIRECONTREG 0x30
- #define RTRYCNT(reg) ((reg) & 0x000000ffU)
--#define PCIENREG KSEG1ADDR(0x0f000c34)
-- #define BLOODY_CONFIG_DONE 0x4U
--#define PCICLKSELREG KSEG1ADDR(0x0f000c38)
-+#define PCIENREG 0x34
-+ #define PCIU_CONFIG_DONE 0x4U
-+#define PCICLKSELREG 0x38
- #define EQUAL_VTCLOCK 0x2U
- #define HALF_VTCLOCK 0x0U
- #define ONE_THIRD_VTCLOCK 0x3U
- #define QUARTER_VTCLOCK 0x1U
--#define PCITRDYVREG KSEG1ADDR(0x0f000c3c)
-+#define PCITRDYVREG 0x3c
- #define TRDYV(val) ((uint32_t)(val) & 0xffU)
--#define PCICLKRUNREG KSEG1ADDR(0x0f000c60)
-+#define PCICLKRUNREG 0x60
-
--#define VENDORIDREG KSEG1ADDR(0x0f000d00)
--#define DEVICEIDREG KSEG1ADDR(0x0f000d00)
--#define COMMANDREG KSEG1ADDR(0x0f000d04)
--#define STATUSREG KSEG1ADDR(0x0f000d04)
--#define REVIDREG KSEG1ADDR(0x0f000d08)
--#define CLASSREG KSEG1ADDR(0x0f000d08)
--#define CACHELSREG KSEG1ADDR(0x0f000d0c)
--#define LATTIMEREG KSEG1ADDR(0x0f000d0c)
-+#define VENDORIDREG 0x100
-+#define DEVICEIDREG 0x100
-+#define COMMANDREG 0x104
-+#define STATUSREG 0x104
-+#define REVIDREG 0x108
-+#define CLASSREG 0x108
-+#define CACHELSREG 0x10c
-+#define LATTIMEREG 0x10c
- #define MLTIM(val) (((uint32_t)(val) << 7) & 0xff00U)
--#define MAILBAREG KSEG1ADDR(0x0f000d10)
--#define PCIMBA1REG KSEG1ADDR(0x0f000d14)
--#define PCIMBA2REG KSEG1ADDR(0x0f000d18)
-+#define MAILBAREG 0x110
-+#define PCIMBA1REG 0x114
-+#define PCIMBA2REG 0x118
- #define MBADD(base) ((base) & 0xfffff800U)
- #define PMBA(base) ((base) & 0xffe00000U)
- #define PREF 0x8U
-@@ -104,10 +107,10 @@
- #define TYPE_32BITSPACE 0x0U
- #define MSI 0x1U
- #define MSI_MEMORY 0x0U
--#define INTLINEREG KSEG1ADDR(0x0f000d3c)
--#define INTPINREG KSEG1ADDR(0x0f000d3c)
--#define RETVALREG KSEG1ADDR(0x0f000d40)
--#define PCIAPCNTREG KSEG1ADDR(0x0f000d40)
-+#define INTLINEREG 0x13c
-+#define INTPINREG 0x13c
-+#define RETVALREG 0x140
-+#define PCIAPCNTREG 0x140
- #define TKYGNT 0x04000000U
- #define TKYGNT_ENABLE 0x04000000U
- #define TKYGNT_DISABLE 0x00000000U
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/pmc-sierra/Kconfig linux_HEAD/arch/mips/pmc-sierra/Kconfig
---- linux-2.6.11.6/arch/mips/pmc-sierra/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/arch/mips/pmc-sierra/Kconfig 2005-01-30 21:45:37.000000000 +0100
-@@ -0,0 +1,3 @@
-+config HYPERTRANSPORT
-+ bool "Hypertransport Support for PMC-Sierra Yosemite"
-+ depends on PMC_YOSEMITE
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sgi-ip27/Kconfig linux_HEAD/arch/mips/sgi-ip27/Kconfig
---- linux-2.6.11.6/arch/mips/sgi-ip27/Kconfig 1970-01-01 01:00:00.000000000 +0100
+ #endif
+-
+- return 0;
+ }
+-
+-early_initcall(ip22_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip27/Kconfig linux_HEAD/arch/mips/sgi-ip27/Kconfig
+--- linux-2.6.12/arch/mips/sgi-ip27/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/sgi-ip27/Kconfig 2005-01-30 21:45:36.000000000 +0100
@@ -0,0 +1,54 @@
+#config SGI_SN0_XXL
@@ -20931,9 +30632,24 @@
+ Say Y here to enable replicating the kernel exception handlers
+ across multiple nodes in a NUMA cluster. This trades memory for
+ speed.
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sgi-ip27/ip27-init.c linux_HEAD/arch/mips/sgi-ip27/ip27-init.c
---- linux-2.6.11.6/arch/mips/sgi-ip27/ip27-init.c 2005-03-26 04:28:37.000000000 +0100
-+++ linux_HEAD/arch/mips/sgi-ip27/ip27-init.c 2005-03-21 20:03:47.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip27/ip27-console.c linux_HEAD/arch/mips/sgi-ip27/ip27-console.c
+--- linux-2.6.12/arch/mips/sgi-ip27/ip27-console.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/sgi-ip27/ip27-console.c 2005-07-01 12:09:20.000000000 +0200
+@@ -30,8 +30,10 @@
+ static inline struct ioc3_uartregs *console_uart(void)
+ {
+ struct ioc3 *ioc3;
++ nasid_t nasid;
+
+- ioc3 = (struct ioc3 *)KL_CONFIG_CH_CONS_INFO(get_nasid())->memory_base;
++ nasid = (master_nasid == INVALID_NASID) ? get_nasid() : master_nasid;
++ ioc3 = (struct ioc3 *)KL_CONFIG_CH_CONS_INFO(nasid)->memory_base;
+
+ return &ioc3->sregs.uarta;
+ }
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip27/ip27-init.c linux_HEAD/arch/mips/sgi-ip27/ip27-init.c
+--- linux-2.6.12/arch/mips/sgi-ip27/ip27-init.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/sgi-ip27/ip27-init.c 2005-07-07 13:20:27.000000000 +0200
@@ -56,12 +56,12 @@ static void __init per_hub_init(cnodeid_
{
struct hub_data *hub = hub_data(cnode);
@@ -21015,11 +30731,37 @@
}
/*
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sgi-ip27/ip27-irq.c linux_HEAD/arch/mips/sgi-ip27/ip27-irq.c
---- linux-2.6.11.6/arch/mips/sgi-ip27/ip27-irq.c 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/arch/mips/sgi-ip27/ip27-irq.c 2005-03-21 20:03:47.000000000 +0100
-@@ -74,14 +74,15 @@ extern int irq_to_slot[];
+@@ -198,7 +196,7 @@ extern void ip27_setup_console(void);
+ extern void ip27_time_init(void);
+ extern void ip27_reboot_setup(void);
+-static int __init ip27_setup(void)
++void __init plat_setup(void)
+ {
+ hubreg_t p, e, n_mode;
+ nasid_t nid;
+@@ -245,8 +243,4 @@ static int __init ip27_setup(void)
+ set_io_port_base(IO_BASE);
+
+ board_time_init = ip27_time_init;
+-
+- return 0;
+ }
+-
+-early_initcall(ip27_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip27/ip27-irq.c linux_HEAD/arch/mips/sgi-ip27/ip27-irq.c
+--- linux-2.6.12/arch/mips/sgi-ip27/ip27-irq.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/sgi-ip27/ip27-irq.c 2005-06-18 17:49:19.000000000 +0200
+@@ -14,7 +14,6 @@
+ #include <linux/types.h>
+ #include <linux/interrupt.h>
+ #include <linux/ioport.h>
+-#include <linux/irq.h>
+ #include <linux/timex.h>
+ #include <linux/slab.h>
+ #include <linux/random.h>
+@@ -74,14 +73,15 @@ extern int irq_to_slot[];
+
static inline int alloc_level(int cpu, int irq)
{
+ struct hub_data *hub = hub_data(cpu_to_node(cpu));
@@ -21037,7 +30779,7 @@
si->level_to_irq[level] = irq;
return level;
-@@ -216,9 +217,11 @@ static int intr_connect_level(int cpu, i
+@@ -216,9 +216,11 @@ static int intr_connect_level(int cpu, i
{
nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
struct slice_data *si = cpu_data[cpu].data;
@@ -21050,7 +30792,7 @@
if (!cputoslice(cpu)) {
REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
-@@ -226,6 +229,7 @@ static int intr_connect_level(int cpu, i
+@@ -226,6 +228,7 @@ static int intr_connect_level(int cpu, i
REMOTE_HUB_S(nasid, PI_INT_MASK0_B, si->irq_enable_mask[0]);
REMOTE_HUB_S(nasid, PI_INT_MASK1_B, si->irq_enable_mask[1]);
}
@@ -21058,7 +30800,7 @@
return 0;
}
-@@ -235,7 +239,7 @@ static int intr_disconnect_level(int cpu
+@@ -235,7 +238,7 @@ static int intr_disconnect_level(int cpu
nasid_t nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
struct slice_data *si = cpu_data[cpu].data;
@@ -21067,7 +30809,7 @@
if (!cputoslice(cpu)) {
REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
-@@ -298,6 +302,7 @@ static unsigned int startup_bridge_irq(u
+@@ -298,6 +301,7 @@ static unsigned int startup_bridge_irq(u
static void shutdown_bridge_irq(unsigned int irq)
{
struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
@@ -21075,7 +30817,7 @@
bridge_t *bridge = bc->base;
struct slice_data *si = cpu_data[bc->irq_cpu].data;
int pin, swlevel;
-@@ -313,7 +318,7 @@ static void shutdown_bridge_irq(unsigned
+@@ -313,7 +317,7 @@ static void shutdown_bridge_irq(unsigned
swlevel = find_level(&cpu, irq);
intr_disconnect_level(cpu, swlevel);
@@ -21084,7 +30826,7 @@
si->level_to_irq[swlevel] = -1;
bridge->b_int_enable &= ~(1 << pin);
-@@ -433,25 +438,24 @@ void install_ipi(void)
+@@ -433,25 +437,24 @@ void install_ipi(void)
int slice = LOCAL_HUB_L(PI_CPU_NUM);
int cpu = smp_processor_id();
struct slice_data *si = cpu_data[cpu].data;
@@ -21126,8 +30868,8 @@
+ LOCAL_HUB_S(PI_INT_MASK1_B, si->irq_enable_mask[1]);
}
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sgi-ip27/ip27-smp.c linux_HEAD/arch/mips/sgi-ip27/ip27-smp.c
---- linux-2.6.11.6/arch/mips/sgi-ip27/ip27-smp.c 2005-03-26 04:28:23.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip27/ip27-smp.c linux_HEAD/arch/mips/sgi-ip27/ip27-smp.c
+--- linux-2.6.12/arch/mips/sgi-ip27/ip27-smp.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sgi-ip27/ip27-smp.c 2005-02-17 21:48:58.000000000 +0100
@@ -127,37 +127,28 @@ void cpu_node_probe(void)
printk("Discovered %d cpus on %d nodes\n", highest + 1, num_online_nodes());
@@ -21175,20 +30917,8 @@
replicate_kernel_text();
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sgi-ip32/crime.c linux_HEAD/arch/mips/sgi-ip32/crime.c
---- linux-2.6.11.6/arch/mips/sgi-ip32/crime.c 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/arch/mips/sgi-ip32/crime.c 2005-01-11 20:07:11.000000000 +0100
-@@ -26,7 +26,7 @@ void __init crime_init(void)
- unsigned int id, rev;
- const int field = 2 * sizeof(unsigned long);
-
-- set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
-+ set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
- crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime));
- mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));
-
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sgi-ip32/ip32-irq.c linux_HEAD/arch/mips/sgi-ip32/ip32-irq.c
---- linux-2.6.11.6/arch/mips/sgi-ip32/ip32-irq.c 2005-03-26 04:28:21.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip32/ip32-irq.c linux_HEAD/arch/mips/sgi-ip32/ip32-irq.c
+--- linux-2.6.12/arch/mips/sgi-ip32/ip32-irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sgi-ip32/ip32-irq.c 2005-02-28 16:56:42.000000000 +0100
@@ -163,14 +163,13 @@ static void end_cpu_irq(unsigned int irq
#define mask_and_ack_cpu_irq disable_cpu_irq
@@ -21300,8 +31030,8 @@
};
static void ip32_unknown_interrupt(struct pt_regs *regs)
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sgi-ip32/ip32-memory.c linux_HEAD/arch/mips/sgi-ip32/ip32-memory.c
---- linux-2.6.11.6/arch/mips/sgi-ip32/ip32-memory.c 2005-03-26 04:28:18.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip32/ip32-memory.c linux_HEAD/arch/mips/sgi-ip32/ip32-memory.c
+--- linux-2.6.12/arch/mips/sgi-ip32/ip32-memory.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sgi-ip32/ip32-memory.c 2005-01-31 21:33:22.000000000 +0100
@@ -36,8 +36,8 @@ void __init prom_meminit (void)
if (base + size > (256 << 20))
@@ -21314,8 +31044,29 @@
add_memory_region (base, size, BOOT_MEM_RAM);
}
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/Kconfig linux_HEAD/arch/mips/sibyte/Kconfig
---- linux-2.6.11.6/arch/mips/sibyte/Kconfig 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sgi-ip32/ip32-setup.c linux_HEAD/arch/mips/sgi-ip32/ip32-setup.c
+--- linux-2.6.12/arch/mips/sgi-ip32/ip32-setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/sgi-ip32/ip32-setup.c 2005-07-01 12:09:20.000000000 +0200
+@@ -92,7 +92,7 @@ void __init ip32_timer_setup(struct irqa
+ setup_irq(IP32_R4K_TIMER_IRQ, irq);
+ }
+
+-static int __init ip32_setup(void)
++void __init plat_setup(void)
+ {
+ board_be_init = ip32_be_init;
+
+@@ -152,8 +152,4 @@ static int __init ip32_setup(void)
+ }
+ }
+ #endif
+-
+- return 0;
+ }
+-
+-early_initcall(ip32_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/Kconfig linux_HEAD/arch/mips/sibyte/Kconfig
+--- linux-2.6.12/arch/mips/sibyte/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/sibyte/Kconfig 2005-02-03 15:28:23.000000000 +0100
@@ -0,0 +1,143 @@
+config SIBYTE_SB1250
@@ -21461,8 +31212,8 @@
+config SIBYTE_TBPROF
+ bool "Support for ZBbus profiling"
+ depends on SIBYTE_SB1xxx_SOC
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/sb1250/bcm1250_tbprof.c linux_HEAD/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
---- linux-2.6.11.6/arch/mips/sibyte/sb1250/bcm1250_tbprof.c 2005-03-26 04:28:19.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/sb1250/bcm1250_tbprof.c linux_HEAD/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
+--- linux-2.6.12/arch/mips/sibyte/sb1250/bcm1250_tbprof.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sibyte/sb1250/bcm1250_tbprof.c 2005-02-24 00:13:17.000000000 +0100
@@ -28,6 +28,7 @@
#include <linux/fs.h>
@@ -21700,8 +31451,8 @@
/* XXXKW check if interrupted? */
return put_user(TB_FULL, (int *) arg);
default:
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/sb1250/bus_watcher.c linux_HEAD/arch/mips/sibyte/sb1250/bus_watcher.c
---- linux-2.6.11.6/arch/mips/sibyte/sb1250/bus_watcher.c 2005-03-26 04:28:20.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/sb1250/bus_watcher.c linux_HEAD/arch/mips/sibyte/sb1250/bus_watcher.c
+--- linux-2.6.12/arch/mips/sibyte/sb1250/bus_watcher.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sibyte/sb1250/bus_watcher.c 2005-02-24 00:13:17.000000000 +0100
@@ -189,7 +189,7 @@ static irqreturn_t sibyte_bw_int(int irq
@@ -21712,8 +31463,8 @@
csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG));
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/sb1250/irq.c linux_HEAD/arch/mips/sibyte/sb1250/irq.c
---- linux-2.6.11.6/arch/mips/sibyte/sb1250/irq.c 2005-03-26 04:28:36.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/sb1250/irq.c linux_HEAD/arch/mips/sibyte/sb1250/irq.c
+--- linux-2.6.12/arch/mips/sibyte/sb1250/irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sibyte/sb1250/irq.c 2005-02-28 16:56:42.000000000 +0100
@@ -71,17 +71,15 @@ extern char sb1250_duart_present[];
#endif
@@ -21903,8 +31654,8 @@
sb1250_unmask_irq(0, kgdb_irq);
}
#endif
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/sb1250/setup.c linux_HEAD/arch/mips/sibyte/sb1250/setup.c
---- linux-2.6.11.6/arch/mips/sibyte/sb1250/setup.c 2005-03-26 04:28:16.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/sb1250/setup.c linux_HEAD/arch/mips/sibyte/sb1250/setup.c
+--- linux-2.6.12/arch/mips/sibyte/sb1250/setup.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sibyte/sb1250/setup.c 2005-02-24 00:13:17.000000000 +0100
@@ -153,7 +153,7 @@ void sb1250_setup(void)
int bad_config = 0;
@@ -21924,8 +31675,8 @@
zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/sb1250/smp.c linux_HEAD/arch/mips/sibyte/sb1250/smp.c
---- linux-2.6.11.6/arch/mips/sibyte/sb1250/smp.c 2005-03-26 04:28:43.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/sb1250/smp.c linux_HEAD/arch/mips/sibyte/sb1250/smp.c
+--- linux-2.6.12/arch/mips/sibyte/sb1250/smp.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sibyte/sb1250/smp.c 2005-02-24 00:13:17.000000000 +0100
@@ -29,18 +29,18 @@
#include <asm/sibyte/sb1250_int.h>
@@ -21974,9 +31725,9 @@
/*
* Nothing to do for SMP_RESCHEDULE_YOURSELF; returning from the
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/sb1250/time.c linux_HEAD/arch/mips/sibyte/sb1250/time.c
---- linux-2.6.11.6/arch/mips/sibyte/sb1250/time.c 2005-03-26 04:28:22.000000000 +0100
-+++ linux_HEAD/arch/mips/sibyte/sb1250/time.c 2005-02-24 00:13:17.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/sb1250/time.c linux_HEAD/arch/mips/sibyte/sb1250/time.c
+--- linux-2.6.12/arch/mips/sibyte/sb1250/time.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/sibyte/sb1250/time.c 2005-07-07 11:22:49.000000000 +0200
@@ -67,24 +67,24 @@ void sb1250_time_init(void)
sb1250_mask_irq(cpu, irq);
@@ -22012,7 +31763,12 @@
sb1250_unmask_irq(cpu, irq);
sb1250_steal_irq(irq);
-@@ -105,8 +105,8 @@ void sb1250_timer_interrupt(struct pt_re
+@@ -100,13 +100,12 @@ void sb1250_time_init(void)
+
+ void sb1250_timer_interrupt(struct pt_regs *regs)
+ {
+- extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
+ int cpu = smp_processor_id();
int irq = K_INT_TIMER_0 + cpu;
/* Reset the timer */
@@ -22023,7 +31779,7 @@
/*
* CPU 0 handles the global timer interrupt job
-@@ -130,7 +130,7 @@ void sb1250_timer_interrupt(struct pt_re
+@@ -130,7 +129,7 @@ void sb1250_timer_interrupt(struct pt_re
unsigned long sb1250_gettimeoffset(void)
{
unsigned long count =
@@ -22032,8 +31788,8 @@
return 1000000/HZ - count;
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/swarm/rtc_m41t81.c linux_HEAD/arch/mips/sibyte/swarm/rtc_m41t81.c
---- linux-2.6.11.6/arch/mips/sibyte/swarm/rtc_m41t81.c 2005-03-26 04:28:16.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/swarm/rtc_m41t81.c linux_HEAD/arch/mips/sibyte/swarm/rtc_m41t81.c
+--- linux-2.6.12/arch/mips/sibyte/swarm/rtc_m41t81.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sibyte/swarm/rtc_m41t81.c 2005-02-24 00:13:17.000000000 +0100
@@ -82,59 +82,60 @@
#define M41T81REG_SQW 0x13 /* square wave register */
@@ -22119,8 +31875,8 @@
;
return 0;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/swarm/rtc_xicor1241.c linux_HEAD/arch/mips/sibyte/swarm/rtc_xicor1241.c
---- linux-2.6.11.6/arch/mips/sibyte/swarm/rtc_xicor1241.c 2005-03-26 04:28:17.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/swarm/rtc_xicor1241.c linux_HEAD/arch/mips/sibyte/swarm/rtc_xicor1241.c
+--- linux-2.6.12/arch/mips/sibyte/swarm/rtc_xicor1241.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sibyte/swarm/rtc_xicor1241.c 2005-02-24 00:13:17.000000000 +0100
@@ -57,52 +57,52 @@
@@ -22196,8 +31952,33 @@
return -1;
} else {
return 0;
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sibyte/swarm/time.c linux_HEAD/arch/mips/sibyte/swarm/time.c
---- linux-2.6.11.6/arch/mips/sibyte/swarm/time.c 2005-03-26 04:28:17.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/swarm/setup.c linux_HEAD/arch/mips/sibyte/swarm/setup.c
+--- linux-2.6.12/arch/mips/sibyte/swarm/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/sibyte/swarm/setup.c 2005-07-07 13:02:51.000000000 +0200
+@@ -84,7 +84,7 @@ int swarm_be_handler(struct pt_regs *reg
+ return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL);
+ }
+
+-static int __init swarm_setup(void)
++void __init plat_setup(void)
+ {
+ sb1250_setup();
+
+@@ -133,12 +133,8 @@ static int __init swarm_setup(void)
+ };
+ /* XXXKW for CFE, get lines/cols from environment */
+ #endif
+-
+- return 0;
+ }
+
+-early_initcall(swarm_setup);
+-
+ #ifdef LEDS_PHYS
+
+ #ifdef CONFIG_SIBYTE_CARMEL
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sibyte/swarm/time.c linux_HEAD/arch/mips/sibyte/swarm/time.c
+--- linux-2.6.12/arch/mips/sibyte/swarm/time.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sibyte/swarm/time.c 2005-02-24 00:13:17.000000000 +0100
@@ -79,48 +79,48 @@ static unsigned int usec_bias = 0;
@@ -22279,8 +32060,8 @@
if ((status = xicor_read(X1241REG_SR_RTCF)) < 0) {
printk("x1241: couldn't detect on SWARM SMBus 1\n");
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/sni/irq.c linux_HEAD/arch/mips/sni/irq.c
---- linux-2.6.11.6/arch/mips/sni/irq.c 2005-03-26 04:28:18.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sni/irq.c linux_HEAD/arch/mips/sni/irq.c
+--- linux-2.6.12/arch/mips/sni/irq.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/sni/irq.c 2005-02-28 16:56:42.000000000 +0100
@@ -58,14 +58,13 @@ static void end_pciasic_irq(unsigned int
}
@@ -22304,15 +32085,61 @@
};
/*
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/tx4927/Kconfig linux_HEAD/arch/mips/tx4927/Kconfig
---- linux-2.6.11.6/arch/mips/tx4927/Kconfig 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/sni/setup.c linux_HEAD/arch/mips/sni/setup.c
+--- linux-2.6.12/arch/mips/sni/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/sni/setup.c 2005-07-01 12:09:20.000000000 +0200
+@@ -167,7 +167,7 @@ static inline void sni_pcimt_time_init(v
+ rtc_set_time = mc146818_set_rtc_mmss;
+ }
+
+-static int __init sni_rm200_pci_setup(void)
++void __init plat_setup(void)
+ {
+ sni_pcimt_detect();
+ sni_pcimt_sc_init();
+@@ -196,8 +196,4 @@ static int __init sni_rm200_pci_setup(vo
+ #ifdef CONFIG_PCI
+ register_pci_controller(&sni_controller);
+ #endif
+-
+- return 0;
+ }
+-
+-early_initcall(sni_rm200_pci_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/tx4927/Kconfig linux_HEAD/arch/mips/tx4927/Kconfig
+--- linux-2.6.12/arch/mips/tx4927/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/tx4927/Kconfig 2005-01-30 21:45:36.000000000 +0100
@@ -0,0 +1,3 @@
+config TOSHIBA_FPCIB0
+ bool "FPCIB0 Backplane Support"
+ depends on TOSHIBA_RBTX4927
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c linux_HEAD/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
---- linux-2.6.11.6/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c 2005-03-26 04:28:23.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/tx4927/common/tx4927_setup.c linux_HEAD/arch/mips/tx4927/common/tx4927_setup.c
+--- linux-2.6.12/arch/mips/tx4927/common/tx4927_setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/tx4927/common/tx4927_setup.c 2005-07-01 12:09:20.000000000 +0200
+@@ -64,7 +64,7 @@ static void tx4927_write_buffer_flush(vo
+ }
+
+
+-static void __init tx4927_setup(void)
++void __init plat_setup(void)
+ {
+ board_time_init = tx4927_time_init;
+ board_timer_setup = tx4927_timer_setup;
+@@ -76,12 +76,8 @@ static void __init tx4927_setup(void)
+ toshiba_rbtx4927_setup();
+ }
+ #endif
+-
+- return;
+ }
+
+-early_initcall(tx4927_setup);
+-
+ void __init tx4927_time_init(void)
+ {
+
+diff -urpNX dontdiff linux-2.6.12/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c linux_HEAD/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+--- linux-2.6.12/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c 2005-03-04 20:36:08.000000000 +0100
@@ -77,6 +77,11 @@
#include <linux/hdreg.h>
@@ -22357,78 +32184,319 @@
#ifdef CONFIG_ROOT_NFS
argptr = prom_getcmdline();
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/vr4181/Kconfig linux_HEAD/arch/mips/vr4181/Kconfig
---- linux-2.6.11.6/arch/mips/vr4181/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/arch/mips/vr4181/Kconfig 2005-03-21 20:03:47.000000000 +0100
-@@ -0,0 +1,61 @@
-+config NEC_CMBVR4133
-+ bool "Support for NEC CMB-VR4133"
-+ depends on MACH_VR41XX
-+ select CPU_VR41XX
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select HW_HAS_PCI
-+ select PCI_VR41XX
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-+
-+config ROCKHOPPER
-+ bool "Support for Rockhopper baseboard"
-+ depends on NEC_CMBVR4133
-+ select I8259
-+ select HAVE_STD_PC_SERIAL_PORT
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-+
-+config CASIO_E55
-+ bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
-+ depends on MACH_VR41XX
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select ISA
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-+
-+config IBM_WORKPAD
-+ bool "Support for IBM WorkPad z50"
-+ depends on MACH_VR41XX
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select ISA
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-+
-+config TANBAC_TB0226
-+ bool "Support for TANBAC TB0226 (Mbase)"
-+ depends on MACH_VR41XX
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-+ help
-+ The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by
-+ TANBAC. Please refer to <http://www.tanbac.co.jp/> about Mbase.
-+
-+config TANBAC_TB0229
-+ bool "Support for TANBAC TB0229 (VR4131DIMM)"
-+ depends on MACH_VR41XX
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-+ help
-+ The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured
-+ by TANBAC. Please refer to <http://www.tanbac.co.jp/> about
-+ VR4131DIMM.
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/vr4181/common/irq.c linux_HEAD/arch/mips/vr4181/common/irq.c
---- linux-2.6.11.6/arch/mips/vr4181/common/irq.c 2005-03-26 04:28:37.000000000 +0100
-+++ linux_HEAD/arch/mips/vr4181/common/irq.c 2005-02-28 16:56:42.000000000 +0100
-@@ -86,14 +86,13 @@ sys_irq_end(unsigned int irq)
- }
-
- static hw_irq_controller sys_irq_controller = {
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/common/Makefile linux_HEAD/arch/mips/vr4181/common/Makefile
+--- linux-2.6.12/arch/mips/vr4181/common/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/common/Makefile 1970-01-01 01:00:00.000000000 +0100
+@@ -1,7 +0,0 @@
+-#
+-# Makefile for common code of NEC vr4181 based boards
+-#
+-
+-obj-y := irq.o int_handler.o serial.o time.o
+-
+-EXTRA_AFLAGS := $(CFLAGS)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/common/int_handler.S linux_HEAD/arch/mips/vr4181/common/int_handler.S
+--- linux-2.6.12/arch/mips/vr4181/common/int_handler.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/common/int_handler.S 1970-01-01 01:00:00.000000000 +0100
+@@ -1,206 +0,0 @@
+-/*
+- * arch/mips/vr4181/common/int_handler.S
+- *
+- * Adapted to the VR4181 and almost entirely rewritten:
+- * Copyright (C) 1999 Bradley D. LaRonde and Michael Klar
+- *
+- * Clean up to conform to the new IRQ
+- * Copyright (C) 2001 MontaVista Software Inc.
+- * Author: Jun Sun, jsun at mvista.com or jsun at junsun.net
+- *
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- */
+-
+-#include <asm/asm.h>
+-#include <asm/regdef.h>
+-#include <asm/mipsregs.h>
+-#include <asm/stackframe.h>
+-
+-#include <asm/vr4181/vr4181.h>
+-
+-/*
+- * [jsun]
+- * See include/asm/vr4181/irq.h for IRQ assignment and strategy.
+- */
+-
+- .text
+- .set noreorder
+-
+- .align 5
+- NESTED(vr4181_handle_irq, PT_SIZE, ra)
+-
+- .set noat
+- SAVE_ALL
+- CLI
+-
+- .set at
+- .set noreorder
+-
+- mfc0 t0, CP0_CAUSE
+- mfc0 t2, CP0_STATUS
+-
+- and t0, t2
+-
+- /* we check IP3 first; it happens most frequently */
+- andi t1, t0, STATUSF_IP3
+- bnez t1, ll_cpu_ip3
+- andi t1, t0, STATUSF_IP2
+- bnez t1, ll_cpu_ip2
+- andi t1, t0, STATUSF_IP7 /* cpu timer */
+- bnez t1, ll_cputimer_irq
+- andi t1, t0, STATUSF_IP4
+- bnez t1, ll_cpu_ip4
+- andi t1, t0, STATUSF_IP5
+- bnez t1, ll_cpu_ip5
+- andi t1, t0, STATUSF_IP6
+- bnez t1, ll_cpu_ip6
+- andi t1, t0, STATUSF_IP0 /* software int 0 */
+- bnez t1, ll_cpu_ip0
+- andi t1, t0, STATUSF_IP1 /* software int 1 */
+- bnez t1, ll_cpu_ip1
+- nop
+-
+- .set reorder
+-do_spurious:
+- j spurious_interrupt
+-
+-/*
+- * regular CPU irqs
+- */
+-ll_cputimer_irq:
+- li a0, VR4181_IRQ_TIMER
+- move a1, sp
+- jal do_IRQ
+- j ret_from_irq
+-
+-
+-ll_cpu_ip0:
+- li a0, VR4181_IRQ_SW1
+- move a1, sp
+- jal do_IRQ
+- j ret_from_irq
+-
+-ll_cpu_ip1:
+- li a0, VR4181_IRQ_SW2
+- move a1, sp
+- jal do_IRQ
+- j ret_from_irq
+-
+-ll_cpu_ip3:
+- li a0, VR4181_IRQ_INT1
+- move a1, sp
+- jal do_IRQ
+- j ret_from_irq
+-
+-ll_cpu_ip4:
+- li a0, VR4181_IRQ_INT2
+- move a1, sp
+- jal do_IRQ
+- j ret_from_irq
+-
+-ll_cpu_ip5:
+- li a0, VR4181_IRQ_INT3
+- move a1, sp
+- jal do_IRQ
+- j ret_from_irq
+-
+-ll_cpu_ip6:
+- li a0, VR4181_IRQ_INT4
+- move a1, sp
+- jal do_IRQ
+- j ret_from_irq
+-
+-/*
+- * One of the sys irq has happend.
+- *
+- * In the interest of speed, we first determine in the following order
+- * which 16-irq block have pending interrupts:
+- * sysint1 (16 sources, including cascading intrs from GPIO)
+- * sysint2
+- * gpio (16 intr sources)
+- *
+- * Then we do binary search to find the exact interrupt source.
+- */
+-ll_cpu_ip2:
+-
+- lui t3,%hi(VR4181_SYSINT1REG)
+- lhu t0,%lo(VR4181_SYSINT1REG)(t3)
+- lhu t2,%lo(VR4181_MSYSINT1REG)(t3)
+- and t0, 0xfffb /* hack - remove RTC Long 1 intr */
+- and t0, t2
+- beqz t0, check_sysint2
+-
+- /* check for GPIO interrupts */
+- andi t1, t0, 0x0100
+- bnez t1, check_gpio_int
+-
+- /* so we have an interrupt in sysint1 which is not gpio int */
+- li a0, VR4181_SYS_IRQ_BASE - 1
+- j check_16
+-
+-check_sysint2:
+-
+- lhu t0,%lo(VR4181_SYSINT2REG)(t3)
+- lhu t2,%lo(VR4181_MSYSINT2REG)(t3)
+- and t0, 0xfffe /* hack - remove RTC Long 2 intr */
+- and t0, t2
+- li a0, VR4181_SYS_IRQ_BASE + 16 - 1
+- j check_16
+-
+-check_gpio_int:
+- lui t3,%hi(VR4181_GPINTMSK)
+- lhu t0,%lo(VR4181_GPINTMSK)(t3)
+- lhu t2,%lo(VR4181_GPINTSTAT)(t3)
+- xori t0, 0xffff /* why? reverse logic? */
+- and t0, t2
+- li a0, VR4181_GPIO_IRQ_BASE - 1
+- j check_16
+-
+-/*
+- * When we reach check_16, we have 16-bit status in t0 and base irq number
+- * in a0.
+- */
+-check_16:
+- andi t1, t0, 0xff
+- bnez t1, check_8
+-
+- srl t0, 8
+- addi a0, 8
+- j check_8
+-
+-/*
+- * When we reach check_8, we have 8-bit status in t0 and base irq number
+- * in a0.
+- */
+-check_8:
+- andi t1, t0, 0xf
+- bnez t1, check_4
+-
+- srl t0, 4
+- addi a0, 4
+- j check_4
+-
+-/*
+- * When we reach check_4, we have 4-bit status in t0 and base irq number
+- * in a0.
+- */
+-check_4:
+- andi t0, t0, 0xf
+- beqz t0, do_spurious
+-
+-loop:
+- andi t2, t0, 0x1
+- srl t0, 1
+- addi a0, 1
+- beqz t2, loop
+-
+-found_it:
+- move a1, sp
+- jal do_IRQ
+-
+- j ret_from_irq
+-
+- END(vr4181_handle_irq)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/common/irq.c linux_HEAD/arch/mips/vr4181/common/irq.c
+--- linux-2.6.12/arch/mips/vr4181/common/irq.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/common/irq.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,239 +0,0 @@
+-/*
+- * Copyright (C) 2001 MontaVista Software Inc.
+- * Author: Jun Sun, jsun at mvista.com or jsun at junsun.net
+- * Copyright (C) 2005 Ralf Baechle (ralf at linux-mips.org)
+- *
+- * linux/arch/mips/vr4181/common/irq.c
+- * Completely re-written to use the new irq.c
+- *
+- * Credits to Bradley D. LaRonde and Michael Klar for writing the original
+- * irq.c file which was derived from the common irq.c file.
+- *
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- */
+-#include <linux/types.h>
+-#include <linux/init.h>
+-#include <linux/kernel_stat.h>
+-#include <linux/signal.h>
+-#include <linux/sched.h>
+-#include <linux/interrupt.h>
+-#include <linux/slab.h>
+-#include <linux/random.h>
+-
+-#include <asm/irq.h>
+-#include <asm/mipsregs.h>
+-#include <asm/gdb-stub.h>
+-
+-#include <asm/vr4181/vr4181.h>
+-
+-/*
+- * Strategy:
+- *
+- * We essentially have three irq controllers, CPU, system, and gpio.
+- *
+- * CPU irq controller is taken care by arch/mips/kernel/irq_cpu.c and
+- * CONFIG_IRQ_CPU config option.
+- *
+- * We here provide sys_irq and gpio_irq controller code.
+- */
+-
+-static int sys_irq_base;
+-static int gpio_irq_base;
+-
+-/* ---------------------- sys irq ------------------------ */
+-static void
+-sys_irq_enable(unsigned int irq)
+-{
+- irq -= sys_irq_base;
+- if (irq < 16) {
+- *VR4181_MSYSINT1REG |= (u16)(1 << irq);
+- } else {
+- irq -= 16;
+- *VR4181_MSYSINT2REG |= (u16)(1 << irq);
+- }
+-}
+-
+-static void
+-sys_irq_disable(unsigned int irq)
+-{
+- irq -= sys_irq_base;
+- if (irq < 16) {
+- *VR4181_MSYSINT1REG &= ~((u16)(1 << irq));
+- } else {
+- irq -= 16;
+- *VR4181_MSYSINT2REG &= ~((u16)(1 << irq));
+- }
+-
+-}
+-
+-static unsigned int
+-sys_irq_startup(unsigned int irq)
+-{
+- sys_irq_enable(irq);
+- return 0;
+-}
+-
+-#define sys_irq_shutdown sys_irq_disable
+-#define sys_irq_ack sys_irq_disable
+-
+-static void
+-sys_irq_end(unsigned int irq)
+-{
+- if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+- sys_irq_enable(irq);
+-}
+-
+-static hw_irq_controller sys_irq_controller = {
- "vr4181_sys_irq",
- sys_irq_startup,
- sys_irq_shutdown,
@@ -22437,20 +32505,74 @@
- sys_irq_ack,
- sys_irq_end,
- NULL /* no affinity stuff for UP */
-+ .typename = "vr4181_sys_irq",
-+ .startup = sys_irq_startup,
-+ .shutdown = sys_irq_shutdown,
-+ .enable = sys_irq_enable,
-+ .disable = sys_irq_disable,
-+ .ack = sys_irq_ack,
-+ .end = sys_irq_end,
- };
-
- /* ---------------------- gpio irq ------------------------ */
-@@ -162,14 +161,13 @@ gpio_irq_end(unsigned int irq)
- }
-
- static hw_irq_controller gpio_irq_controller = {
+-};
+-
+-/* ---------------------- gpio irq ------------------------ */
+-/* gpio irq lines use reverse logic */
+-static void
+-gpio_irq_enable(unsigned int irq)
+-{
+- irq -= gpio_irq_base;
+- *VR4181_GPINTMSK &= ~((u16)(1 << irq));
+-}
+-
+-static void
+-gpio_irq_disable(unsigned int irq)
+-{
+- irq -= gpio_irq_base;
+- *VR4181_GPINTMSK |= (u16)(1 << irq);
+-}
+-
+-static unsigned int
+-gpio_irq_startup(unsigned int irq)
+-{
+- gpio_irq_enable(irq);
+-
+- irq -= gpio_irq_base;
+- *VR4181_GPINTEN |= (u16)(1 << irq );
+-
+- return 0;
+-}
+-
+-static void
+-gpio_irq_shutdown(unsigned int irq)
+-{
+- gpio_irq_disable(irq);
+-
+- irq -= gpio_irq_base;
+- *VR4181_GPINTEN &= ~((u16)(1 << irq ));
+-}
+-
+-static void
+-gpio_irq_ack(unsigned int irq)
+-{
+- u16 irqtype;
+- u16 irqshift;
+-
+- gpio_irq_disable(irq);
+-
+- /* we clear interrupt if it is edge triggered */
+- irq -= gpio_irq_base;
+- if (irq < 8) {
+- irqtype = *VR4181_GPINTTYPL;
+- irqshift = 2 << (irq*2);
+- } else {
+- irqtype = *VR4181_GPINTTYPH;
+- irqshift = 2 << ((irq-8)*2);
+- }
+- if ( ! (irqtype & irqshift) ) {
+- *VR4181_GPINTSTAT = (u16) (1 << irq);
+- }
+-}
+-
+-static void
+-gpio_irq_end(unsigned int irq)
+-{
+- if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+- gpio_irq_enable(irq);
+-}
+-
+-static hw_irq_controller gpio_irq_controller = {
- "vr4181_gpio_irq",
- gpio_irq_startup,
- gpio_irq_shutdown,
@@ -22459,18 +32581,599 @@
- gpio_irq_ack,
- gpio_irq_end,
- NULL /* no affinity stuff for UP */
-+ .typename = "vr4181_gpio_irq",
-+ .startup = gpio_irq_startup,
-+ .shutdown = gpio_irq_shutdown,
-+ .enable = gpio_irq_enable,
-+ .disable = gpio_irq_disable,
-+ .ack = gpio_irq_ack,
-+ .end = gpio_irq_end,
- };
-
- /* --------------------- IRQ init stuff ---------------------- */
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/vr41xx/Kconfig linux_HEAD/arch/mips/vr41xx/Kconfig
---- linux-2.6.11.6/arch/mips/vr41xx/Kconfig 1970-01-01 01:00:00.000000000 +0100
+-};
+-
+-/* --------------------- IRQ init stuff ---------------------- */
+-
+-extern asmlinkage void vr4181_handle_irq(void);
+-extern void breakpoint(void);
+-extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
+-extern void mips_cpu_irq_init(u32 irq_base);
+-
+-static struct irqaction cascade =
+- { no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade", NULL, NULL };
+-static struct irqaction reserved =
+- { no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade", NULL, NULL };
+-
+-void __init arch_init_irq(void)
+-{
+- int i;
+-
+- set_except_vector(0, vr4181_handle_irq);
+-
+- /* init CPU irqs */
+- mips_cpu_irq_init(VR4181_CPU_IRQ_BASE);
+-
+- /* init sys irqs */
+- sys_irq_base = VR4181_SYS_IRQ_BASE;
+- for (i=sys_irq_base; i < sys_irq_base + VR4181_NUM_SYS_IRQ; i++) {
+- irq_desc[i].status = IRQ_DISABLED;
+- irq_desc[i].action = NULL;
+- irq_desc[i].depth = 1;
+- irq_desc[i].handler = &sys_irq_controller;
+- }
+-
+- /* init gpio irqs */
+- gpio_irq_base = VR4181_GPIO_IRQ_BASE;
+- for (i=gpio_irq_base; i < gpio_irq_base + VR4181_NUM_GPIO_IRQ; i++) {
+- irq_desc[i].status = IRQ_DISABLED;
+- irq_desc[i].action = NULL;
+- irq_desc[i].depth = 1;
+- irq_desc[i].handler = &gpio_irq_controller;
+- }
+-
+- /* Default all ICU IRQs to off ... */
+- *VR4181_MSYSINT1REG = 0;
+- *VR4181_MSYSINT2REG = 0;
+-
+- /* We initialize the level 2 ICU registers to all bits disabled. */
+- *VR4181_MPIUINTREG = 0;
+- *VR4181_MAIUINTREG = 0;
+- *VR4181_MKIUINTREG = 0;
+-
+- /* disable all GPIO intrs */
+- *VR4181_GPINTMSK = 0xffff;
+-
+- /* vector handler. What these do is register the IRQ as non-sharable */
+- setup_irq(VR4181_IRQ_INT0, &cascade);
+- setup_irq(VR4181_IRQ_GIU, &cascade);
+-
+- /*
+- * RTC interrupts are interesting. They have two destinations.
+- * One is at sys irq controller, and the other is at CPU IP3 and IP4.
+- * RTC timer is used as system timer.
+- * We enable them here, but timer routine will register later
+- * with CPU IP3/IP4.
+- */
+- setup_irq(VR4181_IRQ_RTCL1, &reserved);
+- setup_irq(VR4181_IRQ_RTCL2, &reserved);
+-}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/common/serial.c linux_HEAD/arch/mips/vr4181/common/serial.c
+--- linux-2.6.12/arch/mips/vr4181/common/serial.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/common/serial.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,51 +0,0 @@
+-/*
+- * Copyright 2001 MontaVista Software Inc.
+- * Author: Jun Sun, jsun at mvista.com or jsun at junsun.net
+- *
+- * arch/mips/vr4181/common/serial.c
+- * initialize serial port on vr4181.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+- */
+-
+-/*
+- * [jsun, 010925]
+- * You need to make sure rs_table has at least one element in
+- * drivers/char/serial.c file. There is no good way to do it right
+- * now. A workaround is to include CONFIG_SERIAL_MANY_PORTS in your
+- * configure file, which would gives you 64 ports and wastes 11K ram.
+- */
+-
+-#include <linux/types.h>
+-#include <linux/kernel.h>
+-#include <linux/init.h>
+-#include <linux/serial.h>
+-
+-#include <asm/vr4181/vr4181.h>
+-
+-void __init vr4181_init_serial(void)
+-{
+- struct serial_struct s;
+-
+- /* turn on UART clock */
+- *VR4181_CMUCLKMSK |= VR4181_CMUCLKMSK_MSKSIU;
+-
+- /* clear memory */
+- memset(&s, 0, sizeof(s));
+-
+- s.line = 0; /* we set the first one */
+- s.baud_base = 1152000;
+- s.irq = VR4181_IRQ_SIU;
+- s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; /* STD_COM_FLAGS */
+- s.iomem_base = (u8*)VR4181_SIURB;
+- s.iomem_reg_shift = 0;
+- s.io_type = SERIAL_IO_MEM;
+- if (early_serial_setup(&s) != 0) {
+- panic("vr4181_init_serial() failed!");
+- }
+-}
+-
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/common/time.c linux_HEAD/arch/mips/vr4181/common/time.c
+--- linux-2.6.12/arch/mips/vr4181/common/time.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/common/time.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,145 +0,0 @@
+-/*
+- * Copyright 2001 MontaVista Software Inc.
+- * Author: jsun at mvista.com or jsun at junsun.net
+- *
+- * rtc and time ops for vr4181. Part of code is drived from
+- * linux-vr, originally written by Bradley D. LaRonde & Michael Klar.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+- */
+-
+-#include <linux/kernel.h>
+-#include <linux/spinlock.h>
+-#include <linux/param.h> /* for HZ */
+-#include <linux/time.h>
+-#include <linux/interrupt.h>
+-
+-#include <asm/system.h>
+-#include <asm/time.h>
+-
+-#include <asm/vr4181/vr4181.h>
+-
+-#define COUNTS_PER_JIFFY ((32768 + HZ/2) / HZ)
+-
+-/*
+- * RTC ops
+- */
+-
+-DEFINE_SPINLOCK(rtc_lock);
+-
+-/* per VR41xx docs, bad data can be read if between 2 counts */
+-static inline unsigned short
+-read_time_reg(volatile unsigned short *reg)
+-{
+- unsigned short value;
+- do {
+- value = *reg;
+- barrier();
+- } while (value != *reg);
+- return value;
+-}
+-
+-static unsigned long
+-vr4181_rtc_get_time(void)
+-{
+- unsigned short regh, regm, regl;
+-
+- // why this crazy order, you ask? to guarantee that neither m
+- // nor l wrap before all 3 read
+- do {
+- regm = read_time_reg(VR4181_ETIMEMREG);
+- barrier();
+- regh = read_time_reg(VR4181_ETIMEHREG);
+- barrier();
+- regl = read_time_reg(VR4181_ETIMELREG);
+- } while (regm != read_time_reg(VR4181_ETIMEMREG));
+- return ((regh << 17) | (regm << 1) | (regl >> 15));
+-}
+-
+-static int
+-vr4181_rtc_set_time(unsigned long timeval)
+-{
+- unsigned short intreg;
+- unsigned long flags;
+-
+- spin_lock_irqsave(&rtc_lock, flags);
+- intreg = *VR4181_RTCINTREG & 0x05;
+- barrier();
+- *VR4181_ETIMELREG = timeval << 15;
+- *VR4181_ETIMEMREG = timeval >> 1;
+- *VR4181_ETIMEHREG = timeval >> 17;
+- barrier();
+- // assume that any ints that just triggered are invalid, since the
+- // time value is written non-atomically in 3 separate regs
+- *VR4181_RTCINTREG = 0x05 ^ intreg;
+- spin_unlock_irqrestore(&rtc_lock, flags);
+-
+- return 0;
+-}
+-
+-
+-/*
+- * timer interrupt routine (wrapper)
+- *
+- * we need our own interrupt routine because we need to clear
+- * RTC1 interrupt.
+- */
+-static void
+-vr4181_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+-{
+- /* Clear the interrupt. */
+- *VR4181_RTCINTREG = 0x2;
+-
+- /* call the generic one */
+- timer_interrupt(irq, dev_id, regs);
+-}
+-
+-
+-/*
+- * vr4181_time_init:
+- *
+- * We pick the following choices:
+- * . we use elapsed timer as the RTC. We set some reasonable init data since
+- * it does not persist across reset
+- * . we use RTC1 as the system timer interrupt source.
+- * . we use CPU counter for fast_gettimeoffset and we calivrate the cpu
+- * frequency. In other words, we use calibrate_div64_gettimeoffset().
+- * . we use our own timer interrupt routine which clears the interrupt
+- * and then calls the generic high-level timer interrupt routine.
+- *
+- */
+-
+-extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
+-
+-static void
+-vr4181_timer_setup(struct irqaction *irq)
+-{
+- /* over-write the handler to be our own one */
+- irq->handler = vr4181_timer_interrupt;
+-
+- /* sets up the frequency */
+- *VR4181_RTCL1LREG = COUNTS_PER_JIFFY;
+- *VR4181_RTCL1HREG = 0;
+-
+- /* and ack any pending ints */
+- *VR4181_RTCINTREG = 0x2;
+-
+- /* setup irqaction */
+- setup_irq(VR4181_IRQ_INT1, irq);
+-
+-}
+-
+-void
+-vr4181_init_time(void)
+-{
+- /* setup hookup functions */
+- rtc_get_time = vr4181_rtc_get_time;
+- rtc_set_time = vr4181_rtc_set_time;
+-
+- board_timer_setup = vr4181_timer_setup;
+-}
+-
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/osprey/Makefile linux_HEAD/arch/mips/vr4181/osprey/Makefile
+--- linux-2.6.12/arch/mips/vr4181/osprey/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/osprey/Makefile 1970-01-01 01:00:00.000000000 +0100
+@@ -1,7 +0,0 @@
+-#
+-# Makefile for common code of NEC Osprey board
+-#
+-
+-obj-y := setup.o prom.o reset.o
+-
+-obj-$(CONFIG_KGDB) += dbg_io.o
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/osprey/dbg_io.c linux_HEAD/arch/mips/vr4181/osprey/dbg_io.c
+--- linux-2.6.12/arch/mips/vr4181/osprey/dbg_io.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/osprey/dbg_io.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,136 +0,0 @@
+-/*
+- * kgdb io functions for osprey. We use the serial port on debug board.
+- *
+- * Copyright (C) 2001 MontaVista Software Inc.
+- * Author: jsun at mvista.com or jsun at junsun.net
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+- */
+-
+-/* ======================= CONFIG ======================== */
+-
+-/* [jsun] we use the second serial port for kdb */
+-#define BASE 0xb7fffff0
+-#define MAX_BAUD 115200
+-
+-/* distance in bytes between two serial registers */
+-#define REG_OFFSET 1
+-
+-/*
+- * 0 - kgdb does serial init
+- * 1 - kgdb skip serial init
+- */
+-static int remoteDebugInitialized = 1;
+-
+-/*
+- * the default baud rate *if* kgdb does serial init
+- */
+-#define BAUD_DEFAULT UART16550_BAUD_38400
+-
+-/* ======================= END OF CONFIG ======================== */
+-
+-typedef unsigned char uint8;
+-typedef unsigned int uint32;
+-
+-#define UART16550_BAUD_2400 2400
+-#define UART16550_BAUD_4800 4800
+-#define UART16550_BAUD_9600 9600
+-#define UART16550_BAUD_19200 19200
+-#define UART16550_BAUD_38400 38400
+-#define UART16550_BAUD_57600 57600
+-#define UART16550_BAUD_115200 115200
+-
+-#define UART16550_PARITY_NONE 0
+-#define UART16550_PARITY_ODD 0x08
+-#define UART16550_PARITY_EVEN 0x18
+-#define UART16550_PARITY_MARK 0x28
+-#define UART16550_PARITY_SPACE 0x38
+-
+-#define UART16550_DATA_5BIT 0x0
+-#define UART16550_DATA_6BIT 0x1
+-#define UART16550_DATA_7BIT 0x2
+-#define UART16550_DATA_8BIT 0x3
+-
+-#define UART16550_STOP_1BIT 0x0
+-#define UART16550_STOP_2BIT 0x4
+-
+-/* register offset */
+-#define OFS_RCV_BUFFER 0
+-#define OFS_TRANS_HOLD 0
+-#define OFS_SEND_BUFFER 0
+-#define OFS_INTR_ENABLE (1*REG_OFFSET)
+-#define OFS_INTR_ID (2*REG_OFFSET)
+-#define OFS_DATA_FORMAT (3*REG_OFFSET)
+-#define OFS_LINE_CONTROL (3*REG_OFFSET)
+-#define OFS_MODEM_CONTROL (4*REG_OFFSET)
+-#define OFS_RS232_OUTPUT (4*REG_OFFSET)
+-#define OFS_LINE_STATUS (5*REG_OFFSET)
+-#define OFS_MODEM_STATUS (6*REG_OFFSET)
+-#define OFS_RS232_INPUT (6*REG_OFFSET)
+-#define OFS_SCRATCH_PAD (7*REG_OFFSET)
+-
+-#define OFS_DIVISOR_LSB (0*REG_OFFSET)
+-#define OFS_DIVISOR_MSB (1*REG_OFFSET)
+-
+-
+-/* memory-mapped read/write of the port */
+-#define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
+-#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
+-
+-void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
+-{
+- /* disable interrupts */
+- UART16550_WRITE(OFS_INTR_ENABLE, 0);
+-
+- /* set up buad rate */
+- {
+- uint32 divisor;
+-
+- /* set DIAB bit */
+- UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
+-
+- /* set divisor */
+- divisor = MAX_BAUD / baud;
+- UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
+- UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
+-
+- /* clear DIAB bit */
+- UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
+- }
+-
+- /* set data format */
+- UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
+-}
+-
+-
+-uint8 getDebugChar(void)
+-{
+- if (!remoteDebugInitialized) {
+- remoteDebugInitialized = 1;
+- debugInit(BAUD_DEFAULT,
+- UART16550_DATA_8BIT,
+- UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+- }
+-
+- while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
+- return UART16550_READ(OFS_RCV_BUFFER);
+-}
+-
+-
+-int putDebugChar(uint8 byte)
+-{
+- if (!remoteDebugInitialized) {
+- remoteDebugInitialized = 1;
+- debugInit(BAUD_DEFAULT,
+- UART16550_DATA_8BIT,
+- UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+- }
+-
+- while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
+- UART16550_WRITE(OFS_SEND_BUFFER, byte);
+- return 1;
+-}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/osprey/prom.c linux_HEAD/arch/mips/vr4181/osprey/prom.c
+--- linux-2.6.12/arch/mips/vr4181/osprey/prom.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/osprey/prom.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,49 +0,0 @@
+-/*
+- * Copyright 2001 MontaVista Software Inc.
+- * Author: jsun at mvista.com or jsun at junsun.net
+- *
+- * arch/mips/vr4181/osprey/prom.c
+- * prom code for osprey.
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+- */
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/string.h>
+-#include <linux/mm.h>
+-#include <linux/bootmem.h>
+-#include <asm/bootinfo.h>
+-#include <asm/addrspace.h>
+-
+-const char *get_system_type(void)
+-{
+- return "NEC_Vr41xx Osprey";
+-}
+-
+-/*
+- * [jsun] right now we assume it is the nec debug monitor, which does
+- * not pass any arguments.
+- */
+-void __init prom_init(void)
+-{
+- // cmdline is now set in default config
+- // strcpy(arcs_cmdline, "ip=bootp ");
+- // strcat(arcs_cmdline, "ether=46,0x03fe0300,eth0 ");
+- // strcpy(arcs_cmdline, "ether=0,0x0300,eth0 "
+- // strcat(arcs_cmdline, "video=vr4181fb:xres:240,yres:320,bpp:8 ");
+-
+- mips_machgroup = MACH_GROUP_NEC_VR41XX;
+- mips_machtype = MACH_NEC_OSPREY;
+-
+- /* 16MB fixed */
+- add_memory_region(0, 16 << 20, BOOT_MEM_RAM);
+-}
+-
+-unsigned long __init prom_free_prom_memory(void)
+-{
+- return 0;
+-}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/osprey/reset.c linux_HEAD/arch/mips/vr4181/osprey/reset.c
+--- linux-2.6.12/arch/mips/vr4181/osprey/reset.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/osprey/reset.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,40 +0,0 @@
+-/*
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+- * Copyright (C) 1997, 2001 Ralf Baechle
+- * Copyright 2001 MontaVista Software Inc.
+- * Author: jsun at mvista.com or jsun at junsun.net
+- */
+-#include <linux/sched.h>
+-#include <linux/mm.h>
+-#include <asm/io.h>
+-#include <asm/cacheflush.h>
+-#include <asm/processor.h>
+-#include <asm/reboot.h>
+-#include <asm/system.h>
+-
+-void nec_osprey_restart(char *command)
+-{
+- set_c0_status(ST0_ERL);
+- change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+- flush_cache_all();
+- write_c0_wired(0);
+- __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+-}
+-
+-void nec_osprey_halt(void)
+-{
+- printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+- while (1)
+- __asm__(".set\tmips3\n\t"
+- "wait\n\t"
+- ".set\tmips0");
+-}
+-
+-void nec_osprey_power_off(void)
+-{
+- nec_osprey_halt();
+-}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr4181/osprey/setup.c linux_HEAD/arch/mips/vr4181/osprey/setup.c
+--- linux-2.6.12/arch/mips/vr4181/osprey/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr4181/osprey/setup.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,68 +0,0 @@
+-/*
+- * linux/arch/mips/vr4181/setup.c
+- *
+- * VR41xx setup routines
+- *
+- * Copyright (C) 1999 Bradley D. LaRonde
+- * Copyright (C) 1999, 2000 Michael Klar
+- *
+- * Copyright 2001 MontaVista Software Inc.
+- * Author: jsun at mvista.com or jsun at junsun.net
+- * Copyright (C) 2005 Ralf Baechle (ralf at linux-mips.org)
+- *
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- */
+-
+-#include <linux/ide.h>
+-#include <linux/init.h>
+-#include <linux/delay.h>
+-#include <asm/reboot.h>
+-#include <asm/vr4181/vr4181.h>
+-#include <asm/io.h>
+-
+-
+-extern void nec_osprey_restart(char* c);
+-extern void nec_osprey_halt(void);
+-extern void nec_osprey_power_off(void);
+-
+-extern void vr4181_init_serial(void);
+-extern void vr4181_init_time(void);
+-
+-static void __init nec_osprey_setup(void)
+-{
+- set_io_port_base(VR4181_PORT_BASE);
+- isa_slot_offset = VR4181_ISAMEM_BASE;
+-
+- vr4181_init_serial();
+- vr4181_init_time();
+-
+- _machine_restart = nec_osprey_restart;
+- _machine_halt = nec_osprey_halt;
+- _machine_power_off = nec_osprey_power_off;
+-
+- /* setup resource limit */
+- ioport_resource.end = 0xffffffff;
+- iomem_resource.end = 0xffffffff;
+-
+- /* [jsun] hack */
+- /*
+- printk("[jsun] hack to change external ISA control register, %x -> %x\n",
+- (*VR4181_XISACTL),
+- (*VR4181_XISACTL) | 0x2);
+- *VR4181_XISACTL |= 0x2;
+- */
+-
+- // *VR4181_GPHIBSTH = 0x2000;
+- // *VR4181_GPMD0REG = 0x00c0;
+- // *VR4181_GPINTEN = 1<<6;
+-
+- /* [jsun] I believe this will get the interrupt type right
+- * for the ether port.
+- */
+- *VR4181_GPINTTYPL = 0x3000;
+-}
+-
+-early_initcall(nec_osprey_setup);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/Kconfig linux_HEAD/arch/mips/vr41xx/Kconfig
+--- linux-2.6.12/arch/mips/vr41xx/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/arch/mips/vr41xx/Kconfig 2005-03-21 20:03:47.000000000 +0100
@@ -0,0 +1,107 @@
+config NEC_CMBVR4133
@@ -22580,9 +33283,22 @@
+ depends on MACH_VR41XX && PCI_VR41XX
+ help
+ The NEC VRC4173 is a companion chip for NEC VR4122/VR4131.
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/vr41xx/common/giu.c linux_HEAD/arch/mips/vr41xx/common/giu.c
---- linux-2.6.11.6/arch/mips/vr41xx/common/giu.c 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/arch/mips/vr41xx/common/giu.c 2005-03-21 20:03:47.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/common/Makefile linux_HEAD/arch/mips/vr41xx/common/Makefile
+--- linux-2.6.12/arch/mips/vr41xx/common/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr41xx/common/Makefile 2005-07-01 12:09:20.000000000 +0200
+@@ -2,7 +2,8 @@
+ # Makefile for common code of the NEC VR4100 series.
+ #
+
+-obj-y += bcu.o cmu.o giu.o icu.o init.o int-handler.o pmu.o
++obj-y += bcu.o cmu.o icu.o init.o int-handler.o irq.o pmu.o
++obj-$(CONFIG_GPIO_VR41XX) += giu.o
+ obj-$(CONFIG_VRC4173) += vrc4173.o
+
+ EXTRA_AFLAGS := $(CFLAGS)
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/common/giu.c linux_HEAD/arch/mips/vr41xx/common/giu.c
+--- linux-2.6.12/arch/mips/vr41xx/common/giu.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr41xx/common/giu.c 2005-07-01 12:09:20.000000000 +0200
@@ -3,8 +3,7 @@
*
* Copyright (C) 2002 MontaVista Software Inc.
@@ -22593,15 +33309,7 @@
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
-@@ -29,6 +28,7 @@
- * - Added support for NEC VR4133.
- * - Removed board_irq_init.
- */
-+#include <linux/config.h>
- #include <linux/errno.h>
- #include <linux/init.h>
- #include <linux/irq.h>
-@@ -63,12 +63,6 @@
+@@ -63,12 +62,6 @@
static uint32_t giu_base;
@@ -22614,7 +33322,7 @@
#define read_giuint(offset) readw(giu_base + (offset))
#define write_giuint(val, offset) writew((val), giu_base + (offset))
-@@ -192,18 +186,20 @@ static struct hw_interrupt_type giuint_h
+@@ -192,18 +185,20 @@ static struct hw_interrupt_type giuint_h
.end = end_giuint_high_irq,
};
@@ -22645,48 +33353,147 @@
}
void vr41xx_set_irq_trigger(int pin, int trigger, int hold)
-@@ -296,6 +292,8 @@ void vr41xx_set_irq_level(int pin, int l
+@@ -296,52 +291,7 @@ void vr41xx_set_irq_level(int pin, int l
EXPORT_SYMBOL(vr41xx_set_irq_level);
-+#ifndef MODULE
-+
- #define GIUINT_NR_IRQS 32
+-#define GIUINT_NR_IRQS 32
+-
+-enum {
+- GIUINT_NO_CASCADE,
+- GIUINT_CASCADE
+-};
+-
+-struct vr41xx_giuint_cascade {
+- unsigned int flag;
+- int (*get_irq_number)(int irq);
+-};
+-
+-static struct vr41xx_giuint_cascade giuint_cascade[GIUINT_NR_IRQS];
+-
+-static int no_irq_number(int irq)
+-{
+- return -EINVAL;
+-}
+-
+-int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq))
+-{
+- unsigned int pin;
+- int retval;
+-
+- if (irq < GIU_IRQ(0) || irq > GIU_IRQ(31))
+- return -EINVAL;
+-
+- if(!get_irq_number)
+- return -EINVAL;
+-
+- pin = GIU_IRQ_TO_PIN(irq);
+- giuint_cascade[pin].flag = GIUINT_CASCADE;
+- giuint_cascade[pin].get_irq_number = get_irq_number;
+-
+- retval = setup_irq(irq, &giu_cascade);
+- if (retval != 0) {
+- giuint_cascade[pin].flag = GIUINT_NO_CASCADE;
+- giuint_cascade[pin].get_irq_number = no_irq_number;
+- }
+-
+- return retval;
+-}
+-
+-EXPORT_SYMBOL(vr41xx_cascade_irq);
+-
+-static inline int get_irq_pin_number(void)
++static int giu_get_irq(unsigned int irq, struct pt_regs *regs)
+ {
+ uint16_t pendl, pendh, maskl, maskh;
+ int i;
+@@ -357,12 +307,12 @@ static inline int get_irq_pin_number(voi
+ if (maskl) {
+ for (i = 0; i < 16; i++) {
+ if (maskl & ((uint16_t)1 << i))
+- return i;
++ return GIU_IRQ(i);
+ }
+ } else if (maskh) {
+ for (i = 0; i < 16; i++) {
+ if (maskh & ((uint16_t)1 << i))
+- return i + GIUINT_HIGH_OFFSET;
++ return GIU_IRQ(i + GIUINT_HIGH_OFFSET);
+ }
+ }
- enum {
-@@ -310,6 +308,12 @@ struct vr41xx_giuint_cascade {
-
- static struct vr41xx_giuint_cascade giuint_cascade[GIUINT_NR_IRQS];
-
-+static struct irqaction giu_cascade = {
-+ .handler = no_action,
-+ .mask = CPU_MASK_NONE,
-+ .name = "cascade",
-+};
-+
- static int no_irq_number(int irq)
- {
- return -EINVAL;
-@@ -421,7 +425,7 @@ void giuint_irq_dispatch(struct pt_regs
- enable_irq(GIUINT_CASCADE_IRQ);
+@@ -374,54 +324,7 @@ static inline int get_irq_pin_number(voi
+ return -1;
}
+-static inline void ack_giuint_irq(int pin)
+-{
+- if (pin < GIUINT_HIGH_OFFSET) {
+- clear_giuint(GIUINTENL, (uint16_t)1 << pin);
+- write_giuint((uint16_t)1 << pin, GIUINTSTATL);
+- } else {
+- pin -= GIUINT_HIGH_OFFSET;
+- clear_giuint(GIUINTENH, (uint16_t)1 << pin);
+- write_giuint((uint16_t)1 << pin, GIUINTSTATH);
+- }
+-}
+-
+-static inline void end_giuint_irq(int pin)
+-{
+- if (pin < GIUINT_HIGH_OFFSET)
+- set_giuint(GIUINTENL, (uint16_t)1 << pin);
+- else
+- set_giuint(GIUINTENH, (uint16_t)1 << (pin - GIUINT_HIGH_OFFSET));
+-}
+-
+-void giuint_irq_dispatch(struct pt_regs *regs)
+-{
+- struct vr41xx_giuint_cascade *cascade;
+- unsigned int giuint_irq;
+- int pin;
+-
+- pin = get_irq_pin_number();
+- if (pin < 0)
+- return;
+-
+- disable_irq(GIUINT_CASCADE_IRQ);
+-
+- cascade = &giuint_cascade[pin];
+- giuint_irq = GIU_IRQ(pin);
+- if (cascade->flag == GIUINT_CASCADE) {
+- int irq = cascade->get_irq_number(giuint_irq);
+- ack_giuint_irq(pin);
+- if (irq >= 0)
+- do_IRQ(irq, regs);
+- end_giuint_irq(pin);
+- } else {
+- do_IRQ(giuint_irq, regs);
+- }
+-
+- enable_irq(GIUINT_CASCADE_IRQ);
+-}
+-
-static int __init vr41xx_giu_init(void)
-+void __init init_vr41xx_giuint_irq(void)
++static int __init vr41xx_giu_init(void)
{
int i;
-@@ -437,7 +441,7 @@ static int __init vr41xx_giu_init(void)
+@@ -437,19 +340,24 @@ static int __init vr41xx_giu_init(void)
break;
default:
printk(KERN_ERR "GIU: Unexpected CPU of NEC VR4100 series\n");
- return -EINVAL;
-+ return;
++ return -ENODEV;
}
- for (i = 0; i < GIUINT_NR_IRQS; i++) {
-@@ -449,7 +453,14 @@ static int __init vr41xx_giu_init(void)
- giuint_cascade[i].get_irq_number = no_irq_number;
+- for (i = 0; i < GIUINT_NR_IRQS; i++) {
++ for (i = 0; i < 32; i++) {
+ if (i < GIUINT_HIGH_OFFSET)
+ clear_giuint(GIUINTENL, (uint16_t)1 << i);
+ else
+ clear_giuint(GIUINTENH, (uint16_t)1 << (i - GIUINT_HIGH_OFFSET));
+- giuint_cascade[i].flag = GIUINT_NO_CASCADE;
+- giuint_cascade[i].get_irq_number = no_irq_number;
}
- return 0;
@@ -22697,14 +33504,14 @@
+ irq_desc[i].handler = &giuint_high_irq_type;
+ }
+
-+ setup_irq(GIUINT_CASCADE_IRQ, &giu_cascade);
++ return cascade_irq(GIUINT_IRQ, giu_get_irq);
}
-early_initcall(vr41xx_giu_init);
-+#endif
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/vr41xx/common/icu.c linux_HEAD/arch/mips/vr41xx/common/icu.c
---- linux-2.6.11.6/arch/mips/vr41xx/common/icu.c 2005-03-26 04:28:14.000000000 +0100
-+++ linux_HEAD/arch/mips/vr41xx/common/icu.c 2005-03-09 22:46:11.000000000 +0100
++postcore_initcall(vr41xx_giu_init);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/common/icu.c linux_HEAD/arch/mips/vr41xx/common/icu.c
+--- linux-2.6.12/arch/mips/vr41xx/common/icu.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr41xx/common/icu.c 2005-07-01 12:09:20.000000000 +0200
@@ -3,8 +3,7 @@
*
* Copyright (C) 2001-2002 MontaVista Software Inc.
@@ -22715,125 +33522,1083 @@
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
-@@ -29,6 +28,7 @@
- * Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
- * - Coped with INTASSIGN of NEC VR4133.
- */
-+#include <linux/config.h>
+@@ -32,6 +31,7 @@
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
-@@ -45,8 +45,10 @@
++#include <linux/ioport.h>
+ #include <linux/irq.h>
+ #include <linux/module.h>
+ #include <linux/smp.h>
+@@ -43,30 +43,22 @@
+ #include <asm/irq_cpu.h>
+ #include <asm/vr41xx/vr41xx.h>
- extern asmlinkage void vr41xx_handle_interrupt(void);
+-extern asmlinkage void vr41xx_handle_interrupt(void);
+-
+-extern void init_vr41xx_giuint_irq(void);
+-extern void giuint_irq_dispatch(struct pt_regs *regs);
+-
+-static uint32_t icu1_base;
+-static uint32_t icu2_base;
+-
+-static struct irqaction icu_cascade = {
+- .handler = no_action,
+- .mask = CPU_MASK_NONE,
+- .name = "cascade",
+-};
++static void __iomem *icu1_base;
++static void __iomem *icu2_base;
-+#ifdef CONFIG_GPIO_VR41XX
- extern void init_vr41xx_giuint_irq(void);
- extern void giuint_irq_dispatch(struct pt_regs *regs);
-+#endif
+ static unsigned char sysint1_assign[16] = {
+ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+ static unsigned char sysint2_assign[16] = {
+- 2, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
++ 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
- static uint32_t icu1_base;
- static uint32_t icu2_base;
-@@ -672,9 +674,11 @@ asmlinkage void irq_dispatch(unsigned ch
+-#define SYSINT1REG_TYPE1 KSEG1ADDR(0x0b000080)
+-#define SYSINT2REG_TYPE1 KSEG1ADDR(0x0b000200)
++#define ICU1_TYPE1_BASE 0x0b000080UL
++#define ICU2_TYPE1_BASE 0x0b000200UL
+
+-#define SYSINT1REG_TYPE2 KSEG1ADDR(0x0f000080)
+-#define SYSINT2REG_TYPE2 KSEG1ADDR(0x0f0000a0)
++#define ICU1_TYPE2_BASE 0x0f000080UL
++#define ICU2_TYPE2_BASE 0x0f0000a0UL
++
++#define ICU1_SIZE 0x20
++#define ICU2_SIZE 0x1c
+
+ #define SYSINT1REG 0x00
+ #define PIUINTREG 0x02
+@@ -106,61 +98,61 @@ static unsigned char sysint2_assign[16]
+ #define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE) /* Pin 0-15 */
+ #define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE) /* Pin 0-15 */
+
+-#define read_icu1(offset) readw(icu1_base + (offset))
+-#define write_icu1(val, offset) writew((val), icu1_base + (offset))
++#define INT_TO_IRQ(x) ((x) + 2) /* Int0-4 -> IRQ2-6 */
++
++#define icu1_read(offset) readw(icu1_base + (offset))
++#define icu1_write(offset, value) writew((value), icu1_base + (offset))
+
+-#define read_icu2(offset) readw(icu2_base + (offset))
+-#define write_icu2(val, offset) writew((val), icu2_base + (offset))
++#define icu2_read(offset) readw(icu2_base + (offset))
++#define icu2_write(offset, value) writew((value), icu2_base + (offset))
+
+ #define INTASSIGN_MAX 4
+ #define INTASSIGN_MASK 0x0007
+
+-static inline uint16_t set_icu1(uint8_t offset, uint16_t set)
++static inline uint16_t icu1_set(uint8_t offset, uint16_t set)
+ {
+- uint16_t res;
++ uint16_t data;
+
+- res = read_icu1(offset);
+- res |= set;
+- write_icu1(res, offset);
++ data = icu1_read(offset);
++ data |= set;
++ icu1_write(offset, data);
+
+- return res;
++ return data;
+ }
+
+-static inline uint16_t clear_icu1(uint8_t offset, uint16_t clear)
++static inline uint16_t icu1_clear(uint8_t offset, uint16_t clear)
+ {
+- uint16_t res;
++ uint16_t data;
+
+- res = read_icu1(offset);
+- res &= ~clear;
+- write_icu1(res, offset);
++ data = icu1_read(offset);
++ data &= ~clear;
++ icu1_write(offset, data);
+
+- return res;
++ return data;
+ }
+
+-static inline uint16_t set_icu2(uint8_t offset, uint16_t set)
++static inline uint16_t icu2_set(uint8_t offset, uint16_t set)
+ {
+- uint16_t res;
++ uint16_t data;
+
+- res = read_icu2(offset);
+- res |= set;
+- write_icu2(res, offset);
++ data = icu2_read(offset);
++ data |= set;
++ icu2_write(offset, data);
+
+- return res;
++ return data;
+ }
+
+-static inline uint16_t clear_icu2(uint8_t offset, uint16_t clear)
++static inline uint16_t icu2_clear(uint8_t offset, uint16_t clear)
+ {
+- uint16_t res;
++ uint16_t data;
+
+- res = read_icu2(offset);
+- res &= ~clear;
+- write_icu2(res, offset);
++ data = icu2_read(offset);
++ data &= ~clear;
++ icu2_write(offset, data);
+
+- return res;
++ return data;
+ }
+
+-/*=======================================================================*/
+-
+ void vr41xx_enable_piuint(uint16_t mask)
+ {
+ irq_desc_t *desc = irq_desc + PIU_IRQ;
+@@ -169,7 +161,7 @@ void vr41xx_enable_piuint(uint16_t mask)
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121) {
+ spin_lock_irqsave(&desc->lock, flags);
+- set_icu1(MPIUINTREG, mask);
++ icu1_set(MPIUINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -184,7 +176,7 @@ void vr41xx_disable_piuint(uint16_t mask
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121) {
+ spin_lock_irqsave(&desc->lock, flags);
+- clear_icu1(MPIUINTREG, mask);
++ icu1_clear(MPIUINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -199,7 +191,7 @@ void vr41xx_enable_aiuint(uint16_t mask)
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121) {
+ spin_lock_irqsave(&desc->lock, flags);
+- set_icu1(MAIUINTREG, mask);
++ icu1_set(MAIUINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -214,7 +206,7 @@ void vr41xx_disable_aiuint(uint16_t mask
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121) {
+ spin_lock_irqsave(&desc->lock, flags);
+- clear_icu1(MAIUINTREG, mask);
++ icu1_clear(MAIUINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -229,7 +221,7 @@ void vr41xx_enable_kiuint(uint16_t mask)
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121) {
+ spin_lock_irqsave(&desc->lock, flags);
+- set_icu1(MKIUINTREG, mask);
++ icu1_set(MKIUINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -244,7 +236,7 @@ void vr41xx_disable_kiuint(uint16_t mask
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121) {
+ spin_lock_irqsave(&desc->lock, flags);
+- clear_icu1(MKIUINTREG, mask);
++ icu1_clear(MKIUINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -257,7 +249,7 @@ void vr41xx_enable_dsiuint(uint16_t mask
+ unsigned long flags;
+
+ spin_lock_irqsave(&desc->lock, flags);
+- set_icu1(MDSIUINTREG, mask);
++ icu1_set(MDSIUINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+
+@@ -269,7 +261,7 @@ void vr41xx_disable_dsiuint(uint16_t mas
+ unsigned long flags;
+
+ spin_lock_irqsave(&desc->lock, flags);
+- clear_icu1(MDSIUINTREG, mask);
++ icu1_clear(MDSIUINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+
+@@ -281,7 +273,7 @@ void vr41xx_enable_firint(uint16_t mask)
+ unsigned long flags;
+
+ spin_lock_irqsave(&desc->lock, flags);
+- set_icu2(MFIRINTREG, mask);
++ icu2_set(MFIRINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+
+@@ -293,7 +285,7 @@ void vr41xx_disable_firint(uint16_t mask
+ unsigned long flags;
+
+ spin_lock_irqsave(&desc->lock, flags);
+- clear_icu2(MFIRINTREG, mask);
++ icu2_clear(MFIRINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+
+@@ -308,7 +300,7 @@ void vr41xx_enable_pciint(void)
+ current_cpu_data.cputype == CPU_VR4131 ||
+ current_cpu_data.cputype == CPU_VR4133) {
+ spin_lock_irqsave(&desc->lock, flags);
+- write_icu2(PCIINT0, MPCIINTREG);
++ icu2_write(MPCIINTREG, PCIINT0);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -324,7 +316,7 @@ void vr41xx_disable_pciint(void)
+ current_cpu_data.cputype == CPU_VR4131 ||
+ current_cpu_data.cputype == CPU_VR4133) {
+ spin_lock_irqsave(&desc->lock, flags);
+- write_icu2(0, MPCIINTREG);
++ icu2_write(MPCIINTREG, 0);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -340,7 +332,7 @@ void vr41xx_enable_scuint(void)
+ current_cpu_data.cputype == CPU_VR4131 ||
+ current_cpu_data.cputype == CPU_VR4133) {
+ spin_lock_irqsave(&desc->lock, flags);
+- write_icu2(SCUINT0, MSCUINTREG);
++ icu2_write(MSCUINTREG, SCUINT0);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -356,7 +348,7 @@ void vr41xx_disable_scuint(void)
+ current_cpu_data.cputype == CPU_VR4131 ||
+ current_cpu_data.cputype == CPU_VR4133) {
+ spin_lock_irqsave(&desc->lock, flags);
+- write_icu2(0, MSCUINTREG);
++ icu2_write(MSCUINTREG, 0);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -372,7 +364,7 @@ void vr41xx_enable_csiint(uint16_t mask)
+ current_cpu_data.cputype == CPU_VR4131 ||
+ current_cpu_data.cputype == CPU_VR4133) {
+ spin_lock_irqsave(&desc->lock, flags);
+- set_icu2(MCSIINTREG, mask);
++ icu2_set(MCSIINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -388,7 +380,7 @@ void vr41xx_disable_csiint(uint16_t mask
+ current_cpu_data.cputype == CPU_VR4131 ||
+ current_cpu_data.cputype == CPU_VR4133) {
+ spin_lock_irqsave(&desc->lock, flags);
+- clear_icu2(MCSIINTREG, mask);
++ icu2_clear(MCSIINTREG, mask);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -404,7 +396,7 @@ void vr41xx_enable_bcuint(void)
+ current_cpu_data.cputype == CPU_VR4131 ||
+ current_cpu_data.cputype == CPU_VR4133) {
+ spin_lock_irqsave(&desc->lock, flags);
+- write_icu2(BCUINTR, MBCUINTREG);
++ icu2_write(MBCUINTREG, BCUINTR);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+@@ -420,30 +412,28 @@ void vr41xx_disable_bcuint(void)
+ current_cpu_data.cputype == CPU_VR4131 ||
+ current_cpu_data.cputype == CPU_VR4133) {
+ spin_lock_irqsave(&desc->lock, flags);
+- write_icu2(0, MBCUINTREG);
++ icu2_write(MBCUINTREG, 0);
+ spin_unlock_irqrestore(&desc->lock, flags);
+ }
+ }
+
+ EXPORT_SYMBOL(vr41xx_disable_bcuint);
+
+-/*=======================================================================*/
+-
+ static unsigned int startup_sysint1_irq(unsigned int irq)
+ {
+- set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq));
++ icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
+
+ return 0; /* never anything pending */
+ }
+
+ static void shutdown_sysint1_irq(unsigned int irq)
+ {
+- clear_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq));
++ icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
+ }
+
+ static void enable_sysint1_irq(unsigned int irq)
+ {
+- set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq));
++ icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
+ }
+
+ #define disable_sysint1_irq shutdown_sysint1_irq
+@@ -452,7 +442,7 @@ static void enable_sysint1_irq(unsigned
+ static void end_sysint1_irq(unsigned int irq)
+ {
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+- set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq));
++ icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
+ }
+
+ static struct hw_interrupt_type sysint1_irq_type = {
+@@ -465,23 +455,21 @@ static struct hw_interrupt_type sysint1_
+ .end = end_sysint1_irq,
+ };
+
+-/*=======================================================================*/
+-
+ static unsigned int startup_sysint2_irq(unsigned int irq)
+ {
+- set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq));
++ icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
+
+ return 0; /* never anything pending */
+ }
+
+ static void shutdown_sysint2_irq(unsigned int irq)
+ {
+- clear_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq));
++ icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
+ }
+
+ static void enable_sysint2_irq(unsigned int irq)
+ {
+- set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq));
++ icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
+ }
+
+ #define disable_sysint2_irq shutdown_sysint2_irq
+@@ -490,7 +478,7 @@ static void enable_sysint2_irq(unsigned
+ static void end_sysint2_irq(unsigned int irq)
+ {
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+- set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq));
++ icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
+ }
+
+ static struct hw_interrupt_type sysint2_irq_type = {
+@@ -503,8 +491,6 @@ static struct hw_interrupt_type sysint2_
+ .end = end_sysint2_irq,
+ };
+
+-/*=======================================================================*/
+-
+ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
+ {
+ irq_desc_t *desc = irq_desc + irq;
+@@ -515,8 +501,8 @@ static inline int set_sysint1_assign(uns
+
+ spin_lock_irq(&desc->lock);
+
+- intassign0 = read_icu1(INTASSIGN0);
+- intassign1 = read_icu1(INTASSIGN1);
++ intassign0 = icu1_read(INTASSIGN0);
++ intassign1 = icu1_read(INTASSIGN1);
+
+ switch (pin) {
+ case 0:
+@@ -556,8 +542,8 @@ static inline int set_sysint1_assign(uns
+ }
+
+ sysint1_assign[pin] = assign;
+- write_icu1(intassign0, INTASSIGN0);
+- write_icu1(intassign1, INTASSIGN1);
++ icu1_write(INTASSIGN0, intassign0);
++ icu1_write(INTASSIGN1, intassign1);
+
+ spin_unlock_irq(&desc->lock);
+
+@@ -574,8 +560,8 @@ static inline int set_sysint2_assign(uns
+
+ spin_lock_irq(&desc->lock);
+
+- intassign2 = read_icu1(INTASSIGN2);
+- intassign3 = read_icu1(INTASSIGN3);
++ intassign2 = icu1_read(INTASSIGN2);
++ intassign3 = icu1_read(INTASSIGN3);
+
+ switch (pin) {
+ case 0:
+@@ -623,8 +609,8 @@ static inline int set_sysint2_assign(uns
+ }
+
+ sysint2_assign[pin] = assign;
+- write_icu1(intassign2, INTASSIGN2);
+- write_icu1(intassign3, INTASSIGN3);
++ icu1_write(INTASSIGN2, intassign2);
++ icu1_write(INTASSIGN3, intassign3);
+
+ spin_unlock_irq(&desc->lock);
+
+@@ -651,88 +637,92 @@ int vr41xx_set_intassign(unsigned int ir
+
+ EXPORT_SYMBOL(vr41xx_set_intassign);
+
+-/*=======================================================================*/
+-
+-asmlinkage void irq_dispatch(unsigned char intnum, struct pt_regs *regs)
++static int icu_get_irq(unsigned int irq, struct pt_regs *regs)
+ {
+ uint16_t pend1, pend2;
+ uint16_t mask1, mask2;
+ int i;
+
+- pend1 = read_icu1(SYSINT1REG);
+- mask1 = read_icu1(MSYSINT1REG);
++ pend1 = icu1_read(SYSINT1REG);
++ mask1 = icu1_read(MSYSINT1REG);
+
+- pend2 = read_icu2(SYSINT2REG);
+- mask2 = read_icu2(MSYSINT2REG);
++ pend2 = icu2_read(SYSINT2REG);
++ mask2 = icu2_read(MSYSINT2REG);
+
+ mask1 &= pend1;
+ mask2 &= pend2;
+
+ if (mask1) {
for (i = 0; i < 16; i++) {
- if (intnum == sysint1_assign[i] &&
- (mask1 & ((uint16_t)1 << i))) {
-+#ifdef CONFIG_GPIO_VR41XX
- if (i == 8)
- giuint_irq_dispatch(regs);
- else
-+#endif
- do_IRQ(SYSINT1_IRQ(i), regs);
- return;
- }
-@@ -698,8 +702,10 @@ asmlinkage void irq_dispatch(unsigned ch
+- if (intnum == sysint1_assign[i] &&
+- (mask1 & ((uint16_t)1 << i))) {
+- if (i == 8)
+- giuint_irq_dispatch(regs);
+- else
+- do_IRQ(SYSINT1_IRQ(i), regs);
+- return;
+- }
++ if (irq == INT_TO_IRQ(sysint1_assign[i]) && (mask1 & (1 << i)))
++ return SYSINT1_IRQ(i);
+ }
+ }
- /*=======================================================================*/
+ if (mask2) {
+ for (i = 0; i < 16; i++) {
+- if (intnum == sysint2_assign[i] &&
+- (mask2 & ((uint16_t)1 << i))) {
+- do_IRQ(SYSINT2_IRQ(i), regs);
+- return;
+- }
++ if (irq == INT_TO_IRQ(sysint2_assign[i]) && (mask2 & (1 << i)))
++ return SYSINT2_IRQ(i);
+ }
+ }
--static int __init vr41xx_icu_init(void)
-+static inline void init_vr41xx_icu_irq(void)
+ printk(KERN_ERR "spurious ICU interrupt: %04x,%04x\n", pend1, pend2);
+
+ atomic_inc(&irq_err_count);
+-}
+
+-/*=======================================================================*/
++ return -1;
++}
+
+ static int __init vr41xx_icu_init(void)
{
++ unsigned long icu1_start, icu2_start;
+ int i;
+
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
-@@ -723,17 +729,6 @@ static int __init vr41xx_icu_init(void)
- write_icu2(0, MSYSINT2REG);
- write_icu2(0xffff, MGIUINTHREG);
+- icu1_base = SYSINT1REG_TYPE1;
+- icu2_base = SYSINT2REG_TYPE1;
++ icu1_start = ICU1_TYPE1_BASE;
++ icu2_start = ICU2_TYPE1_BASE;
+ break;
+ case CPU_VR4122:
+ case CPU_VR4131:
+ case CPU_VR4133:
+- icu1_base = SYSINT1REG_TYPE2;
+- icu2_base = SYSINT2REG_TYPE2;
++ icu1_start = ICU1_TYPE2_BASE;
++ icu2_start = ICU2_TYPE2_BASE;
+ break;
+ default:
+ printk(KERN_ERR "ICU: Unexpected CPU of NEC VR4100 series\n");
+- return -EINVAL;
++ return -ENODEV;
+ }
+- write_icu1(0, MSYSINT1REG);
+- write_icu1(0xffff, MGIUINTLREG);
++ if (request_mem_region(icu1_start, ICU1_SIZE, "ICU") == NULL)
++ return -EBUSY;
+
+- write_icu2(0, MSYSINT2REG);
+- write_icu2(0xffff, MGIUINTHREG);
++ if (request_mem_region(icu2_start, ICU2_SIZE, "ICU") == NULL) {
++ release_mem_region(icu1_start, ICU1_SIZE);
++ return -EBUSY;
++ }
+
- return 0;
-}
--
++ icu1_base = ioremap(icu1_start, ICU1_SIZE);
++ if (icu1_base == NULL) {
++ release_mem_region(icu1_start, ICU1_SIZE);
++ release_mem_region(icu2_start, ICU2_SIZE);
++ return -ENOMEM;
++ }
+
-early_initcall(vr41xx_icu_init);
--
++ icu2_base = ioremap(icu2_start, ICU2_SIZE);
++ if (icu2_base == NULL) {
++ iounmap(icu1_base);
++ release_mem_region(icu1_start, ICU1_SIZE);
++ release_mem_region(icu2_start, ICU2_SIZE);
++ return -ENOMEM;
++ }
+
-/*=======================================================================*/
--
++ icu1_write(MSYSINT1REG, 0);
++ icu1_write(MGIUINTLREG, 0xffff);
+
-static inline void init_vr41xx_icu_irq(void)
-{
- int i;
--
++ icu2_write(MSYSINT2REG, 0);
++ icu2_write(MGIUINTHREG, 0xffff);
+
for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
irq_desc[i].handler = &sysint1_irq_type;
+@@ -740,18 +730,13 @@ static inline void init_vr41xx_icu_irq(v
+ for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
+ irq_desc[i].handler = &sysint2_irq_type;
-@@ -751,7 +746,9 @@ void __init arch_init_irq(void)
- {
- mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
- init_vr41xx_icu_irq();
-+#ifdef CONFIG_GPIO_VR41XX
- init_vr41xx_giuint_irq();
-+#endif
+- setup_irq(INT0_CASCADE_IRQ, &icu_cascade);
+- setup_irq(INT1_CASCADE_IRQ, &icu_cascade);
+- setup_irq(INT2_CASCADE_IRQ, &icu_cascade);
+- setup_irq(INT3_CASCADE_IRQ, &icu_cascade);
+- setup_irq(INT4_CASCADE_IRQ, &icu_cascade);
+-}
++ cascade_irq(INT0_IRQ, icu_get_irq);
++ cascade_irq(INT1_IRQ, icu_get_irq);
++ cascade_irq(INT2_IRQ, icu_get_irq);
++ cascade_irq(INT3_IRQ, icu_get_irq);
++ cascade_irq(INT4_IRQ, icu_get_irq);
- set_except_vector(0, vr41xx_handle_interrupt);
+-void __init arch_init_irq(void)
+-{
+- mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
+- init_vr41xx_icu_irq();
+- init_vr41xx_giuint_irq();
+-
+- set_except_vector(0, vr41xx_handle_interrupt);
++ return 0;
}
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/vr41xx/nec-cmbvr4133/init.c linux_HEAD/arch/mips/vr41xx/nec-cmbvr4133/init.c
---- linux-2.6.11.6/arch/mips/vr41xx/nec-cmbvr4133/init.c 2005-03-26 04:28:20.000000000 +0100
-+++ linux_HEAD/arch/mips/vr41xx/nec-cmbvr4133/init.c 2004-12-15 15:08:18.000000000 +0100
-@@ -12,7 +12,7 @@
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
-- * Support for NEC-CMBVR4133 in 2.6
-+ * Support for NEC-CMBVR4133 in 2.6
- * Manish Lachwani (mlachwani at mvista.com)
++
++core_initcall(vr41xx_icu_init);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/common/int-handler.S linux_HEAD/arch/mips/vr41xx/common/int-handler.S
+--- linux-2.6.12/arch/mips/vr41xx/common/int-handler.S 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr41xx/common/int-handler.S 2005-07-01 12:09:20.000000000 +0200
+@@ -71,24 +71,24 @@
+
+ andi t1, t0, CAUSEF_IP3 # check for Int1
+ bnez t1, handle_int
+- li a0, 1
++ li a0, 3
+
+ andi t1, t0, CAUSEF_IP4 # check for Int2
+ bnez t1, handle_int
+- li a0, 2
++ li a0, 4
+
+ andi t1, t0, CAUSEF_IP5 # check for Int3
+ bnez t1, handle_int
+- li a0, 3
++ li a0, 5
+
+ andi t1, t0, CAUSEF_IP6 # check for Int4
+ bnez t1, handle_int
+- li a0, 4
++ li a0, 6
+
+ 1:
+ andi t1, t0, CAUSEF_IP2 # check for Int0
+ bnez t1, handle_int
+- li a0, 0
++ li a0, 2
+
+ andi t1, t0, CAUSEF_IP0 # check for IP0
+ bnez t1, handle_irq
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/common/irq.c linux_HEAD/arch/mips/vr41xx/common/irq.c
+--- linux-2.6.12/arch/mips/vr41xx/common/irq.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/arch/mips/vr41xx/common/irq.c 2005-06-02 16:37:13.000000000 +0200
+@@ -0,0 +1,86 @@
++/*
++ * Interrupt handing routines for NEC VR4100 series.
++ *
++ * Copyright (C) 2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
++ */
++#include <linux/interrupt.h>
++
++#include <asm/irq_cpu.h>
++#include <asm/system.h>
++#include <asm/vr41xx/vr41xx.h>
++
++typedef struct irq_cascade {
++ int (*get_irq)(unsigned int, struct pt_regs *);
++} irq_cascade_t;
++
++static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned;
++
++static struct irqaction cascade_irqaction = {
++ .handler = no_action,
++ .mask = CPU_MASK_NONE,
++ .name = "cascade",
++};
++
++int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *))
++{
++ int retval = 0;
++
++ if (irq >= NR_IRQS)
++ return -EINVAL;
++
++ if (irq_cascade[irq].get_irq != NULL)
++ free_irq(irq, NULL);
++
++ irq_cascade[irq].get_irq = get_irq;
++
++ if (get_irq != NULL) {
++ retval = setup_irq(irq, &cascade_irqaction);
++ if (retval < 0)
++ irq_cascade[irq].get_irq = NULL;
++ }
++
++ return retval;
++}
++
++asmlinkage void irq_dispatch(unsigned int irq, struct pt_regs *regs)
++{
++ irq_cascade_t *cascade;
++
++ if (irq >= NR_IRQS) {
++ atomic_inc(&irq_err_count);
++ return;
++ }
++
++ cascade = irq_cascade + irq;
++ if (cascade->get_irq != NULL) {
++ irq = cascade->get_irq(irq, regs);
++ if (irq < 0)
++ atomic_inc(&irq_err_count);
++ else
++ irq_dispatch(irq, regs);
++ } else
++ do_IRQ(irq, regs);
++}
++
++extern asmlinkage void vr41xx_handle_interrupt(void);
++
++void __init arch_init_irq(void)
++{
++ mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
++
++ set_except_vector(0, vr41xx_handle_interrupt);
++}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/common/ksyms.c linux_HEAD/arch/mips/vr41xx/common/ksyms.c
+--- linux-2.6.12/arch/mips/vr41xx/common/ksyms.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/arch/mips/vr41xx/common/ksyms.c 2005-02-17 21:48:59.000000000 +0100
+@@ -0,0 +1,33 @@
++/*
++ * ksyms.c, Export NEC VR4100 series specific functions needed for loadable modules.
++ *
++ * Copyright (C) 2003 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
++ * Copyright (C) 2005 Ralf Baechle (ralf at linux-mips.org)
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
++ */
++#include <linux/module.h>
++
++#include <asm/vr41xx/vr41xx.h>
++
++EXPORT_SYMBOL(vr41xx_get_vtclock_frequency);
++EXPORT_SYMBOL(vr41xx_get_tclock_frequency);
++
++EXPORT_SYMBOL(vr41xx_set_rtclong1_cycle);
++EXPORT_SYMBOL(vr41xx_read_rtclong1_counter);
++EXPORT_SYMBOL(vr41xx_set_rtclong2_cycle);
++EXPORT_SYMBOL(vr41xx_read_rtclong2_counter);
++EXPORT_SYMBOL(vr41xx_set_tclock_cycle);
++EXPORT_SYMBOL(vr41xx_read_tclock_counter);
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/common/rtc.c linux_HEAD/arch/mips/vr41xx/common/rtc.c
+--- linux-2.6.12/arch/mips/vr41xx/common/rtc.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/arch/mips/vr41xx/common/rtc.c 2005-07-01 12:09:20.000000000 +0200
+@@ -0,0 +1,317 @@
++/*
++ * rtc.c, RTC(has only timer function) routines for NEC VR4100 series.
++ *
++ * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
++ */
++#include <linux/init.h>
++#include <linux/irq.h>
++#include <linux/smp.h>
++#include <linux/types.h>
++
++#include <asm/io.h>
++#include <asm/time.h>
++#include <asm/vr41xx/vr41xx.h>
++
++static uint32_t rtc1_base;
++static uint32_t rtc2_base;
++
++static uint64_t previous_elapsedtime;
++static unsigned int remainder_per_sec;
++static unsigned int cycles_per_sec;
++static unsigned int cycles_per_jiffy;
++static unsigned long epoch_time;
++
++#define CYCLES_PER_JIFFY (CLOCK_TICK_RATE / HZ)
++#define REMAINDER_PER_SEC (CLOCK_TICK_RATE - (CYCLES_PER_JIFFY * HZ))
++#define CYCLES_PER_100USEC ((CLOCK_TICK_RATE + (10000 / 2)) / 10000)
++
++#define ETIMELREG_TYPE1 KSEG1ADDR(0x0b0000c0)
++#define TCLKLREG_TYPE1 KSEG1ADDR(0x0b0001c0)
++
++#define ETIMELREG_TYPE2 KSEG1ADDR(0x0f000100)
++#define TCLKLREG_TYPE2 KSEG1ADDR(0x0f000120)
++
++/* RTC 1 registers */
++#define ETIMELREG 0x00
++#define ETIMEMREG 0x02
++#define ETIMEHREG 0x04
++/* RFU */
++#define ECMPLREG 0x08
++#define ECMPMREG 0x0a
++#define ECMPHREG 0x0c
++/* RFU */
++#define RTCL1LREG 0x10
++#define RTCL1HREG 0x12
++#define RTCL1CNTLREG 0x14
++#define RTCL1CNTHREG 0x16
++#define RTCL2LREG 0x18
++#define RTCL2HREG 0x1a
++#define RTCL2CNTLREG 0x1c
++#define RTCL2CNTHREG 0x1e
++
++/* RTC 2 registers */
++#define TCLKLREG 0x00
++#define TCLKHREG 0x02
++#define TCLKCNTLREG 0x04
++#define TCLKCNTHREG 0x06
++/* RFU */
++#define RTCINTREG 0x1e
++ #define TCLOCK_INT 0x08
++ #define RTCLONG2_INT 0x04
++ #define RTCLONG1_INT 0x02
++ #define ELAPSEDTIME_INT 0x01
++
++#define read_rtc1(offset) readw(rtc1_base + (offset))
++#define write_rtc1(val, offset) writew((val), rtc1_base + (offset))
++
++#define read_rtc2(offset) readw(rtc2_base + (offset))
++#define write_rtc2(val, offset) writew((val), rtc2_base + (offset))
++
++static inline uint64_t read_elapsedtime_counter(void)
++{
++ uint64_t first, second;
++ uint32_t first_mid, first_low;
++ uint32_t second_mid, second_low;
++
++ do {
++ first_low = (uint32_t)read_rtc1(ETIMELREG);
++ first_mid = (uint32_t)read_rtc1(ETIMEMREG);
++ first = (uint64_t)read_rtc1(ETIMEHREG);
++ second_low = (uint32_t)read_rtc1(ETIMELREG);
++ second_mid = (uint32_t)read_rtc1(ETIMEMREG);
++ second = (uint64_t)read_rtc1(ETIMEHREG);
++ } while (first_low != second_low || first_mid != second_mid ||
++ first != second);
++
++ return (first << 32) | (uint64_t)((first_mid << 16) | first_low);
++}
++
++static inline void write_elapsedtime_counter(uint64_t time)
++{
++ write_rtc1((uint16_t)time, ETIMELREG);
++ write_rtc1((uint16_t)(time >> 16), ETIMEMREG);
++ write_rtc1((uint16_t)(time >> 32), ETIMEHREG);
++}
++
++static inline void write_elapsedtime_compare(uint64_t time)
++{
++ write_rtc1((uint16_t)time, ECMPLREG);
++ write_rtc1((uint16_t)(time >> 16), ECMPMREG);
++ write_rtc1((uint16_t)(time >> 32), ECMPHREG);
++}
++
++void vr41xx_set_rtclong1_cycle(uint32_t cycles)
++{
++ write_rtc1((uint16_t)cycles, RTCL1LREG);
++ write_rtc1((uint16_t)(cycles >> 16), RTCL1HREG);
++}
++
++uint32_t vr41xx_read_rtclong1_counter(void)
++{
++ uint32_t first_high, first_low;
++ uint32_t second_high, second_low;
++
++ do {
++ first_low = (uint32_t)read_rtc1(RTCL1CNTLREG);
++ first_high = (uint32_t)read_rtc1(RTCL1CNTHREG);
++ second_low = (uint32_t)read_rtc1(RTCL1CNTLREG);
++ second_high = (uint32_t)read_rtc1(RTCL1CNTHREG);
++ } while (first_low != second_low || first_high != second_high);
++
++ return (first_high << 16) | first_low;
++}
++
++void vr41xx_set_rtclong2_cycle(uint32_t cycles)
++{
++ write_rtc1((uint16_t)cycles, RTCL2LREG);
++ write_rtc1((uint16_t)(cycles >> 16), RTCL2HREG);
++}
++
++uint32_t vr41xx_read_rtclong2_counter(void)
++{
++ uint32_t first_high, first_low;
++ uint32_t second_high, second_low;
++
++ do {
++ first_low = (uint32_t)read_rtc1(RTCL2CNTLREG);
++ first_high = (uint32_t)read_rtc1(RTCL2CNTHREG);
++ second_low = (uint32_t)read_rtc1(RTCL2CNTLREG);
++ second_high = (uint32_t)read_rtc1(RTCL2CNTHREG);
++ } while (first_low != second_low || first_high != second_high);
++
++ return (first_high << 16) | first_low;
++}
++
++void vr41xx_set_tclock_cycle(uint32_t cycles)
++{
++ write_rtc2((uint16_t)cycles, TCLKLREG);
++ write_rtc2((uint16_t)(cycles >> 16), TCLKHREG);
++}
++
++uint32_t vr41xx_read_tclock_counter(void)
++{
++ uint32_t first_high, first_low;
++ uint32_t second_high, second_low;
++
++ do {
++ first_low = (uint32_t)read_rtc2(TCLKCNTLREG);
++ first_high = (uint32_t)read_rtc2(TCLKCNTHREG);
++ second_low = (uint32_t)read_rtc2(TCLKCNTLREG);
++ second_high = (uint32_t)read_rtc2(TCLKCNTHREG);
++ } while (first_low != second_low || first_high != second_high);
++
++ return (first_high << 16) | first_low;
++}
++
++static void vr41xx_timer_ack(void)
++{
++ uint64_t cur;
++
++ write_rtc2(ELAPSEDTIME_INT, RTCINTREG);
++
++ previous_elapsedtime += (uint64_t)cycles_per_jiffy;
++ cycles_per_sec += cycles_per_jiffy;
++
++ if (cycles_per_sec >= CLOCK_TICK_RATE) {
++ cycles_per_sec = 0;
++ remainder_per_sec = REMAINDER_PER_SEC;
++ }
++
++ cycles_per_jiffy = 0;
++
++ do {
++ cycles_per_jiffy += CYCLES_PER_JIFFY;
++ if (remainder_per_sec > 0) {
++ cycles_per_jiffy++;
++ remainder_per_sec--;
++ }
++
++ cur = read_elapsedtime_counter();
++ } while (cur >= previous_elapsedtime + (uint64_t)cycles_per_jiffy);
++
++ write_elapsedtime_compare(previous_elapsedtime + (uint64_t)cycles_per_jiffy);
++}
++
++static void vr41xx_hpt_init(unsigned int count)
++{
++}
++
++static unsigned int vr41xx_hpt_read(void)
++{
++ uint64_t cur;
++
++ cur = read_elapsedtime_counter();
++
++ return (unsigned int)cur;
++}
++
++static unsigned long vr41xx_gettimeoffset(void)
++{
++ uint64_t cur;
++ unsigned long gap;
++
++ cur = read_elapsedtime_counter();
++ gap = (unsigned long)(cur - previous_elapsedtime);
++ gap = gap / CYCLES_PER_100USEC * 100; /* usec */
++
++ return gap;
++}
++
++static unsigned long vr41xx_get_time(void)
++{
++ uint64_t counts;
++
++ counts = read_elapsedtime_counter();
++ counts >>= 15;
++
++ return epoch_time + (unsigned long)counts;
++
++}
++
++static int vr41xx_set_time(unsigned long sec)
++{
++ if (sec < epoch_time)
++ return -EINVAL;
++
++ sec -= epoch_time;
++
++ write_elapsedtime_counter((uint64_t)sec << 15);
++
++ return 0;
++}
++
++void vr41xx_set_epoch_time(unsigned long time)
++{
++ epoch_time = time;
++}
++
++static void __init vr41xx_time_init(void)
++{
++ switch (current_cpu_data.cputype) {
++ case CPU_VR4111:
++ case CPU_VR4121:
++ rtc1_base = ETIMELREG_TYPE1;
++ rtc2_base = TCLKLREG_TYPE1;
++ break;
++ case CPU_VR4122:
++ case CPU_VR4131:
++ case CPU_VR4133:
++ rtc1_base = ETIMELREG_TYPE2;
++ rtc2_base = TCLKLREG_TYPE2;
++ break;
++ default:
++ panic("Unexpected CPU of NEC VR4100 series");
++ break;
++ }
++
++ mips_timer_ack = vr41xx_timer_ack;
++
++ mips_hpt_init = vr41xx_hpt_init;
++ mips_hpt_read = vr41xx_hpt_read;
++ mips_hpt_frequency = CLOCK_TICK_RATE;
++
++ if (epoch_time == 0)
++ epoch_time = mktime(1970, 1, 1, 0, 0, 0);
++
++ rtc_get_time = vr41xx_get_time;
++ rtc_set_time = vr41xx_set_time;
++}
++
++static void __init vr41xx_timer_setup(struct irqaction *irq)
++{
++ do_gettimeoffset = vr41xx_gettimeoffset;
++
++ remainder_per_sec = REMAINDER_PER_SEC;
++ cycles_per_jiffy = CYCLES_PER_JIFFY;
++
++ if (remainder_per_sec > 0) {
++ cycles_per_jiffy++;
++ remainder_per_sec--;
++ }
++
++ previous_elapsedtime = read_elapsedtime_counter();
++ write_elapsedtime_compare(previous_elapsedtime + (uint64_t)cycles_per_jiffy);
++ write_rtc2(ELAPSEDTIME_INT, RTCINTREG);
++
++ setup_irq(ELAPSEDTIME_IRQ, irq);
++}
++
++static void __init vr41xx_rtc_init(void)
++{
++ board_time_init = vr41xx_time_init;
++ board_timer_setup = vr41xx_timer_setup;
++}
+diff -urpNX dontdiff linux-2.6.12/arch/mips/vr41xx/nec-cmbvr4133/setup.c linux_HEAD/arch/mips/vr41xx/nec-cmbvr4133/setup.c
+--- linux-2.6.12/arch/mips/vr41xx/nec-cmbvr4133/setup.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/arch/mips/vr41xx/nec-cmbvr4133/setup.c 2005-07-01 12:09:20.000000000 +0200
+@@ -16,6 +16,7 @@
*/
#include <linux/config.h>
-@@ -40,7 +40,7 @@ void disable_pcnet(void)
- {
- u32 data;
+ #include <linux/init.h>
++#include <linux/console.h>
+ #include <linux/ide.h>
+ #include <linux/ioport.h>
-- /*
-+ /*
- * Workaround for the bug in PMON on VR4133. PMON leaves
- * AMD PCNet controller (on Rockhopper) initialized and running in
- * bus master mode. We have do disable it before doing any
-@@ -69,7 +69,7 @@ void disable_pcnet(void)
- (4 & 0xfc) |
- 1UL,
- PCICONFAREG);
--
-+
- data &= ~4;
-
- writel(data, PCICONFDREG);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/vr41xx/nec-cmbvr4133/irq.c linux_HEAD/arch/mips/vr41xx/nec-cmbvr4133/irq.c
---- linux-2.6.11.6/arch/mips/vr41xx/nec-cmbvr4133/irq.c 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/arch/mips/vr41xx/nec-cmbvr4133/irq.c 2004-12-15 15:08:18.000000000 +0100
-@@ -27,9 +27,9 @@ extern void enable_8259A_irq(unsigned in
- extern void disable_8259A_irq(unsigned int irq);
- extern void mask_and_ack_8259A(unsigned int irq);
- extern void init_8259A(int hoge);
--
-+
- extern int vr4133_rockhopper;
--
-+
- static unsigned int startup_i8259_irq(unsigned int irq)
- {
- enable_8259A_irq(irq - I8259_IRQ_BASE);
-diff -urpNX dontdiff linux-2.6.11.6/arch/mips/vr41xx/nec-cmbvr4133/setup.c linux_HEAD/arch/mips/vr41xx/nec-cmbvr4133/setup.c
---- linux-2.6.11.6/arch/mips/vr41xx/nec-cmbvr4133/setup.c 2005-04-02 23:39:55.000000000 +0200
-+++ linux_HEAD/arch/mips/vr41xx/nec-cmbvr4133/setup.c 2004-12-15 15:08:18.000000000 +0100
@@ -36,13 +37,13 @@ static struct mtd_partition cmbvr4133_mt
.size = 0x1be0000,
.offset = 0,
@@ -22850,35 +34615,7214 @@
{
.name = "User FS2",
.size = MTDPART_SIZ_FULL,
-@@ -54,6 +55,15 @@ static struct mtd_partition cmbvr4133_mt
- #define number_partitions (sizeof(cmbvr4133_mtd_parts)/sizeof(struct mtd_partition))
+@@ -56,7 +57,7 @@ static struct mtd_partition cmbvr4133_mt
+
+ extern void i8259_init(void);
+
+-static int __init nec_cmbvr4133_setup(void)
++static void __init nec_cmbvr4133_setup(void)
+ {
+ #ifdef CONFIG_ROCKHOPPER
+ extern void disable_pcnet(void);
+@@ -90,7 +91,4 @@ static int __init nec_cmbvr4133_setup(vo
+ #ifdef CONFIG_ROCKHOPPER
+ i8259_init();
#endif
+- return 0;
+ }
+-
+-early_initcall(nec_cmbvr4133_setup);
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/abi.h linux_HEAD/include/asm-mips/abi.h
+--- linux-2.6.12/include/asm-mips/abi.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/include/asm-mips/abi.h 2005-05-31 13:49:19.000000000 +0200
+@@ -0,0 +1,25 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2005 by Ralf Baechle
++ * Copyright (C) 2005 MIPS Technologies, Inc.
++ */
++#ifndef _ASM_ABI_H
++#define _ASM_ABI_H
++
++#include <asm/signal.h>
++#include <asm/siginfo.h>
++
++struct mips_abi {
++ int (* const do_signal)(sigset_t *oldset, struct pt_regs *regs);
++ void (* const setup_frame)(struct k_sigaction * ka,
++ struct pt_regs *regs, int signr,
++ sigset_t *set);
++ void (* const setup_rt_frame)(struct k_sigaction * ka,
++ struct pt_regs *regs, int signr,
++ sigset_t *set, siginfo_t *info);
++};
++
++#endif /* _ASM_ABI_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/addrspace.h linux_HEAD/include/asm-mips/addrspace.h
+--- linux-2.6.12/include/asm-mips/addrspace.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/addrspace.h 2005-07-10 12:16:34.000000000 +0200
+@@ -20,10 +20,12 @@
+ #define _ATYPE_
+ #define _ATYPE32_
+ #define _ATYPE64_
++#define _LLCONST_(x) x
+ #else
+ #define _ATYPE_ __PTRDIFF_TYPE__
+ #define _ATYPE32_ int
+ #define _ATYPE64_ long long
++#define _LLCONST_(x) x ## LL
+ #endif
-+extern void (*late_time_init)(void);
+ /*
+@@ -45,8 +47,9 @@
+ /*
+ * Returns the physical address of a CKSEGx / XKPHYS address
+ */
+-#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff)
+-#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff)
++#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
++#define XPHYSADDR(a) ((_ACAST64_(a)) & \
++ _LLCONST_(0x000000ffffffffff))
+
+ #ifdef CONFIG_MIPS64
+
+@@ -55,14 +58,14 @@
+ * The compatibility segments use the full 64-bit sign extended value. Note
+ * the R8000 doesn't have them so don't reference these in generic MIPS code.
+ */
+-#define XKUSEG 0x0000000000000000
+-#define XKSSEG 0x4000000000000000
+-#define XKPHYS 0x8000000000000000
+-#define XKSEG 0xc000000000000000
+-#define CKSEG0 0xffffffff80000000
+-#define CKSEG1 0xffffffffa0000000
+-#define CKSSEG 0xffffffffc0000000
+-#define CKSEG3 0xffffffffe0000000
++#define XKUSEG _LLCONST_(0x0000000000000000)
++#define XKSSEG _LLCONST_(0x4000000000000000)
++#define XKPHYS _LLCONST_(0x8000000000000000)
++#define XKSEG _LLCONST_(0xc000000000000000)
++#define CKSEG0 _LLCONST_(0xffffffff80000000)
++#define CKSEG1 _LLCONST_(0xffffffffa0000000)
++#define CKSSEG _LLCONST_(0xffffffffc0000000)
++#define CKSEG3 _LLCONST_(0xffffffffe0000000)
+
+ #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
+ #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
+@@ -120,54 +123,55 @@
+ #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p))
+ #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
+ #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK)
+-#define PHYS_TO_XKPHYS(cm,a) (0x8000000000000000 | ((cm)<<59) | (a))
++#define PHYS_TO_XKPHYS(cm,a) (_LLCONST_(0x8000000000000000) | \
++ ((cm)<<59) | (a))
+
+ #if defined (CONFIG_CPU_R4300) \
+ || defined (CONFIG_CPU_R4X00) \
+ || defined (CONFIG_CPU_R5000) \
+ || defined (CONFIG_CPU_NEVADA) \
+ || defined (CONFIG_CPU_TX49XX) \
+- || defined (CONFIG_CPU_MIPS64)
+-#define KUSIZE 0x0000010000000000 /* 2^^40 */
+-#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
+-#define K0SIZE 0x0000001000000000 /* 2^^36 */
+-#define K1SIZE 0x0000001000000000 /* 2^^36 */
+-#define K2SIZE 0x000000ff80000000
+-#define KSEGSIZE 0x000000ff80000000 /* max syssegsz */
+-#define TO_PHYS_MASK 0x0000000fffffffff /* 2^^36 - 1 */
++ || defined (CONFIG_CPU_MIPS64_R1)
++#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */
++#define K1SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */
++#define K2SIZE _LLCONST_(0x000000ff80000000)
++#define KSEGSIZE _LLCONST_(0x000000ff80000000) /* max syssegsz */
++#define TO_PHYS_MASK _LLCONST_(0x0000000fffffffff) /* 2^^36 - 1 */
+ #endif
+
+ #if defined (CONFIG_CPU_R8000)
+ /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
+-#define KUSIZE 0x0000010000000000 /* 2^^40 */
+-#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
+-#define K0SIZE 0x0000010000000000 /* 2^^40 */
+-#define K1SIZE 0x0000010000000000 /* 2^^40 */
+-#define K2SIZE 0x0001000000000000
+-#define KSEGSIZE 0x0000010000000000 /* max syssegsz */
+-#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */
++#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define K0SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define K1SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define K2SIZE _LLCONST_(0x0001000000000000)
++#define KSEGSIZE _LLCONST_(0x0000010000000000) /* max syssegsz */
++#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
+ #endif
+
+ #if defined (CONFIG_CPU_R10000)
+-#define KUSIZE 0x0000010000000000 /* 2^^40 */
+-#define KUSIZE_64 0x0000010000000000 /* 2^^40 */
+-#define K0SIZE 0x0000010000000000 /* 2^^40 */
+-#define K1SIZE 0x0000010000000000 /* 2^^40 */
+-#define K2SIZE 0x00000fff80000000
+-#define KSEGSIZE 0x00000fff80000000 /* max syssegsz */
+-#define TO_PHYS_MASK 0x000000ffffffffff /* 2^^40 - 1 */
++#define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define K0SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define K1SIZE _LLCONST_(0x0000010000000000) /* 2^^40 */
++#define K2SIZE _LLCONST_(0x00000fff80000000)
++#define KSEGSIZE _LLCONST_(0x00000fff80000000) /* max syssegsz */
++#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
+ #endif
+
+ /*
+ * Further names for SGI source compatibility. These are stolen from
+ * IRIX's <sys/mips_addrspace.h>.
+ */
+-#define KUBASE 0
+-#define KUSIZE_32 0x0000000080000000 /* KUSIZE
++#define KUBASE _LLCONST_(0)
++#define KUSIZE_32 _LLCONST_(0x0000000080000000) /* KUSIZE
+ for a 32 bit proc */
+-#define K0BASE_EXL_WR 0xa800000000000000 /* exclusive on write */
+-#define K0BASE_NONCOH 0x9800000000000000 /* noncoherent */
+-#define K0BASE_EXL 0xa000000000000000 /* exclusive */
++#define K0BASE_EXL_WR _LLCONST_(0xa800000000000000) /* exclusive on write */
++#define K0BASE_NONCOH _LLCONST_(0x9800000000000000) /* noncoherent */
++#define K0BASE_EXL _LLCONST_(0xa000000000000000) /* exclusive */
+
+ #ifndef CONFIG_CPU_R8000
+
+@@ -176,7 +180,7 @@
+ * in order to catch bugs in the source code.
+ */
+
+-#define COMPAT_K1BASE32 0xffffffffa0000000
++#define COMPAT_K1BASE32 _LLCONST_(0xffffffffa0000000)
+ #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
+
+ #endif
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/asm.h linux_HEAD/include/asm-mips/asm.h
+--- linux-2.6.12/include/asm-mips/asm.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/asm.h 2005-07-01 12:10:27.000000000 +0200
+@@ -107,6 +107,7 @@ symbol = value
+ /*
+ * Print formatted string
+ */
++#ifdef CONFIG_PRINTK
+ #define PRINT(string) \
+ .set push; \
+ .set reorder; \
+@@ -114,6 +115,9 @@ symbol = value
+ jal printk; \
+ .set pop; \
+ TEXT(string)
++#else
++#define PRINT(string)
++#endif
+
+ #define TEXT(msg) \
+ .pushsection .data; \
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/atomic.h linux_HEAD/include/asm-mips/atomic.h
+--- linux-2.6.12/include/asm-mips/atomic.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/atomic.h 2005-07-01 12:10:27.000000000 +0200
+@@ -62,20 +62,24 @@ static __inline__ void atomic_add(int i,
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %0, %1 # atomic_add \n"
+ " addu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqzl %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %0, %1 # atomic_add \n"
+ " addu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else {
+@@ -100,20 +104,24 @@ static __inline__ void atomic_sub(int i,
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %0, %1 # atomic_sub \n"
+ " subu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqzl %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %0, %1 # atomic_sub \n"
+ " subu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else {
+@@ -136,12 +144,14 @@ static __inline__ int atomic_add_return(
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %1, %2 # atomic_add_return \n"
+ " addu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -149,12 +159,14 @@ static __inline__ int atomic_add_return(
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %1, %2 # atomic_add_return \n"
+ " addu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -179,12 +191,14 @@ static __inline__ int atomic_sub_return(
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %1, %2 # atomic_sub_return \n"
+ " subu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -192,12 +206,14 @@ static __inline__ int atomic_sub_return(
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %1, %2 # atomic_sub_return \n"
+ " subu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -229,6 +245,7 @@ static __inline__ int atomic_sub_if_posi
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %1, %2 # atomic_sub_if_positive\n"
+ " subu %0, %1, %3 \n"
+ " bltz %0, 1f \n"
+@@ -236,6 +253,7 @@ static __inline__ int atomic_sub_if_posi
+ " beqzl %0, 1b \n"
+ " sync \n"
+ "1: \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -243,6 +261,7 @@ static __inline__ int atomic_sub_if_posi
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %1, %2 # atomic_sub_if_positive\n"
+ " subu %0, %1, %3 \n"
+ " bltz %0, 1f \n"
+@@ -250,6 +269,7 @@ static __inline__ int atomic_sub_if_posi
+ " beqz %0, 1b \n"
+ " sync \n"
+ "1: \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -367,20 +387,24 @@ static __inline__ void atomic64_add(long
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %0, %1 # atomic64_add \n"
+ " addu %0, %2 \n"
+ " scd %0, %1 \n"
+ " beqzl %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %0, %1 # atomic64_add \n"
+ " addu %0, %2 \n"
+ " scd %0, %1 \n"
+ " beqz %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else {
+@@ -405,20 +429,24 @@ static __inline__ void atomic64_sub(long
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %0, %1 # atomic64_sub \n"
+ " subu %0, %2 \n"
+ " scd %0, %1 \n"
+ " beqzl %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %0, %1 # atomic64_sub \n"
+ " subu %0, %2 \n"
+ " scd %0, %1 \n"
+ " beqz %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else {
+@@ -441,12 +469,14 @@ static __inline__ long atomic64_add_retu
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %1, %2 # atomic64_add_return \n"
+ " addu %0, %1, %3 \n"
+ " scd %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -454,12 +484,14 @@ static __inline__ long atomic64_add_retu
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %1, %2 # atomic64_add_return \n"
+ " addu %0, %1, %3 \n"
+ " scd %0, %2 \n"
+ " beqz %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -484,12 +516,14 @@ static __inline__ long atomic64_sub_retu
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %1, %2 # atomic64_sub_return \n"
+ " subu %0, %1, %3 \n"
+ " scd %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -497,12 +531,14 @@ static __inline__ long atomic64_sub_retu
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %1, %2 # atomic64_sub_return \n"
+ " subu %0, %1, %3 \n"
+ " scd %0, %2 \n"
+ " beqz %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -534,6 +570,7 @@ static __inline__ long atomic64_sub_if_p
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %1, %2 # atomic64_sub_if_positive\n"
+ " dsubu %0, %1, %3 \n"
+ " bltz %0, 1f \n"
+@@ -541,6 +578,7 @@ static __inline__ long atomic64_sub_if_p
+ " beqzl %0, 1b \n"
+ " sync \n"
+ "1: \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+@@ -548,6 +586,7 @@ static __inline__ long atomic64_sub_if_p
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %1, %2 # atomic64_sub_if_positive\n"
+ " dsubu %0, %1, %3 \n"
+ " bltz %0, 1f \n"
+@@ -555,6 +594,7 @@ static __inline__ long atomic64_sub_if_p
+ " beqz %0, 1b \n"
+ " sync \n"
+ "1: \n"
++ " .set mips0 \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/bitops.h linux_HEAD/include/asm-mips/bitops.h
+--- linux-2.6.12/include/asm-mips/bitops.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/bitops.h 2005-07-01 12:10:27.000000000 +0200
+@@ -18,14 +18,14 @@
+ #if (_MIPS_SZLONG == 32)
+ #define SZLONG_LOG 5
+ #define SZLONG_MASK 31UL
+-#define __LL "ll "
+-#define __SC "sc "
++#define __LL "ll "
++#define __SC "sc "
+ #define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
+ #elif (_MIPS_SZLONG == 64)
+ #define SZLONG_LOG 6
+ #define SZLONG_MASK 63UL
+-#define __LL "lld "
+-#define __SC "scd "
++#define __LL "lld "
++#define __SC "scd "
+ #define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
+ #endif
+
+@@ -72,18 +72,22 @@ static inline void set_bit(unsigned long
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: " __LL "%0, %1 # set_bit \n"
+ " or %0, %2 \n"
+- " "__SC "%0, %1 \n"
++ " " __SC "%0, %1 \n"
+ " beqzl %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: " __LL "%0, %1 # set_bit \n"
+ " or %0, %2 \n"
+- " "__SC "%0, %1 \n"
++ " " __SC "%0, %1 \n"
+ " beqz %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+ } else {
+@@ -132,18 +136,22 @@ static inline void clear_bit(unsigned lo
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: " __LL "%0, %1 # clear_bit \n"
+ " and %0, %2 \n"
+ " " __SC "%0, %1 \n"
+ " beqzl %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: " __LL "%0, %1 # clear_bit \n"
+ " and %0, %2 \n"
+ " " __SC "%0, %1 \n"
+ " beqz %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
+ } else {
+@@ -191,10 +199,12 @@ static inline void change_bit(unsigned l
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: " __LL "%0, %1 # change_bit \n"
+ " xor %0, %2 \n"
+- " "__SC "%0, %1 \n"
++ " " __SC "%0, %1 \n"
+ " beqzl %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+ } else if (cpu_has_llsc) {
+@@ -202,10 +212,12 @@ static inline void change_bit(unsigned l
+ unsigned long temp;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: " __LL "%0, %1 # change_bit \n"
+ " xor %0, %2 \n"
+- " "__SC "%0, %1 \n"
++ " " __SC "%0, %1 \n"
+ " beqz %0, 1b \n"
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+ } else {
+@@ -253,14 +265,16 @@ static inline int test_and_set_bit(unsig
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: " __LL "%0, %1 # test_and_set_bit \n"
+ " or %2, %0, %3 \n"
+ " " __SC "%2, %1 \n"
+ " beqzl %2, 1b \n"
+ " and %2, %0, %3 \n"
+ #ifdef CONFIG_SMP
+- "sync \n"
++ " sync \n"
+ #endif
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
+@@ -271,16 +285,18 @@ static inline int test_and_set_bit(unsig
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+- " .set noreorder # test_and_set_bit \n"
+- "1: " __LL "%0, %1 \n"
++ " .set push \n"
++ " .set noreorder \n"
++ " .set mips3 \n"
++ "1: " __LL "%0, %1 # test_and_set_bit \n"
+ " or %2, %0, %3 \n"
+ " " __SC "%2, %1 \n"
+ " beqz %2, 1b \n"
+ " and %2, %0, %3 \n"
+ #ifdef CONFIG_SMP
+- "sync \n"
++ " sync \n"
+ #endif
+- ".set\treorder"
++ " .set pop \n"
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
+@@ -343,15 +359,17 @@ static inline int test_and_clear_bit(uns
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: " __LL "%0, %1 # test_and_clear_bit \n"
+ " or %2, %0, %3 \n"
+ " xor %2, %3 \n"
+- __SC "%2, %1 \n"
++ " " __SC "%2, %1 \n"
+ " beqzl %2, 1b \n"
+ " and %2, %0, %3 \n"
+ #ifdef CONFIG_SMP
+ " sync \n"
+ #endif
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
+@@ -362,17 +380,19 @@ static inline int test_and_clear_bit(uns
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+- " .set noreorder # test_and_clear_bit \n"
+- "1: " __LL "%0, %1 \n"
++ " .set push \n"
++ " .set noreorder \n"
++ " .set mips3 \n"
++ "1: " __LL "%0, %1 # test_and_clear_bit \n"
+ " or %2, %0, %3 \n"
+ " xor %2, %3 \n"
+- __SC "%2, %1 \n"
++ " " __SC "%2, %1 \n"
+ " beqz %2, 1b \n"
+ " and %2, %0, %3 \n"
+ #ifdef CONFIG_SMP
+ " sync \n"
+ #endif
+- " .set reorder \n"
++ " .set pop \n"
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
+@@ -435,14 +455,16 @@ static inline int test_and_change_bit(un
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+- "1: " __LL " %0, %1 # test_and_change_bit \n"
++ " .set mips3 \n"
++ "1: " __LL "%0, %1 # test_and_change_bit \n"
+ " xor %2, %0, %3 \n"
+- " "__SC "%2, %1 \n"
++ " " __SC "%2, %1 \n"
+ " beqzl %2, 1b \n"
+ " and %2, %0, %3 \n"
+ #ifdef CONFIG_SMP
+ " sync \n"
+ #endif
++ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
+@@ -453,16 +475,18 @@ static inline int test_and_change_bit(un
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+- " .set noreorder # test_and_change_bit \n"
+- "1: " __LL " %0, %1 \n"
++ " .set push \n"
++ " .set noreorder \n"
++ " .set mips3 \n"
++ "1: " __LL "%0, %1 # test_and_change_bit \n"
+ " xor %2, %0, %3 \n"
+- " "__SC "\t%2, %1 \n"
++ " " __SC "\t%2, %1 \n"
+ " beqz %2, 1b \n"
+ " and %2, %0, %3 \n"
+ #ifdef CONFIG_SMP
+ " sync \n"
+ #endif
+- " .set reorder \n"
++ " .set pop \n"
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/bootinfo.h linux_HEAD/include/asm-mips/bootinfo.h
+--- linux-2.6.12/include/asm-mips/bootinfo.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/bootinfo.h 2005-07-08 12:04:09.000000000 +0200
+@@ -77,6 +77,7 @@
+ #define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
+ #define MACH_SGI_IP28 2 /* Indigo2 Impact */
+ #define MACH_SGI_IP32 3 /* O2 */
++#define MACH_SGI_IP30 4 /* Octane, Octane2 */
+
+ /*
+ * Valid machtype for group COBALT
+@@ -177,6 +178,8 @@
+ #define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
+ #define MACH_PB1550 8 /* Au1550-based eval board */
+ #define MACH_DB1550 9 /* Au1550-based eval board */
++#define MACH_PB1200 10 /* Au1200-based eval board */
++#define MACH_DB1200 11 /* Au1200-based eval board */
+
+ /*
+ * Valid machtype for group NEC_VR41XX
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/break.h linux_HEAD/include/asm-mips/break.h
+--- linux-2.6.12/include/asm-mips/break.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/break.h 2005-02-17 21:50:43.000000000 +0100
+@@ -28,6 +28,7 @@
+ #define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */
+ #define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
+ #define BRK_BUG 512 /* Used by BUG() */
++#define BRK_KDB 513 /* Used in KDB_ENTER() */
+ #define BRK_MULOVF 1023 /* Multiply overflow */
+
+ #endif /* __ASM_BREAK_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/bug.h linux_HEAD/include/asm-mips/bug.h
+--- linux-2.6.12/include/asm-mips/bug.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/bug.h 2005-07-01 12:10:27.000000000 +0200
+@@ -1,16 +1,21 @@
+ #ifndef __ASM_BUG_H
+ #define __ASM_BUG_H
+
+-#include <asm/break.h>
++#include <linux/config.h>
+
+ #ifdef CONFIG_BUG
+-#define HAVE_ARCH_BUG
+
-+static void __init vr4133_serial_init(void)
++#include <asm/break.h>
++
+ #define BUG() \
+ do { \
+ __asm__ __volatile__("break %0" : : "i" (BRK_BUG)); \
+ } while (0)
++
++#define HAVE_ARCH_BUG
++
+ #endif
+
+ #include <asm-generic/bug.h>
+
+-#endif
++#endif /* __ASM_BUG_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/bugs.h linux_HEAD/include/asm-mips/bugs.h
+--- linux-2.6.12/include/asm-mips/bugs.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/bugs.h 2005-04-13 19:06:39.000000000 +0200
+@@ -8,12 +8,18 @@
+ #define _ASM_BUGS_H
+
+ #include <linux/config.h>
++#include <linux/delay.h>
++#include <asm/cpu.h>
++#include <asm/cpu-info.h>
+
+ extern void check_bugs32(void);
+ extern void check_bugs64(void);
+
+ static inline void check_bugs(void)
+ {
++ unsigned int cpu = smp_processor_id();
++
++ cpu_data[cpu].udelay_val = loops_per_jiffy;
+ check_bugs32();
+ #ifdef CONFIG_MIPS64
+ check_bugs64();
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/cacheflush.h linux_HEAD/include/asm-mips/cacheflush.h
+--- linux-2.6.12/include/asm-mips/cacheflush.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/cacheflush.h 2005-04-25 13:23:05.000000000 +0200
+@@ -49,17 +49,29 @@ static inline void flush_dcache_page(str
+
+ extern void (*flush_icache_page)(struct vm_area_struct *vma,
+ struct page *page);
+-extern void (*flush_icache_range)(unsigned long start, unsigned long end);
++extern void (*flush_icache_range)(unsigned long __user start,
++ unsigned long __user end);
+ #define flush_cache_vmap(start, end) flush_cache_all()
+ #define flush_cache_vunmap(start, end) flush_cache_all()
+
+-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+-do { \
+- memcpy(dst, (void *) src, len); \
+- flush_icache_page(vma, page); \
+-} while (0)
+-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+- memcpy(dst, src, len)
++static inline void copy_to_user_page(struct vm_area_struct *vma,
++ struct page *page, unsigned long vaddr, void *dst, const void *src,
++ unsigned long len)
+{
-+ vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE);
-+ vr41xx_siu_init();
-+ vr41xx_dsiu_init();
++ if (cpu_has_dc_aliases)
++ flush_cache_page(vma, vaddr, page_to_pfn(page));
++ memcpy(dst, src, len);
++ flush_icache_page(vma, page);
+}
+
- extern void i8259_init(void);
++static inline void copy_from_user_page(struct vm_area_struct *vma,
++ struct page *page, unsigned long vaddr, void *dst, const void *src,
++ unsigned long len)
++{
++ if (cpu_has_dc_aliases)
++ flush_cache_page(vma, vaddr, page_to_pfn(page));
++ memcpy(dst, src, len);
++}
- static int __init nec_cmbvr4133_setup(void)
-@@ -68,6 +78,8 @@ static int __init nec_cmbvr4133_setup(vo
- mips_machgroup = MACH_GROUP_NEC_VR41XX;
- mips_machtype = MACH_NEC_CMBVR4133;
+ extern void (*flush_cache_sigtramp)(unsigned long addr);
+ extern void (*flush_icache_all)(void);
+@@ -78,4 +90,7 @@ extern void (*flush_data_cache_page)(uns
+ #define ClearPageDcacheDirty(page) \
+ clear_bit(PG_dcache_dirty, &(page)->flags)
-+ late_time_init = vr4133_serial_init;
++/* Run kernel code uncached, useful for cache probing functions. */
++unsigned long __init run_uncached(void *func);
+
- #ifdef CONFIG_PCI
- #ifdef CONFIG_ROCKHOPPER
- ali_m5229_preinit();
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/Kconfig linux_HEAD/drivers/char/Kconfig
---- linux-2.6.11.6/drivers/char/Kconfig 2005-04-03 00:10:55.000000000 +0200
-+++ linux_HEAD/drivers/char/Kconfig 2005-03-21 20:04:03.000000000 +0100
-@@ -331,23 +331,33 @@ config ISTALLION
+ #endif /* _ASM_CACHEFLUSH_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/checksum.h linux_HEAD/include/asm-mips/checksum.h
+--- linux-2.6.12/include/asm-mips/checksum.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/checksum.h 2005-07-08 12:02:03.000000000 +0200
+@@ -70,14 +70,15 @@ unsigned int csum_partial_copy_nocheck(c
+ static inline unsigned short int csum_fold(unsigned int sum)
+ {
+ __asm__(
+- ".set\tnoat\t\t\t# csum_fold\n\t"
+- "sll\t$1,%0,16\n\t"
+- "addu\t%0,$1\n\t"
+- "sltu\t$1,%0,$1\n\t"
+- "srl\t%0,%0,16\n\t"
+- "addu\t%0,$1\n\t"
+- "xori\t%0,0xffff\n\t"
+- ".set\tat"
++ " .set push # csum_fold\n"
++ " .set noat \n"
++ " sll $1, %0, 16 \n"
++ " addu %0, $1 \n"
++ " sltu $1, %0, $1 \n"
++ " srl %0, %0, 16 \n"
++ " addu %0, $1 \n"
++ " xori %0, 0xffff \n"
++ " .set pop"
+ : "=r" (sum)
+ : "0" (sum));
+
+@@ -127,29 +128,30 @@ static inline unsigned int csum_tcpudp_n
+ unsigned int sum)
+ {
+ __asm__(
+- ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t"
++ " .set push # csum_tcpudp_nofold\n"
++ " .set noat \n"
+ #ifdef CONFIG_MIPS32
+- "addu\t%0, %2\n\t"
+- "sltu\t$1, %0, %2\n\t"
+- "addu\t%0, $1\n\t"
+-
+- "addu\t%0, %3\n\t"
+- "sltu\t$1, %0, %3\n\t"
+- "addu\t%0, $1\n\t"
+-
+- "addu\t%0, %4\n\t"
+- "sltu\t$1, %0, %4\n\t"
+- "addu\t%0, $1\n\t"
++ " addu %0, %2 \n"
++ " sltu $1, %0, %2 \n"
++ " addu %0, $1 \n"
++
++ " addu %0, %3 \n"
++ " sltu $1, %0, %3 \n"
++ " addu %0, $1 \n"
++
++ " addu %0, %4 \n"
++ " sltu $1, %0, %4 \n"
++ " addu %0, $1 \n"
+ #endif
+ #ifdef CONFIG_MIPS64
+- "daddu\t%0, %2\n\t"
+- "daddu\t%0, %3\n\t"
+- "daddu\t%0, %4\n\t"
+- "dsll32\t$1, %0, 0\n\t"
+- "daddu\t%0, $1\n\t"
+- "dsrl32\t%0, %0, 0\n\t"
++ " daddu %0, %2 \n"
++ " daddu %0, %3 \n"
++ " daddu %0, %4 \n"
++ " dsll32 $1, %0, 0 \n"
++ " daddu %0, $1 \n"
++ " dsrl32 %0, %0, 0 \n"
+ #endif
+- ".set\tat"
++ " .set pop"
+ : "=r" (sum)
+ : "0" (daddr), "r"(saddr),
+ #ifdef __MIPSEL__
+@@ -192,57 +194,57 @@ static __inline__ unsigned short int csu
+ unsigned int sum)
+ {
+ __asm__(
+- ".set\tpush\t\t\t# csum_ipv6_magic\n\t"
+- ".set\tnoreorder\n\t"
+- ".set\tnoat\n\t"
+- "addu\t%0, %5\t\t\t# proto (long in network byte order)\n\t"
+- "sltu\t$1, %0, %5\n\t"
+- "addu\t%0, $1\n\t"
+-
+- "addu\t%0, %6\t\t\t# csum\n\t"
+- "sltu\t$1, %0, %6\n\t"
+- "lw\t%1, 0(%2)\t\t\t# four words source address\n\t"
+- "addu\t%0, $1\n\t"
+- "addu\t%0, %1\n\t"
+- "sltu\t$1, %0, %1\n\t"
+-
+- "lw\t%1, 4(%2)\n\t"
+- "addu\t%0, $1\n\t"
+- "addu\t%0, %1\n\t"
+- "sltu\t$1, %0, %1\n\t"
+-
+- "lw\t%1, 8(%2)\n\t"
+- "addu\t%0, $1\n\t"
+- "addu\t%0, %1\n\t"
+- "sltu\t$1, %0, %1\n\t"
+-
+- "lw\t%1, 12(%2)\n\t"
+- "addu\t%0, $1\n\t"
+- "addu\t%0, %1\n\t"
+- "sltu\t$1, %0, %1\n\t"
+-
+- "lw\t%1, 0(%3)\n\t"
+- "addu\t%0, $1\n\t"
+- "addu\t%0, %1\n\t"
+- "sltu\t$1, %0, %1\n\t"
+-
+- "lw\t%1, 4(%3)\n\t"
+- "addu\t%0, $1\n\t"
+- "addu\t%0, %1\n\t"
+- "sltu\t$1, %0, %1\n\t"
+-
+- "lw\t%1, 8(%3)\n\t"
+- "addu\t%0, $1\n\t"
+- "addu\t%0, %1\n\t"
+- "sltu\t$1, %0, %1\n\t"
+-
+- "lw\t%1, 12(%3)\n\t"
+- "addu\t%0, $1\n\t"
+- "addu\t%0, %1\n\t"
+- "sltu\t$1, %0, %1\n\t"
++ " .set push # csum_ipv6_magic\n"
++ " .set noreorder \n"
++ " .set noat \n"
++ " addu %0, %5 # proto (long in network byte order)\n"
++ " sltu $1, %0, %5 \n"
++ " addu %0, $1 \n"
++
++ " addu %0, %6 # csum\n"
++ " sltu $1, %0, %6 \n"
++ " lw %1, 0(%2) # four words source address\n"
++ " addu %0, $1 \n"
++ " addu %0, %1 \n"
++ " sltu $1, %0, %1 \n"
++
++ " lw %1, 4(%2) \n"
++ " addu %0, $1 \n"
++ " addu %0, %1 \n"
++ " sltu $1, %0, %1 \n"
++
++ " lw %1, 8(%2) \n"
++ " addu %0, $1 \n"
++ " addu %0, %1 \n"
++ " sltu $1, %0, %1 \n"
++
++ " lw %1, 12(%2) \n"
++ " addu %0, $1 \n"
++ " addu %0, %1 \n"
++ " sltu $1, %0, %1 \n"
++
++ " lw %1, 0(%3) \n"
++ " addu %0, $1 \n"
++ " addu %0, %1 \n"
++ " sltu $1, %0, %1 \n"
++
++ " lw %1, 4(%3) \n"
++ " addu %0, $1 \n"
++ " addu %0, %1 \n"
++ " sltu $1, %0, %1 \n"
++
++ " lw %1, 8(%3) \n"
++ " addu %0, $1 \n"
++ " addu %0, %1 \n"
++ " sltu $1, %0, %1 \n"
++
++ " lw %1, 12(%3) \n"
++ " addu %0, $1 \n"
++ " addu %0, %1 \n"
++ " sltu $1, %0, %1 \n"
+
+- "addu\t%0, $1\t\t\t# Add final carry\n\t"
+- ".set\tpop"
++ " addu %0, $1 # Add final carry\n"
++ " .set pop"
+ : "=r" (sum), "=r" (proto)
+ : "r" (saddr), "r" (daddr),
+ "0" (htonl(len)), "1" (htonl(proto)), "r" (sum));
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/cobalt/cobalt.h linux_HEAD/include/asm-mips/cobalt/cobalt.h
+--- linux-2.6.12/include/asm-mips/cobalt/cobalt.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/cobalt/cobalt.h 2005-04-12 15:08:08.000000000 +0200
+@@ -19,18 +19,23 @@
+ * 9 - PCI
+ * 14 - IDE0
+ * 15 - IDE1
+- *
++ */
++#define COBALT_QUBE_SLOT_IRQ 9
++
++/*
+ * CPU IRQs are 16 ... 23
+ */
+-#define COBALT_TIMER_IRQ 18
+-#define COBALT_SCC_IRQ 19 /* pre-production has 85C30 */
+-#define COBALT_RAQ_SCSI_IRQ 19
+-#define COBALT_ETH0_IRQ 19
+-#define COBALT_ETH1_IRQ 20
+-#define COBALT_SERIAL_IRQ 21
+-#define COBALT_SCSI_IRQ 21
+-#define COBALT_VIA_IRQ 22 /* Chained to VIA ISA bridge */
+-#define COBALT_QUBE_SLOT_IRQ 23
++#define COBALT_CPU_IRQ 16
++
++#define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2)
++#define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */
++#define COBALT_RAQ_SCSI_IRQ (COBALT_CPU_IRQ + 3)
++#define COBALT_ETH0_IRQ (COBALT_CPU_IRQ + 3)
++#define COBALT_QUBE1_ETH0_IRQ (COBALT_CPU_IRQ + 4)
++#define COBALT_ETH1_IRQ (COBALT_CPU_IRQ + 4)
++#define COBALT_SERIAL_IRQ (COBALT_CPU_IRQ + 5)
++#define COBALT_SCSI_IRQ (COBALT_CPU_IRQ + 5)
++#define COBALT_VIA_IRQ (COBALT_CPU_IRQ + 6) /* Chained to VIA ISA bridge */
+
+ /*
+ * PCI configuration space manifest constants. These are wired into
+@@ -69,16 +74,21 @@
+ * Most of this really should go into a separate GT64111 header file.
+ */
+ #define GT64111_IO_BASE 0x10000000UL
++#define GT64111_IO_END 0x11ffffffUL
++#define GT64111_MEM_BASE 0x12000000UL
++#define GT64111_MEM_END 0x13ffffffUL
+ #define GT64111_BASE 0x14000000UL
+-#define GALILEO_REG(ofs) (KSEG0 + GT64111_BASE + (unsigned long)(ofs))
++#define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs))
+
+ #define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port))
+ #define GALILEO_OUTL(val, port) \
+ do { \
+- *(volatile unsigned int *) GALILEO_REG(port) = (port); \
++ *(volatile unsigned int *) GALILEO_REG(port) = (val); \
+ } while (0)
+
+-#define GALILEO_T0EXP 0x0100
++#define GALILEO_INTR_T0EXP (1 << 8)
++#define GALILEO_INTR_RETRY_CTR (1 << 20)
++
+ #define GALILEO_ENTC0 0x01
+ #define GALILEO_SELTC0 0x02
+
+@@ -86,5 +96,21 @@ do { \
+ GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \
+ (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS)
+
++#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
++# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */
++# define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */
++# define COBALT_LED_WEB (1 << 2) /* RaQ */
++# define COBALT_LED_POWER_OFF (1 << 3) /* RaQ */
++# define COBALT_LED_RESET 0x0f
++
++#define COBALT_KEY_PORT ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK)
++# define COBALT_KEY_CLEAR (1 << 1)
++# define COBALT_KEY_LEFT (1 << 2)
++# define COBALT_KEY_UP (1 << 3)
++# define COBALT_KEY_DOWN (1 << 4)
++# define COBALT_KEY_RIGHT (1 << 5)
++# define COBALT_KEY_ENTER (1 << 6)
++# define COBALT_KEY_SELECT (1 << 7)
++# define COBALT_KEY_MASK 0xfe
+
+ #endif /* __ASM_COBALT_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/cobalt/mach-gt64120.h linux_HEAD/include/asm-mips/cobalt/mach-gt64120.h
+--- linux-2.6.12/include/asm-mips/cobalt/mach-gt64120.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/include/asm-mips/cobalt/mach-gt64120.h 2005-02-21 17:24:02.000000000 +0100
+@@ -0,0 +1 @@
++/* there's something here ... in the dark */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/cpu-features.h linux_HEAD/include/asm-mips/cpu-features.h
+--- linux-2.6.12/include/asm-mips/cpu-features.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/cpu-features.h 2005-07-01 12:10:27.000000000 +0200
+@@ -4,6 +4,7 @@
+ * for more details.
+ *
+ * Copyright (C) 2003, 2004 Ralf Baechle
++ * Copyright (C) 2004 Maciej W. Rozycki
+ */
+ #ifndef __ASM_CPU_FEATURES_H
+ #define __ASM_CPU_FEATURES_H
+@@ -39,9 +40,6 @@
+ #ifndef cpu_has_watch
+ #define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
+ #endif
+-#ifndef cpu_has_mips16
+-#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16)
+-#endif
+ #ifndef cpu_has_divec
+ #define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
+ #endif
+@@ -66,6 +64,18 @@
+ #ifndef cpu_has_llsc
+ #define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
+ #endif
++#ifndef cpu_has_mips16
++#define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16)
++#endif
++#ifndef cpu_has_mdmx
++#define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX)
++#endif
++#ifndef cpu_has_mips3d
++#define cpu_has_mips3d (cpu_data[0].ases & MIPS_ASE_MIPS3D)
++#endif
++#ifndef cpu_has_smartmips
++#define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
++#endif
+ #ifndef cpu_has_vtag_icache
+ #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
+ #endif
+@@ -95,15 +105,8 @@
+ #endif
+ #endif
+
+-/*
+- * Certain CPUs may throw bizarre exceptions if not the whole cacheline
+- * contains valid instructions. For these we ensure proper alignment of
+- * signal trampolines and pad them to the size of a full cache lines with
+- * nops. This is also used in structure definitions so can't be a test macro
+- * like the others.
+- */
+-#ifndef PLAT_TRAMPOLINE_STUFF_LINE
+-#define PLAT_TRAMPOLINE_STUFF_LINE 0UL
++#ifndef cpu_has_dsp
++#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
+ #endif
+
+ #ifdef CONFIG_MIPS32
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/cpu-info.h linux_HEAD/include/asm-mips/cpu-info.h
+--- linux-2.6.12/include/asm-mips/cpu-info.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/cpu-info.h 2005-05-09 13:21:09.000000000 +0200
+@@ -7,6 +7,7 @@
+ * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
+ * Copyright (C) 1996 Paul M. Antoine
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
++ * Copyright (C) 2004 Maciej W. Rozycki
+ */
+ #ifndef __ASM_CPU_INFO_H
+ #define __ASM_CPU_INFO_H
+@@ -61,6 +62,7 @@ struct cpuinfo_mips {
+ * Capability and feature descriptor structure for MIPS CPU
+ */
+ unsigned long options;
++ unsigned long ases;
+ unsigned int processor_id;
+ unsigned int fpu_id;
+ unsigned int cputype;
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/cpu.h linux_HEAD/include/asm-mips/cpu.h
+--- linux-2.6.12/include/asm-mips/cpu.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/cpu.h 2005-07-01 12:10:27.000000000 +0200
+@@ -3,6 +3,7 @@
+ * various MIPS cpu types.
+ *
+ * Copyright (C) 1996 David S. Miller (dm at engr.sgi.com)
++ * Copyright (C) 2004 Maciej W. Rozycki
+ */
+ #ifndef _ASM_CPU_H
+ #define _ASM_CPU_H
+@@ -22,12 +23,17 @@
+ spec.
+ */
+
+-#define PRID_COMP_LEGACY 0x000000
+-#define PRID_COMP_MIPS 0x010000
+-#define PRID_COMP_BROADCOM 0x020000
+-#define PRID_COMP_ALCHEMY 0x030000
+-#define PRID_COMP_SIBYTE 0x040000
+-#define PRID_COMP_SANDCRAFT 0x050000
++#define PRID_COMP_LEGACY 0x000000
++#define PRID_COMP_MIPS 0x010000
++#define PRID_COMP_BROADCOM 0x020000
++#define PRID_COMP_ALCHEMY 0x030000
++#define PRID_COMP_SIBYTE 0x040000
++#define PRID_COMP_SANDCRAFT 0x050000
++#define PRID_COMP_PHILIPS 0x060000
++#define PRID_COMP_TOSHIBA 0x070000
++#define PRID_COMP_LSI 0x080000
++#define PRID_COMP_LEXRA 0x0b0000
++
+
+ /*
+ * Assigned values for the product ID register. In order to detect a
+@@ -71,6 +77,7 @@
+ #define PRID_IMP_4KEMPR2 0x9100
+ #define PRID_IMP_4KSD 0x9200
+ #define PRID_IMP_24K 0x9300
++#define PRID_IMP_24KE 0x9600
+
+ #define PRID_IMP_UNKNOWN 0xff00
+
+@@ -177,7 +184,8 @@
+ #define CPU_VR4133 56
+ #define CPU_AU1550 57
+ #define CPU_24K 58
+-#define CPU_LAST 58
++#define CPU_AU1200 59
++#define CPU_LAST 59
+
+ /*
+ * ISA Level encodings
+@@ -207,7 +215,6 @@
+ #define MIPS_CPU_32FPR 0x00000020 /* 32 dbl. prec. FP registers */
+ #define MIPS_CPU_COUNTER 0x00000040 /* Cycle count/compare */
+ #define MIPS_CPU_WATCH 0x00000080 /* watchpoint registers */
+-#define MIPS_CPU_MIPS16 0x00000100 /* code compression */
+ #define MIPS_CPU_DIVEC 0x00000200 /* dedicated interrupt vector */
+ #define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */
+ #define MIPS_CPU_CACHE_CDEX_P 0x00000800 /* Create_Dirty_Exclusive CACHE op */
+@@ -219,4 +226,13 @@
+ #define MIPS_CPU_SUBSET_CACHES 0x00020000 /* P-cache subset enforced */
+ #define MIPS_CPU_PREFETCH 0x00040000 /* CPU has usable prefetch */
+
++/*
++ * CPU ASE encodings
++ */
++#define MIPS_ASE_MIPS16 0x00000001 /* code compression */
++#define MIPS_ASE_MDMX 0x00000002 /* MIPS digital media extension */
++#define MIPS_ASE_MIPS3D 0x00000004 /* MIPS-3D */
++#define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */
++#define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */
++
+ #endif /* _ASM_CPU_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/ecc.h linux_HEAD/include/asm-mips/dec/ecc.h
+--- linux-2.6.12/include/asm-mips/dec/ecc.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/ecc.h 2005-07-01 12:10:28.000000000 +0200
+@@ -49,7 +49,8 @@ struct pt_regs;
+
+ extern void dec_ecc_be_init(void);
+ extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup);
+-extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs);
++extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id,
++ struct pt_regs *regs);
+ #endif
+
+ #endif /* __ASM_MIPS_DEC_ECC_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/ioasic_addrs.h linux_HEAD/include/asm-mips/dec/ioasic_addrs.h
+--- linux-2.6.12/include/asm-mips/dec/ioasic_addrs.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/ioasic_addrs.h 2005-07-03 16:44:37.000000000 +0200
+@@ -45,7 +45,8 @@
+
+
+ /*
+- * Offsets for I/O ASIC registers (relative to (system_base + IOASIC_IOCTL)).
++ * Offsets for I/O ASIC registers
++ * (relative to (dec_kn_slot_base + IOASIC_IOCTL)).
+ */
+ /* all systems */
+ #define IO_REG_SCSI_DMA_P 0x00 /* SCSI DMA Pointer */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/kn01.h linux_HEAD/include/asm-mips/dec/kn01.h
+--- linux-2.6.12/include/asm-mips/dec/kn01.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/kn01.h 2005-07-03 16:44:37.000000000 +0200
+@@ -8,14 +8,12 @@
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by courtesy of Chris Fraser.
+- * Copyright (C) 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
+ */
+ #ifndef __ASM_MIPS_DEC_KN01_H
+ #define __ASM_MIPS_DEC_KN01_H
+
+-#include <asm/addrspace.h>
+-
+-#define KN01_SLOT_BASE KSEG1ADDR(0x10000000)
++#define KN01_SLOT_BASE 0x10000000
+ #define KN01_SLOT_SIZE 0x01000000
+
+ /*
+@@ -41,17 +39,9 @@
+
+
+ /*
+- * Some port addresses...
+- */
+-#define KN01_LANCE_BASE (KN01_SLOT_BASE + KN01_LANCE) /* 0xB8000000 */
+-#define KN01_DZ11_BASE (KN01_SLOT_BASE + KN01_DZ11) /* 0xBC000000 */
+-#define KN01_RTC_BASE (KN01_SLOT_BASE + KN01_RTC) /* 0xBD000000 */
+-
+-
+-/*
+ * Frame buffer memory address.
+ */
+-#define KN01_VFB_MEM KSEG1ADDR(0x0fc00000)
++#define KN01_VFB_MEM 0x0fc00000
+
+ /*
+ * CPU interrupt bits.
+@@ -80,4 +70,22 @@
+ #define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */
+ #define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
+
++
++#ifndef __ASSEMBLY__
++
++#include <linux/interrupt.h>
++#include <linux/spinlock.h>
++#include <linux/types.h>
++
++struct pt_regs;
++
++extern u16 cached_kn01_csr;
++extern spinlock_t kn01_lock;
++
++extern void dec_kn01_be_init(void);
++extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup);
++extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
++ struct pt_regs *regs);
++#endif
++
+ #endif /* __ASM_MIPS_DEC_KN01_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/kn02.h linux_HEAD/include/asm-mips/dec/kn02.h
+--- linux-2.6.12/include/asm-mips/dec/kn02.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/kn02.h 2005-07-03 16:44:37.000000000 +0200
+@@ -8,21 +8,12 @@
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by courtesy of Chris Fraser.
+- * Copyright (C) 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
+ */
+ #ifndef __ASM_MIPS_DEC_KN02_H
+ #define __ASM_MIPS_DEC_KN02_H
+
+-#ifndef __ASSEMBLY__
+-#include <linux/spinlock.h>
+-#include <linux/types.h>
+-#endif
+-
+-#include <asm/addrspace.h>
+-#include <asm/dec/ecc.h>
+-
+-
+-#define KN02_SLOT_BASE KSEG1ADDR(0x1fc00000)
++#define KN02_SLOT_BASE 0x1fc00000
+ #define KN02_SLOT_SIZE 0x00080000
+
+ /*
+@@ -39,22 +30,14 @@
+
+
+ /*
+- * Some port addresses...
+- */
+-#define KN02_DZ11_BASE (KN02_SLOT_BASE + KN02_DZ11) /* DZ11 */
+-#define KN02_RTC_BASE (KN02_SLOT_BASE + KN02_RTC) /* RTC */
+-#define KN02_CSR_BASE (KN02_SLOT_BASE + KN02_CSR) /* CSR */
+-
+-
+-/*
+ * System Control & Status Register bits.
+ */
+ #define KN02_CSR_RES_28 (0xf<<28) /* unused */
+ #define KN02_CSR_PSU (1<<27) /* power supply unit warning */
+ #define KN02_CSR_NVRAM (1<<26) /* ~NVRAM clear jumper */
+ #define KN02_CSR_REFEVEN (1<<25) /* mem refresh bank toggle */
+-#define KN03_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */
+-#define KN03_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */
++#define KN02_CSR_NRMOD (1<<24) /* ~NRMOD manufact. jumper */
++#define KN02_CSR_IOINTEN (0xff<<16) /* IRQ mask bits */
+ #define KN02_CSR_DIAGCHK (1<<15) /* diagn/norml ECC reads */
+ #define KN02_CSR_DIAGGEN (1<<14) /* diagn/norml ECC writes */
+ #define KN02_CSR_CORRECT (1<<13) /* ECC correct/check */
+@@ -63,8 +46,8 @@
+ #define KN02_CSR_BNK32M (1<<10) /* 32M/8M stride */
+ #define KN02_CSR_DIAGDN (1<<9) /* DIAGDN manufact. jumper */
+ #define KN02_CSR_BAUD38 (1<<8) /* DZ11 38/19kbps ext. rate */
+-#define KN03_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */
+-#define KN03_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
++#define KN02_CSR_IOINT (0xff<<0) /* IRQ status bits (r/o) */
++#define KN02_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
+
+
+ /*
+@@ -98,6 +81,10 @@
+
+
+ #ifndef __ASSEMBLY__
++
++#include <linux/spinlock.h>
++#include <linux/types.h>
++
+ extern u32 cached_kn02_csr;
+ extern spinlock_t kn02_lock;
+ extern void init_kn02_irqs(int base);
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/kn02xa.h linux_HEAD/include/asm-mips/dec/kn02xa.h
+--- linux-2.6.12/include/asm-mips/dec/kn02xa.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/kn02xa.h 2005-07-03 16:44:37.000000000 +0200
+@@ -9,7 +9,7 @@
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by courtesy of Chris Fraser.
+- * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki
+ *
+ * These are addresses which have to be known early in the boot process.
+ * For other addresses refer to tc.h, ioasic_addrs.h and friends.
+@@ -17,31 +17,23 @@
+ #ifndef __ASM_MIPS_DEC_KN02XA_H
+ #define __ASM_MIPS_DEC_KN02XA_H
+
+-#include <asm/addrspace.h>
+ #include <asm/dec/ioasic_addrs.h>
+
+-#define KN02XA_SLOT_BASE KSEG1ADDR(0x1c000000)
+-
+-/*
+- * Some port addresses...
+- */
+-#define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
+-#define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */
+-
++#define KN02XA_SLOT_BASE 0x1c000000
+
+ /*
+ * Memory control ASIC registers.
+ */
+-#define KN02XA_MER KSEG1ADDR(0x0c400000) /* memory error register */
+-#define KN02XA_MSR KSEG1ADDR(0x0c800000) /* memory size register */
++#define KN02XA_MER 0x0c400000 /* memory error register */
++#define KN02XA_MSR 0x0c800000 /* memory size register */
+
+ /*
+ * CPU control ASIC registers.
+ */
+-#define KN02XA_MEM_CONF KSEG1ADDR(0x0e000000) /* write timeout config */
+-#define KN02XA_EAR KSEG1ADDR(0x0e000004) /* error address register */
+-#define KN02XA_BOOT0 KSEG1ADDR(0x0e000008) /* boot 0 register */
+-#define KN02XA_MEM_INTR KSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */
++#define KN02XA_MEM_CONF 0x0e000000 /* write timeout config */
++#define KN02XA_EAR 0x0e000004 /* error address register */
++#define KN02XA_BOOT0 0x0e000008 /* boot 0 register */
++#define KN02XA_MEM_INTR 0x0e00000c /* write err IRQ stat & ack */
+
+ /*
+ * Memory Error Register bits, common definitions.
+@@ -52,8 +44,13 @@
+ #define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */
+ #define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */
+ #define KN02XA_MER_PARDIS (1<<14) /* parity error disable */
+-#define KN02XA_MER_RES_12 (0x3<<12) /* unused */
+-#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask */
++#define KN02XA_MER_SIZE (1<<13) /* r/o mirror of MSR_SIZE */
++#define KN02XA_MER_RES_12 (1<<12) /* unused */
++#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask: */
++#define KN02XA_MER_BYTERR_3 (0x8<<8) /* byte lane #3 */
++#define KN02XA_MER_BYTERR_2 (0x4<<8) /* byte lane #2 */
++#define KN02XA_MER_BYTERR_1 (0x2<<8) /* byte lane #1 */
++#define KN02XA_MER_BYTERR_0 (0x1<<8) /* byte lane #0 */
+ #define KN02XA_MER_RES_0 (0xff<<0) /* unused */
+
+ /*
+@@ -72,4 +69,17 @@
+ #define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */
+ #define KN02XA_EAR_RES_0 (0x3<<0) /* unused */
+
++
++#ifndef __ASSEMBLY__
++
++#include <linux/interrupt.h>
++
++struct pt_regs;
++
++extern void dec_kn02xa_be_init(void);
++extern int dec_kn02xa_be_handler(struct pt_regs *regs, int is_fixup);
++extern irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id,
++ struct pt_regs *regs);
++#endif
++
+ #endif /* __ASM_MIPS_DEC_KN02XA_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/kn03.h linux_HEAD/include/asm-mips/dec/kn03.h
+--- linux-2.6.12/include/asm-mips/dec/kn03.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/kn03.h 2005-07-03 16:44:37.000000000 +0200
+@@ -10,24 +10,15 @@
+ *
+ * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
+ * are by courtesy of Chris Fraser.
+- * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2000, 2002, 2003, 2005 Maciej W. Rozycki
+ */
+ #ifndef __ASM_MIPS_DEC_KN03_H
+ #define __ASM_MIPS_DEC_KN03_H
+
+-#include <asm/addrspace.h>
+ #include <asm/dec/ecc.h>
+ #include <asm/dec/ioasic_addrs.h>
+
+-#define KN03_SLOT_BASE KSEG1ADDR(0x1f800000)
+-
+-/*
+- * Some port addresses...
+- */
+-#define KN03_IOASIC_BASE (KN03_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
+-#define KN03_RTC_BASE (KN03_SLOT_BASE + IOASIC_TOY) /* RTC */
+-#define KN03_MCR_BASE (KN03_SLOT_BASE + IOASIC_MCR) /* MCR */
+-
++#define KN03_SLOT_BASE 0x1f800000
+
+ /*
+ * CPU interrupt bits.
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/kn05.h linux_HEAD/include/asm-mips/dec/kn05.h
+--- linux-2.6.12/include/asm-mips/dec/kn05.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/kn05.h 2005-07-03 16:44:37.000000000 +0200
+@@ -1,10 +1,12 @@
+ /*
+ * include/asm-mips/dec/kn05.h
+ *
+- * DECstation 5000/260 (4max+ or KN05) and DECsystem 5900/260
++ * DECstation/DECsystem 5000/260 (4max+ or KN05), 5000/150 (4min
++ * or KN04-BA), Personal DECstation/DECsystem 5000/50 (4maxine or
++ * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
+ * definitions.
+ *
+- * Copyright (C) 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+@@ -13,8 +15,8 @@
+ *
+ * WARNING! All this information is pure guesswork based on the
+ * ROM. It is provided here in hope it will give someone some
+- * food for thought. No documentation for the KN05 module has
+- * been located so far.
++ * food for thought. No documentation for the KN05 nor the KN04
++ * module has been located so far.
+ */
+ #ifndef __ASM_MIPS_DEC_KN05_H
+ #define __ASM_MIPS_DEC_KN05_H
+@@ -24,48 +26,50 @@
+ /*
+ * The oncard MB (Memory Buffer) ASIC provides an additional address
+ * decoder. Certain address ranges within the "high" 16 slots are
+- * passed to the I/O ASIC's decoder like with the KN03. Others are
+- * handled locally. "Low" slots are always passed.
++ * passed to the I/O ASIC's decoder like with the KN03 or KN02-BA/CA.
++ * Others are handled locally. "Low" slots are always passed.
+ */
+-#define KN05_MB_ROM (16*IOASIC_SLOT_SIZE) /* KN05 card ROM */
+-#define KN05_IOCTL (17*IOASIC_SLOT_SIZE) /* I/O ASIC */
+-#define KN05_ESAR (18*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */
+-#define KN05_LANCE (19*IOASIC_SLOT_SIZE) /* LANCE Ethernet */
+-#define KN05_MB_INT (20*IOASIC_SLOT_SIZE) /* MB interrupt register */
+-#define KN05_MB_EA (21*IOASIC_SLOT_SIZE) /* MB error address? */
+-#define KN05_MB_EC (22*IOASIC_SLOT_SIZE) /* MB error ??? */
+-#define KN05_MB_CSR (23*IOASIC_SLOT_SIZE) /* MB control & status */
+-#define KN05_RES_24 (24*IOASIC_SLOT_SIZE) /* unused? */
+-#define KN05_RES_25 (25*IOASIC_SLOT_SIZE) /* unused? */
+-#define KN05_RES_26 (26*IOASIC_SLOT_SIZE) /* unused? */
+-#define KN05_RES_27 (27*IOASIC_SLOT_SIZE) /* unused? */
+-#define KN05_SCSI (28*IOASIC_SLOT_SIZE) /* ASC SCSI */
+-#define KN05_RES_29 (29*IOASIC_SLOT_SIZE) /* unused? */
+-#define KN05_RES_30 (30*IOASIC_SLOT_SIZE) /* unused? */
+-#define KN05_RES_31 (31*IOASIC_SLOT_SIZE) /* unused? */
++#define KN4K_SLOT_BASE 0x1fc00000
++
++#define KN4K_MB_ROM (0*IOASIC_SLOT_SIZE) /* KN05/KN04 card ROM */
++#define KN4K_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */
++#define KN4K_ESAR (2*IOASIC_SLOT_SIZE) /* LANCE MAC address chip */
++#define KN4K_LANCE (3*IOASIC_SLOT_SIZE) /* LANCE Ethernet */
++#define KN4K_MB_INT (4*IOASIC_SLOT_SIZE) /* MB interrupt register */
++#define KN4K_MB_EA (5*IOASIC_SLOT_SIZE) /* MB error address? */
++#define KN4K_MB_EC (6*IOASIC_SLOT_SIZE) /* MB error ??? */
++#define KN4K_MB_CSR (7*IOASIC_SLOT_SIZE) /* MB control & status */
++#define KN4K_RES_08 (8*IOASIC_SLOT_SIZE) /* unused? */
++#define KN4K_RES_09 (9*IOASIC_SLOT_SIZE) /* unused? */
++#define KN4K_RES_10 (10*IOASIC_SLOT_SIZE) /* unused? */
++#define KN4K_RES_11 (11*IOASIC_SLOT_SIZE) /* unused? */
++#define KN4K_SCSI (12*IOASIC_SLOT_SIZE) /* ASC SCSI */
++#define KN4K_RES_13 (13*IOASIC_SLOT_SIZE) /* unused? */
++#define KN4K_RES_14 (14*IOASIC_SLOT_SIZE) /* unused? */
++#define KN4K_RES_15 (15*IOASIC_SLOT_SIZE) /* unused? */
+
+ /*
+ * Bits for the MB interrupt register.
+ * The register appears read-only.
+ */
+-#define KN05_MB_INT_TC (1<<0) /* TURBOchannel? */
+-#define KN05_MB_INT_RTC (1<<1) /* RTC? */
+-#define KN05_MB_INT_MT (1<<3) /* ??? */
++#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */
++#define KN4K_MB_INT_RTC (1<<1) /* RTC? */
++#define KN4K_MB_INT_MT (1<<3) /* ??? */
+
+ /*
+ * Bits for the MB control & status register.
+ * Set to 0x00bf8001 on my system by the ROM.
+ */
+-#define KN05_MB_CSR_PF (1<<0) /* PreFetching enable? */
+-#define KN05_MB_CSR_F (1<<1) /* ??? */
+-#define KN05_MB_CSR_ECC (0xff<<2) /* ??? */
+-#define KN05_MB_CSR_OD (1<<10) /* ??? */
+-#define KN05_MB_CSR_CP (1<<11) /* ??? */
+-#define KN05_MB_CSR_UNC (1<<12) /* ??? */
+-#define KN05_MB_CSR_IM (1<<13) /* ??? */
+-#define KN05_MB_CSR_NC (1<<14) /* ??? */
+-#define KN05_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */
+-#define KN05_MB_CSR_MSK (0x1f<<16) /* ??? */
+-#define KN05_MB_CSR_FW (1<<21) /* ??? */
++#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */
++#define KN4K_MB_CSR_F (1<<1) /* ??? */
++#define KN4K_MB_CSR_ECC (0xff<<2) /* ??? */
++#define KN4K_MB_CSR_OD (1<<10) /* ??? */
++#define KN4K_MB_CSR_CP (1<<11) /* ??? */
++#define KN4K_MB_CSR_UNC (1<<12) /* ??? */
++#define KN4K_MB_CSR_IM (1<<13) /* ??? */
++#define KN4K_MB_CSR_NC (1<<14) /* ??? */
++#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */
++#define KN4K_MB_CSR_MSK (0x1f<<16) /* ??? */
++#define KN4K_MB_CSR_FW (1<<21) /* ??? */
+
+ #endif /* __ASM_MIPS_DEC_KN05_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/prom.h linux_HEAD/include/asm-mips/dec/prom.h
+--- linux-2.6.12/include/asm-mips/dec/prom.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/prom.h 2005-07-01 12:10:28.000000000 +0200
+@@ -24,7 +24,7 @@
+ * PMAX/3MAX PROM entry points for DS2100/3100's and DS5000/2xx's.
+ * Many of these will work for MIPSen as well!
+ */
+-#define VEC_RESET (u64 *)KSEG1ADDR(0x1fc00000)
++#define VEC_RESET (u64 *)CKSEG1ADDR(0x1fc00000)
+ /* Prom base address */
+
+ #define PMAX_PROM_ENTRY(x) (VEC_RESET + (x)) /* Prom jump table */
+@@ -111,19 +111,21 @@ extern int (*__pmax_close)(int);
+ * On MIPS64 we have to call PROM functions via a helper
+ * dispatcher to accomodate ABI incompatibilities.
+ */
+-#define __DEC_PROM_O32 __attribute__((alias("call_o32")))
++#define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \
++ __asm__(#fun " = call_o32")
+
+-int _rex_bootinit(int (*)(void)) __DEC_PROM_O32;
+-int _rex_bootread(int (*)(void)) __DEC_PROM_O32;
+-int _rex_getbitmap(int (*)(memmap *), memmap *) __DEC_PROM_O32;
+-unsigned long *_rex_slot_address(unsigned long *(*)(int), int) __DEC_PROM_O32;
+-void *_rex_gettcinfo(void *(*)(void)) __DEC_PROM_O32;
+-int _rex_getsysid(int (*)(void)) __DEC_PROM_O32;
+-void _rex_clear_cache(void (*)(void)) __DEC_PROM_O32;
+-
+-int _prom_getchar(int (*)(void)) __DEC_PROM_O32;
+-char *_prom_getenv(char *(*)(char *), char *) __DEC_PROM_O32;
+-int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32;
++int __DEC_PROM_O32(_rex_bootinit, (int (*)(void)));
++int __DEC_PROM_O32(_rex_bootread, (int (*)(void)));
++int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), memmap *));
++unsigned long *__DEC_PROM_O32(_rex_slot_address,
++ (unsigned long *(*)(int), int));
++void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void)));
++int __DEC_PROM_O32(_rex_getsysid, (int (*)(void)));
++void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void)));
++
++int __DEC_PROM_O32(_prom_getchar, (int (*)(void)));
++char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), char *));
++int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), char *, ...));
+
+
+ #define rex_bootinit() _rex_bootinit(__rex_bootinit)
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/system.h linux_HEAD/include/asm-mips/dec/system.h
+--- linux-2.6.12/include/asm-mips/dec/system.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/include/asm-mips/dec/system.h 2005-07-01 18:11:02.000000000 +0200
+@@ -0,0 +1,18 @@
++/*
++ * include/asm-mips/dec/system.h
++ *
++ * Generic DECstation/DECsystem bits.
++ *
++ * Copyright (C) 2005 Maciej W. Rozycki
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++#ifndef __ASM_DEC_SYSTEM_H
++#define __ASM_DEC_SYSTEM_H
++
++extern unsigned long dec_kn_slot_base, dec_kn_slot_size;
++
++#endif /* __ASM_DEC_SYSTEM_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dec/tc.h linux_HEAD/include/asm-mips/dec/tc.h
+--- linux-2.6.12/include/asm-mips/dec/tc.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dec/tc.h 2005-07-03 16:44:37.000000000 +0200
+@@ -7,10 +7,8 @@
+ *
+ * Copyright (c) 1998 Harald Koerfgen
+ */
+-#ifndef ASM_TC_H
+-#define ASM_TC_H
+-
+-extern unsigned long system_base;
++#ifndef __ASM_DEC_TC_H
++#define __ASM_DEC_TC_H
+
+ /*
+ * Search for a TURBOchannel Option Module
+@@ -36,8 +34,8 @@ extern unsigned long get_tc_base_addr(in
+ */
+ extern unsigned long get_tc_irq_nr(int);
+ /*
+- * Return TURBOchannel clock frequency in hz
++ * Return TURBOchannel clock frequency in Hz
+ */
+ extern unsigned long get_tc_speed(void);
+
+-#endif
++#endif /* __ASM_DEC_TC_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/delay.h linux_HEAD/include/asm-mips/delay.h
+--- linux-2.6.12/include/asm-mips/delay.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/delay.h 2005-04-20 16:48:08.000000000 +0200
+@@ -12,11 +12,9 @@
+
+ #include <linux/config.h>
+ #include <linux/param.h>
+-
++#include <linux/smp.h>
+ #include <asm/compiler.h>
+
+-extern unsigned long loops_per_jiffy;
+-
+ static inline void __delay(unsigned long loops)
+ {
+ if (sizeof(long) == 4)
+@@ -82,11 +80,7 @@ static inline void __udelay(unsigned lon
+ __delay(usecs);
+ }
+
+-#ifdef CONFIG_SMP
+ #define __udelay_val cpu_data[smp_processor_id()].udelay_val
+-#else
+-#define __udelay_val loops_per_jiffy
+-#endif
+
+ #define udelay(usecs) __udelay((usecs),__udelay_val)
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dma-mapping.h linux_HEAD/include/asm-mips/dma-mapping.h
+--- linux-2.6.12/include/asm-mips/dma-mapping.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/dma-mapping.h 2005-04-08 22:41:30.000000000 +0200
+@@ -5,13 +5,13 @@
+ #include <asm/cache.h>
+
+ void *dma_alloc_noncoherent(struct device *dev, size_t size,
+- dma_addr_t *dma_handle, int flag);
++ dma_addr_t *dma_handle, unsigned int __nocast flag);
+
+ void dma_free_noncoherent(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle);
+
+ void *dma_alloc_coherent(struct device *dev, size_t size,
+- dma_addr_t *dma_handle, int flag);
++ dma_addr_t *dma_handle, unsigned int __nocast flag);
+
+ void dma_free_coherent(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle);
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/dsp.h linux_HEAD/include/asm-mips/dsp.h
+--- linux-2.6.12/include/asm-mips/dsp.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/include/asm-mips/dsp.h 2005-05-31 13:49:19.000000000 +0200
+@@ -0,0 +1,83 @@
++/*
++ * Copyright (C) 2005 Mips Technologies
++ * Author: Chris Dearman, chris at mips.com derived from fpu.h
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ */
++#ifndef _ASM_DSP_H
++#define _ASM_DSP_H
++
++#include <asm/cpu.h>
++#include <asm/cpu-features.h>
++#include <asm/hazards.h>
++#include <asm/mipsregs.h>
++
++#define DSP_DEFAULT 0x00000000
++#define DSP_MASK 0x1f
++
++#define __enable_dsp_hazard() \
++do { \
++ asm("_ehb"); \
++} while (0)
++
++static inline void __init_dsp(void)
++{
++ mthi1(0);
++ mtlo1(0);
++ mthi2(0);
++ mtlo2(0);
++ mthi3(0);
++ mtlo3(0);
++ wrdsp(DSP_DEFAULT, DSP_MASK);
++}
++
++static inline void init_dsp(void)
++{
++ if (cpu_has_dsp)
++ __init_dsp();
++}
++
++#define __save_dsp(tsk) \
++do { \
++ tsk->thread.dsp.dspr[0] = mfhi1(); \
++ tsk->thread.dsp.dspr[1] = mflo1(); \
++ tsk->thread.dsp.dspr[2] = mfhi2(); \
++ tsk->thread.dsp.dspr[3] = mflo2(); \
++ tsk->thread.dsp.dspr[4] = mfhi3(); \
++ tsk->thread.dsp.dspr[5] = mflo3(); \
++} while (0)
++
++#define save_dsp(tsk) \
++do { \
++ if (cpu_has_dsp) \
++ __save_dsp(tsk); \
++} while (0)
++
++#define __restore_dsp(tsk) \
++do { \
++ mthi1(tsk->thread.dsp.dspr[0]); \
++ mtlo1(tsk->thread.dsp.dspr[1]); \
++ mthi2(tsk->thread.dsp.dspr[2]); \
++ mtlo2(tsk->thread.dsp.dspr[3]); \
++ mthi3(tsk->thread.dsp.dspr[4]); \
++ mtlo3(tsk->thread.dsp.dspr[5]); \
++} while (0)
++
++#define restore_dsp(tsk) \
++do { \
++ if (cpu_has_dsp) \
++ __restore_dsp(tsk); \
++} while (0)
++
++#define __get_dsp_regs(tsk) \
++({ \
++ if (tsk == current) \
++ __save_dsp(current); \
++ \
++ tsk->thread.dsp.dspr; \
++})
++
++#endif /* _ASM_DSP_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/elf.h linux_HEAD/include/asm-mips/elf.h
+--- linux-2.6.12/include/asm-mips/elf.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/elf.h 2005-07-01 12:10:27.000000000 +0200
+@@ -193,50 +193,92 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_N
+
+ #ifdef __KERNEL__
+
++struct mips_abi;
++
++extern struct mips_abi mips_abi;
++extern struct mips_abi mips_abi_32;
++extern struct mips_abi mips_abi_n32;
++
+ #ifdef CONFIG_MIPS32
+
+-#define SET_PERSONALITY(ex, ibcs2) \
+-do { \
+- if (ibcs2) \
+- set_personality(PER_SVR4); \
+- set_personality(PER_LINUX); \
++#define SET_PERSONALITY(ex, ibcs2) \
++do { \
++ if (ibcs2) \
++ set_personality(PER_SVR4); \
++ set_personality(PER_LINUX); \
++ \
++ current->thread.abi = &mips_abi; \
+ } while (0)
+
+ #endif /* CONFIG_MIPS32 */
+
+ #ifdef CONFIG_MIPS64
+
+-#define SET_PERSONALITY(ex, ibcs2) \
+-do { current->thread.mflags &= ~MF_ABI_MASK; \
+- if ((ex).e_ident[EI_CLASS] == ELFCLASS32) { \
+- if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
+- ((ex).e_flags & EF_MIPS_ABI) == 0) \
+- current->thread.mflags |= MF_N32; \
+- else \
+- current->thread.mflags |= MF_O32; \
+- } else \
+- current->thread.mflags |= MF_N64; \
+- if (ibcs2) \
+- set_personality(PER_SVR4); \
+- else if (current->personality != PER_LINUX32) \
+- set_personality(PER_LINUX); \
++#ifdef CONFIG_MIPS32_N32
++#define __SET_PERSONALITY32_N32() \
++ do { \
++ current->thread.mflags |= MF_N32; \
++ current->thread.abi = &mips_abi_n32; \
++ } while (0)
++#else
++#define __SET_PERSONALITY32_N32() \
++ do { } while (0)
++#endif
++
++#ifdef CONFIG_MIPS32_O32
++#define __SET_PERSONALITY32_O32() \
++ do { \
++ current->thread.mflags |= MF_O32; \
++ current->thread.abi = &mips_abi_32; \
++ } while (0)
++#else
++#define __SET_PERSONALITY32_O32() \
++ do { } while (0)
++#endif
++
++#ifdef CONFIG_MIPS32_COMPAT
++#define __SET_PERSONALITY32(ex) \
++do { \
++ if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
++ ((ex).e_flags & EF_MIPS_ABI) == 0) \
++ __SET_PERSONALITY32_N32(); \
++ else \
++ __SET_PERSONALITY32_O32(); \
++} while (0)
++#else
++#define __SET_PERSONALITY32(ex) do { } while (0)
++#endif
++
++#define SET_PERSONALITY(ex, ibcs2) \
++do { \
++ current->thread.mflags &= ~MF_ABI_MASK; \
++ if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
++ __SET_PERSONALITY32(ex); \
++ else { \
++ current->thread.mflags |= MF_N64; \
++ current->thread.abi = &mips_abi; \
++ } \
++ \
++ if (ibcs2) \
++ set_personality(PER_SVR4); \
++ else if (current->personality != PER_LINUX32) \
++ set_personality(PER_LINUX); \
+ } while (0)
+
+ #endif /* CONFIG_MIPS64 */
+
+ extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
++extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
+ extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
+
+ #define ELF_CORE_COPY_REGS(elf_regs, regs) \
+ dump_regs((elf_greg_t *)&(elf_regs), regs);
++#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
+ #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
+ dump_task_fpu(tsk, elf_fpregs)
+
+ #endif /* __KERNEL__ */
+
+-/* This one accepts IRIX binaries. */
+-#define irix_elf_check_arch(hdr) ((hdr)->e_flags & RHF_SGI_ONLY)
+-
+ #define USE_ELF_CORE_DUMP
+ #define ELF_EXEC_PAGESIZE PAGE_SIZE
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/errno.h linux_HEAD/include/asm-mips/errno.h
+--- linux-2.6.12/include/asm-mips/errno.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/errno.h 2004-10-27 02:15:14.000000000 +0200
+@@ -115,10 +115,6 @@
+ #define EKEYREVOKED 163 /* Key has been revoked */
+ #define EKEYREJECTED 164 /* Key was rejected by service */
+
+-/* for robust mutexes */
+-#define EOWNERDEAD 165 /* Owner died */
+-#define ENOTRECOVERABLE 166 /* State not recoverable */
+-
+ #define EDQUOT 1133 /* Quota exceeded */
+
+ #ifdef __KERNEL__
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/fixmap.h linux_HEAD/include/asm-mips/fixmap.h
+--- linux-2.6.12/include/asm-mips/fixmap.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/fixmap.h 2005-02-17 21:50:43.000000000 +0100
+@@ -107,4 +107,11 @@ static inline unsigned long virt_to_fix(
+ return __virt_to_fix(vaddr);
+ }
+
++/*
++ * Called from pgtable_init()
++ */
++extern void fixrange_init(unsigned long start, unsigned long end,
++ pgd_t *pgd_base);
++
++
+ #endif
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/fpu.h linux_HEAD/include/asm-mips/fpu.h
+--- linux-2.6.12/include/asm-mips/fpu.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/fpu.h 2005-05-14 14:38:52.000000000 +0200
+@@ -80,9 +80,14 @@ do { \
+
+ #define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU)
+
++static inline int __is_fpu_owner(void)
++{
++ return test_thread_flag(TIF_USEDFPU);
++}
++
+ static inline int is_fpu_owner(void)
+ {
+- return cpu_has_fpu && test_thread_flag(TIF_USEDFPU);
++ return cpu_has_fpu && __is_fpu_owner();
+ }
+
+ static inline void own_fpu(void)
+@@ -127,7 +132,7 @@ static inline void restore_fp(struct tas
+ static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
+ {
+ if (cpu_has_fpu) {
+- if ((tsk == current) && is_fpu_owner())
++ if ((tsk == current) && __is_fpu_owner())
+ _save_fp(current);
+ return tsk->thread.fpu.hard.fpr;
+ }
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/fpu_emulator.h linux_HEAD/include/asm-mips/fpu_emulator.h
+--- linux-2.6.12/include/asm-mips/fpu_emulator.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/fpu_emulator.h 2005-05-14 14:38:52.000000000 +0200
+@@ -23,16 +23,15 @@
+ #ifndef _ASM_FPU_EMULATOR_H
+ #define _ASM_FPU_EMULATOR_H
+
+-struct mips_fpu_emulator_private {
+- unsigned int eir;
+- struct {
+- unsigned int emulated;
+- unsigned int loads;
+- unsigned int stores;
+- unsigned int cp1ops;
+- unsigned int cp1xops;
+- unsigned int errors;
+- } stats;
++struct mips_fpu_emulator_stats {
++ unsigned int emulated;
++ unsigned int loads;
++ unsigned int stores;
++ unsigned int cp1ops;
++ unsigned int cp1xops;
++ unsigned int errors;
+ };
+
++extern struct mips_fpu_emulator_stats fpuemustats;
++
+ #endif /* _ASM_FPU_EMULATOR_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/hazards.h linux_HEAD/include/asm-mips/hazards.h
+--- linux-2.6.12/include/asm-mips/hazards.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/hazards.h 2005-03-03 21:03:38.000000000 +0100
+@@ -107,6 +107,7 @@ __asm__(
+ " .endm \n\t");
+
+ #ifdef CONFIG_CPU_RM9000
++
+ /*
+ * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
+ * use of the JTLB for instructions should not occur for 4 cpu cycles and use
+@@ -124,6 +125,9 @@ __asm__(
+ ".set\tmips32\n\t" \
+ "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
+ ".set\tmips0")
++
++#define back_to_back_c0_hazard() do { } while (0)
++
+ #else
+
+ /*
+@@ -170,6 +174,10 @@ __asm__(
+ __asm__ __volatile__( \
+ "_ehb\t\t\t\t# irq_disable_hazard")
+
++#define back_to_back_c0_hazard() \
++ __asm__ __volatile__( \
++ "_ehb\t\t\t\t# back_to_back_c0_hazard")
++
+ #elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
+
+ /*
+@@ -186,6 +194,8 @@ __asm__(
+ #define irq_enable_hazard() do { } while (0)
+ #define irq_disable_hazard() do { } while (0)
+
++#define back_to_back_c0_hazard() do { } while (0)
++
+ #else
+
+ /*
+@@ -210,6 +220,12 @@ __asm__(
+ __asm__ __volatile__( \
+ "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
+
++#define back_to_back_c0_hazard() \
++ __asm__ __volatile__( \
++ " .set noreorder \n" \
++ " nop; nop; nop \n" \
++ " .set reorder \n")
++
+ #endif
+
+ #endif /* __ASSEMBLY__ */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/hp-lj/asic.h linux_HEAD/include/asm-mips/hp-lj/asic.h
+--- linux-2.6.12/include/asm-mips/hp-lj/asic.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/hp-lj/asic.h 1970-01-01 01:00:00.000000000 +0100
+@@ -1,7 +0,0 @@
+-
+-typedef enum { IllegalAsic, UnknownAsic, AndrosAsic, HarmonyAsic } AsicId;
+-
+-AsicId GetAsicId(void);
+-
+-const char* const GetAsicName(void);
+-
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/inst.h linux_HEAD/include/asm-mips/inst.h
+--- linux-2.6.12/include/asm-mips/inst.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/inst.h 2005-07-01 12:10:27.000000000 +0200
+@@ -28,7 +28,7 @@ enum major_op {
+ sdl_op, sdr_op, swr_op, cache_op,
+ ll_op, lwc1_op, lwc2_op, pref_op,
+ lld_op, ldc1_op, ldc2_op, ld_op,
+- sc_op, swc1_op, swc2_op, major_3b_op, /* Opcode 0x3b is unused */
++ sc_op, swc1_op, swc2_op, rdhwr_op,
+ scd_op, sdc1_op, sdc2_op, sd_op
+ };
+
+@@ -62,10 +62,10 @@ enum rt_op {
+ spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07,
+ tgei_op, tgeiu_op, tlti_op, tltiu_op,
+ teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op,
+- bltzal_op, bgezal_op, bltzall_op, bgezall_op
+- /*
+- * The others (0x14 - 0x1f) are unused.
+- */
++ bltzal_op, bgezal_op, bltzall_op, bgezall_op,
++ rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17,
++ rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b,
++ bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f
+ };
+
+ /*
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/inventory.h linux_HEAD/include/asm-mips/inventory.h
+--- linux-2.6.12/include/asm-mips/inventory.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/inventory.h 2005-03-17 22:20:30.000000000 +0100
+@@ -4,6 +4,8 @@
+ #ifndef __ASM_INVENTORY_H
+ #define __ASM_INVENTORY_H
+
++#include <linux/compiler.h>
++
+ typedef struct inventory_s {
+ struct inventory_s *inv_next;
+ int inv_class;
+@@ -14,7 +16,9 @@ typedef struct inventory_s {
+ } inventory_t;
+
+ extern int inventory_items;
+-void add_to_inventory (int class, int type, int controller, int unit, int state);
+-int dump_inventory_to_user (void *userbuf, int size);
++
++extern void add_to_inventory (int class, int type, int controller, int unit, int state);
++extern int dump_inventory_to_user (void __user *userbuf, int size);
++extern int __init init_inventory(void);
+
+ #endif /* __ASM_INVENTORY_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/io.h linux_HEAD/include/asm-mips/io.h
+--- linux-2.6.12/include/asm-mips/io.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/io.h 2005-07-01 12:10:27.000000000 +0200
+@@ -26,6 +26,7 @@
+ #include <asm/pgtable-bits.h>
+ #include <asm/processor.h>
+
++#include <ioremap.h>
+ #include <mangle-port.h>
+
+ /*
+@@ -34,7 +35,7 @@
+ #undef CONF_SLOWDOWN_IO
+
+ /*
+- * Raw operations are never swapped in software. Otoh values that raw
++ * Raw operations are never swapped in software. OTOH values that raw
+ * operations are working on may or may not have been swapped by the bus
+ * hardware. An example use would be for flash memory that's used for
+ * execute in place.
+@@ -43,45 +44,53 @@
+ # define __raw_ioswabw(x) (x)
+ # define __raw_ioswabl(x) (x)
+ # define __raw_ioswabq(x) (x)
++# define ____raw_ioswabq(x) (x)
+
+ /*
+ * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
+ * less sane hardware forces software to fiddle with this...
++ *
++ * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
++ * you can't have the numerical value of data and byte addresses within
++ * multibyte quantities both preserved at the same time. Hence two
++ * variations of functions: non-prefixed ones that preserve the value
++ * and prefixed ones that preserve byte addresses. The latters are
++ * typically used for moving raw data between a peripheral and memory (cf.
++ * string I/O functions), hence the "mem_" prefix.
+ */
+ #if defined(CONFIG_SWAP_IO_SPACE)
+
+ # define ioswabb(x) (x)
++# define mem_ioswabb(x) (x)
+ # ifdef CONFIG_SGI_IP22
+ /*
+ * IP22 seems braindead enough to swap 16bits values in hardware, but
+ * not 32bits. Go figure... Can't tell without documentation.
+ */
+ # define ioswabw(x) (x)
++# define mem_ioswabw(x) le16_to_cpu(x)
+ # else
+ # define ioswabw(x) le16_to_cpu(x)
++# define mem_ioswabw(x) (x)
+ # endif
+ # define ioswabl(x) le32_to_cpu(x)
++# define mem_ioswabl(x) (x)
+ # define ioswabq(x) le64_to_cpu(x)
++# define mem_ioswabq(x) (x)
+
+ #else
+
+ # define ioswabb(x) (x)
++# define mem_ioswabb(x) (x)
+ # define ioswabw(x) (x)
++# define mem_ioswabw(x) cpu_to_le16(x)
+ # define ioswabl(x) (x)
++# define mem_ioswabl(x) cpu_to_le32(x)
+ # define ioswabq(x) (x)
++# define mem_ioswabq(x) cpu_to_le32(x)
+
+ #endif
+
+-/*
+- * Native bus accesses never swapped.
+- */
+-#define bus_ioswabb(x) (x)
+-#define bus_ioswabw(x) (x)
+-#define bus_ioswabl(x) (x)
+-#define bus_ioswabq(x) (x)
+-
+-#define __bus_ioswabq bus_ioswabq
+-
+ #define IO_SPACE_LIMIT 0xffff
+
+ /*
+@@ -200,6 +209,8 @@ extern void __iounmap(volatile void __io
+ static inline void * __ioremap_mode(phys_t offset, unsigned long size,
+ unsigned long flags)
+ {
++#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
++
+ if (cpu_has_64bit_addresses) {
+ u64 base = UNCAC_BASE;
+
+@@ -210,9 +221,30 @@ static inline void * __ioremap_mode(phys
+ if (flags == _CACHE_UNCACHED)
+ base = (u64) IO_BASE;
+ return (void *) (unsigned long) (base + offset);
++ } else if (__builtin_constant_p(offset) &&
++ __builtin_constant_p(size) && __builtin_constant_p(flags)) {
++ phys_t phys_addr, last_addr;
++
++ phys_addr = fixup_bigphys_addr(offset, size);
++
++ /* Don't allow wraparound or zero size. */
++ last_addr = phys_addr + size - 1;
++ if (!size || last_addr < phys_addr)
++ return NULL;
++
++ /*
++ * Map uncached objects in the low 512MB of address
++ * space using KSEG1.
++ */
++ if (__IS_LOW512(phys_addr) && __IS_LOW512(last_addr) &&
++ flags == _CACHE_UNCACHED)
++ return (void *)CKSEG1ADDR(phys_addr);
++
+ }
+
+ return __ioremap(offset, size, flags);
++
++#undef __IS_LOW512
+ }
+
+ /*
+@@ -264,12 +296,16 @@ static inline void * __ioremap_mode(phys
+
+ static inline void iounmap(volatile void __iomem *addr)
+ {
+- if (cpu_has_64bit_addresses)
++#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
++
++ if (cpu_has_64bit_addresses ||
++ (__builtin_constant_p(addr) && __IS_KSEG1(addr)))
+ return;
+
+ __iounmap(addr);
+-}
+
++#undef __IS_KSEG1
++}
+
+ #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \
+ \
+@@ -319,7 +355,8 @@ static inline type pfx##read##bwlq(volat
+ else if (cpu_has_64bits) { \
+ unsigned long __flags; \
+ \
+- local_irq_save(__flags); \
++ if (irq) \
++ local_irq_save(__flags); \
+ __asm__ __volatile__( \
+ ".set mips3" "\t\t# __readq" "\n\t" \
+ "ld %L0, %1" "\n\t" \
+@@ -328,7 +365,8 @@ static inline type pfx##read##bwlq(volat
+ ".set mips0" "\n" \
+ : "=r" (__val) \
+ : "m" (*__mem)); \
+- local_irq_restore(__flags); \
++ if (irq) \
++ local_irq_restore(__flags); \
+ } else { \
+ __val = 0; \
+ BUG(); \
+@@ -386,15 +424,15 @@ __BUILD_IOPORT_SINGLE(bus, bwlq, type, _
+
+ #define BUILDIO(bwlq, type) \
+ \
+-__BUILD_MEMORY_PFX(, bwlq, type) \
+ __BUILD_MEMORY_PFX(__raw_, bwlq, type) \
+-__BUILD_MEMORY_PFX(bus_, bwlq, type) \
++__BUILD_MEMORY_PFX(, bwlq, type) \
++__BUILD_MEMORY_PFX(mem_, bwlq, type) \
+ __BUILD_IOPORT_PFX(, bwlq, type) \
+-__BUILD_IOPORT_PFX(__raw_, bwlq, type)
++__BUILD_IOPORT_PFX(mem_, bwlq, type)
+
+ #define __BUILDIO(bwlq, type) \
+ \
+-__BUILD_MEMORY_SINGLE(__bus_, bwlq, type, 0)
++__BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0)
+
+ BUILDIO(b, u8)
+ BUILDIO(w, u16)
+@@ -422,7 +460,7 @@ static inline void writes##bwlq(volatile
+ volatile type *__addr = addr; \
+ \
+ while (count--) { \
+- __raw_write##bwlq(*__addr, mem); \
++ mem_write##bwlq(*__addr, mem); \
+ __addr++; \
+ } \
+ } \
+@@ -433,20 +471,20 @@ static inline void reads##bwlq(volatile
+ volatile type *__addr = addr; \
+ \
+ while (count--) { \
+- *__addr = __raw_read##bwlq(mem); \
++ *__addr = mem_read##bwlq(mem); \
+ __addr++; \
+ } \
+ }
+
+ #define __BUILD_IOPORT_STRING(bwlq, type) \
+ \
+-static inline void outs##bwlq(unsigned long port, void *addr, \
++static inline void outs##bwlq(unsigned long port, const void *addr, \
+ unsigned int count) \
+ { \
+- volatile type *__addr = addr; \
++ const volatile type *__addr = addr; \
+ \
+ while (count--) { \
+- __raw_out##bwlq(*__addr, port); \
++ mem_out##bwlq(*__addr, port); \
+ __addr++; \
+ } \
+ } \
+@@ -457,7 +495,7 @@ static inline void ins##bwlq(unsigned lo
+ volatile type *__addr = addr; \
+ \
+ while (count--) { \
+- *__addr = __raw_in##bwlq(port); \
++ *__addr = mem_in##bwlq(port); \
+ __addr++; \
+ } \
+ }
+@@ -481,34 +519,6 @@ BUILDSTRING(q, u64)
+ #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
+
+ /*
+- * Memory Mapped I/O
+- */
+-#define ioread8(addr) readb(addr)
+-#define ioread16(addr) readw(addr)
+-#define ioread32(addr) readl(addr)
+-
+-#define iowrite8(b,addr) writeb(b,addr)
+-#define iowrite16(w,addr) writew(w,addr)
+-#define iowrite32(l,addr) writel(l,addr)
+-
+-#define ioread8_rep(a,b,c) readsb(a,b,c)
+-#define ioread16_rep(a,b,c) readsw(a,b,c)
+-#define ioread32_rep(a,b,c) readsl(a,b,c)
+-
+-#define iowrite8_rep(a,b,c) writesb(a,b,c)
+-#define iowrite16_rep(a,b,c) writesw(a,b,c)
+-#define iowrite32_rep(a,b,c) writesl(a,b,c)
+-
+-/* Create a virtual mapping cookie for an IO port range */
+-extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
+-extern void ioport_unmap(void __iomem *);
+-
+-/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
+-struct pci_dev;
+-extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
+-extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
+-
+-/*
+ * ISA space is 'always mapped' on currently supported MIPS systems, no need
+ * to explicitly ioremap() it. The fact that the ISA IO space is mapped
+ * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/irq.h linux_HEAD/include/asm-mips/irq.h
+--- linux-2.6.12/include/asm-mips/irq.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/irq.h 2005-03-01 22:49:44.000000000 +0100
+@@ -24,11 +24,9 @@ static inline int irq_canonicalize(int i
+
+ struct pt_regs;
+
+-#ifdef CONFIG_PREEMPT
+-
+ extern asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs);
+
+-#else
++#ifdef CONFIG_PREEMPT
+
+ /*
+ * do_IRQ handles all normal device IRQ's (the special
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/jmr3927/jmr3927.h linux_HEAD/include/asm-mips/jmr3927/jmr3927.h
+--- linux-2.6.12/include/asm-mips/jmr3927/jmr3927.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/jmr3927/jmr3927.h 2005-03-04 20:36:14.000000000 +0100
+@@ -202,20 +202,6 @@ static inline int jmr3927_have_isac(void
+ #endif /* !__ASSEMBLY__ */
+
+ /*
+- * UART defines for serial.h
+- */
+-
+-/* use Pre-scaler T0 (1/2) */
+-#define JMR3927_BASE_BAUD (JMR3927_IMCLK / 2 / 16)
+-
+-#define UART0_ADDR 0xfffef300
+-#define UART1_ADDR 0xfffef400
+-#define UART0_INT JMR3927_IRQ_IRC_SIO0
+-#define UART1_INT JMR3927_IRQ_IRC_SIO1
+-#define UART0_FLAGS ASYNC_BOOT_AUTOCONF
+-#define UART1_FLAGS 0
+-
+-/*
+ * IRQ mappings
+ */
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-au1x00/au1000.h linux_HEAD/include/asm-mips/mach-au1x00/au1000.h
+--- linux-2.6.12/include/asm-mips/mach-au1x00/au1000.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-au1x00/au1000.h 2005-04-25 13:27:29.000000000 +0200
+@@ -60,34 +60,34 @@ void static inline au_sync_delay(int ms)
+ mdelay(ms);
+ }
+
+-void static inline au_writeb(u8 val, int reg)
++void static inline au_writeb(u8 val, unsigned long reg)
+ {
+ *(volatile u8 *)(reg) = val;
+ }
+
+-void static inline au_writew(u16 val, int reg)
++void static inline au_writew(u16 val, unsigned long reg)
+ {
+ *(volatile u16 *)(reg) = val;
+ }
+
+-void static inline au_writel(u32 val, int reg)
++void static inline au_writel(u32 val, unsigned long reg)
+ {
+ *(volatile u32 *)(reg) = val;
+ }
+
+-static inline u8 au_readb(unsigned long port)
++static inline u8 au_readb(unsigned long reg)
+ {
+- return (*(volatile u8 *)port);
++ return (*(volatile u8 *)reg);
+ }
+
+-static inline u16 au_readw(unsigned long port)
++static inline u16 au_readw(unsigned long reg)
+ {
+- return (*(volatile u16 *)port);
++ return (*(volatile u16 *)reg);
+ }
+
+-static inline u32 au_readl(unsigned long port)
++static inline u32 au_readl(unsigned long reg)
+ {
+- return (*(volatile u32 *)port);
++ return (*(volatile u32 *)reg);
+ }
+
+ /* These next three functions should be a generic part of the MIPS
+@@ -162,28 +162,293 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+ #endif
+
+-/* SDRAM Controller */
++/*
++ * SDRAM Register Offsets
++ */
+ #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
+-#define MEM_SDMODE0 0xB4000000
+-#define MEM_SDMODE1 0xB4000004
+-#define MEM_SDMODE2 0xB4000008
+-
+-#define MEM_SDADDR0 0xB400000C
+-#define MEM_SDADDR1 0xB4000010
+-#define MEM_SDADDR2 0xB4000014
+-
+-#define MEM_SDREFCFG 0xB4000018
+-#define MEM_SDPRECMD 0xB400001C
+-#define MEM_SDAUTOREF 0xB4000020
+-
+-#define MEM_SDWRMD0 0xB4000024
+-#define MEM_SDWRMD1 0xB4000028
+-#define MEM_SDWRMD2 0xB400002C
++#define MEM_SDMODE0 (0x0000)
++#define MEM_SDMODE1 (0x0004)
++#define MEM_SDMODE2 (0x0008)
++#define MEM_SDADDR0 (0x000C)
++#define MEM_SDADDR1 (0x0010)
++#define MEM_SDADDR2 (0x0014)
++#define MEM_SDREFCFG (0x0018)
++#define MEM_SDPRECMD (0x001C)
++#define MEM_SDAUTOREF (0x0020)
++#define MEM_SDWRMD0 (0x0024)
++#define MEM_SDWRMD1 (0x0028)
++#define MEM_SDWRMD2 (0x002C)
++#define MEM_SDSLEEP (0x0030)
++#define MEM_SDSMCKE (0x0034)
++
++/*
++ * MEM_SDMODE register content definitions
++ */
++#define MEM_SDMODE_F (1<<22)
++#define MEM_SDMODE_SR (1<<21)
++#define MEM_SDMODE_BS (1<<20)
++#define MEM_SDMODE_RS (3<<18)
++#define MEM_SDMODE_CS (7<<15)
++#define MEM_SDMODE_TRAS (15<<11)
++#define MEM_SDMODE_TMRD (3<<9)
++#define MEM_SDMODE_TWR (3<<7)
++#define MEM_SDMODE_TRP (3<<5)
++#define MEM_SDMODE_TRCD (3<<3)
++#define MEM_SDMODE_TCL (7<<0)
++
++#define MEM_SDMODE_BS_2Bank (0<<20)
++#define MEM_SDMODE_BS_4Bank (1<<20)
++#define MEM_SDMODE_RS_11Row (0<<18)
++#define MEM_SDMODE_RS_12Row (1<<18)
++#define MEM_SDMODE_RS_13Row (2<<18)
++#define MEM_SDMODE_RS_N(N) ((N)<<18)
++#define MEM_SDMODE_CS_7Col (0<<15)
++#define MEM_SDMODE_CS_8Col (1<<15)
++#define MEM_SDMODE_CS_9Col (2<<15)
++#define MEM_SDMODE_CS_10Col (3<<15)
++#define MEM_SDMODE_CS_11Col (4<<15)
++#define MEM_SDMODE_CS_N(N) ((N)<<15)
++#define MEM_SDMODE_TRAS_N(N) ((N)<<11)
++#define MEM_SDMODE_TMRD_N(N) ((N)<<9)
++#define MEM_SDMODE_TWR_N(N) ((N)<<7)
++#define MEM_SDMODE_TRP_N(N) ((N)<<5)
++#define MEM_SDMODE_TRCD_N(N) ((N)<<3)
++#define MEM_SDMODE_TCL_N(N) ((N)<<0)
++
++/*
++ * MEM_SDADDR register contents definitions
++ */
++#define MEM_SDADDR_E (1<<20)
++#define MEM_SDADDR_CSBA (0x03FF<<10)
++#define MEM_SDADDR_CSMASK (0x03FF<<0)
++#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12)
++#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22)
++
++/*
++ * MEM_SDREFCFG register content definitions
++ */
++#define MEM_SDREFCFG_TRC (15<<28)
++#define MEM_SDREFCFG_TRPM (3<<26)
++#define MEM_SDREFCFG_E (1<<25)
++#define MEM_SDREFCFG_RE (0x1ffffff<<0)
++#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC)
++#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM)
++#define MEM_SDREFCFG_REF_N(N) (N)
++#endif
++
++/***********************************************************************/
+
+-#define MEM_SDSLEEP 0xB4000030
+-#define MEM_SDSMCKE 0xB4000034
++/*
++ * Au1550 SDRAM Register Offsets
++ */
++
++/***********************************************************************/
++
++#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
++#define MEM_SDMODE0 (0x0800)
++#define MEM_SDMODE1 (0x0808)
++#define MEM_SDMODE2 (0x0810)
++#define MEM_SDADDR0 (0x0820)
++#define MEM_SDADDR1 (0x0828)
++#define MEM_SDADDR2 (0x0830)
++#define MEM_SDCONFIGA (0x0840)
++#define MEM_SDCONFIGB (0x0848)
++#define MEM_SDSTAT (0x0850)
++#define MEM_SDERRADDR (0x0858)
++#define MEM_SDSTRIDE0 (0x0860)
++#define MEM_SDSTRIDE1 (0x0868)
++#define MEM_SDSTRIDE2 (0x0870)
++#define MEM_SDWRMD0 (0x0880)
++#define MEM_SDWRMD1 (0x0888)
++#define MEM_SDWRMD2 (0x0890)
++#define MEM_SDPRECMD (0x08C0)
++#define MEM_SDAUTOREF (0x08C8)
++#define MEM_SDSREF (0x08D0)
++#define MEM_SDSLEEP MEM_SDSREF
++
++#endif
++
++/*
++ * Physical base addresses for integrated peripherals
++ */
++
++#ifdef CONFIG_SOC_AU1000
++#define MEM_PHYS_ADDR 0x14000000
++#define STATIC_MEM_PHYS_ADDR 0x14001000
++#define DMA0_PHYS_ADDR 0x14002000
++#define DMA1_PHYS_ADDR 0x14002100
++#define DMA2_PHYS_ADDR 0x14002200
++#define DMA3_PHYS_ADDR 0x14002300
++#define DMA4_PHYS_ADDR 0x14002400
++#define DMA5_PHYS_ADDR 0x14002500
++#define DMA6_PHYS_ADDR 0x14002600
++#define DMA7_PHYS_ADDR 0x14002700
++#define IC0_PHYS_ADDR 0x10400000
++#define IC1_PHYS_ADDR 0x11800000
++#define AC97_PHYS_ADDR 0x10000000
++#define USBH_PHYS_ADDR 0x10100000
++#define USBD_PHYS_ADDR 0x10200000
++#define IRDA_PHYS_ADDR 0x10300000
++#define MAC0_PHYS_ADDR 0x10500000
++#define MAC1_PHYS_ADDR 0x10510000
++#define MACEN_PHYS_ADDR 0x10520000
++#define MACDMA0_PHYS_ADDR 0x14004000
++#define MACDMA1_PHYS_ADDR 0x14004200
++#define I2S_PHYS_ADDR 0x11000000
++#define UART0_PHYS_ADDR 0x11100000
++#define UART1_PHYS_ADDR 0x11200000
++#define UART2_PHYS_ADDR 0x11300000
++#define UART3_PHYS_ADDR 0x11400000
++#define SSI0_PHYS_ADDR 0x11600000
++#define SSI1_PHYS_ADDR 0x11680000
++#define SYS_PHYS_ADDR 0x11900000
++#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
++#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
++#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
+ #endif
+
++/********************************************************************/
++
++#ifdef CONFIG_SOC_AU1500
++#define MEM_PHYS_ADDR 0x14000000
++#define STATIC_MEM_PHYS_ADDR 0x14001000
++#define DMA0_PHYS_ADDR 0x14002000
++#define DMA1_PHYS_ADDR 0x14002100
++#define DMA2_PHYS_ADDR 0x14002200
++#define DMA3_PHYS_ADDR 0x14002300
++#define DMA4_PHYS_ADDR 0x14002400
++#define DMA5_PHYS_ADDR 0x14002500
++#define DMA6_PHYS_ADDR 0x14002600
++#define DMA7_PHYS_ADDR 0x14002700
++#define IC0_PHYS_ADDR 0x10400000
++#define IC1_PHYS_ADDR 0x11800000
++#define AC97_PHYS_ADDR 0x10000000
++#define USBH_PHYS_ADDR 0x10100000
++#define USBD_PHYS_ADDR 0x10200000
++#define PCI_PHYS_ADDR 0x14005000
++#define MAC0_PHYS_ADDR 0x11500000
++#define MAC1_PHYS_ADDR 0x11510000
++#define MACEN_PHYS_ADDR 0x11520000
++#define MACDMA0_PHYS_ADDR 0x14004000
++#define MACDMA1_PHYS_ADDR 0x14004200
++#define I2S_PHYS_ADDR 0x11000000
++#define UART0_PHYS_ADDR 0x11100000
++#define UART3_PHYS_ADDR 0x11400000
++#define GPIO2_PHYS_ADDR 0x11700000
++#define SYS_PHYS_ADDR 0x11900000
++#define PCI_MEM_PHYS_ADDR 0x400000000ULL
++#define PCI_IO_PHYS_ADDR 0x500000000ULL
++#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL
++#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL
++#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
++#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
++#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
++#endif
++
++/********************************************************************/
++
++#ifdef CONFIG_SOC_AU1100
++#define MEM_PHYS_ADDR 0x14000000
++#define STATIC_MEM_PHYS_ADDR 0x14001000
++#define DMA0_PHYS_ADDR 0x14002000
++#define DMA1_PHYS_ADDR 0x14002100
++#define DMA2_PHYS_ADDR 0x14002200
++#define DMA3_PHYS_ADDR 0x14002300
++#define DMA4_PHYS_ADDR 0x14002400
++#define DMA5_PHYS_ADDR 0x14002500
++#define DMA6_PHYS_ADDR 0x14002600
++#define DMA7_PHYS_ADDR 0x14002700
++#define IC0_PHYS_ADDR 0x10400000
++#define SD0_PHYS_ADDR 0x10600000
++#define SD1_PHYS_ADDR 0x10680000
++#define IC1_PHYS_ADDR 0x11800000
++#define AC97_PHYS_ADDR 0x10000000
++#define USBH_PHYS_ADDR 0x10100000
++#define USBD_PHYS_ADDR 0x10200000
++#define IRDA_PHYS_ADDR 0x10300000
++#define MAC0_PHYS_ADDR 0x10500000
++#define MACEN_PHYS_ADDR 0x10520000
++#define MACDMA0_PHYS_ADDR 0x14004000
++#define MACDMA1_PHYS_ADDR 0x14004200
++#define I2S_PHYS_ADDR 0x11000000
++#define UART0_PHYS_ADDR 0x11100000
++#define UART1_PHYS_ADDR 0x11200000
++#define UART3_PHYS_ADDR 0x11400000
++#define SSI0_PHYS_ADDR 0x11600000
++#define SSI1_PHYS_ADDR 0x11680000
++#define GPIO2_PHYS_ADDR 0x11700000
++#define SYS_PHYS_ADDR 0x11900000
++#define LCD_PHYS_ADDR 0x15000000
++#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
++#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
++#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
++#endif
++
++/***********************************************************************/
++
++#ifdef CONFIG_SOC_AU1550
++#define MEM_PHYS_ADDR 0x14000000
++#define STATIC_MEM_PHYS_ADDR 0x14001000
++#define IC0_PHYS_ADDR 0x10400000
++#define IC1_PHYS_ADDR 0x11800000
++#define USBH_PHYS_ADDR 0x14020000
++#define USBD_PHYS_ADDR 0x10200000
++#define PCI_PHYS_ADDR 0x14005000
++#define MAC0_PHYS_ADDR 0x10500000
++#define MAC1_PHYS_ADDR 0x10510000
++#define MACEN_PHYS_ADDR 0x10520000
++#define MACDMA0_PHYS_ADDR 0x14004000
++#define MACDMA1_PHYS_ADDR 0x14004200
++#define UART0_PHYS_ADDR 0x11100000
++#define UART1_PHYS_ADDR 0x11200000
++#define UART3_PHYS_ADDR 0x11400000
++#define GPIO2_PHYS_ADDR 0x11700000
++#define SYS_PHYS_ADDR 0x11900000
++#define DDMA_PHYS_ADDR 0x14002000
++#define PE_PHYS_ADDR 0x14008000
++#define PSC0_PHYS_ADDR 0x11A00000
++#define PSC1_PHYS_ADDR 0x11B00000
++#define PSC2_PHYS_ADDR 0x10A00000
++#define PSC3_PHYS_ADDR 0x10B00000
++#define PCI_MEM_PHYS_ADDR 0x400000000ULL
++#define PCI_IO_PHYS_ADDR 0x500000000ULL
++#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL
++#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL
++#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
++#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
++#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
++#endif
++
++/***********************************************************************/
++
++#ifdef CONFIG_SOC_AU1200
++#define MEM_PHYS_ADDR 0x14000000
++#define STATIC_MEM_PHYS_ADDR 0x14001000
++#define AES_PHYS_ADDR 0x10300000
++#define CIM_PHYS_ADDR 0x14004000
++#define IC0_PHYS_ADDR 0x10400000
++#define IC1_PHYS_ADDR 0x11800000
++#define USBM_PHYS_ADDR 0x14020000
++#define USBH_PHYS_ADDR 0x14020100
++#define UART0_PHYS_ADDR 0x11100000
++#define UART1_PHYS_ADDR 0x11200000
++#define GPIO2_PHYS_ADDR 0x11700000
++#define SYS_PHYS_ADDR 0x11900000
++#define DDMA_PHYS_ADDR 0x14002000
++#define PSC0_PHYS_ADDR 0x11A00000
++#define PSC1_PHYS_ADDR 0x11B00000
++#define SD0_PHYS_ADDR 0x10600000
++#define SD1_PHYS_ADDR 0x10680000
++#define LCD_PHYS_ADDR 0x15000000
++#define SWCNT_PHYS_ADDR 0x1110010C
++#define MAEFE_PHYS_ADDR 0x14012000
++#define MAEBE_PHYS_ADDR 0x14010000
++#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL
++#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL
++#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL
++#endif
++
++
+ /* Static Bus Controller */
+ #define MEM_STCFG0 0xB4001000
+ #define MEM_STTIME0 0xB4001004
+@@ -369,7 +634,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1000_MAC0_ENABLE 0xB0520000
+ #define AU1000_MAC1_ENABLE 0xB0520004
+ #define NUM_ETH_INTERFACES 2
+-#endif // CONFIG_SOC_AU1000
++#endif /* CONFIG_SOC_AU1000 */
+
+ /* Au1500 */
+ #ifdef CONFIG_SOC_AU1500
+@@ -429,6 +694,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1500_GPIO_207 62
+ #define AU1500_GPIO_208_215 63
+
++/* shortcuts */
++#define INTA AU1000_PCI_INTA
++#define INTB AU1000_PCI_INTB
++#define INTC AU1000_PCI_INTC
++#define INTD AU1000_PCI_INTD
++
+ #define UART0_ADDR 0xB1100000
+ #define UART3_ADDR 0xB1400000
+
+@@ -440,7 +711,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1500_MAC0_ENABLE 0xB1520000
+ #define AU1500_MAC1_ENABLE 0xB1520004
+ #define NUM_ETH_INTERFACES 2
+-#endif // CONFIG_SOC_AU1500
++#endif /* CONFIG_SOC_AU1500 */
+
+ /* Au1100 */
+ #ifdef CONFIG_SOC_AU1100
+@@ -485,6 +756,22 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1000_GPIO_13 45
+ #define AU1000_GPIO_14 46
+ #define AU1000_GPIO_15 47
++#define AU1000_GPIO_16 48
++#define AU1000_GPIO_17 49
++#define AU1000_GPIO_18 50
++#define AU1000_GPIO_19 51
++#define AU1000_GPIO_20 52
++#define AU1000_GPIO_21 53
++#define AU1000_GPIO_22 54
++#define AU1000_GPIO_23 55
++#define AU1000_GPIO_24 56
++#define AU1000_GPIO_25 57
++#define AU1000_GPIO_26 58
++#define AU1000_GPIO_27 59
++#define AU1000_GPIO_28 60
++#define AU1000_GPIO_29 61
++#define AU1000_GPIO_30 62
++#define AU1000_GPIO_31 63
+
+ #define UART0_ADDR 0xB1100000
+ #define UART1_ADDR 0xB1200000
+@@ -496,7 +783,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1100_ETH0_BASE 0xB0500000
+ #define AU1100_MAC0_ENABLE 0xB0520000
+ #define NUM_ETH_INTERFACES 1
+-#endif // CONFIG_SOC_AU1100
++#endif /* CONFIG_SOC_AU1100 */
+
+ #ifdef CONFIG_SOC_AU1550
+ #define AU1550_UART0_INT 0
+@@ -513,14 +800,14 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1550_PSC1_INT 11
+ #define AU1550_PSC2_INT 12
+ #define AU1550_PSC3_INT 13
+-#define AU1550_TOY_INT 14
+-#define AU1550_TOY_MATCH0_INT 15
+-#define AU1550_TOY_MATCH1_INT 16
+-#define AU1550_TOY_MATCH2_INT 17
+-#define AU1550_RTC_INT 18
+-#define AU1550_RTC_MATCH0_INT 19
+-#define AU1550_RTC_MATCH1_INT 20
+-#define AU1550_RTC_MATCH2_INT 21
++#define AU1000_TOY_INT 14
++#define AU1000_TOY_MATCH0_INT 15
++#define AU1000_TOY_MATCH1_INT 16
++#define AU1000_TOY_MATCH2_INT 17
++#define AU1000_RTC_INT 18
++#define AU1000_RTC_MATCH0_INT 19
++#define AU1000_RTC_MATCH1_INT 20
++#define AU1000_RTC_MATCH2_INT 21
+ #define AU1550_NAND_INT 23
+ #define AU1550_USB_DEV_REQ_INT 24
+ #define AU1550_USB_DEV_SUS_INT 25
+@@ -563,6 +850,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1500_GPIO_207 62
+ #define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218
+
++/* shortcuts */
++#define INTA AU1550_PCI_INTA
++#define INTB AU1550_PCI_INTB
++#define INTC AU1550_PCI_INTC
++#define INTD AU1550_PCI_INTD
++
+ #define UART0_ADDR 0xB1100000
+ #define UART1_ADDR 0xB1200000
+ #define UART3_ADDR 0xB1400000
+@@ -575,7 +868,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1550_MAC0_ENABLE 0xB0520000
+ #define AU1550_MAC1_ENABLE 0xB0520004
+ #define NUM_ETH_INTERFACES 2
+-#endif // CONFIG_SOC_AU1550
++#endif /* CONFIG_SOC_AU1550 */
+
+ #ifdef CONFIG_SOC_AU1200
+ #define AU1200_UART0_INT 0
+@@ -592,14 +885,14 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1200_PSC1_INT 11
+ #define AU1200_AES_INT 12
+ #define AU1200_CAMERA_INT 13
+-#define AU1200_TOY_INT 14
+-#define AU1200_TOY_MATCH0_INT 15
+-#define AU1200_TOY_MATCH1_INT 16
+-#define AU1200_TOY_MATCH2_INT 17
+-#define AU1200_RTC_INT 18
+-#define AU1200_RTC_MATCH0_INT 19
+-#define AU1200_RTC_MATCH1_INT 20
+-#define AU1200_RTC_MATCH2_INT 21
++#define AU1000_TOY_INT 14
++#define AU1000_TOY_MATCH0_INT 15
++#define AU1000_TOY_MATCH1_INT 16
++#define AU1000_TOY_MATCH2_INT 17
++#define AU1000_RTC_INT 18
++#define AU1000_RTC_MATCH0_INT 19
++#define AU1000_RTC_MATCH1_INT 20
++#define AU1000_RTC_MATCH2_INT 21
+ #define AU1200_NAND_INT 23
+ #define AU1200_GPIO_204 24
+ #define AU1200_GPIO_205 25
+@@ -607,6 +900,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define AU1200_GPIO_207 27
+ #define AU1200_GPIO_208_215 28 // Logical OR of 208:215
+ #define AU1200_USB_INT 29
++#define AU1000_USB_HOST_INT AU1200_USB_INT
+ #define AU1200_LCD_INT 30
+ #define AU1200_MAE_BOTH_INT 31
+ #define AU1000_GPIO_0 32
+@@ -645,20 +939,36 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define UART0_ADDR 0xB1100000
+ #define UART1_ADDR 0xB1200000
+
+-#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
+-#define USB_HOST_CONFIG 0xB4027ffc
++#define USB_UOC_BASE 0x14020020
++#define USB_UOC_LEN 0x20
++#define USB_OHCI_BASE 0x14020100
++#define USB_OHCI_LEN 0x100
++#define USB_EHCI_BASE 0x14020200
++#define USB_EHCI_LEN 0x100
++#define USB_UDC_BASE 0x14022000
++#define USB_UDC_LEN 0x2000
++#define USB_MSR_BASE 0xB4020000
++#define USB_MSR_MCFG 4
++#define USBMSRMCFG_OMEMEN 0
++#define USBMSRMCFG_OBMEN 1
++#define USBMSRMCFG_EMEMEN 2
++#define USBMSRMCFG_EBMEN 3
++#define USBMSRMCFG_DMEMEN 4
++#define USBMSRMCFG_DBMEN 5
++#define USBMSRMCFG_GMEMEN 6
++#define USBMSRMCFG_OHCCLKEN 16
++#define USBMSRMCFG_EHCCLKEN 17
++#define USBMSRMCFG_UDCCLKEN 18
++#define USBMSRMCFG_PHYPLLEN 19
++#define USBMSRMCFG_RDCOMB 30
++#define USBMSRMCFG_PFEN 31
+
+-// these are here for prototyping on au1550 (do not exist on au1200)
+-#define AU1200_ETH0_BASE 0xB0500000
+-#define AU1200_ETH1_BASE 0xB0510000
+-#define AU1200_MAC0_ENABLE 0xB0520000
+-#define AU1200_MAC1_ENABLE 0xB0520004
+-#define NUM_ETH_INTERFACES 2
+-#endif // CONFIG_SOC_AU1200
++#endif /* CONFIG_SOC_AU1200 */
+
+ #define AU1000_LAST_INTC0_INT 31
++#define AU1000_LAST_INTC1_INT 63
+ #define AU1000_MAX_INTR 63
+-
++#define INTX 0xFF /* not valid */
+
+ /* Programmable Counters 0 and 1 */
+ #define SYS_BASE 0xB1900000
+@@ -730,6 +1040,8 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define I2S_CONTROL_D (1<<1)
+ #define I2S_CONTROL_CE (1<<0)
+
++#ifndef CONFIG_SOC_AU1200
++
+ /* USB Host Controller */
+ #define USB_OHCI_LEN 0x00100000
+
+@@ -775,6 +1087,8 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define USBDEV_ENABLE (1<<1)
+ #define USBDEV_CE (1<<0)
+
++#endif /* !CONFIG_SOC_AU1200 */
++
+ /* Ethernet Controllers */
+
+ /* 4 byte offsets from AU1000_ETH_BASE */
+@@ -1173,6 +1487,37 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define SYS_PF_PSC1_S1 (1 << 1)
+ #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
+
++/* Au1200 Only */
++#ifdef CONFIG_SOC_AU1200
++#define SYS_PINFUNC_DMA (1<<31)
++#define SYS_PINFUNC_S0A (1<<30)
++#define SYS_PINFUNC_S1A (1<<29)
++#define SYS_PINFUNC_LP0 (1<<28)
++#define SYS_PINFUNC_LP1 (1<<27)
++#define SYS_PINFUNC_LD16 (1<<26)
++#define SYS_PINFUNC_LD8 (1<<25)
++#define SYS_PINFUNC_LD1 (1<<24)
++#define SYS_PINFUNC_LD0 (1<<23)
++#define SYS_PINFUNC_P1A (3<<21)
++#define SYS_PINFUNC_P1B (1<<20)
++#define SYS_PINFUNC_FS3 (1<<19)
++#define SYS_PINFUNC_P0A (3<<17)
++#define SYS_PINFUNC_CS (1<<16)
++#define SYS_PINFUNC_CIM (1<<15)
++#define SYS_PINFUNC_P1C (1<<14)
++#define SYS_PINFUNC_U1T (1<<12)
++#define SYS_PINFUNC_U1R (1<<11)
++#define SYS_PINFUNC_EX1 (1<<10)
++#define SYS_PINFUNC_EX0 (1<<9)
++#define SYS_PINFUNC_U0R (1<<8)
++#define SYS_PINFUNC_MC (1<<7)
++#define SYS_PINFUNC_S0B (1<<6)
++#define SYS_PINFUNC_S0C (1<<5)
++#define SYS_PINFUNC_P0B (1<<4)
++#define SYS_PINFUNC_U0T (1<<3)
++#define SYS_PINFUNC_S1B (1<<2)
++#endif
++
+ #define SYS_TRIOUTRD 0xB1900100
+ #define SYS_TRIOUTCLR 0xB1900100
+ #define SYS_OUTPUTRD 0xB1900108
+@@ -1239,6 +1584,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define SYS_CS_MI2_MASK (0x7<<SYS_CS_MI2_BIT)
+ #define SYS_CS_DI2 (1<<16)
+ #define SYS_CS_CI2 (1<<15)
++#ifdef CONFIG_SOC_AU1100
++ #define SYS_CS_ML_BIT 7
++ #define SYS_CS_ML_MASK (0x7<<SYS_CS_ML_BIT)
++ #define SYS_CS_DL (1<<6)
++ #define SYS_CS_CL (1<<5)
++#else
+ #define SYS_CS_MUH_BIT 12
+ #define SYS_CS_MUH_MASK (0x7<<SYS_CS_MUH_BIT)
+ #define SYS_CS_DUH (1<<11)
+@@ -1247,6 +1598,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define SYS_CS_MUD_MASK (0x7<<SYS_CS_MUD_BIT)
+ #define SYS_CS_DUD (1<<6)
+ #define SYS_CS_CUD (1<<5)
++#endif
+ #define SYS_CS_MIR_BIT 2
+ #define SYS_CS_MIR_MASK (0x7<<SYS_CS_MIR_BIT)
+ #define SYS_CS_DIR (1<<1)
+@@ -1300,7 +1652,6 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ #define SD1_XMIT_FIFO 0xB0680000
+ #define SD1_RECV_FIFO 0xB0680004
+
+-
+ #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
+ /* Au1500 PCI Controller */
+ #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
+@@ -1363,36 +1714,77 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
+ _ctl_; })
+
+
+-#else /* Au1000 and Au1100 */
++#else /* Au1000 and Au1100 and Au1200 */
+
+ /* don't allow any legacy ports probing */
+-#define IOPORT_RESOURCE_START 0x10000000;
++#define IOPORT_RESOURCE_START 0x10000000
+ #define IOPORT_RESOURCE_END 0xffffffff
+ #define IOMEM_RESOURCE_START 0x10000000
+ #define IOMEM_RESOURCE_END 0xffffffff
+
+-#ifdef CONFIG_MIPS_PB1000
+-#define PCI_IO_START 0x10000000
+-#define PCI_IO_END 0x1000ffff
+-#define PCI_MEM_START 0x18000000
+-#define PCI_MEM_END 0x18ffffff
+-#define PCI_FIRST_DEVFN 0
+-#define PCI_LAST_DEVFN 1
+-#else
+-/* no PCI bus controller */
+ #define PCI_IO_START 0
+ #define PCI_IO_END 0
+ #define PCI_MEM_START 0
+-#define PCI_MEM_END 0
++#define PCI_MEM_END 0
+ #define PCI_FIRST_DEVFN 0
+ #define PCI_LAST_DEVFN 0
+-#endif
+
+ #endif
+
++#ifndef _LANGUAGE_ASSEMBLY
++typedef volatile struct
++{
++ /* 0x0000 */ u32 toytrim;
++ /* 0x0004 */ u32 toywrite;
++ /* 0x0008 */ u32 toymatch0;
++ /* 0x000C */ u32 toymatch1;
++ /* 0x0010 */ u32 toymatch2;
++ /* 0x0014 */ u32 cntrctrl;
++ /* 0x0018 */ u32 scratch0;
++ /* 0x001C */ u32 scratch1;
++ /* 0x0020 */ u32 freqctrl0;
++ /* 0x0024 */ u32 freqctrl1;
++ /* 0x0028 */ u32 clksrc;
++ /* 0x002C */ u32 pinfunc;
++ /* 0x0030 */ u32 reserved0;
++ /* 0x0034 */ u32 wakemsk;
++ /* 0x0038 */ u32 endian;
++ /* 0x003C */ u32 powerctrl;
++ /* 0x0040 */ u32 toyread;
++ /* 0x0044 */ u32 rtctrim;
++ /* 0x0048 */ u32 rtcwrite;
++ /* 0x004C */ u32 rtcmatch0;
++ /* 0x0050 */ u32 rtcmatch1;
++ /* 0x0054 */ u32 rtcmatch2;
++ /* 0x0058 */ u32 rtcread;
++ /* 0x005C */ u32 wakesrc;
++ /* 0x0060 */ u32 cpupll;
++ /* 0x0064 */ u32 auxpll;
++ /* 0x0068 */ u32 reserved1;
++ /* 0x006C */ u32 reserved2;
++ /* 0x0070 */ u32 reserved3;
++ /* 0x0074 */ u32 reserved4;
++ /* 0x0078 */ u32 slppwr;
++ /* 0x007C */ u32 sleep;
++ /* 0x0080 */ u32 reserved5[32];
++ /* 0x0100 */ u32 trioutrd;
++#define trioutclr trioutrd
++ /* 0x0104 */ u32 reserved6;
++ /* 0x0108 */ u32 outputrd;
++#define outputset outputrd
++ /* 0x010C */ u32 outputclr;
++ /* 0x0110 */ u32 pinstaterd;
++#define pininputen pinstaterd
++
++} AU1X00_SYS;
++
++static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE;
++
++#endif
+ /* Processor information base on prid.
+ * Copied from PowerPC.
+ */
++#ifndef _LANGUAGE_ASSEMBLY
+ struct cpu_spec {
+ /* CPU is matched via (PRID & prid_mask) == prid_value */
+ unsigned int prid_mask;
+@@ -1406,3 +1798,6 @@ struct cpu_spec {
+ extern struct cpu_spec cpu_specs[];
+ extern struct cpu_spec *cur_cpu_spec[];
+ #endif
++
++#endif
++
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-au1x00/au1xxx_dbdma.h linux_HEAD/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
+--- linux-2.6.12/include/asm-mips/mach-au1x00/au1xxx_dbdma.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-au1x00/au1xxx_dbdma.h 2005-03-01 15:00:58.000000000 +0100
+@@ -45,7 +45,7 @@
+ #define DDMA_GLOBAL_BASE 0xb4003000
+ #define DDMA_CHANNEL_BASE 0xb4002000
+
+-typedef struct dbdma_global {
++typedef volatile struct dbdma_global {
+ u32 ddma_config;
+ u32 ddma_intstat;
+ u32 ddma_throttle;
+@@ -62,7 +62,7 @@ typedef struct dbdma_global {
+
+ /* The structure of a DMA Channel.
+ */
+-typedef struct au1xxx_dma_channel {
++typedef volatile struct au1xxx_dma_channel {
+ u32 ddma_cfg; /* See below */
+ u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */
+ u32 ddma_statptr; /* word aligned pointer to status word */
+@@ -98,7 +98,7 @@ typedef struct au1xxx_dma_channel {
+ /* "Standard" DDMA Descriptor.
+ * Must be 32-byte aligned.
+ */
+-typedef struct au1xxx_ddma_desc {
++typedef volatile struct au1xxx_ddma_desc {
+ u32 dscr_cmd0; /* See below */
+ u32 dscr_cmd1; /* See below */
+ u32 dscr_source0; /* source phys address */
+@@ -107,6 +107,12 @@ typedef struct au1xxx_ddma_desc {
+ u32 dscr_dest1; /* See below */
+ u32 dscr_stat; /* completion status */
+ u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
++ /* First 32bytes are HW specific!!!
++ Lets have some SW data following.. make sure its 32bytes
++ */
++ u32 sw_status;
++ u32 sw_context;
++ u32 sw_reserved[6];
+ } au1x_ddma_desc_t;
+
+ #define DSCR_CMD0_V (1 << 31) /* Descriptor valid */
+@@ -125,8 +131,11 @@ typedef struct au1xxx_ddma_desc {
+ #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */
+ #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */
+
++#define SW_STATUS_INUSE (1<<0)
++
+ /* Command 0 device IDs.
+ */
++#ifdef CONFIG_SOC_AU1550
+ #define DSCR_CMD0_UART0_TX 0
+ #define DSCR_CMD0_UART0_RX 1
+ #define DSCR_CMD0_UART3_TX 2
+@@ -155,9 +164,45 @@ typedef struct au1xxx_ddma_desc {
+ #define DSCR_CMD0_MAC0_TX 25
+ #define DSCR_CMD0_MAC1_RX 26
+ #define DSCR_CMD0_MAC1_TX 27
++#endif /* CONFIG_SOC_AU1550 */
++
++#ifdef CONFIG_SOC_AU1200
++#define DSCR_CMD0_UART0_TX 0
++#define DSCR_CMD0_UART0_RX 1
++#define DSCR_CMD0_UART1_TX 2
++#define DSCR_CMD0_UART1_RX 3
++#define DSCR_CMD0_DMA_REQ0 4
++#define DSCR_CMD0_DMA_REQ1 5
++#define DSCR_CMD0_MAE_BE 6
++#define DSCR_CMD0_MAE_FE 7
++#define DSCR_CMD0_SDMS_TX0 8
++#define DSCR_CMD0_SDMS_RX0 9
++#define DSCR_CMD0_SDMS_TX1 10
++#define DSCR_CMD0_SDMS_RX1 11
++#define DSCR_CMD0_AES_TX 13
++#define DSCR_CMD0_AES_RX 12
++#define DSCR_CMD0_PSC0_TX 14
++#define DSCR_CMD0_PSC0_RX 15
++#define DSCR_CMD0_PSC1_TX 16
++#define DSCR_CMD0_PSC1_RX 17
++#define DSCR_CMD0_CIM_RXA 18
++#define DSCR_CMD0_CIM_RXB 19
++#define DSCR_CMD0_CIM_RXC 20
++#define DSCR_CMD0_MAE_BOTH 21
++#define DSCR_CMD0_LCD 22
++#define DSCR_CMD0_NAND_FLASH 23
++#define DSCR_CMD0_PSC0_SYNC 24
++#define DSCR_CMD0_PSC1_SYNC 25
++#define DSCR_CMD0_CIM_SYNC 26
++#endif /* CONFIG_SOC_AU1200 */
++
+ #define DSCR_CMD0_THROTTLE 30
+ #define DSCR_CMD0_ALWAYS 31
+ #define DSCR_NDEV_IDS 32
++/* THis macro is used to find/create custom device types */
++#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
++#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
++
+
+ #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25)
+ #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20)
+@@ -246,6 +291,43 @@ typedef struct au1xxx_ddma_desc {
+ */
+ #define NUM_DBDMA_CHANS 16
+
++/*
++ * Ddma API definitions
++ * FIXME: may not fit to this header file
++ */
++typedef struct dbdma_device_table {
++ u32 dev_id;
++ u32 dev_flags;
++ u32 dev_tsize;
++ u32 dev_devwidth;
++ u32 dev_physaddr; /* If FIFO */
++ u32 dev_intlevel;
++ u32 dev_intpolarity;
++} dbdev_tab_t;
++
++
++typedef struct dbdma_chan_config {
++ spinlock_t lock;
++
++ u32 chan_flags;
++ u32 chan_index;
++ dbdev_tab_t *chan_src;
++ dbdev_tab_t *chan_dest;
++ au1x_dma_chan_t *chan_ptr;
++ au1x_ddma_desc_t *chan_desc_base;
++ au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
++ void *chan_callparam;
++ void (*chan_callback)(int, void *, struct pt_regs *);
++} chan_tab_t;
++
++#define DEV_FLAGS_INUSE (1 << 0)
++#define DEV_FLAGS_ANYUSE (1 << 1)
++#define DEV_FLAGS_OUT (1 << 2)
++#define DEV_FLAGS_IN (1 << 3)
++#define DEV_FLAGS_BURSTABLE (1 << 4)
++#define DEV_FLAGS_SYNC (1 << 5)
++/* end Ddma API definitions */
++
+ /* External functions for drivers to use.
+ */
+ /* Use this to allocate a dbdma channel. The device ids are one of the
+@@ -258,18 +340,6 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u
+
+ #define DBDMA_MEM_CHAN DSCR_CMD0_ALWAYS
+
+-/* ACK! These should be in a board specific description file.
+-*/
+-#ifdef CONFIG_MIPS_PB1550
+-#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+-#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+-#endif
+-#ifdef CONFIG_MIPS_DB1550
+-#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+-#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+-#endif
+-
+-
+ /* Set the device width of a in/out fifo.
+ */
+ u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits);
+@@ -280,8 +350,8 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid,
+
+ /* Put buffers on source/destination descriptors.
+ */
+-u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes);
+-u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes);
++u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
++u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
+
+ /* Get a buffer from the destination descriptor.
+ */
+@@ -295,5 +365,25 @@ u32 au1xxx_get_dma_residue(u32 chanid);
+ void au1xxx_dbdma_chan_free(u32 chanid);
+ void au1xxx_dbdma_dump(u32 chanid);
+
++u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
++
++u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
++
++/*
++ Some compatibilty macros --
++ Needed to make changes to API without breaking existing drivers
++*/
++#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
++#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
++
++#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
++#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
++
++/*
++ * Flags for the put_source/put_dest functions.
++ */
++#define DDMA_FLAGS_IE (1<<0)
++#define DDMA_FLAGS_NOIE (1<<1)
++
+ #endif /* _LANGUAGE_ASSEMBLY */
+ #endif /* _AU1000_DBDMA_H_ */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-au1x00/au1xxx_psc.h linux_HEAD/include/asm-mips/mach-au1x00/au1xxx_psc.h
+--- linux-2.6.12/include/asm-mips/mach-au1x00/au1xxx_psc.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-au1x00/au1xxx_psc.h 2005-04-14 16:40:18.000000000 +0200
+@@ -33,6 +33,8 @@
+ #ifndef _AU1000_PSC_H_
+ #define _AU1000_PSC_H_
+
++#include <linux/config.h>
++
+ /* The PSC base addresses. */
+ #ifdef CONFIG_SOC_AU1550
+ #define PSC0_BASE_ADDR 0xb1a00000
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-au1x00/ioremap.h linux_HEAD/include/asm-mips/mach-au1x00/ioremap.h
+--- linux-2.6.12/include/asm-mips/mach-au1x00/ioremap.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/include/asm-mips/mach-au1x00/ioremap.h 2005-06-30 12:48:46.000000000 +0200
+@@ -0,0 +1,29 @@
++/*
++ * include/asm-mips/mach-au1x00/ioremap.h
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++#ifndef __ASM_MACH_AU1X00_IOREMAP_H
++#define __ASM_MACH_AU1X00_IOREMAP_H
++
++#include <linux/types.h>
++
++#ifndef CONFIG_64BIT_PHYS_ADDR
++static inline phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
++{
++ return phys_addr;
++}
++#endif
++
++/*
++ * Allow physical addresses to be fixed up to help 36-bit peripherals.
++ */
++static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
++{
++ return __fixup_bigphys_addr(phys_addr, size);
++}
++
++#endif /* __ASM_MACH_AU1X00_IOREMAP_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-db1x00/db1200.h linux_HEAD/include/asm-mips/mach-db1x00/db1200.h
+--- linux-2.6.12/include/asm-mips/mach-db1x00/db1200.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/include/asm-mips/mach-db1x00/db1200.h 2005-04-14 16:40:18.000000000 +0200
+@@ -0,0 +1,214 @@
++/*
++ * AMD Alchemy DB1200 Referrence Board
++ * Board Registers defines.
++ *
++ * ########################################################################
++ *
++ * This program is free software; you can distribute it and/or modify it
++ * under the terms of the GNU General Public License (Version 2) as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
++ *
++ * ########################################################################
++ *
++ *
++ */
++#ifndef __ASM_DB1200_H
++#define __ASM_DB1200_H
++
++#include <linux/types.h>
++
++// This is defined in au1000.h with bogus value
++#undef AU1X00_EXTERNAL_INT
++
++#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
++#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
++#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
++#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
++
++/* SPI and SMB are muxed on the Pb1200 board.
++ Refer to board documentation.
++ */
++#define SPI_PSC_BASE PSC0_BASE_ADDR
++#define SMBUS_PSC_BASE PSC0_BASE_ADDR
++/* AC97 and I2S are muxed on the Pb1200 board.
++ Refer to board documentation.
++ */
++#define AC97_PSC_BASE PSC1_BASE_ADDR
++#define I2S_PSC_BASE PSC1_BASE_ADDR
++
++#define BCSR_KSEG1_ADDR 0xB9800000
++
++typedef volatile struct
++{
++ /*00*/ u16 whoami;
++ u16 reserved0;
++ /*04*/ u16 status;
++ u16 reserved1;
++ /*08*/ u16 switches;
++ u16 reserved2;
++ /*0C*/ u16 resets;
++ u16 reserved3;
++
++ /*10*/ u16 pcmcia;
++ u16 reserved4;
++ /*14*/ u16 board;
++ u16 reserved5;
++ /*18*/ u16 disk_leds;
++ u16 reserved6;
++ /*1C*/ u16 system;
++ u16 reserved7;
++
++ /*20*/ u16 intclr;
++ u16 reserved8;
++ /*24*/ u16 intset;
++ u16 reserved9;
++ /*28*/ u16 intclr_mask;
++ u16 reserved10;
++ /*2C*/ u16 intset_mask;
++ u16 reserved11;
++
++ /*30*/ u16 sig_status;
++ u16 reserved12;
++ /*34*/ u16 int_status;
++ u16 reserved13;
++ /*38*/ u16 reserved14;
++ u16 reserved15;
++ /*3C*/ u16 reserved16;
++ u16 reserved17;
++
++} BCSR;
++
++static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
++
++/*
++ * Register bit definitions for the BCSRs
++ */
++#define BCSR_WHOAMI_DCID 0x000F
++#define BCSR_WHOAMI_CPLD 0x00F0
++#define BCSR_WHOAMI_BOARD 0x0F00
++
++#define BCSR_STATUS_PCMCIA0VS 0x0003
++#define BCSR_STATUS_PCMCIA1VS 0x000C
++#define BCSR_STATUS_SWAPBOOT 0x0040
++#define BCSR_STATUS_FLASHBUSY 0x0100
++#define BCSR_STATUS_IDECBLID 0x0200
++#define BCSR_STATUS_SD0WP 0x0400
++#define BCSR_STATUS_U0RXD 0x1000
++#define BCSR_STATUS_U1RXD 0x2000
++
++#define BCSR_SWITCHES_OCTAL 0x00FF
++#define BCSR_SWITCHES_DIP_1 0x0080
++#define BCSR_SWITCHES_DIP_2 0x0040
++#define BCSR_SWITCHES_DIP_3 0x0020
++#define BCSR_SWITCHES_DIP_4 0x0010
++#define BCSR_SWITCHES_DIP_5 0x0008
++#define BCSR_SWITCHES_DIP_6 0x0004
++#define BCSR_SWITCHES_DIP_7 0x0002
++#define BCSR_SWITCHES_DIP_8 0x0001
++#define BCSR_SWITCHES_ROTARY 0x0F00
++
++#define BCSR_RESETS_ETH 0x0001
++#define BCSR_RESETS_CAMERA 0x0002
++#define BCSR_RESETS_DC 0x0004
++#define BCSR_RESETS_IDE 0x0008
++#define BCSR_RESETS_TV 0x0010
++/* not resets but in the same register */
++#define BCSR_RESETS_PWMR1mUX 0x0800
++#define BCSR_RESETS_PCS0MUX 0x1000
++#define BCSR_RESETS_PCS1MUX 0x2000
++#define BCSR_RESETS_SPISEL 0x4000
++
++#define BCSR_PCMCIA_PC0VPP 0x0003
++#define BCSR_PCMCIA_PC0VCC 0x000C
++#define BCSR_PCMCIA_PC0DRVEN 0x0010
++#define BCSR_PCMCIA_PC0RST 0x0080
++#define BCSR_PCMCIA_PC1VPP 0x0300
++#define BCSR_PCMCIA_PC1VCC 0x0C00
++#define BCSR_PCMCIA_PC1DRVEN 0x1000
++#define BCSR_PCMCIA_PC1RST 0x8000
++
++#define BCSR_BOARD_LCDVEE 0x0001
++#define BCSR_BOARD_LCDVDD 0x0002
++#define BCSR_BOARD_LCDBL 0x0004
++#define BCSR_BOARD_CAMSNAP 0x0010
++#define BCSR_BOARD_CAMPWR 0x0020
++#define BCSR_BOARD_SD0PWR 0x0040
++
++#define BCSR_LEDS_DECIMALS 0x0003
++#define BCSR_LEDS_LED0 0x0100
++#define BCSR_LEDS_LED1 0x0200
++#define BCSR_LEDS_LED2 0x0400
++#define BCSR_LEDS_LED3 0x0800
++
++#define BCSR_SYSTEM_POWEROFF 0x4000
++#define BCSR_SYSTEM_RESET 0x8000
++
++/* Bit positions for the different interrupt sources */
++#define BCSR_INT_IDE 0x0001
++#define BCSR_INT_ETH 0x0002
++#define BCSR_INT_PC0 0x0004
++#define BCSR_INT_PC0STSCHG 0x0008
++#define BCSR_INT_PC1 0x0010
++#define BCSR_INT_PC1STSCHG 0x0020
++#define BCSR_INT_DC 0x0040
++#define BCSR_INT_FLASHBUSY 0x0080
++#define BCSR_INT_PC0INSERT 0x0100
++#define BCSR_INT_PC0EJECT 0x0200
++#define BCSR_INT_PC1INSERT 0x0400
++#define BCSR_INT_PC1EJECT 0x0800
++#define BCSR_INT_SD0INSERT 0x1000
++#define BCSR_INT_SD0EJECT 0x2000
++
++#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
++#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
++
++#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
++#define AU1XXX_ATA_PHYS_LEN (0x100)
++#define AU1XXX_ATA_REG_OFFSET (5)
++#define AU1XXX_ATA_INT DB1200_IDE_INT
++#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
++#define AU1XXX_ATA_RQSIZE 128
++
++#define NAND_PHYS_ADDR 0x20000000
++
++/*
++ * External Interrupts for Pb1200 as of 8/6/2004.
++ * Bit positions in the CPLD registers can be calculated by taking
++ * the interrupt define and subtracting the DB1200_INT_BEGIN value.
++ * *example: IDE bis pos is = 64 - 64
++ ETH bit pos is = 65 - 64
++ */
++#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
++#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
++#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
++#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
++#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
++#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
++#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
++#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
++#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
++#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
++#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
++#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
++#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
++#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
++#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
++
++#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
++
++/* For drivers/pcmcia/au1000_db1x00.c */
++#define BOARD_PC0_INT DB1200_PC0_INT
++#define BOARD_PC1_INT DB1200_PC1_INT
++#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
++
++#endif /* __ASM_DB1200_H */
++
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-dec/mc146818rtc.h linux_HEAD/include/asm-mips/mach-dec/mc146818rtc.h
+--- linux-2.6.12/include/asm-mips/mach-dec/mc146818rtc.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-dec/mc146818rtc.h 2005-07-03 16:44:38.000000000 +0200
+@@ -3,7 +3,7 @@
+ *
+ * Copyright (C) 1998, 2001 by Ralf Baechle
+ * Copyright (C) 1998 by Harald Koerfgen
+- * Copyright (C) 2002 Maciej W. Rozycki
++ * Copyright (C) 2002, 2005 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+@@ -14,23 +14,18 @@
+ #define __ASM_MIPS_DEC_RTC_DEC_H
+
+ #include <linux/types.h>
+-
+ #include <asm/addrspace.h>
++#include <asm/dec/system.h>
+
+ extern volatile u8 *dec_rtc_base;
+-extern unsigned long dec_kn_slot_size;
+
+-#define RTC_PORT(x) CPHYSADDR(dec_rtc_base)
++#define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base)
+ #define RTC_IO_EXTENT dec_kn_slot_size
+ #define RTC_IOMAPPED 0
+ #undef RTC_IRQ
+
+ #define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */
+
+-#include <linux/mc146818rtc.h>
+-#include <linux/module.h>
+-#include <linux/types.h>
+-
+ static inline unsigned char CMOS_READ(unsigned long addr)
+ {
+ return dec_rtc_base[addr * 4];
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-generic/ide.h linux_HEAD/include/asm-mips/mach-generic/ide.h
+--- linux-2.6.12/include/asm-mips/mach-generic/ide.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-generic/ide.h 2005-04-20 16:48:09.000000000 +0200
+@@ -18,6 +18,7 @@
+ #include <linux/config.h>
+ #include <linux/pci.h>
+ #include <linux/stddef.h>
++#include <asm/processor.h>
+
+ #ifndef MAX_HWIFS
+ # ifdef CONFIG_BLK_DEV_IDEPCI
+@@ -104,15 +105,71 @@ static __inline__ unsigned long ide_defa
+
+ /* MIPS port and memory-mapped I/O string operations. */
+
+-#define __ide_insw insw
+-#define __ide_insl insl
+-#define __ide_outsw outsw
+-#define __ide_outsl outsl
+-
+-#define __ide_mm_insw readsw
+-#define __ide_mm_insl readsl
+-#define __ide_mm_outsw writesw
+-#define __ide_mm_outsl writesl
++static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size)
++{
++ if (cpu_has_dc_aliases) {
++ unsigned long end = addr + size;
++ for (; addr < end; addr += PAGE_SIZE)
++ flush_dcache_page(virt_to_page(addr));
++ }
++}
++
++static inline void __ide_insw(unsigned long port, void *addr,
++ unsigned int count)
++{
++ insw(port, addr, count);
++ __ide_flush_dcache_range((unsigned long)addr, count * 2);
++}
++
++static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
++{
++ insl(port, addr, count);
++ __ide_flush_dcache_range((unsigned long)addr, count * 4);
++}
++
++static inline void __ide_outsw(unsigned long port, const void *addr,
++ unsigned long count)
++{
++ outsw(port, addr, count);
++ __ide_flush_dcache_range((unsigned long)addr, count * 2);
++}
++
++static inline void __ide_outsl(unsigned long port, const void *addr,
++ unsigned long count)
++{
++ outsl(port, addr, count);
++ __ide_flush_dcache_range((unsigned long)addr, count * 4);
++}
++
++static inline void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
++{
++ readsw(port, addr, count);
++ __ide_flush_dcache_range((unsigned long)addr, count * 2);
++}
++
++static inline void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
++{
++ readsl(port, addr, count);
++ __ide_flush_dcache_range((unsigned long)addr, count * 4);
++}
++
++static inline void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
++{
++ writesw(port, addr, count);
++ __ide_flush_dcache_range((unsigned long)addr, count * 2);
++}
++
++static inline void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
++{
++ writesl(port, addr, count);
++ __ide_flush_dcache_range((unsigned long)addr, count * 4);
++}
++
++/* ide_insw calls insw, not __ide_insw. Why? */
++#undef insw
++#undef insl
++#define insw(port, addr, count) __ide_insw(port, addr, count)
++#define insl(port, addr, count) __ide_insl(port, addr, count)
+
+ #endif /* __KERNEL__ */
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-generic/ioremap.h linux_HEAD/include/asm-mips/mach-generic/ioremap.h
+--- linux-2.6.12/include/asm-mips/mach-generic/ioremap.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/include/asm-mips/mach-generic/ioremap.h 2005-06-30 12:48:48.000000000 +0200
+@@ -0,0 +1,23 @@
++/*
++ * include/asm-mips/mach-generic/ioremap.h
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++#ifndef __ASM_MACH_GENERIC_IOREMAP_H
++#define __ASM_MACH_GENERIC_IOREMAP_H
++
++#include <linux/types.h>
++
++/*
++ * Allow physical addresses to be fixed up to help peripherals located
++ * outside the low 32-bit range -- generic pass-through version.
++ */
++static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
++{
++ return phys_addr;
++}
++
++#endif /* __ASM_MACH_GENERIC_IOREMAP_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-ip22/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-ip22/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-ip22/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-ip22/cpu-feature-overrides.h 2005-07-01 12:10:28.000000000 +0200
+@@ -23,6 +23,8 @@
+ #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
+ #define cpu_has_ic_fills_f_dc 0
+
++#define cpu_has_dsp 0
++
+ #define cpu_has_nofpuex 0
+ #define cpu_has_64bits 1
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-ip27/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-ip27/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-ip27/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-ip27/cpu-feature-overrides.h 2005-07-01 12:10:28.000000000 +0200
+@@ -25,6 +25,7 @@
+ #define cpu_has_vtag_icache 0
+ #define cpu_has_dc_aliases 0
+ #define cpu_has_ic_fills_f_dc 0
++#define cpu_has_dsp 0
+ #define cpu_icache_snoops_remote_store 1
+
+ #define cpu_has_nofpuex 0
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-ip27/mmzone.h linux_HEAD/include/asm-mips/mach-ip27/mmzone.h
+--- linux-2.6.12/include/asm-mips/mach-ip27/mmzone.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-ip27/mmzone.h 2005-06-18 17:49:34.000000000 +0200
+@@ -10,7 +10,6 @@
+ #define LEVELS_PER_SLICE 128
+
+ struct slice_data {
+- unsigned long irq_alloc_mask[2];
+ unsigned long irq_enable_mask[2];
+ int level_to_irq[LEVELS_PER_SLICE];
+ };
+@@ -20,6 +19,7 @@ struct hub_data {
+ DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW);
+ cpumask_t h_cpus;
+ unsigned long slice_map;
++ unsigned long irq_alloc_mask[2];
+ struct slice_data slice[2];
+ };
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-ip27/spaces.h linux_HEAD/include/asm-mips/mach-ip27/spaces.h
+--- linux-2.6.12/include/asm-mips/mach-ip27/spaces.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-ip27/spaces.h 2005-02-21 22:17:46.000000000 +0100
+@@ -20,6 +20,7 @@
+ #define IO_BASE 0x9200000000000000
+ #define MSPEC_BASE 0x9400000000000000
+ #define UNCAC_BASE 0x9600000000000000
++#define MAP_BASE 0xc000000000000000
+
+ #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
+ #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-ip32/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-ip32/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-ip32/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-ip32/cpu-feature-overrides.h 2005-07-01 12:10:28.000000000 +0200
+@@ -37,5 +37,6 @@
+ #define cpu_has_ejtag 0
+ #define cpu_has_vtag_icache 0
+ #define cpu_has_ic_fills_f_dc 0
++#define cpu_has_dsp 0
+
+ #endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-ja/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-ja/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-ja/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-ja/cpu-feature-overrides.h 2005-07-01 12:10:28.000000000 +0200
+@@ -25,6 +25,7 @@
+ #define cpu_has_vtag_icache 0
+ #define cpu_has_dc_aliases 0
+ #define cpu_has_ic_fills_f_dc 0
++#define cpu_has_dsp 0
+ #define cpu_icache_snoops_remote_store 0
+
+ #define cpu_has_nofpuex 0
+@@ -36,10 +37,4 @@
+ #define cpu_icache_line_size() 32
+ #define cpu_scache_line_size() 32
+
+-/*
+- * On the RM9000 we need to ensure that I-cache lines being fetches only
+- * contain valid instructions are funny things will happen.
+- */
+-#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
+-
+ #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-mips/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-mips/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-mips/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-mips/cpu-feature-overrides.h 2005-07-07 11:23:06.000000000 +0200
+@@ -39,7 +39,7 @@
+ /* #define cpu_has_subset_pcaches ? */
+ #endif
+
+-#ifdef CONFIG_CPU_MIPS64
++#ifdef CONFIG_CPU_MIPS64_R1
+ #define cpu_has_tlb 1
+ #define cpu_has_4kex 1
+ #define cpu_has_4ktlb 1
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h 2005-07-01 12:10:28.000000000 +0200
+@@ -28,6 +28,7 @@
+ #define cpu_has_vtag_icache 0
+ #define cpu_has_dc_aliases 0
+ #define cpu_has_ic_fills_f_dc 0
++#define cpu_has_dsp 0
+ #define cpu_icache_snoops_remote_store 0
+
+ #define cpu_has_nofpuex 0
+@@ -39,10 +40,4 @@
+ #define cpu_icache_line_size() 32
+ #define cpu_scache_line_size() 32
+
+-/*
+- * On the RM9000 we need to ensure that I-cache lines being fetches only
+- * contain valid instructions are funny things will happen.
+- */
+-#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
+-
+ #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-pb1x00/pb1200.h linux_HEAD/include/asm-mips/mach-pb1x00/pb1200.h
+--- linux-2.6.12/include/asm-mips/mach-pb1x00/pb1200.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/include/asm-mips/mach-pb1x00/pb1200.h 2005-04-14 16:40:18.000000000 +0200
+@@ -0,0 +1,244 @@
++/*
++ * AMD Alchemy PB1200 Referrence Board
++ * Board Registers defines.
++ *
++ * ########################################################################
++ *
++ * This program is free software; you can distribute it and/or modify it
++ * under the terms of the GNU General Public License (Version 2) as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
++ *
++ * ########################################################################
++ *
++ *
++ */
++#ifndef __ASM_PB1200_H
++#define __ASM_PB1200_H
++
++#include <linux/types.h>
++
++// This is defined in au1000.h with bogus value
++#undef AU1X00_EXTERNAL_INT
++
++#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
++#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
++#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
++#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
++
++/* SPI and SMB are muxed on the Pb1200 board.
++ Refer to board documentation.
++ */
++#define SPI_PSC_BASE PSC0_BASE_ADDR
++#define SMBUS_PSC_BASE PSC0_BASE_ADDR
++/* AC97 and I2S are muxed on the Pb1200 board.
++ Refer to board documentation.
++ */
++#define AC97_PSC_BASE PSC1_BASE_ADDR
++#define I2S_PSC_BASE PSC1_BASE_ADDR
++
++#define BCSR_KSEG1_ADDR 0xAD800000
++
++typedef volatile struct
++{
++ /*00*/ u16 whoami;
++ u16 reserved0;
++ /*04*/ u16 status;
++ u16 reserved1;
++ /*08*/ u16 switches;
++ u16 reserved2;
++ /*0C*/ u16 resets;
++ u16 reserved3;
++
++ /*10*/ u16 pcmcia;
++ u16 reserved4;
++ /*14*/ u16 board;
++ u16 reserved5;
++ /*18*/ u16 disk_leds;
++ u16 reserved6;
++ /*1C*/ u16 system;
++ u16 reserved7;
++
++ /*20*/ u16 intclr;
++ u16 reserved8;
++ /*24*/ u16 intset;
++ u16 reserved9;
++ /*28*/ u16 intclr_mask;
++ u16 reserved10;
++ /*2C*/ u16 intset_mask;
++ u16 reserved11;
++
++ /*30*/ u16 sig_status;
++ u16 reserved12;
++ /*34*/ u16 int_status;
++ u16 reserved13;
++ /*38*/ u16 reserved14;
++ u16 reserved15;
++ /*3C*/ u16 reserved16;
++ u16 reserved17;
++
++} BCSR;
++
++static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
++
++/*
++ * Register bit definitions for the BCSRs
++ */
++#define BCSR_WHOAMI_DCID 0x000F
++#define BCSR_WHOAMI_CPLD 0x00F0
++#define BCSR_WHOAMI_BOARD 0x0F00
++
++#define BCSR_STATUS_PCMCIA0VS 0x0003
++#define BCSR_STATUS_PCMCIA1VS 0x000C
++#define BCSR_STATUS_SWAPBOOT 0x0040
++#define BCSR_STATUS_FLASHBUSY 0x0100
++#define BCSR_STATUS_IDECBLID 0x0200
++#define BCSR_STATUS_SD0WP 0x0400
++#define BCSR_STATUS_SD1WP 0x0800
++#define BCSR_STATUS_U0RXD 0x1000
++#define BCSR_STATUS_U1RXD 0x2000
++
++#define BCSR_SWITCHES_OCTAL 0x00FF
++#define BCSR_SWITCHES_DIP_1 0x0080
++#define BCSR_SWITCHES_DIP_2 0x0040
++#define BCSR_SWITCHES_DIP_3 0x0020
++#define BCSR_SWITCHES_DIP_4 0x0010
++#define BCSR_SWITCHES_DIP_5 0x0008
++#define BCSR_SWITCHES_DIP_6 0x0004
++#define BCSR_SWITCHES_DIP_7 0x0002
++#define BCSR_SWITCHES_DIP_8 0x0001
++#define BCSR_SWITCHES_ROTARY 0x0F00
++
++#define BCSR_RESETS_ETH 0x0001
++#define BCSR_RESETS_CAMERA 0x0002
++#define BCSR_RESETS_DC 0x0004
++#define BCSR_RESETS_IDE 0x0008
++/* not resets but in the same register */
++#define BCSR_RESETS_WSCFSM 0x0800
++#define BCSR_RESETS_PCS0MUX 0x1000
++#define BCSR_RESETS_PCS1MUX 0x2000
++#define BCSR_RESETS_SPISEL 0x4000
++#define BCSR_RESETS_SD1MUX 0x8000
++
++#define BCSR_PCMCIA_PC0VPP 0x0003
++#define BCSR_PCMCIA_PC0VCC 0x000C
++#define BCSR_PCMCIA_PC0DRVEN 0x0010
++#define BCSR_PCMCIA_PC0RST 0x0080
++#define BCSR_PCMCIA_PC1VPP 0x0300
++#define BCSR_PCMCIA_PC1VCC 0x0C00
++#define BCSR_PCMCIA_PC1DRVEN 0x1000
++#define BCSR_PCMCIA_PC1RST 0x8000
++
++#define BCSR_BOARD_LCDVEE 0x0001
++#define BCSR_BOARD_LCDVDD 0x0002
++#define BCSR_BOARD_LCDBL 0x0004
++#define BCSR_BOARD_CAMSNAP 0x0010
++#define BCSR_BOARD_CAMPWR 0x0020
++#define BCSR_BOARD_SD0PWR 0x0040
++#define BCSR_BOARD_SD1PWR 0x0080
++
++#define BCSR_LEDS_DECIMALS 0x00FF
++#define BCSR_LEDS_LED0 0x0100
++#define BCSR_LEDS_LED1 0x0200
++#define BCSR_LEDS_LED2 0x0400
++#define BCSR_LEDS_LED3 0x0800
++
++#define BCSR_SYSTEM_VDDI 0x001F
++#define BCSR_SYSTEM_POWEROFF 0x4000
++#define BCSR_SYSTEM_RESET 0x8000
++
++/* Bit positions for the different interrupt sources */
++#define BCSR_INT_IDE 0x0001
++#define BCSR_INT_ETH 0x0002
++#define BCSR_INT_PC0 0x0004
++#define BCSR_INT_PC0STSCHG 0x0008
++#define BCSR_INT_PC1 0x0010
++#define BCSR_INT_PC1STSCHG 0x0020
++#define BCSR_INT_DC 0x0040
++#define BCSR_INT_FLASHBUSY 0x0080
++#define BCSR_INT_PC0INSERT 0x0100
++#define BCSR_INT_PC0EJECT 0x0200
++#define BCSR_INT_PC1INSERT 0x0400
++#define BCSR_INT_PC1EJECT 0x0800
++#define BCSR_INT_SD0INSERT 0x1000
++#define BCSR_INT_SD0EJECT 0x2000
++#define BCSR_INT_SD1INSERT 0x4000
++#define BCSR_INT_SD1EJECT 0x8000
++
++#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
++#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
++
++#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
++#define AU1XXX_ATA_PHYS_LEN (0x100)
++#define AU1XXX_ATA_REG_OFFSET (5)
++#define AU1XXX_ATA_INT PB1200_IDE_INT
++#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
++#define AU1XXX_ATA_RQSIZE 128
++
++#define NAND_PHYS_ADDR 0x1C000000
++
++/* Timing values as described in databook, * ns value stripped of
++ * lower 2 bits.
++ * These defines are here rather than an SOC1200 generic file because
++ * the parts chosen on another board may be different and may require
++ * different timings.
++ */
++#define NAND_T_H (18 >> 2)
++#define NAND_T_PUL (30 >> 2)
++#define NAND_T_SU (30 >> 2)
++#define NAND_T_WH (30 >> 2)
++
++/* Bitfield shift amounts */
++#define NAND_T_H_SHIFT 0
++#define NAND_T_PUL_SHIFT 4
++#define NAND_T_SU_SHIFT 8
++#define NAND_T_WH_SHIFT 12
++
++#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
++ ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
++ ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
++ ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
++
++
++/*
++ * External Interrupts for Pb1200 as of 8/6/2004.
++ * Bit positions in the CPLD registers can be calculated by taking
++ * the interrupt define and subtracting the PB1200_INT_BEGIN value.
++ * *example: IDE bis pos is = 64 - 64
++ ETH bit pos is = 65 - 64
++ */
++#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
++#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
++#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
++#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
++#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
++#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
++#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
++#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
++#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
++#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
++#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
++#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
++#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
++#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
++#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
++#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
++#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
++
++#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
++
++/* For drivers/pcmcia/au1000_db1x00.c */
++#define BOARD_PC0_INT PB1200_PC0_INT
++#define BOARD_PC1_INT PB1200_PC1_INT
++#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
++
++#endif /* __ASM_PB1200_H */
++
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-rm200/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-rm200/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-rm200/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-rm200/cpu-feature-overrides.h 2005-07-01 12:10:28.000000000 +0200
+@@ -31,6 +31,7 @@
+ #define cpu_has_vtag_icache 0
+ #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
+ #define cpu_has_ic_fills_f_dc 0
++#define cpu_has_dsp 0
+ #define cpu_has_nofpuex 0
+ #define cpu_has_64bits 1
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-sibyte/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-sibyte/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-sibyte/cpu-feature-overrides.h 2005-07-01 12:10:28.000000000 +0200
+@@ -25,6 +25,7 @@
+ #define cpu_has_vtag_icache 1
+ #define cpu_has_dc_aliases 0
+ #define cpu_has_ic_fills_f_dc 0
++#define cpu_has_dsp 0
+ #define cpu_icache_snoops_remote_store 0
+
+ #define cpu_has_nofpuex 0
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mach-yosemite/cpu-feature-overrides.h linux_HEAD/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
+--- linux-2.6.12/include/asm-mips/mach-yosemite/cpu-feature-overrides.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mach-yosemite/cpu-feature-overrides.h 2005-07-01 12:10:28.000000000 +0200
+@@ -25,6 +25,7 @@
+ #define cpu_has_vtag_icache 0
+ #define cpu_has_dc_aliases 0
+ #define cpu_has_ic_fills_f_dc 0
++#define cpu_has_dsp 0
+ #define cpu_icache_snoops_remote_store 0
+
+ #define cpu_has_nofpuex 0
+@@ -36,10 +37,4 @@
+ #define cpu_icache_line_size() 32
+ #define cpu_scache_line_size() 32
+
+-/*
+- * On the RM9000 we need to ensure that I-cache lines being fetches only
+- * contain valid instructions are funny things will happen.
+- */
+-#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
+-
+ #endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mips-boards/generic.h linux_HEAD/include/asm-mips/mips-boards/generic.h
+--- linux-2.6.12/include/asm-mips/mips-boards/generic.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mips-boards/generic.h 2005-07-01 12:10:28.000000000 +0200
+@@ -79,4 +79,10 @@
+
+ extern unsigned int mips_revision_corid;
+
++#ifdef CONFIG_PCI
++extern void mips_pcibios_init(void);
++#else
++#define mips_pcibios_init() do { } while (0)
++#endif
++
+ #endif /* __ASM_MIPS_BOARDS_GENERIC_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mips-boards/msc01_pci.h linux_HEAD/include/asm-mips/mips-boards/msc01_pci.h
+--- linux-2.6.12/include/asm-mips/mips-boards/msc01_pci.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mips-boards/msc01_pci.h 2005-07-10 12:28:27.000000000 +0200
+@@ -1,8 +1,9 @@
+ /*
+ * PCI Register definitions for the MIPS System Controller.
+ *
+- * Carsten Langgaard, carstenl at mips.com
+- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
++ * Copyright (C) 2002, 2005 MIPS Technologies, Inc. All rights reserved.
++ * Authors: Carsten Langgaard <carstenl at mips.com>
++ * Maciej W. Rozycki <macro at mips.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+@@ -167,29 +168,29 @@
+ #define MSC01_PCI_CFGDATA_DATA_MSK 0xffffffff
+
+ /* The defines below are ONLY valid for a MEM bar! */
+-#define MSC01_PCI_BAR0_SIZE_SHF 4
+-#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0
+-#define MSC01_PCI_BAR0_P_SHF 3
+-#define MSC01_PCI_BAR0_P_MSK 0x00000008
+-#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK
+-#define MSC01_PCI_BAR0_D_SHF 1
+-#define MSC01_PCI_BAR0_D_MSK 0x00000006
+-#define MSC01_PCI_BAR0_T_SHF 0
+-#define MSC01_PCI_BAR0_T_MSK 0x00000001
+-#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK
+-
+-
+-#define MSC01_PCI_CFG_RA_SHF 17
+-#define MSC01_PCI_CFG_RA_MSK 0x00020000
+-#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK
+-#define MSC01_PCI_CFG_G_SHF 16
+-#define MSC01_PCI_CFG_G_MSK 0x00010000
+-#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK
+-#define MSC01_PCI_CFG_EN_SHF 15
+-#define MSC01_PCI_CFG_EN_MSK 0x00008000
+-#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK
+-#define MSC01_PCI_CFG_MAXRTRY_SHF 0
+-#define MSC01_PCI_CFG_MAXRTRY_MSK 0x000000ff
++#define MSC01_PCI_BAR0_SIZE_SHF 4
++#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0
++#define MSC01_PCI_BAR0_P_SHF 3
++#define MSC01_PCI_BAR0_P_MSK 0x00000008
++#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK
++#define MSC01_PCI_BAR0_D_SHF 1
++#define MSC01_PCI_BAR0_D_MSK 0x00000006
++#define MSC01_PCI_BAR0_T_SHF 0
++#define MSC01_PCI_BAR0_T_MSK 0x00000001
++#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK
++
++
++#define MSC01_PCI_CFG_RA_SHF 17
++#define MSC01_PCI_CFG_RA_MSK 0x00020000
++#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK
++#define MSC01_PCI_CFG_G_SHF 16
++#define MSC01_PCI_CFG_G_MSK 0x00010000
++#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK
++#define MSC01_PCI_CFG_EN_SHF 15
++#define MSC01_PCI_CFG_EN_MSK 0x00008000
++#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK
++#define MSC01_PCI_CFG_MAXRTRY_SHF 0
++#define MSC01_PCI_CFG_MAXRTRY_MSK 0x00000fff
+
+ #define MSC01_PCI_SWAP_IO_SHF 18
+ #define MSC01_PCI_SWAP_IO_MSK 0x000c0000
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mipsregs.h linux_HEAD/include/asm-mips/mipsregs.h
+--- linux-2.6.12/include/asm-mips/mipsregs.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mipsregs.h 2005-07-01 12:10:27.000000000 +0200
+@@ -8,7 +8,7 @@
+ * Modified for further R[236]000 support by Paul M. Antoine, 1996.
+ * Kevin D. Kissell, kevink at mips.com and Carsten Langgaard, carstenl at mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+- * Copyright (C) 2003 Maciej W. Rozycki
++ * Copyright (C) 2003, 2004 Maciej W. Rozycki
+ */
+ #ifndef _ASM_MIPSREGS_H
+ #define _ASM_MIPSREGS_H
+@@ -281,6 +281,11 @@
+ #define ST0_DL (_ULCAST_(1) << 24)
+
+ /*
++ * Enable the MIPS DSP ASE
++ */
++#define ST0_MX 0x01000000
++
++/*
+ * Bitfields in the TX39 family CP0 Configuration Register 3
+ */
+ #define TX39_CONF_ICS_SHIFT 19
+@@ -433,6 +438,14 @@
+ #define R5K_CONF_SE (_ULCAST_(1) << 12)
+ #define R5K_CONF_SS (_ULCAST_(3) << 20)
+
++/* Bits specific to the RM7000. */
++#define RM7K_CONF_SE (_ULCAST_(1) << 3)
++#define RM7K_CONF_TE (_ULCAST_(1) << 12)
++#define RM7K_CONF_CLK (_ULCAST_(1) << 16)
++#define RM7K_CONF_TC (_ULCAST_(1) << 17)
++#define RM7K_CONF_SI (_ULCAST_(3) << 20)
++#define RM7K_CONF_SC (_ULCAST_(1) << 31)
++
+ /* Bits specific to the R10000. */
+ #define R10K_CONF_DN (_ULCAST_(3) << 3)
+ #define R10K_CONF_CT (_ULCAST_(1) << 5)
+@@ -475,6 +488,52 @@
+ #define MIPS_CONF_M (_ULCAST_(1) << 31)
+
+ /*
++ * Bits in the MIPS32/64 PRA coprocessor 0 config registers 1 and above.
++ */
++#define MIPS_CONF1_FP (_ULCAST_(1) << 0)
++#define MIPS_CONF1_EP (_ULCAST_(1) << 1)
++#define MIPS_CONF1_CA (_ULCAST_(1) << 2)
++#define MIPS_CONF1_WR (_ULCAST_(1) << 3)
++#define MIPS_CONF1_PC (_ULCAST_(1) << 4)
++#define MIPS_CONF1_MD (_ULCAST_(1) << 5)
++#define MIPS_CONF1_C2 (_ULCAST_(1) << 6)
++#define MIPS_CONF1_DA (_ULCAST_(7) << 7)
++#define MIPS_CONF1_DL (_ULCAST_(7) << 10)
++#define MIPS_CONF1_DS (_ULCAST_(7) << 13)
++#define MIPS_CONF1_IA (_ULCAST_(7) << 16)
++#define MIPS_CONF1_IL (_ULCAST_(7) << 19)
++#define MIPS_CONF1_IS (_ULCAST_(7) << 22)
++#define MIPS_CONF1_TLBS (_ULCAST_(63)<< 25)
++
++#define MIPS_CONF2_SA (_ULCAST_(15)<< 0)
++#define MIPS_CONF2_SL (_ULCAST_(15)<< 4)
++#define MIPS_CONF2_SS (_ULCAST_(15)<< 8)
++#define MIPS_CONF2_SU (_ULCAST_(15)<< 12)
++#define MIPS_CONF2_TA (_ULCAST_(15)<< 16)
++#define MIPS_CONF2_TL (_ULCAST_(15)<< 20)
++#define MIPS_CONF2_TS (_ULCAST_(15)<< 24)
++#define MIPS_CONF2_TU (_ULCAST_(7) << 28)
++
++#define MIPS_CONF3_TL (_ULCAST_(1) << 0)
++#define MIPS_CONF3_SM (_ULCAST_(1) << 1)
++#define MIPS_CONF3_SP (_ULCAST_(1) << 4)
++#define MIPS_CONF3_VINT (_ULCAST_(1) << 5)
++#define MIPS_CONF3_VEIC (_ULCAST_(1) << 6)
++#define MIPS_CONF3_LPA (_ULCAST_(1) << 7)
++#define MIPS_CONF3_DSP (_ULCAST_(1) << 10)
++
++/*
++ * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register.
++ */
++#define MIPS_FPIR_S (_ULCAST_(1) << 16)
++#define MIPS_FPIR_D (_ULCAST_(1) << 17)
++#define MIPS_FPIR_PS (_ULCAST_(1) << 18)
++#define MIPS_FPIR_3D (_ULCAST_(1) << 19)
++#define MIPS_FPIR_W (_ULCAST_(1) << 20)
++#define MIPS_FPIR_L (_ULCAST_(1) << 21)
++#define MIPS_FPIR_F64 (_ULCAST_(1) << 22)
++
++/*
+ * R10000 performance counter definitions.
+ *
+ * FIXME: The R10000 performance counter opens a nice way to implement CPU
+@@ -790,10 +849,18 @@ do { \
+ #define read_c0_config1() __read_32bit_c0_register($16, 1)
+ #define read_c0_config2() __read_32bit_c0_register($16, 2)
+ #define read_c0_config3() __read_32bit_c0_register($16, 3)
++#define read_c0_config4() __read_32bit_c0_register($16, 4)
++#define read_c0_config5() __read_32bit_c0_register($16, 5)
++#define read_c0_config6() __read_32bit_c0_register($16, 6)
++#define read_c0_config7() __read_32bit_c0_register($16, 7)
+ #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
+ #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
+ #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
+ #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
++#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
++#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
++#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
++#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
+
+ /*
+ * The WatchLo register. There may be upto 8 of them.
+@@ -930,6 +997,284 @@ do { \
+ : "=r" (__res)); \
+ __res;})
+
++#define rddsp(mask) \
++({ \
++ unsigned int __res; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # rddsp $1, %x1 \n" \
++ " .word 0x7c000cb8 | (%x1 << 16) \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__res) \
++ : "i" (mask)); \
++ __res; \
++})
++
++#define wrdsp(val, mask) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # wrdsp $1, %x1 \n" \
++ " .word 0x7c2004f8 | (%x1 << 15) \n" \
++ " .set pop \n" \
++ : \
++ : "r" (val), "i" (mask)); \
++} while (0)
++
++#if 0 /* Need DSP ASE capable assembler ... */
++#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;})
++#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;})
++#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;})
++#define mflo3() ({ long mflo3; __asm__("mflo %0, $ac3" : "=r" (mflo3)); mflo3;})
++
++#define mfhi0() ({ long mfhi0; __asm__("mfhi %0, $ac0" : "=r" (mfhi0)); mfhi0;})
++#define mfhi1() ({ long mfhi1; __asm__("mfhi %0, $ac1" : "=r" (mfhi1)); mfhi1;})
++#define mfhi2() ({ long mfhi2; __asm__("mfhi %0, $ac2" : "=r" (mfhi2)); mfhi2;})
++#define mfhi3() ({ long mfhi3; __asm__("mfhi %0, $ac3" : "=r" (mfhi3)); mfhi3;})
++
++#define mtlo0(x) __asm__("mtlo %0, $ac0" ::"r" (x))
++#define mtlo1(x) __asm__("mtlo %0, $ac1" ::"r" (x))
++#define mtlo2(x) __asm__("mtlo %0, $ac2" ::"r" (x))
++#define mtlo3(x) __asm__("mtlo %0, $ac3" ::"r" (x))
++
++#define mthi0(x) __asm__("mthi %0, $ac0" ::"r" (x))
++#define mthi1(x) __asm__("mthi %0, $ac1" ::"r" (x))
++#define mthi2(x) __asm__("mthi %0, $ac2" ::"r" (x))
++#define mthi3(x) __asm__("mthi %0, $ac3" ::"r" (x))
++
++#else
++
++#define mfhi0() \
++({ \
++ unsigned long __treg; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # mfhi %0, $ac0 \n" \
++ " .word 0x00000810 \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__treg)); \
++ __treg; \
++})
++
++#define mfhi1() \
++({ \
++ unsigned long __treg; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # mfhi %0, $ac1 \n" \
++ " .word 0x00200810 \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__treg)); \
++ __treg; \
++})
++
++#define mfhi2() \
++({ \
++ unsigned long __treg; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # mfhi %0, $ac2 \n" \
++ " .word 0x00400810 \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__treg)); \
++ __treg; \
++})
++
++#define mfhi3() \
++({ \
++ unsigned long __treg; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # mfhi %0, $ac3 \n" \
++ " .word 0x00600810 \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__treg)); \
++ __treg; \
++})
++
++#define mflo0() \
++({ \
++ unsigned long __treg; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # mflo %0, $ac0 \n" \
++ " .word 0x00000812 \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__treg)); \
++ __treg; \
++})
++
++#define mflo1() \
++({ \
++ unsigned long __treg; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # mflo %0, $ac1 \n" \
++ " .word 0x00200812 \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__treg)); \
++ __treg; \
++})
++
++#define mflo2() \
++({ \
++ unsigned long __treg; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # mflo %0, $ac2 \n" \
++ " .word 0x00400812 \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__treg)); \
++ __treg; \
++})
++
++#define mflo3() \
++({ \
++ unsigned long __treg; \
++ \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " # mflo %0, $ac3 \n" \
++ " .word 0x00600812 \n" \
++ " move %0, $1 \n" \
++ " .set pop \n" \
++ : "=r" (__treg)); \
++ __treg; \
++})
++
++#define mthi0(x) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # mthi $1, $ac0 \n" \
++ " .word 0x00200011 \n" \
++ " .set pop \n" \
++ : \
++ : "r" (x)); \
++} while (0)
++
++#define mthi1(x) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # mthi $1, $ac1 \n" \
++ " .word 0x00200811 \n" \
++ " .set pop \n" \
++ : \
++ : "r" (x)); \
++} while (0)
++
++#define mthi2(x) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # mthi $1, $ac2 \n" \
++ " .word 0x00201011 \n" \
++ " .set pop \n" \
++ : \
++ : "r" (x)); \
++} while (0)
++
++#define mthi3(x) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # mthi $1, $ac3 \n" \
++ " .word 0x00201811 \n" \
++ " .set pop \n" \
++ : \
++ : "r" (x)); \
++} while (0)
++
++#define mtlo0(x) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # mtlo $1, $ac0 \n" \
++ " .word 0x00200013 \n" \
++ " .set pop \n" \
++ : \
++ : "r" (x)); \
++} while (0)
++
++#define mtlo1(x) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # mtlo $1, $ac1 \n" \
++ " .word 0x00200813 \n" \
++ " .set pop \n" \
++ : \
++ : "r" (x)); \
++} while (0)
++
++#define mtlo2(x) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # mtlo $1, $ac2 \n" \
++ " .word 0x00201013 \n" \
++ " .set pop \n" \
++ : \
++ : "r" (x)); \
++} while (0)
++
++#define mtlo3(x) \
++do { \
++ __asm__ __volatile__( \
++ " .set push \n" \
++ " .set noat \n" \
++ " move $1, %0 \n" \
++ " # mtlo $1, $ac3 \n" \
++ " .word 0x00201813 \n" \
++ " .set pop \n" \
++ : \
++ : "r" (x)); \
++} while (0)
++
++#endif
++
+ /*
+ * TLB operations.
+ *
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/mmu_context.h linux_HEAD/include/asm-mips/mmu_context.h
+--- linux-2.6.12/include/asm-mips/mmu_context.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/mmu_context.h 2005-07-08 12:04:09.000000000 +0200
+@@ -30,7 +30,7 @@ extern unsigned long pgd_current[];
+
+ #ifdef CONFIG_MIPS32
+ #define TLBMISS_HANDLER_SETUP() \
+- write_c0_context((unsigned long) smp_processor_id() << 23); \
++ write_c0_context((unsigned long) smp_processor_id() << 25); \
+ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
+ #endif
+ #if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
+@@ -40,7 +40,7 @@ extern unsigned long pgd_current[];
+ #endif
+ #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
+ #define TLBMISS_HANDLER_SETUP() \
+- write_c0_context((unsigned long) smp_processor_id() << 23); \
++ write_c0_context((unsigned long) smp_processor_id() << 26); \
+ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
+ #endif
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/module.h linux_HEAD/include/asm-mips/module.h
+--- linux-2.6.12/include/asm-mips/module.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/module.h 2005-01-31 02:45:43.000000000 +0100
+@@ -14,15 +14,23 @@ struct mod_arch_specific {
+
+ typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
+
+-typedef struct
+-{
+- Elf64_Addr r_offset; /* Address of relocation. */
+- Elf64_Word r_sym; /* Symbol index. */
+- Elf64_Byte r_ssym; /* Special symbol. */
+- Elf64_Byte r_type3; /* Third relocation. */
+- Elf64_Byte r_type2; /* Second relocation. */
+- Elf64_Byte r_type; /* First relocation. */
+- Elf64_Sxword r_addend; /* Addend. */
++typedef struct {
++ Elf64_Addr r_offset; /* Address of relocation. */
++ Elf64_Word r_sym; /* Symbol index. */
++ Elf64_Byte r_ssym; /* Special symbol. */
++ Elf64_Byte r_type3; /* Third relocation. */
++ Elf64_Byte r_type2; /* Second relocation. */
++ Elf64_Byte r_type; /* First relocation. */
++} Elf64_Mips_Rel;
++
++typedef struct {
++ Elf64_Addr r_offset; /* Address of relocation. */
++ Elf64_Word r_sym; /* Symbol index. */
++ Elf64_Byte r_ssym; /* Special symbol. */
++ Elf64_Byte r_type3; /* Third relocation. */
++ Elf64_Byte r_type2; /* Second relocation. */
++ Elf64_Byte r_type; /* First relocation. */
++ Elf64_Sxword r_addend; /* Addend. */
+ } Elf64_Mips_Rela;
+
+ #ifdef CONFIG_MIPS32
+@@ -30,6 +38,13 @@ typedef struct
+ #define Elf_Shdr Elf32_Shdr
+ #define Elf_Sym Elf32_Sym
+ #define Elf_Ehdr Elf32_Ehdr
++#define Elf_Addr Elf32_Addr
++
++#define Elf_Mips_Rel Elf32_Rel
++#define Elf_Mips_Rela Elf32_Rela
++
++#define ELF_MIPS_R_SYM(rel) ELF32_R_SYM(rel.r_info)
++#define ELF_MIPS_R_TYPE(rel) ELF32_R_TYPE(rel.r_info)
+
+ #endif
+
+@@ -38,6 +53,13 @@ typedef struct
+ #define Elf_Shdr Elf64_Shdr
+ #define Elf_Sym Elf64_Sym
+ #define Elf_Ehdr Elf64_Ehdr
++#define Elf_Addr Elf64_Addr
++
++#define Elf_Mips_Rel Elf64_Mips_Rel
++#define Elf_Mips_Rela Elf64_Mips_Rela
++
++#define ELF_MIPS_R_SYM(rel) (rel.r_sym)
++#define ELF_MIPS_R_TYPE(rel) (rel.r_type)
+
+ #endif
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/paccess.h linux_HEAD/include/asm-mips/paccess.h
+--- linux-2.6.12/include/asm-mips/paccess.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/paccess.h 2005-03-04 21:13:41.000000000 +0100
+@@ -52,7 +52,7 @@ struct __large_pstruct { unsigned long b
+ })
+
+ #define __get_dbe_asm(insn) \
+-({ \
++{ \
+ __asm__ __volatile__( \
+ "1:\t" insn "\t%1,%2\n\t" \
+ "move\t%0,$0\n" \
+@@ -67,7 +67,7 @@ struct __large_pstruct { unsigned long b
+ ".previous" \
+ :"=r" (__gu_err), "=r" (__gu_val) \
+ :"o" (__mp(__gu_addr)), "i" (-EFAULT)); \
+-})
++}
+
+ extern void __get_dbe_unknown(void);
+
+@@ -90,7 +90,7 @@ extern void __get_dbe_unknown(void);
+ })
+
+ #define __put_dbe_asm(insn) \
+-({ \
++{ \
+ __asm__ __volatile__( \
+ "1:\t" insn "\t%1,%2\n\t" \
+ "move\t%0,$0\n" \
+@@ -104,7 +104,7 @@ extern void __get_dbe_unknown(void);
+ ".previous" \
+ : "=r" (__pu_err) \
+ : "r" (__pu_val), "o" (__mp(__pu_addr)), "i" (-EFAULT)); \
+-})
++}
+
+ extern void __put_dbe_unknown(void);
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/page.h linux_HEAD/include/asm-mips/page.h
+--- linux-2.6.12/include/asm-mips/page.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/page.h 2005-07-07 11:23:06.000000000 +0200
+@@ -76,7 +76,7 @@ static inline void copy_user_page(void *
+ * These are used to make use of C type-checking..
+ */
+ #ifdef CONFIG_64BIT_PHYS_ADDR
+- #ifdef CONFIG_CPU_MIPS32
++ #ifdef CONFIG_CPU_MIPS32_R1
+ typedef struct { unsigned long pte_low, pte_high; } pte_t;
+ #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
+ #else
+@@ -87,21 +87,48 @@ static inline void copy_user_page(void *
+ typedef struct { unsigned long pte; } pte_t;
+ #define pte_val(x) ((x).pte)
+ #endif
++#define __pte(x) ((pte_t) { (x) } )
+
+-typedef struct { unsigned long pmd; } pmd_t;
+-typedef struct { unsigned long pgd; } pgd_t;
+-typedef struct { unsigned long pgprot; } pgprot_t;
++/*
++ * For 3-level pagetables we defines these ourselves, for 2-level the
++ * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
++ */
++#ifdef CONFIG_MIPS64
+
++typedef struct { unsigned long pmd; } pmd_t;
+ #define pmd_val(x) ((x).pmd)
++#define __pmd(x) ((pmd_t) { (x) } )
++
++#endif
++
++/*
++ * Right now we don't support 4-level pagetables, so all pud-related
++ * definitions come from <asm-generic/pgtable-nopud.h>.
++ */
++
++/*
++ * Finall the top of the hierarchy, the pgd
++ */
++typedef struct { unsigned long pgd; } pgd_t;
+ #define pgd_val(x) ((x).pgd)
++#define __pgd(x) ((pgd_t) { (x) } )
++
++/*
++ * Manipulate page protection bits
++ */
++typedef struct { unsigned long pgprot; } pgprot_t;
+ #define pgprot_val(x) ((x).pgprot)
++#define __pgprot(x) ((pgprot_t) { (x) } )
+
++/*
++ * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
++ * pair of pages we only have a single global bit per pair of pages. When
++ * writing to the TLB make sure we always have the bit set for both pages
++ * or none. This macro is used to access the `buddy' of the pte we're just
++ * working on.
++ */
+ #define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
+
+-#define __pte(x) ((pte_t) { (x) } )
+-#define __pmd(x) ((pmd_t) { (x) } )
+-#define __pgd(x) ((pgd_t) { (x) } )
+-#define __pgprot(x) ((pgprot_t) { (x) } )
+
+ /* Pure 2^n version of get_order */
+ static __inline__ int get_order(unsigned long size)
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/pgalloc.h linux_HEAD/include/asm-mips/pgalloc.h
+--- linux-2.6.12/include/asm-mips/pgalloc.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/pgalloc.h 2005-02-17 21:50:43.000000000 +0100
+@@ -26,10 +26,22 @@ static inline void pmd_populate(struct m
+ }
+
+ /*
++ * Initialize a new pmd table with invalid pointers.
++ */
++extern void pmd_init(unsigned long page, unsigned long pagetable);
++
++#ifdef CONFIG_MIPS64
++
++static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
++{
++ set_pud(pud, __pud((unsigned long)pmd));
++}
++#endif
++
++/*
+ * Initialize a new pgd / pmd table with invalid pointers.
+ */
+ extern void pgd_init(unsigned long page);
+-extern void pmd_init(unsigned long page, unsigned long pagetable);
+
+ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
+ {
+@@ -86,21 +98,18 @@ static inline void pte_free(struct page
+ #define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
+
+ #ifdef CONFIG_MIPS32
+-#define pgd_populate(mm, pmd, pte) BUG()
+
+ /*
+ * allocating and freeing a pmd is trivial: the 1-entry pmd is
+ * inside the pgd, so has no extra memory associated with it.
+ */
+-#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
+ #define pmd_free(x) do { } while (0)
+ #define __pmd_free_tlb(tlb,x) do { } while (0)
++
+ #endif
+
+ #ifdef CONFIG_MIPS64
+
+-#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd))
+-
+ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
+ {
+ pmd_t *pmd;
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/pgtable-32.h linux_HEAD/include/asm-mips/pgtable-32.h
+--- linux-2.6.12/include/asm-mips/pgtable-32.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/pgtable-32.h 2005-07-07 11:23:06.000000000 +0200
+@@ -17,6 +17,8 @@
+ #include <asm/cachectl.h>
+ #include <asm/fixmap.h>
+
++#include <asm-generic/pgtable-nopmd.h>
++
+ /*
+ * - add_wired_entry() add a fixed TLB entry, and move wired register
+ */
+@@ -41,42 +43,38 @@ extern int add_temporary_entry(unsigned
+ * works even with the cache aliasing problem the R4k and above have.
+ */
+
+-/* PMD_SHIFT determines the size of the area a second-level page table can map */
++/* PGDIR_SHIFT determines what a third-level page table entry can map */
+ #ifdef CONFIG_64BIT_PHYS_ADDR
+-#define PMD_SHIFT 21
++#define PGDIR_SHIFT 21
+ #else
+-#define PMD_SHIFT 22
++#define PGDIR_SHIFT 22
+ #endif
+-#define PMD_SIZE (1UL << PMD_SHIFT)
+-#define PMD_MASK (~(PMD_SIZE-1))
+-
+-/* PGDIR_SHIFT determines what a third-level page table entry can map */
+-#define PGDIR_SHIFT PMD_SHIFT
+ #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
+ #define PGDIR_MASK (~(PGDIR_SIZE-1))
+
+ /*
+ * Entries per page directory level: we use two-level, so
+- * we don't really have any PMD directory physically.
++ * we don't really have any PUD/PMD directory physically.
+ */
+ #ifdef CONFIG_64BIT_PHYS_ADDR
+ #define PGD_ORDER 1
+-#define PMD_ORDER 0
++#define PUD_ORDER aieeee_attempt_to_allocate_pud
++#define PMD_ORDER 1
+ #define PTE_ORDER 0
+ #else
+ #define PGD_ORDER 0
+-#define PMD_ORDER 0
++#define PUD_ORDER aieeee_attempt_to_allocate_pud
++#define PMD_ORDER 1
+ #define PTE_ORDER 0
+ #endif
+
+ #define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
+-#define PTRS_PER_PMD 1
+ #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
+
+ #define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
+ #define FIRST_USER_ADDRESS 0
+
+-#define VMALLOC_START KSEG2
++#define VMALLOC_START MAP_BASE
+
+ #ifdef CONFIG_HIGHMEM
+ # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
+@@ -91,8 +89,6 @@ extern int add_temporary_entry(unsigned
+ #define pte_ERROR(e) \
+ printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
+ #endif
+-#define pmd_ERROR(e) \
+- printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
+ #define pgd_ERROR(e) \
+ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
+
+@@ -120,17 +116,7 @@ static inline void pmd_clear(pmd_t *pmdp
+ pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
+ }
+
+-/*
+- * The "pgd_xxx()" functions here are trivial for a folded two-level
+- * setup: the pgd is never bad, and a pmd always exists (as it's folded
+- * into the pgd entry)
+- */
+-static inline int pgd_none(pgd_t pgd) { return 0; }
+-static inline int pgd_bad(pgd_t pgd) { return 0; }
+-static inline int pgd_present(pgd_t pgd) { return 1; }
+-static inline void pgd_clear(pgd_t *pgdp) { }
+-
+-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ #define pte_page(x) pfn_to_page(pte_pfn(x))
+ #define pte_pfn(x) ((unsigned long)((x).pte_high >> 6))
+ static inline pte_t
+@@ -153,25 +139,20 @@ pfn_pte(unsigned long pfn, pgprot_t prot
+ #define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
+ #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+ #endif
+-#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */
++#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) */
+
+ #define __pgd_offset(address) pgd_index(address)
++#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
+ #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+
+ /* to find an entry in a kernel page-table-directory */
+ #define pgd_offset_k(address) pgd_offset(&init_mm, address)
+
+-#define pgd_index(address) ((address) >> PGDIR_SHIFT)
++#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
+
+ /* to find an entry in a page-table-directory */
+ #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
+
+-/* Find an entry in the second-level page table.. */
+-static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
+-{
+- return (pmd_t *) dir;
+-}
+-
+ /* Find an entry in the third-level page table.. */
+ #define __pte_offset(address) \
+ (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+@@ -221,7 +202,7 @@ static inline pmd_t *pmd_offset(pgd_t *d
+ */
+ #define PTE_FILE_MAX_BITS 27
+
+-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ /* fixme */
+ #define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f))
+ #define pgoff_to_pte(off) \
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/pgtable-64.h linux_HEAD/include/asm-mips/pgtable-64.h
+--- linux-2.6.12/include/asm-mips/pgtable-64.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/pgtable-64.h 2005-04-30 15:33:58.000000000 +0200
+@@ -16,13 +16,15 @@
+ #include <asm/page.h>
+ #include <asm/cachectl.h>
+
++#include <asm-generic/pgtable-nopud.h>
++
+ /*
+ * Each address space has 2 4K pages as its page directory, giving 1024
+ * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
+- * pair of 4K pages, giving 1024 (== PTRS_PER_PMD) 8 byte pointers to
+- * page tables. Each page table is a single 4K page, giving 512 (==
+- * PTRS_PER_PTE) 8 byte ptes. Each pgde is initialized to point to
+- * invalid_pmd_table, each pmde is initialized to point to
++ * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
++ * tables. Each page table is also a single 4K page, giving 512 (==
++ * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
++ * invalid_pmd_table, each pmd entry is initialized to point to
+ * invalid_pte_table, each pte is initialized to 0. When memory is low,
+ * and a pmd table or a page table allocation fails, empty_bad_pmd_table
+ * and empty_bad_page_table is returned back to higher layer code, so
+@@ -36,17 +38,17 @@
+ */
+
+ /* PMD_SHIFT determines the size of the area a second-level page table can map */
+-#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3))
++#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
+ #define PMD_SIZE (1UL << PMD_SHIFT)
+ #define PMD_MASK (~(PMD_SIZE-1))
+
+ /* PGDIR_SHIFT determines what a third-level page table entry can map */
+-#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + 1 - 3))
++#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
+ #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
+ #define PGDIR_MASK (~(PGDIR_SIZE-1))
+
+ /*
+- * For 4kB page size we use a 3 level page tree and a 8kB pmd and pgds which
++ * For 4kB page size we use a 3 level page tree and an 8kB pud, which
+ * permits us mapping 40 bits of virtual address space.
+ *
+ * We used to implement 41 bits by having an order 1 pmd level but that seemed
+@@ -57,7 +59,7 @@
+ * two levels would be easy to implement.
+ *
+ * For 16kB page size we use a 2 level page tree which permits a total of
+- * 36 bits of virtual address space. We could add a third leve. but it seems
++ * 36 bits of virtual address space. We could add a third level but it seems
+ * like at the moment there's no need for this.
+ *
+ * For 64kB page size we use a 2 level page table tree for a total of 42 bits
+@@ -65,21 +67,25 @@
+ */
+ #ifdef CONFIG_PAGE_SIZE_4KB
+ #define PGD_ORDER 1
++#define PUD_ORDER aieeee_attempt_to_allocate_pud
+ #define PMD_ORDER 0
+ #define PTE_ORDER 0
+ #endif
+ #ifdef CONFIG_PAGE_SIZE_8KB
+ #define PGD_ORDER 0
++#define PUD_ORDER aieeee_attempt_to_allocate_pud
+ #define PMD_ORDER 0
+ #define PTE_ORDER 0
+ #endif
+ #ifdef CONFIG_PAGE_SIZE_16KB
+ #define PGD_ORDER 0
++#define PUD_ORDER aieeee_attempt_to_allocate_pud
+ #define PMD_ORDER 0
+ #define PTE_ORDER 0
+ #endif
+ #ifdef CONFIG_PAGE_SIZE_64KB
+ #define PGD_ORDER 0
++#define PUD_ORDER aieeee_attempt_to_allocate_pud
+ #define PMD_ORDER 0
+ #define PTE_ORDER 0
+ #endif
+@@ -91,7 +97,7 @@
+ #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
+ #define FIRST_USER_ADDRESS 0
+
+-#define VMALLOC_START XKSEG
++#define VMALLOC_START MAP_BASE
+ #define VMALLOC_END \
+ (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
+
+@@ -102,13 +108,13 @@
+ #define pgd_ERROR(e) \
+ printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
+
+-extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)];
+-extern pte_t empty_bad_page_table[PAGE_SIZE/sizeof(pte_t)];
+-extern pmd_t invalid_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
+-extern pmd_t empty_bad_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
++extern pte_t invalid_pte_table[PTRS_PER_PTE];
++extern pte_t empty_bad_page_table[PTRS_PER_PTE];
++extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
++extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
+
+ /*
+- * Empty pmd entries point to the invalid_pte_table.
++ * Empty pgd/pmd entries point to the invalid_pte_table.
+ */
+ static inline int pmd_none(pmd_t pmd)
+ {
+@@ -128,26 +134,30 @@ static inline void pmd_clear(pmd_t *pmdp
+ }
+
+ /*
+- * Empty pgd entries point to the invalid_pmd_table.
++ * Empty pud entries point to the invalid_pmd_table.
+ */
+-static inline int pgd_none(pgd_t pgd)
++static inline int pud_none(pud_t pud)
+ {
+- return pgd_val(pgd) == (unsigned long) invalid_pmd_table;
++ return pud_val(pud) == (unsigned long) invalid_pmd_table;
+ }
+
+-#define pgd_bad(pgd) (pgd_val(pgd) &~ PAGE_MASK)
++static inline int pud_bad(pud_t pud)
++{
++ return pud_val(pud) & ~PAGE_MASK;
++}
+
+-static inline int pgd_present(pgd_t pgd)
++static inline int pud_present(pud_t pud)
+ {
+- return pgd_val(pgd) != (unsigned long) invalid_pmd_table;
++ return pud_val(pud) != (unsigned long) invalid_pmd_table;
+ }
+
+-static inline void pgd_clear(pgd_t *pgdp)
++static inline void pud_clear(pud_t *pudp)
+ {
+- pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table);
++ pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
+ }
+
+-#define pte_page(x) pfn_to_page((unsigned long)((pte_val(x) >> PAGE_SHIFT)))
++#define pte_page(x) pfn_to_page(pte_pfn(x))
++
+ #ifdef CONFIG_CPU_VR41XX
+ #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
+ #define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
+@@ -157,26 +167,28 @@ static inline void pgd_clear(pgd_t *pgdp
+ #endif
+
+ #define __pgd_offset(address) pgd_index(address)
++#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
++#define __pmd_offset(address) pmd_index(address)
+ #define page_pte(page) page_pte_prot(page, __pgprot(0))
+
+ /* to find an entry in a kernel page-table-directory */
+ #define pgd_offset_k(address) pgd_offset(&init_mm, 0)
+
+-#define pgd_index(address) ((address) >> PGDIR_SHIFT)
++#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
++#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+
+ /* to find an entry in a page-table-directory */
+ #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
+
+-static inline unsigned long pgd_page(pgd_t pgd)
++static inline unsigned long pud_page(pud_t pud)
+ {
+- return pgd_val(pgd);
++ return pud_val(pud);
+ }
+
+ /* Find an entry in the second-level page table.. */
+-static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
++static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
+ {
+- return (pmd_t *) pgd_page(*dir) +
+- ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
++ return (pmd_t *) pud_page(*pud) + pmd_index(address);
+ }
+
+ /* Find an entry in the third-level page table.. */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/pgtable-bits.h linux_HEAD/include/asm-mips/pgtable-bits.h
+--- linux-2.6.12/include/asm-mips/pgtable-bits.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/pgtable-bits.h 2005-07-07 11:23:06.000000000 +0200
+@@ -33,7 +33,7 @@
+ * unpredictable things. The code (when it is written) to deal with
+ * this problem will be in the update_mmu_cache() code for the r4k.
+ */
+-#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR)
++#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR)
+
+ #define _PAGE_PRESENT (1<<6) /* implemented in software */
+ #define _PAGE_READ (1<<7) /* implemented in software */
+@@ -123,7 +123,7 @@
+
+ #endif
+ #endif
+-#endif /* defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) */
++#endif /* defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR) */
+
+ #define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
+ #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
+@@ -140,7 +140,7 @@
+ #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW
+ #endif
+
+-#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR)
++#if defined(CONFIG_CPU_MIPS32_R1) && defined(CONFIG_64BIT_PHYS_ADDR)
+ #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3)
+ #else
+ #define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9)
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/pgtable.h linux_HEAD/include/asm-mips/pgtable.h
+--- linux-2.6.12/include/asm-mips/pgtable.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/pgtable.h 2005-07-07 11:23:06.000000000 +0200
+@@ -8,8 +8,6 @@
+ #ifndef _ASM_PGTABLE_H
+ #define _ASM_PGTABLE_H
+
+-#include <asm-generic/4level-fixup.h>
+-
+ #include <linux/config.h>
+ #ifdef CONFIG_MIPS32
+ #include <asm/pgtable-32.h>
+@@ -82,7 +80,7 @@ extern void paging_init(void);
+ #define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
+ #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
+
+-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ static inline void set_pte(pte_t *ptep, pte_t pte)
+ {
+ ptep->pte_high = pte.pte_high;
+@@ -146,11 +144,18 @@ static inline void pte_clear(struct mm_s
+ #endif
+
+ /*
+- * (pmds are folded into pgds so this doesn't get actually called,
++ * (pmds are folded into puds so this doesn't get actually called,
+ * but the define is needed for a generic inline function.)
+ */
+ #define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
+-#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0)
++
++#ifdef CONFIG_MIPS64
++/*
++ * (puds are folded into pgds so this doesn't get actually called,
++ * but the define is needed for a generic inline function.)
++ */
++#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
++#endif
+
+ #define PGD_T_LOG2 ffz(~sizeof(pgd_t))
+ #define PMD_T_LOG2 ffz(~sizeof(pmd_t))
+@@ -163,7 +168,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD
+ * Undefined behaviour if not..
+ */
+ static inline int pte_user(pte_t pte) { BUG(); return 0; }
+-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; }
+ static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; }
+ static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; }
+@@ -322,7 +327,7 @@ static inline pgprot_t pgprot_noncached(
+ */
+ #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
+
+-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+ {
+ pte.pte_low &= _PAGE_CHG_MASK;
+@@ -375,7 +380,7 @@ static inline int io_remap_pfn_range(str
+ pgprot_t prot)
+ {
+ phys_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
+- return remap_pfn_range(vma, vaddr, pfn, size, prot);
++ return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
+ }
+ #else
+ #define io_remap_page_range(vma, vaddr, paddr, size, prot) \
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/processor.h linux_HEAD/include/asm-mips/processor.h
+--- linux-2.6.12/include/asm-mips/processor.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/processor.h 2005-07-01 12:10:27.000000000 +0200
+@@ -96,12 +96,26 @@ union mips_fpu_union {
+ {{0,},} \
+ }
+
++#define NUM_DSP_REGS 6
++
++typedef __u32 dspreg_t;
++
++struct mips_dsp_state {
++ dspreg_t dspr[NUM_DSP_REGS];
++ unsigned int dspcontrol;
++ unsigned short used_dsp;
++};
++
++#define INIT_DSP {{0,},}
++
+ typedef struct {
+ unsigned long seg;
+ } mm_segment_t;
+
+ #define ARCH_MIN_TASKALIGN 8
+
++struct mips_abi;
++
+ /*
+ * If you change thread_struct remember to change the #defines below too!
+ */
+@@ -117,6 +131,9 @@ struct thread_struct {
+ /* Saved fpu/fpu emulator stuff. */
+ union mips_fpu_union fpu;
+
++ /* Saved state of the DSP ASE, if available. */
++ struct mips_dsp_state dsp;
++
+ /* Other stuff associated with the thread. */
+ unsigned long cp0_badvaddr; /* Last user fault */
+ unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
+@@ -129,6 +146,7 @@ struct thread_struct {
+ unsigned long mflags;
+ unsigned long irix_trampoline; /* Wheee... */
+ unsigned long irix_oldctx;
++ struct mips_abi *abi;
+ };
+
+ #define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
+@@ -151,6 +169,10 @@ struct thread_struct {
+ */ \
+ INIT_FPU, \
+ /* \
++ * saved dsp/dsp emulator stuff \
++ */ \
++ INIT_DSP, \
++ /* \
+ * Other stuff associated with the process \
+ */ \
+ 0, 0, 0, 0, \
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/ptrace.h linux_HEAD/include/asm-mips/ptrace.h
+--- linux-2.6.12/include/asm-mips/ptrace.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/ptrace.h 2005-07-01 12:10:27.000000000 +0200
+@@ -22,6 +22,8 @@
+ #define MMLO 68
+ #define FPC_CSR 69
+ #define FPC_EIR 70
++#define DSP_BASE 71 /* 3 more hi / lo register pairs */
++#define DSP_CONTROL 77
+
+ /*
+ * This struct defines the way the registers are stored on the stack during a
+@@ -38,8 +40,8 @@ struct pt_regs {
+
+ /* Saved special registers. */
+ unsigned long cp0_status;
+- unsigned long lo;
+ unsigned long hi;
++ unsigned long lo;
+ unsigned long cp0_badvaddr;
+ unsigned long cp0_cause;
+ unsigned long cp0_epc;
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/serial.h linux_HEAD/include/asm-mips/serial.h
+--- linux-2.6.12/include/asm-mips/serial.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/serial.h 2005-03-04 20:36:14.000000000 +0100
+@@ -78,16 +78,6 @@
+ #define JAZZ_SERIAL_PORT_DEFNS
+ #endif
+
+-#ifdef CONFIG_MIPS_COBALT
+-#include <asm/cobalt/cobalt.h>
+-#define COBALT_BASE_BAUD (18432000 / 16)
+-#define COBALT_SERIAL_PORT_DEFNS \
+- /* UART CLK PORT IRQ FLAGS */ \
+- { 0, COBALT_BASE_BAUD, 0xc800000, COBALT_SERIAL_IRQ, STD_COM_FLAGS }, /* ttyS0 */
+-#else
+-#define COBALT_SERIAL_PORT_DEFNS
+-#endif
+-
+ /*
+ * Both Galileo boards have the same UART mappings.
+ */
+@@ -139,17 +129,6 @@
+ #define IVR_SERIAL_PORT_DEFNS
+ #endif
+
+-#ifdef CONFIG_TOSHIBA_JMR3927
+-#include <asm/jmr3927/jmr3927.h>
+-#define TXX927_SERIAL_PORT_DEFNS \
+- { .baud_base = JMR3927_BASE_BAUD, .port = UART0_ADDR, .irq = UART0_INT, \
+- .flags = UART0_FLAGS, .type = 1 }, \
+- { .baud_base = JMR3927_BASE_BAUD, .port = UART1_ADDR, .irq = UART1_INT, \
+- .flags = UART1_FLAGS, .type = 1 },
+-#else
+-#define TXX927_SERIAL_PORT_DEFNS
+-#endif
+-
+ #ifdef CONFIG_SERIAL_AU1X00
+ #include <asm/mach-au1x00/au1000.h>
+ #ifdef CONFIG_SOC_AU1000
+@@ -309,9 +288,9 @@
+ #define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
+
+ #define _JAGUAR_ATX_SERIAL_INIT(int, base) \
+- { baud_base: JAGUAR_ATX_BASE_BAUD, irq: int, \
+- flags: (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
+- iomem_base: (u8 *) base, iomem_reg_shift: 2, \
++ { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \
++ .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
++ .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
+ io_type: SERIAL_IO_MEM }
+ #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \
+ _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
+@@ -325,9 +304,9 @@
+ #define OCELOT_3_SERIAL_BASE (signed)0xfd000020
+
+ #define _OCELOT_3_SERIAL_INIT(int, base) \
+- { baud_base: OCELOT_3_BASE_BAUD, irq: int, \
+- flags: STD_COM_FLAGS, \
+- iomem_base: (u8 *) base, iomem_reg_shift: 2, \
++ { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
++ .flags = STD_COM_FLAGS, \
++ .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
+ io_type: SERIAL_IO_MEM }
+
+ #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
+@@ -424,7 +403,6 @@
+ #endif /* CONFIG_SGI_IP32 */
+
+ #define SERIAL_PORT_DFNS \
+- COBALT_SERIAL_PORT_DEFNS \
+ DDB5477_SERIAL_PORT_DEFNS \
+ EV96100_SERIAL_PORT_DEFNS \
+ EXTRA_SERIAL_PORT_DEFNS \
+@@ -438,7 +416,6 @@
+ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
+ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
+ MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
+- TXX927_SERIAL_PORT_DEFNS \
+ AU1000_SERIAL_PORT_DEFNS
+
+ #endif /* _ASM_SERIAL_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/sibyte/board.h linux_HEAD/include/asm-mips/sibyte/board.h
+--- linux-2.6.12/include/asm-mips/sibyte/board.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/sibyte/board.h 2005-02-17 21:50:45.000000000 +0100
+@@ -21,8 +21,6 @@
+
+ #include <linux/config.h>
+
+-#ifdef CONFIG_SIBYTE_BOARD
+-
+ #if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \
+ defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE) || \
+ defined(CONFIG_SIBYTE_LITTLESUR)
+@@ -54,16 +52,6 @@
+ #define setleds(t0,t1,c0,c1,c2,c3)
+ #endif /* LEDS_PHYS */
+
+-#else
+-
+-#ifdef LEDS_PHYS
+-extern void setleds(char *str);
+-#else
+-#define setleds(s) do { } while (0)
+-#endif /* LEDS_PHYS */
+-
+ #endif /* __ASSEMBLY__ */
+
+-#endif /* CONFIG_SIBYTE_BOARD */
+-
+ #endif /* _SIBYTE_BOARD_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/sibyte/sb1250.h linux_HEAD/include/asm-mips/sibyte/sb1250.h
+--- linux-2.6.12/include/asm-mips/sibyte/sb1250.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/sibyte/sb1250.h 2005-02-24 00:13:20.000000000 +0100
+@@ -58,6 +58,6 @@ extern void prom_printf(char *fmt, ...);
+
+ #endif
+
+-#define IOADDR(a) (IO_BASE + (a))
++#define IOADDR(a) ((void *)(IO_BASE + (a)))
+
+ #endif
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/sigcontext.h linux_HEAD/include/asm-mips/sigcontext.h
+--- linux-2.6.12/include/asm-mips/sigcontext.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/sigcontext.h 2005-07-01 12:10:27.000000000 +0200
+@@ -27,14 +27,15 @@ struct sigcontext {
+ unsigned int sc_fpc_csr;
+ unsigned int sc_fpc_eir; /* Unused */
+ unsigned int sc_used_math;
+- unsigned int sc_ssflags; /* Unused */
++ unsigned int sc_dsp; /* dsp status, was sc_ssflags */
+ unsigned long long sc_mdhi;
+ unsigned long long sc_mdlo;
+-
+- unsigned int sc_cause; /* Unused */
+- unsigned int sc_badvaddr; /* Unused */
+-
+- unsigned long sc_sigset[4]; /* kernel's sigset_t */
++ unsigned long sc_hi1; /* Was sc_cause */
++ unsigned long sc_lo1; /* Was sc_badvaddr */
++ unsigned long sc_hi2; /* Was sc_sigset[4] */
++ unsigned long sc_lo2;
++ unsigned long sc_hi3;
++ unsigned long sc_lo3;
+ };
+
+ #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+@@ -48,19 +49,19 @@ struct sigcontext {
+ * Warning: this structure illdefined with sc_badvaddr being just an unsigned
+ * int so it was changed to unsigned long in 2.6.0-test1. This may break
+ * binary compatibility - no prisoners.
++ * DSP ASE in 2.6.12-rc4. Turn sc_mdhi and sc_mdlo into an array of four
++ * entries, add sc_dsp and sc_reserved for padding. No prisoners.
+ */
+ struct sigcontext {
+ unsigned long sc_regs[32];
+ unsigned long sc_fpregs[32];
+- unsigned long sc_mdhi;
+- unsigned long sc_mdlo;
++ unsigned long sc_hi[4];
++ unsigned long sc_lo[4];
+ unsigned long sc_pc;
+- unsigned long sc_badvaddr;
+- unsigned int sc_status;
+ unsigned int sc_fpc_csr;
+- unsigned int sc_fpc_eir;
+ unsigned int sc_used_math;
+- unsigned int sc_cause;
++ unsigned int sc_dsp;
++ unsigned int sc_reserved;
+ };
+
+ #ifdef __KERNEL__
+@@ -68,23 +69,24 @@ struct sigcontext {
+ #include <linux/posix_types.h>
+
+ struct sigcontext32 {
+- __u32 sc_regmask; /* Unused */
+- __u32 sc_status;
+- __u64 sc_pc;
+- __u64 sc_regs[32];
+- __u64 sc_fpregs[32];
+- __u32 sc_ownedfp; /* Unused */
+- __u32 sc_fpc_csr;
+- __u32 sc_fpc_eir; /* Unused */
+- __u32 sc_used_math;
+- __u32 sc_ssflags; /* Unused */
+- __u64 sc_mdhi;
+- __u64 sc_mdlo;
+-
+- __u32 sc_cause; /* Unused */
+- __u32 sc_badvaddr; /* Unused */
+-
+- __u32 sc_sigset[4]; /* kernel's sigset_t */
++ __u32 sc_regmask; /* Unused */
++ __u32 sc_status;
++ __u64 sc_pc;
++ __u64 sc_regs[32];
++ __u64 sc_fpregs[32];
++ __u32 sc_ownedfp; /* Unused */
++ __u32 sc_fpc_csr;
++ __u32 sc_fpc_eir; /* Unused */
++ __u32 sc_used_math;
++ __u32 sc_dsp; /* dsp status, was sc_ssflags */
++ __u64 sc_mdhi;
++ __u64 sc_mdlo;
++ __u32 sc_hi1; /* Was sc_cause */
++ __u32 sc_lo1; /* Was sc_badvaddr */
++ __u32 sc_hi2; /* Was sc_sigset[4] */
++ __u32 sc_lo2;
++ __u32 sc_hi3;
++ __u32 sc_lo3;
+ };
+ #endif /* __KERNEL__ */
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/siginfo.h linux_HEAD/include/asm-mips/siginfo.h
+--- linux-2.6.12/include/asm-mips/siginfo.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/siginfo.h 2005-07-01 12:10:27.000000000 +0200
+@@ -11,6 +11,7 @@
+
+ #include <linux/config.h>
+
++#define __ARCH_SIGEV_PREAMBLE_SIZE (sizeof(long) + 2*sizeof(int))
+ #undef __ARCH_SI_TRAPNO /* exception code needs to fill this ... */
+
+ #define HAVE_ARCH_SIGINFO_T
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/signal.h linux_HEAD/include/asm-mips/signal.h
+--- linux-2.6.12/include/asm-mips/signal.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/signal.h 2005-07-01 12:10:27.000000000 +0200
+@@ -98,12 +98,39 @@ typedef unsigned long old_sigset_t; /*
+ #define MINSIGSTKSZ 2048
+ #define SIGSTKSZ 8192
+
++#ifdef __KERNEL__
++
++/*
++ * These values of sa_flags are used only by the kernel as part of the
++ * irq handling routines.
++ *
++ * SA_INTERRUPT is also used by the irq handling routines.
++ * SA_SHIRQ flag is for shared interrupt support on PCI and EISA.
++ */
++#define SA_SAMPLE_RANDOM SA_RESTART
++
++#ifdef CONFIG_TRAD_SIGNALS
++#define sig_uses_siginfo(ka) ((ka)->sa.sa_flags & SA_SIGINFO)
++#else
++#define sig_uses_siginfo(ka) (1)
++#endif
++
++#endif /* __KERNEL__ */
++
+ #define SIG_BLOCK 1 /* for blocking signals */
+ #define SIG_UNBLOCK 2 /* for unblocking signals */
+ #define SIG_SETMASK 3 /* for setting the signal mask */
+ #define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility:
+ set only the low 32 bit of the sigset. */
+-#include <asm-generic/signal.h>
++
++/* Type of a signal handler. */
++typedef void __signalfn_t(int);
++typedef __signalfn_t __user *__sighandler_t;
++
++/* Fake signal functions */
++#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
++#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
++#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
+
+ struct sigaction {
+ unsigned int sa_flags;
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/spinlock.h linux_HEAD/include/asm-mips/spinlock.h
+--- linux-2.6.12/include/asm-mips/spinlock.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/spinlock.h 2005-04-15 15:04:44.000000000 +0200
+@@ -140,6 +140,18 @@ typedef struct {
+
+ #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0)
+
++/*
++ * read_can_lock - would read_trylock() succeed?
++ * @lock: the rwlock in question.
++ */
++#define read_can_lock(rw) ((rw)->lock >= 0)
++
++/*
++ * write_can_lock - would write_trylock() succeed?
++ * @lock: the rwlock in question.
++ */
++#define write_can_lock(rw) (!(rw)->lock)
++
+ static inline void _raw_read_lock(rwlock_t *rw)
+ {
+ unsigned int tmp;
+@@ -218,8 +230,7 @@ static inline void _raw_write_lock(rwloc
+ " lui %1, 0x8000 \n"
+ " sc %1, %0 \n"
+ " beqzl %1, 1b \n"
+- " nop \n"
+- " sync \n"
++ " sync \n"
+ " .set reorder \n"
+ : "=m" (rw->lock), "=&r" (tmp)
+ : "m" (rw->lock)
+@@ -232,8 +243,7 @@ static inline void _raw_write_lock(rwloc
+ " lui %1, 0x8000 \n"
+ " sc %1, %0 \n"
+ " beqz %1, 1b \n"
+- " nop \n"
+- " sync \n"
++ " sync \n"
+ " .set reorder \n"
+ : "=m" (rw->lock), "=&r" (tmp)
+ : "m" (rw->lock)
+@@ -267,8 +277,7 @@ static inline int _raw_write_trylock(rwl
+ " lui %1, 0x8000 \n"
+ " sc %1, %0 \n"
+ " beqzl %1, 1b \n"
+- " nop \n"
+- " sync \n"
++ " sync \n"
+ " li %2, 1 \n"
+ " .set reorder \n"
+ "2: \n"
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/stackframe.h linux_HEAD/include/asm-mips/stackframe.h
+--- linux-2.6.12/include/asm-mips/stackframe.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/stackframe.h 2005-07-08 12:02:03.000000000 +0200
+@@ -60,7 +60,6 @@
+ mfc0 k0, CP0_CONTEXT
+ lui k1, %hi(kernelsp)
+ srl k0, k0, 23
+- sll k0, k0, 2
+ addu k1, k0
+ LONG_L k1, %lo(kernelsp)(k1)
+ #endif
+@@ -76,9 +75,14 @@
+ #endif
+ #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
+ MFC0 k1, CP0_CONTEXT
++ lui k0, %highest(kernelsp)
+ dsrl k1, 23
+- dsll k1, k1, 3
+- LONG_L k1, kernelsp(k1)
++ daddiu k0, %higher(kernelsp)
++ dsll k0, k0, 16
++ daddiu k0, %hi(kernelsp)
++ dsll k0, k0, 16
++ daddu k1, k1, k0
++ LONG_L k1, %lo(kernelsp)(k1)
+ #endif
+ .endm
+
+@@ -86,25 +90,28 @@
+ #ifdef CONFIG_MIPS32
+ mfc0 \temp, CP0_CONTEXT
+ srl \temp, 23
+- sll \temp, 2
+- LONG_S \stackp, kernelsp(\temp)
+ #endif
+ #if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
+ lw \temp, TI_CPU(gp)
+ dsll \temp, 3
+- lui \temp2, %hi(kernelsp)
+- daddu \temp, \temp2
+- LONG_S \stackp, %lo(kernelsp)(\temp)
+ #endif
+ #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
+- lw \temp, TI_CPU(gp)
+- dsll \temp, 3
+- LONG_S \stackp, kernelsp(\temp)
++ MFC0 \temp, CP0_CONTEXT
++ dsrl \temp, 23
+ #endif
++ LONG_S \stackp, kernelsp(\temp)
+ .endm
+ #else
+ .macro get_saved_sp /* Uniprocessor variation */
++#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
++ lui k1, %highest(kernelsp)
++ daddiu k1, %higher(kernelsp)
++ dsll k1, k1, 16
++ daddiu k1, %hi(kernelsp)
++ dsll k1, k1, 16
++#else
+ lui k1, %hi(kernelsp)
++#endif
+ LONG_L k1, %lo(kernelsp)(k1)
+ .endm
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/system.h linux_HEAD/include/asm-mips/system.h
+--- linux-2.6.12/include/asm-mips/system.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/system.h 2005-07-01 12:10:28.000000000 +0200
+@@ -17,6 +17,7 @@
+
+ #include <asm/addrspace.h>
+ #include <asm/cpu-features.h>
++#include <asm/dsp.h>
+ #include <asm/ptrace.h>
+ #include <asm/war.h>
+ #include <asm/interrupt.h>
+@@ -154,9 +155,13 @@ extern asmlinkage void *resume(void *las
+
+ struct task_struct;
+
+-#define switch_to(prev,next,last) \
+-do { \
+- (last) = resume(prev, next, next->thread_info); \
++#define switch_to(prev,next,last) \
++do { \
++ if (cpu_has_dsp) \
++ __save_dsp(prev); \
++ (last) = resume(prev, next, next->thread_info); \
++ if (cpu_has_dsp) \
++ __restore_dsp(current); \
+ } while(0)
+
+ #define ROT_IN_PIECES \
+@@ -171,14 +176,18 @@ static inline unsigned long __xchg_u32(v
+ unsigned long dummy;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %0, %3 # xchg_u32 \n"
++ " .set mips0 \n"
+ " move %2, %z4 \n"
++ " .set mips3 \n"
+ " sc %2, %1 \n"
+ " beqzl %2, 1b \n"
+ ROT_IN_PIECES
+ #ifdef CONFIG_SMP
+ " sync \n"
+ #endif
++ " .set mips0 \n"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+@@ -186,13 +195,17 @@ static inline unsigned long __xchg_u32(v
+ unsigned long dummy;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: ll %0, %3 # xchg_u32 \n"
++ " .set mips0 \n"
+ " move %2, %z4 \n"
++ " .set mips3 \n"
+ " sc %2, %1 \n"
+ " beqz %2, 1b \n"
+ #ifdef CONFIG_SMP
+ " sync \n"
+ #endif
++ " .set mips0 \n"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+@@ -217,6 +230,7 @@ static inline __u64 __xchg_u64(volatile
+ unsigned long dummy;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %0, %3 # xchg_u64 \n"
+ " move %2, %z4 \n"
+ " scd %2, %1 \n"
+@@ -225,6 +239,7 @@ static inline __u64 __xchg_u64(volatile
+ #ifdef CONFIG_SMP
+ " sync \n"
+ #endif
++ " .set mips0 \n"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+@@ -232,6 +247,7 @@ static inline __u64 __xchg_u64(volatile
+ unsigned long dummy;
+
+ __asm__ __volatile__(
++ " .set mips3 \n"
+ "1: lld %0, %3 # xchg_u64 \n"
+ " move %2, %z4 \n"
+ " scd %2, %1 \n"
+@@ -239,6 +255,7 @@ static inline __u64 __xchg_u64(volatile
+ #ifdef CONFIG_SMP
+ " sync \n"
+ #endif
++ " .set mips0 \n"
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+@@ -286,7 +303,9 @@ static inline unsigned long __cmpxchg_u3
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
++ " .set push \n"
+ " .set noat \n"
++ " .set mips3 \n"
+ "1: ll %0, %2 # __cmpxchg_u32 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+@@ -297,13 +316,15 @@ static inline unsigned long __cmpxchg_u3
+ " sync \n"
+ #endif
+ "2: \n"
+- " .set at \n"
++ " .set pop \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
++ " .set push \n"
+ " .set noat \n"
++ " .set mips3 \n"
+ "1: ll %0, %2 # __cmpxchg_u32 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+@@ -313,7 +334,7 @@ static inline unsigned long __cmpxchg_u3
+ " sync \n"
+ #endif
+ "2: \n"
+- " .set at \n"
++ " .set pop \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+@@ -338,7 +359,9 @@ static inline unsigned long __cmpxchg_u6
+
+ if (cpu_has_llsc) {
+ __asm__ __volatile__(
++ " .set push \n"
+ " .set noat \n"
++ " .set mips3 \n"
+ "1: lld %0, %2 # __cmpxchg_u64 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+@@ -349,13 +372,15 @@ static inline unsigned long __cmpxchg_u6
+ " sync \n"
+ #endif
+ "2: \n"
+- " .set at \n"
++ " .set pop \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
++ " .set push \n"
+ " .set noat \n"
++ " .set mips3 \n"
+ "1: lld %0, %2 # __cmpxchg_u64 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+@@ -365,7 +390,7 @@ static inline unsigned long __cmpxchg_u6
+ " sync \n"
+ #endif
+ "2: \n"
+- " .set at \n"
++ " .set pop \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+@@ -410,7 +435,7 @@ extern void *set_except_vector(int n, vo
+ extern void per_cpu_trap_init(void);
+
+ extern NORET_TYPE void __die(const char *, struct pt_regs *, const char *file,
+- const char *func, unsigned long line);
++ const char *func, unsigned long line) ATTRIB_NORET;
+ extern void __die_if_kernel(const char *, struct pt_regs *, const char *file,
+ const char *func, unsigned long line);
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/thread_info.h linux_HEAD/include/asm-mips/thread_info.h
+--- linux-2.6.12/include/asm-mips/thread_info.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/thread_info.h 2005-04-13 19:06:39.000000000 +0200
+@@ -26,6 +26,7 @@ struct thread_info {
+ struct task_struct *task; /* main task structure */
+ struct exec_domain *exec_domain; /* execution domain */
+ unsigned long flags; /* low level flags */
++ unsigned long tp_value; /* thread pointer */
+ __u32 cpu; /* current CPU */
+ __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
+
+@@ -114,6 +115,7 @@ register struct thread_info *__current_t
+ #define TIF_SIGPENDING 2 /* signal pending */
+ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */
+ #define TIF_SYSCALL_AUDIT 4 /* syscall auditing active */
++#define TIF_SECCOMP 5 /* secure computing */
+ #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
+ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
+ #define TIF_MEMDIE 18
+@@ -124,13 +126,14 @@ register struct thread_info *__current_t
+ #define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
+ #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
+ #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
++#define _TIF_SECCOMP (1<<TIF_SECCOMP)
+ #define _TIF_USEDFPU (1<<TIF_USEDFPU)
+ #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
+
+-#define _TIF_WORK_MASK 0x0000ffef /* work to do on
+- interrupt/exception return */
+-#define _TIF_ALLWORK_MASK 0x8000ffff /* work to do on any return to
+- u-space */
++/* work to do on interrupt/exception return */
++#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP)
++/* work to do on any return to u-space */
++#define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP)
+
+ #endif /* __KERNEL__ */
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/uaccess.h linux_HEAD/include/asm-mips/uaccess.h
+--- linux-2.6.12/include/asm-mips/uaccess.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/uaccess.h 2005-03-21 20:04:59.000000000 +0100
+@@ -129,7 +129,8 @@
+ *
+ * See access_ok() for more details.
+ */
+-static inline int __deprecated verify_area(int type, const void * addr, unsigned long size)
++static inline int __deprecated verify_area(int type, const void __user * addr,
++ unsigned long size)
+ {
+ return access_ok(type, addr, size) ? 0 : -EFAULT;
+ }
+@@ -219,63 +220,58 @@ static inline int __deprecated verify_ar
+ __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
+
+ struct __large_struct { unsigned long buf[100]; };
+-#define __m(x) (*(struct __large_struct *)(x))
++#define __m(x) (*(struct __large_struct __user *)(x))
+
+ /*
+ * Yuck. We need two variants, one for 64bit operation and one
+ * for 32 bit mode and old iron.
+ */
+ #ifdef __mips64
+-#define __GET_USER_DW(__gu_err) __get_user_asm("ld", __gu_err)
++#define __GET_USER_DW(ptr) __get_user_asm("ld", ptr)
+ #else
+-#define __GET_USER_DW(__gu_err) __get_user_asm_ll32(__gu_err)
++#define __GET_USER_DW(ptr) __get_user_asm_ll32(ptr)
+ #endif
+
+ #define __get_user_nocheck(x,ptr,size) \
+ ({ \
+- __typeof(*(ptr)) __gu_val = 0; \
+- long __gu_addr; \
++ __typeof(*(ptr)) __gu_val = (__typeof(*(ptr))) 0; \
+ long __gu_err = 0; \
+ \
+ might_sleep(); \
+- __gu_addr = (long) (ptr); \
+ switch (size) { \
+- case 1: __get_user_asm("lb", __gu_err); break; \
+- case 2: __get_user_asm("lh", __gu_err); break; \
+- case 4: __get_user_asm("lw", __gu_err); break; \
+- case 8: __GET_USER_DW(__gu_err); break; \
++ case 1: __get_user_asm("lb", ptr); break; \
++ case 2: __get_user_asm("lh", ptr); break; \
++ case 4: __get_user_asm("lw", ptr); break; \
++ case 8: __GET_USER_DW(ptr); break; \
+ default: __get_user_unknown(); break; \
+ } \
+- x = (__typeof__(*(ptr))) __gu_val; \
++ (x) = (__typeof__(*(ptr))) __gu_val; \
+ __gu_err; \
+ })
+
+ #define __get_user_check(x,ptr,size) \
+ ({ \
++ const __typeof__(*(ptr)) __user * __gu_addr = (ptr); \
+ __typeof__(*(ptr)) __gu_val = 0; \
+- long __gu_addr; \
+- long __gu_err; \
++ long __gu_err = -EFAULT; \
+ \
+ might_sleep(); \
+- __gu_addr = (long) (ptr); \
+- __gu_err = access_ok(VERIFY_READ, (void *) __gu_addr, size) \
+- ? 0 : -EFAULT; \
+ \
+- if (likely(!__gu_err)) { \
++ if (likely(access_ok(VERIFY_READ, __gu_addr, size))) { \
+ switch (size) { \
+- case 1: __get_user_asm("lb", __gu_err); break; \
+- case 2: __get_user_asm("lh", __gu_err); break; \
+- case 4: __get_user_asm("lw", __gu_err); break; \
+- case 8: __GET_USER_DW(__gu_err); break; \
++ case 1: __get_user_asm("lb", __gu_addr); break; \
++ case 2: __get_user_asm("lh", __gu_addr); break; \
++ case 4: __get_user_asm("lw", __gu_addr); break; \
++ case 8: __GET_USER_DW(__gu_addr); break; \
+ default: __get_user_unknown(); break; \
+ } \
+ } \
+- x = (__typeof__(*(ptr))) __gu_val; \
++ (x) = (__typeof__(*(ptr))) __gu_val; \
+ __gu_err; \
+ })
+
+-#define __get_user_asm(insn,__gu_err) \
+-({ \
++#define __get_user_asm(insn, addr) \
++{ \
+ __asm__ __volatile__( \
+ "1: " insn " %1, %3 \n" \
+ "2: \n" \
+@@ -287,20 +283,20 @@ struct __large_struct { unsigned long bu
+ " "__UA_ADDR "\t1b, 3b \n" \
+ " .previous \n" \
+ : "=r" (__gu_err), "=r" (__gu_val) \
+- : "0" (__gu_err), "o" (__m(__gu_addr)), "i" (-EFAULT)); \
+-})
++ : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \
++}
+
+ /*
+ * Get a long long 64 using 32 bit registers.
+ */
+-#define __get_user_asm_ll32(__gu_err) \
+-({ \
++#define __get_user_asm_ll32(addr) \
++{ \
+ __asm__ __volatile__( \
+- "1: lw %1, %3 \n" \
+- "2: lw %D1, %4 \n" \
++ "1: lw %1, (%3) \n" \
++ "2: lw %D1, 4(%3) \n" \
+ " move %0, $0 \n" \
+ "3: .section .fixup,\"ax\" \n" \
+- "4: li %0, %5 \n" \
++ "4: li %0, %4 \n" \
+ " move %1, $0 \n" \
+ " move %D1, $0 \n" \
+ " j 3b \n" \
+@@ -310,9 +306,8 @@ struct __large_struct { unsigned long bu
+ " " __UA_ADDR " 2b, 4b \n" \
+ " .previous \n" \
+ : "=r" (__gu_err), "=&r" (__gu_val) \
+- : "0" (__gu_err), "o" (__m(__gu_addr)), \
+- "o" (__m(__gu_addr + 4)), "i" (-EFAULT)); \
+-})
++ : "0" (0), "r" (addr), "i" (-EFAULT)); \
++}
+
+ extern void __get_user_unknown(void);
+
+@@ -321,25 +316,23 @@ extern void __get_user_unknown(void);
+ * for 32 bit mode and old iron.
+ */
+ #ifdef __mips64
+-#define __PUT_USER_DW(__pu_val) __put_user_asm("sd", __pu_val)
++#define __PUT_USER_DW(ptr) __put_user_asm("sd", ptr)
+ #else
+-#define __PUT_USER_DW(__pu_val) __put_user_asm_ll32(__pu_val)
++#define __PUT_USER_DW(ptr) __put_user_asm_ll32(ptr)
+ #endif
+
+ #define __put_user_nocheck(x,ptr,size) \
+ ({ \
+ __typeof__(*(ptr)) __pu_val; \
+- long __pu_addr; \
+ long __pu_err = 0; \
+ \
+ might_sleep(); \
+ __pu_val = (x); \
+- __pu_addr = (long) (ptr); \
+ switch (size) { \
+- case 1: __put_user_asm("sb", __pu_val); break; \
+- case 2: __put_user_asm("sh", __pu_val); break; \
+- case 4: __put_user_asm("sw", __pu_val); break; \
+- case 8: __PUT_USER_DW(__pu_val); break; \
++ case 1: __put_user_asm("sb", ptr); break; \
++ case 2: __put_user_asm("sh", ptr); break; \
++ case 4: __put_user_asm("sw", ptr); break; \
++ case 8: __PUT_USER_DW(ptr); break; \
+ default: __put_user_unknown(); break; \
+ } \
+ __pu_err; \
+@@ -347,30 +340,26 @@ extern void __get_user_unknown(void);
+
+ #define __put_user_check(x,ptr,size) \
+ ({ \
+- __typeof__(*(ptr)) __pu_val; \
+- long __pu_addr; \
+- long __pu_err; \
++ __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
++ __typeof__(*(ptr)) __pu_val = (x); \
++ long __pu_err = -EFAULT; \
+ \
+ might_sleep(); \
+- __pu_val = (x); \
+- __pu_addr = (long) (ptr); \
+- __pu_err = access_ok(VERIFY_WRITE, (void *) __pu_addr, size) \
+- ? 0 : -EFAULT; \
+ \
+- if (likely(!__pu_err)) { \
++ if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \
+ switch (size) { \
+- case 1: __put_user_asm("sb", __pu_val); break; \
+- case 2: __put_user_asm("sh", __pu_val); break; \
+- case 4: __put_user_asm("sw", __pu_val); break; \
+- case 8: __PUT_USER_DW(__pu_val); break; \
++ case 1: __put_user_asm("sb", __pu_addr); break; \
++ case 2: __put_user_asm("sh", __pu_addr); break; \
++ case 4: __put_user_asm("sw", __pu_addr); break; \
++ case 8: __PUT_USER_DW(__pu_addr); break; \
+ default: __put_user_unknown(); break; \
+ } \
+ } \
+ __pu_err; \
+ })
+
+-#define __put_user_asm(insn, __pu_val) \
+-({ \
++#define __put_user_asm(insn, ptr) \
++{ \
+ __asm__ __volatile__( \
+ "1: " insn " %z2, %3 # __put_user_asm\n" \
+ "2: \n" \
+@@ -382,18 +371,18 @@ extern void __get_user_unknown(void);
+ " " __UA_ADDR " 1b, 3b \n" \
+ " .previous \n" \
+ : "=r" (__pu_err) \
+- : "0" (__pu_err), "Jr" (__pu_val), "o" (__m(__pu_addr)), \
++ : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), \
+ "i" (-EFAULT)); \
+-})
++}
+
+-#define __put_user_asm_ll32(__pu_val) \
+-({ \
++#define __put_user_asm_ll32(ptr) \
++{ \
+ __asm__ __volatile__( \
+- "1: sw %2, %3 # __put_user_asm_ll32 \n" \
+- "2: sw %D2, %4 \n" \
++ "1: sw %2, (%3) # __put_user_asm_ll32 \n" \
++ "2: sw %D2, 4(%3) \n" \
+ "3: \n" \
+ " .section .fixup,\"ax\" \n" \
+- "4: li %0, %5 \n" \
++ "4: li %0, %4 \n" \
+ " j 3b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+@@ -401,9 +390,9 @@ extern void __get_user_unknown(void);
+ " " __UA_ADDR " 2b, 4b \n" \
+ " .previous" \
+ : "=r" (__pu_err) \
+- : "0" (__pu_err), "r" (__pu_val), "o" (__m(__pu_addr)), \
+- "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \
+-})
++ : "0" (0), "r" (__pu_val), "r" (ptr), \
++ "i" (-EFAULT)); \
++}
+
+ extern void __put_user_unknown(void);
+
+@@ -426,7 +415,7 @@ extern size_t __copy_user(void *__to, co
+
+ #define __invoke_copy_to_user(to,from,n) \
+ ({ \
+- register void *__cu_to_r __asm__ ("$4"); \
++ register void __user *__cu_to_r __asm__ ("$4"); \
+ register const void *__cu_from_r __asm__ ("$5"); \
+ register long __cu_len_r __asm__ ("$6"); \
+ \
+@@ -458,7 +447,7 @@ extern size_t __copy_user(void *__to, co
+ */
+ #define __copy_to_user(to,from,n) \
+ ({ \
+- void *__cu_to; \
++ void __user __user *__cu_to; \
+ const void *__cu_from; \
+ long __cu_len; \
+ \
+@@ -488,7 +477,7 @@ extern size_t __copy_user(void *__to, co
+ */
+ #define copy_to_user(to,from,n) \
+ ({ \
+- void *__cu_to; \
++ void __user *__cu_to; \
+ const void *__cu_from; \
+ long __cu_len; \
+ \
+@@ -505,7 +494,7 @@ extern size_t __copy_user(void *__to, co
+ #define __invoke_copy_from_user(to,from,n) \
+ ({ \
+ register void *__cu_to_r __asm__ ("$4"); \
+- register const void *__cu_from_r __asm__ ("$5"); \
++ register const void __user *__cu_from_r __asm__ ("$5"); \
+ register long __cu_len_r __asm__ ("$6"); \
+ \
+ __cu_to_r = (to); \
+@@ -544,7 +533,7 @@ extern size_t __copy_user(void *__to, co
+ #define __copy_from_user(to,from,n) \
+ ({ \
+ void *__cu_to; \
+- const void *__cu_from; \
++ const void __user *__cu_from; \
+ long __cu_len; \
+ \
+ might_sleep(); \
+@@ -575,7 +564,7 @@ extern size_t __copy_user(void *__to, co
+ #define copy_from_user(to,from,n) \
+ ({ \
+ void *__cu_to; \
+- const void *__cu_from; \
++ const void __user *__cu_from; \
+ long __cu_len; \
+ \
+ might_sleep(); \
+@@ -592,8 +581,8 @@ extern size_t __copy_user(void *__to, co
+
+ #define copy_in_user(to,from,n) \
+ ({ \
+- void *__cu_to; \
+- const void *__cu_from; \
++ void __user *__cu_to; \
++ const void __user *__cu_from; \
+ long __cu_len; \
+ \
+ might_sleep(); \
+@@ -619,7 +608,7 @@ extern size_t __copy_user(void *__to, co
+ * On success, this will be zero.
+ */
+ static inline __kernel_size_t
+-__clear_user(void *addr, __kernel_size_t size)
++__clear_user(void __user *addr, __kernel_size_t size)
+ {
+ __kernel_size_t res;
+
+@@ -639,7 +628,7 @@ __clear_user(void *addr, __kernel_size_t
+
+ #define clear_user(addr,n) \
+ ({ \
+- void * __cl_addr = (addr); \
++ void __user * __cl_addr = (addr); \
+ unsigned long __cl_size = (n); \
+ if (__cl_size && access_ok(VERIFY_WRITE, \
+ ((unsigned long)(__cl_addr)), __cl_size)) \
+@@ -668,7 +657,7 @@ __clear_user(void *addr, __kernel_size_t
+ * and returns @count.
+ */
+ static inline long
+-__strncpy_from_user(char *__to, const char *__from, long __len)
++__strncpy_from_user(char *__to, const char __user *__from, long __len)
+ {
+ long res;
+
+@@ -705,7 +694,7 @@ __strncpy_from_user(char *__to, const ch
+ * and returns @count.
+ */
+ static inline long
+-strncpy_from_user(char *__to, const char *__from, long __len)
++strncpy_from_user(char *__to, const char __user *__from, long __len)
+ {
+ long res;
+
+@@ -724,7 +713,7 @@ strncpy_from_user(char *__to, const char
+ }
+
+ /* Returns: 0 if bad, string length+1 (memory size) of string if ok */
+-static inline long __strlen_user(const char *s)
++static inline long __strlen_user(const char __user *s)
+ {
+ long res;
+
+@@ -754,7 +743,7 @@ static inline long __strlen_user(const c
+ * If there is a limit on the length of a valid string, you may wish to
+ * consider using strnlen_user() instead.
+ */
+-static inline long strlen_user(const char *s)
++static inline long strlen_user(const char __user *s)
+ {
+ long res;
+
+@@ -771,7 +760,7 @@ static inline long strlen_user(const cha
+ }
+
+ /* Returns: 0 if bad, string length+1 (memory size) of string if ok */
+-static inline long __strnlen_user(const char *s, long n)
++static inline long __strnlen_user(const char __user *s, long n)
+ {
+ long res;
+
+@@ -802,7 +791,7 @@ static inline long __strnlen_user(const
+ * If there is a limit on the length of a valid string, you may wish to
+ * consider using strnlen_user() instead.
+ */
+-static inline long strnlen_user(const char *s, long n)
++static inline long strnlen_user(const char __user *s, long n)
+ {
+ long res;
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/unistd.h linux_HEAD/include/asm-mips/unistd.h
+--- linux-2.6.12/include/asm-mips/unistd.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/unistd.h 2005-04-13 19:06:39.000000000 +0200
+@@ -303,16 +303,17 @@
+ #define __NR_add_key (__NR_Linux + 280)
+ #define __NR_request_key (__NR_Linux + 281)
+ #define __NR_keyctl (__NR_Linux + 282)
++#define __NR_set_thread_area (__NR_Linux + 283)
+
+ /*
+ * Offset of the last Linux o32 flavoured syscall
+ */
+-#define __NR_Linux_syscalls 282
++#define __NR_Linux_syscalls 283
+
+ #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+ #define __NR_O32_Linux 4000
+-#define __NR_O32_Linux_syscalls 282
++#define __NR_O32_Linux_syscalls 283
+
+ #if _MIPS_SIM == _MIPS_SIM_ABI64
+
+@@ -562,16 +563,17 @@
+ #define __NR_add_key (__NR_Linux + 239)
+ #define __NR_request_key (__NR_Linux + 240)
+ #define __NR_keyctl (__NR_Linux + 241)
++#define __NR_set_thread_area (__NR_Linux + 242)
+
+ /*
+ * Offset of the last Linux 64-bit flavoured syscall
+ */
+-#define __NR_Linux_syscalls 241
++#define __NR_Linux_syscalls 242
+
+ #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
+
+ #define __NR_64_Linux 5000
+-#define __NR_64_Linux_syscalls 241
++#define __NR_64_Linux_syscalls 242
+
+ #if _MIPS_SIM == _MIPS_SIM_NABI32
+
+@@ -825,16 +827,17 @@
+ #define __NR_add_key (__NR_Linux + 243)
+ #define __NR_request_key (__NR_Linux + 244)
+ #define __NR_keyctl (__NR_Linux + 245)
++#define __NR_set_thread_area (__NR_Linux + 246)
+
+ /*
+ * Offset of the last N32 flavoured syscall
+ */
+-#define __NR_Linux_syscalls 245
++#define __NR_Linux_syscalls 246
+
+ #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
+
+ #define __NR_N32_Linux 6000
+-#define __NR_N32_Linux_syscalls 245
++#define __NR_N32_Linux_syscalls 246
+
+ #ifndef __ASSEMBLY__
+
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/vr4181/irq.h linux_HEAD/include/asm-mips/vr4181/irq.h
+--- linux-2.6.12/include/asm-mips/vr4181/irq.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/vr4181/irq.h 1970-01-01 01:00:00.000000000 +0100
+@@ -1,122 +0,0 @@
+-/*
+- * Macros for vr4181 IRQ numbers.
+- *
+- * Copyright (C) 2001 MontaVista Software Inc.
+- * Author: Jun Sun, jsun at mvista.com or jsun at junsun.net
+- *
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms of the GNU General Public License as published by the
+- * Free Software Foundation; either version 2 of the License, or (at your
+- * option) any later version.
+- *
+- */
+-
+-/*
+- * Strategy:
+- *
+- * Vr4181 has conceptually three levels of interrupt controllers:
+- * 1. the CPU itself with 8 intr level.
+- * 2. system interrupt controller, cascaded from int0 pin in CPU, 32 intrs
+- * 3. GPIO interrupts : forwarding external interrupts to sys intr controller
+- */
+-
+-/* decide the irq block assignment */
+-#define VR4181_NUM_CPU_IRQ 8
+-#define VR4181_NUM_SYS_IRQ 32
+-#define VR4181_NUM_GPIO_IRQ 16
+-
+-#define VR4181_IRQ_BASE 0
+-
+-#define VR4181_CPU_IRQ_BASE VR4181_IRQ_BASE
+-#define VR4181_SYS_IRQ_BASE (VR4181_CPU_IRQ_BASE + VR4181_NUM_CPU_IRQ)
+-#define VR4181_GPIO_IRQ_BASE (VR4181_SYS_IRQ_BASE + VR4181_NUM_SYS_IRQ)
+-
+-/* CPU interrupts */
+-
+-/*
+- IP0 - Software interrupt
+- IP1 - Software interrupt
+- IP2 - All but battery, high speed modem, and real time clock
+- IP3 - RTC Long1 (system timer)
+- IP4 - RTC Long2
+- IP5 - High Speed Modem (unused on VR4181)
+- IP6 - Unused
+- IP7 - Timer interrupt from CPO_COMPARE
+-*/
+-
+-#define VR4181_IRQ_SW1 (VR4181_CPU_IRQ_BASE + 0)
+-#define VR4181_IRQ_SW2 (VR4181_CPU_IRQ_BASE + 1)
+-#define VR4181_IRQ_INT0 (VR4181_CPU_IRQ_BASE + 2)
+-#define VR4181_IRQ_INT1 (VR4181_CPU_IRQ_BASE + 3)
+-#define VR4181_IRQ_INT2 (VR4181_CPU_IRQ_BASE + 4)
+-#define VR4181_IRQ_INT3 (VR4181_CPU_IRQ_BASE + 5)
+-#define VR4181_IRQ_INT4 (VR4181_CPU_IRQ_BASE + 6)
+-#define VR4181_IRQ_TIMER (VR4181_CPU_IRQ_BASE + 7)
+-
+-
+-/* Cascaded from VR4181_IRQ_INT0 (ICU mapped interrupts) */
+-
+-/*
+- IP2 - same as VR4181_IRQ_INT1
+- IP8 - This is a cascade to GPIO IRQ's. Do not use.
+- IP16 - same as VR4181_IRQ_INT2
+- IP18 - CompactFlash
+-*/
+-
+-#define VR4181_IRQ_BATTERY (VR4181_SYS_IRQ_BASE + 0)
+-#define VR4181_IRQ_POWER (VR4181_SYS_IRQ_BASE + 1)
+-#define VR4181_IRQ_RTCL1 (VR4181_SYS_IRQ_BASE + 2)
+-#define VR4181_IRQ_ETIMER (VR4181_SYS_IRQ_BASE + 3)
+-#define VR4181_IRQ_RFU12 (VR4181_SYS_IRQ_BASE + 4)
+-#define VR4181_IRQ_PIU (VR4181_SYS_IRQ_BASE + 5)
+-#define VR4181_IRQ_AIU (VR4181_SYS_IRQ_BASE + 6)
+-#define VR4181_IRQ_KIU (VR4181_SYS_IRQ_BASE + 7)
+-#define VR4181_IRQ_GIU (VR4181_SYS_IRQ_BASE + 8)
+-#define VR4181_IRQ_SIU (VR4181_SYS_IRQ_BASE + 9)
+-#define VR4181_IRQ_RFU18 (VR4181_SYS_IRQ_BASE + 10)
+-#define VR4181_IRQ_SOFT (VR4181_SYS_IRQ_BASE + 11)
+-#define VR4181_IRQ_RFU20 (VR4181_SYS_IRQ_BASE + 12)
+-#define VR4181_IRQ_DOZEPIU (VR4181_SYS_IRQ_BASE + 13)
+-#define VR4181_IRQ_RFU22 (VR4181_SYS_IRQ_BASE + 14)
+-#define VR4181_IRQ_RFU23 (VR4181_SYS_IRQ_BASE + 15)
+-#define VR4181_IRQ_RTCL2 (VR4181_SYS_IRQ_BASE + 16)
+-#define VR4181_IRQ_LED (VR4181_SYS_IRQ_BASE + 17)
+-#define VR4181_IRQ_ECU (VR4181_SYS_IRQ_BASE + 18)
+-#define VR4181_IRQ_CSU (VR4181_SYS_IRQ_BASE + 19)
+-#define VR4181_IRQ_USB (VR4181_SYS_IRQ_BASE + 20)
+-#define VR4181_IRQ_DMA (VR4181_SYS_IRQ_BASE + 21)
+-#define VR4181_IRQ_LCD (VR4181_SYS_IRQ_BASE + 22)
+-#define VR4181_IRQ_RFU31 (VR4181_SYS_IRQ_BASE + 23)
+-#define VR4181_IRQ_RFU32 (VR4181_SYS_IRQ_BASE + 24)
+-#define VR4181_IRQ_RFU33 (VR4181_SYS_IRQ_BASE + 25)
+-#define VR4181_IRQ_RFU34 (VR4181_SYS_IRQ_BASE + 26)
+-#define VR4181_IRQ_RFU35 (VR4181_SYS_IRQ_BASE + 27)
+-#define VR4181_IRQ_RFU36 (VR4181_SYS_IRQ_BASE + 28)
+-#define VR4181_IRQ_RFU37 (VR4181_SYS_IRQ_BASE + 29)
+-#define VR4181_IRQ_RFU38 (VR4181_SYS_IRQ_BASE + 30)
+-#define VR4181_IRQ_RFU39 (VR4181_SYS_IRQ_BASE + 31)
+-
+-/* Cascaded from VR4181_IRQ_GIU */
+-#define VR4181_IRQ_GPIO0 (VR4181_GPIO_IRQ_BASE + 0)
+-#define VR4181_IRQ_GPIO1 (VR4181_GPIO_IRQ_BASE + 1)
+-#define VR4181_IRQ_GPIO2 (VR4181_GPIO_IRQ_BASE + 2)
+-#define VR4181_IRQ_GPIO3 (VR4181_GPIO_IRQ_BASE + 3)
+-#define VR4181_IRQ_GPIO4 (VR4181_GPIO_IRQ_BASE + 4)
+-#define VR4181_IRQ_GPIO5 (VR4181_GPIO_IRQ_BASE + 5)
+-#define VR4181_IRQ_GPIO6 (VR4181_GPIO_IRQ_BASE + 6)
+-#define VR4181_IRQ_GPIO7 (VR4181_GPIO_IRQ_BASE + 7)
+-#define VR4181_IRQ_GPIO8 (VR4181_GPIO_IRQ_BASE + 8)
+-#define VR4181_IRQ_GPIO9 (VR4181_GPIO_IRQ_BASE + 9)
+-#define VR4181_IRQ_GPIO10 (VR4181_GPIO_IRQ_BASE + 10)
+-#define VR4181_IRQ_GPIO11 (VR4181_GPIO_IRQ_BASE + 11)
+-#define VR4181_IRQ_GPIO12 (VR4181_GPIO_IRQ_BASE + 12)
+-#define VR4181_IRQ_GPIO13 (VR4181_GPIO_IRQ_BASE + 13)
+-#define VR4181_IRQ_GPIO14 (VR4181_GPIO_IRQ_BASE + 14)
+-#define VR4181_IRQ_GPIO15 (VR4181_GPIO_IRQ_BASE + 15)
+-
+-
+-// Alternative to above GPIO IRQ defines
+-#define VR4181_IRQ_GPIO(pin) ((VR4181_IRQ_GPIO0) + (pin))
+-
+-#define VR4181_IRQ_MAX (VR4181_IRQ_BASE + VR4181_NUM_CPU_IRQ + \
+- VR4181_NUM_SYS_IRQ + VR4181_NUM_GPIO_IRQ)
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/vr4181/vr4181.h linux_HEAD/include/asm-mips/vr4181/vr4181.h
+--- linux-2.6.12/include/asm-mips/vr4181/vr4181.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/vr4181/vr4181.h 1970-01-01 01:00:00.000000000 +0100
+@@ -1,413 +0,0 @@
+-/*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 1999 by Michael Klar
+- *
+- * Copyright 2001 MontaVista Software Inc.
+- * Author: jsun at mvista.com or jsun at junsun.net
+- *
+- */
+-#ifndef __ASM_VR4181_VR4181_H
+-#define __ASM_VR4181_VR4181_H
+-
+-#include <asm/addrspace.h>
+-
+-#include <asm/vr4181/irq.h>
+-
+-#ifndef __ASSEMBLY__
+-#define __preg8 (volatile unsigned char*)
+-#define __preg16 (volatile unsigned short*)
+-#define __preg32 (volatile unsigned int*)
+-#else
+-#define __preg8
+-#define __preg16
+-#define __preg32
+-#endif
+-
+-// Embedded CPU peripheral registers
+-// Note that many of the registers have different physical address for VR4181
+-
+-// Bus Control Unit (BCU)
+-#define VR4181_BCUCNTREG1 __preg16(KSEG1 + 0x0A000000) /* BCU control register 1 (R/W) */
+-#define VR4181_CMUCLKMSK __preg16(KSEG1 + 0x0A000004) /* Clock mask register (R/W) */
+-#define VR4181_CMUCLKMSK_MSKCSUPCLK 0x0040
+-#define VR4181_CMUCLKMSK_MSKAIUPCLK 0x0020
+-#define VR4181_CMUCLKMSK_MSKPIUPCLK 0x0010
+-#define VR4181_CMUCLKMSK_MSKADUPCLK 0x0008
+-#define VR4181_CMUCLKMSK_MSKSIU18M 0x0004
+-#define VR4181_CMUCLKMSK_MSKADU18M 0x0002
+-#define VR4181_CMUCLKMSK_MSKUSB 0x0001
+-#define VR4181_CMUCLKMSK_MSKSIU VR4181_CMUCLKMSK_MSKSIU18M
+-#define VR4181_BCUSPEEDREG __preg16(KSEG1 + 0x0A00000C) /* BCU access time parameter (R/W) */
+-#define VR4181_BCURFCNTREG __preg16(KSEG1 + 0x0A000010) /* BCU refresh control register (R/W) */
+-#define VR4181_REVIDREG __preg16(KSEG1 + 0x0A000014) /* Revision ID register (R) */
+-#define VR4181_CLKSPEEDREG __preg16(KSEG1 + 0x0A000018) /* Clock speed register (R) */
+-#define VR4181_EDOMCYTREG __preg16(KSEG1 + 0x0A000300) /* Memory cycle timing register (R/W) */
+-#define VR4181_MEMCFG_REG __preg16(KSEG1 + 0x0A000304) /* Memory configuration register (R/W) */
+-#define VR4181_MODE_REG __preg16(KSEG1 + 0x0A000308) /* SDRAM mode register (R/W) */
+-#define VR4181_SDTIMINGREG __preg16(KSEG1 + 0x0A00030C) /* SDRAM timing register (R/W) */
+-
+-// DMA Control Unit (DCU)
+-#define VR4181_MICDEST1REG1 __preg16(KSEG1 + 0x0A000020) /* Microphone destination 1 address register 1 (R/W) */
+-#define VR4181_MICDEST1REG2 __preg16(KSEG1 + 0x0A000022) /* Microphone destination 1 address register 2 (R/W) */
+-#define VR4181_MICDEST2REG1 __preg16(KSEG1 + 0x0A000024) /* Microphone destination 2 address register 1 (R/W) */
+-#define VR4181_MICDEST2REG2 __preg16(KSEG1 + 0x0A000026) /* Microphone destination 2 address register 2 (R/W) */
+-#define VR4181_SPKRRC1REG1 __preg16(KSEG1 + 0x0A000028) /* Speaker Source 1 address register 1 (R/W) */
+-#define VR4181_SPKRRC1REG2 __preg16(KSEG1 + 0x0A00002A) /* Speaker Source 1 address register 2 (R/W) */
+-#define VR4181_SPKRRC2REG1 __preg16(KSEG1 + 0x0A00002C) /* Speaker Source 2 address register 1 (R/W) */
+-#define VR4181_SPKRRC2REG2 __preg16(KSEG1 + 0x0A00002E) /* Speaker Source 2 address register 2 (R/W) */
+-#define VR4181_DMARSTREG __preg16(KSEG1 + 0x0A000040) /* DMA Reset register (R/W) */
+-#define VR4181_AIUDMAMSKREG __preg16(KSEG1 + 0x0A000046) /* Audio DMA mask register (R/W) */
+-#define VR4181_USBDMAMSKREG __preg16(KSEG1 + 0x0A000600) /* USB DMA Mask register (R/W) */
+-#define VR4181_USBRXS1AREG1 __preg16(KSEG1 + 0x0A000602) /* USB Rx source 1 address register 1 (R/W) */
+-#define VR4181_USBRXS1AREG2 __preg16(KSEG1 + 0x0A000604) /* USB Rx source 1 address register 2 (R/W) */
+-#define VR4181_USBRXS2AREG1 __preg16(KSEG1 + 0x0A000606) /* USB Rx source 2 address register 1 (R/W) */
+-#define VR4181_USBRXS2AREG2 __preg16(KSEG1 + 0x0A000608) /* USB Rx source 2 address register 2 (R/W) */
+-#define VR4181_USBTXS1AREG1 __preg16(KSEG1 + 0x0A00060A) /* USB Tx source 1 address register 1 (R/W) */
+-#define VR4181_USBTXS1AREG2 __preg16(KSEG1 + 0x0A00060C) /* USB Tx source 1 address register 2 (R/W) */
+-#define VR4181_USBTXS2AREG1 __preg16(KSEG1 + 0x0A00060E) /* USB Tx source 2 address register 1 (R/W) */
+-#define VR4181_USBTXS2AREG2 __preg16(KSEG1 + 0x0A000610) /* USB Tx source 2 address register 2 (R/W) */
+-#define VR4181_USBRXD1AREG1 __preg16(KSEG1 + 0x0A00062A) /* USB Rx destination 1 address register 1 (R/W) */
+-#define VR4181_USBRXD1AREG2 __preg16(KSEG1 + 0x0A00062C) /* USB Rx destination 1 address register 2 (R/W) */
+-#define VR4181_USBRXD2AREG1 __preg16(KSEG1 + 0x0A00062E) /* USB Rx destination 2 address register 1 (R/W) */
+-#define VR4181_USBRXD2AREG2 __preg16(KSEG1 + 0x0A000630) /* USB Rx destination 2 address register 2 (R/W) */
+-#define VR4181_USBTXD1AREG1 __preg16(KSEG1 + 0x0A000632) /* USB Tx destination 1 address register 1 (R/W) */
+-#define VR4181_USBTXD1AREG2 __preg16(KSEG1 + 0x0A000634) /* USB Tx destination 1 address register 2 (R/W) */
+-#define VR4181_USBTXD2AREG1 __preg16(KSEG1 + 0x0A000636) /* USB Tx destination 2 address register 1 (R/W) */
+-#define VR4181_USBTXD2AREG2 __preg16(KSEG1 + 0x0A000638) /* USB Tx destination 2 address register 2 (R/W) */
+-#define VR4181_RxRCLENREG __preg16(KSEG1 + 0x0A000652) /* USB Rx record length register (R/W) */
+-#define VR4181_TxRCLENREG __preg16(KSEG1 + 0x0A000654) /* USB Tx record length register (R/W) */
+-#define VR4181_MICRCLENREG __preg16(KSEG1 + 0x0A000658) /* Microphone record length register (R/W) */
+-#define VR4181_SPKRCLENREG __preg16(KSEG1 + 0x0A00065A) /* Speaker record length register (R/W) */
+-#define VR4181_USBCFGREG __preg16(KSEG1 + 0x0A00065C) /* USB configuration register (R/W) */
+-#define VR4181_MICDMACFGREG __preg16(KSEG1 + 0x0A00065E) /* Microphone DMA configuration register (R/W) */
+-#define VR4181_SPKDMACFGREG __preg16(KSEG1 + 0x0A000660) /* Speaker DMA configuration register (R/W) */
+-#define VR4181_DMAITRQREG __preg16(KSEG1 + 0x0A000662) /* DMA interrupt request register (R/W) */
+-#define VR4181_DMACLTREG __preg16(KSEG1 + 0x0A000664) /* DMA control register (R/W) */
+-#define VR4181_DMAITMKREG __preg16(KSEG1 + 0x0A000666) /* DMA interrupt mask register (R/W) */
+-
+-// ISA Bridge
+-#define VR4181_ISABRGCTL __preg16(KSEG1 + 0x0B0002C0) /* ISA Bridge Control Register (R/W) */
+-#define VR4181_ISABRGSTS __preg16(KSEG1 + 0x0B0002C2) /* ISA Bridge Status Register (R/W) */
+-#define VR4181_XISACTL __preg16(KSEG1 + 0x0B0002C4) /* External ISA Control Register (R/W) */
+-
+-// Clocked Serial Interface (CSI)
+-#define VR4181_CSIMODE __preg16(KSEG1 + 0x0B000900) /* CSI Mode Register (R/W) */
+-#define VR4181_CSIRXDATA __preg16(KSEG1 + 0x0B000902) /* CSI Receive Data Register (R) */
+-#define VR4181_CSITXDATA __preg16(KSEG1 + 0x0B000904) /* CSI Transmit Data Register (R/W) */
+-#define VR4181_CSILSTAT __preg16(KSEG1 + 0x0B000906) /* CSI Line Status Register (R/W) */
+-#define VR4181_CSIINTMSK __preg16(KSEG1 + 0x0B000908) /* CSI Interrupt Mask Register (R/W) */
+-#define VR4181_CSIINTSTAT __preg16(KSEG1 + 0x0B00090a) /* CSI Interrupt Status Register (R/W) */
+-#define VR4181_CSITXBLEN __preg16(KSEG1 + 0x0B00090c) /* CSI Transmit Burst Length Register (R/W) */
+-#define VR4181_CSIRXBLEN __preg16(KSEG1 + 0x0B00090e) /* CSI Receive Burst Length Register (R/W) */
+-
+-// Interrupt Control Unit (ICU)
+-#define VR4181_SYSINT1REG __preg16(KSEG1 + 0x0A000080) /* Level 1 System interrupt register 1 (R) */
+-#define VR4181_MSYSINT1REG __preg16(KSEG1 + 0x0A00008C) /* Level 1 mask system interrupt register 1 (R/W) */
+-#define VR4181_NMIREG __preg16(KSEG1 + 0x0A000098) /* NMI register (R/W) */
+-#define VR4181_SOFTINTREG __preg16(KSEG1 + 0x0A00009A) /* Software interrupt register (R/W) */
+-#define VR4181_SYSINT2REG __preg16(KSEG1 + 0x0A000200) /* Level 1 System interrupt register 2 (R) */
+-#define VR4181_MSYSINT2REG __preg16(KSEG1 + 0x0A000206) /* Level 1 mask system interrupt register 2 (R/W) */
+-#define VR4181_PIUINTREGro __preg16(KSEG1 + 0x0B000082) /* Level 2 PIU interrupt register (R) */
+-#define VR4181_AIUINTREG __preg16(KSEG1 + 0x0B000084) /* Level 2 AIU interrupt register (R) */
+-#define VR4181_MPIUINTREG __preg16(KSEG1 + 0x0B00008E) /* Level 2 mask PIU interrupt register (R/W) */
+-#define VR4181_MAIUINTREG __preg16(KSEG1 + 0x0B000090) /* Level 2 mask AIU interrupt register (R/W) */
+-#define VR4181_MKIUINTREG __preg16(KSEG1 + 0x0B000092) /* Level 2 mask KIU interrupt register (R/W) */
+-#define VR4181_KIUINTREG __preg16(KSEG1 + 0x0B000198) /* Level 2 KIU interrupt register (R) */
+-
+-// Power Management Unit (PMU)
+-#define VR4181_PMUINTREG __preg16(KSEG1 + 0x0B0000A0) /* PMU Status Register (R/W) */
+-#define VR4181_PMUINT_POWERSW 0x1 /* Power switch */
+-#define VR4181_PMUINT_BATT 0x2 /* Low batt during normal operation */
+-#define VR4181_PMUINT_DEADMAN 0x4 /* Deadman's switch */
+-#define VR4181_PMUINT_RESET 0x8 /* Reset switch */
+-#define VR4181_PMUINT_RTCRESET 0x10 /* RTC Reset */
+-#define VR4181_PMUINT_TIMEOUT 0x20 /* HAL Timer Reset */
+-#define VR4181_PMUINT_BATTLOW 0x100 /* Battery low */
+-#define VR4181_PMUINT_RTC 0x200 /* RTC Alarm */
+-#define VR4181_PMUINT_DCD 0x400 /* DCD# */
+-#define VR4181_PMUINT_GPIO0 0x1000 /* GPIO0 */
+-#define VR4181_PMUINT_GPIO1 0x2000 /* GPIO1 */
+-#define VR4181_PMUINT_GPIO2 0x4000 /* GPIO2 */
+-#define VR4181_PMUINT_GPIO3 0x8000 /* GPIO3 */
+-
+-#define VR4181_PMUCNTREG __preg16(KSEG1 + 0x0B0000A2) /* PMU Control Register (R/W) */
+-#define VR4181_PMUWAITREG __preg16(KSEG1 + 0x0B0000A8) /* PMU Wait Counter Register (R/W) */
+-#define VR4181_PMUDIVREG __preg16(KSEG1 + 0x0B0000AC) /* PMU Divide Mode Register (R/W) */
+-#define VR4181_DRAMHIBCTL __preg16(KSEG1 + 0x0B0000B2) /* DRAM Hibernate Control Register (R/W) */
+-
+-// Real Time Clock Unit (RTC)
+-#define VR4181_ETIMELREG __preg16(KSEG1 + 0x0B0000C0) /* Elapsed Time L Register (R/W) */
+-#define VR4181_ETIMEMREG __preg16(KSEG1 + 0x0B0000C2) /* Elapsed Time M Register (R/W) */
+-#define VR4181_ETIMEHREG __preg16(KSEG1 + 0x0B0000C4) /* Elapsed Time H Register (R/W) */
+-#define VR4181_ECMPLREG __preg16(KSEG1 + 0x0B0000C8) /* Elapsed Compare L Register (R/W) */
+-#define VR4181_ECMPMREG __preg16(KSEG1 + 0x0B0000CA) /* Elapsed Compare M Register (R/W) */
+-#define VR4181_ECMPHREG __preg16(KSEG1 + 0x0B0000CC) /* Elapsed Compare H Register (R/W) */
+-#define VR4181_RTCL1LREG __preg16(KSEG1 + 0x0B0000D0) /* RTC Long 1 L Register (R/W) */
+-#define VR4181_RTCL1HREG __preg16(KSEG1 + 0x0B0000D2) /* RTC Long 1 H Register (R/W) */
+-#define VR4181_RTCL1CNTLREG __preg16(KSEG1 + 0x0B0000D4) /* RTC Long 1 Count L Register (R) */
+-#define VR4181_RTCL1CNTHREG __preg16(KSEG1 + 0x0B0000D6) /* RTC Long 1 Count H Register (R) */
+-#define VR4181_RTCL2LREG __preg16(KSEG1 + 0x0B0000D8) /* RTC Long 2 L Register (R/W) */
+-#define VR4181_RTCL2HREG __preg16(KSEG1 + 0x0B0000DA) /* RTC Long 2 H Register (R/W) */
+-#define VR4181_RTCL2CNTLREG __preg16(KSEG1 + 0x0B0000DC) /* RTC Long 2 Count L Register (R) */
+-#define VR4181_RTCL2CNTHREG __preg16(KSEG1 + 0x0B0000DE) /* RTC Long 2 Count H Register (R) */
+-#define VR4181_RTCINTREG __preg16(KSEG1 + 0x0B0001DE) /* RTC Interrupt Register (R/W) */
+-
+-// Deadman's Switch Unit (DSU)
+-#define VR4181_DSUCNTREG __preg16(KSEG1 + 0x0B0000E0) /* DSU Control Register (R/W) */
+-#define VR4181_DSUSETREG __preg16(KSEG1 + 0x0B0000E2) /* DSU Dead Time Set Register (R/W) */
+-#define VR4181_DSUCLRREG __preg16(KSEG1 + 0x0B0000E4) /* DSU Clear Register (W) */
+-#define VR4181_DSUTIMREG __preg16(KSEG1 + 0x0B0000E6) /* DSU Elapsed Time Register (R/W) */
+-
+-// General Purpose I/O Unit (GIU)
+-#define VR4181_GPMD0REG __preg16(KSEG1 + 0x0B000300) /* GPIO Mode 0 Register (R/W) */
+-#define VR4181_GPMD1REG __preg16(KSEG1 + 0x0B000302) /* GPIO Mode 1 Register (R/W) */
+-#define VR4181_GPMD2REG __preg16(KSEG1 + 0x0B000304) /* GPIO Mode 2 Register (R/W) */
+-#define VR4181_GPMD3REG __preg16(KSEG1 + 0x0B000306) /* GPIO Mode 3 Register (R/W) */
+-#define VR4181_GPDATHREG __preg16(KSEG1 + 0x0B000308) /* GPIO Data High Register (R/W) */
+-#define VR4181_GPDATHREG_GPIO16 0x0001
+-#define VR4181_GPDATHREG_GPIO17 0x0002
+-#define VR4181_GPDATHREG_GPIO18 0x0004
+-#define VR4181_GPDATHREG_GPIO19 0x0008
+-#define VR4181_GPDATHREG_GPIO20 0x0010
+-#define VR4181_GPDATHREG_GPIO21 0x0020
+-#define VR4181_GPDATHREG_GPIO22 0x0040
+-#define VR4181_GPDATHREG_GPIO23 0x0080
+-#define VR4181_GPDATHREG_GPIO24 0x0100
+-#define VR4181_GPDATHREG_GPIO25 0x0200
+-#define VR4181_GPDATHREG_GPIO26 0x0400
+-#define VR4181_GPDATHREG_GPIO27 0x0800
+-#define VR4181_GPDATHREG_GPIO28 0x1000
+-#define VR4181_GPDATHREG_GPIO29 0x2000
+-#define VR4181_GPDATHREG_GPIO30 0x4000
+-#define VR4181_GPDATHREG_GPIO31 0x8000
+-#define VR4181_GPDATLREG __preg16(KSEG1 + 0x0B00030A) /* GPIO Data Low Register (R/W) */
+-#define VR4181_GPDATLREG_GPIO0 0x0001
+-#define VR4181_GPDATLREG_GPIO1 0x0002
+-#define VR4181_GPDATLREG_GPIO2 0x0004
+-#define VR4181_GPDATLREG_GPIO3 0x0008
+-#define VR4181_GPDATLREG_GPIO4 0x0010
+-#define VR4181_GPDATLREG_GPIO5 0x0020
+-#define VR4181_GPDATLREG_GPIO6 0x0040
+-#define VR4181_GPDATLREG_GPIO7 0x0080
+-#define VR4181_GPDATLREG_GPIO8 0x0100
+-#define VR4181_GPDATLREG_GPIO9 0x0200
+-#define VR4181_GPDATLREG_GPIO10 0x0400
+-#define VR4181_GPDATLREG_GPIO11 0x0800
+-#define VR4181_GPDATLREG_GPIO12 0x1000
+-#define VR4181_GPDATLREG_GPIO13 0x2000
+-#define VR4181_GPDATLREG_GPIO14 0x4000
+-#define VR4181_GPDATLREG_GPIO15 0x8000
+-#define VR4181_GPINTEN __preg16(KSEG1 + 0x0B00030C) /* GPIO Interrupt Enable Register (R/W) */
+-#define VR4181_GPINTMSK __preg16(KSEG1 + 0x0B00030E) /* GPIO Interrupt Mask Register (R/W) */
+-#define VR4181_GPINTTYPH __preg16(KSEG1 + 0x0B000310) /* GPIO Interrupt Type High Register (R/W) */
+-#define VR4181_GPINTTYPL __preg16(KSEG1 + 0x0B000312) /* GPIO Interrupt Type Low Register (R/W) */
+-#define VR4181_GPINTSTAT __preg16(KSEG1 + 0x0B000314) /* GPIO Interrupt Status Register (R/W) */
+-#define VR4181_GPHIBSTH __preg16(KSEG1 + 0x0B000316) /* GPIO Hibernate Pin State High Register (R/W) */
+-#define VR4181_GPHIBSTL __preg16(KSEG1 + 0x0B000318) /* GPIO Hibernate Pin State Low Register (R/W) */
+-#define VR4181_GPSICTL __preg16(KSEG1 + 0x0B00031A) /* GPIO Serial Interface Control Register (R/W) */
+-#define VR4181_KEYEN __preg16(KSEG1 + 0x0B00031C) /* Keyboard Scan Pin Enable Register (R/W) */
+-#define VR4181_PCS0STRA __preg16(KSEG1 + 0x0B000320) /* Programmable Chip Select [0] Start Address Register (R/W) */
+-#define VR4181_PCS0STPA __preg16(KSEG1 + 0x0B000322) /* Programmable Chip Select [0] Stop Address Register (R/W) */
+-#define VR4181_PCS0HIA __preg16(KSEG1 + 0x0B000324) /* Programmable Chip Select [0] High Address Register (R/W) */
+-#define VR4181_PCS1STRA __preg16(KSEG1 + 0x0B000326) /* Programmable Chip Select [1] Start Address Register (R/W) */
+-#define VR4181_PCS1STPA __preg16(KSEG1 + 0x0B000328) /* Programmable Chip Select [1] Stop Address Register (R/W) */
+-#define VR4181_PCS1HIA __preg16(KSEG1 + 0x0B00032A) /* Programmable Chip Select [1] High Address Register (R/W) */
+-#define VR4181_PCSMODE __preg16(KSEG1 + 0x0B00032C) /* Programmable Chip Select Mode Register (R/W) */
+-#define VR4181_LCDGPMODE __preg16(KSEG1 + 0x0B00032E) /* LCD General Purpose Mode Register (R/W) */
+-#define VR4181_MISCREG0 __preg16(KSEG1 + 0x0B000330) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG1 __preg16(KSEG1 + 0x0B000332) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG2 __preg16(KSEG1 + 0x0B000334) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG3 __preg16(KSEG1 + 0x0B000336) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG4 __preg16(KSEG1 + 0x0B000338) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG5 __preg16(KSEG1 + 0x0B00033A) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG6 __preg16(KSEG1 + 0x0B00033C) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG7 __preg16(KSEG1 + 0x0B00033D) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG8 __preg16(KSEG1 + 0x0B000340) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG9 __preg16(KSEG1 + 0x0B000342) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG10 __preg16(KSEG1 + 0x0B000344) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG11 __preg16(KSEG1 + 0x0B000346) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG12 __preg16(KSEG1 + 0x0B000348) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG13 __preg16(KSEG1 + 0x0B00034A) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG14 __preg16(KSEG1 + 0x0B00034C) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_MISCREG15 __preg16(KSEG1 + 0x0B00034E) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
+-#define VR4181_SECIRQMASKL VR4181_GPINTEN
+-// No SECIRQMASKH for VR4181
+-
+-// Touch Panel Interface Unit (PIU)
+-#define VR4181_PIUCNTREG __preg16(KSEG1 + 0x0B000122) /* PIU Control register (R/W) */
+-#define VR4181_PIUCNTREG_PIUSEQEN 0x0004
+-#define VR4181_PIUCNTREG_PIUPWR 0x0002
+-#define VR4181_PIUCNTREG_PADRST 0x0001
+-
+-#define VR4181_PIUINTREG __preg16(KSEG1 + 0x0B000124) /* PIU Interrupt cause register (R/W) */
+-#define VR4181_PIUINTREG_OVP 0x8000
+-#define VR4181_PIUINTREG_PADCMD 0x0040
+-#define VR4181_PIUINTREG_PADADP 0x0020
+-#define VR4181_PIUINTREG_PADPAGE1 0x0010
+-#define VR4181_PIUINTREG_PADPAGE0 0x0008
+-#define VR4181_PIUINTREG_PADDLOST 0x0004
+-#define VR4181_PIUINTREG_PENCHG 0x0001
+-
+-#define VR4181_PIUSIVLREG __preg16(KSEG1 + 0x0B000126) /* PIU Data sampling interval register (R/W) */
+-#define VR4181_PIUSTBLREG __preg16(KSEG1 + 0x0B000128) /* PIU A/D converter start delay register (R/W) */
+-#define VR4181_PIUCMDREG __preg16(KSEG1 + 0x0B00012A) /* PIU A/D command register (R/W) */
+-#define VR4181_PIUASCNREG __preg16(KSEG1 + 0x0B000130) /* PIU A/D port scan register (R/W) */
+-#define VR4181_PIUAMSKREG __preg16(KSEG1 + 0x0B000132) /* PIU A/D scan mask register (R/W) */
+-#define VR4181_PIUCIVLREG __preg16(KSEG1 + 0x0B00013E) /* PIU Check interval register (R) */
+-#define VR4181_PIUPB00REG __preg16(KSEG1 + 0x0B0002A0) /* PIU Page 0 Buffer 0 register (R/W) */
+-#define VR4181_PIUPB01REG __preg16(KSEG1 + 0x0B0002A2) /* PIU Page 0 Buffer 1 register (R/W) */
+-#define VR4181_PIUPB02REG __preg16(KSEG1 + 0x0B0002A4) /* PIU Page 0 Buffer 2 register (R/W) */
+-#define VR4181_PIUPB03REG __preg16(KSEG1 + 0x0B0002A6) /* PIU Page 0 Buffer 3 register (R/W) */
+-#define VR4181_PIUPB10REG __preg16(KSEG1 + 0x0B0002A8) /* PIU Page 1 Buffer 0 register (R/W) */
+-#define VR4181_PIUPB11REG __preg16(KSEG1 + 0x0B0002AA) /* PIU Page 1 Buffer 1 register (R/W) */
+-#define VR4181_PIUPB12REG __preg16(KSEG1 + 0x0B0002AC) /* PIU Page 1 Buffer 2 register (R/W) */
+-#define VR4181_PIUPB13REG __preg16(KSEG1 + 0x0B0002AE) /* PIU Page 1 Buffer 3 register (R/W) */
+-#define VR4181_PIUAB0REG __preg16(KSEG1 + 0x0B0002B0) /* PIU A/D scan Buffer 0 register (R/W) */
+-#define VR4181_PIUAB1REG __preg16(KSEG1 + 0x0B0002B2) /* PIU A/D scan Buffer 1 register (R/W) */
+-#define VR4181_PIUAB2REG __preg16(KSEG1 + 0x0B0002B4) /* PIU A/D scan Buffer 2 register (R/W) */
+-#define VR4181_PIUAB3REG __preg16(KSEG1 + 0x0B0002B6) /* PIU A/D scan Buffer 3 register (R/W) */
+-#define VR4181_PIUPB04REG __preg16(KSEG1 + 0x0B0002BC) /* PIU Page 0 Buffer 4 register (R/W) */
+-#define VR4181_PIUPB14REG __preg16(KSEG1 + 0x0B0002BE) /* PIU Page 1 Buffer 4 register (R/W) */
+-
+-// Audio Interface Unit (AIU)
+-#define VR4181_SODATREG __preg16(KSEG1 + 0x0B000166) /* Speaker Output Data Register (R/W) */
+-#define VR4181_SCNTREG __preg16(KSEG1 + 0x0B000168) /* Speaker Output Control Register (R/W) */
+-#define VR4181_MIDATREG __preg16(KSEG1 + 0x0B000170) /* Mike Input Data Register (R/W) */
+-#define VR4181_MCNTREG __preg16(KSEG1 + 0x0B000172) /* Mike Input Control Register (R/W) */
+-#define VR4181_DVALIDREG __preg16(KSEG1 + 0x0B000178) /* Data Valid Register (R/W) */
+-#define VR4181_SEQREG __preg16(KSEG1 + 0x0B00017A) /* Sequential Register (R/W) */
+-#define VR4181_INTREG __preg16(KSEG1 + 0x0B00017C) /* Interrupt Register (R/W) */
+-#define VR4181_SDMADATREG __preg16(KSEG1 + 0x0B000160) /* Speaker DMA Data Register (R/W) */
+-#define VR4181_MDMADATREG __preg16(KSEG1 + 0x0B000162) /* Microphone DMA Data Register (R/W) */
+-#define VR4181_DAVREF_SETUP __preg16(KSEG1 + 0x0B000164) /* DAC Vref setup register (R/W) */
+-#define VR4181_SCNVC_END __preg16(KSEG1 + 0x0B00016E) /* Speaker sample rate control (R/W) */
+-#define VR4181_MIDATREG __preg16(KSEG1 + 0x0B000170) /* Microphone Input Data Register (R/W) */
+-#define VR4181_MCNTREG __preg16(KSEG1 + 0x0B000172) /* Microphone Input Control Register (R/W) */
+-#define VR4181_MCNVC_END __preg16(KSEG1 + 0x0B00017E) /* Microphone sample rate control (R/W) */
+-
+-// Keyboard Interface Unit (KIU)
+-#define VR4181_KIUDAT0 __preg16(KSEG1 + 0x0B000180) /* KIU Data0 Register (R/W) */
+-#define VR4181_KIUDAT1 __preg16(KSEG1 + 0x0B000182) /* KIU Data1 Register (R/W) */
+-#define VR4181_KIUDAT2 __preg16(KSEG1 + 0x0B000184) /* KIU Data2 Register (R/W) */
+-#define VR4181_KIUDAT3 __preg16(KSEG1 + 0x0B000186) /* KIU Data3 Register (R/W) */
+-#define VR4181_KIUDAT4 __preg16(KSEG1 + 0x0B000188) /* KIU Data4 Register (R/W) */
+-#define VR4181_KIUDAT5 __preg16(KSEG1 + 0x0B00018A) /* KIU Data5 Register (R/W) */
+-#define VR4181_KIUSCANREP __preg16(KSEG1 + 0x0B000190) /* KIU Scan/Repeat Register (R/W) */
+-#define VR4181_KIUSCANREP_KEYEN 0x8000
+-#define VR4181_KIUSCANREP_SCANSTP 0x0008
+-#define VR4181_KIUSCANREP_SCANSTART 0x0004
+-#define VR4181_KIUSCANREP_ATSTP 0x0002
+-#define VR4181_KIUSCANREP_ATSCAN 0x0001
+-#define VR4181_KIUSCANS __preg16(KSEG1 + 0x0B000192) /* KIU Scan Status Register (R) */
+-#define VR4181_KIUWKS __preg16(KSEG1 + 0x0B000194) /* KIU Wait Keyscan Stable Register (R/W) */
+-#define VR4181_KIUWKI __preg16(KSEG1 + 0x0B000196) /* KIU Wait Keyscan Interval Register (R/W) */
+-#define VR4181_KIUINT __preg16(KSEG1 + 0x0B000198) /* KIU Interrupt Register (R/W) */
+-#define VR4181_KIUINT_KDATLOST 0x0004
+-#define VR4181_KIUINT_KDATRDY 0x0002
+-#define VR4181_KIUINT_SCANINT 0x0001
+-#define VR4181_KIUDAT6 __preg16(KSEG1 + 0x0B00018C) /* Scan Line 6 Key Data Register (R) */
+-#define VR4181_KIUDAT7 __preg16(KSEG1 + 0x0B00018E) /* Scan Line 7 Key Data Register (R) */
+-
+-// CompactFlash Controller
+-#define VR4181_PCCARDINDEX __preg8(KSEG1 + 0x0B0008E0) /* PC Card Controller Index Register */
+-#define VR4181_PCCARDDATA __preg8(KSEG1 + 0x0B0008E1) /* PC Card Controller Data Register */
+-#define VR4181_INTSTATREG __preg16(KSEG1 + 0x0B0008F8) /* Interrupt Status Register (R/W) */
+-#define VR4181_INTMSKREG __preg16(KSEG1 + 0x0B0008FA) /* Interrupt Mask Register (R/W) */
+-#define VR4181_CFG_REG_1 __preg16(KSEG1 + 0x0B0008FE) /* Configuration Register 1 */
+-
+-// LED Control Unit (LED)
+-#define VR4181_LEDHTSREG __preg16(KSEG1 + 0x0B000240) /* LED H Time Set register (R/W) */
+-#define VR4181_LEDLTSREG __preg16(KSEG1 + 0x0B000242) /* LED L Time Set register (R/W) */
+-#define VR4181_LEDCNTREG __preg16(KSEG1 + 0x0B000248) /* LED Control register (R/W) */
+-#define VR4181_LEDASTCREG __preg16(KSEG1 + 0x0B00024A) /* LED Auto Stop Time Count register (R/W) */
+-#define VR4181_LEDINTREG __preg16(KSEG1 + 0x0B00024C) /* LED Interrupt register (R/W) */
+-
+-// Serial Interface Unit (SIU / SIU1 and SIU2)
+-#define VR4181_SIURB __preg8(KSEG1 + 0x0C000010) /* Receiver Buffer Register (Read) DLAB = 0 (R) */
+-#define VR4181_SIUTH __preg8(KSEG1 + 0x0C000010) /* Transmitter Holding Register (Write) DLAB = 0 (W) */
+-#define VR4181_SIUDLL __preg8(KSEG1 + 0x0C000010) /* Divisor Latch (Least Significant Byte) DLAB = 1 (R/W) */
+-#define VR4181_SIUIE __preg8(KSEG1 + 0x0C000011) /* Interrupt Enable DLAB = 0 (R/W) */
+-#define VR4181_SIUDLM __preg8(KSEG1 + 0x0C000011) /* Divisor Latch (Most Significant Byte) DLAB = 1 (R/W) */
+-#define VR4181_SIUIID __preg8(KSEG1 + 0x0C000012) /* Interrupt Identification Register (Read) (R) */
+-#define VR4181_SIUFC __preg8(KSEG1 + 0x0C000012) /* FIFO Control Register (Write) (W) */
+-#define VR4181_SIULC __preg8(KSEG1 + 0x0C000013) /* Line Control Register (R/W) */
+-#define VR4181_SIUMC __preg8(KSEG1 + 0x0C000014) /* MODEM Control Register (R/W) */
+-#define VR4181_SIULS __preg8(KSEG1 + 0x0C000015) /* Line Status Register (R/W) */
+-#define VR4181_SIUMS __preg8(KSEG1 + 0x0C000016) /* MODEM Status Register (R/W) */
+-#define VR4181_SIUSC __preg8(KSEG1 + 0x0C000017) /* Scratch Register (R/W) */
+-#define VR4181_SIURESET __preg8(KSEG1 + 0x0C000019) /* SIU Reset Register (R/W) */
+-#define VR4181_SIUACTMSK __preg8(KSEG1 + 0x0C00001C) /* SIU Activity Mask (R/W) */
+-#define VR4181_SIUACTTMR __preg8(KSEG1 + 0x0C00001E) /* SIU Activity Timer (R/W) */
+-#define VR4181_SIURB_2 __preg8(KSEG1 + 0x0C000000) /* Receive Buffer Register (Read) (R) */
+-#define VR4181_SIUTH_2 __preg8(KSEG1 + 0x0C000000) /* Transmitter Holding Register (Write) (W) */
+-#define VR4181_SIUDLL_2 __preg8(KSEG1 + 0x0C000000) /* Divisor Latch (Least Significant Byte) (R/W) */
+-#define VR4181_SIUIE_2 __preg8(KSEG1 + 0x0C000001) /* Interrupt Enable (DLAB = 0) (R/W) */
+-#define VR4181_SIUDLM_2 __preg8(KSEG1 + 0x0C000001) /* Divisor Latch (Most Significant Byte) (DLAB = 1) (R/W) */
+-#define VR4181_SIUIID_2 __preg8(KSEG1 + 0x0C000002) /* Interrupt Identification Register (Read) (R) */
+-#define VR4181_SIUFC_2 __preg8(KSEG1 + 0x0C000002) /* FIFO Control Register (Write) (W) */
+-#define VR4181_SIULC_2 __preg8(KSEG1 + 0x0C000003) /* Line Control Register (R/W) */
+-#define VR4181_SIUMC_2 __preg8(KSEG1 + 0x0C000004) /* Modem Control Register (R/W) */
+-#define VR4181_SIULS_2 __preg8(KSEG1 + 0x0C000005) /* Line Status Register (R/W) */
+-#define VR4181_SIUMS_2 __preg8(KSEG1 + 0x0C000006) /* Modem Status Register (R/W) */
+-#define VR4181_SIUSC_2 __preg8(KSEG1 + 0x0C000007) /* Scratch Register (R/W) */
+-#define VR4181_SIUIRSEL_2 __preg8(KSEG1 + 0x0C000008) /* SIU IrDA Selectot (R/W) */
+-#define VR4181_SIURESET_2 __preg8(KSEG1 + 0x0C000009) /* SIU Reset Register (R/W) */
+-#define VR4181_SIUCSEL_2 __preg8(KSEG1 + 0x0C00000A) /* IrDA Echo-back Control (R/W) */
+-#define VR4181_SIUACTMSK_2 __preg8(KSEG1 + 0x0C00000C) /* SIU Activity Mask Register (R/W) */
+-#define VR4181_SIUACTTMR_2 __preg8(KSEG1 + 0x0C00000E) /* SIU Activity Timer Register (R/W) */
+-
+-
+-// USB Module
+-#define VR4181_USBINFIFO __preg16(KSEG1 + 0x0B000780) /* USB Bulk Input FIFO (Bulk In End Point) (W) */
+-#define VR4181_USBOUTFIFO __preg16(KSEG1 + 0x0B000782) /* USB Bulk Output FIFO (Bulk Out End Point) (R) */
+-#define VR4181_USBCTLFIFO __preg16(KSEG1 + 0x0B000784) /* USB Control FIFO (Control End Point) (W) */
+-#define VR4181_USBSTAT __preg16(KSEG1 + 0x0B000786) /* Interrupt Status Register (R/W) */
+-#define VR4181_USBINTMSK __preg16(KSEG1 + 0x0B000788) /* Interrupt Mask Register (R/W) */
+-#define VR4181_USBCTLREG __preg16(KSEG1 + 0x0B00078A) /* Control Register (R/W) */
+-#define VR4181_USBSTPREG __preg16(KSEG1 + 0x0B00078C) /* USB Transfer Stop Register (R/W) */
+-
+-// LCD Controller
+-#define VR4181_HRTOTALREG __preg16(KSEG1 + 0x0A000400) /* Horizontal total Register (R/W) */
+-#define VR4181_HRVISIBREG __preg16(KSEG1 + 0x0A000402) /* Horizontal Visible Register (R/W) */
+-#define VR4181_LDCLKSTREG __preg16(KSEG1 + 0x0A000404) /* Load clock start Register (R/W) */
+-#define VR4181_LDCLKNDREG __preg16(KSEG1 + 0x0A000406) /* Load clock end Register (R/W) */
+-#define VR4181_VRTOTALREG __preg16(KSEG1 + 0x0A000408) /* Vertical Total Register (R/W) */
+-#define VR4181_VRVISIBREG __preg16(KSEG1 + 0x0A00040A) /* Vertical Visible Register (R/W) */
+-#define VR4181_FVSTARTREG __preg16(KSEG1 + 0x0A00040C) /* FLM vertical start Register (R/W) */
+-#define VR4181_FVENDREG __preg16(KSEG1 + 0x0A00040E) /* FLM vertical end Register (R/W) */
+-#define VR4181_LCDCTRLREG __preg16(KSEG1 + 0x0A000410) /* LCD control Register (R/W) */
+-#define VR4181_LCDINRQREG __preg16(KSEG1 + 0x0A000412) /* LCD Interrupt request Register (R/W) */
+-#define VR4181_LCDCFGREG0 __preg16(KSEG1 + 0x0A000414) /* LCD Configuration Register 0 (R/W) */
+-#define VR4181_LCDCFGREG1 __preg16(KSEG1 + 0x0A000416) /* LCD Configuration Register 1 (R/W) */
+-#define VR4181_FBSTAD1REG __preg16(KSEG1 + 0x0A000418) /* Frame Buffer Start Address 1 Register (R/W) */
+-#define VR4181_FBSTAD2REG __preg16(KSEG1 + 0x0A00041A) /* Frame Buffer Start Address 2 Register (R/W) */
+-#define VR4181_FBNDAD1REG __preg16(KSEG1 + 0x0A000420) /* Frame Buffer End Address 1 Register (R/W) */
+-#define VR4181_FBNDAD2REG __preg16(KSEG1 + 0x0A000422) /* Frame Buffer End Address 2 register (R/W) */
+-#define VR4181_FHSTARTREG __preg16(KSEG1 + 0x0A000424) /* FLM horizontal Start Register (R/W) */
+-#define VR4181_FHENDREG __preg16(KSEG1 + 0x0A000426) /* FLM horizontal End Register (R/W) */
+-#define VR4181_PWRCONREG1 __preg16(KSEG1 + 0x0A000430) /* Power Control register 1 (R/W) */
+-#define VR4181_PWRCONREG2 __preg16(KSEG1 + 0x0A000432) /* Power Control register 2 (R/W) */
+-#define VR4181_LCDIMSKREG __preg16(KSEG1 + 0x0A000434) /* LCD Interrupt Mask register (R/W) */
+-#define VR4181_CPINDCTREG __preg16(KSEG1 + 0x0A00047E) /* Color palette Index and control Register (R/W) */
+-#define VR4181_CPALDATREG __preg32(KSEG1 + 0x0A000480) /* Color palette data register (32bits Register) (R/W) */
+-
+-// physical address spaces
+-#define VR4181_LCD 0x0a000000
+-#define VR4181_INTERNAL_IO_2 0x0b000000
+-#define VR4181_INTERNAL_IO_1 0x0c000000
+-#define VR4181_ISA_MEM 0x10000000
+-#define VR4181_ISA_IO 0x14000000
+-#define VR4181_ROM 0x18000000
+-
+-// This is the base address for IO port decoding to which the 16 bit IO port address
+-// is added. Defining it to 0 will usually cause a kernel oops any time port IO is
+-// attempted, which can be handy for turning up parts of the kernel that make
+-// incorrect architecture assumptions (by assuming that everything acts like a PC),
+-// but we need it correctly defined to use the PCMCIA/CF controller:
+-#define VR4181_PORT_BASE (KSEG1 + VR4181_ISA_IO)
+-#define VR4181_ISAMEM_BASE (KSEG1 + VR4181_ISA_MEM)
+-
+-#endif /* __ASM_VR4181_VR4181_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/vr41xx/siu.h linux_HEAD/include/asm-mips/vr41xx/siu.h
+--- linux-2.6.12/include/asm-mips/vr41xx/siu.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/vr41xx/siu.h 1970-01-01 01:00:00.000000000 +0100
+@@ -1,50 +0,0 @@
+-/*
+- * Include file for NEC VR4100 series Serial Interface Unit.
+- *
+- * Copyright (C) 2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- */
+-#ifndef __NEC_VR41XX_SIU_H
+-#define __NEC_VR41XX_SIU_H
+-
+-typedef enum {
+- SIU_INTERFACE_RS232C,
+- SIU_INTERFACE_IRDA,
+-} siu_interface_t;
+-
+-extern void vr41xx_select_siu_interface(siu_interface_t interface);
+-
+-typedef enum {
+- SIU_USE_IRDA,
+- FIR_USE_IRDA,
+-} irda_use_t;
+-
+-extern void vr41xx_use_irda(irda_use_t use);
+-
+-typedef enum {
+- SHARP_IRDA,
+- TEMIC_IRDA,
+- HP_IRDA,
+-} irda_module_t;
+-
+-typedef enum {
+- IRDA_TX_1_5MBPS,
+- IRDA_TX_4MBPS,
+-} irda_speed_t;
+-
+-extern void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed);
+-
+-#endif /* __NEC_VR41XX_SIU_H */
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/vr41xx/vr41xx.h linux_HEAD/include/asm-mips/vr41xx/vr41xx.h
+--- linux-2.6.12/include/asm-mips/vr41xx/vr41xx.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/vr41xx/vr41xx.h 2005-07-01 12:10:28.000000000 +0200
+@@ -79,11 +79,11 @@ extern void vr41xx_mask_clock(vr41xx_clo
+ #define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
+ #define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
+ #define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
+-#define INT0_CASCADE_IRQ MIPS_CPU_IRQ(2)
+-#define INT1_CASCADE_IRQ MIPS_CPU_IRQ(3)
+-#define INT2_CASCADE_IRQ MIPS_CPU_IRQ(4)
+-#define INT3_CASCADE_IRQ MIPS_CPU_IRQ(5)
+-#define INT4_CASCADE_IRQ MIPS_CPU_IRQ(6)
++#define INT0_IRQ MIPS_CPU_IRQ(2)
++#define INT1_IRQ MIPS_CPU_IRQ(3)
++#define INT2_IRQ MIPS_CPU_IRQ(4)
++#define INT3_IRQ MIPS_CPU_IRQ(5)
++#define INT4_IRQ MIPS_CPU_IRQ(6)
+ #define TIMER_IRQ MIPS_CPU_IRQ(7)
+
+ /* SYINT1 Interrupt Numbers */
+@@ -97,7 +97,7 @@ extern void vr41xx_mask_clock(vr41xx_clo
+ #define PIU_IRQ SYSINT1_IRQ(5)
+ #define AIU_IRQ SYSINT1_IRQ(6)
+ #define KIU_IRQ SYSINT1_IRQ(7)
+-#define GIUINT_CASCADE_IRQ SYSINT1_IRQ(8)
++#define GIUINT_IRQ SYSINT1_IRQ(8)
+ #define SIU_IRQ SYSINT1_IRQ(9)
+ #define BUSERR_IRQ SYSINT1_IRQ(10)
+ #define SOFTINT_IRQ SYSINT1_IRQ(11)
+@@ -129,7 +129,7 @@ extern void vr41xx_mask_clock(vr41xx_clo
+ #define GIU_IRQ_TO_PIN(x) ((x) - GIU_IRQ_BASE) /* Pin 0-31 */
+
+ extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
+-extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
++extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *));
+
+ #define PIUINT_COMMAND 0x0040
+ #define PIUINT_DATA 0x0020
+diff -urpNX dontdiff linux-2.6.12/include/asm-mips/war.h linux_HEAD/include/asm-mips/war.h
+--- linux-2.6.12/include/asm-mips/war.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/asm-mips/war.h 2005-07-01 12:10:28.000000000 +0200
+@@ -177,6 +177,17 @@
+ #endif
+
+ /*
++ * The RM9000 has a bug (though PMC-Sierra opposes it being called that)
++ * where invalid instructions in the same I-cache line worth of instructions
++ * being fetched may case spurious exceptions.
++ */
++#if defined(CONFIG_MOMENCO_JAGUAR_ATX) || defined(CONFIG_MOMENCO_OCELOT_3) || \
++ defined(CONFIG_PMC_YOSEMITE)
++#define ICACHE_REFILLS_WORKAROUND_WAR 1
++#endif
++
++
++/*
+ * ON the R10000 upto version 2.6 (not sure about 2.7) there is a bug that
+ * may cause ll / sc and lld / scd sequences to execute non-atomically.
+ */
+@@ -187,6 +198,9 @@
+ /*
+ * Workarounds default to off
+ */
++#ifndef ICACHE_REFILLS_WORKAROUND_WAR
++#define ICACHE_REFILLS_WORKAROUND_WAR 0
++#endif
+ #ifndef R4600_V1_INDEX_ICACHEOP_WAR
+ #define R4600_V1_INDEX_ICACHEOP_WAR 0
+ #endif
+diff -urpNX dontdiff linux-2.6.12/drivers/char/Kconfig linux_HEAD/drivers/char/Kconfig
+--- linux-2.6.12/drivers/char/Kconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/char/Kconfig 2005-07-10 12:16:37.000000000 +0200
+@@ -331,23 +331,68 @@ config ISTALLION
To compile this driver as a module, choose M here: the
module will be called istallion.
@@ -22892,9 +41836,6 @@
-config AU1000_SERIAL_CONSOLE
- bool "Enable Au1000 serial console"
- depends on AU1000_UART
-- help
-- If you have an Alchemy AU1000 processor (MIPS based) and you want
-- to use a console on a serial port, say Y. Otherwise, say N.
+config AU1X00_GPIO
+ tristate "Alchemy Au1000 GPIO device support"
+ depends on MIPS && SOC_AU1X00
@@ -22918,6 +41859,43 @@
+config SIBYTE_SB1250_DUART_CONSOLE
+ bool "Console on BCM1xxx DUART"
+ depends on SIBYTE_SB1250_DUART
++
++config SERIAL_DEC
++ bool "DECstation serial support"
++ depends on MACH_DECSTATION
++ default y
++ help
++ This selects whether you want to be asked about drivers for
++ DECstation serial ports.
++
++ Note that the answer to this question won't directly affect the
++ kernel: saying N will just cause the configurator to skip all
++ the questions about DECstation serial ports.
++
++ If unsure, say Y.
++
++config SERIAL_DEC_CONSOLE
++ bool "Support for console on a DECstation serial port"
++ depends on SERIAL_DEC
++ default y
+ help
+- If you have an Alchemy AU1000 processor (MIPS based) and you want
+- to use a console on a serial port, say Y. Otherwise, say N.
++ If you say Y here, it will be possible to use a serial port as the
++ system console (the system console is the device which receives all
++ kernel messages and warnings and which allows logins in single user
++ mode). Note that the firmware uses ttyS0 as the serial console on
++ the Maxine and ttyS2 on the others.
++
++ If unsure, say Y.
++
++config ZS
++ bool "Z85C30 Serial Support"
++ depends on SERIAL_DEC
++ default y
++ help
++ Documentation on the Zilog 85C350 serial communications controller
++ is downloadable at <http://www.zilog.com/pdfs/serial/z85c30.pdf>.
config QTRONIX_KEYBOARD
bool "Enable Qtronix 990P Keyboard Support"
@@ -22926,7 +41904,7 @@
help
Images of Qtronix keyboards are at
<http://www.qtronix.com/keyboard.html>.
-@@ -359,7 +369,7 @@ config IT8172_CIR
+@@ -359,7 +404,7 @@ config IT8172_CIR
config IT8172_SCR0
bool "Enable Smart Card Reader 0 Support "
@@ -22935,7 +41913,7 @@
help
Say Y here to support smart-card reader 0 (SCR0) on the Integrated
Technology Express, Inc. ITE8172 SBC. Vendor page at
-@@ -368,13 +378,17 @@ config IT8172_SCR0
+@@ -368,13 +413,17 @@ config IT8172_SCR0
config IT8172_SCR1
bool "Enable Smart Card Reader 1 Support "
@@ -22954,9 +41932,20 @@
config A2232
tristate "Commodore A2232 serial support (EXPERIMENTAL)"
depends on EXPERIMENTAL && ZORRO && BROKEN_ON_SMP
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/Makefile linux_HEAD/drivers/char/Makefile
---- linux-2.6.11.6/drivers/char/Makefile 2005-04-03 00:10:55.000000000 +0200
-+++ linux_HEAD/drivers/char/Makefile 2005-03-21 20:04:03.000000000 +0100
+@@ -779,10 +828,6 @@ config S3C2410_RTC
+ Samsung S3C2410. This can provide periodic interrupt rates
+ from 1Hz to 64Hz for user programs, and wakeup from Alarm.
+
+-config RTC_VR41XX
+- tristate "NEC VR4100 series Real Time Clock Support"
+- depends on CPU_VR41XX
+-
+ config COBALT_LCD
+ bool "Support for Cobalt LCD"
+ depends on MIPS_COBALT
+diff -urpNX dontdiff linux-2.6.12/drivers/char/Makefile linux_HEAD/drivers/char/Makefile
+--- linux-2.6.12/drivers/char/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/char/Makefile 2005-07-10 12:16:37.000000000 +0200
@@ -31,6 +31,7 @@ obj-$(CONFIG_MOXA_INTELLIO) += moxa.o
obj-$(CONFIG_A2232) += ser_a2232.o generic_serial.o
obj-$(CONFIG_ATARI_DSP56K) += dsp56k.o
@@ -22965,8 +41954,24 @@
obj-$(CONFIG_COMPUTONE) += ip2.o ip2main.o
obj-$(CONFIG_RISCOM8) += riscom8.o
obj-$(CONFIG_ISI) += isicom.o
-@@ -74,6 +75,10 @@ obj-$(CONFIG_DS1620) += ds1620.o
- obj-$(CONFIG_QIC02_TAPE) += tpqic02.o
+@@ -48,6 +49,7 @@ obj-$(CONFIG_VIOCONS) += viocons.o
+ obj-$(CONFIG_VIOTAPE) += viotape.o
+ obj-$(CONFIG_HVCS) += hvcs.o
+ obj-$(CONFIG_SGI_MBCS) += mbcs.o
++obj-$(CONFIG_SERIAL_DEC) += decserial.o
+
+ obj-$(CONFIG_PRINTER) += lp.o
+ obj-$(CONFIG_TIPAR) += tipar.o
+@@ -64,7 +66,6 @@ obj-$(CONFIG_SGI_DS1286) += ds1286.o
+ obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
+ obj-$(CONFIG_DS1302) += ds1302.o
+ obj-$(CONFIG_S3C2410_RTC) += s3c2410-rtc.o
+-obj-$(CONFIG_RTC_VR41XX) += vr41xx_rtc.o
+ ifeq ($(CONFIG_GENERIC_NVRAM),y)
+ obj-$(CONFIG_NVRAM) += generic_nvram.o
+ else
+@@ -76,11 +77,14 @@ obj-$(CONFIG_DS1620) += ds1620.o
+ obj-$(CONFIG_HW_RANDOM) += hw_random.o
obj-$(CONFIG_FTAPE) += ftape/
obj-$(CONFIG_COBALT_LCD) += lcd.o
+obj-$(CONFIG_ITE_GPIO) += ite_gpio.o
@@ -22976,7 +41981,12 @@
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
-@@ -90,7 +94,7 @@ obj-$(CONFIG_IPMI_HANDLER) += ipmi/
+ obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
+-obj-$(CONFIG_TANBAC_TB0219) += tb0219.o
+
+ obj-$(CONFIG_WATCHDOG) += watchdog/
+ obj-$(CONFIG_MWAVE) += mwave/
+@@ -92,7 +96,7 @@ obj-$(CONFIG_IPMI_HANDLER) += ipmi/
obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o
obj-$(CONFIG_TCG_TPM) += tpm/
# Files generated that shall be removed upon make clean
@@ -22985,7 +41995,7 @@
quiet_cmd_conmk = CONMK $@
cmd_conmk = scripts/conmakehash $< > $@
-@@ -102,6 +106,8 @@ $(obj)/defkeymap.o: $(obj)/defkeymap.c
+@@ -104,6 +108,8 @@ $(obj)/defkeymap.o: $(obj)/defkeymap.c
$(obj)/qtronixmap.o: $(obj)/qtronixmap.c
@@ -22994,7 +42004,7 @@
# Uncomment if you're changing the keymap and have an appropriate
# loadkeys version for the map. By default, we'll use the shipped
# versions.
-@@ -109,7 +115,8 @@ $(obj)/qtronixmap.o: $(obj)/qtronixmap.c
+@@ -111,7 +117,8 @@ $(obj)/qtronixmap.o: $(obj)/qtronixmap.c
ifdef GENERATE_KEYMAP
@@ -23004,8 +42014,8 @@
loadkeys --mktable $< > $@.tmp
sed -e 's/^static *//' $@.tmp > $@
rm $@.tmp
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/au1000_gpio.c linux_HEAD/drivers/char/au1000_gpio.c
---- linux-2.6.11.6/drivers/char/au1000_gpio.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/au1000_gpio.c linux_HEAD/drivers/char/au1000_gpio.c
+--- linux-2.6.12/drivers/char/au1000_gpio.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/char/au1000_gpio.c 2005-02-28 16:56:48.000000000 +0100
@@ -0,0 +1,266 @@
+/*
@@ -23274,8 +42284,8 @@
+
+module_init(au1000gpio_init);
+module_exit(au1000gpio_exit);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/au1000_ts.c linux_HEAD/drivers/char/au1000_ts.c
---- linux-2.6.11.6/drivers/char/au1000_ts.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/au1000_ts.c linux_HEAD/drivers/char/au1000_ts.c
+--- linux-2.6.12/drivers/char/au1000_ts.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/char/au1000_ts.c 2005-02-28 16:56:48.000000000 +0100
@@ -0,0 +1,677 @@
+/*
@@ -23955,8 +42965,8 @@
+
+module_init(au1000ts_init_module);
+module_exit(au1000ts_cleanup_module);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/au1000_usbraw.c linux_HEAD/drivers/char/au1000_usbraw.c
---- linux-2.6.11.6/drivers/char/au1000_usbraw.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/au1000_usbraw.c linux_HEAD/drivers/char/au1000_usbraw.c
+--- linux-2.6.12/drivers/char/au1000_usbraw.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/char/au1000_usbraw.c 2005-02-28 16:56:48.000000000 +0100
@@ -0,0 +1,573 @@
+/*
@@ -24532,8 +43542,8 @@
+
+module_init(usbfn_raw_init);
+module_exit(usbfn_raw_exit);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/au1000_usbtty.c linux_HEAD/drivers/char/au1000_usbtty.c
---- linux-2.6.11.6/drivers/char/au1000_usbtty.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/au1000_usbtty.c linux_HEAD/drivers/char/au1000_usbtty.c
+--- linux-2.6.12/drivers/char/au1000_usbtty.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/char/au1000_usbtty.c 2005-02-28 16:56:48.000000000 +0100
@@ -0,0 +1,761 @@
+/*
@@ -25297,8 +44307,8 @@
+
+module_init(usbfn_tty_init);
+module_exit(usbfn_tty_exit);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/decserial.c linux_HEAD/drivers/char/decserial.c
---- linux-2.6.11.6/drivers/char/decserial.c 2005-03-26 04:28:15.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/decserial.c linux_HEAD/drivers/char/decserial.c
+--- linux-2.6.12/drivers/char/decserial.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/char/decserial.c 2004-09-21 13:10:14.000000000 +0200
@@ -14,87 +14,85 @@
* device. Added support for PROM console in drivers/char/tty_io.c
@@ -25434,9 +44444,9 @@
+console_initcall(dec_serial_console_init);
#endif
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/generic_serial.c linux_HEAD/drivers/char/generic_serial.c
---- linux-2.6.11.6/drivers/char/generic_serial.c 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/drivers/char/generic_serial.c 2005-02-17 21:49:30.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/generic_serial.c linux_HEAD/drivers/char/generic_serial.c
+--- linux-2.6.12/drivers/char/generic_serial.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/char/generic_serial.c 2005-04-08 22:40:55.000000000 +0200
@@ -21,6 +21,7 @@
#include <linux/module.h>
@@ -25445,8 +44455,8 @@
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/mm.h>
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/ibm_workpad_keymap.map linux_HEAD/drivers/char/ibm_workpad_keymap.map
---- linux-2.6.11.6/drivers/char/ibm_workpad_keymap.map 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/ibm_workpad_keymap.map linux_HEAD/drivers/char/ibm_workpad_keymap.map
+--- linux-2.6.12/drivers/char/ibm_workpad_keymap.map 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/char/ibm_workpad_keymap.map 2003-12-20 15:18:07.000000000 +0100
@@ -0,0 +1,343 @@
+# Keymap for IBM Workpad z50
@@ -25792,8 +44802,8 @@
+keycode 93 = AltGr
+keycode 94 = ShiftR
+ shift keycode 94 = Caps_Lock
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/lcd.c linux_HEAD/drivers/char/lcd.c
---- linux-2.6.11.6/drivers/char/lcd.c 2005-03-26 04:28:19.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/lcd.c linux_HEAD/drivers/char/lcd.c
+--- linux-2.6.12/drivers/char/lcd.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/char/lcd.c 2005-02-21 22:17:44.000000000 +0100
@@ -575,8 +575,8 @@ static inline int button_pressed(void)
@@ -25806,8 +44816,8 @@
{
long buttons_now;
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/lcd.h linux_HEAD/drivers/char/lcd.h
---- linux-2.6.11.6/drivers/char/lcd.h 2005-03-26 04:28:21.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/lcd.h linux_HEAD/drivers/char/lcd.h
+--- linux-2.6.12/drivers/char/lcd.h 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/char/lcd.h 2005-02-21 22:17:44.000000000 +0100
@@ -22,7 +22,7 @@ static int timeout(volatile unsigned lon
#define MAX_IDLE_TIME 120
@@ -25818,8 +44828,8 @@
int size1;
int size2;
unsigned char line1[LCD_CHARS_PER_LINE];
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/qtronix.c linux_HEAD/drivers/char/qtronix.c
---- linux-2.6.11.6/drivers/char/qtronix.c 2005-03-26 04:28:40.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/qtronix.c linux_HEAD/drivers/char/qtronix.c
+--- linux-2.6.12/drivers/char/qtronix.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/char/qtronix.c 2005-03-11 18:48:13.000000000 +0100
@@ -535,8 +535,7 @@ repeat:
i--;
@@ -25843,8 +44853,8 @@
memset(queue, 0, sizeof(*queue));
queue->head = queue->tail = 0;
init_waitqueue_head(&queue->proc_list);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/rtc.c linux_HEAD/drivers/char/rtc.c
---- linux-2.6.11.6/drivers/char/rtc.c 2005-04-03 00:10:56.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/drivers/char/rtc.c linux_HEAD/drivers/char/rtc.c
+--- linux-2.6.12/drivers/char/rtc.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/char/rtc.c 2005-03-21 20:04:04.000000000 +0100
@@ -35,23 +35,21 @@
* 1.09a Pete Zaitcev: Sun SPARC
@@ -25957,8 +44967,8 @@
#ifdef RTC_IRQ
if (rtc_has_irq)
free_irq (RTC_IRQ, NULL);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/char/sb1250_duart.c linux_HEAD/drivers/char/sb1250_duart.c
---- linux-2.6.11.6/drivers/char/sb1250_duart.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/char/sb1250_duart.c linux_HEAD/drivers/char/sb1250_duart.c
+--- linux-2.6.12/drivers/char/sb1250_duart.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/char/sb1250_duart.c 2005-02-28 16:56:48.000000000 +0100
@@ -0,0 +1,899 @@
+/*
@@ -26860,31 +45870,1083 @@
+console_initcall(sb1250_serial_console_init);
+
+#endif /* CONFIG_SIBYTE_SB1250_DUART_CONSOLE */
-diff -urpNX dontdiff linux-2.6.11.6/drivers/i2c/busses/i2c-au1550.c linux_HEAD/drivers/i2c/busses/i2c-au1550.c
---- linux-2.6.11.6/drivers/i2c/busses/i2c-au1550.c 2005-04-03 00:10:57.000000000 +0200
-+++ linux_HEAD/drivers/i2c/busses/i2c-au1550.c 2005-03-21 20:04:08.000000000 +0100
-@@ -21,7 +21,7 @@
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+diff -urpNX dontdiff linux-2.6.12/drivers/char/tb0219.c linux_HEAD/drivers/char/tb0219.c
+--- linux-2.6.12/drivers/char/tb0219.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/char/tb0219.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,347 +0,0 @@
+-/*
+- * Driver for TANBAC TB0219 base board.
- *
-+ *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
+- * Copyright (C) 2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- */
+-#include <linux/device.h>
+-#include <linux/fs.h>
+-#include <linux/init.h>
+-#include <linux/module.h>
+-
+-#include <asm/io.h>
+-#include <asm/reboot.h>
+-
+-MODULE_AUTHOR("Yoichi Yuasa <yuasa at hh.iij4u.or.jp>");
+-MODULE_DESCRIPTION("TANBAC TB0219 base board driver");
+-MODULE_LICENSE("GPL");
+-
+-static int major; /* default is dynamic major device number */
+-module_param(major, int, 0);
+-MODULE_PARM_DESC(major, "Major device number");
+-
+-static void (*old_machine_restart)(char *command);
+-static void __iomem *tb0219_base;
+-static spinlock_t tb0219_lock;
+-
+-#define tb0219_read(offset) readw(tb0219_base + (offset))
+-#define tb0219_write(offset, value) writew((value), tb0219_base + (offset))
+-
+-#define TB0219_START 0x0a000000UL
+-#define TB0219_SIZE 0x20UL
+-
+-#define TB0219_LED 0x00
+-#define TB0219_GPIO_INPUT 0x02
+-#define TB0219_GPIO_OUTPUT 0x04
+-#define TB0219_DIP_SWITCH 0x06
+-#define TB0219_MISC 0x08
+-#define TB0219_RESET 0x0e
+-#define TB0219_PCI_SLOT1_IRQ_STATUS 0x10
+-#define TB0219_PCI_SLOT2_IRQ_STATUS 0x12
+-#define TB0219_PCI_SLOT3_IRQ_STATUS 0x14
+-
+-typedef enum {
+- TYPE_LED,
+- TYPE_GPIO_OUTPUT,
+-} tb0219_type_t;
+-
+-/*
+- * Minor device number
+- * 0 = 7 segment LED
+- *
+- * 16 = GPIO IN 0
+- * 17 = GPIO IN 1
+- * 18 = GPIO IN 2
+- * 19 = GPIO IN 3
+- * 20 = GPIO IN 4
+- * 21 = GPIO IN 5
+- * 22 = GPIO IN 6
+- * 23 = GPIO IN 7
+- *
+- * 32 = GPIO OUT 0
+- * 33 = GPIO OUT 1
+- * 34 = GPIO OUT 2
+- * 35 = GPIO OUT 3
+- * 36 = GPIO OUT 4
+- * 37 = GPIO OUT 5
+- * 38 = GPIO OUT 6
+- * 39 = GPIO OUT 7
+- *
+- * 48 = DIP switch 1
+- * 49 = DIP switch 2
+- * 50 = DIP switch 3
+- * 51 = DIP switch 4
+- * 52 = DIP switch 5
+- * 53 = DIP switch 6
+- * 54 = DIP switch 7
+- * 55 = DIP switch 8
+- */
+-
+-static inline char get_led(void)
+-{
+- return (char)tb0219_read(TB0219_LED);
+-}
+-
+-static inline char get_gpio_input_pin(unsigned int pin)
+-{
+- uint16_t values;
+-
+- values = tb0219_read(TB0219_GPIO_INPUT);
+- if (values & (1 << pin))
+- return '1';
+-
+- return '0';
+-}
+-
+-static inline char get_gpio_output_pin(unsigned int pin)
+-{
+- uint16_t values;
+-
+- values = tb0219_read(TB0219_GPIO_OUTPUT);
+- if (values & (1 << pin))
+- return '1';
+-
+- return '0';
+-}
+-
+-static inline char get_dip_switch(unsigned int pin)
+-{
+- uint16_t values;
+-
+- values = tb0219_read(TB0219_DIP_SWITCH);
+- if (values & (1 << pin))
+- return '1';
+-
+- return '0';
+-}
+-
+-static inline int set_led(char command)
+-{
+- tb0219_write(TB0219_LED, command);
+-
+- return 0;
+-}
+-
+-static inline int set_gpio_output_pin(unsigned int pin, char command)
+-{
+- unsigned long flags;
+- uint16_t value;
+-
+- if (command != '0' && command != '1')
+- return -EINVAL;
+-
+- spin_lock_irqsave(&tb0219_lock, flags);
+- value = tb0219_read(TB0219_GPIO_OUTPUT);
+- if (command == '0')
+- value &= ~(1 << pin);
+- else
+- value |= 1 << pin;
+- tb0219_write(TB0219_GPIO_OUTPUT, value);
+- spin_unlock_irqrestore(&tb0219_lock, flags);
+-
+- return 0;
+-
+-}
+-
+-static ssize_t tanbac_tb0219_read(struct file *file, char __user *buf, size_t len,
+- loff_t *ppos)
+-{
+- unsigned int minor;
+- char value;
+-
+- minor = iminor(file->f_dentry->d_inode);
+- switch (minor) {
+- case 0:
+- value = get_led();
+- break;
+- case 16 ... 23:
+- value = get_gpio_input_pin(minor - 16);
+- break;
+- case 32 ... 39:
+- value = get_gpio_output_pin(minor - 32);
+- break;
+- case 48 ... 55:
+- value = get_dip_switch(minor - 48);
+- break;
+- default:
+- return -EBADF;
+- }
+-
+- if (len <= 0)
+- return -EFAULT;
+-
+- if (put_user(value, buf))
+- return -EFAULT;
+-
+- return 1;
+-}
+-
+-static ssize_t tanbac_tb0219_write(struct file *file, const char __user *data,
+- size_t len, loff_t *ppos)
+-{
+- unsigned int minor;
+- tb0219_type_t type;
+- size_t i;
+- int retval = 0;
+- char c;
+-
+- minor = iminor(file->f_dentry->d_inode);
+- switch (minor) {
+- case 0:
+- type = TYPE_LED;
+- break;
+- case 32 ... 39:
+- type = TYPE_GPIO_OUTPUT;
+- break;
+- default:
+- return -EBADF;
+- }
+-
+- for (i = 0; i < len; i++) {
+- if (get_user(c, data + i))
+- return -EFAULT;
+-
+- switch (type) {
+- case TYPE_LED:
+- retval = set_led(c);
+- break;
+- case TYPE_GPIO_OUTPUT:
+- retval = set_gpio_output_pin(minor - 32, c);
+- break;
+- }
+-
+- if (retval < 0)
+- break;
+- }
+-
+- return i;
+-}
+-
+-static int tanbac_tb0219_open(struct inode *inode, struct file *file)
+-{
+- unsigned int minor;
+-
+- minor = iminor(inode);
+- switch (minor) {
+- case 0:
+- case 16 ... 23:
+- case 32 ... 39:
+- case 48 ... 55:
+- return nonseekable_open(inode, file);
+- default:
+- break;
+- }
+-
+- return -EBADF;
+-}
+-
+-static int tanbac_tb0219_release(struct inode *inode, struct file *file)
+-{
+- return 0;
+-}
+-
+-static struct file_operations tb0219_fops = {
+- .owner = THIS_MODULE,
+- .read = tanbac_tb0219_read,
+- .write = tanbac_tb0219_write,
+- .open = tanbac_tb0219_open,
+- .release = tanbac_tb0219_release,
+-};
+-
+-static void tb0219_restart(char *command)
+-{
+- tb0219_write(TB0219_RESET, 0);
+-}
+-
+-static int tb0219_probe(struct device *dev)
+-{
+- int retval;
+-
+- if (request_mem_region(TB0219_START, TB0219_SIZE, "TB0219") == NULL)
+- return -EBUSY;
+-
+- tb0219_base = ioremap(TB0219_START, TB0219_SIZE);
+- if (tb0219_base == NULL) {
+- release_mem_region(TB0219_START, TB0219_SIZE);
+- return -ENOMEM;
+- }
+-
+- retval = register_chrdev(major, "TB0219", &tb0219_fops);
+- if (retval < 0) {
+- iounmap(tb0219_base);
+- tb0219_base = NULL;
+- release_mem_region(TB0219_START, TB0219_SIZE);
+- return retval;
+- }
+-
+- spin_lock_init(&tb0219_lock);
+-
+- old_machine_restart = _machine_restart;
+- _machine_restart = tb0219_restart;
+-
+- if (major == 0) {
+- major = retval;
+- printk(KERN_INFO "TB0219: major number %d\n", major);
+- }
+-
+- return 0;
+-}
+-
+-static int tb0219_remove(struct device *dev)
+-{
+- _machine_restart = old_machine_restart;
+-
+- iounmap(tb0219_base);
+- tb0219_base = NULL;
+-
+- release_mem_region(TB0219_START, TB0219_SIZE);
+-
+- return 0;
+-}
+-
+-static struct platform_device *tb0219_platform_device;
+-
+-static struct device_driver tb0219_device_driver = {
+- .name = "TB0219",
+- .bus = &platform_bus_type,
+- .probe = tb0219_probe,
+- .remove = tb0219_remove,
+-};
+-
+-static int __devinit tanbac_tb0219_init(void)
+-{
+- int retval;
+-
+- tb0219_platform_device = platform_device_register_simple("TB0219", -1, NULL, 0);
+- if (IS_ERR(tb0219_platform_device))
+- return PTR_ERR(tb0219_platform_device);
+-
+- retval = driver_register(&tb0219_device_driver);
+- if (retval < 0)
+- platform_device_unregister(tb0219_platform_device);
+-
+- return retval;
+-}
+-
+-static void __devexit tanbac_tb0219_exit(void)
+-{
+- driver_unregister(&tb0219_device_driver);
+-
+- platform_device_unregister(tb0219_platform_device);
+-}
+-
+-module_init(tanbac_tb0219_init);
+-module_exit(tanbac_tb0219_exit);
+diff -urpNX dontdiff linux-2.6.12/drivers/char/vr41xx_rtc.c linux_HEAD/drivers/char/vr41xx_rtc.c
+--- linux-2.6.12/drivers/char/vr41xx_rtc.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/char/vr41xx_rtc.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,709 +0,0 @@
+-/*
+- * Driver for NEC VR4100 series Real Time Clock unit.
+- *
+- * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- */
+-#include <linux/device.h>
+-#include <linux/fs.h>
+-#include <linux/init.h>
+-#include <linux/ioport.h>
+-#include <linux/irq.h>
+-#include <linux/mc146818rtc.h>
+-#include <linux/miscdevice.h>
+-#include <linux/module.h>
+-#include <linux/poll.h>
+-#include <linux/rtc.h>
+-#include <linux/spinlock.h>
+-#include <linux/types.h>
+-#include <linux/wait.h>
+-
+-#include <asm/div64.h>
+-#include <asm/io.h>
+-#include <asm/time.h>
+-#include <asm/uaccess.h>
+-#include <asm/vr41xx/vr41xx.h>
+-
+-MODULE_AUTHOR("Yoichi Yuasa <yuasa at hh.iij4u.or.jp>");
+-MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
+-MODULE_LICENSE("GPL");
+-
+-#define RTC1_TYPE1_START 0x0b0000c0UL
+-#define RTC1_TYPE1_END 0x0b0000dfUL
+-#define RTC2_TYPE1_START 0x0b0001c0UL
+-#define RTC2_TYPE1_END 0x0b0001dfUL
+-
+-#define RTC1_TYPE2_START 0x0f000100UL
+-#define RTC1_TYPE2_END 0x0f00011fUL
+-#define RTC2_TYPE2_START 0x0f000120UL
+-#define RTC2_TYPE2_END 0x0f00013fUL
+-
+-#define RTC1_SIZE 0x20
+-#define RTC2_SIZE 0x20
+-
+-/* RTC 1 registers */
+-#define ETIMELREG 0x00
+-#define ETIMEMREG 0x02
+-#define ETIMEHREG 0x04
+-/* RFU */
+-#define ECMPLREG 0x08
+-#define ECMPMREG 0x0a
+-#define ECMPHREG 0x0c
+-/* RFU */
+-#define RTCL1LREG 0x10
+-#define RTCL1HREG 0x12
+-#define RTCL1CNTLREG 0x14
+-#define RTCL1CNTHREG 0x16
+-#define RTCL2LREG 0x18
+-#define RTCL2HREG 0x1a
+-#define RTCL2CNTLREG 0x1c
+-#define RTCL2CNTHREG 0x1e
+-
+-/* RTC 2 registers */
+-#define TCLKLREG 0x00
+-#define TCLKHREG 0x02
+-#define TCLKCNTLREG 0x04
+-#define TCLKCNTHREG 0x06
+-/* RFU */
+-#define RTCINTREG 0x1e
+- #define TCLOCK_INT 0x08
+- #define RTCLONG2_INT 0x04
+- #define RTCLONG1_INT 0x02
+- #define ELAPSEDTIME_INT 0x01
+-
+-#define RTC_FREQUENCY 32768
+-#define MAX_PERIODIC_RATE 6553
+-#define MAX_USER_PERIODIC_RATE 64
+-
+-static void __iomem *rtc1_base;
+-static void __iomem *rtc2_base;
+-
+-#define rtc1_read(offset) readw(rtc1_base + (offset))
+-#define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
+-
+-#define rtc2_read(offset) readw(rtc2_base + (offset))
+-#define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
+-
+-static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
+-
+-static spinlock_t rtc_task_lock;
+-static wait_queue_head_t rtc_wait;
+-static unsigned long rtc_irq_data;
+-static struct fasync_struct *rtc_async_queue;
+-static rtc_task_t *rtc_callback;
+-static char rtc_name[] = "RTC";
+-static unsigned long periodic_frequency;
+-static unsigned long periodic_count;
+-
+-typedef enum {
+- RTC_RELEASE,
+- RTC_OPEN,
+-} rtc_status_t;
+-
+-static rtc_status_t rtc_status;
+-
+-typedef enum {
+- FUNCTION_RTC_IOCTL,
+- FUNCTION_RTC_CONTROL,
+-} rtc_callfrom_t;
+-
+-struct resource rtc_resource[2] = {
+- { .name = rtc_name,
+- .flags = IORESOURCE_MEM, },
+- { .name = rtc_name,
+- .flags = IORESOURCE_MEM, },
+-};
+-
+-#define RTC_NUM_RESOURCES sizeof(rtc_resource) / sizeof(struct resource)
+-
+-static inline unsigned long read_elapsed_second(void)
+-{
+- unsigned long first_low, first_mid, first_high;
+- unsigned long second_low, second_mid, second_high;
+-
+- do {
+- first_low = rtc1_read(ETIMELREG);
+- first_mid = rtc1_read(ETIMEMREG);
+- first_high = rtc1_read(ETIMEHREG);
+- second_low = rtc1_read(ETIMELREG);
+- second_mid = rtc1_read(ETIMEMREG);
+- second_high = rtc1_read(ETIMEHREG);
+- } while (first_low != second_low || first_mid != second_mid ||
+- first_high != second_high);
+-
+- return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
+-}
+-
+-static inline void write_elapsed_second(unsigned long sec)
+-{
+- spin_lock_irq(&rtc_lock);
+-
+- rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
+- rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
+- rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
+-
+- spin_unlock_irq(&rtc_lock);
+-}
+-
+-static void set_alarm(struct rtc_time *time)
+-{
+- unsigned long alarm_sec;
+-
+- alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
+- time->tm_hour, time->tm_min, time->tm_sec);
+-
+- spin_lock_irq(&rtc_lock);
+-
+- rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
+- rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
+- rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
+-
+- spin_unlock_irq(&rtc_lock);
+-}
+-
+-static void read_alarm(struct rtc_time *time)
+-{
+- unsigned long low, mid, high;
+-
+- spin_lock_irq(&rtc_lock);
+-
+- low = rtc1_read(ECMPLREG);
+- mid = rtc1_read(ECMPMREG);
+- high = rtc1_read(ECMPHREG);
+-
+- spin_unlock_irq(&rtc_lock);
+-
+- to_tm((high << 17) | (mid << 1) | (low >> 15), time);
+- time->tm_year -= 1900;
+-}
+-
+-static void read_time(struct rtc_time *time)
+-{
+- unsigned long epoch_sec, elapsed_sec;
+-
+- epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
+- elapsed_sec = read_elapsed_second();
+-
+- to_tm(epoch_sec + elapsed_sec, time);
+- time->tm_year -= 1900;
+-}
+-
+-static void set_time(struct rtc_time *time)
+-{
+- unsigned long epoch_sec, current_sec;
+-
+- epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
+- current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
+- time->tm_hour, time->tm_min, time->tm_sec);
+-
+- write_elapsed_second(current_sec - epoch_sec);
+-}
+-
+-static ssize_t rtc_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
+-{
+- DECLARE_WAITQUEUE(wait, current);
+- unsigned long irq_data;
+- int retval = 0;
+-
+- if (count != sizeof(unsigned int) && count != sizeof(unsigned long))
+- return -EINVAL;
+-
+- add_wait_queue(&rtc_wait, &wait);
+-
+- do {
+- __set_current_state(TASK_INTERRUPTIBLE);
+-
+- spin_lock_irq(&rtc_lock);
+- irq_data = rtc_irq_data;
+- rtc_irq_data = 0;
+- spin_unlock_irq(&rtc_lock);
+-
+- if (irq_data != 0)
+- break;
+-
+- if (file->f_flags & O_NONBLOCK) {
+- retval = -EAGAIN;
+- break;
+- }
+-
+- if (signal_pending(current)) {
+- retval = -ERESTARTSYS;
+- break;
+- }
+- } while (1);
+-
+- if (retval == 0) {
+- if (count == sizeof(unsigned int)) {
+- retval = put_user(irq_data, (unsigned int __user *)buf);
+- if (retval == 0)
+- retval = sizeof(unsigned int);
+- } else {
+- retval = put_user(irq_data, (unsigned long __user *)buf);
+- if (retval == 0)
+- retval = sizeof(unsigned long);
+- }
+-
+- }
+-
+- __set_current_state(TASK_RUNNING);
+- remove_wait_queue(&rtc_wait, &wait);
+-
+- return retval;
+-}
+-
+-static unsigned int rtc_poll(struct file *file, struct poll_table_struct *table)
+-{
+- poll_wait(file, &rtc_wait, table);
+-
+- if (rtc_irq_data != 0)
+- return POLLIN | POLLRDNORM;
+-
+- return 0;
+-}
+-
+-static int rtc_do_ioctl(unsigned int cmd, unsigned long arg, rtc_callfrom_t from)
+-{
+- struct rtc_time time;
+- unsigned long count;
+-
+- switch (cmd) {
+- case RTC_AIE_ON:
+- enable_irq(ELAPSEDTIME_IRQ);
+- break;
+- case RTC_AIE_OFF:
+- disable_irq(ELAPSEDTIME_IRQ);
+- break;
+- case RTC_PIE_ON:
+- enable_irq(RTCLONG1_IRQ);
+- break;
+- case RTC_PIE_OFF:
+- disable_irq(RTCLONG1_IRQ);
+- break;
+- case RTC_ALM_SET:
+- if (copy_from_user(&time, (struct rtc_time __user *)arg,
+- sizeof(struct rtc_time)))
+- return -EFAULT;
+-
+- set_alarm(&time);
+- break;
+- case RTC_ALM_READ:
+- memset(&time, 0, sizeof(struct rtc_time));
+- read_alarm(&time);
+- break;
+- case RTC_RD_TIME:
+- memset(&time, 0, sizeof(struct rtc_time));
+- read_time(&time);
+- if (copy_to_user((void __user *)arg, &time, sizeof(struct rtc_time)))
+- return -EFAULT;
+- break;
+- case RTC_SET_TIME:
+- if (capable(CAP_SYS_TIME) == 0)
+- return -EACCES;
+-
+- if (copy_from_user(&time, (struct rtc_time __user *)arg,
+- sizeof(struct rtc_time)))
+- return -EFAULT;
+-
+- set_time(&time);
+- break;
+- case RTC_IRQP_READ:
+- return put_user(periodic_frequency, (unsigned long __user *)arg);
+- break;
+- case RTC_IRQP_SET:
+- if (arg > MAX_PERIODIC_RATE)
+- return -EINVAL;
+-
+- if (from == FUNCTION_RTC_IOCTL && arg > MAX_USER_PERIODIC_RATE &&
+- capable(CAP_SYS_RESOURCE) == 0)
+- return -EACCES;
+-
+- periodic_frequency = arg;
+-
+- count = RTC_FREQUENCY;
+- do_div(count, arg);
+-
+- periodic_count = count;
+-
+- spin_lock_irq(&rtc_lock);
+-
+- rtc1_write(RTCL1LREG, count);
+- rtc1_write(RTCL1HREG, count >> 16);
+-
+- spin_unlock_irq(&rtc_lock);
+- break;
+- case RTC_EPOCH_READ:
+- return put_user(epoch, (unsigned long __user *)arg);
+- case RTC_EPOCH_SET:
+- /* Doesn't support before 1900 */
+- if (arg < 1900)
+- return -EINVAL;
+-
+- if (capable(CAP_SYS_TIME) == 0)
+- return -EACCES;
+-
+- epoch = arg;
+- break;
+- default:
+- return -EINVAL;
+- }
+-
+- return 0;
+-}
+-
+-static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
+- unsigned long arg)
+-{
+- return rtc_do_ioctl(cmd, arg, FUNCTION_RTC_IOCTL);
+-}
+-
+-static int rtc_open(struct inode *inode, struct file *file)
+-{
+- spin_lock_irq(&rtc_lock);
+-
+- if (rtc_status == RTC_OPEN) {
+- spin_unlock_irq(&rtc_lock);
+- return -EBUSY;
+- }
+-
+- rtc_status = RTC_OPEN;
+- rtc_irq_data = 0;
+-
+- spin_unlock_irq(&rtc_lock);
+-
+- return 0;
+-}
+-
+-static int rtc_release(struct inode *inode, struct file *file)
+-{
+- if (file->f_flags & FASYNC)
+- (void)fasync_helper(-1, file, 0, &rtc_async_queue);
+-
+- spin_lock_irq(&rtc_lock);
+-
+- rtc1_write(ECMPLREG, 0);
+- rtc1_write(ECMPMREG, 0);
+- rtc1_write(ECMPHREG, 0);
+- rtc1_write(RTCL1LREG, 0);
+- rtc1_write(RTCL1HREG, 0);
+-
+- rtc_status = RTC_RELEASE;
+-
+- spin_unlock_irq(&rtc_lock);
+-
+- disable_irq(ELAPSEDTIME_IRQ);
+- disable_irq(RTCLONG1_IRQ);
+-
+- return 0;
+-}
+-
+-static int rtc_fasync(int fd, struct file *file, int on)
+-{
+- return fasync_helper(fd, file, on, &rtc_async_queue);
+-}
+-
+-static struct file_operations rtc_fops = {
+- .owner = THIS_MODULE,
+- .llseek = no_llseek,
+- .read = rtc_read,
+- .poll = rtc_poll,
+- .ioctl = rtc_ioctl,
+- .open = rtc_open,
+- .release = rtc_release,
+- .fasync = rtc_fasync,
+-};
+-
+-static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+-{
+- spin_lock(&rtc_lock);
+- rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
+-
+- rtc_irq_data += 0x100;
+- rtc_irq_data &= ~0xff;
+- rtc_irq_data |= RTC_AF;
+- spin_unlock(&rtc_lock);
+-
+- spin_lock(&rtc_lock);
+- if (rtc_callback)
+- rtc_callback->func(rtc_callback->private_data);
+- spin_unlock(&rtc_lock);
+-
+- wake_up_interruptible(&rtc_wait);
+-
+- kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
+-
+- return IRQ_HANDLED;
+-}
+-
+-static irqreturn_t rtclong1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+-{
+- unsigned long count = periodic_count;
+-
+- spin_lock(&rtc_lock);
+- rtc2_write(RTCINTREG, RTCLONG1_INT);
+-
+- rtc1_write(RTCL1LREG, count);
+- rtc1_write(RTCL1HREG, count >> 16);
+-
+- rtc_irq_data += 0x100;
+- rtc_irq_data &= ~0xff;
+- rtc_irq_data |= RTC_PF;
+- spin_unlock(&rtc_lock);
+-
+- spin_lock(&rtc_task_lock);
+- if (rtc_callback)
+- rtc_callback->func(rtc_callback->private_data);
+- spin_unlock(&rtc_task_lock);
+-
+- wake_up_interruptible(&rtc_wait);
+-
+- kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
+-
+- return IRQ_HANDLED;
+-}
+-
+-int rtc_register(rtc_task_t *task)
+-{
+- if (task == NULL || task->func == NULL)
+- return -EINVAL;
+-
+- spin_lock_irq(&rtc_lock);
+- if (rtc_status == RTC_OPEN) {
+- spin_unlock_irq(&rtc_lock);
+- return -EBUSY;
+- }
+-
+- spin_lock(&rtc_task_lock);
+- if (rtc_callback != NULL) {
+- spin_unlock(&rtc_task_lock);
+- spin_unlock_irq(&rtc_task_lock);
+- return -EBUSY;
+- }
+-
+- rtc_callback = task;
+- spin_unlock(&rtc_task_lock);
+-
+- rtc_status = RTC_OPEN;
+-
+- spin_unlock_irq(&rtc_lock);
+-
+- return 0;
+-}
+-
+-EXPORT_SYMBOL_GPL(rtc_register);
+-
+-int rtc_unregister(rtc_task_t *task)
+-{
+- spin_lock_irq(&rtc_task_lock);
+- if (task == NULL || rtc_callback != task) {
+- spin_unlock_irq(&rtc_task_lock);
+- return -ENXIO;
+- }
+-
+- spin_lock(&rtc_lock);
+-
+- rtc1_write(ECMPLREG, 0);
+- rtc1_write(ECMPMREG, 0);
+- rtc1_write(ECMPHREG, 0);
+- rtc1_write(RTCL1LREG, 0);
+- rtc1_write(RTCL1HREG, 0);
+-
+- rtc_status = RTC_RELEASE;
+-
+- spin_unlock(&rtc_lock);
+-
+- rtc_callback = NULL;
+-
+- spin_unlock_irq(&rtc_task_lock);
+-
+- disable_irq(ELAPSEDTIME_IRQ);
+- disable_irq(RTCLONG1_IRQ);
+-
+- return 0;
+-}
+-
+-EXPORT_SYMBOL_GPL(rtc_unregister);
+-
+-int rtc_control(rtc_task_t *task, unsigned int cmd, unsigned long arg)
+-{
+- int retval = 0;
+-
+- spin_lock_irq(&rtc_task_lock);
+-
+- if (rtc_callback != task)
+- retval = -ENXIO;
+- else
+- rtc_do_ioctl(cmd, arg, FUNCTION_RTC_CONTROL);
+-
+- spin_unlock_irq(&rtc_task_lock);
+-
+- return retval;
+-}
+-
+-EXPORT_SYMBOL_GPL(rtc_control);
+-
+-static struct miscdevice rtc_miscdevice = {
+- .minor = RTC_MINOR,
+- .name = rtc_name,
+- .fops = &rtc_fops,
+-};
+-
+-static int rtc_probe(struct device *dev)
+-{
+- struct platform_device *pdev;
+- unsigned int irq;
+- int retval;
+-
+- pdev = to_platform_device(dev);
+- if (pdev->num_resources != 2)
+- return -EBUSY;
+-
+- rtc1_base = ioremap(pdev->resource[0].start, RTC1_SIZE);
+- if (rtc1_base == NULL)
+- return -EBUSY;
+-
+- rtc2_base = ioremap(pdev->resource[1].start, RTC2_SIZE);
+- if (rtc2_base == NULL) {
+- iounmap(rtc1_base);
+- rtc1_base = NULL;
+- return -EBUSY;
+- }
+-
+- retval = misc_register(&rtc_miscdevice);
+- if (retval < 0) {
+- iounmap(rtc1_base);
+- iounmap(rtc2_base);
+- rtc1_base = NULL;
+- rtc2_base = NULL;
+- return retval;
+- }
+-
+- spin_lock_irq(&rtc_lock);
+-
+- rtc1_write(ECMPLREG, 0);
+- rtc1_write(ECMPMREG, 0);
+- rtc1_write(ECMPHREG, 0);
+- rtc1_write(RTCL1LREG, 0);
+- rtc1_write(RTCL1HREG, 0);
+-
+- rtc_status = RTC_RELEASE;
+- rtc_irq_data = 0;
+-
+- spin_unlock_irq(&rtc_lock);
+-
+- init_waitqueue_head(&rtc_wait);
+-
+- irq = ELAPSEDTIME_IRQ;
+- retval = request_irq(irq, elapsedtime_interrupt, SA_INTERRUPT,
+- "elapsed_time", NULL);
+- if (retval == 0) {
+- irq = RTCLONG1_IRQ;
+- retval = request_irq(irq, rtclong1_interrupt, SA_INTERRUPT,
+- "rtclong1", NULL);
+- }
+-
+- if (retval < 0) {
+- printk(KERN_ERR "rtc: IRQ%d is busy\n", irq);
+- if (irq == RTCLONG1_IRQ)
+- free_irq(ELAPSEDTIME_IRQ, NULL);
+- iounmap(rtc1_base);
+- iounmap(rtc2_base);
+- rtc1_base = NULL;
+- rtc2_base = NULL;
+- return retval;
+- }
+-
+- disable_irq(ELAPSEDTIME_IRQ);
+- disable_irq(RTCLONG1_IRQ);
+-
+- spin_lock_init(&rtc_task_lock);
+-
+- printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
+-
+- return 0;
+-}
+-
+-static int rtc_remove(struct device *dev)
+-{
+- int retval;
+-
+- retval = misc_deregister(&rtc_miscdevice);
+- if (retval < 0)
+- return retval;
+-
+- free_irq(ELAPSEDTIME_IRQ, NULL);
+- free_irq(RTCLONG1_IRQ, NULL);
+- if (rtc1_base != NULL)
+- iounmap(rtc1_base);
+- if (rtc2_base != NULL)
+- iounmap(rtc2_base);
+-
+- return 0;
+-}
+-
+-static struct platform_device *rtc_platform_device;
+-
+-static struct device_driver rtc_device_driver = {
+- .name = rtc_name,
+- .bus = &platform_bus_type,
+- .probe = rtc_probe,
+- .remove = rtc_remove,
+-};
+-
+-static int __devinit vr41xx_rtc_init(void)
+-{
+- int retval;
+-
+- switch (current_cpu_data.cputype) {
+- case CPU_VR4111:
+- case CPU_VR4121:
+- rtc_resource[0].start = RTC1_TYPE1_START;
+- rtc_resource[0].end = RTC1_TYPE1_END;
+- rtc_resource[1].start = RTC2_TYPE1_START;
+- rtc_resource[1].end = RTC2_TYPE1_END;
+- break;
+- case CPU_VR4122:
+- case CPU_VR4131:
+- case CPU_VR4133:
+- rtc_resource[0].start = RTC1_TYPE2_START;
+- rtc_resource[0].end = RTC1_TYPE2_END;
+- rtc_resource[1].start = RTC2_TYPE2_START;
+- rtc_resource[1].end = RTC2_TYPE2_END;
+- break;
+- default:
+- return -ENODEV;
+- break;
+- }
+-
+- rtc_platform_device = platform_device_register_simple("RTC", -1, rtc_resource, RTC_NUM_RESOURCES);
+- if (IS_ERR(rtc_platform_device))
+- return PTR_ERR(rtc_platform_device);
+-
+- retval = driver_register(&rtc_device_driver);
+- if (retval < 0)
+- platform_device_unregister(rtc_platform_device);
+-
+- return retval;
+-}
+-
+-static void __devexit vr41xx_rtc_exit(void)
+-{
+- driver_unregister(&rtc_device_driver);
+-
+- platform_device_unregister(rtc_platform_device);
+-}
+-
+-module_init(vr41xx_rtc_init);
+-module_exit(vr41xx_rtc_exit);
+diff -urpNX dontdiff linux-2.6.12/drivers/i2c/busses/i2c-au1550.c linux_HEAD/drivers/i2c/busses/i2c-au1550.c
+--- linux-2.6.12/drivers/i2c/busses/i2c-au1550.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/i2c/busses/i2c-au1550.c 2005-07-10 12:28:27.000000000 +0200
+@@ -27,7 +27,6 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-@@ -290,8 +290,8 @@ static struct i2c_algorithm au1550_algo
- .functionality = au1550_func,
- };
+ */
--/*
-- * registering functions to load algorithms at runtime
-+/*
-+ * registering functions to load algorithms at runtime
- * Prior to calling us, the 50MHz clock frequency and routing
- * must have been set up for the PSC indicated by the adapter.
- */
-diff -urpNX dontdiff linux-2.6.11.6/drivers/i2c/busses/i2c-sibyte.c linux_HEAD/drivers/i2c/busses/i2c-sibyte.c
---- linux-2.6.11.6/drivers/i2c/busses/i2c-sibyte.c 2005-03-26 04:28:36.000000000 +0100
+-#include <linux/config.h>
+ #include <linux/delay.h>
+ #include <linux/kernel.h>
+ #include <linux/module.h>
+diff -urpNX dontdiff linux-2.6.12/drivers/i2c/busses/i2c-sibyte.c linux_HEAD/drivers/i2c/busses/i2c-sibyte.c
+--- linux-2.6.12/drivers/i2c/busses/i2c-sibyte.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/i2c/busses/i2c-sibyte.c 2005-01-11 18:55:08.000000000 +0100
@@ -24,8 +24,8 @@
#include <asm/sibyte/sb1250_smbus.h>
@@ -26897,8 +46959,8 @@
};
static struct i2c_adapter sibyte_board_adapter[2] = {
-diff -urpNX dontdiff linux-2.6.11.6/drivers/ide/Kconfig linux_HEAD/drivers/ide/Kconfig
---- linux-2.6.11.6/drivers/ide/Kconfig 2005-04-03 00:10:57.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/drivers/ide/Kconfig linux_HEAD/drivers/ide/Kconfig
+--- linux-2.6.12/drivers/ide/Kconfig 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/ide/Kconfig 2005-03-21 20:04:08.000000000 +0100
@@ -771,6 +771,10 @@ config BLK_DEV_IDE_PMAC_BLINK
This option enables the use of the sleep LED as a hard drive
@@ -26911,10 +46973,10 @@
config IDE_ARM
def_bool ARM && (ARCH_A5K || ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK)
-diff -urpNX dontdiff linux-2.6.11.6/drivers/ide/Makefile linux_HEAD/drivers/ide/Makefile
---- linux-2.6.11.6/drivers/ide/Makefile 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/drivers/ide/Makefile 2004-11-19 01:14:26.000000000 +0100
-@@ -50,6 +50,6 @@ obj-$(CONFIG_BLK_DEV_IDECD) += ide-cd.o
+diff -urpNX dontdiff linux-2.6.12/drivers/ide/Makefile linux_HEAD/drivers/ide/Makefile
+--- linux-2.6.12/drivers/ide/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/ide/Makefile 2005-04-08 22:40:57.000000000 +0200
+@@ -49,6 +49,6 @@ obj-$(CONFIG_BLK_DEV_IDECD) += ide-cd.o
obj-$(CONFIG_BLK_DEV_IDETAPE) += ide-tape.o
obj-$(CONFIG_BLK_DEV_IDEFLOPPY) += ide-floppy.o
@@ -26922,10 +46984,10 @@
+obj-$(CONFIG_BLK_DEV_IDE) += legacy/ arm/ mips/
obj-$(CONFIG_BLK_DEV_HD) += legacy/
obj-$(CONFIG_ETRAX_IDE) += cris/
-diff -urpNX dontdiff linux-2.6.11.6/drivers/ide/ide.c linux_HEAD/drivers/ide/ide.c
---- linux-2.6.11.6/drivers/ide/ide.c 2005-04-03 00:10:58.000000000 +0200
-+++ linux_HEAD/drivers/ide/ide.c 2005-03-21 20:04:09.000000000 +0100
-@@ -2003,6 +2003,12 @@ static void __init probe_for_hwifs (void
+diff -urpNX dontdiff linux-2.6.12/drivers/ide/ide.c linux_HEAD/drivers/ide/ide.c
+--- linux-2.6.12/drivers/ide/ide.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/ide/ide.c 2005-07-01 12:09:38.000000000 +0200
+@@ -1843,6 +1843,12 @@ static void __init probe_for_hwifs (void
q40ide_init();
}
#endif /* CONFIG_BLK_DEV_Q40IDE */
@@ -26938,15 +47000,15 @@
#ifdef CONFIG_BLK_DEV_BUDDHA
{
extern void buddha_init(void);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/ide/mips/Makefile linux_HEAD/drivers/ide/mips/Makefile
---- linux-2.6.11.6/drivers/ide/mips/Makefile 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/ide/mips/Makefile linux_HEAD/drivers/ide/mips/Makefile
+--- linux-2.6.12/drivers/ide/mips/Makefile 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/ide/mips/Makefile 2004-09-21 13:10:22.000000000 +0200
@@ -0,0 +1,3 @@
+obj-$(CONFIG_BLK_DEV_IDE_SWARM) += swarm.o
+
+EXTRA_CFLAGS := -I../
-diff -urpNX dontdiff linux-2.6.11.6/drivers/ide/mips/swarm.c linux_HEAD/drivers/ide/mips/swarm.c
---- linux-2.6.11.6/drivers/ide/mips/swarm.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/ide/mips/swarm.c linux_HEAD/drivers/ide/mips/swarm.c
+--- linux-2.6.12/drivers/ide/mips/swarm.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/ide/mips/swarm.c 2005-02-24 00:13:18.000000000 +0100
@@ -0,0 +1,123 @@
+/*
@@ -27072,407 +47134,9 @@
+ memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
+ hwif->irq = hwif->hw.irq;
+}
-diff -urpNX dontdiff linux-2.6.11.6/drivers/input/serio/i8042-x86ia64io.h linux_HEAD/drivers/input/serio/i8042-x86ia64io.h
---- linux-2.6.11.6/drivers/input/serio/i8042-x86ia64io.h 2005-04-03 00:11:01.000000000 +0200
-+++ linux_HEAD/drivers/input/serio/i8042-x86ia64io.h 2005-03-21 20:04:13.000000000 +0100
-@@ -86,186 +86,208 @@ static struct dmi_system_id __initdata i
- },
- { }
- };
-+
-+/*
-+ * Some Fujitsu notebooks are ahving trouble with touhcpads if
-+ * active multiplexing mode is activated. Luckily they don't have
-+ * external PS/2 ports so we can safely disable it.
-+ */
-+static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
-+ {
-+ .ident = "Fujitsu Lifebook P7010/P7010D",
-+ .matches = {
-+ DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
-+ DMI_MATCH(DMI_PRODUCT_NAME, "P7010"),
-+ },
-+ },
-+ {
-+ .ident = "Fujitsu Lifebook P5020D",
-+ .matches = {
-+ DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
-+ DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook P Series"),
-+ },
-+ },
-+ {
-+ .ident = "Fujitsu Lifebook S2000",
-+ .matches = {
-+ DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
-+ DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook S Series"),
-+ },
-+ },
-+ {
-+ .ident = "Fujitsu T70H",
-+ .matches = {
-+ DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
-+ DMI_MATCH(DMI_PRODUCT_NAME, "FMVLT70H"),
-+ },
-+ },
-+ { }
-+};
-+
-+
-+
- #endif
-
--#if defined(__ia64__) && defined(CONFIG_ACPI)
--#include <linux/acpi.h>
--#include <acpi/acpi_bus.h>
--
--struct i8042_acpi_resources {
-- unsigned int port1;
-- unsigned int port2;
-- unsigned int irq;
--};
--
--static int i8042_acpi_kbd_registered;
--static int i8042_acpi_aux_registered;
--
--static acpi_status i8042_acpi_parse_resource(struct acpi_resource *res, void *data)
--{
-- struct i8042_acpi_resources *i8042_res = data;
-- struct acpi_resource_io *io;
-- struct acpi_resource_fixed_io *fixed_io;
-- struct acpi_resource_irq *irq;
-- struct acpi_resource_ext_irq *ext_irq;
--
-- switch (res->id) {
-- case ACPI_RSTYPE_IO:
-- io = &res->data.io;
-- if (io->range_length) {
-- if (!i8042_res->port1)
-- i8042_res->port1 = io->min_base_address;
-- else
-- i8042_res->port2 = io->min_base_address;
-- }
-- break;
--
-- case ACPI_RSTYPE_FIXED_IO:
-- fixed_io = &res->data.fixed_io;
-- if (fixed_io->range_length) {
-- if (!i8042_res->port1)
-- i8042_res->port1 = fixed_io->base_address;
-- else
-- i8042_res->port2 = fixed_io->base_address;
-- }
-- break;
--
-- case ACPI_RSTYPE_IRQ:
-- irq = &res->data.irq;
-- if (irq->number_of_interrupts > 0)
-- i8042_res->irq =
-- acpi_register_gsi(irq->interrupts[0],
-- irq->edge_level,
-- irq->active_high_low);
-- break;
--
-- case ACPI_RSTYPE_EXT_IRQ:
-- ext_irq = &res->data.extended_irq;
-- if (ext_irq->number_of_interrupts > 0)
-- i8042_res->irq =
-- acpi_register_gsi(ext_irq->interrupts[0],
-- ext_irq->edge_level,
-- ext_irq->active_high_low);
-- break;
-- }
-- return AE_OK;
--}
--
--static int i8042_acpi_kbd_add(struct acpi_device *device)
--{
-- struct i8042_acpi_resources kbd_res;
-- acpi_status status;
--
-- memset(&kbd_res, 0, sizeof(kbd_res));
-- status = acpi_walk_resources(device->handle, METHOD_NAME__CRS,
-- i8042_acpi_parse_resource, &kbd_res);
-- if (ACPI_FAILURE(status))
-- return -ENODEV;
-
-- if (kbd_res.port1)
-- i8042_data_reg = kbd_res.port1;
-- else
-- printk(KERN_WARNING "ACPI: [%s] has no data port; default is 0x%x\n",
-- acpi_device_bid(device), i8042_data_reg);
--
-- if (kbd_res.port2)
-- i8042_command_reg = kbd_res.port2;
-- else
-- printk(KERN_WARNING "ACPI: [%s] has no command port; default is 0x%x\n",
-- acpi_device_bid(device), i8042_command_reg);
--
-- if (kbd_res.irq)
-- i8042_kbd_irq = kbd_res.irq;
-- else
-- printk(KERN_WARNING "ACPI: [%s] has no IRQ; default is %d\n",
-- acpi_device_bid(device), i8042_kbd_irq);
--
-- strncpy(acpi_device_name(device), "PS/2 Keyboard Controller",
-- sizeof(acpi_device_name(device)));
-- printk("ACPI: %s [%s] at I/O 0x%x, 0x%x, irq %d\n",
-- acpi_device_name(device), acpi_device_bid(device),
-- i8042_data_reg, i8042_command_reg, i8042_kbd_irq);
-+#ifdef CONFIG_PNP
-+#include <linux/pnp.h>
-+
-+static int i8042_pnp_kbd_registered;
-+static int i8042_pnp_aux_registered;
-+
-+static int i8042_pnp_command_reg;
-+static int i8042_pnp_data_reg;
-+static int i8042_pnp_kbd_irq;
-+static int i8042_pnp_aux_irq;
-+
-+static char i8042_pnp_kbd_name[32];
-+static char i8042_pnp_aux_name[32];
-+
-+static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id *did)
-+{
-+ if (pnp_port_valid(dev, 0) && pnp_port_len(dev, 0) == 1)
-+ i8042_pnp_data_reg = pnp_port_start(dev,0);
-+
-+ if (pnp_port_valid(dev, 1) && pnp_port_len(dev, 1) == 1)
-+ i8042_pnp_command_reg = pnp_port_start(dev, 1);
-+
-+ if (pnp_irq_valid(dev,0))
-+ i8042_pnp_kbd_irq = pnp_irq(dev, 0);
-+
-+ strncpy(i8042_pnp_kbd_name, did->id, sizeof(i8042_pnp_kbd_name));
-+ if (strlen(pnp_dev_name(dev))) {
-+ strncat(i8042_pnp_kbd_name, ":", sizeof(i8042_pnp_kbd_name));
-+ strncat(i8042_pnp_kbd_name, pnp_dev_name(dev), sizeof(i8042_pnp_kbd_name));
-+ }
-
- return 0;
- }
-
--static int i8042_acpi_aux_add(struct acpi_device *device)
-+static int i8042_pnp_aux_probe(struct pnp_dev *dev, const struct pnp_device_id *did)
- {
-- struct i8042_acpi_resources aux_res;
-- acpi_status status;
-+ if (pnp_port_valid(dev, 0) && pnp_port_len(dev, 0) == 1)
-+ i8042_pnp_data_reg = pnp_port_start(dev,0);
-
-- memset(&aux_res, 0, sizeof(aux_res));
-- status = acpi_walk_resources(device->handle, METHOD_NAME__CRS,
-- i8042_acpi_parse_resource, &aux_res);
-- if (ACPI_FAILURE(status))
-- return -ENODEV;
-+ if (pnp_port_valid(dev, 1) && pnp_port_len(dev, 1) == 1)
-+ i8042_pnp_command_reg = pnp_port_start(dev, 1);
-
-- if (aux_res.irq)
-- i8042_aux_irq = aux_res.irq;
-- else
-- printk(KERN_WARNING "ACPI: [%s] has no IRQ; default is %d\n",
-- acpi_device_bid(device), i8042_aux_irq);
--
-- strncpy(acpi_device_name(device), "PS/2 Mouse Controller",
-- sizeof(acpi_device_name(device)));
-- printk("ACPI: %s [%s] at irq %d\n",
-- acpi_device_name(device), acpi_device_bid(device), i8042_aux_irq);
-+ if (pnp_irq_valid(dev, 0))
-+ i8042_pnp_aux_irq = pnp_irq(dev, 0);
-+
-+ strncpy(i8042_pnp_aux_name, did->id, sizeof(i8042_pnp_aux_name));
-+ if (strlen(pnp_dev_name(dev))) {
-+ strncat(i8042_pnp_aux_name, ":", sizeof(i8042_pnp_aux_name));
-+ strncat(i8042_pnp_aux_name, pnp_dev_name(dev), sizeof(i8042_pnp_aux_name));
-+ }
-
- return 0;
- }
-
--static struct acpi_driver i8042_acpi_kbd_driver = {
-- .name = "i8042",
-- .ids = "PNP0303,PNP030B",
-- .ops = {
-- .add = i8042_acpi_kbd_add,
-- },
-+static struct pnp_device_id pnp_kbd_devids[] = {
-+ { .id = "PNP0303", .driver_data = 0 },
-+ { .id = "PNP030b", .driver_data = 0 },
-+ { .id = "", },
- };
-
--static struct acpi_driver i8042_acpi_aux_driver = {
-- .name = "i8042",
-- .ids = "PNP0F03,PNP0F0B,PNP0F0E,PNP0F12,PNP0F13,SYN0801",
-- .ops = {
-- .add = i8042_acpi_aux_add,
-- },
-+static struct pnp_driver i8042_pnp_kbd_driver = {
-+ .name = "i8042 kbd",
-+ .id_table = pnp_kbd_devids,
-+ .probe = i8042_pnp_kbd_probe,
-+};
-+
-+static struct pnp_device_id pnp_aux_devids[] = {
-+ { .id = "PNP0f03", .driver_data = 0 },
-+ { .id = "PNP0f0b", .driver_data = 0 },
-+ { .id = "PNP0f0e", .driver_data = 0 },
-+ { .id = "PNP0f12", .driver_data = 0 },
-+ { .id = "PNP0f13", .driver_data = 0 },
-+ { .id = "PNP0f19", .driver_data = 0 },
-+ { .id = "PNP0f1c", .driver_data = 0 },
-+ { .id = "SYN0801", .driver_data = 0 },
-+ { .id = "", },
- };
-
--static int i8042_acpi_init(void)
-+static struct pnp_driver i8042_pnp_aux_driver = {
-+ .name = "i8042 aux",
-+ .id_table = pnp_aux_devids,
-+ .probe = i8042_pnp_aux_probe,
-+};
-+
-+static void i8042_pnp_exit(void)
- {
-- int result;
-+ if (i8042_pnp_kbd_registered)
-+ pnp_unregister_driver(&i8042_pnp_kbd_driver);
-+
-+ if (i8042_pnp_aux_registered)
-+ pnp_unregister_driver(&i8042_pnp_aux_driver);
-+}
-
-- if (acpi_disabled || i8042_noacpi) {
-- printk("i8042: ACPI detection disabled\n");
-+static int i8042_pnp_init(void)
-+{
-+ int result_kbd, result_aux;
-+
-+ if (i8042_nopnp) {
-+ printk("i8042: PNP detection disabled\n");
- return 0;
- }
-
-- result = acpi_bus_register_driver(&i8042_acpi_kbd_driver);
-- if (result < 0)
-- return result;
-+ if ((result_kbd = pnp_register_driver(&i8042_pnp_kbd_driver)) >= 0)
-+ i8042_pnp_kbd_registered = 1;
-+ if ((result_aux = pnp_register_driver(&i8042_pnp_aux_driver)) >= 0)
-+ i8042_pnp_aux_registered = 1;
-
-- if (result == 0) {
-- acpi_bus_unregister_driver(&i8042_acpi_kbd_driver);
-+ if (result_kbd <= 0 && result_aux <= 0) {
-+ i8042_pnp_exit();
-+#if defined(__ia64__)
- return -ENODEV;
-+#else
-+ printk(KERN_WARNING "PNP: No PS/2 controller found. Probing ports directly.\n");
-+ return 0;
-+#endif
-+ }
-+
-+ if (((i8042_pnp_data_reg & ~0xf) == (i8042_data_reg & ~0xf) &&
-+ i8042_pnp_data_reg != i8042_data_reg) || !i8042_pnp_data_reg) {
-+ printk(KERN_WARNING "PNP: PS/2 controller has invalid data port %#x; using default %#x\n",
-+ i8042_pnp_data_reg, i8042_data_reg);
-+ i8042_pnp_data_reg = i8042_data_reg;
-+ }
-+
-+ if (((i8042_pnp_command_reg & ~0xf) == (i8042_command_reg & ~0xf) &&
-+ i8042_pnp_command_reg != i8042_command_reg) || !i8042_pnp_command_reg) {
-+ printk(KERN_WARNING "PNP: PS/2 controller has invalid command port %#x; using default %#x\n",
-+ i8042_pnp_command_reg, i8042_command_reg);
-+ i8042_pnp_command_reg = i8042_command_reg;
-+ }
-+
-+ if (!i8042_pnp_kbd_irq) {
-+ printk(KERN_WARNING "PNP: PS/2 controller doesn't have KBD irq; using default %#x\n", i8042_kbd_irq);
-+ i8042_pnp_kbd_irq = i8042_kbd_irq;
-+ }
-+
-+ if (result_aux > 0 && !i8042_pnp_aux_irq) {
-+ printk(KERN_WARNING "PNP: PS/2 controller doesn't have AUX irq; using default %#x\n", i8042_aux_irq);
-+ i8042_pnp_aux_irq = i8042_aux_irq;
- }
-- i8042_acpi_kbd_registered = 1;
-
-- result = acpi_bus_register_driver(&i8042_acpi_aux_driver);
-- if (result >= 0)
-- i8042_acpi_aux_registered = 1;
-- if (result == 0)
-+#if defined(__ia64__)
-+ if (result_aux <= 0)
- i8042_noaux = 1;
-+#endif
-+
-+ i8042_data_reg = i8042_pnp_data_reg;
-+ i8042_command_reg = i8042_pnp_command_reg;
-+ i8042_kbd_irq = i8042_pnp_kbd_irq;
-+ i8042_aux_irq = i8042_pnp_aux_irq;
-+
-+ printk(KERN_INFO "PNP: PS/2 Controller [%s%s%s] at %#x,%#x irq %d%s%d\n",
-+ i8042_pnp_kbd_name, (result_kbd > 0 && result_aux > 0) ? "," : "", i8042_pnp_aux_name,
-+ i8042_data_reg, i8042_command_reg, i8042_kbd_irq,
-+ (result_aux > 0) ? "," : "", i8042_aux_irq);
-
- return 0;
- }
-
--static void i8042_acpi_exit(void)
--{
-- if (i8042_acpi_kbd_registered)
-- acpi_bus_unregister_driver(&i8042_acpi_kbd_driver);
--
-- if (i8042_acpi_aux_registered)
-- acpi_bus_unregister_driver(&i8042_acpi_aux_driver);
--}
- #endif
-
- static inline int i8042_platform_init(void)
-@@ -281,8 +303,8 @@ static inline int i8042_platform_init(vo
- i8042_kbd_irq = I8042_MAP_IRQ(1);
- i8042_aux_irq = I8042_MAP_IRQ(12);
-
--#if defined(__ia64__) && defined(CONFIG_ACPI)
-- if (i8042_acpi_init())
-+#ifdef CONFIG_PNP
-+ if (i8042_pnp_init())
- return -1;
- #endif
-
-@@ -303,8 +325,8 @@ static inline int i8042_platform_init(vo
-
- static inline void i8042_platform_exit(void)
- {
--#if defined(__ia64__) && defined(CONFIG_ACPI)
-- i8042_acpi_exit();
-+#ifdef CONFIG_PNP
-+ i8042_pnp_exit();
- #endif
- }
-
-diff -urpNX dontdiff linux-2.6.11.6/drivers/md/raid6altivec.uc linux_HEAD/drivers/md/raid6altivec.uc
---- linux-2.6.11.6/drivers/md/raid6altivec.uc 2005-04-03 00:11:02.000000000 +0200
-+++ linux_HEAD/drivers/md/raid6altivec.uc 2005-03-21 20:04:17.000000000 +0100
-@@ -108,11 +108,7 @@ int raid6_have_altivec(void);
- int raid6_have_altivec(void)
- {
- /* This assumes either all CPUs have Altivec or none does */
--#ifdef CONFIG_PPC64
-- return cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC;
--#else
-- return cur_cpu_spec[0]->cpu_features & CPU_FTR_ALTIVEC;
--#endif
-+ return cpu_has_feature(CPU_FTR_ALTIVEC);
- }
- #endif
-
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/Kconfig linux_HEAD/drivers/media/video/Kconfig
---- linux-2.6.11.6/drivers/media/video/Kconfig 2005-04-03 00:11:02.000000000 +0200
-+++ linux_HEAD/drivers/media/video/Kconfig 2005-03-21 20:04:18.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/media/video/Kconfig linux_HEAD/drivers/media/video/Kconfig
+--- linux-2.6.12/drivers/media/video/Kconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/media/video/Kconfig 2005-07-01 12:09:44.000000000 +0200
@@ -82,6 +82,14 @@ config VIDEO_W9966
Check out <file:Documentation/video4linux/w9966.txt> for more
information.
@@ -27488,8 +47152,8 @@
config VIDEO_CPIA
tristate "CPiA Video For Linux"
depends on VIDEO_DEV
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/Makefile linux_HEAD/drivers/media/video/Makefile
---- linux-2.6.11.6/drivers/media/video/Makefile 2005-04-03 00:11:02.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/drivers/media/video/Makefile linux_HEAD/drivers/media/video/Makefile
+--- linux-2.6.12/drivers/media/video/Makefile 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/media/video/Makefile 2005-03-21 20:04:18.000000000 +0100
@@ -51,6 +51,9 @@ obj-$(CONFIG_VIDEO_BUF_DVB) += video-buf
obj-$(CONFIG_VIDEO_BTCX) += btcx-risc.o
@@ -27501,149 +47165,8 @@
obj-$(CONFIG_VIDEO_M32R_AR_M64278) += arv.o
EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/adv7170.c linux_HEAD/drivers/media/video/adv7170.c
---- linux-2.6.11.6/drivers/media/video/adv7170.c 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/drivers/media/video/adv7170.c 2005-03-21 20:04:18.000000000 +0100
-@@ -402,7 +402,6 @@ static struct i2c_client_address_data ad
- .force = force
- };
-
--static int adv7170_i2c_id = 0;
- static struct i2c_driver i2c_driver_adv7170;
-
- static int
-@@ -432,7 +431,6 @@ adv7170_detect_client (struct i2c_adapte
- client->adapter = adapter;
- client->driver = &i2c_driver_adv7170;
- client->flags = I2C_CLIENT_ALLOW_USE;
-- client->id = adv7170_i2c_id++;
- if ((client->addr == I2C_ADV7170 >> 1) ||
- (client->addr == (I2C_ADV7170 >> 1) + 1)) {
- dname = adv7170_name;
-@@ -444,8 +442,7 @@ adv7170_detect_client (struct i2c_adapte
- kfree(client);
- return 0;
- }
-- snprintf(I2C_NAME(client), sizeof(I2C_NAME(client)) - 1,
-- "%s[%d]", dname, client->id);
-+ strlcpy(I2C_NAME(client), dname, sizeof(I2C_NAME(client)));
-
- encoder = kmalloc(sizeof(struct adv7170), GFP_KERNEL);
- if (encoder == NULL) {
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/adv7175.c linux_HEAD/drivers/media/video/adv7175.c
---- linux-2.6.11.6/drivers/media/video/adv7175.c 2005-03-26 04:28:36.000000000 +0100
-+++ linux_HEAD/drivers/media/video/adv7175.c 2005-03-21 20:04:18.000000000 +0100
-@@ -452,7 +452,6 @@ static struct i2c_client_address_data ad
- .force = force
- };
-
--static int adv7175_i2c_id = 0;
- static struct i2c_driver i2c_driver_adv7175;
-
- static int
-@@ -482,7 +481,6 @@ adv7175_detect_client (struct i2c_adapte
- client->adapter = adapter;
- client->driver = &i2c_driver_adv7175;
- client->flags = I2C_CLIENT_ALLOW_USE;
-- client->id = adv7175_i2c_id++;
- if ((client->addr == I2C_ADV7175 >> 1) ||
- (client->addr == (I2C_ADV7175 >> 1) + 1)) {
- dname = adv7175_name;
-@@ -494,8 +492,7 @@ adv7175_detect_client (struct i2c_adapte
- kfree(client);
- return 0;
- }
-- snprintf(I2C_NAME(client), sizeof(I2C_NAME(client)) - 1,
-- "%s[%d]", dname, client->id);
-+ strlcpy(I2C_NAME(client), dname, sizeof(I2C_NAME(client)));
-
- encoder = kmalloc(sizeof(struct adv7175), GFP_KERNEL);
- if (encoder == NULL) {
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/bt819.c linux_HEAD/drivers/media/video/bt819.c
---- linux-2.6.11.6/drivers/media/video/bt819.c 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/drivers/media/video/bt819.c 2005-03-21 20:04:18.000000000 +0100
-@@ -517,7 +517,6 @@ static struct i2c_client_address_data ad
- .force = force
- };
-
--static int bt819_i2c_id = 0;
- static struct i2c_driver i2c_driver_bt819;
-
- static int
-@@ -546,7 +545,6 @@ bt819_detect_client (struct i2c_adapter
- client->adapter = adapter;
- client->driver = &i2c_driver_bt819;
- client->flags = I2C_CLIENT_ALLOW_USE;
-- client->id = bt819_i2c_id++;
-
- decoder = kmalloc(sizeof(struct bt819), GFP_KERNEL);
- if (decoder == NULL) {
-@@ -568,16 +566,13 @@ bt819_detect_client (struct i2c_adapter
- id = bt819_read(client, 0x17);
- switch (id & 0xf0) {
- case 0x70:
-- snprintf(I2C_NAME(client), sizeof(I2C_NAME(client)) - 1,
-- "bt819a[%d]", client->id);
-+ strlcpy(I2C_NAME(client), "bt819a", sizeof(I2C_NAME(client)));
- break;
- case 0x60:
-- snprintf(I2C_NAME(client), sizeof(I2C_NAME(client)) - 1,
-- "bt817a[%d]", client->id);
-+ strlcpy(I2C_NAME(client), "bt817a", sizeof(I2C_NAME(client)));
- break;
- case 0x20:
-- snprintf(I2C_NAME(client), sizeof(I2C_NAME(client)) - 1,
-- "bt815a[%d]", client->id);
-+ strlcpy(I2C_NAME(client), "bt815a", sizeof(I2C_NAME(client)));
- break;
- default:
- dprintk(1,
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/saa7114.c linux_HEAD/drivers/media/video/saa7114.c
---- linux-2.6.11.6/drivers/media/video/saa7114.c 2005-03-26 04:28:26.000000000 +0100
-+++ linux_HEAD/drivers/media/video/saa7114.c 2005-03-21 20:04:19.000000000 +0100
-@@ -838,7 +838,6 @@ static struct i2c_client_address_data ad
- .force = force
- };
-
--static int saa7114_i2c_id = 0;
- static struct i2c_driver i2c_driver_saa7114;
-
- static int
-@@ -871,9 +870,7 @@ saa7114_detect_client (struct i2c_adapte
- client->adapter = adapter;
- client->driver = &i2c_driver_saa7114;
- client->flags = I2C_CLIENT_ALLOW_USE;
-- client->id = saa7114_i2c_id++;
-- snprintf(I2C_NAME(client), sizeof(I2C_NAME(client)) - 1,
-- "saa7114[%d]", client->id);
-+ strlcpy(I2C_NAME(client), "saa7114", sizeof(I2C_NAME(client)));
-
- decoder = kmalloc(sizeof(struct saa7114), GFP_KERNEL);
- if (decoder == NULL) {
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/saa7185.c linux_HEAD/drivers/media/video/saa7185.c
---- linux-2.6.11.6/drivers/media/video/saa7185.c 2005-03-26 04:28:39.000000000 +0100
-+++ linux_HEAD/drivers/media/video/saa7185.c 2005-03-21 20:04:19.000000000 +0100
-@@ -398,7 +398,6 @@ static struct i2c_client_address_data ad
- .force = force
- };
-
--static int saa7185_i2c_id = 0;
- static struct i2c_driver i2c_driver_saa7185;
-
- static int
-@@ -427,9 +426,7 @@ saa7185_detect_client (struct i2c_adapte
- client->adapter = adapter;
- client->driver = &i2c_driver_saa7185;
- client->flags = I2C_CLIENT_ALLOW_USE;
-- client->id = saa7185_i2c_id++;
-- snprintf(I2C_NAME(client), sizeof(I2C_NAME(client)) - 1,
-- "saa7185[%d]", client->id);
-+ strlcpy(I2C_NAME(client), "saa7185", sizeof(I2C_NAME(client)));
-
- encoder = kmalloc(sizeof(struct saa7185), GFP_KERNEL);
- if (encoder == NULL) {
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/swarm_saa7114h.c linux_HEAD/drivers/media/video/swarm_saa7114h.c
---- linux-2.6.11.6/drivers/media/video/swarm_saa7114h.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/media/video/swarm_saa7114h.c linux_HEAD/drivers/media/video/swarm_saa7114h.c
+--- linux-2.6.12/drivers/media/video/swarm_saa7114h.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/media/video/swarm_saa7114h.c 2005-02-25 14:59:27.000000000 +0100
@@ -0,0 +1,1691 @@
+/*
@@ -29337,46 +48860,8 @@
+
+module_init(swarm_7114h_init);
+module_exit(swarm_7114h_cleanup);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/media/video/vino.c linux_HEAD/drivers/media/video/vino.c
---- linux-2.6.11.6/drivers/media/video/vino.c 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/drivers/media/video/vino.c 2003-09-24 15:24:56.000000000 +0200
-@@ -1,6 +1,6 @@
- /*
- * (incomplete) Driver for the VINO (Video In No Out) system found in SGI Indys.
-- *
-+ *
- * This file is subject to the terms and conditions of the GNU General Public
- * License version 2 as published by the Free Software Foundation.
- *
-@@ -139,7 +139,7 @@ static int i2c_vino_client_reg(struct i2
- static int i2c_vino_client_unreg(struct i2c_client *client)
- {
- int res = 0;
--
-+
- down(&Vino->input_lock);
- if (client == Vino->decoder.driver) {
- if (Vino->decoder.owner)
-@@ -223,7 +223,7 @@ static int __init vino_init(void)
- {
- unsigned long rev;
- int i, ret = 0;
--
-+
- /* VINO is Indy specific beast */
- if (ip22_is_fullhouse())
- return -ENODEV;
-@@ -231,7 +231,7 @@ static int __init vino_init(void)
- /*
- * VINO is in the EISA address space, so the sysid register will tell
- * us if the EISA_PRESENT pin on MC has been pulled low.
-- *
-+ *
- * If EISA_PRESENT is not set we definitely don't have a VINO equiped
- * system.
- */
-diff -urpNX dontdiff linux-2.6.11.6/drivers/mtd/devices/Kconfig linux_HEAD/drivers/mtd/devices/Kconfig
---- linux-2.6.11.6/drivers/mtd/devices/Kconfig 2005-03-26 04:28:42.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/devices/Kconfig linux_HEAD/drivers/mtd/devices/Kconfig
+--- linux-2.6.12/drivers/mtd/devices/Kconfig 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/mtd/devices/Kconfig 2005-02-17 21:49:45.000000000 +0100
@@ -47,6 +47,11 @@ config MTD_MS02NV
accelerator. Say Y here if you have a DECstation 5000/2x0 or a
@@ -29390,8 +48875,8 @@
config MTD_SLRAM
tristate "Uncached system RAM"
depends on MTD
-diff -urpNX dontdiff linux-2.6.11.6/drivers/mtd/devices/docprobe.c linux_HEAD/drivers/mtd/devices/docprobe.c
---- linux-2.6.11.6/drivers/mtd/devices/docprobe.c 2005-03-26 04:28:24.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/devices/docprobe.c linux_HEAD/drivers/mtd/devices/docprobe.c
+--- linux-2.6.12/drivers/mtd/devices/docprobe.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/mtd/devices/docprobe.c 2005-02-17 21:49:45.000000000 +0100
@@ -84,10 +84,10 @@ static unsigned long __initdata doc_loca
0xe4000000,
@@ -29407,8 +48892,47 @@
#warning Unknown architecture for DiskOnChip. No default probe locations defined
#endif
0xffffffff };
-diff -urpNX dontdiff linux-2.6.11.6/drivers/mtd/maps/Kconfig linux_HEAD/drivers/mtd/maps/Kconfig
---- linux-2.6.11.6/drivers/mtd/maps/Kconfig 2005-04-03 00:12:09.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/devices/ms02-nv.c linux_HEAD/drivers/mtd/devices/ms02-nv.c
+--- linux-2.6.12/drivers/mtd/devices/ms02-nv.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/mtd/devices/ms02-nv.c 2005-07-03 16:44:31.000000000 +0200
+@@ -99,8 +99,8 @@ static inline uint ms02nv_probe_one(ulon
+ * The firmware writes MS02NV_ID at MS02NV_MAGIC and also
+ * a diagnostic status at MS02NV_DIAG.
+ */
+- ms02nv_diagp = (ms02nv_uint *)(KSEG1ADDR(addr + MS02NV_DIAG));
+- ms02nv_magicp = (ms02nv_uint *)(KSEG1ADDR(addr + MS02NV_MAGIC));
++ ms02nv_diagp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_DIAG));
++ ms02nv_magicp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_MAGIC));
+ err = get_dbe(ms02nv_magic, ms02nv_magicp);
+ if (err)
+ return 0;
+@@ -233,7 +233,7 @@ static int __init ms02nv_init_one(ulong
+ goto err_out_csr_res;
+ }
+
+- printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMiB.\n",
++ printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %zuMiB.\n",
+ mtd->index, ms02nv_name, addr, size >> 20);
+
+ mp->next = root_ms02nv_mtd;
+@@ -293,13 +293,13 @@ static int __init ms02nv_init(void)
+
+ switch (mips_machtype) {
+ case MACH_DS5000_200:
+- csr = (volatile u32 *)KN02_CSR_BASE;
++ csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
+ if (*csr & KN02_CSR_BNK32M)
+ stride = 2;
+ break;
+ case MACH_DS5000_2X0:
+ case MACH_DS5900:
+- csr = (volatile u32 *)KN03_MCR_BASE;
++ csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
+ if (*csr & KN03_MCR_BNK32M)
+ stride = 2;
+ break;
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/maps/Kconfig linux_HEAD/drivers/mtd/maps/Kconfig
+--- linux-2.6.12/drivers/mtd/maps/Kconfig 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/mtd/maps/Kconfig 2005-03-21 20:04:22.000000000 +0100
@@ -201,87 +201,12 @@ config MTD_TSUNAMI
help
@@ -29536,8 +49060,8 @@
config MTD_SOLUTIONENGINE
tristate "CFI Flash device mapped on Hitachi SolutionEngine"
depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS
-diff -urpNX dontdiff linux-2.6.11.6/drivers/mtd/maps/Makefile linux_HEAD/drivers/mtd/maps/Makefile
---- linux-2.6.11.6/drivers/mtd/maps/Makefile 2005-04-03 00:12:09.000000000 +0200
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/maps/Makefile linux_HEAD/drivers/mtd/maps/Makefile
+--- linux-2.6.12/drivers/mtd/maps/Makefile 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/mtd/maps/Makefile 2005-03-21 20:04:22.000000000 +0100
@@ -44,11 +44,9 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.
obj-$(CONFIG_MTD_OCELOT) += ocelot.o
@@ -29559,8 +49083,8 @@
obj-$(CONFIG_MTD_DMV182) += dmv182.o
-obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
+obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
-diff -urpNX dontdiff linux-2.6.11.6/drivers/mtd/maps/alchemy-flash.c linux_HEAD/drivers/mtd/maps/alchemy-flash.c
---- linux-2.6.11.6/drivers/mtd/maps/alchemy-flash.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/maps/alchemy-flash.c linux_HEAD/drivers/mtd/maps/alchemy-flash.c
+--- linux-2.6.12/drivers/mtd/maps/alchemy-flash.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/mtd/maps/alchemy-flash.c 2005-02-27 23:03:20.000000000 +0100
@@ -0,0 +1,192 @@
+/*
@@ -29755,8 +49279,429 @@
+MODULE_AUTHOR("Embedded Alley Solutions, Inc");
+MODULE_DESCRIPTION(BOARD_MAP_NAME " MTD driver");
+MODULE_LICENSE("GPL");
-diff -urpNX dontdiff linux-2.6.11.6/drivers/mtd/maps/lasat.c linux_HEAD/drivers/mtd/maps/lasat.c
---- linux-2.6.11.6/drivers/mtd/maps/lasat.c 2005-03-26 04:28:16.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/maps/db1550-flash.c linux_HEAD/drivers/mtd/maps/db1550-flash.c
+--- linux-2.6.12/drivers/mtd/maps/db1550-flash.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/mtd/maps/db1550-flash.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,187 +0,0 @@
+-/*
+- * Flash memory access on Alchemy Db1550 board
+- *
+- * $Id: db1550-flash.c,v 1.7 2004/11/04 13:24:14 gleixner Exp $
+- *
+- * (C) 2004 Embedded Edge, LLC, based on db1550-flash.c:
+- * (C) 2003, 2004 Pete Popov <ppopov at embeddedalley.com>
+- *
+- */
+-
+-#include <linux/config.h>
+-#include <linux/init.h>
+-#include <linux/module.h>
+-#include <linux/types.h>
+-#include <linux/kernel.h>
+-
+-#include <linux/mtd/mtd.h>
+-#include <linux/mtd/map.h>
+-#include <linux/mtd/partitions.h>
+-
+-#include <asm/io.h>
+-
+-#ifdef DEBUG_RW
+-#define DBG(x...) printk(x)
+-#else
+-#define DBG(x...)
+-#endif
+-
+-static unsigned long window_addr;
+-static unsigned long window_size;
+-
+-
+-static struct map_info db1550_map = {
+- .name = "Db1550 flash",
+-};
+-
+-static unsigned char flash_bankwidth = 4;
+-
+-/*
+- * Support only 64MB NOR Flash parts
+- */
+-
+-#if defined(CONFIG_MTD_DB1550_BOOT) && defined(CONFIG_MTD_DB1550_USER)
+-#define DB1550_BOTH_BANKS
+-#elif defined(CONFIG_MTD_DB1550_BOOT) && !defined(CONFIG_MTD_DB1550_USER)
+-#define DB1550_BOOT_ONLY
+-#elif !defined(CONFIG_MTD_DB1550_BOOT) && defined(CONFIG_MTD_DB1550_USER)
+-#define DB1550_USER_ONLY
+-#endif
+-
+-#ifdef DB1550_BOTH_BANKS
+-/* both banks will be used. Combine the first bank and the first
+- * part of the second bank together into a single jffs/jffs2
+- * partition.
+- */
+-static struct mtd_partition db1550_partitions[] = {
+- /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
+- * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
+- * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
+- */
+- {
+- .name = "User FS",
+- .size = (0x1FC00000 - 0x18000000),
+- .offset = 0x0000000
+- },{
+- .name = "yamon",
+- .size = 0x0100000,
+- .offset = MTDPART_OFS_APPEND,
+- .mask_flags = MTD_WRITEABLE
+- },{
+- .name = "raw kernel",
+- .size = (0x300000 - 0x40000), /* last 256KB is yamon env */
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#elif defined(DB1550_BOOT_ONLY)
+-static struct mtd_partition db1550_partitions[] = {
+- /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
+- * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
+- */
+- {
+- .name = "User FS",
+- .size = 0x03c00000,
+- .offset = 0x0000000
+- },{
+- .name = "yamon",
+- .size = 0x0100000,
+- .offset = MTDPART_OFS_APPEND,
+- .mask_flags = MTD_WRITEABLE
+- },{
+- .name = "raw kernel",
+- .size = (0x300000-0x40000), /* last 256KB is yamon env */
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#elif defined(DB1550_USER_ONLY)
+-static struct mtd_partition db1550_partitions[] = {
+- /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
+- * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
+- */
+- {
+- .name = "User FS",
+- .size = (0x4000000 - 0x200000), /* reserve 2MB for raw kernel */
+- .offset = 0x0000000
+- },{
+- .name = "raw kernel",
+- .size = MTDPART_SIZ_FULL,
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#else
+-#error MTD_DB1550 define combo error /* should never happen */
+-#endif
+-
+-#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
+-
+-static struct mtd_info *mymtd;
+-
+-/*
+- * Probe the flash density and setup window address and size
+- * based on user CONFIG options. There are times when we don't
+- * want the MTD driver to be probing the boot or user flash,
+- * so having the option to enable only one bank is important.
+- */
+-int setup_flash_params(void)
+-{
+-#if defined(DB1550_BOTH_BANKS)
+- window_addr = 0x18000000;
+- window_size = 0x8000000;
+-#elif defined(DB1550_BOOT_ONLY)
+- window_addr = 0x1C000000;
+- window_size = 0x4000000;
+-#else /* USER ONLY */
+- window_addr = 0x18000000;
+- window_size = 0x4000000;
+-#endif
+- return 0;
+-}
+-
+-int __init db1550_mtd_init(void)
+-{
+- struct mtd_partition *parts;
+- int nb_parts = 0;
+-
+- /* Default flash bankwidth */
+- db1550_map.bankwidth = flash_bankwidth;
+-
+- if (setup_flash_params())
+- return -ENXIO;
+-
+- /*
+- * Static partition definition selection
+- */
+- parts = db1550_partitions;
+- nb_parts = NB_OF(db1550_partitions);
+- db1550_map.size = window_size;
+-
+- /*
+- * Now let's probe for the actual flash. Do it here since
+- * specific machine settings might have been set above.
+- */
+- printk(KERN_NOTICE "Db1550 flash: probing %d-bit flash bus\n",
+- db1550_map.bankwidth*8);
+- db1550_map.virt = ioremap(window_addr, window_size);
+- mymtd = do_map_probe("cfi_probe", &db1550_map);
+- if (!mymtd) return -ENXIO;
+- mymtd->owner = THIS_MODULE;
+-
+- add_mtd_partitions(mymtd, parts, nb_parts);
+- return 0;
+-}
+-
+-static void __exit db1550_mtd_cleanup(void)
+-{
+- if (mymtd) {
+- del_mtd_partitions(mymtd);
+- map_destroy(mymtd);
+- iounmap((void *) db1550_map.virt);
+- }
+-}
+-
+-module_init(db1550_mtd_init);
+-module_exit(db1550_mtd_cleanup);
+-
+-MODULE_AUTHOR("Embedded Edge, LLC");
+-MODULE_DESCRIPTION("Db1550 mtd map driver");
+-MODULE_LICENSE("GPL");
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/maps/db1x00-flash.c linux_HEAD/drivers/mtd/maps/db1x00-flash.c
+--- linux-2.6.12/drivers/mtd/maps/db1x00-flash.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/mtd/maps/db1x00-flash.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,226 +0,0 @@
+-/*
+- * Flash memory access on Alchemy Db1xxx boards
+- *
+- * $Id: db1x00-flash.c,v 1.6 2004/11/04 13:24:14 gleixner Exp $
+- *
+- * (C) 2003 Pete Popov <ppopov at embeddedalley.com>
+- *
+- */
+-
+-#include <linux/config.h>
+-#include <linux/module.h>
+-#include <linux/types.h>
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-
+-#include <linux/mtd/mtd.h>
+-#include <linux/mtd/map.h>
+-#include <linux/mtd/partitions.h>
+-
+-#include <asm/io.h>
+-
+-#ifdef DEBUG_RW
+-#define DBG(x...) printk(x)
+-#else
+-#define DBG(x...)
+-#endif
+-
+-/* MTD CONFIG OPTIONS */
+-#if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
+-#define DB1X00_BOTH_BANKS
+-#elif defined(CONFIG_MTD_DB1X00_BOOT) && !defined(CONFIG_MTD_DB1X00_USER)
+-#define DB1X00_BOOT_ONLY
+-#elif !defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
+-#define DB1X00_USER_ONLY
+-#endif
+-
+-static unsigned long window_addr;
+-static unsigned long window_size;
+-static unsigned long flash_size;
+-
+-static unsigned short *bcsr = (unsigned short *)0xAE000000;
+-static unsigned char flash_bankwidth = 4;
+-
+-/*
+- * The Db1x boards support different flash densities. We setup
+- * the mtd_partition structures below for default of 64Mbit
+- * flash densities, and override the partitions sizes, if
+- * necessary, after we check the board status register.
+- */
+-
+-#ifdef DB1X00_BOTH_BANKS
+-/* both banks will be used. Combine the first bank and the first
+- * part of the second bank together into a single jffs/jffs2
+- * partition.
+- */
+-static struct mtd_partition db1x00_partitions[] = {
+- {
+- .name = "User FS",
+- .size = 0x1c00000,
+- .offset = 0x0000000
+- },{
+- .name = "yamon",
+- .size = 0x0100000,
+- .offset = MTDPART_OFS_APPEND,
+- .mask_flags = MTD_WRITEABLE
+- },{
+- .name = "raw kernel",
+- .size = (0x300000-0x40000), /* last 256KB is env */
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#elif defined(DB1X00_BOOT_ONLY)
+-static struct mtd_partition db1x00_partitions[] = {
+- {
+- .name = "User FS",
+- .size = 0x00c00000,
+- .offset = 0x0000000
+- },{
+- .name = "yamon",
+- .size = 0x0100000,
+- .offset = MTDPART_OFS_APPEND,
+- .mask_flags = MTD_WRITEABLE
+- },{
+- .name = "raw kernel",
+- .size = (0x300000-0x40000), /* last 256KB is env */
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#elif defined(DB1X00_USER_ONLY)
+-static struct mtd_partition db1x00_partitions[] = {
+- {
+- .name = "User FS",
+- .size = 0x0e00000,
+- .offset = 0x0000000
+- },{
+- .name = "raw kernel",
+- .size = MTDPART_SIZ_FULL,
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#else
+-#error MTD_DB1X00 define combo error /* should never happen */
+-#endif
+-#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
+-
+-#define NAME "Db1x00 Linux Flash"
+-
+-static struct map_info db1xxx_mtd_map = {
+- .name = NAME,
+-};
+-
+-static struct mtd_partition *parsed_parts;
+-static struct mtd_info *db1xxx_mtd;
+-
+-/*
+- * Probe the flash density and setup window address and size
+- * based on user CONFIG options. There are times when we don't
+- * want the MTD driver to be probing the boot or user flash,
+- * so having the option to enable only one bank is important.
+- */
+-int setup_flash_params(void)
+-{
+- switch ((bcsr[2] >> 14) & 0x3) {
+- case 0: /* 64Mbit devices */
+- flash_size = 0x800000; /* 8MB per part */
+-#if defined(DB1X00_BOTH_BANKS)
+- window_addr = 0x1E000000;
+- window_size = 0x2000000;
+-#elif defined(DB1X00_BOOT_ONLY)
+- window_addr = 0x1F000000;
+- window_size = 0x1000000;
+-#else /* USER ONLY */
+- window_addr = 0x1E000000;
+- window_size = 0x1000000;
+-#endif
+- break;
+- case 1:
+- /* 128 Mbit devices */
+- flash_size = 0x1000000; /* 16MB per part */
+-#if defined(DB1X00_BOTH_BANKS)
+- window_addr = 0x1C000000;
+- window_size = 0x4000000;
+- /* USERFS from 0x1C00 0000 to 0x1FC0 0000 */
+- db1x00_partitions[0].size = 0x3C00000;
+-#elif defined(DB1X00_BOOT_ONLY)
+- window_addr = 0x1E000000;
+- window_size = 0x2000000;
+- /* USERFS from 0x1E00 0000 to 0x1FC0 0000 */
+- db1x00_partitions[0].size = 0x1C00000;
+-#else /* USER ONLY */
+- window_addr = 0x1C000000;
+- window_size = 0x2000000;
+- /* USERFS from 0x1C00 0000 to 0x1DE00000 */
+- db1x00_partitions[0].size = 0x1DE0000;
+-#endif
+- break;
+- case 2:
+- /* 256 Mbit devices */
+- flash_size = 0x4000000; /* 64MB per part */
+-#if defined(DB1X00_BOTH_BANKS)
+- return 1;
+-#elif defined(DB1X00_BOOT_ONLY)
+- /* Boot ROM flash bank only; no user bank */
+- window_addr = 0x1C000000;
+- window_size = 0x4000000;
+- /* USERFS from 0x1C00 0000 to 0x1FC00000 */
+- db1x00_partitions[0].size = 0x3C00000;
+-#else /* USER ONLY */
+- return 1;
+-#endif
+- break;
+- default:
+- return 1;
+- }
+- db1xxx_mtd_map.size = window_size;
+- db1xxx_mtd_map.bankwidth = flash_bankwidth;
+- db1xxx_mtd_map.phys = window_addr;
+- db1xxx_mtd_map.bankwidth = flash_bankwidth;
+- return 0;
+-}
+-
+-int __init db1x00_mtd_init(void)
+-{
+- struct mtd_partition *parts;
+- int nb_parts = 0;
+-
+- if (setup_flash_params())
+- return -ENXIO;
+-
+- /*
+- * Static partition definition selection
+- */
+- parts = db1x00_partitions;
+- nb_parts = NB_OF(db1x00_partitions);
+-
+- /*
+- * Now let's probe for the actual flash. Do it here since
+- * specific machine settings might have been set above.
+- */
+- printk(KERN_NOTICE "Db1xxx flash: probing %d-bit flash bus\n",
+- db1xxx_mtd_map.bankwidth*8);
+- db1xxx_mtd_map.virt = ioremap(window_addr, window_size);
+- db1xxx_mtd = do_map_probe("cfi_probe", &db1xxx_mtd_map);
+- if (!db1xxx_mtd) return -ENXIO;
+- db1xxx_mtd->owner = THIS_MODULE;
+-
+- add_mtd_partitions(db1xxx_mtd, parts, nb_parts);
+- return 0;
+-}
+-
+-static void __exit db1x00_mtd_cleanup(void)
+-{
+- if (db1xxx_mtd) {
+- del_mtd_partitions(db1xxx_mtd);
+- map_destroy(db1xxx_mtd);
+- if (parsed_parts)
+- kfree(parsed_parts);
+- }
+-}
+-
+-module_init(db1x00_mtd_init);
+-module_exit(db1x00_mtd_cleanup);
+-
+-MODULE_AUTHOR("Pete Popov");
+-MODULE_DESCRIPTION("Db1x00 mtd map driver");
+-MODULE_LICENSE("GPL");
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/maps/lasat.c linux_HEAD/drivers/mtd/maps/lasat.c
+--- linux-2.6.12/drivers/mtd/maps/lasat.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/mtd/maps/lasat.c 2004-12-04 20:57:27.000000000 +0100
@@ -7,7 +7,7 @@
* modify it under the terms of the GNU General Public License version
@@ -29776,10 +49721,410 @@
lasat_map.phys, lasat_board_info.li_flash_size);
lasat_map.size = lasat_board_info.li_flash_size;
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/Kconfig linux_HEAD/drivers/net/Kconfig
---- linux-2.6.11.6/drivers/net/Kconfig 2005-04-03 00:12:09.000000000 +0200
-+++ linux_HEAD/drivers/net/Kconfig 2005-03-21 20:04:23.000000000 +0100
-@@ -447,6 +447,14 @@ config MIPS_JAZZ_SONIC
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/maps/pb1550-flash.c linux_HEAD/drivers/mtd/maps/pb1550-flash.c
+--- linux-2.6.12/drivers/mtd/maps/pb1550-flash.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/mtd/maps/pb1550-flash.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,203 +0,0 @@
+-/*
+- * Flash memory access on Alchemy Pb1550 board
+- *
+- * $Id: pb1550-flash.c,v 1.6 2004/11/04 13:24:15 gleixner Exp $
+- *
+- * (C) 2004 Embedded Edge, LLC, based on pb1550-flash.c:
+- * (C) 2003 Pete Popov <ppopov at pacbell.net>
+- *
+- */
+-
+-#include <linux/config.h>
+-#include <linux/init.h>
+-#include <linux/module.h>
+-#include <linux/types.h>
+-#include <linux/kernel.h>
+-
+-#include <linux/mtd/mtd.h>
+-#include <linux/mtd/map.h>
+-#include <linux/mtd/partitions.h>
+-
+-#include <asm/io.h>
+-#include <asm/au1000.h>
+-#include <asm/pb1550.h>
+-
+-#ifdef DEBUG_RW
+-#define DBG(x...) printk(x)
+-#else
+-#define DBG(x...)
+-#endif
+-
+-static unsigned long window_addr;
+-static unsigned long window_size;
+-
+-
+-static struct map_info pb1550_map = {
+- .name = "Pb1550 flash",
+-};
+-
+-static unsigned char flash_bankwidth = 4;
+-
+-/*
+- * Support only 64MB NOR Flash parts
+- */
+-
+-#ifdef PB1550_BOTH_BANKS
+-/* both banks will be used. Combine the first bank and the first
+- * part of the second bank together into a single jffs/jffs2
+- * partition.
+- */
+-static struct mtd_partition pb1550_partitions[] = {
+- /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
+- * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
+- * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
+- */
+- {
+- .name = "User FS",
+- .size = (0x1FC00000 - 0x18000000),
+- .offset = 0x0000000
+- },{
+- .name = "yamon",
+- .size = 0x0100000,
+- .offset = MTDPART_OFS_APPEND,
+- .mask_flags = MTD_WRITEABLE
+- },{
+- .name = "raw kernel",
+- .size = (0x300000 - 0x40000), /* last 256KB is yamon env */
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#elif defined(PB1550_BOOT_ONLY)
+-static struct mtd_partition pb1550_partitions[] = {
+- /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
+- * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
+- */
+- {
+- .name = "User FS",
+- .size = 0x03c00000,
+- .offset = 0x0000000
+- },{
+- .name = "yamon",
+- .size = 0x0100000,
+- .offset = MTDPART_OFS_APPEND,
+- .mask_flags = MTD_WRITEABLE
+- },{
+- .name = "raw kernel",
+- .size = (0x300000-0x40000), /* last 256KB is yamon env */
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#elif defined(PB1550_USER_ONLY)
+-static struct mtd_partition pb1550_partitions[] = {
+- /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
+- * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
+- */
+- {
+- .name = "User FS",
+- .size = (0x4000000 - 0x200000), /* reserve 2MB for raw kernel */
+- .offset = 0x0000000
+- },{
+- .name = "raw kernel",
+- .size = MTDPART_SIZ_FULL,
+- .offset = MTDPART_OFS_APPEND,
+- }
+-};
+-#else
+-#error MTD_PB1550 define combo error /* should never happen */
+-#endif
+-
+-#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
+-
+-static struct mtd_info *mymtd;
+-
+-/*
+- * Probe the flash density and setup window address and size
+- * based on user CONFIG options. There are times when we don't
+- * want the MTD driver to be probing the boot or user flash,
+- * so having the option to enable only one bank is important.
+- */
+-int setup_flash_params(void)
+-{
+- u16 boot_swapboot;
+- boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
+- ((bcsr->status >> 6) & 0x1);
+- printk("Pb1550 MTD: boot:swap %d\n", boot_swapboot);
+-
+- switch (boot_swapboot) {
+- case 0: /* 512Mbit devices, both enabled */
+- case 1:
+- case 8:
+- case 9:
+-#if defined(PB1550_BOTH_BANKS)
+- window_addr = 0x18000000;
+- window_size = 0x8000000;
+-#elif defined(PB1550_BOOT_ONLY)
+- window_addr = 0x1C000000;
+- window_size = 0x4000000;
+-#else /* USER ONLY */
+- window_addr = 0x1E000000;
+- window_size = 0x4000000;
+-#endif
+- break;
+- case 0xC:
+- case 0xD:
+- case 0xE:
+- case 0xF:
+- /* 64 MB Boot NOR Flash is disabled */
+- /* and the start address is moved to 0x0C00000 */
+- window_addr = 0x0C000000;
+- window_size = 0x4000000;
+- default:
+- printk("Pb1550 MTD: unsupported boot:swap setting\n");
+- return 1;
+- }
+- return 0;
+-}
+-
+-int __init pb1550_mtd_init(void)
+-{
+- struct mtd_partition *parts;
+- int nb_parts = 0;
+-
+- /* Default flash bankwidth */
+- pb1550_map.bankwidth = flash_bankwidth;
+-
+- if (setup_flash_params())
+- return -ENXIO;
+-
+- /*
+- * Static partition definition selection
+- */
+- parts = pb1550_partitions;
+- nb_parts = NB_OF(pb1550_partitions);
+- pb1550_map.size = window_size;
+-
+- /*
+- * Now let's probe for the actual flash. Do it here since
+- * specific machine settings might have been set above.
+- */
+- printk(KERN_NOTICE "Pb1550 flash: probing %d-bit flash bus\n",
+- pb1550_map.bankwidth*8);
+- pb1550_map.virt = ioremap(window_addr, window_size);
+- mymtd = do_map_probe("cfi_probe", &pb1550_map);
+- if (!mymtd) return -ENXIO;
+- mymtd->owner = THIS_MODULE;
+-
+- add_mtd_partitions(mymtd, parts, nb_parts);
+- return 0;
+-}
+-
+-static void __exit pb1550_mtd_cleanup(void)
+-{
+- if (mymtd) {
+- del_mtd_partitions(mymtd);
+- map_destroy(mymtd);
+- }
+-}
+-
+-module_init(pb1550_mtd_init);
+-module_exit(pb1550_mtd_cleanup);
+-
+-MODULE_AUTHOR("Embedded Edge, LLC");
+-MODULE_DESCRIPTION("Pb1550 mtd map driver");
+-MODULE_LICENSE("GPL");
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/maps/pb1xxx-flash.c linux_HEAD/drivers/mtd/maps/pb1xxx-flash.c
+--- linux-2.6.12/drivers/mtd/maps/pb1xxx-flash.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/mtd/maps/pb1xxx-flash.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,178 +0,0 @@
+-/*
+- * Flash memory access on Alchemy Pb1xxx boards
+- *
+- * (C) 2001 Pete Popov <ppopov at mvista.com>
+- *
+- * $Id: pb1xxx-flash.c,v 1.14 2004/11/04 13:24:15 gleixner Exp $
+- */
+-
+-#include <linux/config.h>
+-#include <linux/module.h>
+-#include <linux/types.h>
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-
+-#include <linux/mtd/mtd.h>
+-#include <linux/mtd/map.h>
+-#include <linux/mtd/partitions.h>
+-
+-#include <asm/io.h>
+-
+-#ifdef DEBUG_RW
+-#define DBG(x...) printk(x)
+-#else
+-#define DBG(x...)
+-#endif
+-
+-#ifdef CONFIG_MIPS_PB1000
+-
+-#define WINDOW_ADDR 0x1F800000
+-#define WINDOW_SIZE 0x800000
+-
+-static struct mtd_partition pb1xxx_partitions[] = {
+- {
+- .name = "yamon env",
+- .size = 0x00020000,
+- .offset = 0,
+- .mask_flags = MTD_WRITEABLE},
+- {
+- .name = "User FS",
+- .size = 0x003e0000,
+- .offset = 0x20000,},
+- {
+- .name = "boot code",
+- .size = 0x100000,
+- .offset = 0x400000,
+- .mask_flags = MTD_WRITEABLE},
+- {
+- .name = "raw/kernel",
+- .size = 0x300000,
+- .offset = 0x500000}
+-};
+-
+-#elif defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100)
+-
+-#if defined(CONFIG_MTD_PB1500_BOOT) && defined(CONFIG_MTD_PB1500_USER)
+-/* both 32MB banks will be used. Combine the first 32MB bank and the
+- * first 28MB of the second bank together into a single jffs/jffs2
+- * partition.
+- */
+-#define WINDOW_ADDR 0x1C000000
+-#define WINDOW_SIZE 0x4000000
+-static struct mtd_partition pb1xxx_partitions[] = {
+- {
+- .name = "User FS",
+- .size = 0x3c00000,
+- .offset = 0x0000000
+- },{
+- .name = "yamon",
+- .size = 0x0100000,
+- .offset = 0x3c00000,
+- .mask_flags = MTD_WRITEABLE
+- },{
+- .name = "raw kernel",
+- .size = 0x02c0000,
+- .offset = 0x3d00000
+- }
+-};
+-#elif defined(CONFIG_MTD_PB1500_BOOT) && !defined(CONFIG_MTD_PB1500_USER)
+-#define WINDOW_ADDR 0x1E000000
+-#define WINDOW_SIZE 0x2000000
+-static struct mtd_partition pb1xxx_partitions[] = {
+- {
+- .name = "User FS",
+- .size = 0x1c00000,
+- .offset = 0x0000000
+- },{
+- .name = "yamon",
+- .size = 0x0100000,
+- .offset = 0x1c00000,
+- .mask_flags = MTD_WRITEABLE
+- },{
+- .name = "raw kernel",
+- .size = 0x02c0000,
+- .offset = 0x1d00000
+- }
+-};
+-#elif !defined(CONFIG_MTD_PB1500_BOOT) && defined(CONFIG_MTD_PB1500_USER)
+-#define WINDOW_ADDR 0x1C000000
+-#define WINDOW_SIZE 0x2000000
+-static struct mtd_partition pb1xxx_partitions[] = {
+- {
+- .name = "User FS",
+- .size = 0x1e00000,
+- .offset = 0x0000000
+- },{
+- .name = "raw kernel",
+- .size = 0x0200000,
+- .offset = 0x1e00000,
+- }
+-};
+-#else
+-#error MTD_PB1500 define combo error /* should never happen */
+-#endif
+-#else
+-#error Unsupported board
+-#endif
+-
+-#define NAME "Pb1x00 Linux Flash"
+-#define PADDR WINDOW_ADDR
+-#define BUSWIDTH 4
+-#define SIZE WINDOW_SIZE
+-#define PARTITIONS 4
+-
+-static struct map_info pb1xxx_mtd_map = {
+- .name = NAME,
+- .size = SIZE,
+- .bankwidth = BUSWIDTH,
+- .phys = PADDR,
+-};
+-
+-static struct mtd_info *pb1xxx_mtd;
+-
+-int __init pb1xxx_mtd_init(void)
+-{
+- struct mtd_partition *parts;
+- int nb_parts = 0;
+- char *part_type;
+-
+- /*
+- * Static partition definition selection
+- */
+- part_type = "static";
+- parts = pb1xxx_partitions;
+- nb_parts = ARRAY_SIZE(pb1xxx_partitions);
+-
+- /*
+- * Now let's probe for the actual flash. Do it here since
+- * specific machine settings might have been set above.
+- */
+- printk(KERN_NOTICE "Pb1xxx flash: probing %d-bit flash bus\n",
+- BUSWIDTH*8);
+- pb1xxx_mtd_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE);
+-
+- simple_map_init(&pb1xxx_mtd_map);
+-
+- pb1xxx_mtd = do_map_probe("cfi_probe", &pb1xxx_mtd_map);
+- if (!pb1xxx_mtd) return -ENXIO;
+- pb1xxx_mtd->owner = THIS_MODULE;
+-
+- add_mtd_partitions(pb1xxx_mtd, parts, nb_parts);
+- return 0;
+-}
+-
+-static void __exit pb1xxx_mtd_cleanup(void)
+-{
+- if (pb1xxx_mtd) {
+- del_mtd_partitions(pb1xxx_mtd);
+- map_destroy(pb1xxx_mtd);
+- iounmap((void *) pb1xxx_mtd_map.virt);
+- }
+-}
+-
+-module_init(pb1xxx_mtd_init);
+-module_exit(pb1xxx_mtd_cleanup);
+-
+-MODULE_AUTHOR("Pete Popov");
+-MODULE_DESCRIPTION("Pb1xxx CFI map driver");
+-MODULE_LICENSE("GPL");
+diff -urpNX dontdiff linux-2.6.12/drivers/mtd/nand/au1550nd.c linux_HEAD/drivers/mtd/nand/au1550nd.c
+--- linux-2.6.12/drivers/mtd/nand/au1550nd.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/mtd/nand/au1550nd.c 2005-04-14 16:40:15.000000000 +0200
+@@ -11,6 +11,7 @@
+ *
+ */
+
++#include <linux/config.h>
+ #include <linux/slab.h>
+ #include <linux/init.h>
+ #include <linux/module.h>
+diff -urpNX dontdiff linux-2.6.12/drivers/net/Kconfig linux_HEAD/drivers/net/Kconfig
+--- linux-2.6.12/drivers/net/Kconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/Kconfig 2005-07-10 12:16:38.000000000 +0200
+@@ -425,6 +425,14 @@ config MIPS_JAZZ_SONIC
This is the driver for the onboard card of MIPS Magnum 4000,
Acer PICA, Olivetti M700-10 and a few other identical OEM systems.
@@ -29794,7 +50139,7 @@
config MIPS_GT96100ETH
bool "MIPS GT96100 Ethernet support"
depends on NET_ETHERNET && MIPS_GT96100
-@@ -461,10 +469,6 @@ config MIPS_AU1X00_ENET
+@@ -439,10 +447,6 @@ config MIPS_AU1X00_ENET
If you have an Alchemy Semi AU1X00 based system
say Y. Otherwise, say N.
@@ -29805,7 +50150,7 @@
config SGI_IOC3_ETH
bool "SGI IOC3 Ethernet"
depends on NET_ETHERNET && PCI && SGI_IP27
-@@ -1944,6 +1948,10 @@ config R8169_NAPI
+@@ -1923,6 +1927,10 @@ config R8169_NAPI
If in doubt, say N.
@@ -29816,8 +50161,8 @@
config R8169_VLAN
bool "VLAN support"
depends on R8169 && VLAN_8021Q
-@@ -2069,8 +2077,8 @@ config MV643XX_ETH
- depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX || MV64360 || MOMENCO_OCELOT_3
+@@ -2057,8 +2065,8 @@ config MV643XX_ETH
+ depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX || MV64360 || MOMENCO_OCELOT_3 || PPC_MULTIPLATFORM
help
This driver supports the gigabit Ethernet on the Marvell MV643XX
- chipset which is used in the Momenco Ocelot C and Jaguar ATX and
@@ -29827,7 +50172,7 @@
config MV643XX_ETH_0
bool "MV-643XX Port 0"
-@@ -2093,6 +2101,20 @@ config MV643XX_ETH_2
+@@ -2081,6 +2089,20 @@ config MV643XX_ETH_2
This enables support for Port 2 of the Marvell MV643XX Gigabit
Ethernet.
@@ -29848,9 +50193,9 @@
endmenu
#
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/Makefile linux_HEAD/drivers/net/Makefile
---- linux-2.6.11.6/drivers/net/Makefile 2005-04-03 00:12:09.000000000 +0200
-+++ linux_HEAD/drivers/net/Makefile 2005-03-21 20:04:23.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/Makefile linux_HEAD/drivers/net/Makefile
+--- linux-2.6.12/drivers/net/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/Makefile 2005-07-01 12:09:45.000000000 +0200
@@ -100,6 +100,11 @@ obj-$(CONFIG_NE_H8300) += ne-h8300.o 839
obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
@@ -29863,8 +50208,60 @@
obj-$(CONFIG_PPP) += ppp_generic.o slhc.o
obj-$(CONFIG_PPP_ASYNC) += ppp_async.o
obj-$(CONFIG_PPP_SYNC_TTY) += ppp_synctty.o
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/big_sur_ge.c linux_HEAD/drivers/net/big_sur_ge.c
---- linux-2.6.11.6/drivers/net/big_sur_ge.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/au1000_eth.c linux_HEAD/drivers/net/au1000_eth.c
+--- linux-2.6.12/drivers/net/au1000_eth.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/au1000_eth.c 2005-04-14 16:40:17.000000000 +0200
+@@ -32,6 +32,7 @@
+ *
+ */
+
++#include <linux/config.h>
+ #include <linux/module.h>
+ #include <linux/kernel.h>
+ #include <linux/sched.h>
+@@ -151,13 +152,6 @@ struct au1000_private *au_macs[NUM_ETH_I
+ SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \
+ SUPPORTED_Autoneg
+
+-static char *phy_link[] =
+-{ "unknown",
+- "10Base2", "10BaseT",
+- "AUI",
+- "100BaseT", "100BaseTX", "100BaseFX"
+-};
+-
+ int bcm_5201_init(struct net_device *dev, int phy_addr)
+ {
+ s16 data;
+@@ -785,6 +779,7 @@ static struct mii_chip_info {
+ {"Broadcom BCM5201 10/100 BaseT PHY",0x0040,0x6212, &bcm_5201_ops,0},
+ {"Broadcom BCM5221 10/100 BaseT PHY",0x0040,0x61e4, &bcm_5201_ops,0},
+ {"Broadcom BCM5222 10/100 BaseT PHY",0x0040,0x6322, &bcm_5201_ops,1},
++ {"NS DP83847 PHY", 0x2000, 0x5c30, &bcm_5201_ops ,0},
+ {"AMD 79C901 HomePNA PHY",0x0000,0x35c8, &am79c901_ops,0},
+ {"AMD 79C874 10/100 BaseT PHY",0x0022,0x561b, &am79c874_ops,0},
+ {"LSI 80227 10/100 BaseT PHY",0x0016,0xf840, &lsi_80227_ops,0},
+@@ -1045,7 +1040,7 @@ found:
+ #endif
+
+ if (aup->mii->chip_info == NULL) {
+- printk(KERN_ERR "%s: Au1x No MII transceivers found!\n",
++ printk(KERN_ERR "%s: Au1x No known MII transceivers found!\n",
+ dev->name);
+ return -1;
+ }
+@@ -1546,6 +1541,9 @@ au1000_probe(u32 ioaddr, int irq, int po
+ printk(KERN_ERR "%s: out of memory\n", dev->name);
+ goto err_out;
+ }
++ aup->mii->next = NULL;
++ aup->mii->chip_info = NULL;
++ aup->mii->status = 0;
+ aup->mii->mii_control_reg = 0;
+ aup->mii->mii_data_reg = 0;
+
+diff -urpNX dontdiff linux-2.6.12/drivers/net/big_sur_ge.c linux_HEAD/drivers/net/big_sur_ge.c
+--- linux-2.6.12/drivers/net/big_sur_ge.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/net/big_sur_ge.c 2005-02-17 21:49:47.000000000 +0100
@@ -0,0 +1,2005 @@
+/*
@@ -31872,10 +52269,10 @@
+MODULE_AUTHOR("Manish Lachwani <lachwani at pmc-sierra.com>");
+MODULE_DESCRIPTION("PMC-Sierra Big Sur Ethernet MAC Driver");
+MODULE_LICENSE("GPL");
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/big_sur_ge.h linux_HEAD/drivers/net/big_sur_ge.h
---- linux-2.6.11.6/drivers/net/big_sur_ge.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/drivers/net/big_sur_ge.h 2005-02-17 21:49:47.000000000 +0100
-@@ -0,0 +1,714 @@
+diff -urpNX dontdiff linux-2.6.12/drivers/net/big_sur_ge.h linux_HEAD/drivers/net/big_sur_ge.h
+--- linux-2.6.12/drivers/net/big_sur_ge.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/drivers/net/big_sur_ge.h 2005-04-14 16:40:17.000000000 +0200
+@@ -0,0 +1,713 @@
+/*
+ * drivers/net/big_sur_ge.h - Driver for PMC-Sierra Big Sur
+ * ethernet ports
@@ -31906,7 +52303,6 @@
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
-+#include <linux/config.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+
@@ -32590,11 +52986,68 @@
+ BIG_SUR_GEIXR_SG_END_MASK)
+
+#endif
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/declance.c linux_HEAD/drivers/net/declance.c
---- linux-2.6.11.6/drivers/net/declance.c 2005-03-26 04:28:44.000000000 +0100
-+++ linux_HEAD/drivers/net/declance.c 2004-10-27 02:14:31.000000000 +0200
-@@ -705,8 +705,8 @@ static void lance_dma_merr_int(const int
+diff -urpNX dontdiff linux-2.6.12/drivers/net/declance.c linux_HEAD/drivers/net/declance.c
+--- linux-2.6.12/drivers/net/declance.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/declance.c 2005-07-03 16:44:31.000000000 +0200
+@@ -5,7 +5,7 @@
+ *
+ * adopted from sunlance.c by Richard van den Berg
+ *
+- * Copyright (C) 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
+ *
+ * additional sources:
+ * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
+@@ -57,13 +57,15 @@
+ #include <linux/string.h>
+
+ #include <asm/addrspace.h>
++#include <asm/system.h>
++
+ #include <asm/dec/interrupts.h>
+ #include <asm/dec/ioasic.h>
+ #include <asm/dec/ioasic_addrs.h>
+ #include <asm/dec/kn01.h>
+ #include <asm/dec/machtype.h>
++#include <asm/dec/system.h>
+ #include <asm/dec/tc.h>
+-#include <asm/system.h>
+
+ static char version[] __devinitdata =
+ "declance.c: v0.009 by Linux MIPS DECstation task force\n";
+@@ -79,10 +81,6 @@ MODULE_LICENSE("GPL");
+ #define PMAD_LANCE 2
+ #define PMAX_LANCE 3
+
+-#ifndef CONFIG_TC
+-unsigned long system_base;
+-unsigned long dmaptr;
+-#endif
+
+ #define LE_CSR0 0
+ #define LE_CSR1 1
+@@ -237,7 +235,7 @@ struct lance_init_block {
+ /*
+ * This works *only* for the ring descriptors
+ */
+-#define LANCE_ADDR(x) (PHYSADDR(x) >> 1)
++#define LANCE_ADDR(x) (CPHYSADDR(x) >> 1)
+
+ struct lance_private {
+ struct net_device *next;
+@@ -697,16 +695,17 @@ out:
+ spin_unlock(&lp->lock);
+ }
+
+-static void lance_dma_merr_int(const int irq, void *dev_id,
+- struct pt_regs *regs)
++static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id,
++ struct pt_regs *regs)
+ {
+ struct net_device *dev = (struct net_device *) dev_id;
+
printk("%s: DMA error\n", dev->name);
++ return IRQ_HANDLED;
}
-static irqreturn_t
@@ -32604,7 +53057,68 @@
{
struct net_device *dev = (struct net_device *) dev_id;
struct lance_private *lp = netdev_priv(dev);
-@@ -1260,7 +1260,7 @@ static int __init dec_lance_init(const i
+@@ -1026,10 +1025,6 @@ static int __init dec_lance_init(const i
+ unsigned long esar_base;
+ unsigned char *esar;
+
+-#ifndef CONFIG_TC
+- system_base = KN01_LANCE_BASE;
+-#endif
+-
+ if (dec_lance_debug && version_printed++ == 0)
+ printk(version);
+
+@@ -1062,16 +1057,16 @@ static int __init dec_lance_init(const i
+ switch (type) {
+ #ifdef CONFIG_TC
+ case ASIC_LANCE:
+- dev->base_addr = system_base + IOASIC_LANCE;
++ dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
+
+ /* buffer space for the on-board LANCE shared memory */
+ /*
+ * FIXME: ugly hack!
+ */
+- dev->mem_start = KSEG1ADDR(0x00020000);
++ dev->mem_start = CKSEG1ADDR(0x00020000);
+ dev->mem_end = dev->mem_start + 0x00020000;
+ dev->irq = dec_interrupt[DEC_IRQ_LANCE];
+- esar_base = system_base + IOASIC_ESAR;
++ esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
+
+ /* Workaround crash with booting KN04 2.1k from Disk */
+ memset((void *)dev->mem_start, 0,
+@@ -1101,14 +1096,14 @@ static int __init dec_lance_init(const i
+ /* Setup I/O ASIC LANCE DMA. */
+ lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
+ ioasic_write(IO_REG_LANCE_DMA_P,
+- PHYSADDR(dev->mem_start) << 3);
++ CPHYSADDR(dev->mem_start) << 3);
+
+ break;
+
+ case PMAD_LANCE:
+ claim_tc_card(slot);
+
+- dev->mem_start = get_tc_base_addr(slot);
++ dev->mem_start = CKSEG1ADDR(get_tc_base_addr(slot));
+ dev->base_addr = dev->mem_start + 0x100000;
+ dev->irq = get_tc_irq_nr(slot);
+ esar_base = dev->mem_start + 0x1c0002;
+@@ -1137,9 +1132,9 @@ static int __init dec_lance_init(const i
+
+ case PMAX_LANCE:
+ dev->irq = dec_interrupt[DEC_IRQ_LANCE];
+- dev->base_addr = KN01_LANCE_BASE;
+- dev->mem_start = KN01_LANCE_BASE + 0x01000000;
+- esar_base = KN01_RTC_BASE + 1;
++ dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
++ dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
++ esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
+ lp->dma_irq = -1;
+
+ /*
+@@ -1260,7 +1255,7 @@ static int __init dec_lance_init(const i
return 0;
err_out_free_dev:
@@ -32613,7 +53127,7 @@
err_out:
return ret;
-@@ -1306,6 +1306,7 @@ static void __exit dec_lance_cleanup(voi
+@@ -1306,6 +1301,7 @@ static void __exit dec_lance_cleanup(voi
while (root_lance_dev) {
struct net_device *dev = root_lance_dev;
struct lance_private *lp = netdev_priv(dev);
@@ -32621,8 +53135,8 @@
unregister_netdev(dev);
#ifdef CONFIG_TC
if (lp->slot >= 0)
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/gt64240eth.c linux_HEAD/drivers/net/gt64240eth.c
---- linux-2.6.11.6/drivers/net/gt64240eth.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/gt64240eth.c linux_HEAD/drivers/net/gt64240eth.c
+--- linux-2.6.12/drivers/net/gt64240eth.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/net/gt64240eth.c 2004-10-27 02:14:32.000000000 +0200
@@ -0,0 +1,1672 @@
+/*
@@ -34297,8 +54811,8 @@
+
+ return &gp->stats;
+}
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/gt64240eth.h linux_HEAD/drivers/net/gt64240eth.h
---- linux-2.6.11.6/drivers/net/gt64240eth.h 2005-03-26 04:28:14.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/gt64240eth.h linux_HEAD/drivers/net/gt64240eth.h
+--- linux-2.6.12/drivers/net/gt64240eth.h 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/net/gt64240eth.h 2005-02-17 21:49:49.000000000 +0100
@@ -9,6 +9,7 @@
* Copyright 2000 MontaVista Software Inc.
@@ -34340,8 +54854,36 @@
/* Bit definitions of the SMI Reg */
enum {
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/saa9730.c linux_HEAD/drivers/net/saa9730.c
---- linux-2.6.11.6/drivers/net/saa9730.c 2005-03-26 04:28:22.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/ioc3-eth.c linux_HEAD/drivers/net/ioc3-eth.c
+--- linux-2.6.12/drivers/net/ioc3-eth.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/ioc3-eth.c 2005-07-10 12:16:38.000000000 +0200
+@@ -499,7 +499,7 @@ static int ioc3_mdio_read(struct net_dev
+ ioc3_w_micr((phy << MICR_PHYADDR_SHIFT) | reg | MICR_READTRIG);
+ while (ioc3_r_micr() & MICR_BUSY);
+
+- return ioc3_r_micr() & MIDR_DATA_MASK;
++ return ioc3_r_midr_r() & MIDR_DATA_MASK;
+ }
+
+ static void ioc3_mdio_write(struct net_device *dev, int phy, int reg, int data)
+@@ -1291,7 +1291,6 @@ static int ioc3_probe(struct pci_dev *pd
+ dev->features = NETIF_F_IP_CSUM;
+ #endif
+
+- ioc3_setup_duplex(ip);
+ sw_physid1 = ioc3_mdio_read(dev, ip->mii.phy_id, MII_PHYSID1);
+ sw_physid2 = ioc3_mdio_read(dev, ip->mii.phy_id, MII_PHYSID2);
+
+@@ -1300,6 +1299,7 @@ static int ioc3_probe(struct pci_dev *pd
+ goto out_stop;
+
+ mii_check_media(&ip->mii, 1, 1);
++ ioc3_setup_duplex(ip);
+
+ vendor = (sw_physid1 << 12) | (sw_physid2 >> 4);
+ model = (sw_physid2 >> 4) & 0x3f;
+diff -urpNX dontdiff linux-2.6.12/drivers/net/saa9730.c linux_HEAD/drivers/net/saa9730.c
+--- linux-2.6.12/drivers/net/saa9730.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/net/saa9730.c 2005-02-17 21:49:50.000000000 +0100
@@ -1,8 +1,7 @@
/*
@@ -35241,8 +55783,8 @@
-
-
MODULE_LICENSE("GPL");
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/saa9730.h linux_HEAD/drivers/net/saa9730.h
---- linux-2.6.11.6/drivers/net/saa9730.h 2005-03-26 04:28:24.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/saa9730.h linux_HEAD/drivers/net/saa9730.h
+--- linux-2.6.12/drivers/net/saa9730.h 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/net/saa9730.h 2005-02-17 21:49:50.000000000 +0100
@@ -1,6 +1,7 @@
/*
@@ -35321,130 +55863,68 @@
unsigned int TxBufferFree[LAN_SAA9730_BUFFERS];
unsigned char PhysicalAddress[LAN_SAA9730_CAM_ENTRIES][6];
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/sis900.c linux_HEAD/drivers/net/sis900.c
---- linux-2.6.11.6/drivers/net/sis900.c 2005-04-03 00:12:15.000000000 +0200
-+++ linux_HEAD/drivers/net/sis900.c 2005-03-21 20:04:26.000000000 +0100
-@@ -245,7 +245,7 @@ static int __devinit sis900_get_mac_addr
- /* check to see if we have sane EEPROM */
- signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
- if (signature == 0xffff || signature == 0x0000) {
-- printk (KERN_INFO "%s: Error EERPOM read %x\n",
-+ printk (KERN_WARNING "%s: Error EERPOM read %x\n",
- pci_name(pci_dev), signature);
- return 0;
- }
-@@ -278,7 +278,8 @@ static int __devinit sis630e_get_mac_add
- if (!isa_bridge)
- isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
- if (!isa_bridge) {
-- printk("%s: Can not find ISA bridge\n", pci_name(pci_dev));
-+ printk(KERN_WARNING "%s: Can not find ISA bridge\n",
-+ pci_name(pci_dev));
- return 0;
- }
- pci_read_config_byte(isa_bridge, 0x48, ®);
-@@ -466,31 +467,47 @@ static int __devinit sis900_probe(struct
- net_dev->tx_timeout = sis900_tx_timeout;
- net_dev->watchdog_timeo = TX_TIMEOUT;
- net_dev->ethtool_ops = &sis900_ethtool_ops;
+diff -urpNX dontdiff linux-2.6.12/drivers/net/sb1250-mac.c linux_HEAD/drivers/net/sb1250-mac.c
+--- linux-2.6.12/drivers/net/sb1250-mac.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/sb1250-mac.c 2005-03-21 20:04:26.000000000 +0100
+@@ -2419,6 +2419,11 @@ static int sbmac_init(struct net_device
+ if (err)
+ goto out_uninit;
+
++ if (sc->rx_hw_checksum == ENABLE) {
++ printk(KERN_INFO "%s: enabling TCP rcv checksum\n",
++ sc->sbm_dev->name);
++ }
+
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+ net_dev->poll_controller = &sis900_poll;
-+#endif
-+
-+ if (sis900_debug > 0)
-+ sis_priv->msg_enable = sis900_debug;
-+ else
-+ sis_priv->msg_enable = SIS900_DEF_MSG;
-
- /* Get Mac address according to the chip revision */
-- pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
-+ pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
-+ if(netif_msg_probe(sis_priv))
-+ printk(KERN_DEBUG "%s: detected revision %2.2x, "
-+ "trying to get MAC address...\n",
-+ dev_name, sis_priv->chipset_rev);
-+
- ret = 0;
--
-- if (revision == SIS630E_900_REV)
-+ if (sis_priv->chipset_rev == SIS630E_900_REV)
- ret = sis630e_get_mac_addr(pci_dev, net_dev);
-- else if ((revision > 0x81) && (revision <= 0x90) )
-+ else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
- ret = sis635_get_mac_addr(pci_dev, net_dev);
-- else if (revision == SIS96x_900_REV)
-+ else if (sis_priv->chipset_rev == SIS96x_900_REV)
- ret = sis96x_get_mac_addr(pci_dev, net_dev);
- else
- ret = sis900_get_mac_addr(pci_dev, net_dev);
+ if (periph_rev >= 2) {
+ printk(KERN_INFO "%s: enabling TCP rcv checksum\n",
+ sc->sbm_dev->name);
+diff -urpNX dontdiff linux-2.6.12/drivers/net/sgiseeq.c linux_HEAD/drivers/net/sgiseeq.c
+--- linux-2.6.12/drivers/net/sgiseeq.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/sgiseeq.c 2005-04-12 16:58:59.000000000 +0200
+@@ -493,11 +493,13 @@ static int sgiseeq_close(struct net_devi
+ {
+ struct sgiseeq_private *sp = netdev_priv(dev);
+ struct sgiseeq_regs *sregs = sp->sregs;
++ unsigned int irq = dev->irq;
- if (ret == 0) {
-+ printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
- ret = -ENODEV;
- goto err_unmap_rx;
- }
-
- /* 630ET : set the mii access mode as software-mode */
-- if (revision == SIS630ET_900_REV)
-+ if (sis_priv->chipset_rev == SIS630ET_900_REV)
- outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
+ netif_stop_queue(dev);
- /* probe for mii transceiver */
- if (sis900_mii_probe(net_dev) == 0) {
-+ printk(KERN_WARNING "%s: Error probing MII device.\n",
-+ dev_name);
- ret = -ENODEV;
- goto err_unmap_rx;
- }
-@@ -506,10 +523,6 @@ static int __devinit sis900_probe(struct
- if (ret)
- goto err_unmap_rx;
+ /* Shutdown the Seeq. */
+ reset_hpc3_and_seeq(sp->hregs, sregs);
++ free_irq(irq, dev);
-- ret = register_netdev(net_dev);
-- if (ret)
-- goto err_unmap_rx;
--
- /* print some information about our NIC */
- printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
- card_name, ioaddr, net_dev->irq);
-@@ -549,7 +562,6 @@ static int __init sis900_mii_probe(struc
- u16 poll_bit = MII_STAT_LINK, status = 0;
- unsigned long timeout = jiffies + 5 * HZ;
- int phy_addr;
-- u8 revision;
+ return 0;
+ }
+@@ -734,7 +736,7 @@ static int sgiseeq_init(struct hpc3_regs
+ return 0;
- sis_priv->mii = NULL;
+ err_out_free_page:
+- free_page((unsigned long) sp);
++ free_page((unsigned long) sp->srings);
+ err_out_free_dev:
+ kfree(dev);
-@@ -598,9 +610,11 @@ static int __init sis900_mii_probe(struc
- if (mii_chip_table[i].phy_types == MIX)
- mii_phy->phy_types =
- (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
-- printk(KERN_INFO "%s: %s transceiver found at address %d.\n",
-- dev_name, mii_chip_table[i].name,
-- phy_addr);
-+ printk(KERN_INFO "%s: %s transceiver found "
-+ "at address %d.\n",
-+ dev_name,
-+ mii_chip_table[i].name,
-+ phy_addr);
- break;
- }
-
-@@ -643,8 +657,7 @@ static int __init sis900_mii_probe(struc
- }
+@@ -754,15 +756,12 @@ static void __exit sgiseeq_exit(void)
+ {
+ struct net_device *next, *dev;
+ struct sgiseeq_private *sp;
+- int irq;
+
+ for (dev = root_sgiseeq_dev; dev; dev = next) {
+ sp = (struct sgiseeq_private *) netdev_priv(dev);
+ next = sp->next_module;
+- irq = dev->irq;
+ unregister_netdev(dev);
+- free_irq(irq, dev);
+- free_page((unsigned long) sp);
++ free_page((unsigned long) sp->srings);
+ free_netdev(dev);
}
-
-- pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
-- if (revision == SIS630E_900_REV) {
-+ if (sis_priv->chipset_rev == SIS630E_900_REV) {
- /* SiS 630E has some bugs on default value of PHY registers */
- mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
- mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/titan_ge.c linux_HEAD/drivers/net/titan_ge.c
---- linux-2.6.11.6/drivers/net/titan_ge.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/drivers/net/titan_ge.c 2005-01-09 13:24:00.000000000 +0100
-@@ -0,0 +1,2067 @@
+ }
+diff -urpNX dontdiff linux-2.6.12/drivers/net/titan_ge.c linux_HEAD/drivers/net/titan_ge.c
+--- linux-2.6.12/drivers/net/titan_ge.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/drivers/net/titan_ge.c 2005-07-01 12:09:48.000000000 +0200
+@@ -0,0 +1,2071 @@
+/*
+ * drivers/net/titan_ge.c - Driver for Titan ethernet ports
+ *
@@ -37324,6 +57804,10 @@
+ return err;
+}
+
++static void __devexit titan_device_remove(struct device *device)
++{
++}
++
+/*
+ * Reset the Ethernet port
+ */
@@ -37512,15 +57996,14 @@
+
+module_init(titan_ge_init_module);
+module_exit(titan_ge_cleanup_module);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/titan_ge.h linux_HEAD/drivers/net/titan_ge.h
---- linux-2.6.11.6/drivers/net/titan_ge.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/drivers/net/titan_ge.h 2005-02-17 21:49:50.000000000 +0100
-@@ -0,0 +1,420 @@
+diff -urpNX dontdiff linux-2.6.12/drivers/net/titan_ge.h linux_HEAD/drivers/net/titan_ge.h
+--- linux-2.6.12/drivers/net/titan_ge.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/drivers/net/titan_ge.h 2005-04-14 16:40:17.000000000 +0200
+@@ -0,0 +1,419 @@
+#ifndef _TITAN_GE_H_
+#define _TITAN_GE_H_
+
+#include <linux/config.h>
-+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/config.h>
@@ -37936,8 +58419,8 @@
+
+#endif /* _TITAN_GE_H_ */
+
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/titan_mdio.c linux_HEAD/drivers/net/titan_mdio.c
---- linux-2.6.11.6/drivers/net/titan_mdio.c 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/titan_mdio.c linux_HEAD/drivers/net/titan_mdio.c
+--- linux-2.6.12/drivers/net/titan_mdio.c 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/net/titan_mdio.c 2004-10-20 17:57:59.000000000 +0200
@@ -0,0 +1,217 @@
+/*
@@ -38157,8 +58640,8 @@
+ return TITAN_GE_MDIO_GOOD;
+}
+
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/titan_mdio.h linux_HEAD/drivers/net/titan_mdio.h
---- linux-2.6.11.6/drivers/net/titan_mdio.h 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/titan_mdio.h linux_HEAD/drivers/net/titan_mdio.h
+--- linux-2.6.12/drivers/net/titan_mdio.h 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/net/titan_mdio.h 2004-10-20 17:57:59.000000000 +0200
@@ -0,0 +1,56 @@
+/*
@@ -38217,9 +58700,9 @@
+int titan_ge_mdio_write(int, int, unsigned int);
+
+#endif /* _TITAN_MDIO_H */
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/tulip/de2104x.c linux_HEAD/drivers/net/tulip/de2104x.c
---- linux-2.6.11.6/drivers/net/tulip/de2104x.c 2005-04-03 00:12:15.000000000 +0200
-+++ linux_HEAD/drivers/net/tulip/de2104x.c 2005-03-21 20:04:29.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/tulip/de2104x.c linux_HEAD/drivers/net/tulip/de2104x.c
+--- linux-2.6.12/drivers/net/tulip/de2104x.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/tulip/de2104x.c 2005-04-30 15:33:45.000000000 +0200
@@ -1787,10 +1787,15 @@ static void __init de21041_get_srom_info
/* DEC now has a specification but early board makers
just put the address in the first EEPROM locations. */
@@ -38236,8 +58719,8 @@
/* store MAC address */
for (i = 0; i < 6; i ++)
de->dev->dev_addr[i] = ee_data[i + sa_offset];
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/tulip/eeprom.c linux_HEAD/drivers/net/tulip/eeprom.c
---- linux-2.6.11.6/drivers/net/tulip/eeprom.c 2005-03-26 04:28:37.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/tulip/eeprom.c linux_HEAD/drivers/net/tulip/eeprom.c
+--- linux-2.6.12/drivers/net/tulip/eeprom.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/net/tulip/eeprom.c 2005-02-21 22:17:44.000000000 +0100
@@ -63,6 +63,22 @@ static struct eeprom_fixup eeprom_fixups
*/
@@ -38262,10 +58745,10 @@
{NULL}};
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/tulip/media.c linux_HEAD/drivers/net/tulip/media.c
---- linux-2.6.11.6/drivers/net/tulip/media.c 2005-04-03 00:12:15.000000000 +0200
-+++ linux_HEAD/drivers/net/tulip/media.c 2005-03-21 20:04:29.000000000 +0100
-@@ -399,6 +399,9 @@ void tulip_select_media(struct net_devic
+diff -urpNX dontdiff linux-2.6.12/drivers/net/tulip/media.c linux_HEAD/drivers/net/tulip/media.c
+--- linux-2.6.12/drivers/net/tulip/media.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/tulip/media.c 2005-07-01 12:09:50.000000000 +0200
+@@ -400,6 +400,9 @@ void tulip_select_media(struct net_devic
}
tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
@@ -38275,9 +58758,9 @@
return;
}
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/tulip/tulip_core.c linux_HEAD/drivers/net/tulip/tulip_core.c
---- linux-2.6.11.6/drivers/net/tulip/tulip_core.c 2005-04-03 00:12:15.000000000 +0200
-+++ linux_HEAD/drivers/net/tulip/tulip_core.c 2005-03-21 20:04:29.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/net/tulip/tulip_core.c linux_HEAD/drivers/net/tulip/tulip_core.c
+--- linux-2.6.12/drivers/net/tulip/tulip_core.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/net/tulip/tulip_core.c 2005-07-01 12:09:50.000000000 +0200
@@ -1514,8 +1514,8 @@ static int __devinit tulip_init_one (str
(PCI_SLOT(pdev->devfn) == 12))) {
/* Cobalt MAC address in first EEPROM locations. */
@@ -38289,37 +58772,30 @@
}
#endif
#ifdef CONFIG_GSC
-diff -urpNX dontdiff linux-2.6.11.6/drivers/net/tun.c linux_HEAD/drivers/net/tun.c
---- linux-2.6.11.6/drivers/net/tun.c 2005-03-26 04:28:20.000000000 +0100
-+++ linux_HEAD/drivers/net/tun.c 2005-03-21 20:04:27.000000000 +0100
-@@ -843,7 +843,7 @@ static struct ethtool_ops tun_ethtool_op
- .set_rx_csum = tun_set_rx_csum
- };
-
--int __init tun_init(void)
-+static int __init tun_init(void)
- {
- int ret = 0;
-
-@@ -856,7 +856,7 @@ int __init tun_init(void)
- return ret;
- }
-
--void tun_cleanup(void)
-+static void tun_cleanup(void)
- {
- struct tun_struct *tun, *nxt;
-
-diff -urpNX dontdiff linux-2.6.11.6/drivers/pcmcia/Kconfig linux_HEAD/drivers/pcmcia/Kconfig
---- linux-2.6.11.6/drivers/pcmcia/Kconfig 2005-04-03 00:12:23.000000000 +0200
-+++ linux_HEAD/drivers/pcmcia/Kconfig 2005-03-21 20:04:33.000000000 +0100
-@@ -201,3 +201,4 @@ config PCCARD_NONSTATIC
- endif # PCCARD
-
- endmenu
-+
-diff -urpNX dontdiff linux-2.6.11.6/drivers/pcmcia/Makefile linux_HEAD/drivers/pcmcia/Makefile
---- linux-2.6.11.6/drivers/pcmcia/Makefile 2005-03-26 04:28:25.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/pci/pci.ids linux_HEAD/drivers/pci/pci.ids
+--- linux-2.6.12/drivers/pci/pci.ids 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/pci/pci.ids 2005-07-07 11:22:54.000000000 +0200
+@@ -4500,6 +4500,8 @@
+ 13c2 1011 Technotrend-Budget / Hauppauge WinTV-NOVA-T DVB card
+ 13c2 1013 SATELCO Multimedia DVB
+ 13c2 1102 Technotrend/Hauppauge DVB card rev2.1
++ 9730 SAA9730 Integrated Multimedia and Peripheral Controller
++ 9730 0000 Integrated Multimedia and Peripheral Controller
+ 1132 Mitel Corp.
+ # This is the new official company name. See disclaimer on www.eicon.com for details!
+ 1133 Eicon Networks Corporation
+@@ -7665,7 +7667,8 @@
+ 153c ANTAL Electronic
+ 153d FILANET Corp
+ 153e TECHWELL Inc
+-153f MIPS DENMARK
++153f MIPS Technologies, Inc.
++ 0001 SOC-it 101 System Controller
+ 1540 PROVIDEO MULTIMEDIA Co Ltd
+ 1541 MACHONE Communications
+ 1542 VIVID Technology Inc
+diff -urpNX dontdiff linux-2.6.12/drivers/pcmcia/Makefile linux_HEAD/drivers/pcmcia/Makefile
+--- linux-2.6.12/drivers/pcmcia/Makefile 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/pcmcia/Makefile 2005-02-17 21:50:00.000000000 +0100
@@ -28,15 +28,21 @@ obj-$(CONFIG_HD64465_PCMCIA) += hd6446
obj-$(CONFIG_PCMCIA_SA1100) += sa11xx_core.o sa1100_cs.o
@@ -38360,360 +58836,503 @@
sa1100_cs-y += sa1100_generic.o
sa1100_cs-$(CONFIG_SA1100_ASSABET) += sa1100_assabet.o
-diff -urpNX dontdiff linux-2.6.11.6/drivers/pcmcia/au1000_db1x00.c linux_HEAD/drivers/pcmcia/au1000_db1x00.c
---- linux-2.6.11.6/drivers/pcmcia/au1000_db1x00.c 2005-03-26 04:28:50.000000000 +0100
-+++ linux_HEAD/drivers/pcmcia/au1000_db1x00.c 2004-10-27 02:14:43.000000000 +0200
-@@ -8,7 +8,7 @@
+diff -urpNX dontdiff linux-2.6.12/drivers/pcmcia/au1000_db1x00.c linux_HEAD/drivers/pcmcia/au1000_db1x00.c
+--- linux-2.6.12/drivers/pcmcia/au1000_db1x00.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/pcmcia/au1000_db1x00.c 2005-07-10 12:28:27.000000000 +0200
+@@ -30,6 +30,7 @@
*
- * Copyright 2004 Pete Popov, updated the driver to 2.6.
- * Followed the sa11xx API and largely copied many of the hardware
-- * independent functions.
-+ * independent functions.
+ */
+
++#include <linux/config.h>
+ #include <linux/module.h>
+ #include <linux/kernel.h>
+ #include <linux/errno.h>
+diff -urpNX dontdiff linux-2.6.12/drivers/pcmcia/au1000_generic.h linux_HEAD/drivers/pcmcia/au1000_generic.h
+--- linux-2.6.12/drivers/pcmcia/au1000_generic.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/pcmcia/au1000_generic.h 2005-07-10 12:28:27.000000000 +0200
+@@ -22,6 +22,8 @@
+ #define __ASM_AU1000_PCMCIA_H
+
+ /* include the world */
++#include <linux/config.h>
++
+ #include <pcmcia/version.h>
+ #include <pcmcia/cs_types.h>
+ #include <pcmcia/cs.h>
+diff -urpNX dontdiff linux-2.6.12/drivers/pcmcia/au1000_pb1x00.c linux_HEAD/drivers/pcmcia/au1000_pb1x00.c
+--- linux-2.6.12/drivers/pcmcia/au1000_pb1x00.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/pcmcia/au1000_pb1x00.c 2005-04-14 16:40:17.000000000 +0200
+@@ -21,6 +21,7 @@
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ */
++#include <linux/config.h>
+ #include <linux/module.h>
+ #include <linux/init.h>
+ #include <linux/delay.h>
+diff -urpNX dontdiff linux-2.6.12/drivers/pcmcia/au1000_xxs1500.c linux_HEAD/drivers/pcmcia/au1000_xxs1500.c
+--- linux-2.6.12/drivers/pcmcia/au1000_xxs1500.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/pcmcia/au1000_xxs1500.c 2005-07-10 12:28:27.000000000 +0200
+@@ -23,11 +23,10 @@
*
* ########################################################################
*
-@@ -27,7 +27,7 @@
- *
- * ########################################################################
- *
- *
+ *
*/
-
#include <linux/module.h>
-@@ -71,7 +71,7 @@ static void db1x00_pcmcia_shutdown(struc
- au_sync_delay(2);
- }
+ #include <linux/init.h>
+-#include <linux/config.h>
+ #include <linux/delay.h>
+ #include <linux/ioport.h>
+ #include <linux/kernel.h>
+diff -urpNX dontdiff linux-2.6.12/drivers/pcmcia/vrc4171_card.c linux_HEAD/drivers/pcmcia/vrc4171_card.c
+--- linux-2.6.12/drivers/pcmcia/vrc4171_card.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/pcmcia/vrc4171_card.c 2005-04-08 22:41:06.000000000 +0200
+@@ -1,7 +1,7 @@
+ /*
+ * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
+ *
+- * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
++ * Copyright (C) 2003 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+@@ -26,6 +26,7 @@
+ #include <linux/types.h>
--static void
-+static void
- db1x00_pcmcia_socket_state(struct au1000_pcmcia_socket *skt, struct pcmcia_state *state)
- {
- u32 inserted;
-@@ -95,8 +95,8 @@ db1x00_pcmcia_socket_state(struct au1000
- return;
- }
+ #include <asm/io.h>
++#include <asm/vr41xx/vrc4171.h>
-- if (inserted)
-- debug("db1x00 socket %d: inserted %d, vs %d pcmcia %x\n",
-+ if (inserted)
-+ debug("db1x00 socket %d: inserted %d, vs %d pcmcia %x\n",
- skt->nr, inserted, vs, bcsr->pcmcia);
+ #include <pcmcia/ss.h>
- if (inserted) {
-@@ -120,14 +120,14 @@ db1x00_pcmcia_socket_state(struct au1000
- * we should turn off power to it
- */
- if ((skt->nr == 0) && (bcsr->pcmcia & BCSR_PCMCIA_PC0RST)) {
-- bcsr->pcmcia &= ~(BCSR_PCMCIA_PC0RST |
-+ bcsr->pcmcia &= ~(BCSR_PCMCIA_PC0RST |
- BCSR_PCMCIA_PC0DRVEN |
- BCSR_PCMCIA_PC0VPP |
- BCSR_PCMCIA_PC0VCC);
- au_sync_delay(10);
- }
- else if ((skt->nr == 1) && bcsr->pcmcia & BCSR_PCMCIA_PC1RST) {
-- bcsr->pcmcia &= ~(BCSR_PCMCIA_PC1RST |
-+ bcsr->pcmcia &= ~(BCSR_PCMCIA_PC1RST |
- BCSR_PCMCIA_PC1DRVEN |
- BCSR_PCMCIA_PC1VPP |
- BCSR_PCMCIA_PC1VCC);
-@@ -137,21 +137,21 @@ db1x00_pcmcia_socket_state(struct au1000
+@@ -47,6 +48,7 @@ MODULE_LICENSE("GPL");
- state->bvd1=1;
- state->bvd2=1;
-- state->wrprot=0;
-+ state->wrprot=0;
- }
+ #define CARD_CONTROLLER_INDEX 0x03e0
+ #define CARD_CONTROLLER_DATA 0x03e1
++#define CARD_CONTROLLER_SIZE 2
+ /* Power register */
+ #define VPP_GET_VCC 0x01
+ #define POWER_ENABLE 0x10
+@@ -67,40 +69,18 @@ MODULE_LICENSE("GPL");
+ #define IRQPM_EN 0x08
+ #define CLRPMIRQ 0x10
--static int
-+static int
- db1x00_pcmcia_configure_socket(struct au1000_pcmcia_socket *skt, struct socket_state_t *state)
- {
- u16 pwr;
- int sock = skt->nr;
+-#define INTERRUPT_STATUS 0x05fa
+- #define IRQ_A 0x02
+- #define IRQ_B 0x04
+-
+-#define CONFIGURATION1 0x05fe
+- #define SLOTB_CONFIG 0xc000
+- #define SLOTB_NONE 0x0000
+- #define SLOTB_PCCARD 0x4000
+- #define SLOTB_CF 0x8000
+- #define SLOTB_FLASHROM 0xc000
+-
+-#define CARD_CONTROLLER_START CARD_CONTROLLER_INDEX
+-#define CARD_CONTROLLER_END CARD_CONTROLLER_DATA
+-
+ #define IO_MAX_MAPS 2
+ #define MEM_MAX_MAPS 5
-- debug("config_skt %d Vcc %dV Vpp %dV, reset %d\n",
-- sock, state->Vcc, state->Vpp,
-+ debug("config_skt %d Vcc %dV Vpp %dV, reset %d\n",
-+ sock, state->Vcc, state->Vpp,
- state->flags & SS_RESET);
+-typedef enum {
++enum {
+ SLOT_PROBE = 0,
+ SLOT_NOPROBE_IO,
+ SLOT_NOPROBE_MEM,
+- SLOT_NOPROBE_ALL,
+- SLOT_INITIALIZED,
+-} vrc4171_slot_t;
+-
+-typedef enum {
+- SLOTB_IS_NONE,
+- SLOTB_IS_PCCARD,
+- SLOTB_IS_CF,
+- SLOTB_IS_FLASHROM,
+-} vrc4171_slotb_t;
++ SLOT_NOPROBE_ALL
++};
- /* pcmcia reg was set to zero at init time. Be careful when
-- * initializing a socket not to wipe out the settings of the
-+ * initializing a socket not to wipe out the settings of the
- * other socket.
- */
- pwr = bcsr->pcmcia;
-@@ -176,9 +176,9 @@ db1x00_pcmcia_configure_socket(struct au
- case 33:
- default:
- pwr |= SET_VCC_VPP(0,0,sock);
-- printk("%s: bad Vcc/Vpp (%d:%d)\n",
-- __FUNCTION__,
-- state->Vcc,
-+ printk("%s: bad Vcc/Vpp (%d:%d)\n",
-+ __FUNCTION__,
-+ state->Vcc,
- state->Vpp);
- break;
- }
-@@ -197,16 +197,16 @@ db1x00_pcmcia_configure_socket(struct au
- case 50:
- default:
- pwr |= SET_VCC_VPP(0,0,sock);
-- printk("%s: bad Vcc/Vpp (%d:%d)\n",
-- __FUNCTION__,
-- state->Vcc,
-+ printk("%s: bad Vcc/Vpp (%d:%d)\n",
-+ __FUNCTION__,
-+ state->Vcc,
- state->Vpp);
- break;
- }
- break;
- default: /* what's this ? */
- pwr |= SET_VCC_VPP(0,0,sock);
-- printk(KERN_ERR "%s: bad Vcc %d\n",
-+ printk(KERN_ERR "%s: bad Vcc %d\n",
- __FUNCTION__, state->Vcc);
- break;
- }
-@@ -265,7 +265,7 @@ void db1x00_socket_suspend(struct au1000
- /* nothing to do for now */
- }
+ typedef struct vrc4171_socket {
+- vrc4171_slot_t slot;
++ int noprobe;
+ struct pcmcia_socket pcmcia_socket;
+ char name[24];
+ int csc_irq;
+@@ -108,65 +88,10 @@ typedef struct vrc4171_socket {
+ } vrc4171_socket_t;
--struct pcmcia_low_level db1x00_pcmcia_ops = {
-+struct pcmcia_low_level db1x00_pcmcia_ops = {
- .owner = THIS_MODULE,
+ static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS];
+-static vrc4171_slotb_t vrc4171_slotb = SLOTB_IS_NONE;
+-static char vrc4171_card_name[] = "NEC VRC4171 Card Controller";
++static int vrc4171_slotb = SLOTB_IS_NONE;
+ static unsigned int vrc4171_irq;
+ static uint16_t vrc4171_irq_mask = 0xdeb8;
- .hw_init = db1x00_pcmcia_hw_init,
-diff -urpNX dontdiff linux-2.6.11.6/drivers/pcmcia/au1000_generic.c linux_HEAD/drivers/pcmcia/au1000_generic.c
---- linux-2.6.11.6/drivers/pcmcia/au1000_generic.c 2005-03-26 04:28:22.000000000 +0100
-+++ linux_HEAD/drivers/pcmcia/au1000_generic.c 2005-02-17 21:50:00.000000000 +0100
-@@ -7,8 +7,8 @@
- * ppopov at embeddedalley.com or source at mvista.com
- *
- * Copyright 2004 Pete Popov, Embedded Alley Solutions, Inc.
-- * Updated the driver to 2.6. Followed the sa11xx API and largely
-- * copied many of the hardware independent functions.
-+ * Updated the driver to 2.6. Followed the sa11xx API and largely
-+ * copied many of the hardware independent functions.
- *
- * ########################################################################
- *
-@@ -78,7 +78,7 @@ static int (*au1x00_pcmcia_hw_init[])(st
- au1x_board_init,
- };
-
--static int
-+static int
- au1x00_pcmcia_skt_state(struct au1000_pcmcia_socket *skt)
+-static struct resource vrc4171_card_resource[3] = {
+- { .name = vrc4171_card_name,
+- .start = CARD_CONTROLLER_START,
+- .end = CARD_CONTROLLER_END,
+- .flags = IORESOURCE_IO, },
+- { .name = vrc4171_card_name,
+- .start = INTERRUPT_STATUS,
+- .end = INTERRUPT_STATUS,
+- .flags = IORESOURCE_IO, },
+- { .name = vrc4171_card_name,
+- .start = CONFIGURATION1,
+- .end = CONFIGURATION1,
+- .flags = IORESOURCE_IO, },
+-};
+-
+-static struct platform_device vrc4171_card_device = {
+- .name = vrc4171_card_name,
+- .id = 0,
+- .num_resources = 3,
+- .resource = vrc4171_card_resource,
+-};
+-
+-static inline uint16_t vrc4171_get_irq_status(void)
+-{
+- return inw(INTERRUPT_STATUS);
+-}
+-
+-static inline void vrc4171_set_multifunction_pin(vrc4171_slotb_t config)
+-{
+- uint16_t config1;
+-
+- config1 = inw(CONFIGURATION1);
+- config1 &= ~SLOTB_CONFIG;
+-
+- switch (config) {
+- case SLOTB_IS_NONE:
+- config1 |= SLOTB_NONE;
+- break;
+- case SLOTB_IS_PCCARD:
+- config1 |= SLOTB_PCCARD;
+- break;
+- case SLOTB_IS_CF:
+- config1 |= SLOTB_CF;
+- break;
+- case SLOTB_IS_FLASHROM:
+- config1 |= SLOTB_FLASHROM;
+- break;
+- default:
+- break;
+- }
+-
+- outw(config1, CONFIGURATION1);
+-}
+-
+ static inline uint8_t exca_read_byte(int slot, uint8_t index)
{
- struct pcmcia_state state;
-@@ -246,7 +246,7 @@ au1x00_pcmcia_get_status(struct pcmcia_s
+ if (slot == CARD_SLOTB)
+@@ -356,9 +281,9 @@ static int pccard_get_socket(struct pcmc
+ if (cscint & I365_CSC_STSCHG)
+ state->flags |= SS_STSCHG;
+ } else {
+- if (cscint & I365_CSC_BVD1)
++ if (cscint & I365_CSC_BVD1)
+ state->csc_mask |= SS_BATDEAD;
+- if (cscint & I365_CSC_BVD2)
++ if (cscint & I365_CSC_BVD2)
+ state->csc_mask |= SS_BATWARN;
+ }
+ if (cscint & I365_CSC_READY)
+@@ -495,9 +420,9 @@ static int pccard_set_mem_map(struct pcm
- /* au1x00_pcmcia_get_socket()
- * Implements the get_socket() operation for the in-kernel PCMCIA
-- * service (formerly SS_GetSocket in Card Services). Not a very
-+ * service (formerly SS_GetSocket in Card Services). Not a very
- * exciting routine.
- *
- * Returns: 0
-@@ -345,7 +345,7 @@ au1x00_pcmcia_set_mem_map(struct pcmcia_
- map->static_start = skt->phys_mem + map->card_start;
+ if (sock == NULL || sock->sock >= CARD_MAX_SLOTS ||
+ mem == NULL || mem->map >= MEM_MAX_MAPS ||
+- mem->res->start < CARD_MEM_START || mem->res->start > CARD_MEM_END ||
+- mem->res->end < CARD_MEM_START || mem->res->end > CARD_MEM_END ||
+- mem->res->start > mem->res->end ||
++ mem->sys_start < CARD_MEM_START || mem->sys_start > CARD_MEM_END ||
++ mem->sys_stop < CARD_MEM_START || mem->sys_stop > CARD_MEM_END ||
++ mem->sys_start > mem->sys_stop ||
+ mem->card_start > CARD_MAX_MEM_OFFSET ||
+ mem->speed > CARD_MAX_MEM_SPEED)
+ return -EINVAL;
+@@ -511,12 +436,12 @@ static int pccard_set_mem_map(struct pcm
+ exca_write_byte(slot, I365_ADDRWIN, addrwin);
}
-- debug("set_mem_map %d start %08lx card_start %08x\n",
-+ debug("set_mem_map %d start %08lx card_start %08x\n",
- map->map, map->static_start, map->card_start);
- return 0;
+- start = (mem->res->start >> 12) & 0x3fff;
++ start = (mem->sys_start >> 12) & 0x3fff;
+ if (mem->flags & MAP_16BIT)
+ start |= I365_MEM_16BIT;
+ exca_write_word(slot, I365_MEM(map)+I365_W_START, start);
-@@ -412,11 +412,11 @@ int au1x00_pcmcia_socket_probe(struct de
- skt->res_mem.flags = IORESOURCE_MEM;
- skt->res_attr.name = "attribute";
- skt->res_attr.flags = IORESOURCE_MEM;
--
-+
- /*
- * PCMCIA client drivers use the inb/outb macros to access the
-- * IO registers. Since mips_io_port_base is added to the
-- * access address of the mips implementation of inb/outb,
-+ * IO registers. Since mips_io_port_base is added to the
-+ * access address of the mips implementation of inb/outb,
- * we need to subtract it here because we want to access the
- * I/O or MEM address directly, without going through this
- * "mips_io_port_base" mechanism.
-@@ -462,7 +462,7 @@ int au1x00_pcmcia_socket_probe(struct de
+- stop = (mem->res->end >> 12) & 0x3fff;
++ stop = (mem->sys_stop >> 12) & 0x3fff;
+ switch (mem->speed) {
+ case 0:
+ break;
+@@ -593,7 +518,7 @@ static irqreturn_t pccard_interrupt(int
+ status = vrc4171_get_irq_status();
+ if (status & IRQ_A) {
+ socket = &vrc4171_sockets[CARD_SLOTA];
+- if (socket->slot == SLOT_INITIALIZED) {
++ if (socket->noprobe == SLOT_PROBE) {
+ if (status & (1 << socket->csc_irq)) {
+ events = get_events(CARD_SLOTA);
+ if (events != 0) {
+@@ -606,7 +531,7 @@ static irqreturn_t pccard_interrupt(int
- do {
- struct au1000_pcmcia_socket *skt = PCMCIA_SOCKET(i);
+ if (status & IRQ_B) {
+ socket = &vrc4171_sockets[CARD_SLOTB];
+- if (socket->slot == SLOT_INITIALIZED) {
++ if (socket->noprobe == SLOT_PROBE) {
+ if (status & (1 << socket->csc_irq)) {
+ events = get_events(CARD_SLOTB);
+ if (events != 0) {
+@@ -633,71 +558,63 @@ static inline void reserve_using_irq(int
+ vrc4171_irq_mask &= ~(1 << irq);
+ }
+
+-static int __devinit vrc4171_add_sockets(void)
++static int __devinit vrc4171_add_socket(int slot)
+ {
+ vrc4171_socket_t *socket;
+- int slot, retval;
++ int retval;
+
+- for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
+- if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
+- continue;
++ if (slot >= CARD_MAX_SLOTS)
++ return -EINVAL;
+
+- socket = &vrc4171_sockets[slot];
+- if (socket->slot != SLOT_PROBE) {
+- uint8_t addrwin;
-
-+
- del_timer_sync(&skt->poll_timer);
- pcmcia_unregister_socket(&skt->socket);
- out_err:
-diff -urpNX dontdiff linux-2.6.11.6/drivers/pcmcia/au1000_generic.h linux_HEAD/drivers/pcmcia/au1000_generic.h
---- linux-2.6.11.6/drivers/pcmcia/au1000_generic.h 2005-03-26 04:28:46.000000000 +0100
-+++ linux_HEAD/drivers/pcmcia/au1000_generic.h 2005-03-17 22:10:53.000000000 +0100
-@@ -61,21 +61,21 @@
+- switch (socket->slot) {
+- case SLOT_NOPROBE_MEM:
+- addrwin = exca_read_byte(slot, I365_ADDRWIN);
+- addrwin &= 0x1f;
+- exca_write_byte(slot, I365_ADDRWIN, addrwin);
+- break;
+- case SLOT_NOPROBE_IO:
+- addrwin = exca_read_byte(slot, I365_ADDRWIN);
+- addrwin &= 0xc0;
+- exca_write_byte(slot, I365_ADDRWIN, addrwin);
+- break;
+- default:
+- break;
+- }
++ socket = &vrc4171_sockets[slot];
++ if (socket->noprobe != SLOT_PROBE) {
++ uint8_t addrwin;
- struct pcmcia_state {
- unsigned detect: 1,
-- ready: 1,
-- wrprot: 1,
-+ ready: 1,
-+ wrprot: 1,
- bvd1: 1,
- bvd2: 1,
-- vs_3v: 1,
-- vs_Xv: 1;
-+ vs_3v: 1,
-+ vs_Xv: 1;
- };
+- reserve_using_irq(slot);
+- continue;
++ switch (socket->noprobe) {
++ case SLOT_NOPROBE_MEM:
++ addrwin = exca_read_byte(slot, I365_ADDRWIN);
++ addrwin &= 0x1f;
++ exca_write_byte(slot, I365_ADDRWIN, addrwin);
++ break;
++ case SLOT_NOPROBE_IO:
++ addrwin = exca_read_byte(slot, I365_ADDRWIN);
++ addrwin &= 0xc0;
++ exca_write_byte(slot, I365_ADDRWIN, addrwin);
++ break;
++ default:
++ break;
+ }
- struct pcmcia_configure {
- unsigned sock: 8,
-- vcc: 8,
-- vpp: 8,
-- output: 1,
-- speaker: 1,
-- reset: 1;
-+ vcc: 8,
-+ vpp: 8,
-+ output: 1,
-+ speaker: 1,
-+ reset: 1;
- };
+- sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
+- socket->pcmcia_socket.dev.dev = &vrc4171_card_device.dev;
+- socket->pcmcia_socket.ops = &vrc4171_pccard_operations;
+- socket->pcmcia_socket.owner = THIS_MODULE;
++ reserve_using_irq(slot);
- struct pcmcia_irqs {
-@@ -88,7 +88,7 @@ struct pcmcia_irqs {
- struct au1000_pcmcia_socket {
- struct pcmcia_socket socket;
+- retval = pcmcia_register_socket(&socket->pcmcia_socket);
+- if (retval < 0)
+- return retval;
++ return 0;
++ }
-- /*
-+ /*
- * Info from low level handler
- */
- struct device *dev;
-diff -urpNX dontdiff linux-2.6.11.6/drivers/pcmcia/au1000_xxs1500.c linux_HEAD/drivers/pcmcia/au1000_xxs1500.c
---- linux-2.6.11.6/drivers/pcmcia/au1000_xxs1500.c 2005-03-26 04:28:23.000000000 +0100
-+++ linux_HEAD/drivers/pcmcia/au1000_xxs1500.c 2004-10-27 02:14:43.000000000 +0200
-@@ -23,7 +23,7 @@
- *
- * ########################################################################
- *
-- *
-+ *
- */
- #include <linux/module.h>
- #include <linux/init.h>
-@@ -74,14 +74,14 @@ static int xxs1500_pcmcia_shutdown(void)
- au_sync_delay(100);
+- exca_write_byte(slot, I365_ADDRWIN, 0);
+- exca_write_byte(slot, GLOBAL_CONTROL, 0);
++ sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
- /* assert reset */
-- au_writel(au_readl(GPIO2_PINSTATE) | (1<<4)|(1<<20),
-+ au_writel(au_readl(GPIO2_PINSTATE) | (1<<4)|(1<<20),
- GPIO2_OUTPUT);
- au_sync_delay(100);
+- socket->slot = SLOT_INITIALIZED;
+- }
++ socket->pcmcia_socket.ops = &vrc4171_pccard_operations;
++
++ retval = pcmcia_register_socket(&socket->pcmcia_socket);
++ if (retval != 0)
++ return retval;
++
++ exca_write_byte(slot, I365_ADDRWIN, 0);
++
++ exca_write_byte(slot, GLOBAL_CONTROL, 0);
+
return 0;
}
-
--static int
-+static int
- xxs1500_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
+-static void vrc4171_remove_sockets(void)
++static void vrc4171_remove_socket(int slot)
{
- u32 inserted; u32 vs;
-@@ -123,7 +123,7 @@ xxs1500_pcmcia_socket_state(unsigned soc
+ vrc4171_socket_t *socket;
+- int slot;
- state->bvd1= gpio2 & (1<<10);
- state->bvd2 = gpio2 & (1<<11);
-- state->wrprot=0;
-+ state->wrprot=0;
- return 1;
- }
+- for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
+- if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
+- continue;
++ if (slot >= CARD_MAX_SLOTS)
++ return;
-@@ -137,13 +137,13 @@ static int xxs1500_pcmcia_get_irq_info(s
+- socket = &vrc4171_sockets[slot];
+- if (socket->slot == SLOT_INITIALIZED)
+- pcmcia_unregister_socket(&socket->pcmcia_socket);
++ socket = &vrc4171_sockets[slot];
+
+- socket->slot = SLOT_PROBE;
+- }
++ pcmcia_unregister_socket(&socket->pcmcia_socket);
}
+ static int __devinit vrc4171_card_setup(char *options)
+@@ -721,13 +638,13 @@ static int __devinit vrc4171_card_setup(
+ options += 6;
+ if (*options != '\0') {
+ if (strncmp(options, "memnoprobe", 10) == 0) {
+- vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_MEM;
++ vrc4171_sockets[CARD_SLOTA].noprobe = SLOT_NOPROBE_MEM;
+ options += 10;
+ } else if (strncmp(options, "ionoprobe", 9) == 0) {
+- vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_IO;
++ vrc4171_sockets[CARD_SLOTA].noprobe = SLOT_NOPROBE_IO;
+ options += 9;
+ } else if ( strncmp(options, "noprobe", 7) == 0) {
+- vrc4171_sockets[CARD_SLOTA].slot = SLOT_NOPROBE_ALL;
++ vrc4171_sockets[CARD_SLOTA].noprobe = SLOT_NOPROBE_ALL;
+ options += 7;
+ }
--static int
-+static int
- xxs1500_pcmcia_configure_socket(const struct pcmcia_configure *configure)
+@@ -761,11 +678,11 @@ static int __devinit vrc4171_card_setup(
+ options++;
+
+ if (strncmp(options, "memnoprobe", 10) == 0)
+- vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_MEM;
++ vrc4171_sockets[CARD_SLOTB].noprobe = SLOT_NOPROBE_MEM;
+ if (strncmp(options, "ionoprobe", 9) == 0)
+- vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_IO;
++ vrc4171_sockets[CARD_SLOTB].noprobe = SLOT_NOPROBE_IO;
+ if (strncmp(options, "noprobe", 7) == 0)
+- vrc4171_sockets[CARD_SLOTB].slot = SLOT_NOPROBE_ALL;
++ vrc4171_sockets[CARD_SLOTB].noprobe = SLOT_NOPROBE_ALL;
+ }
+ }
+
+@@ -774,72 +691,47 @@ static int __devinit vrc4171_card_setup(
+
+ __setup("vrc4171_card=", vrc4171_card_setup);
+
+-static int vrc4171_card_suspend(struct device *dev, pm_message_t state, u32 level)
+-{
+- int retval = 0;
+-
+- if (level == SUSPEND_SAVE_STATE)
+- retval = pcmcia_socket_dev_suspend(dev, state);
+-
+- return retval;
+-}
+-
+-static int vrc4171_card_resume(struct device *dev, u32 level)
+-{
+- int retval = 0;
+-
+- if (level == RESUME_RESTORE_STATE)
+- retval = pcmcia_socket_dev_resume(dev);
+-
+- return retval;
+-}
+-
+-static struct device_driver vrc4171_card_driver = {
+- .name = vrc4171_card_name,
+- .bus = &platform_bus_type,
+- .suspend = vrc4171_card_suspend,
+- .resume = vrc4171_card_resume,
+-};
+-
+ static int __devinit vrc4171_card_init(void)
{
+- int retval;
++ int retval, slot;
- if(configure->sock > PCMCIA_MAX_SOCK) return -1;
+- retval = driver_register(&vrc4171_card_driver);
+- if (retval < 0)
+- return retval;
++ vrc4171_set_multifunction_pin(vrc4171_slotb);
-- DEBUG("Vcc %dV Vpp %dV, reset %d\n",
-+ DEBUG("Vcc %dV Vpp %dV, reset %d\n",
- configure->vcc, configure->vpp, configure->reset);
+- retval = platform_device_register(&vrc4171_card_device);
+- if (retval < 0) {
+- driver_unregister(&vrc4171_card_driver);
+- return retval;
+- }
++ if (request_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE,
++ "NEC VRC4171 Card Controller") == NULL)
++ return -EBUSY;
- switch(configure->vcc){
-@@ -167,22 +167,22 @@ xxs1500_pcmcia_configure_socket(const st
+- vrc4171_set_multifunction_pin(vrc4171_slotb);
++ for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
++ if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
++ break;
- if (!configure->reset) {
- DEBUG("deassert reset\n");
-- au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<4))|(1<<20),
-+ au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<4))|(1<<20),
- GPIO2_OUTPUT);
- au_sync_delay(100);
-- au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<5))|(1<<21),
-+ au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<5))|(1<<21),
- GPIO2_OUTPUT);
+- retval = vrc4171_add_sockets();
+- if (retval == 0)
+- retval = request_irq(vrc4171_irq, pccard_interrupt, SA_SHIRQ,
+- vrc4171_card_name, vrc4171_sockets);
++ retval = vrc4171_add_socket(slot);
++ if (retval != 0)
++ return retval;
++ }
+
++ retval = request_irq(vrc4171_irq, pccard_interrupt, SA_SHIRQ,
++ "NEC VRC4171 Card Controller", vrc4171_sockets);
+ if (retval < 0) {
+- vrc4171_remove_sockets();
+- platform_device_unregister(&vrc4171_card_device);
+- driver_unregister(&vrc4171_card_driver);
++ for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
++ vrc4171_remove_socket(slot);
++
+ return retval;
}
- else {
- DEBUG("assert reset\n");
-- au_writel(au_readl(GPIO2_PINSTATE) | (1<<4)|(1<<20),
-+ au_writel(au_readl(GPIO2_PINSTATE) | (1<<4)|(1<<20),
- GPIO2_OUTPUT);
- }
- au_sync_delay(100);
+
+- printk(KERN_INFO "%s, connected to IRQ %d\n", vrc4171_card_driver.name, vrc4171_irq);
++ printk(KERN_INFO "NEC VRC4171 Card Controller, connected to IRQ %d\n", vrc4171_irq);
+
return 0;
}
--struct pcmcia_low_level xxs1500_pcmcia_ops = {
-+struct pcmcia_low_level xxs1500_pcmcia_ops = {
- xxs1500_pcmcia_init,
- xxs1500_pcmcia_shutdown,
- xxs1500_pcmcia_socket_state,
-diff -urpNX dontdiff linux-2.6.11.6/drivers/pcmcia/vrc4173_cardu.c linux_HEAD/drivers/pcmcia/vrc4173_cardu.c
---- linux-2.6.11.6/drivers/pcmcia/vrc4173_cardu.c 2005-04-03 00:12:23.000000000 +0200
-+++ linux_HEAD/drivers/pcmcia/vrc4173_cardu.c 2004-10-27 02:14:44.000000000 +0200
-@@ -300,7 +300,7 @@ static int cardu_get_io_map(unsigned int
+ static void __devexit vrc4171_card_exit(void)
+ {
+- free_irq(vrc4171_irq, vrc4171_sockets);
+- vrc4171_remove_sockets();
+- platform_device_unregister(&vrc4171_card_device);
+- driver_unregister(&vrc4171_card_driver);
++ int slot;
++
++ for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
++ vrc4171_remove_socket(slot);
++
++ release_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE);
+ }
- map = io->map;
- if (map > 1)
-- return -EINVAL;
-+ return -EINVAL;
+ module_init(vrc4171_card_init);
+diff -urpNX dontdiff linux-2.6.12/drivers/pcmcia/vrc4173_cardu.c linux_HEAD/drivers/pcmcia/vrc4173_cardu.c
+--- linux-2.6.12/drivers/pcmcia/vrc4173_cardu.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/pcmcia/vrc4173_cardu.c 2005-07-10 12:28:27.000000000 +0200
+@@ -614,4 +614,3 @@ static void __devexit vrc4173_cardu_exit
- io->start = exca_readw(socket, IO_WIN_SA(map));
- io->stop = exca_readw(socket, IO_WIN_EA(map));
-@@ -467,7 +467,7 @@ static uint16_t get_events(vrc4173_socke
-
- status = exca_readb(socket, IF_STATUS);
- csc = exca_readb(socket, CARD_SC);
-- if ((csc & CARD_DT_CHG) &&
-+ if ((csc & CARD_DT_CHG) &&
- ((status & (CARD_DETECT1|CARD_DETECT2)) == (CARD_DETECT1|CARD_DETECT2)))
- events |= SS_DETECT;
-
-diff -urpNX dontdiff linux-2.6.11.6/drivers/pcmcia/vrc4173_cardu.h linux_HEAD/drivers/pcmcia/vrc4173_cardu.h
---- linux-2.6.11.6/drivers/pcmcia/vrc4173_cardu.h 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/drivers/pcmcia/vrc4173_cardu.h 2003-11-16 09:21:03.000000000 +0100
-@@ -136,8 +136,8 @@
-
- #define IO_WIN_CNT 0x007
- #define IO_WIN_CNT_MASK(x) (0x03 << ((x) << 2))
-- #define IO_WIN_DATA_AUTOSZ(x) (0x02 << ((x) << 2))
-- #define IO_WIN_DATA_16BIT(x) (0x01 << ((x) << 2))
-+ #define IO_WIN_DATA_AUTOSZ(x) (0x02 << ((x) << 2))
-+ #define IO_WIN_DATA_16BIT(x) (0x01 << ((x) << 2))
-
- #define IO_WIN_SA(x) (0x008 + ((x) << 2))
- #define IO_WIN_EA(x) (0x00a + ((x) << 2))
-diff -urpNX dontdiff linux-2.6.11.6/drivers/scsi/NCR53C9x.h linux_HEAD/drivers/scsi/NCR53C9x.h
---- linux-2.6.11.6/drivers/scsi/NCR53C9x.h 2005-03-26 04:28:18.000000000 +0100
+ module_init(vrc4173_cardu_init);
+ module_exit(vrc4173_cardu_exit);
+-MODULE_DEVICE_TABLE(pci, vrc4173_cardu_id_table);
+diff -urpNX dontdiff linux-2.6.12/drivers/scsi/NCR53C9x.h linux_HEAD/drivers/scsi/NCR53C9x.h
+--- linux-2.6.12/drivers/scsi/NCR53C9x.h 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/scsi/NCR53C9x.h 2005-02-17 21:50:04.000000000 +0100
@@ -145,12 +145,7 @@
@@ -38729,11 +59348,28 @@
#define esp_read(__reg) (__reg)
struct ESP_regs {
-diff -urpNX dontdiff linux-2.6.11.6/drivers/scsi/dec_esp.c linux_HEAD/drivers/scsi/dec_esp.c
---- linux-2.6.11.6/drivers/scsi/dec_esp.c 2005-03-26 04:28:24.000000000 +0100
-+++ linux_HEAD/drivers/scsi/dec_esp.c 2004-10-27 02:14:47.000000000 +0200
-@@ -54,7 +54,7 @@
+diff -urpNX dontdiff linux-2.6.12/drivers/scsi/dec_esp.c linux_HEAD/drivers/scsi/dec_esp.c
+--- linux-2.6.12/drivers/scsi/dec_esp.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/scsi/dec_esp.c 2005-07-03 16:44:33.000000000 +0200
+@@ -18,7 +18,7 @@
+ * 20001005 - Initialization fixes for 2.4.0-test9
+ * Florian Lohoff <flo at rfc822.org>
+ *
+- * Copyright (C) 2002, 2003 Maciej W. Rozycki
++ * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
+ */
+ #include <linux/kernel.h>
+@@ -41,6 +41,7 @@
+ #include <asm/dec/ioasic_addrs.h>
+ #include <asm/dec/ioasic_ints.h>
+ #include <asm/dec/machtype.h>
++#include <asm/dec/system.h>
+ #include <asm/dec/tc.h>
+
+ #define DEC_SCSI_SREG 0
+@@ -54,7 +55,7 @@
+
static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
static void dma_drain(struct NCR_ESP *esp);
-static int dma_can_transfer(struct NCR_ESP *esp, struct scsi_cmnd *sp);
@@ -38741,7 +59377,7 @@
static void dma_dump_state(struct NCR_ESP *esp);
static void dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
static void dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length);
-@@ -63,9 +63,9 @@ static void dma_ints_on(struct NCR_ESP *
+@@ -63,9 +64,9 @@ static void dma_ints_on(struct NCR_ESP *
static int dma_irq_p(struct NCR_ESP *esp);
static int dma_ports_p(struct NCR_ESP *esp);
static void dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write);
@@ -38754,7 +59390,7 @@
static void pmaz_dma_drain(struct NCR_ESP *esp);
static void pmaz_dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
-@@ -73,7 +73,7 @@ static void pmaz_dma_init_write(struct N
+@@ -73,7 +74,7 @@ static void pmaz_dma_init_write(struct N
static void pmaz_dma_ints_off(struct NCR_ESP *esp);
static void pmaz_dma_ints_on(struct NCR_ESP *esp);
static void pmaz_dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write);
@@ -38763,7 +59399,7 @@
#define TC_ESP_RAM_SIZE 0x20000
#define ESP_TGT_DMA_SIZE ((TC_ESP_RAM_SIZE/7) & ~(sizeof(int)-1))
-@@ -97,7 +97,7 @@ static irqreturn_t scsi_dma_merr_int(int
+@@ -97,7 +98,7 @@ static irqreturn_t scsi_dma_merr_int(int
static irqreturn_t scsi_dma_err_int(int, void *, struct pt_regs *);
static irqreturn_t scsi_dma_int(int, void *, struct pt_regs *);
@@ -38772,7 +59408,7 @@
static int dec_esp_release(struct Scsi_Host *shost)
{
-@@ -109,9 +109,9 @@ static int dec_esp_release(struct Scsi_H
+@@ -109,9 +110,9 @@ static int dec_esp_release(struct Scsi_H
return 0;
}
@@ -38784,7 +59420,7 @@
.name = "NCR53C94",
.detect = dec_esp_detect,
.slave_alloc = esp_slave_alloc,
-@@ -132,7 +132,7 @@ static struct scsi_host_template driver_
+@@ -132,7 +133,7 @@ static struct scsi_host_template driver_
#include "scsi_module.c"
/***************************************************************** Detection */
@@ -38793,7 +59429,31 @@
{
struct NCR_ESP *esp;
struct ConfigDev *esp_dev;
-@@ -376,7 +376,7 @@ static void dma_drain(struct NCR_ESP *es
+@@ -183,7 +184,8 @@ static int dec_esp_detect(Scsi_Host_Temp
+ esp->dregs = 0;
+
+ /* ESP register base */
+- esp->eregs = (struct ESP_regs *) (system_base + IOASIC_SCSI);
++ esp->eregs = (void *)CKSEG1ADDR(dec_kn_slot_base +
++ IOASIC_SCSI);
+
+ /* Set the command buffer */
+ esp->esp_command = (volatile unsigned char *) cmd_buffer;
+@@ -228,10 +230,11 @@ static int dec_esp_detect(Scsi_Host_Temp
+ mem_start = get_tc_base_addr(slot);
+
+ /* Store base addr into esp struct */
+- esp->slot = PHYSADDR(mem_start);
++ esp->slot = mem_start;
+
+ esp->dregs = 0;
+- esp->eregs = (struct ESP_regs *) (mem_start + DEC_SCSI_SREG);
++ esp->eregs = (void *)CKSEG1ADDR(mem_start +
++ DEC_SCSI_SREG);
+ esp->do_pio_cmds = 1;
+
+ /* Set the command buffer */
+@@ -376,7 +379,7 @@ static void dma_drain(struct NCR_ESP *es
}
}
@@ -38802,7 +59462,7 @@
{
return sp->SCp.this_residual;
}
-@@ -488,12 +488,12 @@ static void dma_setup(struct NCR_ESP *es
+@@ -488,12 +491,12 @@ static void dma_setup(struct NCR_ESP *es
dma_init_write(esp, addr, count);
}
@@ -38817,7 +59477,7 @@
{
int sz = sp->SCp.buffers_residual;
struct scatterlist *sg = sp->SCp.buffer;
-@@ -505,7 +505,7 @@ static void dma_mmu_get_scsi_sgl(struct
+@@ -505,7 +508,7 @@ static void dma_mmu_get_scsi_sgl(struct
sp->SCp.ptr = (char *)(sp->SCp.buffer->dma_address);
}
@@ -38826,7 +59486,39 @@
{
sp->SCp.ptr = (char *)(sp->SCp.buffer->dma_address);
}
-@@ -567,7 +567,7 @@ static void pmaz_dma_setup(struct NCR_ES
+@@ -513,14 +516,15 @@ static void dma_advance_sg(struct scsi_c
+ static void pmaz_dma_drain(struct NCR_ESP *esp)
+ {
+ memcpy(phys_to_virt(esp_virt_buffer),
+- (void *)KSEG1ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
+- scsi_current_length);
++ (void *)CKSEG1ADDR(esp->slot + DEC_SCSI_SRAM +
++ ESP_TGT_DMA_SIZE),
++ scsi_current_length);
+ }
+
+ static void pmaz_dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length)
+ {
+ volatile u32 *dmareg =
+- (volatile u32 *)KSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
++ (volatile u32 *)CKSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
+
+ if (length > ESP_TGT_DMA_SIZE)
+ length = ESP_TGT_DMA_SIZE;
+@@ -536,9 +540,10 @@ static void pmaz_dma_init_read(struct NC
+ static void pmaz_dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length)
+ {
+ volatile u32 *dmareg =
+- (volatile u32 *)KSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
++ (volatile u32 *)CKSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
+
+- memcpy((void *)KSEG1ADDR(esp->slot + DEC_SCSI_SRAM + ESP_TGT_DMA_SIZE),
++ memcpy((void *)CKSEG1ADDR(esp->slot + DEC_SCSI_SRAM +
++ ESP_TGT_DMA_SIZE),
+ phys_to_virt(vaddress), length);
+
+ wmb();
+@@ -567,7 +572,7 @@ static void pmaz_dma_setup(struct NCR_ES
pmaz_dma_init_write(esp, addr, count);
}
@@ -38835,8 +59527,8 @@
{
sp->SCp.ptr = (char *)virt_to_phys(sp->request_buffer);
}
-diff -urpNX dontdiff linux-2.6.11.6/drivers/scsi/jazz_esp.c linux_HEAD/drivers/scsi/jazz_esp.c
---- linux-2.6.11.6/drivers/scsi/jazz_esp.c 2005-03-26 04:28:15.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/scsi/jazz_esp.c linux_HEAD/drivers/scsi/jazz_esp.c
+--- linux-2.6.12/drivers/scsi/jazz_esp.c 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/drivers/scsi/jazz_esp.c 2004-10-27 02:14:48.000000000 +0200
@@ -28,7 +28,7 @@
#include <asm/pgtable.h>
@@ -38945,13 +59637,1419 @@
- .use_clustering = DISABLE_CLUSTERING,
-};
-#include "scsi_module.c"
-diff -urpNX dontdiff linux-2.6.11.6/drivers/scsi/sym53c8xx_defs.h linux_HEAD/drivers/scsi/sym53c8xx_defs.h
---- linux-2.6.11.6/drivers/scsi/sym53c8xx_defs.h 2005-03-26 04:28:47.000000000 +0100
-+++ linux_HEAD/drivers/scsi/sym53c8xx_defs.h 2005-02-17 21:50:07.000000000 +0100
-@@ -317,6 +317,16 @@
- #define readl_raw(a) __raw_readl((unsigned long)(a))
+diff -urpNX dontdiff linux-2.6.12/drivers/scsi/qla1280.c linux_HEAD/drivers/scsi/qla1280.c
+--- linux-2.6.12/drivers/scsi/qla1280.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/scsi/qla1280.c 2005-07-03 19:45:14.000000000 +0200
+@@ -996,7 +996,6 @@ qla1280_error_action(struct scsi_cmnd *c
+ break;
+
+ case ABORT_DEVICE:
+- ha->flags.in_reset = 1;
+ if (qla1280_verbose)
+ printk(KERN_INFO
+ "scsi(%ld:%d:%d:%d): Queueing abort device "
+@@ -1010,7 +1009,6 @@ qla1280_error_action(struct scsi_cmnd *c
+ printk(KERN_INFO
+ "scsi(%ld:%d:%d:%d): Queueing device reset "
+ "command.\n", ha->host_no, bus, target, lun);
+- ha->flags.in_reset = 1;
+ if (qla1280_device_reset(ha, bus, target) == 0)
+ result = SUCCESS;
+ break;
+@@ -1019,7 +1017,6 @@ qla1280_error_action(struct scsi_cmnd *c
+ if (qla1280_verbose)
+ printk(KERN_INFO "qla1280(%ld:%d): Issuing BUS "
+ "DEVICE RESET\n", ha->host_no, bus);
+- ha->flags.in_reset = 1;
+ if (qla1280_bus_reset(ha, bus == 0))
+ result = SUCCESS;
+
+@@ -1047,7 +1044,6 @@ qla1280_error_action(struct scsi_cmnd *c
+
+ if (!list_empty(&ha->done_q))
+ qla1280_done(ha);
+- ha->flags.in_reset = 0;
+
+ /* If we didn't manage to issue the action, or we have no
+ * command to wait for, exit here */
+@@ -1245,6 +1241,22 @@ qla1280_biosparam_old(Disk * disk, kdev_
+ return qla1280_biosparam(disk->device, NULL, disk->capacity, geom);
+ }
+ #endif
++
++/* disable risc and host interrupts */
++static inline void
++qla1280_disable_intrs(struct scsi_qla_host *ha)
++{
++ WRT_REG_WORD(&ha->iobase->ictrl, 0);
++ RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */
++}
++
++/* enable risc and host interrupts */
++static inline void
++qla1280_enable_intrs(struct scsi_qla_host *ha)
++{
++ WRT_REG_WORD(&ha->iobase->ictrl, (ISP_EN_INT | ISP_EN_RISC));
++ RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */
++}
+
+ /**************************************************************************
+ * qla1280_intr_handler
+@@ -1266,7 +1278,7 @@ qla1280_intr_handler(int irq, void *dev_
+ ha->isr_count++;
+ reg = ha->iobase;
+
+- WRT_REG_WORD(®->ictrl, 0); /* disable our interrupt. */
++ qla1280_disable_intrs(ha);
+
+ data = qla1280_debounce_register(®->istatus);
+ /* Check for pending interrupts. */
+@@ -1279,8 +1291,7 @@ qla1280_intr_handler(int irq, void *dev_
+
+ spin_unlock(HOST_LOCK);
+
+- /* enable our interrupt. */
+- WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC));
++ qla1280_enable_intrs(ha);
+
+ LEAVE_INTR("qla1280_intr_handler");
+ return IRQ_RETVAL(handled);
+@@ -1293,7 +1304,7 @@ qla1280_set_target_parameters(struct scs
+ uint8_t mr;
+ uint16_t mb[MAILBOX_REGISTER_COUNT];
+ struct nvram *nv;
+- int status;
++ int status, lun;
+
+ nv = &ha->nvram;
+
+@@ -1301,24 +1312,38 @@ qla1280_set_target_parameters(struct scs
+
+ /* Set Target Parameters. */
+ mb[0] = MBC_SET_TARGET_PARAMETERS;
+- mb[1] = (uint16_t) (bus ? target | BIT_7 : target);
+- mb[1] <<= 8;
+-
+- mb[2] = (nv->bus[bus].target[target].parameter.c << 8);
++ mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8);
++ mb[2] = nv->bus[bus].target[target].parameter.renegotiate_on_error << 8;
++ mb[2] |= nv->bus[bus].target[target].parameter.stop_queue_on_check << 9;
++ mb[2] |= nv->bus[bus].target[target].parameter.auto_request_sense << 10;
++ mb[2] |= nv->bus[bus].target[target].parameter.tag_queuing << 11;
++ mb[2] |= nv->bus[bus].target[target].parameter.enable_sync << 12;
++ mb[2] |= nv->bus[bus].target[target].parameter.enable_wide << 13;
++ mb[2] |= nv->bus[bus].target[target].parameter.parity_checking << 14;
++ mb[2] |= nv->bus[bus].target[target].parameter.disconnect_allowed << 15;
+
+ if (IS_ISP1x160(ha)) {
+ mb[2] |= nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr << 5;
+- mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8) |
+- nv->bus[bus].target[target].sync_period;
++ mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8);
+ mb[6] = (nv->bus[bus].target[target].ppr_1x160.flags.ppr_options << 8) |
+ nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width;
+ mr |= BIT_6;
+ } else {
+- mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8) |
+- nv->bus[bus].target[target].sync_period;
++ mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8);
+ }
++ mb[3] |= nv->bus[bus].target[target].sync_period;
+
+- status = qla1280_mailbox_command(ha, mr, &mb[0]);
++ status = qla1280_mailbox_command(ha, mr, mb);
++
++ /* Set Device Queue Parameters. */
++ for (lun = 0; lun < MAX_LUNS; lun++) {
++ mb[0] = MBC_SET_DEVICE_QUEUE;
++ mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8);
++ mb[1] |= lun;
++ mb[2] = nv->bus[bus].max_queue_depth;
++ mb[3] = nv->bus[bus].target[target].execution_throttle;
++ status |= qla1280_mailbox_command(ha, 0x0f, mb);
++ }
+
+ if (status)
+ printk(KERN_WARNING "scsi(%ld:%i:%i): "
+@@ -1365,19 +1390,19 @@ qla1280_slave_configure(struct scsi_devi
+ }
+
+ #if LINUX_VERSION_CODE > 0x020500
+- nv->bus[bus].target[target].parameter.f.enable_sync = device->sdtr;
+- nv->bus[bus].target[target].parameter.f.enable_wide = device->wdtr;
++ nv->bus[bus].target[target].parameter.enable_sync = device->sdtr;
++ nv->bus[bus].target[target].parameter.enable_wide = device->wdtr;
+ nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr;
+ #endif
+
+ if (driver_setup.no_sync ||
+ (driver_setup.sync_mask &&
+ (~driver_setup.sync_mask & (1 << target))))
+- nv->bus[bus].target[target].parameter.f.enable_sync = 0;
++ nv->bus[bus].target[target].parameter.enable_sync = 0;
+ if (driver_setup.no_wide ||
+ (driver_setup.wide_mask &&
+ (~driver_setup.wide_mask & (1 << target))))
+- nv->bus[bus].target[target].parameter.f.enable_wide = 0;
++ nv->bus[bus].target[target].parameter.enable_wide = 0;
+ if (IS_ISP1x160(ha)) {
+ if (driver_setup.no_ppr ||
+ (driver_setup.ppr_mask &&
+@@ -1386,7 +1411,7 @@ qla1280_slave_configure(struct scsi_devi
+ }
+
+ spin_lock_irqsave(HOST_LOCK, flags);
+- if (nv->bus[bus].target[target].parameter.f.enable_sync)
++ if (nv->bus[bus].target[target].parameter.enable_sync)
+ status = qla1280_set_target_parameters(ha, bus, target);
+ qla1280_get_target_parameters(ha, device);
+ spin_unlock_irqrestore(HOST_LOCK, flags);
+@@ -1424,7 +1449,6 @@ qla1280_select_queue_depth(struct Scsi_H
+ *
+ * Input:
+ * ha = adapter block pointer.
+- * done_q = done queue.
+ */
+ static void
+ qla1280_done(struct scsi_qla_host *ha)
+@@ -1498,7 +1522,7 @@ qla1280_return_status(struct response *
+ int host_status = DID_ERROR;
+ uint16_t comp_status = le16_to_cpu(sts->comp_status);
+ uint16_t state_flags = le16_to_cpu(sts->state_flags);
+- uint16_t residual_length = le16_to_cpu(sts->residual_length);
++ uint16_t residual_length = le32_to_cpu(sts->residual_length);
+ uint16_t scsi_status = le16_to_cpu(sts->scsi_status);
+ #if DEBUG_QLA1280_INTR
+ static char *reason[] = {
+@@ -1558,7 +1582,7 @@ qla1280_return_status(struct response *
+
+ case CS_DATA_OVERRUN:
+ dprintk(2, "Data overrun 0x%x\n", residual_length);
+- dprintk(2, "qla1280_isr: response packet data\n");
++ dprintk(2, "qla1280_return_status: response packet data\n");
+ qla1280_dump_buffer(2, (char *)sts, RESPONSE_ENTRY_SIZE);
+ host_status = DID_ERROR;
+ break;
+@@ -1593,40 +1617,6 @@ qla1280_return_status(struct response *
+ /* QLogic ISP1280 Hardware Support Functions. */
+ /****************************************************************************/
+
+- /*
+- * qla2100_enable_intrs
+- * qla2100_disable_intrs
+- *
+- * Input:
+- * ha = adapter block pointer.
+- *
+- * Returns:
+- * None
+- */
+-static inline void
+-qla1280_enable_intrs(struct scsi_qla_host *ha)
+-{
+- struct device_reg __iomem *reg;
+-
+- reg = ha->iobase;
+- /* enable risc and host interrupts */
+- WRT_REG_WORD(®->ictrl, (ISP_EN_INT | ISP_EN_RISC));
+- RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */
+- ha->flags.ints_enabled = 1;
+-}
+-
+-static inline void
+-qla1280_disable_intrs(struct scsi_qla_host *ha)
+-{
+- struct device_reg __iomem *reg;
+-
+- reg = ha->iobase;
+- /* disable risc and host interrupts */
+- WRT_REG_WORD(®->ictrl, 0);
+- RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */
+- ha->flags.ints_enabled = 0;
+-}
+-
+ /*
+ * qla1280_initialize_adapter
+ * Initialize board.
+@@ -1655,7 +1645,6 @@ qla1280_initialize_adapter(struct scsi_q
+ ha->flags.reset_active = 0;
+ ha->flags.abort_isp_active = 0;
+
+- ha->flags.ints_enabled = 0;
+ #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
+ if (ia64_platform_is("sn2")) {
+ printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA "
+@@ -1734,69 +1723,6 @@ qla1280_initialize_adapter(struct scsi_q
+ return status;
+ }
+
+-
+-/*
+- * ISP Firmware Test
+- * Checks if present version of RISC firmware is older than
+- * driver firmware.
+- *
+- * Input:
+- * ha = adapter block pointer.
+- *
+- * Returns:
+- * 0 = firmware does not need to be loaded.
+- */
+-static int
+-qla1280_isp_firmware(struct scsi_qla_host *ha)
+-{
+- struct nvram *nv = (struct nvram *) ha->response_ring;
+- int status = 0; /* dg 2/27 always loads RISC */
+- uint16_t mb[MAILBOX_REGISTER_COUNT];
+-
+- ENTER("qla1280_isp_firmware");
+-
+- dprintk(1, "scsi(%li): Determining if RISC is loaded\n", ha->host_no);
+-
+- /* Bad NVRAM data, load RISC code. */
+- if (!ha->nvram_valid) {
+- ha->flags.disable_risc_code_load = 0;
+- } else
+- ha->flags.disable_risc_code_load =
+- nv->cntr_flags_1.disable_loading_risc_code;
+-
+- if (ha->flags.disable_risc_code_load) {
+- dprintk(3, "qla1280_isp_firmware: Telling RISC to verify "
+- "checksum of loaded BIOS code.\n");
+-
+- /* Verify checksum of loaded RISC code. */
+- mb[0] = MBC_VERIFY_CHECKSUM;
+- /* mb[1] = ql12_risc_code_addr01; */
+- mb[1] = *ql1280_board_tbl[ha->devnum].fwstart;
+-
+- if (!(status =
+- qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]))) {
+- /* Start firmware execution. */
+- dprintk(3, "qla1280_isp_firmware: Startng F/W "
+- "execution.\n");
+-
+- mb[0] = MBC_EXECUTE_FIRMWARE;
+- /* mb[1] = ql12_risc_code_addr01; */
+- mb[1] = *ql1280_board_tbl[ha->devnum].fwstart;
+- qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]);
+- } else
+- printk(KERN_INFO "qla1280: RISC checksum failed.\n");
+- } else {
+- dprintk(1, "qla1280: NVRAM configured to load RISC load.\n");
+- status = 1;
+- }
+-
+- if (status)
+- dprintk(2, "qla1280_isp_firmware: **** Load RISC code ****\n");
+-
+- LEAVE("qla1280_isp_firmware");
+- return status;
+-}
+-
+ /*
+ * Chip diagnostics
+ * Test chip for proper operation.
+@@ -1982,7 +1908,7 @@ qla1280_load_firmware_dma(struct scsi_ql
+ "%d,%d(0x%x)\n",
+ risc_code_address, cnt, num, risc_address);
+ for(i = 0; i < cnt; i++)
+- ((uint16_t *)ha->request_ring)[i] =
++ ((__le16 *)ha->request_ring)[i] =
+ cpu_to_le16(risc_code_address[i]);
+
+ mb[0] = MBC_LOAD_RAM;
+@@ -2061,7 +1987,7 @@ qla1280_start_firmware(struct scsi_qla_h
+ mb[1] = *ql1280_board_tbl[ha->devnum].fwstart;
+ err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
+ if (err) {
+- printk(KERN_ERR "scsi(%li): Failed checksum\n", ha->host_no);
++ printk(KERN_ERR "scsi(%li): RISC checksum failed.\n", ha->host_no);
+ return err;
+ }
+
+@@ -2081,14 +2007,7 @@ qla1280_start_firmware(struct scsi_qla_h
+ static int
+ qla1280_load_firmware(struct scsi_qla_host *ha)
+ {
+- int err = -ENODEV;
+-
+- /* If firmware needs to be loaded */
+- if (!qla1280_isp_firmware(ha)) {
+- printk(KERN_ERR "scsi(%li): isp_firmware() failed!\n",
+- ha->host_no);
+- goto out;
+- }
++ int err;
+
+ err = qla1280_chip_diag(ha);
+ if (err)
+@@ -2222,17 +2141,17 @@ qla1280_set_target_defaults(struct scsi_
+ {
+ struct nvram *nv = &ha->nvram;
+
+- nv->bus[bus].target[target].parameter.f.renegotiate_on_error = 1;
+- nv->bus[bus].target[target].parameter.f.auto_request_sense = 1;
+- nv->bus[bus].target[target].parameter.f.tag_queuing = 1;
+- nv->bus[bus].target[target].parameter.f.enable_sync = 1;
++ nv->bus[bus].target[target].parameter.renegotiate_on_error = 1;
++ nv->bus[bus].target[target].parameter.auto_request_sense = 1;
++ nv->bus[bus].target[target].parameter.tag_queuing = 1;
++ nv->bus[bus].target[target].parameter.enable_sync = 1;
+ #if 1 /* Some SCSI Processors do not seem to like this */
+- nv->bus[bus].target[target].parameter.f.enable_wide = 1;
++ nv->bus[bus].target[target].parameter.enable_wide = 1;
+ #endif
+- nv->bus[bus].target[target].parameter.f.parity_checking = 1;
+- nv->bus[bus].target[target].parameter.f.disconnect_allowed = 1;
+ nv->bus[bus].target[target].execution_throttle =
+ nv->bus[bus].max_queue_depth - 1;
++ nv->bus[bus].target[target].parameter.parity_checking = 1;
++ nv->bus[bus].target[target].parameter.disconnect_allowed = 1;
+
+ if (IS_ISP1x160(ha)) {
+ nv->bus[bus].target[target].flags.flags1x160.device_enable = 1;
+@@ -2260,9 +2179,9 @@ qla1280_set_defaults(struct scsi_qla_hos
+ /* nv->cntr_flags_1.disable_loading_risc_code = 1; */
+ nv->firmware_feature.f.enable_fast_posting = 1;
+ nv->firmware_feature.f.disable_synchronous_backoff = 1;
+- nv->termination.f.scsi_bus_0_control = 3;
+- nv->termination.f.scsi_bus_1_control = 3;
+- nv->termination.f.auto_term_support = 1;
++ nv->termination.scsi_bus_0_control = 3;
++ nv->termination.scsi_bus_1_control = 3;
++ nv->termination.auto_term_support = 1;
+
+ /*
+ * Set default FIFO magic - What appropriate values would be here
+@@ -2272,7 +2191,12 @@ qla1280_set_defaults(struct scsi_qla_hos
+ * header file provided by QLogic seems to be bogus or incomplete
+ * at best.
+ */
+- nv->isp_config.c = ISP_CFG1_BENAB|ISP_CFG1_F128;
++ nv->isp_config.burst_enable = 1;
++ if (IS_ISP1040(ha))
++ nv->isp_config.fifo_threshold |= 3;
++ else
++ nv->isp_config.fifo_threshold |= 4;
++
+ if (IS_ISP1x160(ha))
+ nv->isp_parameter = 0x01; /* fast memory enable */
+
+@@ -2303,66 +2227,53 @@ qla1280_config_target(struct scsi_qla_ho
+ struct nvram *nv = &ha->nvram;
+ uint16_t mb[MAILBOX_REGISTER_COUNT];
+ int status, lun;
++ uint16_t flag;
+
+ /* Set Target Parameters. */
+ mb[0] = MBC_SET_TARGET_PARAMETERS;
+- mb[1] = (uint16_t) (bus ? target | BIT_7 : target);
+- mb[1] <<= 8;
+-
+- /*
+- * Do not enable wide, sync, and ppr for the initial
+- * INQUIRY run. We enable this later if we determine
+- * the target actually supports it.
+- */
+- nv->bus[bus].target[target].parameter.f.
+- auto_request_sense = 1;
+- nv->bus[bus].target[target].parameter.f.
+- stop_queue_on_check = 0;
+-
+- if (IS_ISP1x160(ha))
+- nv->bus[bus].target[target].ppr_1x160.
+- flags.enable_ppr = 0;
++ mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8);
+
+ /*
+- * No sync, wide, etc. while probing
++ * Do not enable sync and ppr for the initial INQUIRY run. We
++ * enable this later if we determine the target actually
++ * supports it.
+ */
+- mb[2] = (nv->bus[bus].target[target].parameter.c << 8) &
+- ~(TP_SYNC /*| TP_WIDE | TP_PPR*/);
++ mb[2] = (TP_RENEGOTIATE | TP_AUTO_REQUEST_SENSE | TP_TAGGED_QUEUE
++ | TP_WIDE | TP_PARITY | TP_DISCONNECT);
+
+ if (IS_ISP1x160(ha))
+ mb[3] = nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8;
+ else
+ mb[3] = nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8;
+ mb[3] |= nv->bus[bus].target[target].sync_period;
+-
+- status = qla1280_mailbox_command(ha, BIT_3 | BIT_2 | BIT_1 | BIT_0, &mb[0]);
++ status = qla1280_mailbox_command(ha, 0x0f, mb);
+
+ /* Save Tag queuing enable flag. */
+- mb[0] = BIT_0 << target;
+- if (nv->bus[bus].target[target].parameter.f.tag_queuing)
+- ha->bus_settings[bus].qtag_enables |= mb[0];
++ flag = (BIT_0 << target) & mb[0];
++ if (nv->bus[bus].target[target].parameter.tag_queuing)
++ ha->bus_settings[bus].qtag_enables |= flag;
+
+ /* Save Device enable flag. */
+ if (IS_ISP1x160(ha)) {
+ if (nv->bus[bus].target[target].flags.flags1x160.device_enable)
+- ha->bus_settings[bus].device_enables |= mb[0];
++ ha->bus_settings[bus].device_enables |= flag;
+ ha->bus_settings[bus].lun_disables |= 0;
+ } else {
+ if (nv->bus[bus].target[target].flags.flags1x80.device_enable)
+- ha->bus_settings[bus].device_enables |= mb[0];
++ ha->bus_settings[bus].device_enables |= flag;
+ /* Save LUN disable flag. */
+ if (nv->bus[bus].target[target].flags.flags1x80.lun_disable)
+- ha->bus_settings[bus].lun_disables |= mb[0];
++ ha->bus_settings[bus].lun_disables |= flag;
+ }
+
+ /* Set Device Queue Parameters. */
+ for (lun = 0; lun < MAX_LUNS; lun++) {
+ mb[0] = MBC_SET_DEVICE_QUEUE;
+- mb[1] = (uint16_t)(bus ? target | BIT_7 : target);
+- mb[1] = mb[1] << 8 | lun;
++ mb[1] = (uint16_t)((bus ? target | BIT_7 : target) << 8);
++ mb[1] |= lun;
+ mb[2] = nv->bus[bus].max_queue_depth;
+ mb[3] = nv->bus[bus].target[target].execution_throttle;
+- status |= qla1280_mailbox_command(ha, 0x0f, &mb[0]);
++ status |= qla1280_mailbox_command(ha, 0x0f, mb);
+ }
+
+ return status;
+@@ -2407,7 +2318,6 @@ qla1280_nvram_config(struct scsi_qla_hos
+ struct nvram *nv = &ha->nvram;
+ int bus, target, status = 0;
+ uint16_t mb[MAILBOX_REGISTER_COUNT];
+- uint16_t mask;
+
+ ENTER("qla1280_nvram_config");
+
+@@ -2415,7 +2325,7 @@ qla1280_nvram_config(struct scsi_qla_hos
+ /* Always force AUTO sense for LINUX SCSI */
+ for (bus = 0; bus < MAX_BUSES; bus++)
+ for (target = 0; target < MAX_TARGETS; target++) {
+- nv->bus[bus].target[target].parameter.f.
++ nv->bus[bus].target[target].parameter.
+ auto_request_sense = 1;
+ }
+ } else {
+@@ -2433,31 +2343,40 @@ qla1280_nvram_config(struct scsi_qla_hos
+
+ hwrev = RD_REG_WORD(®->cfg_0) & ISP_CFG0_HWMSK;
+
+- cfg1 = RD_REG_WORD(®->cfg_1);
++ cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6);
+ cdma_conf = RD_REG_WORD(®->cdma_cfg);
+ ddma_conf = RD_REG_WORD(®->ddma_cfg);
+
+ /* Busted fifo, says mjacob. */
+- if (hwrev == ISP_CFG0_1040A)
+- WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64);
+- else
+- WRT_REG_WORD(®->cfg_1, cfg1 | ISP_CFG1_F64 | ISP_CFG1_BENAB);
++ if (hwrev != ISP_CFG0_1040A)
++ cfg1 |= nv->isp_config.fifo_threshold << 4;
++
++ cfg1 |= nv->isp_config.burst_enable << 2;
++ WRT_REG_WORD(®->cfg_1, cfg1);
+
+ WRT_REG_WORD(®->cdma_cfg, cdma_conf | CDMA_CONF_BENAB);
+ WRT_REG_WORD(®->ddma_cfg, cdma_conf | DDMA_CONF_BENAB);
+ } else {
++ uint16_t cfg1, term;
++
+ /* Set ISP hardware DMA burst */
+- mb[0] = nv->isp_config.c;
++ cfg1 = nv->isp_config.fifo_threshold << 4;
++ cfg1 |= nv->isp_config.burst_enable << 2;
+ /* Enable DMA arbitration on dual channel controllers */
+ if (ha->ports > 1)
+- mb[0] |= BIT_13;
+- WRT_REG_WORD(®->cfg_1, mb[0]);
++ cfg1 |= BIT_13;
++ WRT_REG_WORD(®->cfg_1, cfg1);
+
+ /* Set SCSI termination. */
+- WRT_REG_WORD(®->gpio_enable, (BIT_3 + BIT_2 + BIT_1 + BIT_0));
+- mb[0] = nv->termination.c & (BIT_3 + BIT_2 + BIT_1 + BIT_0);
+- WRT_REG_WORD(®->gpio_data, mb[0]);
++ WRT_REG_WORD(®->gpio_enable,
++ BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
++ term = nv->termination.scsi_bus_1_control;
++ term |= nv->termination.scsi_bus_0_control << 2;
++ term |= nv->termination.auto_term_support << 7;
++ RD_REG_WORD(®->id_l); /* Flush PCI write */
++ WRT_REG_WORD(®->gpio_data, term);
+ }
++ RD_REG_WORD(®->id_l); /* Flush PCI write */
+
+ /* ISP parameter word. */
+ mb[0] = MBC_SET_SYSTEM_PARAMETER;
+@@ -2473,16 +2392,17 @@ qla1280_nvram_config(struct scsi_qla_hos
+
+ /* Firmware feature word. */
+ mb[0] = MBC_SET_FIRMWARE_FEATURES;
+- mask = BIT_5 | BIT_1 | BIT_0;
+- mb[1] = le16_to_cpu(nv->firmware_feature.w) & (mask);
++ mb[1] = nv->firmware_feature.f.enable_fast_posting;
++ mb[1] |= nv->firmware_feature.f.report_lvd_bus_transition << 1;
++ mb[1] |= nv->firmware_feature.f.disable_synchronous_backoff << 5;
+ #if defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_SGI_SN2)
+ if (ia64_platform_is("sn2")) {
+ printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA "
+ "workaround\n", ha->host_no);
+- mb[1] |= BIT_9;
++ mb[1] |= nv->firmware_feature.f.unused_9 << 9; /* XXX */
+ }
+ #endif
+- status |= qla1280_mailbox_command(ha, mask, &mb[0]);
++ status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
+
+ /* Retry count and delay. */
+ mb[0] = MBC_SET_RETRY_COUNT;
+@@ -2511,27 +2431,27 @@ qla1280_nvram_config(struct scsi_qla_hos
+ mb[2] |= BIT_5;
+ if (nv->bus[1].config_2.data_line_active_negation)
+ mb[2] |= BIT_4;
+- status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]);
++ status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb);
+
+ mb[0] = MBC_SET_DATA_OVERRUN_RECOVERY;
+ mb[1] = 2; /* Reset SCSI bus and return all outstanding IO */
+- status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]);
++ status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
+
+ /* thingy */
+ mb[0] = MBC_SET_PCI_CONTROL;
+- mb[1] = 2; /* Data DMA Channel Burst Enable */
+- mb[2] = 2; /* Command DMA Channel Burst Enable */
+- status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]);
++ mb[1] = BIT_1; /* Data DMA Channel Burst Enable */
++ mb[2] = BIT_1; /* Command DMA Channel Burst Enable */
++ status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb);
+
+ mb[0] = MBC_SET_TAG_AGE_LIMIT;
+ mb[1] = 8;
+- status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]);
++ status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
+
+ /* Selection timeout. */
+ mb[0] = MBC_SET_SELECTION_TIMEOUT;
+ mb[1] = nv->bus[0].selection_timeout;
+ mb[2] = nv->bus[1].selection_timeout;
+- status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]);
++ status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb);
+
+ for (bus = 0; bus < ha->ports; bus++)
+ status |= qla1280_config_bus(ha, bus);
+@@ -3042,7 +2962,7 @@ qla1280_64bit_start_scsi(struct scsi_qla
+ struct scsi_cmnd *cmd = sp->cmd;
+ cmd_a64_entry_t *pkt;
+ struct scatterlist *sg = NULL;
+- u32 *dword_ptr;
++ __le32 *dword_ptr;
+ dma_addr_t dma_handle;
+ int status = 0;
+ int cnt;
+@@ -3080,10 +3000,13 @@ qla1280_64bit_start_scsi(struct scsi_qla
+ REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt);
+ }
+
++ dprintk(3, "Number of free entries=(%d) seg_cnt=0x%x\n",
++ ha->req_q_cnt, seg_cnt);
++
+ /* If room for request in request ring. */
+ if ((req_cnt + 2) >= ha->req_q_cnt) {
+ status = 1;
+- dprintk(2, "qla1280_64bit_start_scsi: in-ptr=0x%x req_q_cnt="
++ dprintk(2, "qla1280_start_scsi: in-ptr=0x%x req_q_cnt="
+ "0x%xreq_cnt=0x%x", ha->req_ring_index, ha->req_q_cnt,
+ req_cnt);
+ goto out;
+@@ -3095,7 +3018,7 @@ qla1280_64bit_start_scsi(struct scsi_qla
+
+ if (cnt >= MAX_OUTSTANDING_COMMANDS) {
+ status = 1;
+- dprintk(2, "qla1280_64bit_start_scsi: NO ROOM IN "
++ dprintk(2, "qla1280_start_scsi: NO ROOM IN "
+ "OUTSTANDING ARRAY, req_q_cnt=0x%x", ha->req_q_cnt);
+ goto out;
+ }
+@@ -3104,7 +3027,7 @@ qla1280_64bit_start_scsi(struct scsi_qla
+ ha->req_q_cnt -= req_cnt;
+ CMD_HANDLE(sp->cmd) = (unsigned char *)(unsigned long)(cnt + 1);
+
+- dprintk(2, "64bit_start: cmd=%p sp=%p CDB=%xm, handle %lx\n", cmd, sp,
++ dprintk(2, "start: cmd=%p sp=%p CDB=%xm, handle %lx\n", cmd, sp,
+ cmd->cmnd[0], (long)CMD_HANDLE(sp->cmd));
+ dprintk(2, " bus %i, target %i, lun %i\n",
+ SCSI_BUS_32(cmd), SCSI_TCN_32(cmd), SCSI_LUN_32(cmd));
+@@ -3326,7 +3249,7 @@ qla1280_32bit_start_scsi(struct scsi_qla
+ struct scsi_cmnd *cmd = sp->cmd;
+ struct cmd_entry *pkt;
+ struct scatterlist *sg = NULL;
+- uint32_t *dword_ptr;
++ __le32 *dword_ptr;
+ int status = 0;
+ int cnt;
+ int req_cnt;
+@@ -3969,21 +3892,21 @@ qla1280_get_target_options(struct scsi_c
+ result = cmd->request_buffer;
+ n = &ha->nvram;
+
+- n->bus[bus].target[target].parameter.f.enable_wide = 0;
+- n->bus[bus].target[target].parameter.f.enable_sync = 0;
++ n->bus[bus].target[target].parameter.enable_wide = 0;
++ n->bus[bus].target[target].parameter.enable_sync = 0;
+ n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0;
+
+ if (result[7] & 0x60)
+- n->bus[bus].target[target].parameter.f.enable_wide = 1;
++ n->bus[bus].target[target].parameter.enable_wide = 1;
+ if (result[7] & 0x10)
+- n->bus[bus].target[target].parameter.f.enable_sync = 1;
++ n->bus[bus].target[target].parameter.enable_sync = 1;
+ if ((result[2] >= 3) && (result[4] + 5 > 56) &&
+ (result[56] & 0x4))
+ n->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1;
+
+ dprintk(2, "get_target_options(): wide %i, sync %i, ppr %i\n",
+- n->bus[bus].target[target].parameter.f.enable_wide,
+- n->bus[bus].target[target].parameter.f.enable_sync,
++ n->bus[bus].target[target].parameter.enable_wide,
++ n->bus[bus].target[target].parameter.enable_sync,
+ n->bus[bus].target[target].ppr_1x160.flags.enable_ppr);
+ }
+ #endif
+@@ -4039,8 +3962,8 @@ qla1280_status_entry(struct scsi_qla_hos
+ }
+
+ /* Target busy */
+- if (scsi_status & SS_BUSY_CONDITION &&
+- scsi_status != SS_RESERVE_CONFLICT) {
++ if (scsi_status & SAM_STAT_BUSY &&
++ scsi_status != SAM_STAT_RESERVATION_CONFLICT) {
+ CMD_RESULT(cmd) =
+ DID_BUS_BUSY << 16 | (scsi_status & 0xff);
+ } else {
+@@ -4048,7 +3971,7 @@ qla1280_status_entry(struct scsi_qla_hos
+ /* Save ISP completion status */
+ CMD_RESULT(cmd) = qla1280_return_status(pkt, cmd);
+
+- if (scsi_status & SS_CHECK_CONDITION) {
++ if (scsi_status & SAM_STAT_CHECK_CONDITION) {
+ if (comp_status != CS_ARS_FAILED) {
+ uint16_t req_sense_length =
+ le16_to_cpu(pkt->req_sense_length);
+@@ -4627,7 +4550,7 @@ qla1280_probe_one(struct pci_dev *pdev,
+ if (pci_set_dma_mask(ha->pdev, (dma_addr_t) ~ 0ULL)) {
+ if (pci_set_dma_mask(ha->pdev, 0xffffffff)) {
+ printk(KERN_WARNING "scsi(%li): Unable to set a "
+- " suitable DMA mask - aboring\n", ha->host_no);
++ "suitable DMA mask - aborting\n", ha->host_no);
+ error = -ENODEV;
+ goto error_free_irq;
+ }
+@@ -4637,14 +4560,14 @@ qla1280_probe_one(struct pci_dev *pdev,
+ #else
+ if (pci_set_dma_mask(ha->pdev, 0xffffffff)) {
+ printk(KERN_WARNING "scsi(%li): Unable to set a "
+- " suitable DMA mask - aboring\n", ha->host_no);
++ "suitable DMA mask - aborting\n", ha->host_no);
+ error = -ENODEV;
+ goto error_free_irq;
+ }
+ #endif
+
+ ha->request_ring = pci_alloc_consistent(ha->pdev,
+- ((REQUEST_ENTRY_CNT + 1) * (sizeof(request_t))),
++ ((REQUEST_ENTRY_CNT + 1) * sizeof(request_t)),
+ &ha->request_dma);
+ if (!ha->request_ring) {
+ printk(KERN_INFO "qla1280: Failed to get request memory\n");
+@@ -4652,7 +4575,7 @@ qla1280_probe_one(struct pci_dev *pdev,
+ }
+
+ ha->response_ring = pci_alloc_consistent(ha->pdev,
+- ((RESPONSE_ENTRY_CNT + 1) * (sizeof(struct response))),
++ ((RESPONSE_ENTRY_CNT + 1) * sizeof(struct response)),
+ &ha->response_dma);
+ if (!ha->response_ring) {
+ printk(KERN_INFO "qla1280: Failed to get response memory\n");
+@@ -4735,7 +4658,7 @@ qla1280_probe_one(struct pci_dev *pdev,
+
+ #if LINUX_VERSION_CODE >= 0x020600
+ error_disable_adapter:
+- WRT_REG_WORD(&ha->iobase->ictrl, 0);
++ qla1280_disable_intrs(ha);
+ #endif
+ error_free_irq:
+ free_irq(pdev->irq, ha);
+@@ -4747,11 +4670,11 @@ qla1280_probe_one(struct pci_dev *pdev,
+ #endif
+ error_free_response_ring:
+ pci_free_consistent(ha->pdev,
+- ((RESPONSE_ENTRY_CNT + 1) * (sizeof(struct response))),
++ ((RESPONSE_ENTRY_CNT + 1) * sizeof(struct response)),
+ ha->response_ring, ha->response_dma);
+ error_free_request_ring:
+ pci_free_consistent(ha->pdev,
+- ((REQUEST_ENTRY_CNT + 1) * (sizeof(request_t))),
++ ((REQUEST_ENTRY_CNT + 1) * sizeof(request_t)),
+ ha->request_ring, ha->request_dma);
+ error_put_host:
+ scsi_host_put(host);
+@@ -4772,7 +4695,7 @@ qla1280_remove_one(struct pci_dev *pdev)
+ scsi_remove_host(host);
+ #endif
+
+- WRT_REG_WORD(&ha->iobase->ictrl, 0);
++ qla1280_disable_intrs(ha);
+
+ free_irq(pdev->irq, ha);
+
+diff -urpNX dontdiff linux-2.6.12/drivers/scsi/qla1280.h linux_HEAD/drivers/scsi/qla1280.h
+--- linux-2.6.12/drivers/scsi/qla1280.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/scsi/qla1280.h 2005-07-03 19:45:14.000000000 +0200
+@@ -94,9 +94,6 @@
+ #define REQUEST_ENTRY_CNT 256 /* Number of request entries. */
+ #define RESPONSE_ENTRY_CNT 16 /* Number of response entries. */
+
+-/* Number of segments 1 - 65535 */
+-#define SG_SEGMENTS 32 /* Cmd entry + 6 continuations */
+-
+ /*
+ * SCSI Request Block structure (sp) that is placed
+ * on cmd->SCp location of every I/O
+@@ -378,29 +375,23 @@ struct nvram {
+ uint16_t unused_12; /* 12, 13 */
+ uint16_t unused_14; /* 14, 15 */
+
+- union {
+- uint8_t c;
+- struct {
+- uint8_t reserved:2;
+- uint8_t burst_enable:1;
+- uint8_t reserved_1:1;
+- uint8_t fifo_threshold:4;
+- } f;
++ struct {
++ uint8_t reserved:2;
++ uint8_t burst_enable:1;
++ uint8_t reserved_1:1;
++ uint8_t fifo_threshold:4;
+ } isp_config; /* 16 */
+
+ /* Termination
+ * 0 = Disable, 1 = high only, 3 = Auto term
+ */
+- union {
+- uint8_t c;
+- struct {
+- uint8_t scsi_bus_1_control:2;
+- uint8_t scsi_bus_0_control:2;
+- uint8_t unused_0:1;
+- uint8_t unused_1:1;
+- uint8_t unused_2:1;
+- uint8_t auto_term_support:1;
+- } f;
++ struct {
++ uint8_t scsi_bus_1_control:2;
++ uint8_t scsi_bus_0_control:2;
++ uint8_t unused_0:1;
++ uint8_t unused_1:1;
++ uint8_t unused_2:1;
++ uint8_t auto_term_support:1;
+ } termination; /* 17 */
+
+ uint16_t isp_parameter; /* 18, 19 */
+@@ -460,18 +451,15 @@ struct nvram {
+ uint16_t unused_38; /* 38, 39 */
+
+ struct {
+- union {
+- uint8_t c;
+- struct {
+- uint8_t renegotiate_on_error:1;
+- uint8_t stop_queue_on_check:1;
+- uint8_t auto_request_sense:1;
+- uint8_t tag_queuing:1;
+- uint8_t enable_sync:1;
+- uint8_t enable_wide:1;
+- uint8_t parity_checking:1;
+- uint8_t disconnect_allowed:1;
+- } f;
++ struct {
++ uint8_t renegotiate_on_error:1;
++ uint8_t stop_queue_on_check:1;
++ uint8_t auto_request_sense:1;
++ uint8_t tag_queuing:1;
++ uint8_t enable_sync:1;
++ uint8_t enable_wide:1;
++ uint8_t parity_checking:1;
++ uint8_t disconnect_allowed:1;
+ } parameter; /* 40 */
+
+ uint8_t execution_throttle; /* 41 */
+@@ -528,23 +516,23 @@ struct cmd_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t handle; /* System handle. */
++ __le32 handle; /* System handle. */
+ uint8_t lun; /* SCSI LUN */
+ uint8_t target; /* SCSI ID */
+- uint16_t cdb_len; /* SCSI command length. */
+- uint16_t control_flags; /* Control flags. */
+- uint16_t reserved;
+- uint16_t timeout; /* Command timeout. */
+- uint16_t dseg_count; /* Data segment count. */
++ __le16 cdb_len; /* SCSI command length. */
++ __le16 control_flags; /* Control flags. */
++ __le16 reserved;
++ __le16 timeout; /* Command timeout. */
++ __le16 dseg_count; /* Data segment count. */
+ uint8_t scsi_cdb[MAX_CMDSZ]; /* SCSI command words. */
+- uint32_t dseg_0_address; /* Data segment 0 address. */
+- uint32_t dseg_0_length; /* Data segment 0 length. */
+- uint32_t dseg_1_address; /* Data segment 1 address. */
+- uint32_t dseg_1_length; /* Data segment 1 length. */
+- uint32_t dseg_2_address; /* Data segment 2 address. */
+- uint32_t dseg_2_length; /* Data segment 2 length. */
+- uint32_t dseg_3_address; /* Data segment 3 address. */
+- uint32_t dseg_3_length; /* Data segment 3 length. */
++ __le32 dseg_0_address; /* Data segment 0 address. */
++ __le32 dseg_0_length; /* Data segment 0 length. */
++ __le32 dseg_1_address; /* Data segment 1 address. */
++ __le32 dseg_1_length; /* Data segment 1 length. */
++ __le32 dseg_2_address; /* Data segment 2 address. */
++ __le32 dseg_2_length; /* Data segment 2 length. */
++ __le32 dseg_3_address; /* Data segment 3 address. */
++ __le32 dseg_3_length; /* Data segment 3 length. */
+ };
+
+ /*
+@@ -556,21 +544,21 @@ struct cont_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved; /* Reserved */
+- uint32_t dseg_0_address; /* Data segment 0 address. */
+- uint32_t dseg_0_length; /* Data segment 0 length. */
+- uint32_t dseg_1_address; /* Data segment 1 address. */
+- uint32_t dseg_1_length; /* Data segment 1 length. */
+- uint32_t dseg_2_address; /* Data segment 2 address. */
+- uint32_t dseg_2_length; /* Data segment 2 length. */
+- uint32_t dseg_3_address; /* Data segment 3 address. */
+- uint32_t dseg_3_length; /* Data segment 3 length. */
+- uint32_t dseg_4_address; /* Data segment 4 address. */
+- uint32_t dseg_4_length; /* Data segment 4 length. */
+- uint32_t dseg_5_address; /* Data segment 5 address. */
+- uint32_t dseg_5_length; /* Data segment 5 length. */
+- uint32_t dseg_6_address; /* Data segment 6 address. */
+- uint32_t dseg_6_length; /* Data segment 6 length. */
++ __le32 reserved; /* Reserved */
++ __le32 dseg_0_address; /* Data segment 0 address. */
++ __le32 dseg_0_length; /* Data segment 0 length. */
++ __le32 dseg_1_address; /* Data segment 1 address. */
++ __le32 dseg_1_length; /* Data segment 1 length. */
++ __le32 dseg_2_address; /* Data segment 2 address. */
++ __le32 dseg_2_length; /* Data segment 2 length. */
++ __le32 dseg_3_address; /* Data segment 3 address. */
++ __le32 dseg_3_length; /* Data segment 3 length. */
++ __le32 dseg_4_address; /* Data segment 4 address. */
++ __le32 dseg_4_length; /* Data segment 4 length. */
++ __le32 dseg_5_address; /* Data segment 5 address. */
++ __le32 dseg_5_length; /* Data segment 5 length. */
++ __le32 dseg_6_address; /* Data segment 6 address. */
++ __le32 dseg_6_length; /* Data segment 6 length. */
+ };
+
+ /*
+@@ -586,22 +574,22 @@ struct response {
+ #define RF_FULL BIT_1 /* Full */
+ #define RF_BAD_HEADER BIT_2 /* Bad header. */
+ #define RF_BAD_PAYLOAD BIT_3 /* Bad payload. */
+- uint32_t handle; /* System handle. */
+- uint16_t scsi_status; /* SCSI status. */
+- uint16_t comp_status; /* Completion status. */
+- uint16_t state_flags; /* State flags. */
+-#define SF_TRANSFER_CMPL BIT_14 /* Transfer Complete. */
+-#define SF_GOT_SENSE BIT_13 /* Got Sense */
+-#define SF_GOT_STATUS BIT_12 /* Got Status */
+-#define SF_TRANSFERRED_DATA BIT_11 /* Transferred data */
+-#define SF_SENT_CDB BIT_10 /* Send CDB */
+-#define SF_GOT_TARGET BIT_9 /* */
+-#define SF_GOT_BUS BIT_8 /* */
+- uint16_t status_flags; /* Status flags. */
+- uint16_t time; /* Time. */
+- uint16_t req_sense_length; /* Request sense data length. */
+- uint32_t residual_length; /* Residual transfer length. */
+- uint16_t reserved[4];
++ __le32 handle; /* System handle. */
++ __le16 scsi_status; /* SCSI status. */
++ __le16 comp_status; /* Completion status. */
++ __le16 state_flags; /* State flags. */
++#define SF_TRANSFER_CMPL BIT_14 /* Transfer Complete. */
++#define SF_GOT_SENSE BIT_13 /* Got Sense */
++#define SF_GOT_STATUS BIT_12 /* Got Status */
++#define SF_TRANSFERRED_DATA BIT_11 /* Transferred data */
++#define SF_SENT_CDB BIT_10 /* Send CDB */
++#define SF_GOT_TARGET BIT_9 /* */
++#define SF_GOT_BUS BIT_8 /* */
++ __le16 status_flags; /* Status flags. */
++ __le16 time; /* Time. */
++ __le16 req_sense_length;/* Request sense data length. */
++ __le32 residual_length; /* Residual transfer length. */
++ __le16 reserved[4];
+ uint8_t req_sense_data[32]; /* Request sense data. */
+ };
+
+@@ -614,7 +602,7 @@ struct mrk_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved;
++ __le32 reserved;
+ uint8_t lun; /* SCSI LUN */
+ uint8_t target; /* SCSI ID */
+ uint8_t modifier; /* Modifier (7-0). */
+@@ -638,11 +626,11 @@ struct ecmd_entry {
+ uint32_t handle; /* System handle. */
+ uint8_t lun; /* SCSI LUN */
+ uint8_t target; /* SCSI ID */
+- uint16_t cdb_len; /* SCSI command length. */
+- uint16_t control_flags; /* Control flags. */
+- uint16_t reserved;
+- uint16_t timeout; /* Command timeout. */
+- uint16_t dseg_count; /* Data segment count. */
++ __le16 cdb_len; /* SCSI command length. */
++ __le16 control_flags; /* Control flags. */
++ __le16 reserved;
++ __le16 timeout; /* Command timeout. */
++ __le16 dseg_count; /* Data segment count. */
+ uint8_t scsi_cdb[88]; /* SCSI command words. */
+ };
+
+@@ -655,20 +643,20 @@ typedef struct {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t handle; /* System handle. */
++ __le32 handle; /* System handle. */
+ uint8_t lun; /* SCSI LUN */
+ uint8_t target; /* SCSI ID */
+- uint16_t cdb_len; /* SCSI command length. */
+- uint16_t control_flags; /* Control flags. */
+- uint16_t reserved;
+- uint16_t timeout; /* Command timeout. */
+- uint16_t dseg_count; /* Data segment count. */
++ __le16 cdb_len; /* SCSI command length. */
++ __le16 control_flags; /* Control flags. */
++ __le16 reserved;
++ __le16 timeout; /* Command timeout. */
++ __le16 dseg_count; /* Data segment count. */
+ uint8_t scsi_cdb[MAX_CMDSZ]; /* SCSI command words. */
+- uint32_t reserved_1[2]; /* unused */
+- uint32_t dseg_0_address[2]; /* Data segment 0 address. */
+- uint32_t dseg_0_length; /* Data segment 0 length. */
+- uint32_t dseg_1_address[2]; /* Data segment 1 address. */
+- uint32_t dseg_1_length; /* Data segment 1 length. */
++ __le32 reserved_1[2]; /* unused */
++ __le32 dseg_0_address[2]; /* Data segment 0 address. */
++ __le32 dseg_0_length; /* Data segment 0 length. */
++ __le32 dseg_1_address[2]; /* Data segment 1 address. */
++ __le32 dseg_1_length; /* Data segment 1 length. */
+ } cmd_a64_entry_t, request_t;
+
+ /*
+@@ -680,16 +668,16 @@ struct cont_a64_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t sys_define; /* System defined. */
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t dseg_0_address[2]; /* Data segment 0 address. */
+- uint32_t dseg_0_length; /* Data segment 0 length. */
+- uint32_t dseg_1_address[2]; /* Data segment 1 address. */
+- uint32_t dseg_1_length; /* Data segment 1 length. */
+- uint32_t dseg_2_address[2]; /* Data segment 2 address. */
+- uint32_t dseg_2_length; /* Data segment 2 length. */
+- uint32_t dseg_3_address[2]; /* Data segment 3 address. */
+- uint32_t dseg_3_length; /* Data segment 3 length. */
+- uint32_t dseg_4_address[2]; /* Data segment 4 address. */
+- uint32_t dseg_4_length; /* Data segment 4 length. */
++ __le32 dseg_0_address[2]; /* Data segment 0 address. */
++ __le32 dseg_0_length; /* Data segment 0 length. */
++ __le32 dseg_1_address[2]; /* Data segment 1 address. */
++ __le32 dseg_1_length; /* Data segment 1 length. */
++ __le32 dseg_2_address[2]; /* Data segment 2 address. */
++ __le32 dseg_2_length; /* Data segment 2 length. */
++ __le32 dseg_3_address[2]; /* Data segment 3 address. */
++ __le32 dseg_3_length; /* Data segment 3 length. */
++ __le32 dseg_4_address[2]; /* Data segment 4 address. */
++ __le32 dseg_4_length; /* Data segment 4 length. */
+ };
+
+ /*
+@@ -701,10 +689,10 @@ struct elun_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status not used. */
+- uint32_t reserved_2;
+- uint16_t lun; /* Bit 15 is bus number. */
+- uint16_t reserved_4;
+- uint32_t option_flags;
++ __le32 reserved_2;
++ __le16 lun; /* Bit 15 is bus number. */
++ __le16 reserved_4;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t reserved_5;
+ uint8_t command_count; /* Number of ATIOs allocated. */
+@@ -714,8 +702,8 @@ struct elun_entry {
+ /* commands (2-26). */
+ uint8_t group_7_length; /* SCSI CDB length for group 7 */
+ /* commands (2-26). */
+- uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
+- uint16_t reserved_6[20];
++ __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */
++ __le16 reserved_6[20];
+ };
+
+ /*
+@@ -729,20 +717,20 @@ struct modify_lun_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved_2;
++ __le32 reserved_2;
+ uint8_t lun; /* SCSI LUN */
+ uint8_t reserved_3;
+ uint8_t operators;
+ uint8_t reserved_4;
+- uint32_t option_flags;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t reserved_5;
+ uint8_t command_count; /* Number of ATIOs allocated. */
+ uint8_t immed_notify_count; /* Number of Immediate Notify */
+ /* entries allocated. */
+- uint16_t reserved_6;
+- uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
+- uint16_t reserved_7[20];
++ __le16 reserved_6;
++ __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */
++ __le16 reserved_7[20];
+ };
+
+ /*
+@@ -754,20 +742,20 @@ struct notify_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved_2;
++ __le32 reserved_2;
+ uint8_t lun;
+ uint8_t initiator_id;
+ uint8_t reserved_3;
+ uint8_t target_id;
+- uint32_t option_flags;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t reserved_4;
+ uint8_t tag_value; /* Received queue tag message value */
+ uint8_t tag_type; /* Received queue tag message type */
+ /* entries allocated. */
+- uint16_t seq_id;
++ __le16 seq_id;
+ uint8_t scsi_msg[8]; /* SCSI message not handled by ISP */
+- uint16_t reserved_5[8];
++ __le16 reserved_5[8];
+ uint8_t sense_data[18];
+ };
+
+@@ -780,16 +768,16 @@ struct nack_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved_2;
++ __le32 reserved_2;
+ uint8_t lun;
+ uint8_t initiator_id;
+ uint8_t reserved_3;
+ uint8_t target_id;
+- uint32_t option_flags;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t event;
+- uint16_t seq_id;
+- uint16_t reserved_4[22];
++ __le16 seq_id;
++ __le16 reserved_4[22];
+ };
+
+ /*
+@@ -801,12 +789,12 @@ struct atio_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved_2;
++ __le32 reserved_2;
+ uint8_t lun;
+ uint8_t initiator_id;
+ uint8_t cdb_len;
+ uint8_t target_id;
+- uint32_t option_flags;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t scsi_status;
+ uint8_t tag_value; /* Received queue tag message value */
+@@ -824,28 +812,28 @@ struct ctio_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved_2;
++ __le32 reserved_2;
+ uint8_t lun; /* SCSI LUN */
+ uint8_t initiator_id;
+ uint8_t reserved_3;
+ uint8_t target_id;
+- uint32_t option_flags;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t scsi_status;
+ uint8_t tag_value; /* Received queue tag message value */
+ uint8_t tag_type; /* Received queue tag message type */
+- uint32_t transfer_length;
+- uint32_t residual;
+- uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
+- uint16_t dseg_count; /* Data segment count. */
+- uint32_t dseg_0_address; /* Data segment 0 address. */
+- uint32_t dseg_0_length; /* Data segment 0 length. */
+- uint32_t dseg_1_address; /* Data segment 1 address. */
+- uint32_t dseg_1_length; /* Data segment 1 length. */
+- uint32_t dseg_2_address; /* Data segment 2 address. */
+- uint32_t dseg_2_length; /* Data segment 2 length. */
+- uint32_t dseg_3_address; /* Data segment 3 address. */
+- uint32_t dseg_3_length; /* Data segment 3 length. */
++ __le32 transfer_length;
++ __le32 residual;
++ __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */
++ __le16 dseg_count; /* Data segment count. */
++ __le32 dseg_0_address; /* Data segment 0 address. */
++ __le32 dseg_0_length; /* Data segment 0 length. */
++ __le32 dseg_1_address; /* Data segment 1 address. */
++ __le32 dseg_1_length; /* Data segment 1 length. */
++ __le32 dseg_2_address; /* Data segment 2 address. */
++ __le32 dseg_2_length; /* Data segment 2 length. */
++ __le32 dseg_3_address; /* Data segment 3 address. */
++ __le32 dseg_3_length; /* Data segment 3 length. */
+ };
+
+ /*
+@@ -857,24 +845,24 @@ struct ctio_ret_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved_2;
++ __le32 reserved_2;
+ uint8_t lun; /* SCSI LUN */
+ uint8_t initiator_id;
+ uint8_t reserved_3;
+ uint8_t target_id;
+- uint32_t option_flags;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t scsi_status;
+ uint8_t tag_value; /* Received queue tag message value */
+ uint8_t tag_type; /* Received queue tag message type */
+- uint32_t transfer_length;
+- uint32_t residual;
+- uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
+- uint16_t dseg_count; /* Data segment count. */
+- uint32_t dseg_0_address; /* Data segment 0 address. */
+- uint32_t dseg_0_length; /* Data segment 0 length. */
+- uint32_t dseg_1_address; /* Data segment 1 address. */
+- uint16_t dseg_1_length; /* Data segment 1 length. */
++ __le32 transfer_length;
++ __le32 residual;
++ __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */
++ __le16 dseg_count; /* Data segment count. */
++ __le32 dseg_0_address; /* Data segment 0 address. */
++ __le32 dseg_0_length; /* Data segment 0 length. */
++ __le32 dseg_1_address; /* Data segment 1 address. */
++ __le16 dseg_1_length; /* Data segment 1 length. */
+ uint8_t sense_data[18];
+ };
+
+@@ -887,25 +875,25 @@ struct ctio_a64_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved_2;
++ __le32 reserved_2;
+ uint8_t lun; /* SCSI LUN */
+ uint8_t initiator_id;
+ uint8_t reserved_3;
+ uint8_t target_id;
+- uint32_t option_flags;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t scsi_status;
+ uint8_t tag_value; /* Received queue tag message value */
+ uint8_t tag_type; /* Received queue tag message type */
+- uint32_t transfer_length;
+- uint32_t residual;
+- uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
+- uint16_t dseg_count; /* Data segment count. */
+- uint32_t reserved_4[2];
+- uint32_t dseg_0_address[2]; /* Data segment 0 address. */
+- uint32_t dseg_0_length; /* Data segment 0 length. */
+- uint32_t dseg_1_address[2]; /* Data segment 1 address. */
+- uint32_t dseg_1_length; /* Data segment 1 length. */
++ __le32 transfer_length;
++ __le32 residual;
++ __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */
++ __le16 dseg_count; /* Data segment count. */
++ __le32 reserved_4[2];
++ __le32 dseg_0_address[2];/* Data segment 0 address. */
++ __le32 dseg_0_length; /* Data segment 0 length. */
++ __le32 dseg_1_address[2];/* Data segment 1 address. */
++ __le32 dseg_1_length; /* Data segment 1 length. */
+ };
+
+ /*
+@@ -917,21 +905,21 @@ struct ctio_a64_ret_entry {
+ uint8_t entry_count; /* Entry count. */
+ uint8_t reserved_1;
+ uint8_t entry_status; /* Entry Status. */
+- uint32_t reserved_2;
++ __le32 reserved_2;
+ uint8_t lun; /* SCSI LUN */
+ uint8_t initiator_id;
+ uint8_t reserved_3;
+ uint8_t target_id;
+- uint32_t option_flags;
++ __le32 option_flags;
+ uint8_t status;
+ uint8_t scsi_status;
+ uint8_t tag_value; /* Received queue tag message value */
+ uint8_t tag_type; /* Received queue tag message type */
+- uint32_t transfer_length;
+- uint32_t residual;
+- uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */
+- uint16_t dseg_count; /* Data segment count. */
+- uint16_t reserved_4[7];
++ __le32 transfer_length;
++ __le32 residual;
++ __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */
++ __le16 dseg_count; /* Data segment count. */
++ __le16 reserved_4[7];
+ uint8_t sense_data[18];
+ };
+
+@@ -979,14 +967,6 @@ struct ctio_a64_ret_entry {
+ #define CS_RETRY 0x82 /* Driver defined */
+
+ /*
+- * ISP status entry - SCSI status byte bit definitions.
+- */
+-#define SS_CHECK_CONDITION BIT_1
+-#define SS_CONDITION_MET BIT_2
+-#define SS_BUSY_CONDITION BIT_3
+-#define SS_RESERVE_CONFLICT (BIT_4 | BIT_3)
+-
+-/*
+ * ISP target entries - Option flags bit definitions.
+ */
+ #define OF_ENABLE_TAG BIT_1 /* Tagged queue action enable */
+@@ -1082,10 +1062,6 @@ struct scsi_qla_host {
+ uint32_t reset_active:1; /* 3 */
+ uint32_t abort_isp_active:1; /* 4 */
+ uint32_t disable_risc_code_load:1; /* 5 */
+- uint32_t enable_64bit_addressing:1; /* 6 */
+- uint32_t in_reset:1; /* 7 */
+- uint32_t ints_enabled:1;
+- uint32_t ignore_nvram:1;
+ #ifdef __ia64__
+ uint32_t use_pci_vchannel:1;
+ #endif
+diff -urpNX dontdiff linux-2.6.12/drivers/scsi/sgiwd93.c linux_HEAD/drivers/scsi/sgiwd93.c
+--- linux-2.6.12/drivers/scsi/sgiwd93.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/scsi/sgiwd93.c 2005-04-12 14:34:50.000000000 +0200
+@@ -33,7 +33,6 @@
+ #include "scsi.h"
+ #include <scsi/scsi_host.h>
+ #include "wd33c93.h"
+-#include "sgiwd93.h"
+
+ #include <linux/stat.h>
+
+@@ -320,7 +319,6 @@ static int sgiwd93_bus_reset(Scsi_Cmnd *
+ * on 64-bit systems with memory outside the compat address spaces.
+ */
+ static Scsi_Host_Template driver_template = {
+- .proc_name = "SGIWD93",
+ .name = "SGI WD93",
+ .detect = sgiwd93_detect,
+ .release = sgiwd93_release,
+@@ -328,10 +326,12 @@ static Scsi_Host_Template driver_templat
+ .eh_abort_handler = wd33c93_abort,
+ .eh_bus_reset_handler = sgiwd93_bus_reset,
+ .eh_host_reset_handler = wd33c93_host_reset,
+- .can_queue = CAN_QUEUE,
++ .proc_info = wd33c93_proc_info,
++ .proc_name = "SGIWD93",
++ .can_queue = 16,
+ .this_id = 7,
+ .sg_tablesize = SG_ALL,
+- .cmd_per_lun = CMD_PER_LUN,
++ .cmd_per_lun = 8,
+ .use_clustering = DISABLE_CLUSTERING,
+ };
+ #include "scsi_module.c"
+diff -urpNX dontdiff linux-2.6.12/drivers/scsi/sgiwd93.h linux_HEAD/drivers/scsi/sgiwd93.h
+--- linux-2.6.12/drivers/scsi/sgiwd93.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/scsi/sgiwd93.h 1970-01-01 01:00:00.000000000 +0100
+@@ -1,24 +0,0 @@
+-/* $Id: sgiwd93.h,v 1.5 1998/08/25 09:18:50 ralf Exp $
+- * sgiwd93.h: SGI WD93 scsi definitions.
+- *
+- * Copyright (C) 1996 David S. Miller (dm at engr.sgi.com)
+- */
+-#ifndef _SGIWD93_H
+-#define _SGIWD93_H
+-
+-#ifndef CMD_PER_LUN
+-#define CMD_PER_LUN 8
+-#endif
+-
+-#ifndef CAN_QUEUE
+-#define CAN_QUEUE 16
+-#endif
+-
+-int sgiwd93_detect(Scsi_Host_Template *);
+-int sgiwd93_release(struct Scsi_Host *instance);
+-const char *wd33c93_info(void);
+-int wd33c93_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
+-int wd33c93_abort(Scsi_Cmnd *);
+-int wd33c93_host_reset(Scsi_Cmnd * SCpnt);
+-
+-#endif /* !(_SGIWD93_H) */
+diff -urpNX dontdiff linux-2.6.12/drivers/scsi/sym53c8xx_defs.h linux_HEAD/drivers/scsi/sym53c8xx_defs.h
+--- linux-2.6.12/drivers/scsi/sym53c8xx_defs.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/scsi/sym53c8xx_defs.h 2005-04-08 22:41:10.000000000 +0200
+@@ -314,9 +314,19 @@
+ #define writew_b2l __raw_writew
+ #define writel_b2l __raw_writel
+ #define readw_raw __raw_readw
+-#define readl_raw __raw_readl
++#define readl_raw(a) __raw_readl((unsigned long)(a))
#define writew_raw __raw_writew
- #define writel_raw(v,a) __raw_writel(v,(unsigned long)(a))
+-#define writel_raw __raw_writel
++#define writel_raw(v,a) __raw_writel(v,(unsigned long)(a))
+#else /* Other big-endian */
+#elif defined(__mips__)
+#define readw_l2b readw
@@ -38965,9 +61063,18 @@
#else /* Other big-endian */
#define readw_l2b readw
#define readl_l2b readl
-diff -urpNX dontdiff linux-2.6.11.6/drivers/serial/au1x00_uart.c linux_HEAD/drivers/serial/au1x00_uart.c
---- linux-2.6.11.6/drivers/serial/au1x00_uart.c 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/drivers/serial/au1x00_uart.c 2004-11-19 01:14:46.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/serial/Makefile linux_HEAD/drivers/serial/Makefile
+--- linux-2.6.12/drivers/serial/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/serial/Makefile 2005-04-08 20:58:25.000000000 +0200
+@@ -50,5 +50,4 @@ obj-$(CONFIG_SERIAL_MPSC) += mpsc.o
+ obj-$(CONFIG_ETRAX_SERIAL) += crisv10.o
+ obj-$(CONFIG_SERIAL_JSM) += jsm/
+ obj-$(CONFIG_SERIAL_TXX9) += serial_txx9.o
+-obj-$(CONFIG_SERIAL_VR41XX) += vr41xx_siu.o
+ obj-$(CONFIG_BLK_DEV_SGIIOC4) += ioc4_serial.o
+diff -urpNX dontdiff linux-2.6.12/drivers/serial/au1x00_uart.c linux_HEAD/drivers/serial/au1x00_uart.c
+--- linux-2.6.12/drivers/serial/au1x00_uart.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/serial/au1x00_uart.c 2005-07-01 12:10:00.000000000 +0200
@@ -67,30 +67,7 @@
#define is_real_interrupt(irq) ((irq) != 0)
@@ -39000,7 +61107,7 @@
};
#define UART_NR ARRAY_SIZE(old_serial_port)
-@@ -801,7 +778,6 @@ serial8250_set_termios(struct uart_port
+@@ -803,7 +780,6 @@ serial8250_set_termios(struct uart_port
*/
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
quot = serial8250_get_divisor(port, baud);
@@ -39008,7 +61115,15 @@
/*
* Work around a bug in the Oxford Semiconductor 952 rev B
-@@ -1069,7 +1045,7 @@ static void __init serial8250_isa_init_p
+@@ -869,6 +845,7 @@ serial8250_set_termios(struct uart_port
+
+ serial_out(up, UART_IER, up->ier);
+ serial_outp(up, 0x28, quot & 0xffff);
++ serial_out(up, UART_LCR, cval); /* reset DLAB */
+ up->lcr = cval; /* Save LCR */
+ if (up->port.type != PORT_16750) {
+ if (fcr & UART_FCR_ENABLE_FIFO) {
+@@ -1071,7 +1048,7 @@ static void __init serial8250_isa_init_p
i++, up++) {
up->port.iobase = old_serial_port[i].port;
up->port.irq = old_serial_port[i].irq;
@@ -39017,9 +61132,53 @@
up->port.flags = old_serial_port[i].flags;
up->port.hub6 = old_serial_port[i].hub6;
up->port.membase = old_serial_port[i].iomem_base;
-diff -urpNX dontdiff linux-2.6.11.6/drivers/serial/serial_txx9.c linux_HEAD/drivers/serial/serial_txx9.c
---- linux-2.6.11.6/drivers/serial/serial_txx9.c 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/drivers/serial/serial_txx9.c 2005-03-04 18:24:33.000000000 +0100
+@@ -1209,7 +1186,7 @@ static int __init serial8250_console_set
+ return uart_set_options(port, co, baud, parity, bits, flow);
+ }
+
+-extern struct uart_driver serial8250_reg;
++static struct uart_driver serial8250_reg;
+ static struct console serial8250_console = {
+ .name = "ttyS",
+ .write = serial8250_console_write,
+diff -urpNX dontdiff linux-2.6.12/drivers/serial/dz.c linux_HEAD/drivers/serial/dz.c
+--- linux-2.6.12/drivers/serial/dz.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/serial/dz.c 2005-07-03 16:44:33.000000000 +0200
+@@ -645,9 +645,9 @@ static void __init dz_init_ports(void)
+
+ if (mips_machtype == MACH_DS23100 ||
+ mips_machtype == MACH_DS5100)
+- base = (unsigned long) KN01_DZ11_BASE;
++ base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11);
+ else
+- base = (unsigned long) KN02_DZ11_BASE;
++ base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11);
+
+ for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
+ spin_lock_init(&dport->port.lock);
+diff -urpNX dontdiff linux-2.6.12/drivers/serial/ip22zilog.c linux_HEAD/drivers/serial/ip22zilog.c
+--- linux-2.6.12/drivers/serial/ip22zilog.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/serial/ip22zilog.c 2005-04-17 05:59:54.000000000 +0200
+@@ -881,6 +881,7 @@ ip22zilog_set_termios(struct uart_port *
+ up->cflag = termios->c_cflag;
+
+ ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port));
++ uart_update_timeout(port, termios->c_cflag, baud);
+
+ spin_unlock_irqrestore(&up->port.lock, flags);
+ }
+@@ -1047,6 +1048,8 @@ ip22serial_console_termios(struct consol
+ }
+
+ con->cflag = cflag | CS8; /* 8N1 */
++
++ uart_update_timeout(&ip22zilog_port_table[con->index].port, cflag, baud);
+ }
+
+ static int __init ip22zilog_console_setup(struct console *con, char *options)
+diff -urpNX dontdiff linux-2.6.12/drivers/serial/serial_txx9.c linux_HEAD/drivers/serial/serial_txx9.c
+--- linux-2.6.12/drivers/serial/serial_txx9.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/serial/serial_txx9.c 2005-07-01 12:10:01.000000000 +0200
@@ -31,6 +31,7 @@
* 1.01 Set fifosize to make tx_empry called properly.
* Use standard uart_get_divisor.
@@ -39050,7 +61209,7 @@
/* If this failed then we will throw away the
bytes but must do so to clear interrupts */
}
-@@ -365,7 +369,9 @@ receive_chars(struct uart_txx9_port *up,
+@@ -356,7 +360,9 @@ receive_chars(struct uart_txx9_port *up,
ignore_char:
disr = sio_in(up, TXX9_SIDISR);
} while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
@@ -39060,9 +61219,1929 @@
*status = disr;
}
-diff -urpNX dontdiff linux-2.6.11.6/drivers/usb/gadget/net2280.c linux_HEAD/drivers/usb/gadget/net2280.c
---- linux-2.6.11.6/drivers/usb/gadget/net2280.c 2005-04-03 00:12:27.000000000 +0200
-+++ linux_HEAD/drivers/usb/gadget/net2280.c 2005-03-21 20:04:39.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/serial/vr41xx_siu.c linux_HEAD/drivers/serial/vr41xx_siu.c
+--- linux-2.6.12/drivers/serial/vr41xx_siu.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/serial/vr41xx_siu.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,1050 +0,0 @@
+-/*
+- * Driver for NEC VR4100 series Serial Interface Unit.
+- *
+- * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
+- *
+- * Based on drivers/serial/8250.c, by Russell King.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+- */
+-#include <linux/config.h>
+-
+-#if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+-#define SUPPORT_SYSRQ
+-#endif
+-
+-#include <linux/console.h>
+-#include <linux/device.h>
+-#include <linux/err.h>
+-#include <linux/ioport.h>
+-#include <linux/init.h>
+-#include <linux/interrupt.h>
+-#include <linux/module.h>
+-#include <linux/serial.h>
+-#include <linux/serial_core.h>
+-#include <linux/serial_reg.h>
+-#include <linux/tty.h>
+-#include <linux/tty_flip.h>
+-
+-#include <asm/io.h>
+-#include <asm/vr41xx/siu.h>
+-#include <asm/vr41xx/vr41xx.h>
+-
+-#define SIU_PORTS_MAX 2
+-#define SIU_BAUD_BASE 1152000
+-#define SIU_MAJOR 204
+-#define SIU_MINOR_BASE 82
+-
+-#define RX_MAX_COUNT 256
+-#define TX_MAX_COUNT 15
+-
+-#define SIUIRSEL 0x08
+- #define TMICMODE 0x20
+- #define TMICTX 0x10
+- #define IRMSEL 0x0c
+- #define IRMSEL_HP 0x08
+- #define IRMSEL_TEMIC 0x04
+- #define IRMSEL_SHARP 0x00
+- #define IRUSESEL 0x02
+- #define SIRSEL 0x01
+-
+-struct siu_port {
+- unsigned int type;
+- unsigned int irq;
+- unsigned long start;
+-};
+-
+-static const struct siu_port siu_type1_ports[] = {
+- { .type = PORT_VR41XX_SIU,
+- .irq = SIU_IRQ,
+- .start = 0x0c000000UL, },
+-};
+-
+-#define SIU_TYPE1_NR_PORTS (sizeof(siu_type1_ports) / sizeof(struct siu_port))
+-
+-static const struct siu_port siu_type2_ports[] = {
+- { .type = PORT_VR41XX_SIU,
+- .irq = SIU_IRQ,
+- .start = 0x0f000800UL, },
+- { .type = PORT_VR41XX_DSIU,
+- .irq = DSIU_IRQ,
+- .start = 0x0f000820UL, },
+-};
+-
+-#define SIU_TYPE2_NR_PORTS (sizeof(siu_type2_ports) / sizeof(struct siu_port))
+-
+-static struct uart_port siu_uart_ports[SIU_PORTS_MAX];
+-static uint8_t lsr_break_flag[SIU_PORTS_MAX];
+-
+-#define siu_read(port, offset) readb((port)->membase + (offset))
+-#define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
+-
+-void vr41xx_select_siu_interface(siu_interface_t interface)
+-{
+- struct uart_port *port;
+- unsigned long flags;
+- uint8_t irsel;
+-
+- port = &siu_uart_ports[0];
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- irsel = siu_read(port, SIUIRSEL);
+- if (interface == SIU_INTERFACE_IRDA)
+- irsel |= SIRSEL;
+- else
+- irsel &= ~SIRSEL;
+- siu_write(port, SIUIRSEL, irsel);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
+-
+-void vr41xx_use_irda(irda_use_t use)
+-{
+- struct uart_port *port;
+- unsigned long flags;
+- uint8_t irsel;
+-
+- port = &siu_uart_ports[0];
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- irsel = siu_read(port, SIUIRSEL);
+- if (use == FIR_USE_IRDA)
+- irsel |= IRUSESEL;
+- else
+- irsel &= ~IRUSESEL;
+- siu_write(port, SIUIRSEL, irsel);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-EXPORT_SYMBOL_GPL(vr41xx_use_irda);
+-
+-void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
+-{
+- struct uart_port *port;
+- unsigned long flags;
+- uint8_t irsel;
+-
+- port = &siu_uart_ports[0];
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- irsel = siu_read(port, SIUIRSEL);
+- irsel &= ~(IRMSEL | TMICTX | TMICMODE);
+- switch (module) {
+- case SHARP_IRDA:
+- irsel |= IRMSEL_SHARP;
+- break;
+- case TEMIC_IRDA:
+- irsel |= IRMSEL_TEMIC | TMICMODE;
+- if (speed == IRDA_TX_4MBPS)
+- irsel |= TMICTX;
+- break;
+- case HP_IRDA:
+- irsel |= IRMSEL_HP;
+- break;
+- default:
+- break;
+- }
+- siu_write(port, SIUIRSEL, irsel);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
+-
+-static inline void siu_clear_fifo(struct uart_port *port)
+-{
+- siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
+- siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
+- UART_FCR_CLEAR_XMIT);
+- siu_write(port, UART_FCR, 0);
+-}
+-
+-static inline int siu_probe_ports(void)
+-{
+- switch (current_cpu_data.cputype) {
+- case CPU_VR4111:
+- case CPU_VR4121:
+- return SIU_TYPE1_NR_PORTS;
+- case CPU_VR4122:
+- case CPU_VR4131:
+- case CPU_VR4133:
+- return SIU_TYPE2_NR_PORTS;
+- }
+-
+- return 0;
+-}
+-
+-static inline unsigned long siu_port_size(struct uart_port *port)
+-{
+- switch (port->type) {
+- case PORT_VR41XX_SIU:
+- return 11UL;
+- case PORT_VR41XX_DSIU:
+- return 8UL;
+- }
+-
+- return 0;
+-}
+-
+-static inline unsigned int siu_check_type(struct uart_port *port)
+-{
+- switch (current_cpu_data.cputype) {
+- case CPU_VR4111:
+- case CPU_VR4121:
+- if (port->line == 0)
+- return PORT_VR41XX_SIU;
+- break;
+- case CPU_VR4122:
+- case CPU_VR4131:
+- case CPU_VR4133:
+- if (port->line == 0)
+- return PORT_VR41XX_SIU;
+- else if (port->line == 1)
+- return PORT_VR41XX_DSIU;
+- break;
+- }
+-
+- return PORT_UNKNOWN;
+-}
+-
+-static inline const char *siu_type_name(struct uart_port *port)
+-{
+- switch (port->type) {
+- case PORT_VR41XX_SIU:
+- return "SIU";
+- case PORT_VR41XX_DSIU:
+- return "DSIU";
+- }
+-
+- return NULL;
+-}
+-
+-static unsigned int siu_tx_empty(struct uart_port *port)
+-{
+- uint8_t lsr;
+-
+- lsr = siu_read(port, UART_LSR);
+- if (lsr & UART_LSR_TEMT)
+- return TIOCSER_TEMT;
+-
+- return 0;
+-}
+-
+-static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
+-{
+- uint8_t mcr = 0;
+-
+- if (mctrl & TIOCM_DTR)
+- mcr |= UART_MCR_DTR;
+- if (mctrl & TIOCM_RTS)
+- mcr |= UART_MCR_RTS;
+- if (mctrl & TIOCM_OUT1)
+- mcr |= UART_MCR_OUT1;
+- if (mctrl & TIOCM_OUT2)
+- mcr |= UART_MCR_OUT2;
+- if (mctrl & TIOCM_LOOP)
+- mcr |= UART_MCR_LOOP;
+-
+- siu_write(port, UART_MCR, mcr);
+-}
+-
+-static unsigned int siu_get_mctrl(struct uart_port *port)
+-{
+- uint8_t msr;
+- unsigned int mctrl = 0;
+-
+- msr = siu_read(port, UART_MSR);
+- if (msr & UART_MSR_DCD)
+- mctrl |= TIOCM_CAR;
+- if (msr & UART_MSR_RI)
+- mctrl |= TIOCM_RNG;
+- if (msr & UART_MSR_DSR)
+- mctrl |= TIOCM_DSR;
+- if (msr & UART_MSR_CTS)
+- mctrl |= TIOCM_CTS;
+-
+- return mctrl;
+-}
+-
+-static void siu_stop_tx(struct uart_port *port, unsigned int tty_stop)
+-{
+- unsigned long flags;
+- uint8_t ier;
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- ier = siu_read(port, UART_IER);
+- ier &= ~UART_IER_THRI;
+- siu_write(port, UART_IER, ier);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-static void siu_start_tx(struct uart_port *port, unsigned int tty_start)
+-{
+- unsigned long flags;
+- uint8_t ier;
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- ier = siu_read(port, UART_IER);
+- ier |= UART_IER_THRI;
+- siu_write(port, UART_IER, ier);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-static void siu_stop_rx(struct uart_port *port)
+-{
+- unsigned long flags;
+- uint8_t ier;
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- ier = siu_read(port, UART_IER);
+- ier &= ~UART_IER_RLSI;
+- siu_write(port, UART_IER, ier);
+-
+- port->read_status_mask &= ~UART_LSR_DR;
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-static void siu_enable_ms(struct uart_port *port)
+-{
+- unsigned long flags;
+- uint8_t ier;
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- ier = siu_read(port, UART_IER);
+- ier |= UART_IER_MSI;
+- siu_write(port, UART_IER, ier);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-static void siu_break_ctl(struct uart_port *port, int ctl)
+-{
+- unsigned long flags;
+- uint8_t lcr;
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- lcr = siu_read(port, UART_LCR);
+- if (ctl == -1)
+- lcr |= UART_LCR_SBC;
+- else
+- lcr &= ~UART_LCR_SBC;
+- siu_write(port, UART_LCR, lcr);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-static inline void receive_chars(struct uart_port *port, uint8_t *status,
+- struct pt_regs *regs)
+-{
+- struct tty_struct *tty;
+- uint8_t lsr, ch;
+- char flag;
+- int max_count = RX_MAX_COUNT;
+-
+- tty = port->info->tty;
+- lsr = *status;
+-
+- do {
+- if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
+- if (tty->low_latency)
+- tty_flip_buffer_push(tty);
+- }
+-
+- ch = siu_read(port, UART_RX);
+- port->icount.rx++;
+- flag = TTY_NORMAL;
+-
+-#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
+- lsr |= lsr_break_flag[port->line];
+- lsr_break_flag[port->line] = 0;
+-#endif
+- if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
+- UART_LSR_PE | UART_LSR_OE))) {
+- if (lsr & UART_LSR_BI) {
+- lsr &= ~(UART_LSR_FE | UART_LSR_PE);
+- port->icount.brk++;
+-
+- if (uart_handle_break(port))
+- goto ignore_char;
+- }
+-
+- if (lsr & UART_LSR_FE)
+- port->icount.frame++;
+- if (lsr & UART_LSR_PE)
+- port->icount.parity++;
+- if (lsr & UART_LSR_OE)
+- port->icount.overrun++;
+-
+- lsr &= port->read_status_mask;
+- if (lsr & UART_LSR_BI)
+- flag = TTY_BREAK;
+- if (lsr & UART_LSR_FE)
+- flag = TTY_FRAME;
+- if (lsr & UART_LSR_PE)
+- flag = TTY_PARITY;
+- }
+-
+- if (uart_handle_sysrq_char(port, ch, regs))
+- goto ignore_char;
+-
+- uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
+-
+- ignore_char:
+- lsr = siu_read(port, UART_LSR);
+- } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
+-
+- tty_flip_buffer_push(tty);
+-
+- *status = lsr;
+-}
+-
+-static inline void check_modem_status(struct uart_port *port)
+-{
+- uint8_t msr;
+-
+- msr = siu_read(port, UART_MSR);
+- if ((msr & UART_MSR_ANY_DELTA) == 0)
+- return;
+- if (msr & UART_MSR_DDCD)
+- uart_handle_dcd_change(port, msr & UART_MSR_DCD);
+- if (msr & UART_MSR_TERI)
+- port->icount.rng++;
+- if (msr & UART_MSR_DDSR)
+- port->icount.dsr++;
+- if (msr & UART_MSR_DCTS)
+- uart_handle_cts_change(port, msr & UART_MSR_CTS);
+-
+- wake_up_interruptible(&port->info->delta_msr_wait);
+-}
+-
+-static inline void transmit_chars(struct uart_port *port)
+-{
+- struct circ_buf *xmit;
+- int max_count = TX_MAX_COUNT;
+-
+- xmit = &port->info->xmit;
+-
+- if (port->x_char) {
+- siu_write(port, UART_TX, port->x_char);
+- port->icount.tx++;
+- port->x_char = 0;
+- return;
+- }
+-
+- if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+- siu_stop_tx(port, 0);
+- return;
+- }
+-
+- do {
+- siu_write(port, UART_TX, xmit->buf[xmit->tail]);
+- xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+- port->icount.tx++;
+- if (uart_circ_empty(xmit))
+- break;
+- } while (max_count-- > 0);
+-
+- if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+- uart_write_wakeup(port);
+-
+- if (uart_circ_empty(xmit))
+- siu_stop_tx(port, 0);
+-}
+-
+-static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+-{
+- struct uart_port *port;
+- uint8_t iir, lsr;
+-
+- port = (struct uart_port *)dev_id;
+-
+- iir = siu_read(port, UART_IIR);
+- if (iir & UART_IIR_NO_INT)
+- return IRQ_NONE;
+-
+- lsr = siu_read(port, UART_LSR);
+- if (lsr & UART_LSR_DR)
+- receive_chars(port, &lsr, regs);
+-
+- check_modem_status(port);
+-
+- if (lsr & UART_LSR_THRE)
+- transmit_chars(port);
+-
+- return IRQ_HANDLED;
+-}
+-
+-static int siu_startup(struct uart_port *port)
+-{
+- int retval;
+-
+- if (port->membase == NULL)
+- return -ENODEV;
+-
+- siu_clear_fifo(port);
+-
+- (void)siu_read(port, UART_LSR);
+- (void)siu_read(port, UART_RX);
+- (void)siu_read(port, UART_IIR);
+- (void)siu_read(port, UART_MSR);
+-
+- if (siu_read(port, UART_LSR) == 0xff)
+- return -ENODEV;
+-
+- retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
+- if (retval)
+- return retval;
+-
+- if (port->type == PORT_VR41XX_DSIU)
+- vr41xx_enable_dsiuint(DSIUINT_ALL);
+-
+- siu_write(port, UART_LCR, UART_LCR_WLEN8);
+-
+- spin_lock_irq(&port->lock);
+- siu_set_mctrl(port, port->mctrl);
+- spin_unlock_irq(&port->lock);
+-
+- siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
+-
+- (void)siu_read(port, UART_LSR);
+- (void)siu_read(port, UART_RX);
+- (void)siu_read(port, UART_IIR);
+- (void)siu_read(port, UART_MSR);
+-
+- return 0;
+-}
+-
+-static void siu_shutdown(struct uart_port *port)
+-{
+- unsigned long flags;
+- uint8_t lcr;
+-
+- siu_write(port, UART_IER, 0);
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- port->mctrl &= ~TIOCM_OUT2;
+- siu_set_mctrl(port, port->mctrl);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-
+- lcr = siu_read(port, UART_LCR);
+- lcr &= ~UART_LCR_SBC;
+- siu_write(port, UART_LCR, lcr);
+-
+- siu_clear_fifo(port);
+-
+- (void)siu_read(port, UART_RX);
+-
+- if (port->type == PORT_VR41XX_DSIU)
+- vr41xx_disable_dsiuint(DSIUINT_ALL);
+-
+- free_irq(port->irq, port);
+-}
+-
+-static void siu_set_termios(struct uart_port *port, struct termios *new,
+- struct termios *old)
+-{
+- tcflag_t c_cflag, c_iflag;
+- uint8_t lcr, fcr, ier;
+- unsigned int baud, quot;
+- unsigned long flags;
+-
+- c_cflag = new->c_cflag;
+- switch (c_cflag & CSIZE) {
+- case CS5:
+- lcr = UART_LCR_WLEN5;
+- break;
+- case CS6:
+- lcr = UART_LCR_WLEN6;
+- break;
+- case CS7:
+- lcr = UART_LCR_WLEN7;
+- break;
+- default:
+- lcr = UART_LCR_WLEN8;
+- break;
+- }
+-
+- if (c_cflag & CSTOPB)
+- lcr |= UART_LCR_STOP;
+- if (c_cflag & PARENB)
+- lcr |= UART_LCR_PARITY;
+- if ((c_cflag & PARODD) != PARODD)
+- lcr |= UART_LCR_EPAR;
+- if (c_cflag & CMSPAR)
+- lcr |= UART_LCR_SPAR;
+-
+- baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
+- quot = uart_get_divisor(port, baud);
+-
+- fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
+-
+- spin_lock_irqsave(&port->lock, flags);
+-
+- uart_update_timeout(port, c_cflag, baud);
+-
+- c_iflag = new->c_iflag;
+-
+- port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
+- if (c_iflag & INPCK)
+- port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
+- if (c_iflag & (BRKINT | PARMRK))
+- port->read_status_mask |= UART_LSR_BI;
+-
+- port->ignore_status_mask = 0;
+- if (c_iflag & IGNPAR)
+- port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
+- if (c_iflag & IGNBRK) {
+- port->ignore_status_mask |= UART_LSR_BI;
+- if (c_iflag & IGNPAR)
+- port->ignore_status_mask |= UART_LSR_OE;
+- }
+-
+- if ((c_cflag & CREAD) == 0)
+- port->ignore_status_mask |= UART_LSR_DR;
+-
+- ier = siu_read(port, UART_IER);
+- ier &= ~UART_IER_MSI;
+- if (UART_ENABLE_MS(port, c_cflag))
+- ier |= UART_IER_MSI;
+- siu_write(port, UART_IER, ier);
+-
+- siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
+-
+- siu_write(port, UART_DLL, (uint8_t)quot);
+- siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
+-
+- siu_write(port, UART_LCR, lcr);
+-
+- siu_write(port, UART_FCR, fcr);
+-
+- siu_set_mctrl(port, port->mctrl);
+-
+- spin_unlock_irqrestore(&port->lock, flags);
+-}
+-
+-static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
+-{
+- switch (state) {
+- case 0:
+- switch (port->type) {
+- case PORT_VR41XX_SIU:
+- vr41xx_supply_clock(SIU_CLOCK);
+- break;
+- case PORT_VR41XX_DSIU:
+- vr41xx_supply_clock(DSIU_CLOCK);
+- break;
+- }
+- break;
+- case 3:
+- switch (port->type) {
+- case PORT_VR41XX_SIU:
+- vr41xx_mask_clock(SIU_CLOCK);
+- break;
+- case PORT_VR41XX_DSIU:
+- vr41xx_mask_clock(DSIU_CLOCK);
+- break;
+- }
+- break;
+- }
+-}
+-
+-static const char *siu_type(struct uart_port *port)
+-{
+- return siu_type_name(port);
+-}
+-
+-static void siu_release_port(struct uart_port *port)
+-{
+- unsigned long size;
+-
+- if (port->flags & UPF_IOREMAP) {
+- iounmap(port->membase);
+- port->membase = NULL;
+- }
+-
+- size = siu_port_size(port);
+- release_mem_region(port->mapbase, size);
+-}
+-
+-static int siu_request_port(struct uart_port *port)
+-{
+- unsigned long size;
+- struct resource *res;
+-
+- size = siu_port_size(port);
+- res = request_mem_region(port->mapbase, size, siu_type_name(port));
+- if (res == NULL)
+- return -EBUSY;
+-
+- if (port->flags & UPF_IOREMAP) {
+- port->membase = ioremap(port->mapbase, size);
+- if (port->membase == NULL) {
+- release_resource(res);
+- return -ENOMEM;
+- }
+- }
+-
+- return 0;
+-}
+-
+-static void siu_config_port(struct uart_port *port, int flags)
+-{
+- if (flags & UART_CONFIG_TYPE) {
+- port->type = siu_check_type(port);
+- (void)siu_request_port(port);
+- }
+-}
+-
+-static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
+-{
+- if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
+- return -EINVAL;
+- if (port->irq != serial->irq)
+- return -EINVAL;
+- if (port->iotype != serial->io_type)
+- return -EINVAL;
+- if (port->mapbase != (unsigned long)serial->iomem_base)
+- return -EINVAL;
+-
+- return 0;
+-}
+-
+-static struct uart_ops siu_uart_ops = {
+- .tx_empty = siu_tx_empty,
+- .set_mctrl = siu_set_mctrl,
+- .get_mctrl = siu_get_mctrl,
+- .stop_tx = siu_stop_tx,
+- .start_tx = siu_start_tx,
+- .stop_rx = siu_stop_rx,
+- .enable_ms = siu_enable_ms,
+- .break_ctl = siu_break_ctl,
+- .startup = siu_startup,
+- .shutdown = siu_shutdown,
+- .set_termios = siu_set_termios,
+- .pm = siu_pm,
+- .type = siu_type,
+- .release_port = siu_release_port,
+- .request_port = siu_request_port,
+- .config_port = siu_config_port,
+- .verify_port = siu_verify_port,
+-};
+-
+-static int siu_init_ports(void)
+-{
+- const struct siu_port *siu;
+- struct uart_port *port;
+- int i, num;
+-
+- switch (current_cpu_data.cputype) {
+- case CPU_VR4111:
+- case CPU_VR4121:
+- siu = siu_type1_ports;
+- break;
+- case CPU_VR4122:
+- case CPU_VR4131:
+- case CPU_VR4133:
+- siu = siu_type2_ports;
+- break;
+- default:
+- return 0;
+- }
+-
+- port = siu_uart_ports;
+- num = siu_probe_ports();
+- for (i = 0; i < num; i++) {
+- spin_lock_init(&port->lock);
+- port->irq = siu->irq;
+- port->uartclk = SIU_BAUD_BASE * 16;
+- port->fifosize = 16;
+- port->regshift = 0;
+- port->iotype = UPIO_MEM;
+- port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
+- port->type = siu->type;
+- port->line = i;
+- port->mapbase = siu->start;
+- siu++;
+- port++;
+- }
+-
+- return num;
+-}
+-
+-#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
+-
+-#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
+-
+-static void wait_for_xmitr(struct uart_port *port)
+-{
+- int timeout = 10000;
+- uint8_t lsr, msr;
+-
+- do {
+- lsr = siu_read(port, UART_LSR);
+- if (lsr & UART_LSR_BI)
+- lsr_break_flag[port->line] = UART_LSR_BI;
+-
+- if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
+- break;
+- } while (timeout-- > 0);
+-
+- if (port->flags & UPF_CONS_FLOW) {
+- timeout = 1000000;
+-
+- do {
+- msr = siu_read(port, UART_MSR);
+- if ((msr & UART_MSR_CTS) != 0)
+- break;
+- } while (timeout-- > 0);
+- }
+-}
+-
+-static void siu_console_write(struct console *con, const char *s, unsigned count)
+-{
+- struct uart_port *port;
+- uint8_t ier;
+- unsigned i;
+-
+- port = &siu_uart_ports[con->index];
+-
+- ier = siu_read(port, UART_IER);
+- siu_write(port, UART_IER, 0);
+-
+- for (i = 0; i < count && *s != '\0'; i++, s++) {
+- wait_for_xmitr(port);
+- siu_write(port, UART_TX, *s);
+- if (*s == '\n') {
+- wait_for_xmitr(port);
+- siu_write(port, UART_TX, '\r');
+- }
+- }
+-
+- wait_for_xmitr(port);
+- siu_write(port, UART_IER, ier);
+-}
+-
+-static int siu_console_setup(struct console *con, char *options)
+-{
+- struct uart_port *port;
+- int baud = 9600;
+- int parity = 'n';
+- int bits = 8;
+- int flow = 'n';
+-
+- if (con->index >= SIU_PORTS_MAX)
+- con->index = 0;
+-
+- port = &siu_uart_ports[con->index];
+- if (port->membase == NULL) {
+- if (port->mapbase == 0)
+- return -ENODEV;
+- port->membase = ioremap(port->mapbase, siu_port_size(port));
+- }
+-
+- vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
+-
+- if (options != NULL)
+- uart_parse_options(options, &baud, &parity, &bits, &flow);
+-
+- return uart_set_options(port, con, baud, parity, bits, flow);
+-}
+-
+-static struct uart_driver siu_uart_driver;
+-
+-static struct console siu_console = {
+- .name = "ttyVR",
+- .write = siu_console_write,
+- .device = uart_console_device,
+- .setup = siu_console_setup,
+- .flags = CON_PRINTBUFFER,
+- .index = -1,
+- .data = &siu_uart_driver,
+-};
+-
+-static int __devinit siu_console_init(void)
+-{
+- struct uart_port *port;
+- int num, i;
+-
+- num = siu_init_ports();
+- if (num <= 0)
+- return -ENODEV;
+-
+- for (i = 0; i < num; i++) {
+- port = &siu_uart_ports[i];
+- port->ops = &siu_uart_ops;
+- }
+-
+- register_console(&siu_console);
+-
+- return 0;
+-}
+-
+-console_initcall(siu_console_init);
+-
+-#define SERIAL_VR41XX_CONSOLE &siu_console
+-#else
+-#define SERIAL_VR41XX_CONSOLE NULL
+-#endif
+-
+-static struct uart_driver siu_uart_driver = {
+- .owner = THIS_MODULE,
+- .driver_name = "SIU",
+- .dev_name = "ttyVR",
+- .devfs_name = "ttvr/",
+- .major = SIU_MAJOR,
+- .minor = SIU_MINOR_BASE,
+- .cons = SERIAL_VR41XX_CONSOLE,
+-};
+-
+-static int siu_probe(struct device *dev)
+-{
+- struct uart_port *port;
+- int num, i, retval;
+-
+- num = siu_init_ports();
+- if (num <= 0)
+- return -ENODEV;
+-
+- siu_uart_driver.nr = num;
+- retval = uart_register_driver(&siu_uart_driver);
+- if (retval)
+- return retval;
+-
+- for (i = 0; i < num; i++) {
+- port = &siu_uart_ports[i];
+- port->ops = &siu_uart_ops;
+- port->dev = dev;
+-
+- retval = uart_add_one_port(&siu_uart_driver, port);
+- if (retval < 0) {
+- port->dev = NULL;
+- break;
+- }
+- }
+-
+- if (i == 0 && retval < 0) {
+- uart_unregister_driver(&siu_uart_driver);
+- return retval;
+- }
+-
+- return 0;
+-}
+-
+-static int siu_remove(struct device *dev)
+-{
+- struct uart_port *port;
+- int i;
+-
+- for (i = 0; i < siu_uart_driver.nr; i++) {
+- port = &siu_uart_ports[i];
+- if (port->dev == dev) {
+- uart_remove_one_port(&siu_uart_driver, port);
+- port->dev = NULL;
+- }
+- }
+-
+- uart_unregister_driver(&siu_uart_driver);
+-
+- return 0;
+-}
+-
+-static int siu_suspend(struct device *dev, pm_message_t state, u32 level)
+-{
+- struct uart_port *port;
+- int i;
+-
+- if (level != SUSPEND_DISABLE)
+- return 0;
+-
+- for (i = 0; i < siu_uart_driver.nr; i++) {
+- port = &siu_uart_ports[i];
+- if ((port->type == PORT_VR41XX_SIU ||
+- port->type == PORT_VR41XX_DSIU) && port->dev == dev)
+- uart_suspend_port(&siu_uart_driver, port);
+-
+- }
+-
+- return 0;
+-}
+-
+-static int siu_resume(struct device *dev, u32 level)
+-{
+- struct uart_port *port;
+- int i;
+-
+- if (level != RESUME_ENABLE)
+- return 0;
+-
+- for (i = 0; i < siu_uart_driver.nr; i++) {
+- port = &siu_uart_ports[i];
+- if ((port->type == PORT_VR41XX_SIU ||
+- port->type == PORT_VR41XX_DSIU) && port->dev == dev)
+- uart_resume_port(&siu_uart_driver, port);
+- }
+-
+- return 0;
+-}
+-
+-static struct platform_device *siu_platform_device;
+-
+-static struct device_driver siu_device_driver = {
+- .name = "SIU",
+- .bus = &platform_bus_type,
+- .probe = siu_probe,
+- .remove = siu_remove,
+- .suspend = siu_suspend,
+- .resume = siu_resume,
+-};
+-
+-static int __devinit vr41xx_siu_init(void)
+-{
+- int retval;
+-
+- siu_platform_device = platform_device_register_simple("SIU", -1, NULL, 0);
+- if (IS_ERR(siu_platform_device))
+- return PTR_ERR(siu_platform_device);
+-
+- retval = driver_register(&siu_device_driver);
+- if (retval < 0)
+- platform_device_unregister(siu_platform_device);
+-
+- return retval;
+-}
+-
+-static void __devexit vr41xx_siu_exit(void)
+-{
+- driver_unregister(&siu_device_driver);
+-
+- platform_device_unregister(siu_platform_device);
+-}
+-
+-module_init(vr41xx_siu_init);
+-module_exit(vr41xx_siu_exit);
+diff -urpNX dontdiff linux-2.6.12/drivers/tc/tc.c linux_HEAD/drivers/tc/tc.c
+--- linux-2.6.12/drivers/tc/tc.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/tc/tc.c 2005-07-03 16:44:34.000000000 +0200
+@@ -8,33 +8,31 @@
+ * for more details.
+ *
+ * Copyright (c) Harald Koerfgen, 1998
+- * Copyright (c) 2001, 2003 Maciej W. Rozycki
++ * Copyright (c) 2001, 2003, 2005 Maciej W. Rozycki
+ */
+-#include <linux/string.h>
+ #include <linux/init.h>
+-#include <linux/ioport.h>
+ #include <linux/kernel.h>
+ #include <linux/module.h>
++#include <linux/string.h>
++#include <linux/types.h>
+
+ #include <asm/addrspace.h>
++#include <asm/bug.h>
+ #include <asm/errno.h>
++#include <asm/io.h>
++#include <asm/paccess.h>
++
+ #include <asm/dec/machtype.h>
+ #include <asm/dec/prom.h>
+ #include <asm/dec/tcinfo.h>
+ #include <asm/dec/tcmodule.h>
+ #include <asm/dec/interrupts.h>
+-#include <asm/paccess.h>
+-#include <asm/ptrace.h>
+-
+-#define TC_DEBUG
+
+ MODULE_LICENSE("GPL");
+ slot_info tc_bus[MAX_SLOT];
+ static int num_tcslots;
+ static tcinfo *info;
+
+-unsigned long system_base;
+-
+ /*
+ * Interface to the world. Read comment in include/asm-mips/tc.h.
+ */
+@@ -97,13 +95,16 @@ unsigned long get_tc_speed(void)
+ static void __init tc_probe(unsigned long startaddr, unsigned long size,
+ int slots)
+ {
++ unsigned long slotaddr;
+ int i, slot, err;
+ long offset;
+- unsigned char pattern[4];
+- unsigned char *module;
++ u8 pattern[4];
++ volatile u8 *module;
+
+ for (slot = 0; slot < slots; slot++) {
+- module = (char *)(startaddr + slot * size);
++ slotaddr = startaddr + slot * size;
++ module = ioremap_nocache(slotaddr, size);
++ BUG_ON(!module);
+
+ offset = OLDCARD;
+
+@@ -112,8 +113,10 @@ static void __init tc_probe(unsigned lon
+ err |= get_dbe(pattern[1], module + OLDCARD + TC_PATTERN1);
+ err |= get_dbe(pattern[2], module + OLDCARD + TC_PATTERN2);
+ err |= get_dbe(pattern[3], module + OLDCARD + TC_PATTERN3);
+- if (err)
++ if (err) {
++ iounmap(module);
+ continue;
++ }
+
+ if (pattern[0] != 0x55 || pattern[1] != 0x00 ||
+ pattern[2] != 0xaa || pattern[3] != 0xff) {
+@@ -124,16 +127,20 @@ static void __init tc_probe(unsigned lon
+ err |= get_dbe(pattern[1], module + TC_PATTERN1);
+ err |= get_dbe(pattern[2], module + TC_PATTERN2);
+ err |= get_dbe(pattern[3], module + TC_PATTERN3);
+- if (err)
++ if (err) {
++ iounmap(module);
+ continue;
++ }
+ }
+
+ if (pattern[0] != 0x55 || pattern[1] != 0x00 ||
+- pattern[2] != 0xaa || pattern[3] != 0xff)
++ pattern[2] != 0xaa || pattern[3] != 0xff) {
++ iounmap(module);
+ continue;
++ }
+
+- tc_bus[slot].base_addr = (unsigned long)module;
+- for(i = 0; i < 8; i++) {
++ tc_bus[slot].base_addr = slotaddr;
++ for (i = 0; i < 8; i++) {
+ tc_bus[slot].firmware[i] =
+ module[TC_FIRM_VER + offset + 4 * i];
+ tc_bus[slot].vendor[i] =
+@@ -171,13 +178,15 @@ static void __init tc_probe(unsigned lon
+ tc_bus[slot].interrupt = -1;
+ break;
+ }
++
++ iounmap(module);
+ }
+ }
+
+ /*
+ * the main entry
+ */
+-void __init tc_init(void)
++static int __init tc_init(void)
+ {
+ int tc_clock;
+ int i;
+@@ -185,7 +194,7 @@ void __init tc_init(void)
+ unsigned long slot_size;
+
+ if (!TURBOCHANNEL)
+- return;
++ return 0;
+
+ for (i = 0; i < MAX_SLOT; i++) {
+ tc_bus[i].base_addr = 0;
+@@ -196,8 +205,8 @@ void __init tc_init(void)
+ tc_bus[i].flags = FREE;
+ }
+
+- info = (tcinfo *) rex_gettcinfo();
+- slot0addr = (unsigned long)KSEG1ADDR(rex_slot_address(0));
++ info = rex_gettcinfo();
++ slot0addr = CPHYSADDR((long)rex_slot_address(0));
+
+ switch (mips_machtype) {
+ case MACH_DS5000_200:
+@@ -216,37 +225,24 @@ void __init tc_init(void)
+
+ tc_clock = 10000 / info->clk_period;
+
+- if (TURBOCHANNEL && info->slot_size && slot0addr) {
+- printk("TURBOchannel rev. %1d at %2d.%1d MHz ", info->revision,
+- tc_clock / 10, tc_clock % 10);
+- printk("(with%s parity)\n", info->parity ? "" : "out");
++ if (info->slot_size && slot0addr) {
++ pr_info("TURBOchannel rev. %d at %d.%d MHz (with%s parity)\n",
++ info->revision, tc_clock / 10, tc_clock % 10,
++ info->parity ? "" : "out");
+
+ slot_size = info->slot_size << 20;
+
+ tc_probe(slot0addr, slot_size, num_tcslots);
+
+- /*
+- * All TURBOchannel DECstations have the onboard devices
+- * where the (num_tcslots + 0 or 1 on DS5k/xx) Option Module
+- * would be.
+- */
+- if(mips_machtype == MACH_DS5000_XX)
+- i = 1;
+- else
+- i = 0;
+-
+- system_base = slot0addr + slot_size * (num_tcslots + i);
+-
+-#ifdef TC_DEBUG
+- for (i = 0; i < num_tcslots; i++)
+- if (tc_bus[i].base_addr) {
+- printk(" slot %d: ", i);
+- printk("%s %s %s\n", tc_bus[i].vendor,
+- tc_bus[i].name, tc_bus[i].firmware);
+- }
+-#endif
+- ioport_resource.end = KSEG2 - 1;
++ for (i = 0; i < num_tcslots; i++) {
++ if (!tc_bus[i].base_addr)
++ continue;
++ pr_info(" slot %d: %s %s %s\n", i, tc_bus[i].vendor,
++ tc_bus[i].name, tc_bus[i].firmware);
++ }
+ }
++
++ return 0;
+ }
+
+ subsys_initcall(tc_init);
+@@ -257,4 +253,3 @@ EXPORT_SYMBOL(release_tc_card);
+ EXPORT_SYMBOL(get_tc_base_addr);
+ EXPORT_SYMBOL(get_tc_irq_nr);
+ EXPORT_SYMBOL(get_tc_speed);
+-EXPORT_SYMBOL(system_base);
+diff -urpNX dontdiff linux-2.6.12/drivers/tc/zs.c linux_HEAD/drivers/tc/zs.c
+--- linux-2.6.12/drivers/tc/zs.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/tc/zs.c 2005-07-03 16:44:34.000000000 +0200
+@@ -6,7 +6,7 @@
+ *
+ * DECstation changes
+ * Copyright (C) 1998-2000 Harald Koerfgen
+- * Copyright (C) 2000, 2001, 2002, 2003, 2004 Maciej W. Rozycki
++ * Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005 Maciej W. Rozycki
+ *
+ * For the rest of the code the original Copyright applies:
+ * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras at cs.anu.edu.au)
+@@ -55,6 +55,7 @@
+ #include <linux/delay.h>
+ #include <linux/init.h>
+ #include <linux/ioport.h>
++#include <linux/spinlock.h>
+ #ifdef CONFIG_SERIAL_DEC_CONSOLE
+ #include <linux/console.h>
+ #endif
+@@ -63,16 +64,15 @@
+ #include <asm/pgtable.h>
+ #include <asm/irq.h>
+ #include <asm/system.h>
+-#include <asm/uaccess.h>
+ #include <asm/bootinfo.h>
+-#include <asm/dec/serial.h>
+
+-#ifdef CONFIG_MACH_DECSTATION
+ #include <asm/dec/interrupts.h>
++#include <asm/dec/ioasic_addrs.h>
+ #include <asm/dec/machtype.h>
++#include <asm/dec/serial.h>
++#include <asm/dec/system.h>
+ #include <asm/dec/tc.h>
+-#include <asm/dec/ioasic_addrs.h>
+-#endif
++
+ #ifdef CONFIG_KGDB
+ #include <asm/kgdb.h>
+ #endif
+@@ -128,6 +128,8 @@ static struct zs_parms ds_parms = {
+
+ #define BUS_PRESENT (DS_BUS_PRESENT)
+
++DEFINE_SPINLOCK(zs_lock);
++
+ struct dec_zschannel zs_channels[NUM_CHANNELS];
+ struct dec_serial zs_soft[NUM_CHANNELS];
+ int zs_channels_found;
+@@ -159,8 +161,6 @@ static unsigned char zs_init_regs[16] __
+ 0 /* write 15 */
+ };
+
+-DECLARE_TASK_QUEUE(tq_zs_serial);
+-
+ static struct tty_driver *serial_driver;
+
+ /* serial subtype definitions */
+@@ -192,18 +192,6 @@ static void probe_sccs(void);
+ static void change_speed(struct dec_serial *info);
+ static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
+
+-/*
+- * tmp_buf is used as a temporary buffer by serial_write. We need to
+- * lock it in case the copy_from_user blocks while swapping in a page,
+- * and some other program tries to do a serial write at the same time.
+- * Since the lock will only come under contention when the system is
+- * swapping and available memory is low, it makes sense to share one
+- * buffer across all the serial ports, since it significantly saves
+- * memory if large numbers of serial ports are open.
+- */
+-static unsigned char tmp_buf[4096]; /* This is cheating */
+-static DECLARE_MUTEX(tmp_buf_sem);
+-
+ static inline int serial_paranoia_check(struct dec_serial *info,
+ char *name, const char *routine)
+ {
+@@ -306,8 +294,7 @@ static inline void zs_rtsdtr(struct dec_
+ {
+ unsigned long flags;
+
+-
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ if (info->zs_channel != info->zs_chan_a) {
+ if (set) {
+ info->zs_chan_a->curregs[5] |= (which & (RTS | DTR));
+@@ -316,7 +303,7 @@ static inline void zs_rtsdtr(struct dec_
+ }
+ write_zsreg(info->zs_chan_a, 5, info->zs_chan_a->curregs[5]);
+ }
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ /* Utility routines for the Zilog */
+@@ -357,12 +344,10 @@ static inline void rs_recv_clear(struct
+ * This routine is used by the interrupt handler to schedule
+ * processing in the software interrupt portion of the driver.
+ */
+-static _INLINE_ void rs_sched_event(struct dec_serial *info,
+- int event)
++static _INLINE_ void rs_sched_event(struct dec_serial *info, int event)
+ {
+ info->event |= 1 << event;
+- queue_task(&info->tqueue, &tq_zs_serial);
+- mark_bh(SERIAL_BH);
++ tasklet_schedule(&info->tlet);
+ }
+
+ static _INLINE_ void receive_chars(struct dec_serial *info,
+@@ -509,9 +494,10 @@ static _INLINE_ void status_handle(struc
+ /*
+ * This is the serial driver's generic interrupt routine
+ */
+-void rs_interrupt(int irq, void *dev_id, struct pt_regs * regs)
++static irqreturn_t rs_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+ {
+ struct dec_serial *info = (struct dec_serial *) dev_id;
++ irqreturn_t status = IRQ_NONE;
+ unsigned char zs_intreg;
+ int shift;
+
+@@ -533,6 +519,8 @@ void rs_interrupt(int irq, void *dev_id,
+ if ((zs_intreg & CHAN_IRQMASK) == 0)
+ break;
+
++ status = IRQ_HANDLED;
++
+ if (zs_intreg & CHBRxIP) {
+ receive_chars(info, regs);
+ }
+@@ -546,6 +534,8 @@ void rs_interrupt(int irq, void *dev_id,
+
+ /* Why do we need this ? */
+ write_zsreg(info->zs_channel, 0, RES_H_IUS);
++
++ return status;
+ }
+
+ #ifdef ZS_DEBUG_REGS
+@@ -590,12 +580,12 @@ static void rs_stop(struct tty_struct *t
+ return;
+
+ #if 1
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ if (info->zs_channel->curregs[5] & TxENAB) {
+ info->zs_channel->curregs[5] &= ~TxENAB;
+ write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
+ }
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ #endif
+ }
+
+@@ -607,7 +597,7 @@ static void rs_start(struct tty_struct *
+ if (serial_paranoia_check(info, tty->name, "rs_start"))
+ return;
+
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ #if 1
+ if (info->xmit_cnt && info->xmit_buf && !(info->zs_channel->curregs[5] & TxENAB)) {
+ info->zs_channel->curregs[5] |= TxENAB;
+@@ -618,7 +608,7 @@ static void rs_start(struct tty_struct *
+ transmit_chars(info);
+ }
+ #endif
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ /*
+@@ -630,12 +620,8 @@ static void rs_start(struct tty_struct *
+ * interrupt driver proper are done; the interrupt driver schedules
+ * them using rs_sched_event(), and they get done here.
+ */
+-static void do_serial_bh(void)
+-{
+- run_task_queue(&tq_zs_serial);
+-}
+
+-static void do_softint(void *private_)
++static void do_softint(unsigned long private_)
+ {
+ struct dec_serial *info = (struct dec_serial *) private_;
+ struct tty_struct *tty;
+@@ -646,10 +632,11 @@ static void do_softint(void *private_)
+
+ if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
+ tty_wakeup(tty);
++ wake_up_interruptible(&tty->write_wait);
+ }
+ }
+
+-int zs_startup(struct dec_serial * info)
++static int zs_startup(struct dec_serial * info)
+ {
+ unsigned long flags;
+
+@@ -662,7 +649,7 @@ int zs_startup(struct dec_serial * info)
+ return -ENOMEM;
+ }
+
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+
+ #ifdef SERIAL_DEBUG_OPEN
+ printk("starting up ttyS%d (irq %d)...", info->line, info->irq);
+@@ -718,7 +705,7 @@ int zs_startup(struct dec_serial * info)
+ info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
+
+ info->flags |= ZILOG_INITIALIZED;
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ return 0;
+ }
+
+@@ -738,7 +725,7 @@ static void shutdown(struct dec_serial *
+ info->irq);
+ #endif
+
+- save_flags(flags); cli(); /* Disable interrupts */
++ spin_lock_irqsave(&zs_lock, flags);
+
+ if (info->xmit_buf) {
+ free_page((unsigned long) info->xmit_buf);
+@@ -761,7 +748,7 @@ static void shutdown(struct dec_serial *
+ set_bit(TTY_IO_ERROR, &info->tty->flags);
+
+ info->flags &= ~ZILOG_INITIALIZED;
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ /*
+@@ -797,7 +784,7 @@ static void change_speed(struct dec_seri
+ i += 15;
+ }
+
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ info->zs_baud = baud_table[i];
+ if (info->zs_baud) {
+ brg = BPS_TO_BRG(info->zs_baud, zs_parms->clock/info->clk_divisor);
+@@ -870,7 +857,7 @@ static void change_speed(struct dec_seri
+ /* Load up the new values */
+ load_zsregs(info->zs_channel, info->zs_channel->curregs);
+
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ static void rs_flush_chars(struct tty_struct *tty)
+@@ -886,9 +873,9 @@ static void rs_flush_chars(struct tty_st
+ return;
+
+ /* Enable transmitter */
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ transmit_chars(info);
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ static int rs_write(struct tty_struct * tty,
+@@ -904,26 +891,17 @@ static int rs_write(struct tty_struct *
+ if (!tty || !info->xmit_buf)
+ return 0;
+
+- save_flags(flags);
+ while (1) {
+- cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
+ SERIAL_XMIT_SIZE - info->xmit_head));
+ if (c <= 0)
+ break;
+
+- if (from_user) {
+- down(&tmp_buf_sem);
+- copy_from_user(tmp_buf, buf, c);
+- c = min(c, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
+- SERIAL_XMIT_SIZE - info->xmit_head));
+- memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
+- up(&tmp_buf_sem);
+- } else
+- memcpy(info->xmit_buf + info->xmit_head, buf, c);
++ memcpy(info->xmit_buf + info->xmit_head, buf, c);
+ info->xmit_head = (info->xmit_head + c) & (SERIAL_XMIT_SIZE-1);
+ info->xmit_cnt += c;
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ buf += c;
+ count -= c;
+ total += c;
+@@ -932,7 +910,7 @@ static int rs_write(struct tty_struct *
+ if (info->xmit_cnt && !tty->stopped && !info->tx_stopped
+ && !info->tx_active)
+ transmit_chars(info);
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ return total;
+ }
+
+@@ -964,9 +942,9 @@ static void rs_flush_buffer(struct tty_s
+
+ if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
+ return;
+- cli();
++ spin_lock_irq(&zs_lock);
+ info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
+- sti();
++ spin_unlock_irq(&zs_lock);
+ tty_wakeup(tty);
+ }
+
+@@ -994,11 +972,11 @@ static void rs_throttle(struct tty_struc
+ return;
+
+ if (I_IXOFF(tty)) {
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ info->x_char = STOP_CHAR(tty);
+ if (!info->tx_active)
+ transmit_chars(info);
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ if (C_CRTSCTS(tty)) {
+@@ -1022,7 +1000,7 @@ static void rs_unthrottle(struct tty_str
+ return;
+
+ if (I_IXOFF(tty)) {
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ if (info->x_char)
+ info->x_char = 0;
+ else {
+@@ -1030,7 +1008,7 @@ static void rs_unthrottle(struct tty_str
+ if (!info->tx_active)
+ transmit_chars(info);
+ }
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ if (C_CRTSCTS(tty)) {
+@@ -1123,9 +1101,9 @@ static int get_lsr_info(struct dec_seria
+ {
+ unsigned char status;
+
+- cli();
++ spin_lock(&zs_lock);
+ status = read_zsreg(info->zs_channel, 0);
+- sti();
++ spin_unlock_irq(&zs_lock);
+ put_user(status,value);
+ return 0;
+ }
+@@ -1148,11 +1126,11 @@ static int rs_tiocmget(struct tty_struct
+ if (info->zs_channel == info->zs_chan_a)
+ result = 0;
+ else {
+- cli();
++ spin_lock(&zs_lock);
+ control = info->zs_chan_a->curregs[5];
+ status_a = read_zsreg(info->zs_chan_a, 0);
+ status_b = read_zsreg(info->zs_channel, 0);
+- sti();
++ spin_unlock_irq(&zs_lock);
+ result = ((control & RTS) ? TIOCM_RTS: 0)
+ | ((control & DTR) ? TIOCM_DTR: 0)
+ | ((status_b & DCD) ? TIOCM_CAR: 0)
+@@ -1167,8 +1145,6 @@ static int rs_tiocmset(struct tty_struct
+ unsigned int set, unsigned int clear)
+ {
+ struct dec_serial * info = (struct dec_serial *)tty->driver_data;
+- int error;
+- unsigned int arg, bits;
+
+ if (info->hook)
+ return -ENODEV;
+@@ -1182,8 +1158,7 @@ static int rs_tiocmset(struct tty_struct
+ if (info->zs_channel == info->zs_chan_a)
+ return 0;
+
+- get_user(arg, value);
+- cli();
++ spin_lock(&zs_lock);
+ if (set & TIOCM_RTS)
+ info->zs_chan_a->curregs[5] |= RTS;
+ if (set & TIOCM_DTR)
+@@ -1193,7 +1168,7 @@ static int rs_tiocmset(struct tty_struct
+ if (clear & TIOCM_DTR)
+ info->zs_chan_a->curregs[5] &= ~DTR;
+ write_zsreg(info->zs_chan_a, 5, info->zs_chan_a->curregs[5]);
+- sti();
++ spin_unlock_irq(&zs_lock);
+ return 0;
+ }
+
+@@ -1210,19 +1185,18 @@ static void rs_break(struct tty_struct *
+ if (!info->port)
+ return;
+
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+ if (break_state == -1)
+ info->zs_channel->curregs[5] |= SND_BRK;
+ else
+ info->zs_channel->curregs[5] &= ~SND_BRK;
+ write_zsreg(info->zs_channel, 5, info->zs_channel->curregs[5]);
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ static int rs_ioctl(struct tty_struct *tty, struct file * file,
+ unsigned int cmd, unsigned long arg)
+ {
+- int error;
+ struct dec_serial * info = (struct dec_serial *)tty->driver_data;
+
+ if (info->hook)
+@@ -1299,10 +1273,10 @@ static void rs_close(struct tty_struct *
+ if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
+ return;
+
+- save_flags(flags); cli();
++ spin_lock_irqsave(&zs_lock, flags);
+
+ if (tty_hung_up_p(filp)) {
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ return;
+ }
+
+@@ -1327,7 +1301,7 @@ static void rs_close(struct tty_struct *
+ info->count = 0;
+ }
+ if (info->count) {
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ return;
+ }
+ info->flags |= ZILOG_CLOSING;
+@@ -1370,7 +1344,7 @@ static void rs_close(struct tty_struct *
+ }
+ info->flags &= ~(ZILOG_NORMAL_ACTIVE|ZILOG_CLOSING);
+ wake_up_interruptible(&info->close_wait);
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ /*
+@@ -1410,7 +1384,7 @@ static void rs_wait_until_sent(struct tt
+ /*
+ * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
+ */
+-void rs_hangup(struct tty_struct *tty)
++static void rs_hangup(struct tty_struct *tty)
+ {
+ struct dec_serial * info = (struct dec_serial *)tty->driver_data;
+
+@@ -1478,16 +1452,16 @@ static int block_til_ready(struct tty_st
+ printk("block_til_ready before block: ttyS%d, count = %d\n",
+ info->line, info->count);
+ #endif
+- cli();
++ spin_lock(&zs_lock);
+ if (!tty_hung_up_p(filp))
+ info->count--;
+- sti();
++ spin_unlock_irq(&zs_lock);
+ info->blocked_open++;
+ while (1) {
+- cli();
++ spin_lock(&zs_lock);
+ if (tty->termios->c_cflag & CBAUD)
+ zs_rtsdtr(info, RTS | DTR, 1);
+- sti();
++ spin_unlock_irq(&zs_lock);
+ set_current_state(TASK_INTERRUPTIBLE);
+ if (tty_hung_up_p(filp) ||
+ !(info->flags & ZILOG_INITIALIZED)) {
+@@ -1535,7 +1509,7 @@ static int block_til_ready(struct tty_st
+ * the IRQ chain. It also performs the serial-specific
+ * initialization for the tty structure.
+ */
+-int rs_open(struct tty_struct *tty, struct file * filp)
++static int rs_open(struct tty_struct *tty, struct file * filp)
+ {
+ struct dec_serial *info;
+ int retval, line;
+@@ -1628,30 +1602,22 @@ static void __init probe_sccs(void)
+ return;
+ }
+
+- /*
+- * When serial console is activated, tc_init has not been called yet
+- * and system_base is undefined. Unfortunately we have to hardcode
+- * system_base for this case :-(. HK
+- */
+ switch(mips_machtype) {
+ #ifdef CONFIG_MACH_DECSTATION
+ case MACH_DS5000_2X0:
+ case MACH_DS5900:
+- system_base = KSEG1ADDR(0x1f800000);
+ n_chips = 2;
+ zs_parms = &ds_parms;
+ zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
+ zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1];
+ break;
+ case MACH_DS5000_1XX:
+- system_base = KSEG1ADDR(0x1c000000);
+ n_chips = 2;
+ zs_parms = &ds_parms;
+ zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
+ zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1];
+ break;
+ case MACH_DS5000_XX:
+- system_base = KSEG1ADDR(0x1c000000);
+ n_chips = 1;
+ zs_parms = &ds_parms;
+ zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
+@@ -1673,10 +1639,10 @@ static void __init probe_sccs(void)
+ * The sccs reside on the high byte of the 16 bit IOBUS
+ */
+ zs_channels[n_channels].control =
+- (volatile unsigned char *)system_base +
++ (volatile void *)CKSEG1ADDR(dec_kn_slot_base +
+ (0 == chip ? zs_parms->scc0 : zs_parms->scc1) +
+ (0 == channel ? zs_parms->channel_a_offset :
+- zs_parms->channel_b_offset);
++ zs_parms->channel_b_offset));
+ zs_channels[n_channels].data =
+ zs_channels[n_channels].control + 4;
+
+@@ -1726,7 +1692,7 @@ static void __init probe_sccs(void)
+ }
+ }
+
+- save_and_cli(flags);
++ spin_lock_irqsave(&zs_lock, flags);
+ for (n = 0; n < zs_channels_found; n++) {
+ if (n % 2 == 0) {
+ write_zsreg(zs_soft[n].zs_chan_a, R9, FHWRES);
+@@ -1736,7 +1702,7 @@ static void __init probe_sccs(void)
+ load_zsregs(zs_soft[n].zs_channel,
+ zs_soft[n].zs_channel->curregs);
+ }
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+ }
+
+ static struct tty_operations serial_ops = {
+@@ -1769,9 +1735,6 @@ int __init zs_init(void)
+ if(!BUS_PRESENT)
+ return -ENODEV;
+
+- /* Setup base handler, and timer table. */
+- init_bh(SERIAL_BH, do_serial_bh);
+-
+ /* Find out how many Z8530 SCCs we have */
+ if (zs_chain == 0)
+ probe_sccs();
+@@ -1820,8 +1783,7 @@ int __init zs_init(void)
+ info->event = 0;
+ info->count = 0;
+ info->blocked_open = 0;
+- info->tqueue.routine = do_softint;
+- info->tqueue.data = info;
++ tasklet_init(&info->tlet, do_softint, (unsigned long)info);
+ init_waitqueue_head(&info->open_wait);
+ init_waitqueue_head(&info->close_wait);
+ printk("ttyS%02d at 0x%08x (irq = %d) is a Z85C30 SCC\n",
+@@ -1853,8 +1815,7 @@ int __init zs_init(void)
+ /*
+ * polling I/O routines
+ */
+-static int
+-zs_poll_tx_char(void *handle, unsigned char ch)
++static int zs_poll_tx_char(void *handle, unsigned char ch)
+ {
+ struct dec_serial *info = handle;
+ struct dec_zschannel *chan = info->zs_channel;
+@@ -1877,8 +1838,7 @@ zs_poll_tx_char(void *handle, unsigned c
+ return -ENODEV;
+ }
+
+-static int
+-zs_poll_rx_char(void *handle)
++static int zs_poll_rx_char(void *handle)
+ {
+ struct dec_serial *info = handle;
+ struct dec_zschannel *chan = info->zs_channel;
+@@ -2057,7 +2017,7 @@ static int __init serial_console_setup(s
+ }
+ co->cflag = cflag;
+
+- save_and_cli(flags);
++ spin_lock_irqsave(&zs_lock, flags);
+
+ /*
+ * Set up the baud rate generator.
+@@ -2112,7 +2072,7 @@ static int __init serial_console_setup(s
+ zs_soft[co->index].clk_divisor = clk_divisor;
+ zs_soft[co->index].zs_baud = get_zsbaud(&zs_soft[co->index]);
+
+- restore_flags(flags);
++ spin_unlock_irqrestore(&zs_lock, flags);
+
+ return 0;
+ }
+@@ -2249,5 +2209,3 @@ void __init zs_kgdb_hook(int tty_num)
+ set_debug_traps(); /* init stub */
+ }
+ #endif /* ifdef CONFIG_KGDB */
+-
+-
+diff -urpNX dontdiff linux-2.6.12/drivers/tc/zs.h linux_HEAD/drivers/tc/zs.h
+--- linux-2.6.12/drivers/tc/zs.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/tc/zs.h 2005-07-10 12:28:27.000000000 +0200
+@@ -6,14 +6,14 @@
+ *
+ * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras at cs.anu.edu.au)
+ * Copyright (C) 1995 David S. Miller (davem at caip.rutgers.edu)
+- * Copyright (C) 2004 Maciej W. Rozycki
++ * Copyright (C) 2004, 2005 Maciej W. Rozycki
+ */
+ #ifndef _DECSERIAL_H
+ #define _DECSERIAL_H
+
+ #include <asm/dec/serial.h>
+
+-#define NUM_ZSREGS 16
++#define NUM_ZSREGS 16
+
+ struct serial_struct {
+ int type;
+@@ -139,8 +139,7 @@ struct dec_serial {
+ int xmit_head;
+ int xmit_tail;
+ int xmit_cnt;
+- struct tq_struct tqueue;
+- struct tq_struct tqueue_hangup;
++ struct tasklet_struct tlet;
+ wait_queue_head_t open_wait;
+ wait_queue_head_t close_wait;
+ };
+@@ -282,7 +281,7 @@ struct dec_serial {
+ #define DLC 4 /* Disable Lower Chain */
+ #define MIE 8 /* Master Interrupt Enable */
+ #define STATHI 0x10 /* Status high */
+-#define SOFTACK 0x20 /* Software Interrupt Acknowledge */
++#define SOFTACK 0x20 /* Software Interrupt Acknowledge */
+ #define NORESET 0 /* No reset on write to R9 */
+ #define CHRB 0x40 /* Reset channel B */
+ #define CHRA 0x80 /* Reset channel A */
+@@ -395,8 +394,8 @@ struct dec_serial {
+ /* Read Register 15 (value of WR 15) */
+
+ /* Misc macros */
+-#define ZS_CLEARERR(channel) (write_zsreg(channel, 0, ERR_RES))
+-#define ZS_CLEARFIFO(channel) do { volatile unsigned char garbage; \
++#define ZS_CLEARERR(channel) (write_zsreg(channel, 0, ERR_RES))
++#define ZS_CLEARFIFO(channel) do { volatile unsigned char garbage; \
+ garbage = read_zsdata(channel); \
+ garbage = read_zsdata(channel); \
+ garbage = read_zsdata(channel); \
+diff -urpNX dontdiff linux-2.6.12/drivers/usb/gadget/net2280.c linux_HEAD/drivers/usb/gadget/net2280.c
+--- linux-2.6.12/drivers/usb/gadget/net2280.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/usb/gadget/net2280.c 2005-04-08 22:41:12.000000000 +0200
@@ -448,7 +448,8 @@ net2280_free_request (struct usb_ep *_ep
#elif defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
#define USE_KMALLOC
@@ -39073,9 +63152,28 @@
#define USE_KMALLOC
/* FIXME there are other cases, including an x86-64 one ... */
-diff -urpNX dontdiff linux-2.6.11.6/drivers/usb/host/ohci-hcd.c linux_HEAD/drivers/usb/host/ohci-hcd.c
---- linux-2.6.11.6/drivers/usb/host/ohci-hcd.c 2005-04-03 00:12:27.000000000 +0200
-+++ linux_HEAD/drivers/usb/host/ohci-hcd.c 2005-03-21 20:04:42.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/usb/host/ohci-au1xxx.c linux_HEAD/drivers/usb/host/ohci-au1xxx.c
+--- linux-2.6.12/drivers/usb/host/ohci-au1xxx.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/usb/host/ohci-au1xxx.c 2005-07-10 12:28:27.000000000 +0200
+@@ -89,12 +89,12 @@ int usb_hcd_au1xxx_probe (const struct h
+ int retval;
+ struct usb_hcd *hcd;
+
+- if(dev->resource[1].flags != IORESOURCE_IRQ) {
++ if (dev->resource[1].flags != IORESOURCE_IRQ) {
+ pr_debug ("resource[1] is not IORESOURCE_IRQ");
+- return -ENOMEM;
++ retval = -ENOMEM;
+ }
+
+- hcd = usb_create_hcd(driver, &dev->dev, "au1xxx");
++ hcd = usb_create_hcd(driver, &dev->dev, "Au1xxx");
+ if (!hcd)
+ return -ENOMEM;
+ hcd->rsrc_start = dev->resource[0].start;
+diff -urpNX dontdiff linux-2.6.12/drivers/usb/host/ohci-hcd.c linux_HEAD/drivers/usb/host/ohci-hcd.c
+--- linux-2.6.12/drivers/usb/host/ohci-hcd.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/usb/host/ohci-hcd.c 2005-04-08 22:41:12.000000000 +0200
@@ -901,10 +901,6 @@ MODULE_LICENSE ("GPL");
#include "ohci-lh7a404.c"
#endif
@@ -39087,10 +63185,73 @@
#ifdef CONFIG_SOC_AU1X00
#include "ohci-au1xxx.c"
#endif
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/Kconfig linux_HEAD/drivers/video/Kconfig
---- linux-2.6.11.6/drivers/video/Kconfig 2005-04-03 00:12:31.000000000 +0200
-+++ linux_HEAD/drivers/video/Kconfig 2005-03-21 20:04:44.000000000 +0100
-@@ -1331,8 +1331,8 @@ config FB_PMAGB_B
+diff -urpNX dontdiff linux-2.6.12/drivers/video/Kconfig linux_HEAD/drivers/video/Kconfig
+--- linux-2.6.12/drivers/video/Kconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/video/Kconfig 2005-07-10 12:16:34.000000000 +0200
+@@ -1164,6 +1164,19 @@ config FB_VOODOO1
+ Please read the <file:Documentation/fb/README-sstfb.txt> for supported
+ options and other important info support.
+
++config FB_SMIVGX
++ tristate "Silicon Motion VoyagerGX support"
++ depends on FB && PCI && (MIPS || EXPERIMENTAL)
++ select FB_CFB_FILLRECT
++ select FB_CFB_COPYAREA
++ select FB_CFB_IMAGEBLIT
++ select FB_SOFT_CURSOR
++ ---help---
++ This drivers supports SMI VoyagerGX 501 based PCI boards
++ The default settings drive both a CRT and LCD. The CRT
++ can be turned off by passing in the no_crt option
++
++
+ config FB_TRIDENT
+ tristate "Trident support"
+ depends on FB && PCI
+@@ -1233,7 +1246,15 @@ config PB1500_TFT
+
+ config FB_AU1100
+ bool "Au1100 LCD Driver"
+- depends on (FB = y) && EXPERIMENTAL && PCI && MIPS && MIPS_PB1100=y
++ depends on FB && MIPS && SOC_AU1100
++ select FB_CFB_FILLRECT
++ select FB_CFB_COPYAREA
++ select FB_CFB_IMAGEBLIT
++ select FB_SOFT_CURSOR
++ help
++ This is the framebuffer driver for the AMD Au1100 SOC. It can drive
++ various panels and CRTs by passing in kernel cmd line option
++ au1100fb:panel=<name>.
+
+ source "drivers/video/geode/Kconfig"
+
+@@ -1325,7 +1346,7 @@ config FB_HIT
+
+ config FB_PMAG_AA
+ bool "PMAG-AA TURBOchannel framebuffer support"
+- depends on (FB = y) && MACH_DECSTATION && TC
++ depends on (FB = y) && TC
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
+@@ -1336,7 +1357,7 @@ config FB_PMAG_AA
+
+ config FB_PMAG_BA
+ bool "PMAG-BA TURBOchannel framebuffer support"
+- depends on (FB = y) && MACH_DECSTATION && TC
++ depends on (FB = y) && TC
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
+@@ -1347,19 +1368,19 @@ config FB_PMAG_BA
+
+ config FB_PMAGB_B
+ bool "PMAGB-B TURBOchannel framebuffer support"
+- depends on (FB = y) && MACH_DECSTATION && TC
++ depends on (FB = y) && TC
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
select FB_SOFT_CURSOR
help
Support for the PMAGB-B TURBOchannel framebuffer card used mainly
@@ -39101,40 +63262,165 @@
config FB_MAXINE
bool "Maxine (Personal DECstation) onboard framebuffer support"
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/au1100fb.c linux_HEAD/drivers/video/au1100fb.c
---- linux-2.6.11.6/drivers/video/au1100fb.c 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/drivers/video/au1100fb.c 2005-02-28 16:56:53.000000000 +0100
-@@ -57,7 +57,7 @@
- #include <video/fbcon-cfb8.h>
- #include <video/fbcon-cfb16.h>
+- depends on (FB = y) && MACH_DECSTATION && TC
++ depends on (FB = y) && MACH_DECSTATION
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
+diff -urpNX dontdiff linux-2.6.12/drivers/video/Makefile linux_HEAD/drivers/video/Makefile
+--- linux-2.6.12/drivers/video/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/video/Makefile 2005-07-10 12:16:34.000000000 +0200
+@@ -83,7 +83,7 @@ obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o
+ obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o
+ obj-$(CONFIG_FB_PXA) += pxafb.o
+ obj-$(CONFIG_FB_W100) += w100fb.o
+-obj-$(CONFIG_FB_AU1100) += au1100fb.o fbgen.o
++obj-$(CONFIG_FB_AU1100) += au1100fb.o
+ obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o
+ obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
+ obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
+@@ -91,6 +91,7 @@ obj-$(CONFIG_FB_MAXINE) += maxinefb.o
+ obj-$(CONFIG_FB_TX3912) += tx3912fb.o
+ obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o
+ obj-$(CONFIG_FB_IMX) += imxfb.o
++obj-$(CONFIG_FB_SMIVGX) += smivgxfb.o
+ # Platform or fallback drivers go here
+ obj-$(CONFIG_FB_VESA) += vesafb.o
+diff -urpNX dontdiff linux-2.6.12/drivers/video/au1100fb.c linux_HEAD/drivers/video/au1100fb.c
+--- linux-2.6.12/drivers/video/au1100fb.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/video/au1100fb.c 2005-04-14 16:40:18.000000000 +0200
+@@ -2,6 +2,11 @@
+ * BRIEF MODULE DESCRIPTION
+ * Au1100 LCD Driver.
+ *
++ * Rewritten for 2.6 by Embedded Alley Solutions
++ * <source at embeddedalley.com>, based on submissions by
++ * Karl Lessard <klessard at sunrisetelecom.com>
++ * <c.pellegrin at exadron.com>
++ *
+ * Copyright 2002 MontaVista Software
+ * Author: MontaVista Software, Inc.
+ * ppopov at mvista.com or source at mvista.com
+@@ -34,297 +39,253 @@
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
++#include <linux/config.h>
+ #include <linux/module.h>
+ #include <linux/kernel.h>
+ #include <linux/errno.h>
+ #include <linux/string.h>
+ #include <linux/mm.h>
+-#include <linux/tty.h>
+-#include <linux/slab.h>
+-#include <linux/delay.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
+-#include <linux/pci.h>
++#include <linux/interrupt.h>
++#include <linux/ctype.h>
++#include <linux/dma-mapping.h>
+
+-#include <asm/au1000.h>
+-#include <asm/pb1100.h>
+-#include "au1100fb.h"
++#include <asm/mach-au1x00/au1000.h>
+
+-#include <video/fbcon.h>
+-#include <video/fbcon-mfb.h>
+-#include <video/fbcon-cfb2.h>
+-#include <video/fbcon-cfb4.h>
+-#include <video/fbcon-cfb8.h>
+-#include <video/fbcon-cfb16.h>
++#define DEBUG 0
+
-/*
++#include "au1100fb.h"
++
+/*
* Sanity check. If this is a new Au1100 based board, search for
* the PB1100 ifdefs to make sure you modify the code accordingly.
*/
-@@ -90,7 +90,7 @@ struct au1100fb_info {
+-#if defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_HYDROGEN3)
++#if defined(CONFIG_MIPS_PB1100)
++ #include <asm/mach-pb1x00/pb1100.h>
++#elif defined(CONFIG_MIPS_DB1100)
++ #include <asm/mach-db1x00/db1x00.h>
+ #else
+-error Unknown Au1100 board
++ #error "Unknown Au1100 board, Au1100 FB driver not supported"
+ #endif
- struct au1100fb_par {
- struct fb_var_screeninfo var;
+-#define CMAPSIZE 16
++#define DRIVER_NAME "au1100fb"
++#define DRIVER_DESC "LCD controller driver for AU1100 processors"
+
+-static int my_lcd_index; /* default is zero */
+-struct known_lcd_panels *p_lcd;
+-AU1100_LCD *p_lcd_reg = (AU1100_LCD *)AU1100_LCD_ADDR;
-
-+
- int line_length; // in bytes
- int cmap_len; // color-map length
+-struct au1100fb_info {
+- struct fb_info_gen gen;
+- unsigned long fb_virt_start;
+- unsigned long fb_size;
+- unsigned long fb_phys;
+- int mmaped;
+- int nohwcursor;
++#define to_au1100fb_device(_info) \
++ (_info ? container_of(_info, struct au1100fb_device, info) : NULL);
+
+- struct { unsigned red, green, blue, pad; } palette[256];
++/* Bitfields format supported by the controller. Note that the order of formats
++ * SHOULD be the same as in the LCD_CONTROL_SBPPF field, so we can retrieve the
++ * right pixel format by doing rgb_bitfields[LCD_CONTROL_SBPPF_XXX >> LCD_CONTROL_SBPPF]
++ */
++struct fb_bitfield rgb_bitfields[][4] =
++{
++ /* Red, Green, Blue, Transp */
++ { { 10, 6, 0 }, { 5, 5, 0 }, { 0, 5, 0 }, { 0, 0, 0 } },
++ { { 11, 5, 0 }, { 5, 6, 0 }, { 0, 5, 0 }, { 0, 0, 0 } },
++ { { 11, 5, 0 }, { 6, 5, 0 }, { 0, 6, 0 }, { 0, 0, 0 } },
++ { { 10, 5, 0 }, { 5, 5, 0 }, { 0, 5, 0 }, { 15, 1, 0 } },
++ { { 11, 5, 0 }, { 6, 5, 0 }, { 1, 5, 0 }, { 0, 1, 0 } },
+
+-#if defined(FBCON_HAS_CFB16)
+- u16 fbcon_cmap16[16];
+-#endif
++ /* The last is used to describe 12bpp format */
++ { { 8, 4, 0 }, { 4, 4, 0 }, { 0, 4, 0 }, { 0, 0, 0 } },
};
-@@ -102,7 +102,7 @@ static struct display disp;
- int au1100fb_init(void);
- void au1100fb_setup(char *options, int *ints);
+-
+-struct au1100fb_par {
+- struct fb_var_screeninfo var;
+-
+- int line_length; // in bytes
+- int cmap_len; // color-map length
++static struct fb_fix_screeninfo au1100fb_fix __initdata = {
++ .id = "AU1100 FB",
++ .xpanstep = 1,
++ .ypanstep = 1,
++ .type = FB_TYPE_PACKED_PIXELS,
++ .accel = FB_ACCEL_NONE,
+ };
+
+-
+-static struct au1100fb_info fb_info;
+-static struct au1100fb_par current_par;
+-static struct display disp;
+-
+-int au1100fb_init(void);
+-void au1100fb_setup(char *options, int *ints);
-static int au1100fb_mmap(struct fb_info *fb, struct file *file,
-+static int au1100fb_mmap(struct fb_info *fb, struct file *file,
- struct vm_area_struct *vma);
- static int au1100_blank(int blank_mode, struct fb_info_gen *info);
- static int au1100fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
-@@ -111,21 +111,21 @@ static int au1100fb_ioctl(struct inode *
- void au1100_nocursor(struct display *p, int mode, int xx, int yy){};
-
- static struct fb_ops au1100fb_ops = {
+- struct vm_area_struct *vma);
+-static int au1100_blank(int blank_mode, struct fb_info_gen *info);
+-static int au1100fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
+- u_long arg, int con, struct fb_info *info);
+-
+-void au1100_nocursor(struct display *p, int mode, int xx, int yy){};
+-
+-static struct fb_ops au1100fb_ops = {
- owner: THIS_MODULE,
- fb_get_fix: fbgen_get_fix,
- fb_get_var: fbgen_get_var,
@@ -39144,119 +63430,386 @@
- fb_pan_display: fbgen_pan_display,
- fb_ioctl: au1100fb_ioctl,
- fb_mmap: au1100fb_mmap,
-+ .owner = THIS_MODULE,
-+ .fb_get_fix = fbgen_get_fix,
-+ .fb_get_var = fbgen_get_var,
-+ .fb_set_var = fbgen_set_var,
-+ .fb_get_cmap = fbgen_get_cmap,
-+ .fb_set_cmap = fbgen_set_cmap,
-+ .fb_pan_display = fbgen_pan_display,
-+ .fb_ioctl = au1100fb_ioctl,
-+ .fb_mmap = au1100fb_mmap,
++static struct fb_var_screeninfo au1100fb_var __initdata = {
++ .activate = FB_ACTIVATE_NOW,
++ .height = -1,
++ .width = -1,
++ .vmode = FB_VMODE_NONINTERLACED,
};
- static void au1100_detect(void)
- {
- /*
+-static void au1100_detect(void)
+-{
+- /*
- * This function should detect the current video mode settings
-+ * This function should detect the current video mode settings
- * and store it as the default video mode
+- * and store it as the default video mode
+- */
++static struct au1100fb_drv_info drv_info;
+
+- /*
+- * Yeh, well, we're not going to change any settings so we're
+- * always stuck with the default ...
++/*
++ * Set hardware with var settings. This will enable the controller with a specific
++ * mode, normally validated with the fb_check_var method
*/
-
-@@ -136,7 +136,7 @@ static void au1100_detect(void)
-
- }
-
+-
+-}
+-
-static int au1100_encode_fix(struct fb_fix_screeninfo *fix,
-+static int au1100_encode_fix(struct fb_fix_screeninfo *fix,
- const void *_par, struct fb_info_gen *_info)
- {
- struct au1100fb_info *info = (struct au1100fb_info *) _info;
-@@ -189,7 +189,7 @@ static void set_color_bitfields(struct f
- var->transp.msb_right = 0;
- }
-
+- const void *_par, struct fb_info_gen *_info)
+-{
+- struct au1100fb_info *info = (struct au1100fb_info *) _info;
+- struct au1100fb_par *par = (struct au1100fb_par *) _par;
+- struct fb_var_screeninfo *var = &par->var;
+-
+- memset(fix, 0, sizeof(struct fb_fix_screeninfo));
+-
+- fix->smem_start = info->fb_phys;
+- fix->smem_len = info->fb_size;
+- fix->type = FB_TYPE_PACKED_PIXELS;
+- fix->type_aux = 0;
+- fix->visual = (var->bits_per_pixel == 8) ?
+- FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
+- fix->ywrapstep = 0;
+- fix->xpanstep = 1;
+- fix->ypanstep = 1;
+- fix->line_length = current_par.line_length;
+- return 0;
+-}
+-
+-static void set_color_bitfields(struct fb_var_screeninfo *var)
+-{
+- switch (var->bits_per_pixel) {
+- case 8:
+- var->red.offset = 0;
+- var->red.length = 8;
+- var->green.offset = 0;
+- var->green.length = 8;
+- var->blue.offset = 0;
+- var->blue.length = 8;
+- var->transp.offset = 0;
+- var->transp.length = 0;
+- break;
+- case 16: /* RGB 565 */
+- var->red.offset = 11;
+- var->red.length = 5;
+- var->green.offset = 5;
+- var->green.length = 6;
+- var->blue.offset = 0;
+- var->blue.length = 5;
+- var->transp.offset = 0;
+- var->transp.length = 0;
+- break;
+- }
+-
+- var->red.msb_right = 0;
+- var->green.msb_right = 0;
+- var->blue.msb_right = 0;
+- var->transp.msb_right = 0;
+-}
+-
-static int au1100_decode_var(const struct fb_var_screeninfo *var,
-+static int au1100_decode_var(const struct fb_var_screeninfo *var,
- void *_par, struct fb_info_gen *_info)
+- void *_par, struct fb_info_gen *_info)
++int au1100fb_setmode(struct au1100fb_device *fbdev)
{
++ struct fb_info *info = &fbdev->info;
++ u32 words;
++ int index;
-@@ -211,7 +211,7 @@ static int au1100_decode_var(const struc
+- struct au1100fb_par *par = (struct au1100fb_par *)_par;
+-
+- /*
+- * Don't allow setting any of these yet: xres and yres don't
+- * make sense for LCD panels.
+- */
+- if (var->xres != p_lcd->xres ||
+- var->yres != p_lcd->yres ||
+- var->xres != p_lcd->xres ||
+- var->yres != p_lcd->yres) {
+- return -EINVAL;
+- }
+- if(var->bits_per_pixel != p_lcd->bpp) {
++ if (!fbdev)
+ return -EINVAL;
+- }
+-
+- memset(par, 0, sizeof(struct au1100fb_par));
+- par->var = *var;
+-
+- /* FIXME */
+- switch (var->bits_per_pixel) {
+- case 8:
+- par->var.bits_per_pixel = 8;
+- break;
+- case 16:
+- par->var.bits_per_pixel = 16;
+- break;
+- default:
+- printk("color depth %d bpp not supported\n",
+- var->bits_per_pixel);
+- return -EINVAL;
- memset(par, 0, sizeof(struct au1100fb_par));
- par->var = *var;
++ /* Update var-dependent FB info */
++ if (panel_is_active(fbdev->panel) || panel_is_color(fbdev->panel)) {
++ if (info->var.bits_per_pixel <= 8) {
++ /* palettized */
++ info->var.red.offset = 0;
++ info->var.red.length = info->var.bits_per_pixel;
++ info->var.red.msb_right = 0;
++
++ info->var.green.offset = 0;
++ info->var.green.length = info->var.bits_per_pixel;
++ info->var.green.msb_right = 0;
++
++ info->var.blue.offset = 0;
++ info->var.blue.length = info->var.bits_per_pixel;
++ info->var.blue.msb_right = 0;
++
++ info->var.transp.offset = 0;
++ info->var.transp.length = 0;
++ info->var.transp.msb_right = 0;
++
++ info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
++ info->fix.line_length = info->var.xres_virtual /
++ (8/info->var.bits_per_pixel);
++ } else {
++ /* non-palettized */
++ index = (fbdev->panel->control_base & LCD_CONTROL_SBPPF_MASK) >> LCD_CONTROL_SBPPF_BIT;
++ info->var.red = rgb_bitfields[index][0];
++ info->var.green = rgb_bitfields[index][1];
++ info->var.blue = rgb_bitfields[index][2];
++ info->var.transp = rgb_bitfields[index][3];
++
++ info->fix.visual = FB_VISUAL_TRUECOLOR;
++ info->fix.line_length = info->var.xres_virtual << 1; /* depth=16 */
++ }
++ } else {
++ /* mono */
++ info->fix.visual = FB_VISUAL_MONO10;
++ info->fix.line_length = info->var.xres_virtual / 8;
++ }
++
++ info->screen_size = info->fix.line_length * info->var.yres_virtual;
++
++ /* Determine BPP mode and format */
++ fbdev->regs->lcd_control = fbdev->panel->control_base |
++ ((info->var.rotate/90) << LCD_CONTROL_SM_BIT);
++
++ fbdev->regs->lcd_intenable = 0;
++ fbdev->regs->lcd_intstatus = 0;
++
++ fbdev->regs->lcd_horztiming = fbdev->panel->horztiming;
++
++ fbdev->regs->lcd_verttiming = fbdev->panel->verttiming;
++
++ fbdev->regs->lcd_clkcontrol = fbdev->panel->clkcontrol_base;
++
++ fbdev->regs->lcd_dmaaddr0 = LCD_DMA_SA_N(fbdev->fb_phys);
++
++ if (panel_is_dual(fbdev->panel)) {
++ /* Second panel display seconf half of screen if possible,
++ * otherwise display the same as the first panel */
++ if (info->var.yres_virtual >= (info->var.yres << 1)) {
++ fbdev->regs->lcd_dmaaddr1 = LCD_DMA_SA_N(fbdev->fb_phys +
++ (info->fix.line_length *
++ (info->var.yres_virtual >> 1)));
++ } else {
++ fbdev->regs->lcd_dmaaddr1 = LCD_DMA_SA_N(fbdev->fb_phys);
++ }
+ }
+- set_color_bitfields(&par->var);
+- par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16;
+- return 0;
+-}
-
-+
- /* FIXME */
- switch (var->bits_per_pixel) {
- case 8:
-@@ -231,7 +231,7 @@ static int au1100_decode_var(const struc
- return 0;
- }
-
-static int au1100_encode_var(struct fb_var_screeninfo *var,
-+static int au1100_encode_var(struct fb_var_screeninfo *var,
- const void *par, struct fb_info_gen *_info)
- {
-
-@@ -239,7 +239,7 @@ static int au1100_encode_var(struct fb_v
- return 0;
- }
-
+- const void *par, struct fb_info_gen *_info)
+-{
+-
+- *var = ((struct au1100fb_par *)par)->var;
+- return 0;
+-}
+-
-static void
-+static void
- au1100_get_par(void *_par, struct fb_info_gen *_info)
- {
- *(struct au1100fb_par *)_par = current_par;
-@@ -259,10 +259,10 @@ static int au1100_getcolreg(unsigned reg
+-au1100_get_par(void *_par, struct fb_info_gen *_info)
+-{
+- *(struct au1100fb_par *)_par = current_par;
+-}
+-
+-static void au1100_set_par(const void *par, struct fb_info_gen *info)
+-{
+- /* nothing to do: we don't change any settings */
+-}
+-
+-static int au1100_getcolreg(unsigned regno, unsigned *red, unsigned *green,
+- unsigned *blue, unsigned *transp,
+- struct fb_info *info)
+-{
- if (regno > 255)
- return 1;
+- struct au1100fb_info* i = (struct au1100fb_info*)info;
-
+- if (regno > 255)
+- return 1;
++ words = info->fix.line_length / sizeof(u32);
++ if (!info->var.rotate || (info->var.rotate == 180)) {
++ words *= info->var.yres_virtual;
++ if (info->var.rotate /* 180 */) {
++ words -= (words % 8); /* should be divisable by 8 */
++ }
++ }
++ fbdev->regs->lcd_words = LCD_WRD_WRDS_N(words);
+
- *red = i->palette[regno].red;
- *green = i->palette[regno].green;
- *blue = i->palette[regno].blue;
+- *transp = 0;
++ fbdev->regs->lcd_pwmdiv = 0;
++ fbdev->regs->lcd_pwmhi = 0;
+
-+ *red = i->palette[regno].red;
-+ *green = i->palette[regno].green;
-+ *blue = i->palette[regno].blue;
- *transp = 0;
++ /* Resume controller */
++ fbdev->regs->lcd_control |= LCD_CONTROL_GO;
return 0;
-@@ -281,14 +281,14 @@ static int au1100_setcolreg(unsigned reg
- i->palette[regno].red = red;
- i->palette[regno].green = green;
- i->palette[regno].blue = blue;
--
+ }
+
+-static int au1100_setcolreg(unsigned regno, unsigned red, unsigned green,
+- unsigned blue, unsigned transp,
+- struct fb_info *info)
++/* fb_setcolreg
++ * Set color in LCD palette.
++ */
++int au1100fb_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *fbi)
+ {
+- struct au1100fb_info* i = (struct au1100fb_info *)info;
+- u32 rgbcol;
++ struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
++ u32 *palette = fbdev->regs->lcd_pallettebase;
++ u32 value;
+
+- if (regno > 255)
+- return 1;
++ if (regno > (AU1100_LCD_NBR_PALETTE_ENTRIES - 1))
++ return -EINVAL;
+
+- i->palette[regno].red = red;
+- i->palette[regno].green = green;
+- i->palette[regno].blue = blue;
++ if (fbi->var.grayscale) {
++ /* Convert color to grayscale */
++ red = green = blue =
++ (19595 * red + 38470 * green + 7471 * blue) >> 16;
++ }
+
- switch(p_lcd->bpp) {
- #ifdef FBCON_HAS_CFB8
- case 8:
- red >>= 10;
- green >>= 10;
- blue >>= 10;
++ if (fbi->fix.visual == FB_VISUAL_TRUECOLOR) {
++ /* Place color in the pseudopalette */
++ if (regno > 16)
++ return -EINVAL;
++
++ palette = (u32*)fbi->pseudo_palette;
+
+- switch(p_lcd->bpp) {
+-#ifdef FBCON_HAS_CFB8
+- case 8:
+- red >>= 10;
+- green >>= 10;
+- blue >>= 10;
- p_lcd_reg->lcd_pallettebase[regno] = (blue&0x1f) |
-+ p_lcd_reg->lcd_pallettebase[regno] = (blue&0x1f) |
- ((green&0x3f)<<5) | ((red&0x1f)<<11);
- break;
- #endif
-@@ -317,7 +317,7 @@ static int au1100_blank(int blank_mode,
- //printk("turn on panel\n");
+- ((green&0x3f)<<5) | ((red&0x1f)<<11);
+- break;
+-#endif
+-#ifdef FBCON_HAS_CFB16
+- case 16:
+- i->fbcon_cmap16[regno] =
+- ((red & 0xf800) >> 0) |
+- ((green & 0xfc00) >> 5) |
+- ((blue & 0xf800) >> 11);
+- break;
+-#endif
+- default:
+- break;
++ red >>= (16 - fbi->var.red.length);
++ green >>= (16 - fbi->var.green.length);
++ blue >>= (16 - fbi->var.blue.length);
++
++ value = (red << fbi->var.red.offset) |
++ (green << fbi->var.green.offset)|
++ (blue << fbi->var.blue.offset);
++ value &= 0xFFFF;
++
++ } else if (panel_is_active(fbdev->panel)) {
++ /* COLOR TFT PALLETTIZED (use RGB 565) */
++ value = (red & 0xF800)|((green >> 5) & 0x07E0)|((blue >> 11) & 0x001F);
++ value &= 0xFFFF;
++
++ } else if (panel_is_color(fbdev->panel)) {
++ /* COLOR STN MODE */
++ value = (((panel_swap_rgb(fbdev->panel) ? blue : red) >> 12) & 0x000F) |
++ ((green >> 8) & 0x00F0) |
++ (((panel_swap_rgb(fbdev->panel) ? red : blue) >> 4) & 0x0F00);
++ value &= 0xFFF;
++ } else {
++ /* MONOCHROME MODE */
++ value = (green >> 12) & 0x000F;
++ value &= 0xF;
+ }
+
++ palette[regno] = value;
++
+ return 0;
+ }
+
+-
+-static int au1100_blank(int blank_mode, struct fb_info_gen *_info)
++/* fb_blank
++ * Blank the screen. Depending on the mode, the screen will be
++ * activated with the backlight color, or desactivated
++ */
++int au1100fb_fb_blank(int blank_mode, struct fb_info *fbi)
+ {
++ struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
++
++ print_dbg("fb_blank %d %p", blank_mode, fbi);
+
+ switch (blank_mode) {
++
+ case VESA_NO_BLANKING:
+- /* turn on panel */
+- //printk("turn on panel\n");
++ /* Turn on panel */
++ fbdev->regs->lcd_control |= LCD_CONTROL_GO;
#ifdef CONFIG_MIPS_PB1100
- p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
+- p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
- au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight,
-+ au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight,
++ if (drv_info.panel_idx == 1) {
++ au_writew(au_readw(PB1100_G_CONTROL)
++ | (PB1100_G_CONTROL_BL | PB1100_G_CONTROL_VDD),
PB1100_G_CONTROL);
+-#endif
+-#ifdef CONFIG_MIPS_HYDROGEN3
+- /* Turn controller & power supply on, GPIO213 */
+- au_writel(0x20002000, 0xB1700008);
+- au_writel(0x00040000, 0xB1900108);
+- au_writel(0x01000100, 0xB1700008);
++ }
#endif
- #ifdef CONFIG_MIPS_HYDROGEN3
-@@ -335,13 +335,13 @@ static int au1100_blank(int blank_mode,
- /* turn off panel */
- //printk("turn off panel\n");
+ au_sync();
+ break;
+@@ -332,65 +293,105 @@ static int au1100_blank(int blank_mode,
+ case VESA_VSYNC_SUSPEND:
+ case VESA_HSYNC_SUSPEND:
+ case VESA_POWERDOWN:
+- /* turn off panel */
+- //printk("turn off panel\n");
++ /* Turn off panel */
++ fbdev->regs->lcd_control &= ~LCD_CONTROL_GO;
#ifdef CONFIG_MIPS_PB1100
- au_writew(au_readw(PB1100_G_CONTROL) & ~p_lcd->mode_backlight,
-+ au_writew(au_readw(PB1100_G_CONTROL) & ~p_lcd->mode_backlight,
++ if (drv_info.panel_idx == 1) {
++ au_writew(au_readw(PB1100_G_CONTROL)
++ & ~(PB1100_G_CONTROL_BL | PB1100_G_CONTROL_VDD),
PB1100_G_CONTROL);
- p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
+- p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
++ }
#endif
au_sync();
break;
@@ -39265,28 +63818,174 @@
break;
}
-@@ -388,7 +388,7 @@ au1100fb_mmap(struct fb_info *_fb,
+ return 0;
+ }
+
+-static void au1100_set_disp(const void *unused, struct display *disp,
+- struct fb_info_gen *info)
++/* fb_pan_display
++ * Pan display in x and/or y as specified
++ */
++int au1100fb_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *fbi)
+ {
+- disp->screen_base = (char *)fb_info.fb_virt_start;
++ struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
++ int dy;
+
+- switch (disp->var.bits_per_pixel) {
+-#ifdef FBCON_HAS_CFB8
+- case 8:
+- disp->dispsw = &fbcon_cfb8;
+- if (fb_info.nohwcursor)
+- fbcon_cfb8.cursor = au1100_nocursor;
+- break;
+-#endif
+-#ifdef FBCON_HAS_CFB16
+- case 16:
+- disp->dispsw = &fbcon_cfb16;
+- disp->dispsw_data = fb_info.fbcon_cmap16;
+- if (fb_info.nohwcursor)
+- fbcon_cfb16.cursor = au1100_nocursor;
+- break;
+-#endif
+- default:
+- disp->dispsw = &fbcon_dummy;
+- disp->dispsw_data = NULL;
+- break;
++ print_dbg("fb_pan_display %p %p", var, fbi);
++
++ if (!var || !fbdev) {
++ return -EINVAL;
++ }
++
++ if (var->xoffset - fbi->var.xoffset) {
++ /* No support for X panning for now! */
++ return -EINVAL;
++ }
++
++ print_dbg("fb_pan_display 2 %p %p", var, fbi);
++ dy = var->yoffset - fbi->var.yoffset;
++ if (dy) {
++
++ u32 dmaaddr;
++
++ print_dbg("Panning screen of %d lines", dy);
++
++ dmaaddr = fbdev->regs->lcd_dmaaddr0;
++ dmaaddr += (fbi->fix.line_length * dy);
++
++ /* TODO: Wait for current frame to finished */
++ fbdev->regs->lcd_dmaaddr0 = LCD_DMA_SA_N(dmaaddr);
++
++ if (panel_is_dual(fbdev->panel)) {
++ dmaaddr = fbdev->regs->lcd_dmaaddr1;
++ dmaaddr += (fbi->fix.line_length * dy);
++ fbdev->regs->lcd_dmaaddr0 = LCD_DMA_SA_N(dmaaddr);
++ }
++ }
++ print_dbg("fb_pan_display 3 %p %p", var, fbi);
++
++ return 0;
++}
++
++/* fb_rotate
++ * Rotate the display of this angle. This doesn't seems to be used by the core,
++ * but as our hardware supports it, so why not implementing it...
++ */
++void au1100fb_fb_rotate(struct fb_info *fbi, int angle)
++{
++ struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
++
++ print_dbg("fb_rotate %p %d", fbi, angle);
++
++ if (fbdev && (angle > 0) && !(angle % 90)) {
++
++ fbdev->regs->lcd_control &= ~LCD_CONTROL_GO;
++
++ fbdev->regs->lcd_control &= ~(LCD_CONTROL_SM_MASK);
++ fbdev->regs->lcd_control |= ((angle/90) << LCD_CONTROL_SM_BIT);
++
++ fbdev->regs->lcd_control |= LCD_CONTROL_GO;
+ }
+ }
+
+-static int
+-au1100fb_mmap(struct fb_info *_fb,
+- struct file *file,
+- struct vm_area_struct *vma)
++/* fb_mmap
++ * Map video memory in user space. We don't use the generic fb_mmap method mainly
++ * to allow the use of the TLB streaming flag (CCA=6)
++ */
++int au1100fb_fb_mmap(struct fb_info *fbi, struct file *file, struct vm_area_struct *vma)
+ {
++ struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
+ unsigned int len;
+ unsigned long start=0, off;
+- struct au1100fb_info *fb = (struct au1100fb_info *)_fb;
+
if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
return -EINVAL;
}
-
+- start = fb_info.fb_phys & PAGE_MASK;
+- len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info.fb_size);
+
- start = fb_info.fb_phys & PAGE_MASK;
- len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info.fb_size);
++ start = fbdev->fb_phys & PAGE_MASK;
++ len = PAGE_ALIGN((start & ~PAGE_MASK) + fbdev->fb_len);
-@@ -407,7 +407,7 @@ au1100fb_mmap(struct fb_info *_fb,
+ off = vma->vm_pgoff << PAGE_SHIFT;
- /* This is an IO map - tell maydump to skip this VMA */
+@@ -401,276 +402,310 @@ au1100fb_mmap(struct fb_info *_fb,
+ off += start;
+ vma->vm_pgoff = off >> PAGE_SHIFT;
+
+- pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
+- //pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT;
++ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ pgprot_val(vma->vm_page_prot) |= (6 << 9); //CCA=6
+
+- /* This is an IO map - tell maydump to skip this VMA */
vma->vm_flags |= VM_IO;
-
+- if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
+
- if (io_remap_page_range(vma, vma->vm_start, off,
++ if (io_remap_page_range(vma, vma->vm_start, off,
vma->vm_end - vma->vm_start,
vma->vm_page_prot)) {
-@@ -432,21 +432,21 @@ static int au1100fb_ioctl(struct inode *
+ return -EAGAIN;
+ }
+
+- fb->mmaped = 1;
+ return 0;
}
- static struct fbgen_hwswitch au1100_switch = {
+-int au1100_pan_display(const struct fb_var_screeninfo *var,
+- struct fb_info_gen *info)
++static struct fb_ops au1100fb_ops =
+ {
+- return 0;
+-}
++ .owner = THIS_MODULE,
++ .fb_setcolreg = au1100fb_fb_setcolreg,
++ .fb_blank = au1100fb_fb_blank,
++ .fb_pan_display = au1100fb_fb_pan_display,
++ .fb_fillrect = cfb_fillrect,
++ .fb_copyarea = cfb_copyarea,
++ .fb_imageblit = cfb_imageblit,
++ .fb_cursor = soft_cursor,
++ .fb_rotate = au1100fb_fb_rotate,
++ .fb_mmap = au1100fb_fb_mmap,
++};
+
+-static int au1100fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
+- u_long arg, int con, struct fb_info *info)
+-{
+- /* nothing to do yet */
+- return -EINVAL;
+-}
+
+-static struct fbgen_hwswitch au1100_switch = {
- au1100_detect,
- au1100_encode_fix,
- au1100_decode_var,
@@ -39297,167 +63996,1124 @@
- au1100_setcolreg,
- au1100_pan_display,
- au1100_blank,
-+ au1100_detect,
-+ au1100_encode_fix,
-+ au1100_decode_var,
-+ au1100_encode_var,
-+ au1100_get_par,
-+ au1100_set_par,
-+ au1100_getcolreg,
-+ au1100_setcolreg,
-+ au1100_pan_display,
-+ au1100_blank,
- au1100_set_disp
- };
+- au1100_set_disp
+-};
++/*-------------------------------------------------------------------------*/
++/* AU1100 LCD controller device driver */
-int au1100_setmode(void)
-+int au1100_setmode(void)
++int au1100fb_drv_probe(struct device *dev)
{
- int words;
+- int words;
++ struct au1100fb_device *fbdev = NULL;
++ struct resource *regs_res;
++ unsigned long page;
++ u32 sys_clksrc;
-@@ -482,7 +482,7 @@ int au1100_setmode(void)
+- /* FIXME Need to accomodate for swivel mode and 12bpp, <8bpp*/
+- switch (p_lcd->mode_control & LCD_CONTROL_SM)
+- {
+- case LCD_CONTROL_SM_0:
+- case LCD_CONTROL_SM_180:
+- words = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 32;
+- break;
+- case LCD_CONTROL_SM_90:
+- case LCD_CONTROL_SM_270:
+- /* is this correct? */
+- words = (p_lcd->xres * p_lcd->bpp) / 8;
+- break;
+- default:
+- printk("mode_control reg not initialized\n");
++ if (!dev)
+ return -EINVAL;
+- }
- /* turn on panel */
- #ifdef CONFIG_MIPS_PB1100
+- /*
+- * Setup LCD controller
+- */
++ /* Allocate new device private */
++ if (!(fbdev = kmalloc(sizeof(struct au1100fb_device), GFP_KERNEL))) {
++ print_err("fail to allocate device private record");
++ return -ENOMEM;
++ }
++ memset((void*)fbdev, 0, sizeof(struct au1100fb_device));
+
+- p_lcd_reg->lcd_control = p_lcd->mode_control;
+- p_lcd_reg->lcd_intstatus = 0;
+- p_lcd_reg->lcd_intenable = 0;
+- p_lcd_reg->lcd_horztiming = p_lcd->mode_horztiming;
+- p_lcd_reg->lcd_verttiming = p_lcd->mode_verttiming;
+- p_lcd_reg->lcd_clkcontrol = p_lcd->mode_clkcontrol;
+- p_lcd_reg->lcd_words = words - 1;
+- p_lcd_reg->lcd_dmaaddr0 = fb_info.fb_phys;
++ fbdev->panel = &known_lcd_panels[drv_info.panel_idx];
+
+- /* turn on panel */
+-#ifdef CONFIG_MIPS_PB1100
- au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight,
-+ au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight,
- PB1100_G_CONTROL);
- #endif
- #ifdef CONFIG_MIPS_HYDROGEN3
-@@ -512,16 +512,16 @@ int __init au1100fb_init(void)
- {
- case LCD_CONTROL_SM_0:
- case LCD_CONTROL_SM_180:
+- PB1100_G_CONTROL);
+-#endif
+-#ifdef CONFIG_MIPS_HYDROGEN3
+- /* Turn controller & power supply on, GPIO213 */
+- au_writel(0x20002000, 0xB1700008);
+- au_writel(0x00040000, 0xB1900108);
+- au_writel(0x01000100, 0xB1700008);
+-#endif
++ dev_set_drvdata(dev, (void*)fbdev);
+
+- p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
++ /* Allocate region for our registers and map them */
++ if (!(regs_res = platform_get_resource(to_platform_device(dev),
++ IORESOURCE_MEM, 0))) {
++ print_err("fail to retrieve registers resource");
++ return -EFAULT;
++ }
+
+- return 0;
+-}
++ au1100fb_fix.mmio_start = regs_res->start;
++ au1100fb_fix.mmio_len = regs_res->end - regs_res->start + 1;
+
++ if (!request_mem_region(au1100fb_fix.mmio_start, au1100fb_fix.mmio_len,
++ DRIVER_NAME)) {
++ print_err("fail to lock memory region at 0x%08x",
++ au1100fb_fix.mmio_start);
++ return -EBUSY;
++ }
+
+-int __init au1100fb_init(void)
+-{
+- uint32 sys_clksrc;
+- unsigned long page;
++ fbdev->regs = (struct au1100fb_regs*)KSEG1ADDR(au1100fb_fix.mmio_start);
+
+- /*
+- * Get the panel information/display mode and update the registry
+- */
+- p_lcd = &panels[my_lcd_index];
+-
+- switch (p_lcd->mode_control & LCD_CONTROL_SM)
+- {
+- case LCD_CONTROL_SM_0:
+- case LCD_CONTROL_SM_180:
- p_lcd->xres =
-+ p_lcd->xres =
- (p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1;
+- (p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1;
- p_lcd->yres =
-+ p_lcd->yres =
- (p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1;
- break;
- case LCD_CONTROL_SM_90:
- case LCD_CONTROL_SM_270:
+- (p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1;
+- break;
+- case LCD_CONTROL_SM_90:
+- case LCD_CONTROL_SM_270:
- p_lcd->yres =
-+ p_lcd->yres =
- (p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1;
+- (p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1;
- p_lcd->xres =
-+ p_lcd->xres =
- (p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1;
- break;
- }
-@@ -529,16 +529,16 @@ int __init au1100fb_init(void)
- /*
- * Panel dimensions x bpp must be divisible by 32
- */
+- (p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1;
+- break;
+- }
++ print_dbg("Register memory map at %p", fbdev->regs);
++ print_dbg("phys=0x%08x, size=%d", fbdev->regs_phys, fbdev->regs_len);
+
+- /*
+- * Panel dimensions x bpp must be divisible by 32
+- */
- if (((p_lcd->yres * p_lcd->bpp) % 32) != 0)
-+ if (((p_lcd->yres * p_lcd->bpp) % 32) != 0)
- printk("VERT %% 32\n");
+- printk("VERT %% 32\n");
- if (((p_lcd->xres * p_lcd->bpp) % 32) != 0)
-+ if (((p_lcd->xres * p_lcd->bpp) % 32) != 0)
- printk("HORZ %% 32\n");
+- printk("HORZ %% 32\n");
- /*
- * Allocate LCD framebuffer from system memory
- */
- fb_info.fb_size = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 8;
+- /*
+- * Allocate LCD framebuffer from system memory
+- */
+- fb_info.fb_size = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 8;
+
+- current_par.var.xres = p_lcd->xres;
+- current_par.var.xres_virtual = p_lcd->xres;
+- current_par.var.yres = p_lcd->yres;
+- current_par.var.yres_virtual = p_lcd->yres;
+- current_par.var.bits_per_pixel = p_lcd->bpp;
-
+- /* FIX!!! only works for 8/16 bpp */
+- current_par.line_length = p_lcd->xres * p_lcd->bpp / 8; /* in bytes */
+- fb_info.fb_virt_start = (unsigned long )
+- __get_free_pages(GFP_ATOMIC | GFP_DMA,
+- get_order(fb_info.fb_size + 0x1000));
+- if (!fb_info.fb_virt_start) {
+- printk("Unable to allocate fb memory\n");
++ /* Allocate the framebuffer to the maximum screen size * nbr of video buffers */
++ fbdev->fb_len = fbdev->panel->xres * fbdev->panel->yres *
++ (fbdev->panel->bpp >> 3) * AU1100FB_NBR_VIDEO_BUFFERS;
+
- current_par.var.xres = p_lcd->xres;
- current_par.var.xres_virtual = p_lcd->xres;
- current_par.var.yres = p_lcd->yres;
-@@ -548,7 +548,7 @@ int __init au1100fb_init(void)
- /* FIX!!! only works for 8/16 bpp */
- current_par.line_length = p_lcd->xres * p_lcd->bpp / 8; /* in bytes */
- fb_info.fb_virt_start = (unsigned long )
-- __get_free_pages(GFP_ATOMIC | GFP_DMA,
-+ __get_free_pages(GFP_ATOMIC | GFP_DMA,
- get_order(fb_info.fb_size + 0x1000));
- if (!fb_info.fb_virt_start) {
- printk("Unable to allocate fb memory\n");
-@@ -561,7 +561,7 @@ int __init au1100fb_init(void)
++ fbdev->fb_mem = dma_alloc_coherent(dev, PAGE_ALIGN(fbdev->fb_len),
++ &fbdev->fb_phys, GFP_KERNEL);
++ if (!fbdev->fb_mem) {
++ print_err("fail to allocate frambuffer (size: %dK))",
++ fbdev->fb_len / 1024);
+ return -ENOMEM;
+ }
+- fb_info.fb_phys = virt_to_bus((void *)fb_info.fb_virt_start);
++
++ au1100fb_fix.smem_start = fbdev->fb_phys;
++ au1100fb_fix.smem_len = fbdev->fb_len;
+
+ /*
+ * Set page reserved so that mmap will work. This is necessary
* since we'll be remapping normal memory.
*/
- for (page = fb_info.fb_virt_start;
+- for (page = fb_info.fb_virt_start;
- page < PAGE_ALIGN(fb_info.fb_virt_start + fb_info.fb_size);
-+ page < PAGE_ALIGN(fb_info.fb_virt_start + fb_info.fb_size);
++ for (page = (unsigned long)fbdev->fb_mem;
++ page < PAGE_ALIGN((unsigned long)fbdev->fb_mem + fbdev->fb_len);
page += PAGE_SIZE) {
++#if CONFIG_DMA_NONCOHERENT
++ SetPageReserved(virt_to_page(CAC_ADDR(page)));
++#else
SetPageReserved(virt_to_page(page));
++#endif
}
-@@ -570,7 +570,7 @@ int __init au1100fb_init(void)
- /* set freqctrl now to allow more time to stabilize */
- /* zero-out out LCD bits */
+- memset((void *)fb_info.fb_virt_start, 0, fb_info.fb_size);
++ print_dbg("Framebuffer memory map at %p", fbdev->fb_mem);
++ print_dbg("phys=0x%08x, size=%dK", fbdev->fb_phys, fbdev->fb_len / 1024);
+
+- /* set freqctrl now to allow more time to stabilize */
+- /* zero-out out LCD bits */
- sys_clksrc = au_readl(SYS_CLKSRC) & ~0x000003e0;
-+ sys_clksrc = au_readl(SYS_CLKSRC) & ~0x000003e0;
- sys_clksrc |= p_lcd->mode_toyclksrc;
- au_writel(sys_clksrc, SYS_CLKSRC);
-
-@@ -598,8 +598,8 @@ int __init au1100fb_init(void)
- fbgen_install_cmap(0, &fb_info.gen);
- if (register_framebuffer(&fb_info.gen.info) < 0)
- return -EINVAL;
+- sys_clksrc |= p_lcd->mode_toyclksrc;
+- au_writel(sys_clksrc, SYS_CLKSRC);
+-
+- /* FIXME add check to make sure auxpll is what is expected! */
+- au1100_setmode();
+-
+- fb_info.gen.parsize = sizeof(struct au1100fb_par);
+- fb_info.gen.fbhw = &au1100_switch;
+-
+- strcpy(fb_info.gen.info.modename, "Au1100 LCD");
+- fb_info.gen.info.changevar = NULL;
+- fb_info.gen.info.node = -1;
+-
+- fb_info.gen.info.fbops = &au1100fb_ops;
+- fb_info.gen.info.disp = &disp;
+- fb_info.gen.info.switch_con = &fbgen_switch;
+- fb_info.gen.info.updatevar = &fbgen_update_var;
+- fb_info.gen.info.blank = &fbgen_blank;
+- fb_info.gen.info.flags = FBINFO_FLAG_DEFAULT;
+-
+- /* This should give a reasonable default video mode */
+- fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
+- fbgen_do_set_var(&disp.var, 1, &fb_info.gen);
+- fbgen_set_disp(-1, &fb_info.gen);
+- fbgen_install_cmap(0, &fb_info.gen);
+- if (register_framebuffer(&fb_info.gen.info) < 0)
+- return -EINVAL;
- printk(KERN_INFO "fb%d: %s frame buffer device\n",
- GET_FB_IDX(fb_info.gen.info.node),
-+ printk(KERN_INFO "fb%d: %s frame buffer device\n",
-+ GET_FB_IDX(fb_info.gen.info.node),
- fb_info.gen.info.modename);
+- fb_info.gen.info.modename);
++ /* Setup LCD clock to AUX (48 MHz) */
++ sys_clksrc = au_readl(SYS_CLKSRC) & ~(SYS_CS_ML_MASK | SYS_CS_DL | SYS_CS_CL);
++ au_writel((sys_clksrc | (1 << SYS_CS_ML_BIT)), SYS_CLKSRC);
++
++ /* load the panel info into the var struct */
++ au1100fb_var.bits_per_pixel = fbdev->panel->bpp;
++ au1100fb_var.xres = fbdev->panel->xres;
++ au1100fb_var.xres_virtual = au1100fb_var.xres;
++ au1100fb_var.yres = fbdev->panel->yres;
++ au1100fb_var.yres_virtual = au1100fb_var.yres;
++
++ fbdev->info.screen_base = fbdev->fb_mem;
++ fbdev->info.fbops = &au1100fb_ops;
++ fbdev->info.fix = au1100fb_fix;
++
++ if (!(fbdev->info.pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL))) {
++ return -ENOMEM;
++ }
++ memset(fbdev->info.pseudo_palette, 0, sizeof(u32) * 16);
++
++ if (fb_alloc_cmap(&fbdev->info.cmap, AU1100_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
++ print_err("Fail to allocate colormap (%d entries)",
++ AU1100_LCD_NBR_PALETTE_ENTRIES);
++ kfree(fbdev->info.pseudo_palette);
++ return -EFAULT;
++ }
++
++ fbdev->info.var = au1100fb_var;
++
++ /* Set h/w registers */
++ au1100fb_setmode(fbdev);
++
++ /* Register new framebuffer */
++ if (register_framebuffer(&fbdev->info) < 0) {
++ print_err("cannot register new framebuffer");
++ goto failed;
++ }
return 0;
-@@ -618,7 +618,7 @@ void au1100fb_setup(char *options, int *
- int i;
- int num_panels = sizeof(panels)/sizeof(struct known_lcd_panels);
+-}
--
++failed:
++ if (fbdev->regs) {
++ release_mem_region(fbdev->regs_phys, fbdev->regs_len);
++ }
++ if (fbdev->fb_mem) {
++ dma_free_noncoherent(dev, fbdev->fb_len, fbdev->fb_mem, fbdev->fb_phys);
++ }
++ if (fbdev->info.cmap.len != 0) {
++ fb_dealloc_cmap(&fbdev->info.cmap);
++ }
++ kfree(fbdev);
++ dev_set_drvdata(dev, NULL);
++
++ return 0;
++}
+
+-void au1100fb_cleanup(struct fb_info *info)
++int au1100fb_drv_remove(struct device *dev)
+ {
+- unregister_framebuffer(info);
++ struct au1100fb_device *fbdev = NULL;
++
++ if (!dev)
++ return -ENODEV;
++
++ fbdev = (struct au1100fb_device*) dev_get_drvdata(dev);
++
++#if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO)
++ au1100fb_fb_blank(VESA_POWERDOWN, &fbdev->info);
++#endif
++ fbdev->regs->lcd_control &= ~LCD_CONTROL_GO;
++
++ /* Clean up all probe data */
++ unregister_framebuffer(&fbdev->info);
++
++ release_mem_region(fbdev->regs_phys, fbdev->regs_len);
++
++ dma_free_coherent(dev, PAGE_ALIGN(fbdev->fb_len), fbdev->fb_mem, fbdev->fb_phys);
++
++ fb_dealloc_cmap(&fbdev->info.cmap);
++ kfree(fbdev->info.pseudo_palette);
++ kfree((void*)fbdev);
++
++ return 0;
+ }
+
++int au1100fb_drv_suspend(struct device *dev, u32 state, u32 level)
++{
++ /* TODO */
++ return 0;
++}
+
+-void au1100fb_setup(char *options, int *ints)
++int au1100fb_drv_resume(struct device *dev, u32 level)
+ {
+- char* this_opt;
+- int i;
+- int num_panels = sizeof(panels)/sizeof(struct known_lcd_panels);
++ /* TODO */
++ return 0;
++}
+
++static struct device_driver au1100fb_driver = {
++ .name = "au1100-lcd",
++ .bus = &platform_bus_type,
++
++ .probe = au1100fb_drv_probe,
++ .remove = au1100fb_drv_remove,
++ .suspend = au1100fb_drv_suspend,
++ .resume = au1100fb_drv_resume,
++};
+
- if (!options || !*options)
- return;
++/*-------------------------------------------------------------------------*/
-@@ -640,7 +640,7 @@ void au1100fb_setup(char *options, int *
- #endif
- /* Get the panel name, everything else if fixed */
- for (i=0; i<num_panels; i++) {
+- if (!options || !*options)
+- return;
++/* Kernel driver */
++
++int au1100fb_setup(char *options)
++{
++ char* this_opt;
++ int num_panels = ARRAY_SIZE(known_lcd_panels);
++ char* mode = NULL;
++ int panel_idx = 0;
++
++ if (num_panels <= 0) {
++ print_err("No LCD panels supported by driver!");
++ return -EFAULT;
++ }
+
+- for(this_opt=strtok(options, ","); this_opt;
+- this_opt=strtok(NULL, ",")) {
++ if (options) {
++ while ((this_opt = strsep(&options,",")) != NULL) {
++ /* Panel option */
+ if (!strncmp(this_opt, "panel:", 6)) {
+-#if defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1100)
+- /* Read Pb1100 Switch S10 ? */
+- if (!strncmp(this_opt+6, "s10", 3))
+- {
+- int panel;
+- panel = *(volatile int *)0xAE000008; /* BCSR SWITCHES */
+- panel >>= 8;
+- panel &= 0x0F;
+- if (panel >= num_panels) panel = 0;
+- my_lcd_index = panel;
+- }
+- else
+-#endif
+- /* Get the panel name, everything else if fixed */
+- for (i=0; i<num_panels; i++) {
- if (!strncmp(this_opt+6, panels[i].panel_name,
-+ if (!strncmp(this_opt+6, panels[i].panel_name,
++ int i;
++ this_opt += 6;
++ for (i = 0; i < num_panels; i++) {
++ if (!strncmp(this_opt,
++ known_lcd_panels[i].name,
strlen(this_opt))) {
- my_lcd_index = i;
+- my_lcd_index = i;
++ panel_idx = i;
break;
-@@ -651,7 +651,7 @@ void au1100fb_setup(char *options, int *
- printk("nohwcursor\n");
- fb_info.nohwcursor = 1;
+ }
+ }
++ if (i >= num_panels) {
++ print_warn("Panel %s not supported!", this_opt);
++ }
++ }
++ /* Mode option (only option that start with digit) */
++ else if (isdigit(this_opt[0])) {
++ mode = kmalloc(strlen(this_opt) + 1, GFP_KERNEL);
++ strncpy(mode, this_opt, strlen(this_opt) + 1);
++ }
++ /* Unsupported option */
++ else {
++ print_warn("Unsupported option \"%s\"", this_opt);
}
+- else if (!strncmp(this_opt, "nohwcursor", 10)) {
+- printk("nohwcursor\n");
+- fb_info.nohwcursor = 1;
+ }
- }
+ }
- printk("au1100fb: Panel %d %s\n", my_lcd_index,
- panels[my_lcd_index].panel_name);
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/au1100fb.h linux_HEAD/drivers/video/au1100fb.h
---- linux-2.6.11.6/drivers/video/au1100fb.h 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/drivers/video/au1100fb.h 2002-07-14 23:33:34.000000000 +0200
-@@ -195,7 +195,7 @@ struct known_lcd_panels panels[] =
- 320, /* xres */
- 240, /* yres */
- 16, /* bpp */
+- printk("au1100fb: Panel %d %s\n", my_lcd_index,
+- panels[my_lcd_index].panel_name);
+-}
++ drv_info.panel_idx = panel_idx;
++ drv_info.opt_mode = mode;
+
++ print_info("Panel=%s Mode=%s",
++ known_lcd_panels[drv_info.panel_idx].name,
++ drv_info.opt_mode ? drv_info.opt_mode : "default");
+
++ return 0;
++}
+
+-#ifdef MODULE
+-MODULE_LICENSE("GPL");
+-int init_module(void)
++int __init au1100fb_init(void)
+ {
+- return au1100fb_init();
++ char* options;
++ int ret;
++
++ print_info("" DRIVER_DESC "");
++
++ memset(&drv_info, 0, sizeof(drv_info));
++
++ if (fb_get_options(DRIVER_NAME, &options))
++ return -ENODEV;
++
++ /* Setup driver with options */
++ ret = au1100fb_setup(options);
++ if (ret < 0) {
++ print_err("Fail to setup driver");
++ return ret;
++ }
++
++ return driver_register(&au1100fb_driver);
+ }
+
+-void cleanup_module(void)
++void __exit au1100fb_cleanup(void)
+ {
+- au1100fb_cleanup(void);
++ driver_unregister(&au1100fb_driver);
++
++ if (drv_info.opt_mode)
++ kfree(drv_info.opt_mode);
+ }
+
+-MODULE_AUTHOR("Pete Popov <ppopov at mvista.com>");
+-MODULE_DESCRIPTION("Au1100 LCD framebuffer device driver");
+-#endif /* MODULE */
++module_init(au1100fb_init);
++module_exit(au1100fb_cleanup);
++
++MODULE_DESCRIPTION(DRIVER_DESC);
++MODULE_LICENSE("GPL");
+diff -urpNX dontdiff linux-2.6.12/drivers/video/au1100fb.h linux_HEAD/drivers/video/au1100fb.h
+--- linux-2.6.12/drivers/video/au1100fb.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/video/au1100fb.h 2005-04-05 06:42:36.000000000 +0200
+@@ -30,352 +30,352 @@
+ #ifndef _AU1100LCD_H
+ #define _AU1100LCD_H
+
++#include <asm/mach-au1x00/au1000.h>
++
++#define print_err(f, arg...) printk(KERN_ERR DRIVER_NAME ": " f "\n", ## arg)
++#define print_warn(f, arg...) printk(KERN_WARNING DRIVER_NAME ": " f "\n", ## arg)
++#define print_info(f, arg...) printk(KERN_INFO DRIVER_NAME ": " f "\n", ## arg)
++
++#if DEBUG
++#define print_dbg(f, arg...) printk(__FILE__ ": " f "\n", ## arg)
++#else
++#define print_dbg(f, arg...) do {} while (0)
++#endif
++
++#if defined(__BIG_ENDIAN)
++#define LCD_CONTROL_DEFAULT_PO LCD_CONTROL_PO_11
++#else
++#define LCD_CONTROL_DEFAULT_PO LCD_CONTROL_PO_00
++#endif
++#define LCD_CONTROL_DEFAULT_SBPPF LCD_CONTROL_SBPPF_565
++
+ /********************************************************************/
+-#define uint32 unsigned long
+-typedef volatile struct
+-{
+- uint32 lcd_control;
+- uint32 lcd_intstatus;
+- uint32 lcd_intenable;
+- uint32 lcd_horztiming;
+- uint32 lcd_verttiming;
+- uint32 lcd_clkcontrol;
+- uint32 lcd_dmaaddr0;
+- uint32 lcd_dmaaddr1;
+- uint32 lcd_words;
+- uint32 lcd_pwmdiv;
+- uint32 lcd_pwmhi;
+- uint32 reserved[(0x0400-0x002C)/4];
+- uint32 lcd_pallettebase[256];
+
+-} AU1100_LCD;
++/* LCD controller restrictions */
++#define AU1100_LCD_MAX_XRES 800
++#define AU1100_LCD_MAX_YRES 600
++#define AU1100_LCD_MAX_BPP 16
++#define AU1100_LCD_MAX_CLK 48000000
++#define AU1100_LCD_NBR_PALETTE_ENTRIES 256
++
++/* Default number of visible screen buffer to allocate */
++#define AU1100FB_NBR_VIDEO_BUFFERS 4
+
+ /********************************************************************/
+
+-#define AU1100_LCD_ADDR 0xB5000000
++struct au1100fb_panel
++{
++ const char name[25]; /* Full name <vendor>_<model> */
+
+-/*
+- * Register bit definitions
+- */
++ u32 control_base; /* Mode-independent control values */
++ u32 clkcontrol_base; /* Panel pixclock preferences */
+
+-/* lcd_control */
+-#define LCD_CONTROL_SBPPF (7<<18)
+-#define LCD_CONTROL_SBPPF_655 (0<<18)
+-#define LCD_CONTROL_SBPPF_565 (1<<18)
+-#define LCD_CONTROL_SBPPF_556 (2<<18)
+-#define LCD_CONTROL_SBPPF_1555 (3<<18)
+-#define LCD_CONTROL_SBPPF_5551 (4<<18)
+-#define LCD_CONTROL_WP (1<<17)
+-#define LCD_CONTROL_WD (1<<16)
+-#define LCD_CONTROL_C (1<<15)
+-#define LCD_CONTROL_SM (3<<13)
+-#define LCD_CONTROL_SM_0 (0<<13)
+-#define LCD_CONTROL_SM_90 (1<<13)
+-#define LCD_CONTROL_SM_180 (2<<13)
+-#define LCD_CONTROL_SM_270 (3<<13)
+-#define LCD_CONTROL_DB (1<<12)
+-#define LCD_CONTROL_CCO (1<<11)
+-#define LCD_CONTROL_DP (1<<10)
+-#define LCD_CONTROL_PO (3<<8)
+-#define LCD_CONTROL_PO_00 (0<<8)
+-#define LCD_CONTROL_PO_01 (1<<8)
+-#define LCD_CONTROL_PO_10 (2<<8)
+-#define LCD_CONTROL_PO_11 (3<<8)
+-#define LCD_CONTROL_MPI (1<<7)
+-#define LCD_CONTROL_PT (1<<6)
+-#define LCD_CONTROL_PC (1<<5)
+-#define LCD_CONTROL_BPP (7<<1)
+-#define LCD_CONTROL_BPP_1 (0<<1)
+-#define LCD_CONTROL_BPP_2 (1<<1)
+-#define LCD_CONTROL_BPP_4 (2<<1)
+-#define LCD_CONTROL_BPP_8 (3<<1)
+-#define LCD_CONTROL_BPP_12 (4<<1)
+-#define LCD_CONTROL_BPP_16 (5<<1)
+-#define LCD_CONTROL_GO (1<<0)
-
-+
- "Sharp_320x240_16",
- /* mode_control */
+-/* lcd_intstatus, lcd_intenable */
+-#define LCD_INT_SD (1<<7)
+-#define LCD_INT_OF (1<<6)
+-#define LCD_INT_UF (1<<5)
+-#define LCD_INT_SA (1<<3)
+-#define LCD_INT_SS (1<<2)
+-#define LCD_INT_S1 (1<<1)
+-#define LCD_INT_S0 (1<<0)
+-
+-/* lcd_horztiming */
+-#define LCD_HORZTIMING_HN2 (255<<24)
+-#define LCD_HORZTIMING_HN2_N(N) (((N)-1)<<24)
+-#define LCD_HORZTIMING_HN1 (255<<16)
+-#define LCD_HORZTIMING_HN1_N(N) (((N)-1)<<16)
+-#define LCD_HORZTIMING_HPW (63<<10)
+-#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<10)
+-#define LCD_HORZTIMING_PPL (1023<<0)
+-#define LCD_HORZTIMING_PPL_N(N) (((N)-1)<<0)
+-
+-/* lcd_verttiming */
+-#define LCD_VERTTIMING_VN2 (255<<24)
+-#define LCD_VERTTIMING_VN2_N(N) (((N)-1)<<24)
+-#define LCD_VERTTIMING_VN1 (255<<16)
+-#define LCD_VERTTIMING_VN1_N(N) (((N)-1)<<16)
+-#define LCD_VERTTIMING_VPW (63<<10)
+-#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<10)
+-#define LCD_VERTTIMING_LPP (1023<<0)
+-#define LCD_VERTTIMING_LPP_N(N) (((N)-1)<<0)
+-
+-/* lcd_clkcontrol */
+-#define LCD_CLKCONTROL_IB (1<<18)
+-#define LCD_CLKCONTROL_IC (1<<17)
+-#define LCD_CLKCONTROL_IH (1<<16)
+-#define LCD_CLKCONTROL_IV (1<<15)
+-#define LCD_CLKCONTROL_BF (31<<10)
+-#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
+-#define LCD_CLKCONTROL_PCD (1023<<0)
+-#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
+-
+-/* lcd_pwmdiv */
+-#define LCD_PWMDIV_EN (1<<12)
+-#define LCD_PWMDIV_PWMDIV (2047<<0)
+-#define LCD_PWMDIV_PWMDIV_N(N) (((N)-1)<<0)
+-
+-/* lcd_pwmhi */
+-#define LCD_PWMHI_PWMHI1 (2047<<12)
+-#define LCD_PWMHI_PWMHI1_N(N) ((N)<<12)
+-#define LCD_PWMHI_PWMHI0 (2047<<0)
+-#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
+-
+-/* lcd_pallettebase - MONOCHROME */
+-#define LCD_PALLETTE_MONO_MI (15<<0)
+-#define LCD_PALLETTE_MONO_MI_N(N) ((N)<<0)
+-
+-/* lcd_pallettebase - COLOR */
+-#define LCD_PALLETTE_COLOR_BI (15<<8)
+-#define LCD_PALLETTE_COLOR_BI_N(N) ((N)<<8)
+-#define LCD_PALLETTE_COLOR_GI (15<<4)
+-#define LCD_PALLETTE_COLOR_GI_N(N) ((N)<<4)
+-#define LCD_PALLETTE_COLOR_RI (15<<0)
+-#define LCD_PALLETTE_COLOR_RI_N(N) ((N)<<0)
+-
+-/* lcd_palletebase - COLOR TFT PALLETIZED */
+-#define LCD_PALLETTE_TFT_DC (65535<<0)
+-#define LCD_PALLETTE_TFT_DC_N(N) ((N)<<0)
++ u32 horztiming;
++ u32 verttiming;
+
+-/********************************************************************/
++ u32 xres; /* Maximum horizontal resolution */
++ u32 yres; /* Maximum vertical resolution */
++ u32 bpp; /* Maximum depth supported */
++};
+
+-struct known_lcd_panels
++struct au1100fb_regs
+ {
+- uint32 xres;
+- uint32 yres;
+- uint32 bpp;
+- unsigned char panel_name[256];
+- uint32 mode_control;
+- uint32 mode_horztiming;
+- uint32 mode_verttiming;
+- uint32 mode_clkcontrol;
+- uint32 mode_pwmdiv;
+- uint32 mode_pwmhi;
+- uint32 mode_toyclksrc;
+- uint32 mode_backlight;
++ u32 lcd_control;
++ u32 lcd_intstatus;
++ u32 lcd_intenable;
++ u32 lcd_horztiming;
++ u32 lcd_verttiming;
++ u32 lcd_clkcontrol;
++ u32 lcd_dmaaddr0;
++ u32 lcd_dmaaddr1;
++ u32 lcd_words;
++ u32 lcd_pwmdiv;
++ u32 lcd_pwmhi;
++ u32 reserved[(0x0400-0x002C)/4];
++ u32 lcd_pallettebase[256];
++};
++
++struct au1100fb_device {
++
++ struct fb_info info; /* FB driver info record */
++
++ struct au1100fb_panel *panel; /* Panel connected to this device */
+
++ struct au1100fb_regs* regs; /* Registers memory map */
++ size_t regs_len;
++ unsigned int regs_phys;
++
++ unsigned char* fb_mem; /* FrameBuffer memory map */
++ size_t fb_len;
++ dma_addr_t fb_phys;
+ };
+
+-#if defined(__BIG_ENDIAN)
+-#define LCD_DEFAULT_PIX_FORMAT LCD_CONTROL_PO_11
+-#else
+-#define LCD_DEFAULT_PIX_FORMAT LCD_CONTROL_PO_00
+-#endif
++/********************************************************************/
+
+-/*
+- * The fb driver assumes that AUX PLL is at 48MHz. That can
+- * cover up to 800x600 resolution; if you need higher resolution,
+- * you should modify the driver as needed, not just this structure.
++#define LCD_CONTROL (AU1100_LCD_BASE + 0x0)
++ #define LCD_CONTROL_SBB_BIT 21
++ #define LCD_CONTROL_SBB_MASK (0x3 << LCD_CONTROL_SBB_BIT)
++ #define LCD_CONTROL_SBB_1 (0 << LCD_CONTROL_SBB_BIT)
++ #define LCD_CONTROL_SBB_2 (1 << LCD_CONTROL_SBB_BIT)
++ #define LCD_CONTROL_SBB_3 (2 << LCD_CONTROL_SBB_BIT)
++ #define LCD_CONTROL_SBB_4 (3 << LCD_CONTROL_SBB_BIT)
++ #define LCD_CONTROL_SBPPF_BIT 18
++ #define LCD_CONTROL_SBPPF_MASK (0x7 << LCD_CONTROL_SBPPF_BIT)
++ #define LCD_CONTROL_SBPPF_655 (0 << LCD_CONTROL_SBPPF_BIT)
++ #define LCD_CONTROL_SBPPF_565 (1 << LCD_CONTROL_SBPPF_BIT)
++ #define LCD_CONTROL_SBPPF_556 (2 << LCD_CONTROL_SBPPF_BIT)
++ #define LCD_CONTROL_SBPPF_1555 (3 << LCD_CONTROL_SBPPF_BIT)
++ #define LCD_CONTROL_SBPPF_5551 (4 << LCD_CONTROL_SBPPF_BIT)
++ #define LCD_CONTROL_WP (1<<17)
++ #define LCD_CONTROL_WD (1<<16)
++ #define LCD_CONTROL_C (1<<15)
++ #define LCD_CONTROL_SM_BIT 13
++ #define LCD_CONTROL_SM_MASK (0x3 << LCD_CONTROL_SM_BIT)
++ #define LCD_CONTROL_SM_0 (0 << LCD_CONTROL_SM_BIT)
++ #define LCD_CONTROL_SM_90 (1 << LCD_CONTROL_SM_BIT)
++ #define LCD_CONTROL_SM_180 (2 << LCD_CONTROL_SM_BIT)
++ #define LCD_CONTROL_SM_270 (3 << LCD_CONTROL_SM_BIT)
++ #define LCD_CONTROL_DB (1<<12)
++ #define LCD_CONTROL_CCO (1<<11)
++ #define LCD_CONTROL_DP (1<<10)
++ #define LCD_CONTROL_PO_BIT 8
++ #define LCD_CONTROL_PO_MASK (0x3 << LCD_CONTROL_PO_BIT)
++ #define LCD_CONTROL_PO_00 (0 << LCD_CONTROL_PO_BIT)
++ #define LCD_CONTROL_PO_01 (1 << LCD_CONTROL_PO_BIT)
++ #define LCD_CONTROL_PO_10 (2 << LCD_CONTROL_PO_BIT)
++ #define LCD_CONTROL_PO_11 (3 << LCD_CONTROL_PO_BIT)
++ #define LCD_CONTROL_MPI (1<<7)
++ #define LCD_CONTROL_PT (1<<6)
++ #define LCD_CONTROL_PC (1<<5)
++ #define LCD_CONTROL_BPP_BIT 1
++ #define LCD_CONTROL_BPP_MASK (0x7 << LCD_CONTROL_BPP_BIT)
++ #define LCD_CONTROL_BPP_1 (0 << LCD_CONTROL_BPP_BIT)
++ #define LCD_CONTROL_BPP_2 (1 << LCD_CONTROL_BPP_BIT)
++ #define LCD_CONTROL_BPP_4 (2 << LCD_CONTROL_BPP_BIT)
++ #define LCD_CONTROL_BPP_8 (3 << LCD_CONTROL_BPP_BIT)
++ #define LCD_CONTROL_BPP_12 (4 << LCD_CONTROL_BPP_BIT)
++ #define LCD_CONTROL_BPP_16 (5 << LCD_CONTROL_BPP_BIT)
++ #define LCD_CONTROL_GO (1<<0)
++
++#define LCD_INTSTATUS (AU1100_LCD_BASE + 0x4)
++#define LCD_INTENABLE (AU1100_LCD_BASE + 0x8)
++ #define LCD_INT_SD (1<<7)
++ #define LCD_INT_OF (1<<6)
++ #define LCD_INT_UF (1<<5)
++ #define LCD_INT_SA (1<<3)
++ #define LCD_INT_SS (1<<2)
++ #define LCD_INT_S1 (1<<1)
++ #define LCD_INT_S0 (1<<0)
++
++#define LCD_HORZTIMING (AU1100_LCD_BASE + 0xC)
++ #define LCD_HORZTIMING_HN2_BIT 24
++ #define LCD_HORZTIMING_HN2_MASK (0xFF << LCD_HORZTIMING_HN2_BIT)
++ #define LCD_HORZTIMING_HN2_N(N) ((((N)-1) << LCD_HORZTIMING_HN2_BIT) & LCD_HORZTIMING_HN2_MASK)
++ #define LCD_HORZTIMING_HN1_BIT 16
++ #define LCD_HORZTIMING_HN1_MASK (0xFF << LCD_HORZTIMING_HN1_BIT)
++ #define LCD_HORZTIMING_HN1_N(N) ((((N)-1) << LCD_HORZTIMING_HN1_BIT) & LCD_HORZTIMING_HN1_MASK)
++ #define LCD_HORZTIMING_HPW_BIT 10
++ #define LCD_HORZTIMING_HPW_MASK (0x3F << LCD_HORZTIMING_HPW_BIT)
++ #define LCD_HORZTIMING_HPW_N(N) ((((N)-1) << LCD_HORZTIMING_HPW_BIT) & LCD_HORZTIMING_HPW_MASK)
++ #define LCD_HORZTIMING_PPL_BIT 0
++ #define LCD_HORZTIMING_PPL_MASK (0x3FF << LCD_HORZTIMING_PPL_BIT)
++ #define LCD_HORZTIMING_PPL_N(N) ((((N)-1) << LCD_HORZTIMING_PPL_BIT) & LCD_HORZTIMING_PPL_MASK)
++
++#define LCD_VERTTIMING (AU1100_LCD_BASE + 0x10)
++ #define LCD_VERTTIMING_VN2_BIT 24
++ #define LCD_VERTTIMING_VN2_MASK (0xFF << LCD_VERTTIMING_VN2_BIT)
++ #define LCD_VERTTIMING_VN2_N(N) ((((N)-1) << LCD_VERTTIMING_VN2_BIT) & LCD_VERTTIMING_VN2_MASK)
++ #define LCD_VERTTIMING_VN1_BIT 16
++ #define LCD_VERTTIMING_VN1_MASK (0xFF << LCD_VERTTIMING_VN1_BIT)
++ #define LCD_VERTTIMING_VN1_N(N) ((((N)-1) << LCD_VERTTIMING_VN1_BIT) & LCD_VERTTIMING_VN1_MASK)
++ #define LCD_VERTTIMING_VPW_BIT 10
++ #define LCD_VERTTIMING_VPW_MASK (0x3F << LCD_VERTTIMING_VPW_BIT)
++ #define LCD_VERTTIMING_VPW_N(N) ((((N)-1) << LCD_VERTTIMING_VPW_BIT) & LCD_VERTTIMING_VPW_MASK)
++ #define LCD_VERTTIMING_LPP_BIT 0
++ #define LCD_VERTTIMING_LPP_MASK (0x3FF << LCD_VERTTIMING_LPP_BIT)
++ #define LCD_VERTTIMING_LPP_N(N) ((((N)-1) << LCD_VERTTIMING_LPP_BIT) & LCD_VERTTIMING_LPP_MASK)
++
++#define LCD_CLKCONTROL (AU1100_LCD_BASE + 0x14)
++ #define LCD_CLKCONTROL_IB (1<<18)
++ #define LCD_CLKCONTROL_IC (1<<17)
++ #define LCD_CLKCONTROL_IH (1<<16)
++ #define LCD_CLKCONTROL_IV (1<<15)
++ #define LCD_CLKCONTROL_BF_BIT 10
++ #define LCD_CLKCONTROL_BF_MASK (0x1F << LCD_CLKCONTROL_BF_BIT)
++ #define LCD_CLKCONTROL_BF_N(N) ((((N)-1) << LCD_CLKCONTROL_BF_BIT) & LCD_CLKCONTROL_BF_MASK)
++ #define LCD_CLKCONTROL_PCD_BIT 0
++ #define LCD_CLKCONTROL_PCD_MASK (0x3FF << LCD_CLKCONTROL_PCD_BIT)
++ #define LCD_CLKCONTROL_PCD_N(N) (((N) << LCD_CLKCONTROL_PCD_BIT) & LCD_CLKCONTROL_PCD_MASK)
++
++#define LCD_DMAADDR0 (AU1100_LCD_BASE + 0x18)
++#define LCD_DMAADDR1 (AU1100_LCD_BASE + 0x1C)
++ #define LCD_DMA_SA_BIT 5
++ #define LCD_DMA_SA_MASK (0x7FFFFFF << LCD_DMA_SA_BIT)
++ #define LCD_DMA_SA_N(N) ((N) & LCD_DMA_SA_MASK)
++
++#define LCD_WORDS (AU1100_LCD_BASE + 0x20)
++ #define LCD_WRD_WRDS_BIT 0
++ #define LCD_WRD_WRDS_MASK (0xFFFFFFFF << LCD_WRD_WRDS_BIT)
++ #define LCD_WRD_WRDS_N(N) ((((N)-1) << LCD_WRD_WRDS_BIT) & LCD_WRD_WRDS_MASK)
++
++#define LCD_PWMDIV (AU1100_LCD_BASE + 0x24)
++ #define LCD_PWMDIV_EN (1<<12)
++ #define LCD_PWMDIV_PWMDIV_BIT 0
++ #define LCD_PWMDIV_PWMDIV_MASK (0xFFF << LCD_PWMDIV_PWMDIV_BIT)
++ #define LCD_PWMDIV_PWMDIV_N(N) ((((N)-1) << LCD_PWMDIV_PWMDIV_BIT) & LCD_PWMDIV_PWMDIV_MASK)
++
++#define LCD_PWMHI (AU1100_LCD_BASE + 0x28)
++ #define LCD_PWMHI_PWMHI1_BIT 12
++ #define LCD_PWMHI_PWMHI1_MASK (0xFFF << LCD_PWMHI_PWMHI1_BIT)
++ #define LCD_PWMHI_PWMHI1_N(N) (((N) << LCD_PWMHI_PWMHI1_BIT) & LCD_PWMHI_PWMHI1_MASK)
++ #define LCD_PWMHI_PWMHI0_BIT 0
++ #define LCD_PWMHI_PWMHI0_MASK (0xFFF << LCD_PWMHI_PWMHI0_BIT)
++ #define LCD_PWMHI_PWMHI0_N(N) (((N) << LCD_PWMHI_PWMHI0_BIT) & LCD_PWMHI_PWMHI0_MASK)
++
++#define LCD_PALLETTEBASE (AU1100_LCD_BASE + 0x400)
++ #define LCD_PALLETTE_MONO_MI_BIT 0
++ #define LCD_PALLETTE_MONO_MI_MASK (0xF << LCD_PALLETTE_MONO_MI_BIT)
++ #define LCD_PALLETTE_MONO_MI_N(N) (((N)<< LCD_PALLETTE_MONO_MI_BIT) & LCD_PALLETTE_MONO_MI_MASK)
++
++ #define LCD_PALLETTE_COLOR_RI_BIT 8
++ #define LCD_PALLETTE_COLOR_RI_MASK (0xF << LCD_PALLETTE_COLOR_RI_BIT)
++ #define LCD_PALLETTE_COLOR_RI_N(N) (((N)<< LCD_PALLETTE_COLOR_RI_BIT) & LCD_PALLETTE_COLOR_RI_MASK)
++ #define LCD_PALLETTE_COLOR_GI_BIT 4
++ #define LCD_PALLETTE_COLOR_GI_MASK (0xF << LCD_PALLETTE_COLOR_GI_BIT)
++ #define LCD_PALLETTE_COLOR_GI_N(N) (((N)<< LCD_PALLETTE_COLOR_GI_BIT) & LCD_PALLETTE_COLOR_GI_MASK)
++ #define LCD_PALLETTE_COLOR_BI_BIT 0
++ #define LCD_PALLETTE_COLOR_BI_MASK (0xF << LCD_PALLETTE_COLOR_BI_BIT)
++ #define LCD_PALLETTE_COLOR_BI_N(N) (((N)<< LCD_PALLETTE_COLOR_BI_BIT) & LCD_PALLETTE_COLOR_BI_MASK)
++
++ #define LCD_PALLETTE_TFT_DC_BIT 0
++ #define LCD_PALLETTE_TFT_DC_MASK (0xFFFF << LCD_PALLETTE_TFT_DC_BIT)
++ #define LCD_PALLETTE_TFT_DC_N(N) (((N)<< LCD_PALLETTE_TFT_DC_BIT) & LCD_PALLETTE_TFT_DC_MASK)
++
++/********************************************************************/
++
++/* List of panels known to work with the AU1100 LCD controller.
++ * To add a new panel, enter the same specifications as the
++ * Generic_TFT one, and MAKE SURE that it doesn't conflicts
++ * with the controller restrictions. Restrictions are:
++ *
++ * STN color panels: max_bpp <= 12
++ * STN mono panels: max_bpp <= 4
++ * TFT panels: max_bpp <= 16
++ * max_xres <= 800
++ * max_yres <= 600
+ */
+-struct known_lcd_panels panels[] =
++static struct au1100fb_panel known_lcd_panels[] =
+ {
+- { /* 0: Pb1100 LCDA: Sharp 320x240 TFT panel */
+- 320, /* xres */
+- 240, /* yres */
+- 16, /* bpp */
+-
+- "Sharp_320x240_16",
+- /* mode_control */
++ /* 800x600x16bpp CRT */
++ [0] = {
++ .name = "CRT_800x600_16",
++ .xres = 800,
++ .yres = 600,
++ .bpp = 16,
++ .control_base = 0x0004886A |
++ LCD_CONTROL_DEFAULT_PO | LCD_CONTROL_DEFAULT_SBPPF |
++ LCD_CONTROL_BPP_16,
++ .clkcontrol_base = 0x00020000,
++ .horztiming = 0x005aff1f,
++ .verttiming = 0x16000e57,
++ },
++ /* just the standard LCD */
++ [1] = {
++ .name = "WWPC LCD",
++ .xres = 240,
++ .yres = 320,
++ .bpp = 16,
++ .control_base = 0x0006806A,
++ .horztiming = 0x0A1010EF,
++ .verttiming = 0x0301013F,
++ .clkcontrol_base = 0x00018001,
++ },
++ /* Sharp 320x240 TFT panel */
++ [2] = {
++ .name = "Sharp_LQ038Q5DR01",
++ .xres = 320,
++ .yres = 240,
++ .bpp = 16,
++ .control_base =
( LCD_CONTROL_SBPPF_565
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/bt431.h linux_HEAD/drivers/video/bt431.h
---- linux-2.6.11.6/drivers/video/bt431.h 2005-03-26 04:28:26.000000000 +0100
-+++ linux_HEAD/drivers/video/bt431.h 2003-11-16 09:21:14.000000000 +0100
-@@ -176,7 +176,7 @@ static inline void bt431_position_cursor
- {
- /*
- * Magic from the MACH sources.
-- *
-+ *
- * Cx = x + D + H - P
- * P = 37 if 1:1, 52 if 4:1, 57 if 5:1
- * D = pixel skew between outdata and external data
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/epson1356fb.c linux_HEAD/drivers/video/epson1356fb.c
---- linux-2.6.11.6/drivers/video/epson1356fb.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/drivers/video/epson1356fb.c 2005-02-28 16:56:54.000000000 +0100
+- /*LCD_CONTROL_WP*/
+- /*LCD_CONTROL_WD*/
+ | LCD_CONTROL_C
+ | LCD_CONTROL_SM_0
+- /*LCD_CONTROL_DB*/
+- /*LCD_CONTROL_CCO*/
+- /*LCD_CONTROL_DP*/
+- | LCD_DEFAULT_PIX_FORMAT
+- /*LCD_CONTROL_MPI*/
++ | LCD_CONTROL_DEFAULT_PO
+ | LCD_CONTROL_PT
+ | LCD_CONTROL_PC
+ | LCD_CONTROL_BPP_16 ),
+-
+- /* mode_horztiming */
++ .horztiming =
+ ( LCD_HORZTIMING_HN2_N(8)
+ | LCD_HORZTIMING_HN1_N(60)
+ | LCD_HORZTIMING_HPW_N(12)
+ | LCD_HORZTIMING_PPL_N(320) ),
+-
+- /* mode_verttiming */
++ .verttiming =
+ ( LCD_VERTTIMING_VN2_N(5)
+ | LCD_VERTTIMING_VN1_N(17)
+ | LCD_VERTTIMING_VPW_N(1)
+ | LCD_VERTTIMING_LPP_N(240) ),
+-
+- /* mode_clkcontrol */
+- ( 0
+- /*LCD_CLKCONTROL_IB*/
+- /*LCD_CLKCONTROL_IC*/
+- /*LCD_CLKCONTROL_IH*/
+- /*LCD_CLKCONTROL_IV*/
+- | LCD_CLKCONTROL_PCD_N(1) ),
+-
+- /* mode_pwmdiv */
+- 0,
+-
+- /* mode_pwmhi */
+- 0,
+-
+- /* mode_toyclksrc */
+- ((1<<7) | (1<<6) | (1<<5)),
+-
+- /* mode_backlight */
+- 6
++ .clkcontrol_base = LCD_CLKCONTROL_PCD_N(1),
+ },
+
+- { /* 1: Pb1100 LCDC 640x480 TFT panel */
+- 640, /* xres */
+- 480, /* yres */
+- 16, /* bpp */
+-
+- "Generic_640x480_16",
+-
+- /* mode_control */
+- 0x004806a | LCD_DEFAULT_PIX_FORMAT,
+-
+- /* mode_horztiming */
+- 0x3434d67f,
+-
+- /* mode_verttiming */
+- 0x0e0e39df,
+-
+- /* mode_clkcontrol */
+- ( 0
+- /*LCD_CLKCONTROL_IB*/
+- /*LCD_CLKCONTROL_IC*/
+- /*LCD_CLKCONTROL_IH*/
+- /*LCD_CLKCONTROL_IV*/
+- | LCD_CLKCONTROL_PCD_N(1) ),
+-
+- /* mode_pwmdiv */
+- 0,
+-
+- /* mode_pwmhi */
+- 0,
+-
+- /* mode_toyclksrc */
+- ((1<<7) | (1<<6) | (0<<5)),
+-
+- /* mode_backlight */
+- 7
++ /* Hitachi SP14Q005 and possibly others */
++ [3] = {
++ .name = "Hitachi_SP14Qxxx",
++ .xres = 320,
++ .yres = 240,
++ .bpp = 4,
++ .control_base =
++ ( LCD_CONTROL_C
++ | LCD_CONTROL_BPP_4 ),
++ .horztiming =
++ ( LCD_HORZTIMING_HN2_N(1)
++ | LCD_HORZTIMING_HN1_N(1)
++ | LCD_HORZTIMING_HPW_N(1)
++ | LCD_HORZTIMING_PPL_N(320) ),
++ .verttiming =
++ ( LCD_VERTTIMING_VN2_N(1)
++ | LCD_VERTTIMING_VN1_N(1)
++ | LCD_VERTTIMING_VPW_N(1)
++ | LCD_VERTTIMING_LPP_N(240) ),
++ .clkcontrol_base = LCD_CLKCONTROL_PCD_N(4),
+ },
+
+- { /* 2: Pb1100 LCDB 640x480 PrimeView TFT panel */
+- 640, /* xres */
+- 480, /* yres */
+- 16, /* bpp */
+-
+- "PrimeView_640x480_16",
+-
+- /* mode_control */
+- 0x0004886a | LCD_DEFAULT_PIX_FORMAT,
+-
+- /* mode_horztiming */
+- 0x0e4bfe7f,
+-
+- /* mode_verttiming */
+- 0x210805df,
+-
+- /* mode_clkcontrol */
+- 0x00038001,
+-
+- /* mode_pwmdiv */
+- 0,
+-
+- /* mode_pwmhi */
+- 0,
+-
+- /* mode_toyclksrc */
+- ((1<<7) | (1<<6) | (0<<5)),
+-
+- /* mode_backlight */
+- 7
++ /* Generic 640x480 TFT panel */
++ [4] = {
++ .name = "TFT_640x480_16",
++ .xres = 640,
++ .yres = 480,
++ .bpp = 16,
++ .control_base = 0x004806a | LCD_CONTROL_DEFAULT_PO,
++ .horztiming = 0x3434d67f,
++ .verttiming = 0x0e0e39df,
++ .clkcontrol_base = LCD_CLKCONTROL_PCD_N(1),
+ },
+
+- { /* 3: Pb1100 800x600x16bpp NEON CRT */
+- 800, /* xres */
+- 600, /* yres */
+- 16, /* bpp */
+-
+- "NEON_800x600_16",
+-
+- /* mode_control */
+- 0x0004886A | LCD_DEFAULT_PIX_FORMAT,
+-
+- /* mode_horztiming */
+- 0x005AFF1F,
+-
+- /* mode_verttiming */
+- 0x16000E57,
+-
+- /* mode_clkcontrol */
+- 0x00020000,
+-
+- /* mode_pwmdiv */
+- 0,
+-
+- /* mode_pwmhi */
+- 0,
+-
+- /* mode_toyclksrc */
+- ((1<<7) | (1<<6) | (0<<5)),
+-
+- /* mode_backlight */
+- 7
++ /* Pb1100 LCDB 640x480 PrimeView TFT panel */
++ [5] = {
++ .name = "PrimeView_640x480_16",
++ .xres = 640,
++ .yres = 480,
++ .bpp = 16,
++ .control_base = 0x0004886a | LCD_CONTROL_DEFAULT_PO,
++ .horztiming = 0x0e4bfe7f,
++ .verttiming = 0x210805df,
++ .clkcontrol_base = 0x00038001,
+ },
++};
+
+- { /* 4: Pb1100 640x480x16bpp NEON CRT */
+- 640, /* xres */
+- 480, /* yres */
+- 16, /* bpp */
+-
+- "NEON_640x480_16",
+-
+- /* mode_control */
+- 0x0004886A | LCD_DEFAULT_PIX_FORMAT,
+-
+- /* mode_horztiming */
+- 0x0052E27F,
+-
+- /* mode_verttiming */
+- 0x18000DDF,
+-
+- /* mode_clkcontrol */
+- 0x00020000,
++struct au1100fb_drv_info {
++ int panel_idx;
++ char *opt_mode;
++};
+
+- /* mode_pwmdiv */
+- 0,
++/********************************************************************/
+
+- /* mode_pwmhi */
+- 0,
++/* Inline helpers */
+
+- /* mode_toyclksrc */
+- ((1<<7) | (1<<6) | (0<<5)),
++#define panel_is_dual(panel) (panel->control_base & LCD_CONTROL_DP)
++#define panel_is_active(panel)(panel->control_base & LCD_CONTROL_PT)
++#define panel_is_color(panel) (panel->control_base & LCD_CONTROL_PC)
++#define panel_swap_rgb(panel) (panel->control_base & LCD_CONTROL_CCO)
+
+- /* mode_backlight */
+- 7
+- },
+-};
+ #endif /* _AU1100LCD_H */
+diff -urpNX dontdiff linux-2.6.12/drivers/video/epson1356fb.c linux_HEAD/drivers/video/epson1356fb.c
+--- linux-2.6.12/drivers/video/epson1356fb.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/drivers/video/epson1356fb.c 2005-07-07 11:22:55.000000000 +0200
@@ -0,0 +1,3117 @@
+/*
+ * epson1356fb.c -- Epson SED1356 Framebuffer Driver
@@ -41498,7 +67154,7 @@
+{
+ struct fb_info_e1356 *info = (struct fb_info_e1356*)fb;
+ unsigned int len;
-+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ u64 start=0, off;
+#else
+ unsigned long start=0, off;
@@ -41583,7 +67239,7 @@
+ if (info->fix.mmunalign)
+ vma->vm_start += 2;
+
-+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+ if (e1356_remap_page_range(vma->vm_start, off,
+ vma->vm_end - vma->vm_start,
+ vma->vm_page_prot))
@@ -42481,7 +68137,7 @@
+ fb_info.membase_virt + fb_info.fb_size);
+}
+
-+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
++#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
+
+/*
+ * Return indicates whether a page was freed so caller can adjust rss
@@ -42576,8 +68232,8 @@
+ return error;
+}
+#endif
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/epson1356fb.h linux_HEAD/drivers/video/epson1356fb.h
---- linux-2.6.11.6/drivers/video/epson1356fb.h 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/drivers/video/epson1356fb.h linux_HEAD/drivers/video/epson1356fb.h
+--- linux-2.6.12/drivers/video/epson1356fb.h 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/drivers/video/epson1356fb.h 2002-08-15 11:27:24.000000000 +0200
@@ -0,0 +1,646 @@
+/*
@@ -43226,18 +68882,9 @@
+ }
+ }
+};
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/gbefb.c linux_HEAD/drivers/video/gbefb.c
---- linux-2.6.11.6/drivers/video/gbefb.c 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/drivers/video/gbefb.c 2005-03-04 20:39:34.000000000 +0100
-@@ -1065,7 +1065,7 @@ static void __devexit gbefb_remove_sysfs
- device_remove_file(dev, &dev_attr_revision);
- }
-
--static void gbefb_create_sysfs(struct device *dev)
-+static void gbefb_create_sysfs(struct device *dev)
- {
- device_create_file(dev, &dev_attr_size);
- device_create_file(dev, &dev_attr_revision);
+diff -urpNX dontdiff linux-2.6.12/drivers/video/gbefb.c linux_HEAD/drivers/video/gbefb.c
+--- linux-2.6.12/drivers/video/gbefb.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/video/gbefb.c 2005-07-10 12:28:27.000000000 +0200
@@ -1126,7 +1126,7 @@ static int __init gbefb_probe(struct dev
gbefb_setup(options);
#endif
@@ -43285,3681 +68932,496 @@
/* map framebuffer memory into tiles table */
for (i = 0; i < (gbe_mem_size >> TILE_SHIFT); i++)
gbe_tiles.cpu[i] = (gbe_mem_phys >> TILE_SHIFT) + i;
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/maxinefb.c linux_HEAD/drivers/video/maxinefb.c
---- linux-2.6.11.6/drivers/video/maxinefb.c 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/drivers/video/maxinefb.c 2004-10-12 19:31:18.000000000 +0200
-@@ -109,7 +109,7 @@ static struct fb_ops maxinefb_ops = {
- .owner = THIS_MODULE,
- .fb_get_fix = gen_get_fix,
- .fb_get_var = gen_get_var,
-- .fb_setcolreg = maxinefb_setcolreg,
-+ .fb_setcolreg = maxinefb_setcolreg,
- .fb_fillrect = cfb_fillrect,
- .fb_copyarea = cfb_copyarea,
- .fb_imageblit = cfb_imageblit,
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/pmag-aa-fb.c linux_HEAD/drivers/video/pmag-aa-fb.c
---- linux-2.6.11.6/drivers/video/pmag-aa-fb.c 2005-03-26 04:28:29.000000000 +0100
-+++ linux_HEAD/drivers/video/pmag-aa-fb.c 2003-12-18 22:47:09.000000000 +0100
-@@ -478,7 +478,7 @@ static int __exit exit_one(int slot)
- return 0;
- }
+diff -urpNX dontdiff linux-2.6.12/drivers/video/pmag-aa-fb.c linux_HEAD/drivers/video/pmag-aa-fb.c
+--- linux-2.6.12/drivers/video/pmag-aa-fb.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/video/pmag-aa-fb.c 2005-07-10 12:28:27.000000000 +0200
+@@ -413,7 +413,7 @@ static struct fb_ops aafb_ops = {
--/*
-+/*
- * Initialise the framebuffer.
- */
- int __init pmagaafb_init(void)
-diff -urpNX dontdiff linux-2.6.11.6/drivers/video/pmag-ba-fb.c linux_HEAD/drivers/video/pmag-ba-fb.c
---- linux-2.6.11.6/drivers/video/pmag-ba-fb.c 2005-03-26 04:28:37.000000000 +0100
-+++ linux_HEAD/drivers/video/pmag-ba-fb.c 2004-10-12 19:31:18.000000000 +0200
-@@ -66,7 +66,7 @@ static struct fb_var_screeninfo pmagbafb
- .accel = FB_ACCEL_NONE,
- .vmode = FB_VMODE_NONINTERLACED,
- };
--
-+
- static struct fb_fix_screeninfo pmagbafb_fix = {
- .id = "PMAG-BA",
- .smem_len = (1024 * 864),
-diff -urpNX dontdiff linux-2.6.11.6/fs/eventpoll.c linux_HEAD/fs/eventpoll.c
---- linux-2.6.11.6/fs/eventpoll.c 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/fs/eventpoll.c 2005-03-21 20:04:48.000000000 +0100
-@@ -640,8 +640,10 @@ asmlinkage long sys_epoll_wait(int epfd,
- return -EINVAL;
+ static int __init init_one(int slot)
+ {
+- unsigned long base_addr = get_tc_base_addr(slot);
++ unsigned long base_addr = CKSEG1ADDR(get_tc_base_addr(slot));
+ struct aafb_info *ip = &my_fb_info[slot];
- /* Verify that the area passed by the user is writeable */
-- if ((error = verify_area(VERIFY_WRITE, events, maxevents * sizeof(struct epoll_event))))
-+ if (!access_ok(VERIFY_WRITE, events, maxevents * sizeof(struct epoll_event))) {
-+ error = -EFAULT;
- goto eexit_1;
-+ }
+ memset(ip, 0, sizeof(struct aafb_info));
+diff -urpNX dontdiff linux-2.6.12/drivers/video/pmag-ba-fb.c linux_HEAD/drivers/video/pmag-ba-fb.c
+--- linux-2.6.12/drivers/video/pmag-ba-fb.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/video/pmag-ba-fb.c 2005-07-10 12:28:27.000000000 +0200
+@@ -122,7 +122,7 @@ static struct fb_ops pmagbafb_ops = {
- /* Get the "struct file *" for the eventpoll file */
- error = -EBADF;
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/bootinfo.h linux_HEAD/include/asm-mips/bootinfo.h
---- linux-2.6.11.6/include/asm-mips/bootinfo.h 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/include/asm-mips/bootinfo.h 2005-03-01 15:00:56.000000000 +0100
-@@ -177,6 +177,8 @@
- #define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
- #define MACH_PB1550 8 /* Au1550-based eval board */
- #define MACH_DB1550 9 /* Au1550-based eval board */
-+#define MACH_PB1200 10 /* Au1200-based eval board */
-+#define MACH_DB1200 11 /* Au1200-based eval board */
+ int __init pmagbafb_init_one(int slot)
+ {
+- unsigned long base_addr = get_tc_base_addr(slot);
++ unsigned long base_addr = CKSEG1ADDR(get_tc_base_addr(slot));
+ struct fb_info *info = &pmagba_fb_info[slot];
+ struct display *disp = &pmagba_disp[slot];
- /*
- * Valid machtype for group NEC_VR41XX
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/break.h linux_HEAD/include/asm-mips/break.h
---- linux-2.6.11.6/include/asm-mips/break.h 2005-03-26 04:28:25.000000000 +0100
-+++ linux_HEAD/include/asm-mips/break.h 2005-02-17 21:50:43.000000000 +0100
-@@ -28,6 +28,7 @@
- #define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */
- #define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
- #define BRK_BUG 512 /* Used by BUG() */
-+#define BRK_KDB 513 /* Used in KDB_ENTER() */
- #define BRK_MULOVF 1023 /* Multiply overflow */
+diff -urpNX dontdiff linux-2.6.12/drivers/video/pmagb-b-fb.c linux_HEAD/drivers/video/pmagb-b-fb.c
+--- linux-2.6.12/drivers/video/pmagb-b-fb.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/drivers/video/pmagb-b-fb.c 2005-07-03 16:44:35.000000000 +0200
+@@ -123,7 +123,7 @@ static struct fb_ops pmagbbfb_ops = {
- #endif /* __ASM_BREAK_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/cacheflush.h linux_HEAD/include/asm-mips/cacheflush.h
---- linux-2.6.11.6/include/asm-mips/cacheflush.h 2005-04-03 00:13:08.000000000 +0200
-+++ linux_HEAD/include/asm-mips/cacheflush.h 2005-03-21 20:04:58.000000000 +0100
-@@ -49,17 +49,29 @@ static inline void flush_dcache_page(str
+ int __init pmagbbfb_init_one(int slot)
+ {
+- unsigned long base_addr = get_tc_base_addr(slot);
++ unsigned long base_addr = CKSEG1ADDR(get_tc_base_addr(slot));
+ struct fb_info *info = &pmagbb_fb_info[slot];
- extern void (*flush_icache_page)(struct vm_area_struct *vma,
- struct page *page);
--extern void (*flush_icache_range)(unsigned long start, unsigned long end);
-+extern void (*flush_icache_range)(unsigned long __user start,
-+ unsigned long __user end);
- #define flush_cache_vmap(start, end) flush_cache_all()
- #define flush_cache_vunmap(start, end) flush_cache_all()
-
--#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
--do { \
-- memcpy(dst, (void *) src, len); \
-- flush_icache_page(vma, page); \
--} while (0)
--#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-- memcpy(dst, src, len)
-+static inline void copy_to_user_page(struct vm_area_struct *vma,
-+ struct page *page, unsigned long vaddr, void *dst, const void *src,
-+ unsigned long len)
-+{
-+ if (cpu_has_dc_aliases)
-+ flush_cache_page(vma, vaddr);
-+ memcpy(dst, src, len);
-+ flush_icache_page(vma, page);
-+}
+ printk("PMAGB-BA framebuffer in slot %d\n", slot);
+diff -urpNX dontdiff linux-2.6.12/drivers/video/smivgxfb.c linux_HEAD/drivers/video/smivgxfb.c
+--- linux-2.6.12/drivers/video/smivgxfb.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/drivers/video/smivgxfb.c 2005-04-21 07:02:30.000000000 +0200
+@@ -0,0 +1,316 @@
++/***************************************************************************
++ * Silicon Motion VoyaagerGX framebuffer driver
++ *
++ * ported to 2.6 by Embedded Alley Solutions, Inc
++ * Copyright (C) 2005 Embedded Alley Solutions, Inc
++ *
++ * based on
++ copyright : (C) 2001 by Szu-Tao Huang
++ email : johuang at siliconmotion.com
++ Updated to SM501 by Eric.Devolder at amd.com and dan at embeddededge.com
++ for the AMD Mirage Portable Tablet. 20 Oct 2003
++ ***************************************************************************/
+
-+static inline void copy_from_user_page(struct vm_area_struct *vma,
-+ struct page *page, unsigned long vaddr, void *dst, const void *src,
-+ unsigned long len)
-+{
-+ if (cpu_has_dc_aliases)
-+ flush_cache_page(vma, vaddr);
-+ memcpy(dst, src, len);
-+}
-
- extern void (*flush_cache_sigtramp)(unsigned long addr);
- extern void (*flush_icache_all)(void);
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/cobalt/cobalt.h linux_HEAD/include/asm-mips/cobalt/cobalt.h
---- linux-2.6.11.6/include/asm-mips/cobalt/cobalt.h 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/include/asm-mips/cobalt/cobalt.h 2005-03-04 20:36:14.000000000 +0100
-@@ -19,18 +19,21 @@
- * 9 - PCI
- * 14 - IDE0
- * 15 - IDE1
-- *
-+ */
-+#define COBALT_QUBE_SLOT_IRQ 9
++/***************************************************************************
++ * *
++ * This program is free software; you can redistribute it and/or modify *
++ * it under the terms of the GNU General Public License as published by *
++ * the Free Software Foundation; either version 2 of the License, or *
++ * (at your option) any later version. *
++ * *
++ ***************************************************************************/
+
-+/*
- * CPU IRQs are 16 ... 23
- */
- #define COBALT_TIMER_IRQ 18
- #define COBALT_SCC_IRQ 19 /* pre-production has 85C30 */
- #define COBALT_RAQ_SCSI_IRQ 19
- #define COBALT_ETH0_IRQ 19
-+#define COBALT_QUBE1_ETH0_IRQ 20
- #define COBALT_ETH1_IRQ 20
- #define COBALT_SERIAL_IRQ 21
- #define COBALT_SCSI_IRQ 21
- #define COBALT_VIA_IRQ 22 /* Chained to VIA ISA bridge */
--#define COBALT_QUBE_SLOT_IRQ 23
-
- /*
- * PCI configuration space manifest constants. These are wired into
-@@ -69,13 +72,16 @@
- * Most of this really should go into a separate GT64111 header file.
- */
- #define GT64111_IO_BASE 0x10000000UL
-+#define GT64111_IO_END 0x11ffffffUL
-+#define GT64111_MEM_BASE 0x12000000UL
-+#define GT64111_MEM_END 0x13ffffffUL
- #define GT64111_BASE 0x14000000UL
--#define GALILEO_REG(ofs) (KSEG0 + GT64111_BASE + (unsigned long)(ofs))
-+#define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs))
-
- #define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port))
- #define GALILEO_OUTL(val, port) \
- do { \
-- *(volatile unsigned int *) GALILEO_REG(port) = (port); \
-+ *(volatile unsigned int *) GALILEO_REG(port) = (val); \
- } while (0)
-
- #define GALILEO_T0EXP 0x0100
-@@ -86,5 +92,21 @@ do { \
- GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \
- (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS)
-
-+#define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000))
-+# define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */
-+# define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */
-+# define COBALT_LED_WEB (1 << 2) /* RaQ */
-+# define COBALT_LED_POWER_OFF (1 << 3) /* RaQ */
-+# define COBALT_LED_RESET 0x0f
++#include <linux/config.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/string.h>
++#include <linux/mm.h>
++#include <linux/tty.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/fb.h>
++#include <linux/pci.h>
++#include <linux/init.h>
+
-+#define COBALT_KEY_PORT ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK)
-+# define COBALT_KEY_CLEAR (1 << 1)
-+# define COBALT_KEY_LEFT (1 << 2)
-+# define COBALT_KEY_UP (1 << 3)
-+# define COBALT_KEY_DOWN (1 << 4)
-+# define COBALT_KEY_RIGHT (1 << 5)
-+# define COBALT_KEY_ENTER (1 << 6)
-+# define COBALT_KEY_SELECT (1 << 7)
-+# define COBALT_KEY_MASK 0xfe
-
- #endif /* __ASM_COBALT_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/cobalt/mach-gt64120.h linux_HEAD/include/asm-mips/cobalt/mach-gt64120.h
---- linux-2.6.11.6/include/asm-mips/cobalt/mach-gt64120.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/include/asm-mips/cobalt/mach-gt64120.h 2005-02-21 17:24:02.000000000 +0100
-@@ -0,0 +1 @@
-+/* there's something here ... in the dark */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/cpu.h linux_HEAD/include/asm-mips/cpu.h
---- linux-2.6.11.6/include/asm-mips/cpu.h 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/include/asm-mips/cpu.h 2005-03-01 15:00:56.000000000 +0100
-@@ -22,12 +22,17 @@
- spec.
- */
-
--#define PRID_COMP_LEGACY 0x000000
--#define PRID_COMP_MIPS 0x010000
--#define PRID_COMP_BROADCOM 0x020000
--#define PRID_COMP_ALCHEMY 0x030000
--#define PRID_COMP_SIBYTE 0x040000
--#define PRID_COMP_SANDCRAFT 0x050000
-+#define PRID_COMP_LEGACY 0x000000
-+#define PRID_COMP_MIPS 0x010000
-+#define PRID_COMP_BROADCOM 0x020000
-+#define PRID_COMP_ALCHEMY 0x030000
-+#define PRID_COMP_SIBYTE 0x040000
-+#define PRID_COMP_SANDCRAFT 0x050000
-+#define PRID_COMP_PHILIPS 0x060000
-+#define PRID_COMP_TOSHIBA 0x070000
-+#define PRID_COMP_LSI 0x080000
-+#define PRID_COMP_LEXRA 0x0b0000
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/pgtable.h>
++#include <asm/system.h>
++#include <asm/uaccess.h>
+
-
- /*
- * Assigned values for the product ID register. In order to detect a
-@@ -177,7 +182,8 @@
- #define CPU_VR4133 56
- #define CPU_AU1550 57
- #define CPU_24K 58
--#define CPU_LAST 58
-+#define CPU_AU1200 59
-+#define CPU_LAST 59
-
- /*
- * ISA Level encodings
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/elf.h linux_HEAD/include/asm-mips/elf.h
---- linux-2.6.11.6/include/asm-mips/elf.h 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/include/asm-mips/elf.h 2005-03-17 22:10:54.000000000 +0100
-@@ -225,18 +225,17 @@ do { current->thread.mflags &= ~MF_ABI_M
- #endif /* CONFIG_MIPS64 */
-
- extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
-+extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
- extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
-
- #define ELF_CORE_COPY_REGS(elf_regs, regs) \
- dump_regs((elf_greg_t *)&(elf_regs), regs);
-+#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
- #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \
- dump_task_fpu(tsk, elf_fpregs)
-
- #endif /* __KERNEL__ */
-
--/* This one accepts IRIX binaries. */
--#define irix_elf_check_arch(hdr) ((hdr)->e_flags & RHF_SGI_ONLY)
--
- #define USE_ELF_CORE_DUMP
- #define ELF_EXEC_PAGESIZE PAGE_SIZE
-
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/fixmap.h linux_HEAD/include/asm-mips/fixmap.h
---- linux-2.6.11.6/include/asm-mips/fixmap.h 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/include/asm-mips/fixmap.h 2005-02-17 21:50:43.000000000 +0100
-@@ -107,4 +107,11 @@ static inline unsigned long virt_to_fix(
- return __virt_to_fix(vaddr);
- }
-
-+/*
-+ * Called from pgtable_init()
-+ */
-+extern void fixrange_init(unsigned long start, unsigned long end,
-+ pgd_t *pgd_base);
++static char *SMIRegs; // point to virtual Memory Map IO starting address
++static char *SMILFB; // point to virtual video memory starting address
+
++static struct fb_fix_screeninfo smifb_fix __initdata = {
++ .id = "smivgx",
++ .type = FB_TYPE_PACKED_PIXELS,
++ .visual = FB_VISUAL_TRUECOLOR,
++ .ywrapstep = 0,
++ .xpanstep = 1,
++ .ypanstep = 1,
++ .line_length = 1024 * 2, /* (bbp * xres)/8 */
++ .accel = FB_ACCEL_NONE,
++};
+
- #endif
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/fpu_emulator.h linux_HEAD/include/asm-mips/fpu_emulator.h
---- linux-2.6.11.6/include/asm-mips/fpu_emulator.h 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/include/asm-mips/fpu_emulator.h 2005-02-28 22:37:48.000000000 +0100
-@@ -35,4 +35,6 @@ struct mips_fpu_emulator_private {
- } stats;
- };
-
-+extern struct mips_fpu_emulator_private fpuemuprivate;
++static struct fb_var_screeninfo smifb_var = {
++ .xres = 1024,
++ .yres = 768,
++ .xres_virtual = 1024,
++ .yres_virtual = 768,
++ .bits_per_pixel = 16,
++ .red = { 11, 5, 0 },
++ .green = { 5, 6, 0 },
++ .blue = { 0, 5, 0 },
++ .activate = FB_ACTIVATE_NOW,
++ .height = -1,
++ .width = -1,
++ .vmode = FB_VMODE_NONINTERLACED,
++};
+
- #endif /* _ASM_FPU_EMULATOR_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/hazards.h linux_HEAD/include/asm-mips/hazards.h
---- linux-2.6.11.6/include/asm-mips/hazards.h 2005-03-26 04:28:25.000000000 +0100
-+++ linux_HEAD/include/asm-mips/hazards.h 2005-03-03 21:03:38.000000000 +0100
-@@ -107,6 +107,7 @@ __asm__(
- " .endm \n\t");
-
- #ifdef CONFIG_CPU_RM9000
+
- /*
- * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
- * use of the JTLB for instructions should not occur for 4 cpu cycles and use
-@@ -124,6 +125,9 @@ __asm__(
- ".set\tmips32\n\t" \
- "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
- ".set\tmips0")
++static struct fb_info info;
+
-+#define back_to_back_c0_hazard() do { } while (0)
++#include "smivgxfb.h"
+
- #else
-
- /*
-@@ -170,6 +174,10 @@ __asm__(
- __asm__ __volatile__( \
- "_ehb\t\t\t\t# irq_disable_hazard")
-
-+#define back_to_back_c0_hazard() \
-+ __asm__ __volatile__( \
-+ "_ehb\t\t\t\t# back_to_back_c0_hazard")
++static int initdone = 0;
++static int crt_out = 1;
+
- #elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
-
- /*
-@@ -186,6 +194,8 @@ __asm__(
- #define irq_enable_hazard() do { } while (0)
- #define irq_disable_hazard() do { } while (0)
-
-+#define back_to_back_c0_hazard() do { } while (0)
+
- #else
-
- /*
-@@ -210,6 +220,12 @@ __asm__(
- __asm__ __volatile__( \
- "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
-
-+#define back_to_back_c0_hazard() \
-+ __asm__ __volatile__( \
-+ " .set noreorder \n" \
-+ " nop; nop; nop \n" \
-+ " .set reorder \n")
-+
- #endif
-
- #endif /* __ASSEMBLY__ */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/inventory.h linux_HEAD/include/asm-mips/inventory.h
---- linux-2.6.11.6/include/asm-mips/inventory.h 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/include/asm-mips/inventory.h 2005-03-17 22:20:30.000000000 +0100
-@@ -4,6 +4,8 @@
- #ifndef __ASM_INVENTORY_H
- #define __ASM_INVENTORY_H
-
-+#include <linux/compiler.h>
-+
- typedef struct inventory_s {
- struct inventory_s *inv_next;
- int inv_class;
-@@ -14,7 +16,9 @@ typedef struct inventory_s {
- } inventory_t;
-
- extern int inventory_items;
--void add_to_inventory (int class, int type, int controller, int unit, int state);
--int dump_inventory_to_user (void *userbuf, int size);
-+
-+extern void add_to_inventory (int class, int type, int controller, int unit, int state);
-+extern int dump_inventory_to_user (void __user *userbuf, int size);
-+extern int __init init_inventory(void);
-
- #endif /* __ASM_INVENTORY_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/io.h linux_HEAD/include/asm-mips/io.h
---- linux-2.6.11.6/include/asm-mips/io.h 2005-04-03 00:13:08.000000000 +0200
-+++ linux_HEAD/include/asm-mips/io.h 2005-03-21 20:04:58.000000000 +0100
-@@ -34,7 +34,7 @@
- #undef CONF_SLOWDOWN_IO
-
- /*
-- * Raw operations are never swapped in software. Otoh values that raw
-+ * Raw operations are never swapped in software. OTOH values that raw
- * operations are working on may or may not have been swapped by the bus
- * hardware. An example use would be for flash memory that's used for
- * execute in place.
-@@ -43,45 +43,53 @@
- # define __raw_ioswabw(x) (x)
- # define __raw_ioswabl(x) (x)
- # define __raw_ioswabq(x) (x)
-+# define ____raw_ioswabq(x) (x)
-
- /*
- * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;
- * less sane hardware forces software to fiddle with this...
-+ *
-+ * Regardless, if the host bus endianness mismatches that of PCI/ISA, then
-+ * you can't have the numerical value of data and byte addresses within
-+ * multibyte quantities both preserved at the same time. Hence two
-+ * variations of functions: non-prefixed ones that preserve the value
-+ * and prefixed ones that preserve byte addresses. The latters are
-+ * typically used for moving raw data between a peripheral and memory (cf.
-+ * string I/O functions), hence the "mem_" prefix.
- */
- #if defined(CONFIG_SWAP_IO_SPACE)
-
- # define ioswabb(x) (x)
-+# define mem_ioswabb(x) (x)
- # ifdef CONFIG_SGI_IP22
- /*
- * IP22 seems braindead enough to swap 16bits values in hardware, but
- * not 32bits. Go figure... Can't tell without documentation.
- */
- # define ioswabw(x) (x)
-+# define mem_ioswabw(x) le16_to_cpu(x)
- # else
- # define ioswabw(x) le16_to_cpu(x)
-+# define mem_ioswabw(x) (x)
- # endif
- # define ioswabl(x) le32_to_cpu(x)
-+# define mem_ioswabl(x) (x)
- # define ioswabq(x) le64_to_cpu(x)
-+# define mem_ioswabq(x) (x)
-
- #else
-
- # define ioswabb(x) (x)
-+# define mem_ioswabb(x) (x)
- # define ioswabw(x) (x)
-+# define mem_ioswabw(x) cpu_to_le16(x)
- # define ioswabl(x) (x)
-+# define mem_ioswabl(x) cpu_to_le32(x)
- # define ioswabq(x) (x)
-+# define mem_ioswabq(x) cpu_to_le32(x)
-
- #endif
-
--/*
-- * Native bus accesses never swapped.
-- */
--#define bus_ioswabb(x) (x)
--#define bus_ioswabw(x) (x)
--#define bus_ioswabl(x) (x)
--#define bus_ioswabq(x) (x)
--
--#define __bus_ioswabq bus_ioswabq
--
- #define IO_SPACE_LIMIT 0xffff
-
- /*
-@@ -319,7 +327,8 @@ static inline type pfx##read##bwlq(volat
- else if (cpu_has_64bits) { \
- unsigned long __flags; \
- \
-- local_irq_save(__flags); \
-+ if (irq) \
-+ local_irq_save(__flags); \
- __asm__ __volatile__( \
- ".set mips3" "\t\t# __readq" "\n\t" \
- "ld %L0, %1" "\n\t" \
-@@ -328,7 +337,8 @@ static inline type pfx##read##bwlq(volat
- ".set mips0" "\n" \
- : "=r" (__val) \
- : "m" (*__mem)); \
-- local_irq_restore(__flags); \
-+ if (irq) \
-+ local_irq_restore(__flags); \
- } else { \
- __val = 0; \
- BUG(); \
-@@ -386,15 +396,15 @@ __BUILD_IOPORT_SINGLE(bus, bwlq, type, _
-
- #define BUILDIO(bwlq, type) \
- \
--__BUILD_MEMORY_PFX(, bwlq, type) \
- __BUILD_MEMORY_PFX(__raw_, bwlq, type) \
--__BUILD_MEMORY_PFX(bus_, bwlq, type) \
-+__BUILD_MEMORY_PFX(, bwlq, type) \
-+__BUILD_MEMORY_PFX(mem_, bwlq, type) \
- __BUILD_IOPORT_PFX(, bwlq, type) \
--__BUILD_IOPORT_PFX(__raw_, bwlq, type)
-+__BUILD_IOPORT_PFX(mem_, bwlq, type)
-
- #define __BUILDIO(bwlq, type) \
- \
--__BUILD_MEMORY_SINGLE(__bus_, bwlq, type, 0)
-+__BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0)
-
- BUILDIO(b, u8)
- BUILDIO(w, u16)
-@@ -422,7 +432,7 @@ static inline void writes##bwlq(volatile
- volatile type *__addr = addr; \
- \
- while (count--) { \
-- __raw_write##bwlq(*__addr, mem); \
-+ mem_write##bwlq(*__addr, mem); \
- __addr++; \
- } \
- } \
-@@ -433,7 +443,7 @@ static inline void reads##bwlq(volatile
- volatile type *__addr = addr; \
- \
- while (count--) { \
-- *__addr = __raw_read##bwlq(mem); \
-+ *__addr = mem_read##bwlq(mem); \
- __addr++; \
- } \
- }
-@@ -446,7 +456,7 @@ static inline void outs##bwlq(unsigned l
- volatile type *__addr = addr; \
- \
- while (count--) { \
-- __raw_out##bwlq(*__addr, port); \
-+ mem_out##bwlq(*__addr, port); \
- __addr++; \
- } \
- } \
-@@ -457,7 +467,7 @@ static inline void ins##bwlq(unsigned lo
- volatile type *__addr = addr; \
- \
- while (count--) { \
-- *__addr = __raw_in##bwlq(port); \
-+ *__addr = mem_in##bwlq(port); \
- __addr++; \
- } \
- }
-@@ -481,34 +491,6 @@ BUILDSTRING(q, u64)
- #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
-
- /*
-- * Memory Mapped I/O
-- */
--#define ioread8(addr) readb(addr)
--#define ioread16(addr) readw(addr)
--#define ioread32(addr) readl(addr)
--
--#define iowrite8(b,addr) writeb(b,addr)
--#define iowrite16(w,addr) writew(w,addr)
--#define iowrite32(l,addr) writel(l,addr)
--
--#define ioread8_rep(a,b,c) readsb(a,b,c)
--#define ioread16_rep(a,b,c) readsw(a,b,c)
--#define ioread32_rep(a,b,c) readsl(a,b,c)
--
--#define iowrite8_rep(a,b,c) writesb(a,b,c)
--#define iowrite16_rep(a,b,c) writesw(a,b,c)
--#define iowrite32_rep(a,b,c) writesl(a,b,c)
--
--/* Create a virtual mapping cookie for an IO port range */
--extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
--extern void ioport_unmap(void __iomem *);
--
--/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
--struct pci_dev;
--extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
--extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
--
--/*
- * ISA space is 'always mapped' on currently supported MIPS systems, no need
- * to explicitly ioremap() it. The fact that the ISA IO space is mapped
- * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/irq.h linux_HEAD/include/asm-mips/irq.h
---- linux-2.6.11.6/include/asm-mips/irq.h 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/include/asm-mips/irq.h 2005-03-01 22:49:44.000000000 +0100
-@@ -24,11 +24,9 @@ static inline int irq_canonicalize(int i
-
- struct pt_regs;
-
--#ifdef CONFIG_PREEMPT
--
- extern asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs);
-
--#else
-+#ifdef CONFIG_PREEMPT
-
- /*
- * do_IRQ handles all normal device IRQ's (the special
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/jmr3927/jmr3927.h linux_HEAD/include/asm-mips/jmr3927/jmr3927.h
---- linux-2.6.11.6/include/asm-mips/jmr3927/jmr3927.h 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/include/asm-mips/jmr3927/jmr3927.h 2005-03-04 20:36:14.000000000 +0100
-@@ -202,20 +202,6 @@ static inline int jmr3927_have_isac(void
- #endif /* !__ASSEMBLY__ */
-
- /*
-- * UART defines for serial.h
-- */
--
--/* use Pre-scaler T0 (1/2) */
--#define JMR3927_BASE_BAUD (JMR3927_IMCLK / 2 / 16)
--
--#define UART0_ADDR 0xfffef300
--#define UART1_ADDR 0xfffef400
--#define UART0_INT JMR3927_IRQ_IRC_SIO0
--#define UART1_INT JMR3927_IRQ_IRC_SIO1
--#define UART0_FLAGS ASYNC_BOOT_AUTOCONF
--#define UART1_FLAGS 0
--
--/*
- * IRQ mappings
- */
-
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mach-au1x00/au1000.h linux_HEAD/include/asm-mips/mach-au1x00/au1000.h
---- linux-2.6.11.6/include/asm-mips/mach-au1x00/au1000.h 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mach-au1x00/au1000.h 2005-03-01 15:00:58.000000000 +0100
-@@ -162,28 +162,356 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
- #endif
-
--/* SDRAM Controller */
-+/*
-+ * SDRAM Register Offsets
-+ */
- #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
--#define MEM_SDMODE0 0xB4000000
--#define MEM_SDMODE1 0xB4000004
--#define MEM_SDMODE2 0xB4000008
--
--#define MEM_SDADDR0 0xB400000C
--#define MEM_SDADDR1 0xB4000010
--#define MEM_SDADDR2 0xB4000014
--
--#define MEM_SDREFCFG 0xB4000018
--#define MEM_SDPRECMD 0xB400001C
--#define MEM_SDAUTOREF 0xB4000020
--
--#define MEM_SDWRMD0 0xB4000024
--#define MEM_SDWRMD1 0xB4000028
--#define MEM_SDWRMD2 0xB400002C
-+#define MEM_SDMODE0 (0x0000)
-+#define MEM_SDMODE1 (0x0004)
-+#define MEM_SDMODE2 (0x0008)
-+#define MEM_SDADDR0 (0x000C)
-+#define MEM_SDADDR1 (0x0010)
-+#define MEM_SDADDR2 (0x0014)
-+#define MEM_SDREFCFG (0x0018)
-+#define MEM_SDPRECMD (0x001C)
-+#define MEM_SDAUTOREF (0x0020)
-+#define MEM_SDWRMD0 (0x0024)
-+#define MEM_SDWRMD1 (0x0028)
-+#define MEM_SDWRMD2 (0x002C)
-+#define MEM_SDSLEEP (0x0030)
-+#define MEM_SDSMCKE (0x0034)
-+
-+#ifndef ASSEMBLER
-+/*typedef volatile struct
++static int
++smi_setcolreg(unsigned regno, unsigned red, unsigned green,
++ unsigned blue, unsigned transp,
++ struct fb_info *info)
+{
-+ uint32 sdmode0;
-+ uint32 sdmode1;
-+ uint32 sdmode2;
-+ uint32 sdaddr0;
-+ uint32 sdaddr1;
-+ uint32 sdaddr2;
-+ uint32 sdrefcfg;
-+ uint32 sdautoref;
-+ uint32 sdwrmd0;
-+ uint32 sdwrmd1;
-+ uint32 sdwrmd2;
-+ uint32 sdsleep;
-+ uint32 sdsmcke;
++ if (regno > 255)
++ return 1;
+
-+} AU1X00_SDRAM;*/
-+#endif
++ ((u16 *)(info->pseudo_palette))[regno] =
++ ((red & 0xf800) >> 0) |
++ ((green & 0xfc00) >> 5) |
++ ((blue & 0xf800) >> 11);
+
-+/*
-+ * MEM_SDMODE register content definitions
-+ */
-+#define MEM_SDMODE_F (1<<22)
-+#define MEM_SDMODE_SR (1<<21)
-+#define MEM_SDMODE_BS (1<<20)
-+#define MEM_SDMODE_RS (3<<18)
-+#define MEM_SDMODE_CS (7<<15)
-+#define MEM_SDMODE_TRAS (15<<11)
-+#define MEM_SDMODE_TMRD (3<<9)
-+#define MEM_SDMODE_TWR (3<<7)
-+#define MEM_SDMODE_TRP (3<<5)
-+#define MEM_SDMODE_TRCD (3<<3)
-+#define MEM_SDMODE_TCL (7<<0)
++ return 0;
++}
+
-+#define MEM_SDMODE_BS_2Bank (0<<20)
-+#define MEM_SDMODE_BS_4Bank (1<<20)
-+#define MEM_SDMODE_RS_11Row (0<<18)
-+#define MEM_SDMODE_RS_12Row (1<<18)
-+#define MEM_SDMODE_RS_13Row (2<<18)
-+#define MEM_SDMODE_RS_N(N) ((N)<<18)
-+#define MEM_SDMODE_CS_7Col (0<<15)
-+#define MEM_SDMODE_CS_8Col (1<<15)
-+#define MEM_SDMODE_CS_9Col (2<<15)
-+#define MEM_SDMODE_CS_10Col (3<<15)
-+#define MEM_SDMODE_CS_11Col (4<<15)
-+#define MEM_SDMODE_CS_N(N) ((N)<<15)
-+#define MEM_SDMODE_TRAS_N(N) ((N)<<11)
-+#define MEM_SDMODE_TMRD_N(N) ((N)<<9)
-+#define MEM_SDMODE_TWR_N(N) ((N)<<7)
-+#define MEM_SDMODE_TRP_N(N) ((N)<<5)
-+#define MEM_SDMODE_TRCD_N(N) ((N)<<3)
-+#define MEM_SDMODE_TCL_N(N) ((N)<<0)
-+
-+/*
-+ * MEM_SDADDR register contents definitions
++/* This function still needs lots of work to generically support
++ * different output devices (CRT or LCD) and resolutions.
++ * Currently hard-coded for 1024x768 LCD panel.
+ */
-+#define MEM_SDADDR_E (1<<20)
-+#define MEM_SDADDR_CSBA (0x03FF<<10)
-+#define MEM_SDADDR_CSMASK (0x03FF<<0)
-+#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12)
-+#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22)
-+
-+/*
-+ * MEM_SDREFCFG register content definitions
-+ */
-+#define MEM_SDREFCFG_TRC (15<<28)
-+#define MEM_SDREFCFG_TRPM (3<<26)
-+#define MEM_SDREFCFG_E (1<<25)
-+#define MEM_SDREFCFG_RE (0x1ffffff<<0)
-+#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC)
-+#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM)
-+#define MEM_SDREFCFG_REF_N(N) (N)
-+#endif
-+
-+/***********************************************************************/
-+
-+/*
-+ * Au1550 SDRAM Register Offsets
-+ */
-+
-+/***********************************************************************/
-+
-+#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
-+#define MEM_SDMODE0 (0x0800)
-+#define MEM_SDMODE1 (0x0808)
-+#define MEM_SDMODE2 (0x0810)
-+#define MEM_SDADDR0 (0x0820)
-+#define MEM_SDADDR1 (0x0828)
-+#define MEM_SDADDR2 (0x0830)
-+#define MEM_SDCONFIGA (0x0840)
-+#define MEM_SDCONFIGB (0x0848)
-+#define MEM_SDSTAT (0x0850)
-+#define MEM_SDERRADDR (0x0858)
-+#define MEM_SDSTRIDE0 (0x0860)
-+#define MEM_SDSTRIDE1 (0x0868)
-+#define MEM_SDSTRIDE2 (0x0870)
-+#define MEM_SDWRMD0 (0x0880)
-+#define MEM_SDWRMD1 (0x0888)
-+#define MEM_SDWRMD2 (0x0890)
-+#define MEM_SDPRECMD (0x08C0)
-+#define MEM_SDAUTOREF (0x08C8)
-+#define MEM_SDSREF (0x08D0)
-+#define MEM_SDSLEEP MEM_SDSREF
-+
-+#ifndef ASSEMBLER
-+/*typedef volatile struct
++void
++smi_setmode(void)
+{
-+ uint32 sdmode0;
-+ uint32 reserved0;
-+ uint32 sdmode1;
-+ uint32 reserved1;
-+ uint32 sdmode2;
-+ uint32 reserved2[3];
-+ uint32 sdaddr0;
-+ uint32 reserved3;
-+ uint32 sdaddr1;
-+ uint32 reserved4;
-+ uint32 sdaddr2;
-+ uint32 reserved5[3];
-+ uint32 sdconfiga;
-+ uint32 reserved6;
-+ uint32 sdconfigb;
-+ uint32 reserved7;
-+ uint32 sdstat;
-+ uint32 reserved8;
-+ uint32 sderraddr;
-+ uint32 reserved9;
-+ uint32 sdstride0;
-+ uint32 reserved10;
-+ uint32 sdstride1;
-+ uint32 reserved11;
-+ uint32 sdstride2;
-+ uint32 reserved12[3];
-+ uint32 sdwrmd0;
-+ uint32 reserved13;
-+ uint32 sdwrmd1;
-+ uint32 reserved14;
-+ uint32 sdwrmd2;
-+ uint32 reserved15[11];
-+ uint32 sdprecmd;
-+ uint32 reserved16;
-+ uint32 sdautoref;
-+ uint32 reserved17;
-+ uint32 sdsref;
++ if (initdone)
++ return;
+
-+} AU1550_SDRAM;*/
-+#endif
-+#endif
-
--#define MEM_SDSLEEP 0xB4000030
--#define MEM_SDSMCKE 0xB4000034
-+/*
-+ * Physical base addresses for integrated peripherals
-+ */
++ initdone = 1;
+
-+#ifdef CONFIG_SOC_AU1000
-+#define MEM_PHYS_ADDR 0x14000000
-+#define STATIC_MEM_PHYS_ADDR 0x14001000
-+#define DMA0_PHYS_ADDR 0x14002000
-+#define DMA1_PHYS_ADDR 0x14002100
-+#define DMA2_PHYS_ADDR 0x14002200
-+#define DMA3_PHYS_ADDR 0x14002300
-+#define DMA4_PHYS_ADDR 0x14002400
-+#define DMA5_PHYS_ADDR 0x14002500
-+#define DMA6_PHYS_ADDR 0x14002600
-+#define DMA7_PHYS_ADDR 0x14002700
-+#define IC0_PHYS_ADDR 0x10400000
-+#define IC1_PHYS_ADDR 0x11800000
-+#define AC97_PHYS_ADDR 0x10000000
-+#define USBH_PHYS_ADDR 0x10100000
-+#define USBD_PHYS_ADDR 0x10200000
-+#define IRDA_PHYS_ADDR 0x10300000
-+#define MAC0_PHYS_ADDR 0x10500000
-+#define MAC1_PHYS_ADDR 0x10510000
-+#define MACEN_PHYS_ADDR 0x10520000
-+#define MACDMA0_PHYS_ADDR 0x14004000
-+#define MACDMA1_PHYS_ADDR 0x14004200
-+#define I2S_PHYS_ADDR 0x11000000
-+#define UART0_PHYS_ADDR 0x11100000
-+#define UART1_PHYS_ADDR 0x11200000
-+#define UART2_PHYS_ADDR 0x11300000
-+#define UART3_PHYS_ADDR 0x11400000
-+#define SSI0_PHYS_ADDR 0x11600000
-+#define SSI1_PHYS_ADDR 0x11680000
-+#define SYS_PHYS_ADDR 0x11900000
-+#define PCMCIA_IO_PHYS_ADDR 0xF00000000
-+#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
-+#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
-+#endif
-+
-+/********************************************************************/
-+
-+#ifdef CONFIG_SOC_AU1500
-+#define MEM_PHYS_ADDR 0x14000000
-+#define STATIC_MEM_PHYS_ADDR 0x14001000
-+#define DMA0_PHYS_ADDR 0x14002000
-+#define DMA1_PHYS_ADDR 0x14002100
-+#define DMA2_PHYS_ADDR 0x14002200
-+#define DMA3_PHYS_ADDR 0x14002300
-+#define DMA4_PHYS_ADDR 0x14002400
-+#define DMA5_PHYS_ADDR 0x14002500
-+#define DMA6_PHYS_ADDR 0x14002600
-+#define DMA7_PHYS_ADDR 0x14002700
-+#define IC0_PHYS_ADDR 0x10400000
-+#define IC1_PHYS_ADDR 0x11800000
-+#define AC97_PHYS_ADDR 0x10000000
-+#define USBH_PHYS_ADDR 0x10100000
-+#define USBD_PHYS_ADDR 0x10200000
-+#define PCI_PHYS_ADDR 0x14005000
-+#define MAC0_PHYS_ADDR 0x11500000
-+#define MAC1_PHYS_ADDR 0x11510000
-+#define MACEN_PHYS_ADDR 0x11520000
-+#define MACDMA0_PHYS_ADDR 0x14004000
-+#define MACDMA1_PHYS_ADDR 0x14004200
-+#define I2S_PHYS_ADDR 0x11000000
-+#define UART0_PHYS_ADDR 0x11100000
-+#define UART3_PHYS_ADDR 0x11400000
-+#define GPIO2_PHYS_ADDR 0x11700000
-+#define SYS_PHYS_ADDR 0x11900000
-+#define PCI_MEM_PHYS_ADDR 0x400000000
-+#define PCI_IO_PHYS_ADDR 0x500000000
-+#define PCI_CONFIG0_PHYS_ADDR 0x600000000
-+#define PCI_CONFIG1_PHYS_ADDR 0x680000000
-+#define PCMCIA_IO_PHYS_ADDR 0xF00000000
-+#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
-+#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
-+#endif
-+
-+/********************************************************************/
-+
-+#ifdef CONFIG_SOC_AU1100
-+#define MEM_PHYS_ADDR 0x14000000
-+#define STATIC_MEM_PHYS_ADDR 0x14001000
-+#define DMA0_PHYS_ADDR 0x14002000
-+#define DMA1_PHYS_ADDR 0x14002100
-+#define DMA2_PHYS_ADDR 0x14002200
-+#define DMA3_PHYS_ADDR 0x14002300
-+#define DMA4_PHYS_ADDR 0x14002400
-+#define DMA5_PHYS_ADDR 0x14002500
-+#define DMA6_PHYS_ADDR 0x14002600
-+#define DMA7_PHYS_ADDR 0x14002700
-+#define IC0_PHYS_ADDR 0x10400000
-+#define SD0_PHYS_ADDR 0x10600000
-+#define SD1_PHYS_ADDR 0x10680000
-+#define IC1_PHYS_ADDR 0x11800000
-+#define AC97_PHYS_ADDR 0x10000000
-+#define USBH_PHYS_ADDR 0x10100000
-+#define USBD_PHYS_ADDR 0x10200000
-+#define IRDA_PHYS_ADDR 0x10300000
-+#define MAC0_PHYS_ADDR 0x10500000
-+#define MACEN_PHYS_ADDR 0x10520000
-+#define MACDMA0_PHYS_ADDR 0x14004000
-+#define MACDMA1_PHYS_ADDR 0x14004200
-+#define I2S_PHYS_ADDR 0x11000000
-+#define UART0_PHYS_ADDR 0x11100000
-+#define UART1_PHYS_ADDR 0x11200000
-+#define UART3_PHYS_ADDR 0x11400000
-+#define SSI0_PHYS_ADDR 0x11600000
-+#define SSI1_PHYS_ADDR 0x11680000
-+#define GPIO2_PHYS_ADDR 0x11700000
-+#define SYS_PHYS_ADDR 0x11900000
-+#define LCD_PHYS_ADDR 0x15000000
-+#define PCMCIA_IO_PHYS_ADDR 0xF00000000
-+#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
-+#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
- #endif
-
-+/***********************************************************************/
-+
-+#ifdef CONFIG_SOC_AU1550
-+#define MEM_PHYS_ADDR 0x14000000
-+#define STATIC_MEM_PHYS_ADDR 0x14001000
-+#define IC0_PHYS_ADDR 0x10400000
-+#define IC1_PHYS_ADDR 0x11800000
-+#define USBH_PHYS_ADDR 0x14020000
-+#define USBD_PHYS_ADDR 0x10200000
-+#define PCI_PHYS_ADDR 0x14005000
-+#define MAC0_PHYS_ADDR 0x10500000
-+#define MAC1_PHYS_ADDR 0x10510000
-+#define MACEN_PHYS_ADDR 0x10520000
-+#define MACDMA0_PHYS_ADDR 0x14004000
-+#define MACDMA1_PHYS_ADDR 0x14004200
-+#define UART0_PHYS_ADDR 0x11100000
-+#define UART1_PHYS_ADDR 0x11200000
-+#define UART3_PHYS_ADDR 0x11400000
-+#define GPIO2_PHYS_ADDR 0x11700000
-+#define SYS_PHYS_ADDR 0x11900000
-+#define DDMA_PHYS_ADDR 0x14002000
-+#define PE_PHYS_ADDR 0x14008000
-+#define PSC0_PHYS_ADDR 0x11A00000
-+#define PSC1_PHYS_ADDR 0x11B00000
-+#define PSC2_PHYS_ADDR 0x10A00000
-+#define PSC3_PHYS_ADDR 0x10B00000
-+#define PCI_MEM_PHYS_ADDR 0x400000000
-+#define PCI_IO_PHYS_ADDR 0x500000000
-+#define PCI_CONFIG0_PHYS_ADDR 0x600000000
-+#define PCI_CONFIG1_PHYS_ADDR 0x680000000
-+#define PCMCIA_IO_PHYS_ADDR 0xF00000000
-+#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
-+#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
-+#endif
-+
-+/***********************************************************************/
-+
-+#ifdef CONFIG_SOC_AU1200
-+#define MEM_PHYS_ADDR 0x14000000
-+#define STATIC_MEM_PHYS_ADDR 0x14001000
-+#define AES_PHYS_ADDR 0x10300000
-+#define CIM_PHYS_ADDR 0x14004000
-+#define IC0_PHYS_ADDR 0x10400000
-+#define IC1_PHYS_ADDR 0x11800000
-+#define USBM_PHYS_ADDR 0x14020000
-+#define USBH_PHYS_ADDR 0x14020100
-+#define UART0_PHYS_ADDR 0x11100000
-+#define UART1_PHYS_ADDR 0x11200000
-+#define GPIO2_PHYS_ADDR 0x11700000
-+#define SYS_PHYS_ADDR 0x11900000
-+#define DDMA_PHYS_ADDR 0x14002000
-+#define PSC0_PHYS_ADDR 0x11A00000
-+#define PSC1_PHYS_ADDR 0x11B00000
-+#define PCMCIA_IO_PHYS_ADDR 0xF00000000
-+#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
-+#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
-+#define SD0_PHYS_ADDR 0x10600000
-+#define SD1_PHYS_ADDR 0x10680000
-+#define LCD_PHYS_ADDR 0x15000000
-+#define SWCNT_PHYS_ADDR 0x1110010C
-+#define MAEFE_PHYS_ADDR 0x14012000
-+#define MAEBE_PHYS_ADDR 0x14010000
-+#endif
-+
-+
- /* Static Bus Controller */
- #define MEM_STCFG0 0xB4001000
- #define MEM_STTIME0 0xB4001004
-@@ -369,7 +697,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1000_MAC0_ENABLE 0xB0520000
- #define AU1000_MAC1_ENABLE 0xB0520004
- #define NUM_ETH_INTERFACES 2
--#endif // CONFIG_SOC_AU1000
-+#endif /* CONFIG_SOC_AU1000 */
-
- /* Au1500 */
- #ifdef CONFIG_SOC_AU1500
-@@ -429,6 +757,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1500_GPIO_207 62
- #define AU1500_GPIO_208_215 63
-
-+/* shortcuts */
-+#define INTA AU1000_PCI_INTA
-+#define INTB AU1000_PCI_INTB
-+#define INTC AU1000_PCI_INTC
-+#define INTD AU1000_PCI_INTD
-+
- #define UART0_ADDR 0xB1100000
- #define UART3_ADDR 0xB1400000
-
-@@ -440,7 +774,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1500_MAC0_ENABLE 0xB1520000
- #define AU1500_MAC1_ENABLE 0xB1520004
- #define NUM_ETH_INTERFACES 2
--#endif // CONFIG_SOC_AU1500
-+#endif /* CONFIG_SOC_AU1500 */
-
- /* Au1100 */
- #ifdef CONFIG_SOC_AU1100
-@@ -485,6 +819,22 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1000_GPIO_13 45
- #define AU1000_GPIO_14 46
- #define AU1000_GPIO_15 47
-+#define AU1000_GPIO_16 48
-+#define AU1000_GPIO_17 49
-+#define AU1000_GPIO_18 50
-+#define AU1000_GPIO_19 51
-+#define AU1000_GPIO_20 52
-+#define AU1000_GPIO_21 53
-+#define AU1000_GPIO_22 54
-+#define AU1000_GPIO_23 55
-+#define AU1000_GPIO_24 56
-+#define AU1000_GPIO_25 57
-+#define AU1000_GPIO_26 58
-+#define AU1000_GPIO_27 59
-+#define AU1000_GPIO_28 60
-+#define AU1000_GPIO_29 61
-+#define AU1000_GPIO_30 62
-+#define AU1000_GPIO_31 63
-
- #define UART0_ADDR 0xB1100000
- #define UART1_ADDR 0xB1200000
-@@ -496,7 +846,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1100_ETH0_BASE 0xB0500000
- #define AU1100_MAC0_ENABLE 0xB0520000
- #define NUM_ETH_INTERFACES 1
--#endif // CONFIG_SOC_AU1100
-+#endif /* CONFIG_SOC_AU1100 */
-
- #ifdef CONFIG_SOC_AU1550
- #define AU1550_UART0_INT 0
-@@ -513,14 +863,14 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1550_PSC1_INT 11
- #define AU1550_PSC2_INT 12
- #define AU1550_PSC3_INT 13
--#define AU1550_TOY_INT 14
--#define AU1550_TOY_MATCH0_INT 15
--#define AU1550_TOY_MATCH1_INT 16
--#define AU1550_TOY_MATCH2_INT 17
--#define AU1550_RTC_INT 18
--#define AU1550_RTC_MATCH0_INT 19
--#define AU1550_RTC_MATCH1_INT 20
--#define AU1550_RTC_MATCH2_INT 21
-+#define AU1000_TOY_INT 14
-+#define AU1000_TOY_MATCH0_INT 15
-+#define AU1000_TOY_MATCH1_INT 16
-+#define AU1000_TOY_MATCH2_INT 17
-+#define AU1000_RTC_INT 18
-+#define AU1000_RTC_MATCH0_INT 19
-+#define AU1000_RTC_MATCH1_INT 20
-+#define AU1000_RTC_MATCH2_INT 21
- #define AU1550_NAND_INT 23
- #define AU1550_USB_DEV_REQ_INT 24
- #define AU1550_USB_DEV_SUS_INT 25
-@@ -563,6 +913,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1500_GPIO_207 62
- #define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218
-
-+/* shortcuts */
-+#define INTA AU1550_PCI_INTA
-+#define INTB AU1550_PCI_INTB
-+#define INTC AU1550_PCI_INTC
-+#define INTD AU1550_PCI_INTD
-+
- #define UART0_ADDR 0xB1100000
- #define UART1_ADDR 0xB1200000
- #define UART3_ADDR 0xB1400000
-@@ -575,7 +931,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1550_MAC0_ENABLE 0xB0520000
- #define AU1550_MAC1_ENABLE 0xB0520004
- #define NUM_ETH_INTERFACES 2
--#endif // CONFIG_SOC_AU1550
-+#endif /* CONFIG_SOC_AU1550 */
-
- #ifdef CONFIG_SOC_AU1200
- #define AU1200_UART0_INT 0
-@@ -592,14 +948,14 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1200_PSC1_INT 11
- #define AU1200_AES_INT 12
- #define AU1200_CAMERA_INT 13
--#define AU1200_TOY_INT 14
--#define AU1200_TOY_MATCH0_INT 15
--#define AU1200_TOY_MATCH1_INT 16
--#define AU1200_TOY_MATCH2_INT 17
--#define AU1200_RTC_INT 18
--#define AU1200_RTC_MATCH0_INT 19
--#define AU1200_RTC_MATCH1_INT 20
--#define AU1200_RTC_MATCH2_INT 21
-+#define AU1000_TOY_INT 14
-+#define AU1000_TOY_MATCH0_INT 15
-+#define AU1000_TOY_MATCH1_INT 16
-+#define AU1000_TOY_MATCH2_INT 17
-+#define AU1000_RTC_INT 18
-+#define AU1000_RTC_MATCH0_INT 19
-+#define AU1000_RTC_MATCH1_INT 20
-+#define AU1000_RTC_MATCH2_INT 21
- #define AU1200_NAND_INT 23
- #define AU1200_GPIO_204 24
- #define AU1200_GPIO_205 25
-@@ -607,6 +963,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define AU1200_GPIO_207 27
- #define AU1200_GPIO_208_215 28 // Logical OR of 208:215
- #define AU1200_USB_INT 29
-+#define AU1000_USB_HOST_INT AU1200_USB_INT
- #define AU1200_LCD_INT 30
- #define AU1200_MAE_BOTH_INT 31
- #define AU1000_GPIO_0 32
-@@ -645,20 +1002,36 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define UART0_ADDR 0xB1100000
- #define UART1_ADDR 0xB1200000
-
--#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
--#define USB_HOST_CONFIG 0xB4027ffc
-+#define USB_UOC_BASE 0x14020020
-+#define USB_UOC_LEN 0x20
-+#define USB_OHCI_BASE 0x14020100
-+#define USB_OHCI_LEN 0x100
-+#define USB_EHCI_BASE 0x14020200
-+#define USB_EHCI_LEN 0x100
-+#define USB_UDC_BASE 0x14022000
-+#define USB_UDC_LEN 0x2000
-+#define USB_MSR_BASE 0xB4020000
-+#define USB_MSR_MCFG 4
-+#define USBMSRMCFG_OMEMEN 0
-+#define USBMSRMCFG_OBMEN 1
-+#define USBMSRMCFG_EMEMEN 2
-+#define USBMSRMCFG_EBMEN 3
-+#define USBMSRMCFG_DMEMEN 4
-+#define USBMSRMCFG_DBMEN 5
-+#define USBMSRMCFG_GMEMEN 6
-+#define USBMSRMCFG_OHCCLKEN 16
-+#define USBMSRMCFG_EHCCLKEN 17
-+#define USBMSRMCFG_UDCCLKEN 18
-+#define USBMSRMCFG_PHYPLLEN 19
-+#define USBMSRMCFG_RDCOMB 30
-+#define USBMSRMCFG_PFEN 31
-
--// these are here for prototyping on au1550 (do not exist on au1200)
--#define AU1200_ETH0_BASE 0xB0500000
--#define AU1200_ETH1_BASE 0xB0510000
--#define AU1200_MAC0_ENABLE 0xB0520000
--#define AU1200_MAC1_ENABLE 0xB0520004
--#define NUM_ETH_INTERFACES 2
--#endif // CONFIG_SOC_AU1200
-+#endif /* CONFIG_SOC_AU1200 */
-
- #define AU1000_LAST_INTC0_INT 31
-+#define AU1000_LAST_INTC1_INT 63
- #define AU1000_MAX_INTR 63
--
-+#define INTX 0xFF /* not valid */
-
- /* Programmable Counters 0 and 1 */
- #define SYS_BASE 0xB1900000
-@@ -730,6 +1103,8 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define I2S_CONTROL_D (1<<1)
- #define I2S_CONTROL_CE (1<<0)
-
-+#ifndef CONFIG_SOC_AU1200
-+
- /* USB Host Controller */
- #define USB_OHCI_LEN 0x00100000
-
-@@ -775,6 +1150,8 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define USBDEV_ENABLE (1<<1)
- #define USBDEV_CE (1<<0)
-
-+#endif /* !CONFIG_SOC_AU1200 */
-+
- /* Ethernet Controllers */
-
- /* 4 byte offsets from AU1000_ETH_BASE */
-@@ -1173,6 +1550,37 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define SYS_PF_PSC1_S1 (1 << 1)
- #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
-
-+/* Au1200 Only */
-+#ifdef CONFIG_SOC_AU1200
-+#define SYS_PINFUNC_DMA (1<<31)
-+#define SYS_PINFUNC_S0A (1<<30)
-+#define SYS_PINFUNC_S1A (1<<29)
-+#define SYS_PINFUNC_LP0 (1<<28)
-+#define SYS_PINFUNC_LP1 (1<<27)
-+#define SYS_PINFUNC_LD16 (1<<26)
-+#define SYS_PINFUNC_LD8 (1<<25)
-+#define SYS_PINFUNC_LD1 (1<<24)
-+#define SYS_PINFUNC_LD0 (1<<23)
-+#define SYS_PINFUNC_P1A (3<<21)
-+#define SYS_PINFUNC_P1B (1<<20)
-+#define SYS_PINFUNC_FS3 (1<<19)
-+#define SYS_PINFUNC_P0A (3<<17)
-+#define SYS_PINFUNC_CS (1<<16)
-+#define SYS_PINFUNC_CIM (1<<15)
-+#define SYS_PINFUNC_P1C (1<<14)
-+#define SYS_PINFUNC_U1T (1<<12)
-+#define SYS_PINFUNC_U1R (1<<11)
-+#define SYS_PINFUNC_EX1 (1<<10)
-+#define SYS_PINFUNC_EX0 (1<<9)
-+#define SYS_PINFUNC_U0R (1<<8)
-+#define SYS_PINFUNC_MC (1<<7)
-+#define SYS_PINFUNC_S0B (1<<6)
-+#define SYS_PINFUNC_S0C (1<<5)
-+#define SYS_PINFUNC_P0B (1<<4)
-+#define SYS_PINFUNC_U0T (1<<3)
-+#define SYS_PINFUNC_S1B (1<<2)
-+#endif
-+
- #define SYS_TRIOUTRD 0xB1900100
- #define SYS_TRIOUTCLR 0xB1900100
- #define SYS_OUTPUTRD 0xB1900108
-@@ -1300,7 +1708,6 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- #define SD1_XMIT_FIFO 0xB0680000
- #define SD1_RECV_FIFO 0xB0680004
-
--
- #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
- /* Au1500 PCI Controller */
- #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
-@@ -1363,36 +1770,77 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]
- _ctl_; })
-
-
--#else /* Au1000 and Au1100 */
-+#else /* Au1000 and Au1100 and Au1200 */
-
- /* don't allow any legacy ports probing */
--#define IOPORT_RESOURCE_START 0x10000000;
-+#define IOPORT_RESOURCE_START 0x10000000
- #define IOPORT_RESOURCE_END 0xffffffff
- #define IOMEM_RESOURCE_START 0x10000000
- #define IOMEM_RESOURCE_END 0xffffffff
-
--#ifdef CONFIG_MIPS_PB1000
--#define PCI_IO_START 0x10000000
--#define PCI_IO_END 0x1000ffff
--#define PCI_MEM_START 0x18000000
--#define PCI_MEM_END 0x18ffffff
--#define PCI_FIRST_DEVFN 0
--#define PCI_LAST_DEVFN 1
--#else
--/* no PCI bus controller */
- #define PCI_IO_START 0
- #define PCI_IO_END 0
- #define PCI_MEM_START 0
- #define PCI_MEM_END 0
- #define PCI_FIRST_DEVFN 0
- #define PCI_LAST_DEVFN 0
--#endif
-
- #endif
-
-+#ifndef _LANGUAGE_ASSEMBLY
-+typedef volatile struct
-+{
-+ /* 0x0000 */ u32 toytrim;
-+ /* 0x0004 */ u32 toywrite;
-+ /* 0x0008 */ u32 toymatch0;
-+ /* 0x000C */ u32 toymatch1;
-+ /* 0x0010 */ u32 toymatch2;
-+ /* 0x0014 */ u32 cntrctrl;
-+ /* 0x0018 */ u32 scratch0;
-+ /* 0x001C */ u32 scratch1;
-+ /* 0x0020 */ u32 freqctrl0;
-+ /* 0x0024 */ u32 freqctrl1;
-+ /* 0x0028 */ u32 clksrc;
-+ /* 0x002C */ u32 pinfunc;
-+ /* 0x0030 */ u32 reserved0;
-+ /* 0x0034 */ u32 wakemsk;
-+ /* 0x0038 */ u32 endian;
-+ /* 0x003C */ u32 powerctrl;
-+ /* 0x0040 */ u32 toyread;
-+ /* 0x0044 */ u32 rtctrim;
-+ /* 0x0048 */ u32 rtcwrite;
-+ /* 0x004C */ u32 rtcmatch0;
-+ /* 0x0050 */ u32 rtcmatch1;
-+ /* 0x0054 */ u32 rtcmatch2;
-+ /* 0x0058 */ u32 rtcread;
-+ /* 0x005C */ u32 wakesrc;
-+ /* 0x0060 */ u32 cpupll;
-+ /* 0x0064 */ u32 auxpll;
-+ /* 0x0068 */ u32 reserved1;
-+ /* 0x006C */ u32 reserved2;
-+ /* 0x0070 */ u32 reserved3;
-+ /* 0x0074 */ u32 reserved4;
-+ /* 0x0078 */ u32 slppwr;
-+ /* 0x007C */ u32 sleep;
-+ /* 0x0080 */ u32 reserved5[32];
-+ /* 0x0100 */ u32 trioutrd;
-+#define trioutclr trioutrd
-+ /* 0x0104 */ u32 reserved6;
-+ /* 0x0108 */ u32 outputrd;
-+#define outputset outputrd
-+ /* 0x010C */ u32 outputclr;
-+ /* 0x0110 */ u32 pinstaterd;
-+#define pininputen pinstaterd
-+
-+} AU1X00_SYS;
-+
-+static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE;
-+
-+#endif
- /* Processor information base on prid.
- * Copied from PowerPC.
- */
-+#ifndef _LANGUAGE_ASSEMBLY
- struct cpu_spec {
- /* CPU is matched via (PRID & prid_mask) == prid_value */
- unsigned int prid_mask;
-@@ -1406,3 +1854,6 @@ struct cpu_spec {
- extern struct cpu_spec cpu_specs[];
- extern struct cpu_spec *cur_cpu_spec[];
- #endif
-+
-+#endif
-+
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mach-au1x00/au1xxx_dbdma.h linux_HEAD/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
---- linux-2.6.11.6/include/asm-mips/mach-au1x00/au1xxx_dbdma.h 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mach-au1x00/au1xxx_dbdma.h 2005-03-01 15:00:58.000000000 +0100
-@@ -45,7 +45,7 @@
- #define DDMA_GLOBAL_BASE 0xb4003000
- #define DDMA_CHANNEL_BASE 0xb4002000
-
--typedef struct dbdma_global {
-+typedef volatile struct dbdma_global {
- u32 ddma_config;
- u32 ddma_intstat;
- u32 ddma_throttle;
-@@ -62,7 +62,7 @@ typedef struct dbdma_global {
-
- /* The structure of a DMA Channel.
- */
--typedef struct au1xxx_dma_channel {
-+typedef volatile struct au1xxx_dma_channel {
- u32 ddma_cfg; /* See below */
- u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */
- u32 ddma_statptr; /* word aligned pointer to status word */
-@@ -98,7 +98,7 @@ typedef struct au1xxx_dma_channel {
- /* "Standard" DDMA Descriptor.
- * Must be 32-byte aligned.
- */
--typedef struct au1xxx_ddma_desc {
-+typedef volatile struct au1xxx_ddma_desc {
- u32 dscr_cmd0; /* See below */
- u32 dscr_cmd1; /* See below */
- u32 dscr_source0; /* source phys address */
-@@ -107,6 +107,12 @@ typedef struct au1xxx_ddma_desc {
- u32 dscr_dest1; /* See below */
- u32 dscr_stat; /* completion status */
- u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
-+ /* First 32bytes are HW specific!!!
-+ Lets have some SW data following.. make sure its 32bytes
++ /* Just blast in some control values based upon the chip
++ * documentation. We use the internal memory, I don't know
++ * how to determine the amount available yet.
+ */
-+ u32 sw_status;
-+ u32 sw_context;
-+ u32 sw_reserved[6];
- } au1x_ddma_desc_t;
-
- #define DSCR_CMD0_V (1 << 31) /* Descriptor valid */
-@@ -125,8 +131,11 @@ typedef struct au1xxx_ddma_desc {
- #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */
- #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */
-
-+#define SW_STATUS_INUSE (1<<0)
++ smi_mmiowl(0x07F127C2, DRAM_CTRL);
++ smi_mmiowl(0x02000020, PANEL_HWC_ADDRESS);
++ smi_mmiowl(0x007FF800, PANEL_HWC_ADDRESS);
++ smi_mmiowl(0x00021827, POWER_MODE1_GATE);
++ smi_mmiowl(0x011A0A09, POWER_MODE1_CLOCK);
++ smi_mmiowl(0x00000001, POWER_MODE_CTRL);
++ smi_mmiowl(0x80000000, PANEL_FB_ADDRESS);
++ smi_mmiowl(0x08000800, PANEL_FB_WIDTH);
++ smi_mmiowl(0x04000000, PANEL_WINDOW_WIDTH);
++ smi_mmiowl(0x03000000, PANEL_WINDOW_HEIGHT);
++ smi_mmiowl(0x00000000, PANEL_PLANE_TL);
++ smi_mmiowl(0x02FF03FF, PANEL_PLANE_BR);
++ smi_mmiowl(0x05D003FF, PANEL_HORIZONTAL_TOTAL);
++ smi_mmiowl(0x00C80424, PANEL_HORIZONTAL_SYNC);
++ smi_mmiowl(0x032502FF, PANEL_VERTICAL_TOTAL);
++ smi_mmiowl(0x00060302, PANEL_VERTICAL_SYNC);
++ smi_mmiowl(0x00013905, PANEL_DISPLAY_CTRL);
++ smi_mmiowl(0x01013105, PANEL_DISPLAY_CTRL);
++ waitforvsync();
++ smi_mmiowl(0x03013905, PANEL_DISPLAY_CTRL);
++ waitforvsync();
++ smi_mmiowl(0x07013905, PANEL_DISPLAY_CTRL);
++ waitforvsync();
++ smi_mmiowl(0x0F013905, PANEL_DISPLAY_CTRL);
++ smi_mmiowl(0x0002187F, POWER_MODE1_GATE);
++ smi_mmiowl(0x01011801, POWER_MODE1_CLOCK);
++ smi_mmiowl(0x00000001, POWER_MODE_CTRL);
+
- /* Command 0 device IDs.
- */
-+#ifdef CONFIG_SOC_AU1550
- #define DSCR_CMD0_UART0_TX 0
- #define DSCR_CMD0_UART0_RX 1
- #define DSCR_CMD0_UART3_TX 2
-@@ -155,9 +164,45 @@ typedef struct au1xxx_ddma_desc {
- #define DSCR_CMD0_MAC0_TX 25
- #define DSCR_CMD0_MAC1_RX 26
- #define DSCR_CMD0_MAC1_TX 27
-+#endif /* CONFIG_SOC_AU1550 */
++ smi_mmiowl(0x80000000, PANEL_FB_ADDRESS);
++ smi_mmiowl(0x00000000, PANEL_PAN_CTRL);
++ smi_mmiowl(0x00000000, PANEL_COLOR_KEY);
+
-+#ifdef CONFIG_SOC_AU1200
-+#define DSCR_CMD0_UART0_TX 0
-+#define DSCR_CMD0_UART0_RX 1
-+#define DSCR_CMD0_UART1_TX 2
-+#define DSCR_CMD0_UART1_RX 3
-+#define DSCR_CMD0_DMA_REQ0 4
-+#define DSCR_CMD0_DMA_REQ1 5
-+#define DSCR_CMD0_MAE_BE 6
-+#define DSCR_CMD0_MAE_FE 7
-+#define DSCR_CMD0_SDMS_TX0 8
-+#define DSCR_CMD0_SDMS_RX0 9
-+#define DSCR_CMD0_SDMS_TX1 10
-+#define DSCR_CMD0_SDMS_RX1 11
-+#define DSCR_CMD0_AES_TX 13
-+#define DSCR_CMD0_AES_RX 12
-+#define DSCR_CMD0_PSC0_TX 14
-+#define DSCR_CMD0_PSC0_RX 15
-+#define DSCR_CMD0_PSC1_TX 16
-+#define DSCR_CMD0_PSC1_RX 17
-+#define DSCR_CMD0_CIM_RXA 18
-+#define DSCR_CMD0_CIM_RXB 19
-+#define DSCR_CMD0_CIM_RXC 20
-+#define DSCR_CMD0_MAE_BOTH 21
-+#define DSCR_CMD0_LCD 22
-+#define DSCR_CMD0_NAND_FLASH 23
-+#define DSCR_CMD0_PSC0_SYNC 24
-+#define DSCR_CMD0_PSC1_SYNC 25
-+#define DSCR_CMD0_CIM_SYNC 26
-+#endif /* CONFIG_SOC_AU1200 */
++ if (crt_out) {
++ /* Just sent the panel out to the CRT for now.
++ */
++ smi_mmiowl(0x80000000, CRT_FB_ADDRESS);
++ smi_mmiowl(0x08000800, CRT_FB_WIDTH);
++ smi_mmiowl(0x05D003FF, CRT_HORIZONTAL_TOTAL);
++ smi_mmiowl(0x00C80424, CRT_HORIZONTAL_SYNC);
++ smi_mmiowl(0x032502FF, CRT_VERTICAL_TOTAL);
++ smi_mmiowl(0x00060302, CRT_VERTICAL_SYNC);
++ smi_mmiowl(0x007FF800, CRT_HWC_ADDRESS);
++ smi_mmiowl(0x00010305, CRT_DISPLAY_CTRL);
++ smi_mmiowl(0x00000001, MISC_CTRL);
++ }
+
- #define DSCR_CMD0_THROTTLE 30
- #define DSCR_CMD0_ALWAYS 31
- #define DSCR_NDEV_IDS 32
-+/* THis macro is used to find/create custom device types */
-+#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
-+#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
++}
+
-
- #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25)
- #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20)
-@@ -246,6 +291,43 @@ typedef struct au1xxx_ddma_desc {
- */
- #define NUM_DBDMA_CHANS 16
-
+/*
-+ * Ddma API definitions
-+ * FIXME: may not fit to this header file
-+ */
-+typedef struct dbdma_device_table {
-+ u32 dev_id;
-+ u32 dev_flags;
-+ u32 dev_tsize;
-+ u32 dev_devwidth;
-+ u32 dev_physaddr; /* If FIFO */
-+ u32 dev_intlevel;
-+ u32 dev_intpolarity;
-+} dbdev_tab_t;
-+
-+
-+typedef struct dbdma_chan_config {
-+ spinlock_t lock;
-+
-+ u32 chan_flags;
-+ u32 chan_index;
-+ dbdev_tab_t *chan_src;
-+ dbdev_tab_t *chan_dest;
-+ au1x_dma_chan_t *chan_ptr;
-+ au1x_ddma_desc_t *chan_desc_base;
-+ au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
-+ void *chan_callparam;
-+ void (*chan_callback)(int, void *, struct pt_regs *);
-+} chan_tab_t;
-+
-+#define DEV_FLAGS_INUSE (1 << 0)
-+#define DEV_FLAGS_ANYUSE (1 << 1)
-+#define DEV_FLAGS_OUT (1 << 2)
-+#define DEV_FLAGS_IN (1 << 3)
-+#define DEV_FLAGS_BURSTABLE (1 << 4)
-+#define DEV_FLAGS_SYNC (1 << 5)
-+/* end Ddma API definitions */
-+
- /* External functions for drivers to use.
- */
- /* Use this to allocate a dbdma channel. The device ids are one of the
-@@ -258,18 +340,6 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u
-
- #define DBDMA_MEM_CHAN DSCR_CMD0_ALWAYS
-
--/* ACK! These should be in a board specific description file.
--*/
--#ifdef CONFIG_MIPS_PB1550
--#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
--#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
--#endif
--#ifdef CONFIG_MIPS_DB1550
--#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
--#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
--#endif
--
--
- /* Set the device width of a in/out fifo.
- */
- u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits);
-@@ -280,8 +350,8 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid,
-
- /* Put buffers on source/destination descriptors.
- */
--u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes);
--u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes);
-+u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
-+u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
-
- /* Get a buffer from the destination descriptor.
- */
-@@ -295,5 +365,25 @@ u32 au1xxx_get_dma_residue(u32 chanid);
- void au1xxx_dbdma_chan_free(u32 chanid);
- void au1xxx_dbdma_dump(u32 chanid);
-
-+u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
-+
-+u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
-+
-+/*
-+ Some compatibilty macros --
-+ Needed to make changes to API without breaking existing drivers
-+*/
-+#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
-+#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
-+
-+#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
-+#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
-+
-+/*
-+ * Flags for the put_source/put_dest functions.
-+ */
-+#define DDMA_FLAGS_IE (1<<0)
-+#define DDMA_FLAGS_NOIE (1<<1)
-+
- #endif /* _LANGUAGE_ASSEMBLY */
- #endif /* _AU1000_DBDMA_H_ */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mach-db1x00/db1200.h linux_HEAD/include/asm-mips/mach-db1x00/db1200.h
---- linux-2.6.11.6/include/asm-mips/mach-db1x00/db1200.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mach-db1x00/db1200.h 2005-03-01 07:33:19.000000000 +0100
-@@ -0,0 +1,215 @@
-+/*
-+ * AMD Alchemy DB1200 Referrence Board
-+ * Board Registers defines.
++ * Unmap in the memory mapped IO registers
+ *
-+ * ########################################################################
-+ *
-+ * This program is free software; you can distribute it and/or modify it
-+ * under the terms of the GNU General Public License (Version 2) as
-+ * published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-+ * for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along
-+ * with this program; if not, write to the Free Software Foundation, Inc.,
-+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-+ *
-+ * ########################################################################
-+ *
-+ *
+ */
-+#ifndef __ASM_DB1200_H
-+#define __ASM_DB1200_H
+
-+#include <linux/config.h>
-+#include <linux/types.h>
-+
-+// This is defined in au1000.h with bogus value
-+#undef AU1X00_EXTERNAL_INT
-+
-+#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
-+#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
-+#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
-+#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
-+
-+/* SPI and SMB are muxed on the Pb1200 board.
-+ Refer to board documentation.
-+ */
-+#define SPI_PSC_BASE PSC0_BASE_ADDR
-+#define SMBUS_PSC_BASE PSC0_BASE_ADDR
-+/* AC97 and I2S are muxed on the Pb1200 board.
-+ Refer to board documentation.
-+ */
-+#define AC97_PSC_BASE PSC1_BASE_ADDR
-+#define I2S_PSC_BASE PSC1_BASE_ADDR
-+
-+#define BCSR_KSEG1_ADDR 0xB9800000
-+
-+typedef volatile struct
++static void __devinit smi_unmap_mmio(void)
+{
-+ /*00*/ u16 whoami;
-+ u16 reserved0;
-+ /*04*/ u16 status;
-+ u16 reserved1;
-+ /*08*/ u16 switches;
-+ u16 reserved2;
-+ /*0C*/ u16 resets;
-+ u16 reserved3;
++ if (SMIRegs) {
++ iounmap(SMIRegs);
++ SMIRegs = NULL;
++ }
++}
+
-+ /*10*/ u16 pcmcia;
-+ u16 reserved4;
-+ /*14*/ u16 board;
-+ u16 reserved5;
-+ /*18*/ u16 disk_leds;
-+ u16 reserved6;
-+ /*1C*/ u16 system;
-+ u16 reserved7;
+
-+ /*20*/ u16 intclr;
-+ u16 reserved8;
-+ /*24*/ u16 intset;
-+ u16 reserved9;
-+ /*28*/ u16 intclr_mask;
-+ u16 reserved10;
-+ /*2C*/ u16 intset_mask;
-+ u16 reserved11;
-+
-+ /*30*/ u16 sig_status;
-+ u16 reserved12;
-+ /*34*/ u16 int_status;
-+ u16 reserved13;
-+ /*38*/ u16 reserved14;
-+ u16 reserved15;
-+ /*3C*/ u16 reserved16;
-+ u16 reserved17;
-+
-+} BCSR;
-+
-+static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
-+
+/*
-+ * Register bit definitions for the BCSRs
-+ */
-+#define BCSR_WHOAMI_DCID 0x000F
-+#define BCSR_WHOAMI_CPLD 0x00F0
-+#define BCSR_WHOAMI_BOARD 0x0F00
-+
-+#define BCSR_STATUS_PCMCIA0VS 0x0003
-+#define BCSR_STATUS_PCMCIA1VS 0x000C
-+#define BCSR_STATUS_SWAPBOOT 0x0040
-+#define BCSR_STATUS_FLASHBUSY 0x0100
-+#define BCSR_STATUS_IDECBLID 0x0200
-+#define BCSR_STATUS_SD0WP 0x0400
-+#define BCSR_STATUS_U0RXD 0x1000
-+#define BCSR_STATUS_U1RXD 0x2000
-+
-+#define BCSR_SWITCHES_OCTAL 0x00FF
-+#define BCSR_SWITCHES_DIP_1 0x0080
-+#define BCSR_SWITCHES_DIP_2 0x0040
-+#define BCSR_SWITCHES_DIP_3 0x0020
-+#define BCSR_SWITCHES_DIP_4 0x0010
-+#define BCSR_SWITCHES_DIP_5 0x0008
-+#define BCSR_SWITCHES_DIP_6 0x0004
-+#define BCSR_SWITCHES_DIP_7 0x0002
-+#define BCSR_SWITCHES_DIP_8 0x0001
-+#define BCSR_SWITCHES_ROTARY 0x0F00
-+
-+#define BCSR_RESETS_ETH 0x0001
-+#define BCSR_RESETS_CAMERA 0x0002
-+#define BCSR_RESETS_DC 0x0004
-+#define BCSR_RESETS_IDE 0x0008
-+#define BCSR_RESETS_TV 0x0010
-+/* not resets but in the same register */
-+#define BCSR_RESETS_PWMR1mUX 0x0800
-+#define BCSR_RESETS_PCS0MUX 0x1000
-+#define BCSR_RESETS_PCS1MUX 0x2000
-+#define BCSR_RESETS_SPISEL 0x4000
-+
-+#define BCSR_PCMCIA_PC0VPP 0x0003
-+#define BCSR_PCMCIA_PC0VCC 0x000C
-+#define BCSR_PCMCIA_PC0DRVEN 0x0010
-+#define BCSR_PCMCIA_PC0RST 0x0080
-+#define BCSR_PCMCIA_PC1VPP 0x0300
-+#define BCSR_PCMCIA_PC1VCC 0x0C00
-+#define BCSR_PCMCIA_PC1DRVEN 0x1000
-+#define BCSR_PCMCIA_PC1RST 0x8000
-+
-+#define BCSR_BOARD_LCDVEE 0x0001
-+#define BCSR_BOARD_LCDVDD 0x0002
-+#define BCSR_BOARD_LCDBL 0x0004
-+#define BCSR_BOARD_CAMSNAP 0x0010
-+#define BCSR_BOARD_CAMPWR 0x0020
-+#define BCSR_BOARD_SD0PWR 0x0040
-+
-+#define BCSR_LEDS_DECIMALS 0x0003
-+#define BCSR_LEDS_LED0 0x0100
-+#define BCSR_LEDS_LED1 0x0200
-+#define BCSR_LEDS_LED2 0x0400
-+#define BCSR_LEDS_LED3 0x0800
-+
-+#define BCSR_SYSTEM_POWEROFF 0x4000
-+#define BCSR_SYSTEM_RESET 0x8000
-+
-+/* Bit positions for the different interrupt sources */
-+#define BCSR_INT_IDE 0x0001
-+#define BCSR_INT_ETH 0x0002
-+#define BCSR_INT_PC0 0x0004
-+#define BCSR_INT_PC0STSCHG 0x0008
-+#define BCSR_INT_PC1 0x0010
-+#define BCSR_INT_PC1STSCHG 0x0020
-+#define BCSR_INT_DC 0x0040
-+#define BCSR_INT_FLASHBUSY 0x0080
-+#define BCSR_INT_PC0INSERT 0x0100
-+#define BCSR_INT_PC0EJECT 0x0200
-+#define BCSR_INT_PC1INSERT 0x0400
-+#define BCSR_INT_PC1EJECT 0x0800
-+#define BCSR_INT_SD0INSERT 0x1000
-+#define BCSR_INT_SD0EJECT 0x2000
-+
-+#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
-+#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
-+
-+#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
-+#define AU1XXX_ATA_PHYS_LEN (0x100)
-+#define AU1XXX_ATA_REG_OFFSET (5)
-+#define AU1XXX_ATA_INT DB1200_IDE_INT
-+#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
-+#define AU1XXX_ATA_RQSIZE 128
-+
-+#define NAND_PHYS_ADDR 0x20000000
-+
-+/*
-+ * External Interrupts for Pb1200 as of 8/6/2004.
-+ * Bit positions in the CPLD registers can be calculated by taking
-+ * the interrupt define and subtracting the DB1200_INT_BEGIN value.
-+ * *example: IDE bis pos is = 64 - 64
-+ ETH bit pos is = 65 - 64
-+ */
-+#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
-+#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
-+#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
-+#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
-+#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
-+#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
-+#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
-+#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
-+#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
-+#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
-+#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
-+#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
-+#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
-+#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
-+#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
-+
-+#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
-+
-+/* For drivers/pcmcia/au1000_db1x00.c */
-+#define BOARD_PC0_INT DB1200_PC0_INT
-+#define BOARD_PC1_INT DB1200_PC1_INT
-+#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
-+
-+#endif /* __ASM_DB1200_H */
-+
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mach-ip27/mmzone.h linux_HEAD/include/asm-mips/mach-ip27/mmzone.h
---- linux-2.6.11.6/include/asm-mips/mach-ip27/mmzone.h 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mach-ip27/mmzone.h 2005-03-25 09:05:33.000000000 +0100
-@@ -10,7 +10,6 @@
- #define LEVELS_PER_SLICE 128
-
- struct slice_data {
-- unsigned long irq_alloc_mask[2];
- unsigned long irq_enable_mask[2];
- int level_to_irq[LEVELS_PER_SLICE];
- };
-@@ -20,6 +19,7 @@ struct hub_data {
- DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW);
- cpumask_t h_cpus;
- unsigned long slice_map;
-+ unsigned long irq_alloc_mask[2];
- struct slice_data slice[2];
- };
-
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mach-ip27/spaces.h linux_HEAD/include/asm-mips/mach-ip27/spaces.h
---- linux-2.6.11.6/include/asm-mips/mach-ip27/spaces.h 2005-03-26 04:28:26.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mach-ip27/spaces.h 2005-02-21 22:17:46.000000000 +0100
-@@ -20,6 +20,7 @@
- #define IO_BASE 0x9200000000000000
- #define MSPEC_BASE 0x9400000000000000
- #define UNCAC_BASE 0x9600000000000000
-+#define MAP_BASE 0xc000000000000000
-
- #define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
- #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mach-pb1x00/pb1200.h linux_HEAD/include/asm-mips/mach-pb1x00/pb1200.h
---- linux-2.6.11.6/include/asm-mips/mach-pb1x00/pb1200.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mach-pb1x00/pb1200.h 2005-03-01 07:33:19.000000000 +0100
-@@ -0,0 +1,245 @@
-+/*
-+ * AMD Alchemy PB1200 Referrence Board
-+ * Board Registers defines.
++ * Unmap in the screen memory
+ *
-+ * ########################################################################
-+ *
-+ * This program is free software; you can distribute it and/or modify it
-+ * under the terms of the GNU General Public License (Version 2) as
-+ * published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-+ * for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along
-+ * with this program; if not, write to the Free Software Foundation, Inc.,
-+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-+ *
-+ * ########################################################################
-+ *
-+ *
+ */
-+#ifndef __ASM_PB1200_H
-+#define __ASM_PB1200_H
++static void __devinit smi_unmap_smem(void)
++{
++ if (SMILFB) {
++ iounmap(SMILFB);
++ SMILFB = NULL;
++ }
++}
+
-+#include <linux/config.h>
-+#include <linux/types.h>
++void
++vgxfb_setup (char *options)
++{
++
++ if (!options || !*options)
++ return;
+
-+// This is defined in au1000.h with bogus value
-+#undef AU1X00_EXTERNAL_INT
++ /* The only thing I'm looking for right now is to disable a
++ * CRT output that mirrors the panel display.
++ */
++ if (strcmp(options, "no_crt") == 0)
++ crt_out = 0;
+
-+#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
-+#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
-+#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
-+#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
++ return;
++}
+
-+/* SPI and SMB are muxed on the Pb1200 board.
-+ Refer to board documentation.
-+ */
-+#define SPI_PSC_BASE PSC0_BASE_ADDR
-+#define SMBUS_PSC_BASE PSC0_BASE_ADDR
-+/* AC97 and I2S are muxed on the Pb1200 board.
-+ Refer to board documentation.
-+ */
-+#define AC97_PSC_BASE PSC1_BASE_ADDR
-+#define I2S_PSC_BASE PSC1_BASE_ADDR
++static struct fb_ops smifb_ops = {
++ .owner = THIS_MODULE,
++ .fb_setcolreg = smi_setcolreg,
++ .fb_fillrect = cfb_fillrect,
++ .fb_copyarea = cfb_copyarea,
++ .fb_imageblit = cfb_imageblit,
++ .fb_cursor = soft_cursor,
++};
+
-+#define BCSR_KSEG1_ADDR 0xAD800000
-+
-+typedef volatile struct
++static int __devinit vgx_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
-+ /*00*/ u16 whoami;
-+ u16 reserved0;
-+ /*04*/ u16 status;
-+ u16 reserved1;
-+ /*08*/ u16 switches;
-+ u16 reserved2;
-+ /*0C*/ u16 resets;
-+ u16 reserved3;
++ int err;
+
-+ /*10*/ u16 pcmcia;
-+ u16 reserved4;
-+ /*14*/ u16 board;
-+ u16 reserved5;
-+ /*18*/ u16 disk_leds;
-+ u16 reserved6;
-+ /*1C*/ u16 system;
-+ u16 reserved7;
++ /* Enable the chip.
++ */
++ err = pci_enable_device(dev);
++ if (err)
++ return err;
+
-+ /*20*/ u16 intclr;
-+ u16 reserved8;
-+ /*24*/ u16 intset;
-+ u16 reserved9;
-+ /*28*/ u16 intclr_mask;
-+ u16 reserved10;
-+ /*2C*/ u16 intset_mask;
-+ u16 reserved11;
+
-+ /*30*/ u16 sig_status;
-+ u16 reserved12;
-+ /*34*/ u16 int_status;
-+ u16 reserved13;
-+ /*38*/ u16 reserved14;
-+ u16 reserved15;
-+ /*3C*/ u16 reserved16;
-+ u16 reserved17;
++ /* Set up MMIO space.
++ */
++ smifb_fix.mmio_start = pci_resource_start(dev,1);
++ smifb_fix.mmio_len = 0x00200000;
++ SMIRegs = ioremap(smifb_fix.mmio_start, smifb_fix.mmio_len);
+
-+} BCSR;
++ /* Set up framebuffer. It's a 64M space, various amount of
++ * internal memory. I don't know how to determine the real
++ * amount of memory (yet).
++ */
++ smifb_fix.smem_start = pci_resource_start(dev,0);
++ smifb_fix.smem_len = 0x00800000;
++ SMILFB = ioremap(smifb_fix.smem_start, smifb_fix.smem_len);
+
-+static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
++ memset((void *)SMILFB, 0, smifb_fix.smem_len);
+
-+/*
-+ * Register bit definitions for the BCSRs
-+ */
-+#define BCSR_WHOAMI_DCID 0x000F
-+#define BCSR_WHOAMI_CPLD 0x00F0
-+#define BCSR_WHOAMI_BOARD 0x0F00
++ info.screen_base = SMILFB;
++ info.fbops = &smifb_ops;
++ info.fix = smifb_fix;
+
-+#define BCSR_STATUS_PCMCIA0VS 0x0003
-+#define BCSR_STATUS_PCMCIA1VS 0x000C
-+#define BCSR_STATUS_SWAPBOOT 0x0040
-+#define BCSR_STATUS_FLASHBUSY 0x0100
-+#define BCSR_STATUS_IDECBLID 0x0200
-+#define BCSR_STATUS_SD0WP 0x0400
-+#define BCSR_STATUS_SD1WP 0x0800
-+#define BCSR_STATUS_U0RXD 0x1000
-+#define BCSR_STATUS_U1RXD 0x2000
++ info.flags = FBINFO_FLAG_DEFAULT;
+
-+#define BCSR_SWITCHES_OCTAL 0x00FF
-+#define BCSR_SWITCHES_DIP_1 0x0080
-+#define BCSR_SWITCHES_DIP_2 0x0040
-+#define BCSR_SWITCHES_DIP_3 0x0020
-+#define BCSR_SWITCHES_DIP_4 0x0010
-+#define BCSR_SWITCHES_DIP_5 0x0008
-+#define BCSR_SWITCHES_DIP_6 0x0004
-+#define BCSR_SWITCHES_DIP_7 0x0002
-+#define BCSR_SWITCHES_DIP_8 0x0001
-+#define BCSR_SWITCHES_ROTARY 0x0F00
++ info.pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
++ if (!info.pseudo_palette) {
++ return -ENOMEM;
++ }
++ memset((void *)info.pseudo_palette, 0, sizeof(u32) *16);
+
-+#define BCSR_RESETS_ETH 0x0001
-+#define BCSR_RESETS_CAMERA 0x0002
-+#define BCSR_RESETS_DC 0x0004
-+#define BCSR_RESETS_IDE 0x0008
-+/* not resets but in the same register */
-+#define BCSR_RESETS_WSCFSM 0x0800
-+#define BCSR_RESETS_PCS0MUX 0x1000
-+#define BCSR_RESETS_PCS1MUX 0x2000
-+#define BCSR_RESETS_SPISEL 0x4000
-+#define BCSR_RESETS_SD1MUX 0x8000
++ fb_alloc_cmap(&info.cmap,256,0);
+
-+#define BCSR_PCMCIA_PC0VPP 0x0003
-+#define BCSR_PCMCIA_PC0VCC 0x000C
-+#define BCSR_PCMCIA_PC0DRVEN 0x0010
-+#define BCSR_PCMCIA_PC0RST 0x0080
-+#define BCSR_PCMCIA_PC1VPP 0x0300
-+#define BCSR_PCMCIA_PC1VCC 0x0C00
-+#define BCSR_PCMCIA_PC1DRVEN 0x1000
-+#define BCSR_PCMCIA_PC1RST 0x8000
++ smi_setmode();
+
-+#define BCSR_BOARD_LCDVEE 0x0001
-+#define BCSR_BOARD_LCDVDD 0x0002
-+#define BCSR_BOARD_LCDBL 0x0004
-+#define BCSR_BOARD_CAMSNAP 0x0010
-+#define BCSR_BOARD_CAMPWR 0x0020
-+#define BCSR_BOARD_SD0PWR 0x0040
-+#define BCSR_BOARD_SD1PWR 0x0080
++ info.var = smifb_var;
+
-+#define BCSR_LEDS_DECIMALS 0x00FF
-+#define BCSR_LEDS_LED0 0x0100
-+#define BCSR_LEDS_LED1 0x0200
-+#define BCSR_LEDS_LED2 0x0400
-+#define BCSR_LEDS_LED3 0x0800
++ if (register_framebuffer(&info) < 0)
++ goto failed;
+
-+#define BCSR_SYSTEM_VDDI 0x001F
-+#define BCSR_SYSTEM_POWEROFF 0x4000
-+#define BCSR_SYSTEM_RESET 0x8000
++ return 0;
+
-+/* Bit positions for the different interrupt sources */
-+#define BCSR_INT_IDE 0x0001
-+#define BCSR_INT_ETH 0x0002
-+#define BCSR_INT_PC0 0x0004
-+#define BCSR_INT_PC0STSCHG 0x0008
-+#define BCSR_INT_PC1 0x0010
-+#define BCSR_INT_PC1STSCHG 0x0020
-+#define BCSR_INT_DC 0x0040
-+#define BCSR_INT_FLASHBUSY 0x0080
-+#define BCSR_INT_PC0INSERT 0x0100
-+#define BCSR_INT_PC0EJECT 0x0200
-+#define BCSR_INT_PC1INSERT 0x0400
-+#define BCSR_INT_PC1EJECT 0x0800
-+#define BCSR_INT_SD0INSERT 0x1000
-+#define BCSR_INT_SD0EJECT 0x2000
-+#define BCSR_INT_SD1INSERT 0x4000
-+#define BCSR_INT_SD1EJECT 0x8000
++failed:
++ smi_unmap_smem();
++ smi_unmap_mmio();
+
-+#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
-+#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
++ return err;
++}
+
-+#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
-+#define AU1XXX_ATA_PHYS_LEN (0x100)
-+#define AU1XXX_ATA_REG_OFFSET (5)
-+#define AU1XXX_ATA_INT PB1200_IDE_INT
-+#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
-+#define AU1XXX_ATA_RQSIZE 128
-+
-+#define NAND_PHYS_ADDR 0x1C000000
-+
-+/* Timing values as described in databook, * ns value stripped of
-+ * lower 2 bits.
-+ * These defines are here rather than an SOC1200 generic file because
-+ * the parts chosen on another board may be different and may require
-+ * different timings.
-+ */
-+#define NAND_T_H (18 >> 2)
-+#define NAND_T_PUL (30 >> 2)
-+#define NAND_T_SU (30 >> 2)
-+#define NAND_T_WH (30 >> 2)
-+
-+/* Bitfield shift amounts */
-+#define NAND_T_H_SHIFT 0
-+#define NAND_T_PUL_SHIFT 4
-+#define NAND_T_SU_SHIFT 8
-+#define NAND_T_WH_SHIFT 12
-+
-+#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
-+ ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
-+ ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
-+ ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
-+
-+
-+/*
-+ * External Interrupts for Pb1200 as of 8/6/2004.
-+ * Bit positions in the CPLD registers can be calculated by taking
-+ * the interrupt define and subtracting the PB1200_INT_BEGIN value.
-+ * *example: IDE bis pos is = 64 - 64
-+ ETH bit pos is = 65 - 64
-+ */
-+#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
-+#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
-+#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
-+#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
-+#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
-+#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
-+#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
-+#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
-+#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
-+#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
-+#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
-+#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
-+#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
-+#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
-+#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
-+#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
-+#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
-+
-+#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
-+
-+/* For drivers/pcmcia/au1000_db1x00.c */
-+#define BOARD_PC0_INT PB1200_PC0_INT
-+#define BOARD_PC1_INT PB1200_PC1_INT
-+#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
-+
-+#endif /* __ASM_PB1200_H */
-+
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mips-boards/msc01_pci.h linux_HEAD/include/asm-mips/mips-boards/msc01_pci.h
---- linux-2.6.11.6/include/asm-mips/mips-boards/msc01_pci.h 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mips-boards/msc01_pci.h 2005-02-17 21:50:45.000000000 +0100
-@@ -1,8 +1,9 @@
- /*
- * PCI Register definitions for the MIPS System Controller.
- *
-- * Carsten Langgaard, carstenl at mips.com
-- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
-+ * Copyright (C) 2002, 2005 MIPS Technologies, Inc. All rights reserved.
-+ * Authors: Carsten Langgaard <carstenl at mips.com>
-+ * Maciej W. Rozycki <macro at mips.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
-@@ -29,22 +30,22 @@
- #define MSC01_PCI_CFGADDR_OFS 0x0610
- #define MSC01_PCI_CFGDATA_OFS 0x0618
- #define MSC01_PCI_IACK_OFS 0x0620
--#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */
--#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */
--#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */
--#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */
--#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */
--#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */
--#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */
--#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */
--#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */
--#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */
--#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */
--#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */
--#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */
--#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */
--#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */
--#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */
-+#define MSC01_PCI_HEAD0_OFS 0x2000 /* DevID, VendorID */
-+#define MSC01_PCI_HEAD1_OFS 0x2008 /* Status, Command */
-+#define MSC01_PCI_HEAD2_OFS 0x2010 /* Class code, RevID */
-+#define MSC01_PCI_HEAD3_OFS 0x2018 /* bist, header, latency */
-+#define MSC01_PCI_HEAD4_OFS 0x2020 /* BAR 0 */
-+#define MSC01_PCI_HEAD5_OFS 0x2028 /* BAR 1 */
-+#define MSC01_PCI_HEAD6_OFS 0x2030 /* BAR 2 */
-+#define MSC01_PCI_HEAD7_OFS 0x2038 /* BAR 3 */
-+#define MSC01_PCI_HEAD8_OFS 0x2040 /* BAR 4 */
-+#define MSC01_PCI_HEAD9_OFS 0x2048 /* BAR 5 */
-+#define MSC01_PCI_HEAD10_OFS 0x2050 /* CardBus CIS Ptr */
-+#define MSC01_PCI_HEAD11_OFS 0x2058 /* SubSystem ID, -VendorID */
-+#define MSC01_PCI_HEAD12_OFS 0x2060 /* ROM BAR */
-+#define MSC01_PCI_HEAD13_OFS 0x2068 /* Capabilities ptr */
-+#define MSC01_PCI_HEAD14_OFS 0x2070 /* reserved */
-+#define MSC01_PCI_HEAD15_OFS 0x2078 /* Maxl, ming, intpin, int */
- #define MSC01_PCI_BAR0_OFS 0x2220
- #define MSC01_PCI_CFG_OFS 0x2380
- #define MSC01_PCI_SWAP_OFS 0x2388
-@@ -86,73 +87,73 @@
- #define MSC01_PCI_P2SCMAPL_MAP_SHF 24
- #define MSC01_PCI_P2SCMAPL_MAP_MSK 0xff000000
-
--#define MSC01_PCI_INTCFG_RST_SHF 10
--#define MSC01_PCI_INTCFG_RST_MSK 0x00000400
--#define MSC01_PCI_INTCFG_RST_BIT 0x00000400
--#define MSC01_PCI_INTCFG_MWE_SHF 9
--#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200
--#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200
--#define MSC01_PCI_INTCFG_DTO_SHF 8
--#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100
--#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100
--#define MSC01_PCI_INTCFG_MA_SHF 7
--#define MSC01_PCI_INTCFG_MA_MSK 0x00000080
--#define MSC01_PCI_INTCFG_MA_BIT 0x00000080
--#define MSC01_PCI_INTCFG_TA_SHF 6
--#define MSC01_PCI_INTCFG_TA_MSK 0x00000040
--#define MSC01_PCI_INTCFG_TA_BIT 0x00000040
--#define MSC01_PCI_INTCFG_RTY_SHF 5
--#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020
--#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020
--#define MSC01_PCI_INTCFG_MWP_SHF 4
--#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010
--#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010
--#define MSC01_PCI_INTCFG_MRP_SHF 3
--#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008
--#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008
--#define MSC01_PCI_INTCFG_SWP_SHF 2
--#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004
--#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004
--#define MSC01_PCI_INTCFG_SRP_SHF 1
--#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002
--#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002
--#define MSC01_PCI_INTCFG_SE_SHF 0
--#define MSC01_PCI_INTCFG_SE_MSK 0x00000001
--#define MSC01_PCI_INTCFG_SE_BIT 0x00000001
--
--#define MSC01_PCI_INTSTAT_RST_SHF 10
--#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400
--#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400
--#define MSC01_PCI_INTSTAT_MWE_SHF 9
--#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200
--#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200
--#define MSC01_PCI_INTSTAT_DTO_SHF 8
--#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100
--#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100
--#define MSC01_PCI_INTSTAT_MA_SHF 7
--#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080
--#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080
--#define MSC01_PCI_INTSTAT_TA_SHF 6
--#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040
--#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040
--#define MSC01_PCI_INTSTAT_RTY_SHF 5
--#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020
--#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020
--#define MSC01_PCI_INTSTAT_MWP_SHF 4
--#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010
--#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010
--#define MSC01_PCI_INTSTAT_MRP_SHF 3
--#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008
--#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008
--#define MSC01_PCI_INTSTAT_SWP_SHF 2
--#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004
--#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004
--#define MSC01_PCI_INTSTAT_SRP_SHF 1
--#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002
--#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002
--#define MSC01_PCI_INTSTAT_SE_SHF 0
--#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001
--#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001
-+#define MSC01_PCI_INTCFG_RST_SHF 10
-+#define MSC01_PCI_INTCFG_RST_MSK 0x00000400
-+#define MSC01_PCI_INTCFG_RST_BIT 0x00000400
-+#define MSC01_PCI_INTCFG_MWE_SHF 9
-+#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200
-+#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200
-+#define MSC01_PCI_INTCFG_DTO_SHF 8
-+#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100
-+#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100
-+#define MSC01_PCI_INTCFG_MA_SHF 7
-+#define MSC01_PCI_INTCFG_MA_MSK 0x00000080
-+#define MSC01_PCI_INTCFG_MA_BIT 0x00000080
-+#define MSC01_PCI_INTCFG_TA_SHF 6
-+#define MSC01_PCI_INTCFG_TA_MSK 0x00000040
-+#define MSC01_PCI_INTCFG_TA_BIT 0x00000040
-+#define MSC01_PCI_INTCFG_RTY_SHF 5
-+#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020
-+#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020
-+#define MSC01_PCI_INTCFG_MWP_SHF 4
-+#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010
-+#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010
-+#define MSC01_PCI_INTCFG_MRP_SHF 3
-+#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008
-+#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008
-+#define MSC01_PCI_INTCFG_SWP_SHF 2
-+#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004
-+#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004
-+#define MSC01_PCI_INTCFG_SRP_SHF 1
-+#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002
-+#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002
-+#define MSC01_PCI_INTCFG_SE_SHF 0
-+#define MSC01_PCI_INTCFG_SE_MSK 0x00000001
-+#define MSC01_PCI_INTCFG_SE_BIT 0x00000001
-+
-+#define MSC01_PCI_INTSTAT_RST_SHF 10
-+#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400
-+#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400
-+#define MSC01_PCI_INTSTAT_MWE_SHF 9
-+#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200
-+#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200
-+#define MSC01_PCI_INTSTAT_DTO_SHF 8
-+#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100
-+#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100
-+#define MSC01_PCI_INTSTAT_MA_SHF 7
-+#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080
-+#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080
-+#define MSC01_PCI_INTSTAT_TA_SHF 6
-+#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040
-+#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040
-+#define MSC01_PCI_INTSTAT_RTY_SHF 5
-+#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020
-+#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020
-+#define MSC01_PCI_INTSTAT_MWP_SHF 4
-+#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010
-+#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010
-+#define MSC01_PCI_INTSTAT_MRP_SHF 3
-+#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008
-+#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008
-+#define MSC01_PCI_INTSTAT_SWP_SHF 2
-+#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004
-+#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004
-+#define MSC01_PCI_INTSTAT_SRP_SHF 1
-+#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002
-+#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002
-+#define MSC01_PCI_INTSTAT_SE_SHF 0
-+#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001
-+#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001
-
- #define MSC01_PCI_CFGADDR_BNUM_SHF 16
- #define MSC01_PCI_CFGADDR_BNUM_MSK 0x00ff0000
-@@ -167,29 +168,29 @@
- #define MSC01_PCI_CFGDATA_DATA_MSK 0xffffffff
-
- /* The defines below are ONLY valid for a MEM bar! */
--#define MSC01_PCI_BAR0_SIZE_SHF 4
--#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0
--#define MSC01_PCI_BAR0_P_SHF 3
--#define MSC01_PCI_BAR0_P_MSK 0x00000008
--#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK
--#define MSC01_PCI_BAR0_D_SHF 1
--#define MSC01_PCI_BAR0_D_MSK 0x00000006
--#define MSC01_PCI_BAR0_T_SHF 0
--#define MSC01_PCI_BAR0_T_MSK 0x00000001
--#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK
--
--
--#define MSC01_PCI_CFG_RA_SHF 17
--#define MSC01_PCI_CFG_RA_MSK 0x00020000
--#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK
--#define MSC01_PCI_CFG_G_SHF 16
--#define MSC01_PCI_CFG_G_MSK 0x00010000
--#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK
--#define MSC01_PCI_CFG_EN_SHF 15
--#define MSC01_PCI_CFG_EN_MSK 0x00008000
--#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK
--#define MSC01_PCI_CFG_MAXRTRY_SHF 0
--#define MSC01_PCI_CFG_MAXRTRY_MSK 0x000000ff
-+#define MSC01_PCI_BAR0_SIZE_SHF 4
-+#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0
-+#define MSC01_PCI_BAR0_P_SHF 3
-+#define MSC01_PCI_BAR0_P_MSK 0x00000008
-+#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK
-+#define MSC01_PCI_BAR0_D_SHF 1
-+#define MSC01_PCI_BAR0_D_MSK 0x00000006
-+#define MSC01_PCI_BAR0_T_SHF 0
-+#define MSC01_PCI_BAR0_T_MSK 0x00000001
-+#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK
-+
-+
-+#define MSC01_PCI_CFG_RA_SHF 17
-+#define MSC01_PCI_CFG_RA_MSK 0x00020000
-+#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK
-+#define MSC01_PCI_CFG_G_SHF 16
-+#define MSC01_PCI_CFG_G_MSK 0x00010000
-+#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK
-+#define MSC01_PCI_CFG_EN_SHF 15
-+#define MSC01_PCI_CFG_EN_MSK 0x00008000
-+#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK
-+#define MSC01_PCI_CFG_MAXRTRY_SHF 0
-+#define MSC01_PCI_CFG_MAXRTRY_MSK 0x00000fff
-
- #define MSC01_PCI_SWAP_IO_SHF 18
- #define MSC01_PCI_SWAP_IO_MSK 0x000c0000
-@@ -219,19 +220,19 @@ extern unsigned long _pcictrl_msc;
- * Registers absolute addresses
- */
-
--#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS)
--#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS)
--#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS)
--#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS)
--#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS)
--#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS)
--#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS)
--#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS)
--#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS)
--#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS)
--#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS)
--#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS)
--#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS)
-+#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS)
-+#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS)
-+#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS)
-+#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS)
-+#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS)
-+#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS)
-+#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS)
-+#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS)
-+#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS)
-+#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS)
-+#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS)
-+#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS)
-+#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS)
- #define MSC01_PCI_IACK (MSC01_PCI_REG_BASE + MSC01_PCI_IACK_OFS)
- #define MSC01_PCI_HEAD0 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD0_OFS)
- #define MSC01_PCI_HEAD1 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD1_OFS)
-@@ -248,7 +249,7 @@ extern unsigned long _pcictrl_msc;
- #define MSC01_PCI_HEAD12 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
- #define MSC01_PCI_HEAD13 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
- #define MSC01_PCI_HEAD14 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
--#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
-+#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)
- #define MSC01_PCI_BAR0 (MSC01_PCI_REG_BASE + MSC01_PCI_BAR0_OFS)
- #define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS)
- #define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS)
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mipsregs.h linux_HEAD/include/asm-mips/mipsregs.h
---- linux-2.6.11.6/include/asm-mips/mipsregs.h 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mipsregs.h 2005-02-17 21:50:43.000000000 +0100
-@@ -790,10 +790,18 @@ do { \
- #define read_c0_config1() __read_32bit_c0_register($16, 1)
- #define read_c0_config2() __read_32bit_c0_register($16, 2)
- #define read_c0_config3() __read_32bit_c0_register($16, 3)
-+#define read_c0_config4() __read_32bit_c0_register($16, 4)
-+#define read_c0_config5() __read_32bit_c0_register($16, 5)
-+#define read_c0_config6() __read_32bit_c0_register($16, 6)
-+#define read_c0_config7() __read_32bit_c0_register($16, 7)
- #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
- #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
- #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
- #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
-+#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
-+#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
-+#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
-+#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
-
- /*
- * The WatchLo register. There may be upto 8 of them.
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/mmu_context.h linux_HEAD/include/asm-mips/mmu_context.h
---- linux-2.6.11.6/include/asm-mips/mmu_context.h 2005-03-26 04:28:20.000000000 +0100
-+++ linux_HEAD/include/asm-mips/mmu_context.h 2005-03-14 02:10:59.000000000 +0100
-@@ -30,7 +30,7 @@ extern unsigned long pgd_current[];
-
- #ifdef CONFIG_MIPS32
- #define TLBMISS_HANDLER_SETUP() \
-- write_c0_context((unsigned long) smp_processor_id() << 23); \
-+ write_c0_context((unsigned long) smp_processor_id() << 25); \
- TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
- #endif
- #if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
-@@ -40,7 +40,7 @@ extern unsigned long pgd_current[];
- #endif
- #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
- #define TLBMISS_HANDLER_SETUP() \
-- write_c0_context((unsigned long) smp_processor_id() << 23); \
-+ write_c0_context((unsigned long) smp_processor_id() << 26); \
- TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
- #endif
-
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/module.h linux_HEAD/include/asm-mips/module.h
---- linux-2.6.11.6/include/asm-mips/module.h 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/include/asm-mips/module.h 2005-01-31 02:45:43.000000000 +0100
-@@ -14,15 +14,23 @@ struct mod_arch_specific {
-
- typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
-
--typedef struct
--{
-- Elf64_Addr r_offset; /* Address of relocation. */
-- Elf64_Word r_sym; /* Symbol index. */
-- Elf64_Byte r_ssym; /* Special symbol. */
-- Elf64_Byte r_type3; /* Third relocation. */
-- Elf64_Byte r_type2; /* Second relocation. */
-- Elf64_Byte r_type; /* First relocation. */
-- Elf64_Sxword r_addend; /* Addend. */
-+typedef struct {
-+ Elf64_Addr r_offset; /* Address of relocation. */
-+ Elf64_Word r_sym; /* Symbol index. */
-+ Elf64_Byte r_ssym; /* Special symbol. */
-+ Elf64_Byte r_type3; /* Third relocation. */
-+ Elf64_Byte r_type2; /* Second relocation. */
-+ Elf64_Byte r_type; /* First relocation. */
-+} Elf64_Mips_Rel;
-+
-+typedef struct {
-+ Elf64_Addr r_offset; /* Address of relocation. */
-+ Elf64_Word r_sym; /* Symbol index. */
-+ Elf64_Byte r_ssym; /* Special symbol. */
-+ Elf64_Byte r_type3; /* Third relocation. */
-+ Elf64_Byte r_type2; /* Second relocation. */
-+ Elf64_Byte r_type; /* First relocation. */
-+ Elf64_Sxword r_addend; /* Addend. */
- } Elf64_Mips_Rela;
-
- #ifdef CONFIG_MIPS32
-@@ -30,6 +38,13 @@ typedef struct
- #define Elf_Shdr Elf32_Shdr
- #define Elf_Sym Elf32_Sym
- #define Elf_Ehdr Elf32_Ehdr
-+#define Elf_Addr Elf32_Addr
-+
-+#define Elf_Mips_Rel Elf32_Rel
-+#define Elf_Mips_Rela Elf32_Rela
-+
-+#define ELF_MIPS_R_SYM(rel) ELF32_R_SYM(rel.r_info)
-+#define ELF_MIPS_R_TYPE(rel) ELF32_R_TYPE(rel.r_info)
-
- #endif
-
-@@ -38,6 +53,13 @@ typedef struct
- #define Elf_Shdr Elf64_Shdr
- #define Elf_Sym Elf64_Sym
- #define Elf_Ehdr Elf64_Ehdr
-+#define Elf_Addr Elf64_Addr
-+
-+#define Elf_Mips_Rel Elf64_Mips_Rel
-+#define Elf_Mips_Rela Elf64_Mips_Rela
-+
-+#define ELF_MIPS_R_SYM(rel) (rel.r_sym)
-+#define ELF_MIPS_R_TYPE(rel) (rel.r_type)
-
- #endif
-
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/paccess.h linux_HEAD/include/asm-mips/paccess.h
---- linux-2.6.11.6/include/asm-mips/paccess.h 2005-03-26 04:28:19.000000000 +0100
-+++ linux_HEAD/include/asm-mips/paccess.h 2005-03-04 21:13:41.000000000 +0100
-@@ -52,7 +52,7 @@ struct __large_pstruct { unsigned long b
- })
-
- #define __get_dbe_asm(insn) \
--({ \
-+{ \
- __asm__ __volatile__( \
- "1:\t" insn "\t%1,%2\n\t" \
- "move\t%0,$0\n" \
-@@ -67,7 +67,7 @@ struct __large_pstruct { unsigned long b
- ".previous" \
- :"=r" (__gu_err), "=r" (__gu_val) \
- :"o" (__mp(__gu_addr)), "i" (-EFAULT)); \
--})
++static void __devexit vgx_pci_remove(struct pci_dev *dev)
++{
++ unregister_framebuffer(&info);
++ smi_unmap_smem();
++ smi_unmap_mmio();
+}
-
- extern void __get_dbe_unknown(void);
-
-@@ -90,7 +90,7 @@ extern void __get_dbe_unknown(void);
- })
-
- #define __put_dbe_asm(insn) \
--({ \
-+{ \
- __asm__ __volatile__( \
- "1:\t" insn "\t%1,%2\n\t" \
- "move\t%0,$0\n" \
-@@ -104,7 +104,7 @@ extern void __get_dbe_unknown(void);
- ".previous" \
- : "=r" (__pu_err) \
- : "r" (__pu_val), "o" (__mp(__pu_addr)), "i" (-EFAULT)); \
--})
-+}
-
- extern void __put_dbe_unknown(void);
-
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/page.h linux_HEAD/include/asm-mips/page.h
---- linux-2.6.11.6/include/asm-mips/page.h 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/include/asm-mips/page.h 2005-02-17 21:50:43.000000000 +0100
-@@ -87,21 +87,48 @@ static inline void copy_user_page(void *
- typedef struct { unsigned long pte; } pte_t;
- #define pte_val(x) ((x).pte)
- #endif
-+#define __pte(x) ((pte_t) { (x) } )
-
--typedef struct { unsigned long pmd; } pmd_t;
--typedef struct { unsigned long pgd; } pgd_t;
--typedef struct { unsigned long pgprot; } pgprot_t;
-+/*
-+ * For 3-level pagetables we defines these ourselves, for 2-level the
-+ * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
-+ */
-+#ifdef CONFIG_MIPS64
-
-+typedef struct { unsigned long pmd; } pmd_t;
- #define pmd_val(x) ((x).pmd)
-+#define __pmd(x) ((pmd_t) { (x) } )
+
-+#endif
-+
+/*
-+ * Right now we don't support 4-level pagetables, so all pud-related
-+ * definitions come from <asm-generic/pgtable-nopud.h>.
++ * Rev. AA is 0x501, Rev. B is 0x510.
+ */
++static struct pci_device_id vgx_devices[] = {
++ {0x126f, 0x510, PCI_ANY_ID, PCI_ANY_ID,0,0,0},
++ {0x126f, 0x501, PCI_ANY_ID, PCI_ANY_ID,0,0,0},
++ {0,}
++};
+
-+/*
-+ * Finall the top of the hierarchy, the pgd
-+ */
-+typedef struct { unsigned long pgd; } pgd_t;
- #define pgd_val(x) ((x).pgd)
-+#define __pgd(x) ((pgd_t) { (x) } )
++MODULE_DEVICE_TABLE(pci, vgx_devices);
+
-+/*
-+ * Manipulate page protection bits
-+ */
-+typedef struct { unsigned long pgprot; } pgprot_t;
- #define pgprot_val(x) ((x).pgprot)
-+#define __pgprot(x) ((pgprot_t) { (x) } )
-
-+/*
-+ * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
-+ * pair of pages we only have a single global bit per pair of pages. When
-+ * writing to the TLB make sure we always have the bit set for both pages
-+ * or none. This macro is used to access the `buddy' of the pte we're just
-+ * working on.
-+ */
- #define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
-
--#define __pte(x) ((pte_t) { (x) } )
--#define __pmd(x) ((pmd_t) { (x) } )
--#define __pgd(x) ((pgd_t) { (x) } )
--#define __pgprot(x) ((pgprot_t) { (x) } )
-
- /* Pure 2^n version of get_order */
- static __inline__ int get_order(unsigned long size)
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/pgalloc.h linux_HEAD/include/asm-mips/pgalloc.h
---- linux-2.6.11.6/include/asm-mips/pgalloc.h 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/include/asm-mips/pgalloc.h 2005-02-17 21:50:43.000000000 +0100
-@@ -26,10 +26,22 @@ static inline void pmd_populate(struct m
- }
-
- /*
-+ * Initialize a new pmd table with invalid pointers.
-+ */
-+extern void pmd_init(unsigned long page, unsigned long pagetable);
++static struct pci_driver vgxfb_pci_driver = {
++ .name = "vgxfb",
++ .id_table= vgx_devices,
++ .probe = vgx_pci_probe,
++ .remove = __devexit_p(vgx_pci_remove),
++};
+
-+#ifdef CONFIG_MIPS64
-+
-+static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
++int __init vgxfb_init(void)
+{
-+ set_pud(pud, __pud((unsigned long)pmd));
-+}
-+#endif
++ char *option = NULL;
+
-+/*
- * Initialize a new pgd / pmd table with invalid pointers.
- */
- extern void pgd_init(unsigned long page);
--extern void pmd_init(unsigned long page, unsigned long pagetable);
-
- static inline pgd_t *pgd_alloc(struct mm_struct *mm)
- {
-@@ -86,21 +98,18 @@ static inline void pte_free(struct page
- #define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
-
- #ifdef CONFIG_MIPS32
--#define pgd_populate(mm, pmd, pte) BUG()
-
- /*
- * allocating and freeing a pmd is trivial: the 1-entry pmd is
- * inside the pgd, so has no extra memory associated with it.
- */
--#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
- #define pmd_free(x) do { } while (0)
- #define __pmd_free_tlb(tlb,x) do { } while (0)
++ if (fb_get_options("vgxfb", &option))
++ return -ENODEV;
++ vgxfb_setup(option);
+
- #endif
-
- #ifdef CONFIG_MIPS64
-
--#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd))
--
- static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
- {
- pmd_t *pmd;
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/pgtable-32.h linux_HEAD/include/asm-mips/pgtable-32.h
---- linux-2.6.11.6/include/asm-mips/pgtable-32.h 2005-03-26 04:28:21.000000000 +0100
-+++ linux_HEAD/include/asm-mips/pgtable-32.h 2005-02-19 14:05:07.000000000 +0100
-@@ -17,6 +17,8 @@
- #include <asm/cachectl.h>
- #include <asm/fixmap.h>
-
-+#include <asm-generic/pgtable-nopmd.h>
++ printk("Silicon Motion Inc. VOYAGER Init complete.\n");
++ return pci_module_init(&vgxfb_pci_driver);
++}
+
- /*
- * - add_wired_entry() add a fixed TLB entry, and move wired register
- */
-@@ -41,42 +43,38 @@ extern int add_temporary_entry(unsigned
- * works even with the cache aliasing problem the R4k and above have.
- */
-
--/* PMD_SHIFT determines the size of the area a second-level page table can map */
-+/* PGDIR_SHIFT determines what a third-level page table entry can map */
- #ifdef CONFIG_64BIT_PHYS_ADDR
--#define PMD_SHIFT 21
-+#define PGDIR_SHIFT 21
- #else
--#define PMD_SHIFT 22
-+#define PGDIR_SHIFT 22
- #endif
--#define PMD_SIZE (1UL << PMD_SHIFT)
--#define PMD_MASK (~(PMD_SIZE-1))
--
--/* PGDIR_SHIFT determines what a third-level page table entry can map */
--#define PGDIR_SHIFT PMD_SHIFT
- #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
- #define PGDIR_MASK (~(PGDIR_SIZE-1))
-
- /*
- * Entries per page directory level: we use two-level, so
-- * we don't really have any PMD directory physically.
-+ * we don't really have any PUD/PMD directory physically.
- */
- #ifdef CONFIG_64BIT_PHYS_ADDR
- #define PGD_ORDER 1
--#define PMD_ORDER 0
-+#define PUD_ORDER aieeee_attempt_to_allocate_pud
-+#define PMD_ORDER 1
- #define PTE_ORDER 0
- #else
- #define PGD_ORDER 0
--#define PMD_ORDER 0
-+#define PUD_ORDER aieeee_attempt_to_allocate_pud
-+#define PMD_ORDER 1
- #define PTE_ORDER 0
- #endif
-
- #define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
--#define PTRS_PER_PMD 1
- #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
-
- #define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
- #define FIRST_USER_PGD_NR 0
-
--#define VMALLOC_START KSEG2
-+#define VMALLOC_START MAP_BASE
-
- #ifdef CONFIG_HIGHMEM
- # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE)
-@@ -91,8 +89,6 @@ extern int add_temporary_entry(unsigned
- #define pte_ERROR(e) \
- printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
- #endif
--#define pmd_ERROR(e) \
-- printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
- #define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
-
-@@ -120,16 +116,6 @@ static inline void pmd_clear(pmd_t *pmdp
- pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
- }
-
--/*
-- * The "pgd_xxx()" functions here are trivial for a folded two-level
-- * setup: the pgd is never bad, and a pmd always exists (as it's folded
-- * into the pgd entry)
-- */
--static inline int pgd_none(pgd_t pgd) { return 0; }
--static inline int pgd_bad(pgd_t pgd) { return 0; }
--static inline int pgd_present(pgd_t pgd) { return 1; }
--static inline void pgd_clear(pgd_t *pgdp) { }
--
- #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
- #define pte_page(x) pfn_to_page(pte_pfn(x))
- #define pte_pfn(x) ((unsigned long)((x).pte_high >> 6))
-@@ -156,22 +142,17 @@ pfn_pte(unsigned long pfn, pgprot_t prot
- #endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */
-
- #define __pgd_offset(address) pgd_index(address)
-+#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
- #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
-
- /* to find an entry in a kernel page-table-directory */
- #define pgd_offset_k(address) pgd_offset(&init_mm, address)
-
--#define pgd_index(address) ((address) >> PGDIR_SHIFT)
-+#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
-
- /* to find an entry in a page-table-directory */
- #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
-
--/* Find an entry in the second-level page table.. */
--static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
--{
-- return (pmd_t *) dir;
--}
--
- /* Find an entry in the third-level page table.. */
- #define __pte_offset(address) \
- (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/pgtable-64.h linux_HEAD/include/asm-mips/pgtable-64.h
---- linux-2.6.11.6/include/asm-mips/pgtable-64.h 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/include/asm-mips/pgtable-64.h 2005-02-26 16:20:32.000000000 +0100
-@@ -16,13 +16,15 @@
- #include <asm/page.h>
- #include <asm/cachectl.h>
-
-+#include <asm-generic/pgtable-nopud.h>
-+
- /*
- * Each address space has 2 4K pages as its page directory, giving 1024
- * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
-- * pair of 4K pages, giving 1024 (== PTRS_PER_PMD) 8 byte pointers to
-- * page tables. Each page table is a single 4K page, giving 512 (==
-- * PTRS_PER_PTE) 8 byte ptes. Each pgde is initialized to point to
-- * invalid_pmd_table, each pmde is initialized to point to
-+ * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
-+ * tables. Each page table is also a single 4K page, giving 512 (==
-+ * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
-+ * invalid_pmd_table, each pmd entry is initialized to point to
- * invalid_pte_table, each pte is initialized to 0. When memory is low,
- * and a pmd table or a page table allocation fails, empty_bad_pmd_table
- * and empty_bad_page_table is returned back to higher layer code, so
-@@ -36,17 +38,17 @@
- */
-
- /* PMD_SHIFT determines the size of the area a second-level page table can map */
--#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3))
-+#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
- #define PMD_SIZE (1UL << PMD_SHIFT)
- #define PMD_MASK (~(PMD_SIZE-1))
-
- /* PGDIR_SHIFT determines what a third-level page table entry can map */
--#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + 1 - 3))
-+#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
- #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
- #define PGDIR_MASK (~(PGDIR_SIZE-1))
-
- /*
-- * For 4kB page size we use a 3 level page tree and a 8kB pmd and pgds which
-+ * For 4kB page size we use a 3 level page tree and an 8kB pud, which
- * permits us mapping 40 bits of virtual address space.
- *
- * We used to implement 41 bits by having an order 1 pmd level but that seemed
-@@ -57,7 +59,7 @@
- * two levels would be easy to implement.
- *
- * For 16kB page size we use a 2 level page tree which permits a total of
-- * 36 bits of virtual address space. We could add a third leve. but it seems
-+ * 36 bits of virtual address space. We could add a third level but it seems
- * like at the moment there's no need for this.
- *
- * For 64kB page size we use a 2 level page table tree for a total of 42 bits
-@@ -65,21 +67,25 @@
- */
- #ifdef CONFIG_PAGE_SIZE_4KB
- #define PGD_ORDER 1
-+#define PUD_ORDER aieeee_attempt_to_allocate_pud
- #define PMD_ORDER 0
- #define PTE_ORDER 0
- #endif
- #ifdef CONFIG_PAGE_SIZE_8KB
- #define PGD_ORDER 0
-+#define PUD_ORDER aieeee_attempt_to_allocate_pud
- #define PMD_ORDER 0
- #define PTE_ORDER 0
- #endif
- #ifdef CONFIG_PAGE_SIZE_16KB
- #define PGD_ORDER 0
-+#define PUD_ORDER aieeee_attempt_to_allocate_pud
- #define PMD_ORDER 0
- #define PTE_ORDER 0
- #endif
- #ifdef CONFIG_PAGE_SIZE_64KB
- #define PGD_ORDER 0
-+#define PUD_ORDER aieeee_attempt_to_allocate_pud
- #define PMD_ORDER 0
- #define PTE_ORDER 0
- #endif
-@@ -91,7 +97,7 @@
- #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
- #define FIRST_USER_PGD_NR 0
-
--#define VMALLOC_START XKSEG
-+#define VMALLOC_START MAP_BASE
- #define VMALLOC_END \
- (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
-
-@@ -102,13 +108,13 @@
- #define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
-
--extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)];
--extern pte_t empty_bad_page_table[PAGE_SIZE/sizeof(pte_t)];
--extern pmd_t invalid_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
--extern pmd_t empty_bad_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)];
-+extern pte_t invalid_pte_table[PTRS_PER_PTE];
-+extern pte_t empty_bad_page_table[PTRS_PER_PTE];
-+extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
-+extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
-
- /*
-- * Empty pmd entries point to the invalid_pte_table.
-+ * Empty pgd/pmd entries point to the invalid_pte_table.
- */
- static inline int pmd_none(pmd_t pmd)
- {
-@@ -128,26 +134,30 @@ static inline void pmd_clear(pmd_t *pmdp
- }
-
- /*
-- * Empty pgd entries point to the invalid_pmd_table.
-+ * Empty pud entries point to the invalid_pmd_table.
- */
--static inline int pgd_none(pgd_t pgd)
-+static inline int pud_none(pud_t pud)
- {
-- return pgd_val(pgd) == (unsigned long) invalid_pmd_table;
-+ return pud_val(pud) == (unsigned long) invalid_pmd_table;
- }
-
--#define pgd_bad(pgd) (pgd_val(pgd) &~ PAGE_MASK)
-+static inline int pud_bad(pud_t pud)
++void __exit vgxfb_exit(void)
+{
-+ return pud_val(pud) & ~PAGE_MASK;
++ pci_unregister_driver(&vgxfb_pci_driver);
+}
-
--static inline int pgd_present(pgd_t pgd)
-+static inline int pud_present(pud_t pud)
- {
-- return pgd_val(pgd) != (unsigned long) invalid_pmd_table;
-+ return pud_val(pud) != (unsigned long) invalid_pmd_table;
- }
-
--static inline void pgd_clear(pgd_t *pgdp)
-+static inline void pud_clear(pud_t *pudp)
- {
-- pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table);
-+ pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
- }
-
--#define pte_page(x) pfn_to_page((unsigned long)((pte_val(x) >> PAGE_SHIFT)))
-+#define pte_page(x) pfn_to_page(pte_pfn(x))
+
- #ifdef CONFIG_CPU_VR41XX
- #define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
- #define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
-@@ -157,26 +167,28 @@ static inline void pgd_clear(pgd_t *pgdp
- #endif
-
- #define __pgd_offset(address) pgd_index(address)
-+#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
-+#define __pmd_offset(address) pmd_index(address)
- #define page_pte(page) page_pte_prot(page, __pgprot(0))
-
- /* to find an entry in a kernel page-table-directory */
- #define pgd_offset_k(address) pgd_offset(&init_mm, 0)
-
--#define pgd_index(address) ((address) >> PGDIR_SHIFT)
-+#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
-+#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
-
- /* to find an entry in a page-table-directory */
- #define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
-
--static inline unsigned long pgd_page(pgd_t pgd)
-+static inline unsigned long pud_page(pud_t pud)
- {
-- return pgd_val(pgd);
-+ return pud_val(pud);
- }
-
- /* Find an entry in the second-level page table.. */
--static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
-+static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
- {
-- return (pmd_t *) pgd_page(*dir) +
-- ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
-+ return (pmd_t *) pud_page(*pud) + pmd_index(address);
- }
-
- /* Find an entry in the third-level page table.. */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/pgtable.h linux_HEAD/include/asm-mips/pgtable.h
---- linux-2.6.11.6/include/asm-mips/pgtable.h 2005-04-03 00:13:08.000000000 +0200
-+++ linux_HEAD/include/asm-mips/pgtable.h 2005-03-21 20:04:58.000000000 +0100
-@@ -8,8 +8,6 @@
- #ifndef _ASM_PGTABLE_H
- #define _ASM_PGTABLE_H
-
--#include <asm-generic/4level-fixup.h>
--
- #include <linux/config.h>
- #ifdef CONFIG_MIPS32
- #include <asm/pgtable-32.h>
-@@ -146,11 +144,18 @@ static inline void pte_clear(struct mm_s
- #endif
-
- /*
-- * (pmds are folded into pgds so this doesn't get actually called,
-+ * (pmds are folded into puds so this doesn't get actually called,
- * but the define is needed for a generic inline function.)
- */
- #define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
--#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0)
++module_init(vgxfb_init);
++module_exit(vgxfb_exit);
+
-+#ifdef CONFIG_MIPS64
-+/*
-+ * (puds are folded into pgds so this doesn't get actually called,
-+ * but the define is needed for a generic inline function.)
-+ */
-+#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
-+#endif
-
- #define PGD_T_LOG2 ffz(~sizeof(pgd_t))
- #define PMD_T_LOG2 ffz(~sizeof(pmd_t))
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/serial.h linux_HEAD/include/asm-mips/serial.h
---- linux-2.6.11.6/include/asm-mips/serial.h 2005-03-26 04:28:39.000000000 +0100
-+++ linux_HEAD/include/asm-mips/serial.h 2005-03-04 20:36:14.000000000 +0100
-@@ -78,16 +78,6 @@
- #define JAZZ_SERIAL_PORT_DEFNS
- #endif
-
--#ifdef CONFIG_MIPS_COBALT
--#include <asm/cobalt/cobalt.h>
--#define COBALT_BASE_BAUD (18432000 / 16)
--#define COBALT_SERIAL_PORT_DEFNS \
-- /* UART CLK PORT IRQ FLAGS */ \
-- { 0, COBALT_BASE_BAUD, 0xc800000, COBALT_SERIAL_IRQ, STD_COM_FLAGS }, /* ttyS0 */
--#else
--#define COBALT_SERIAL_PORT_DEFNS
--#endif
--
- /*
- * Both Galileo boards have the same UART mappings.
- */
-@@ -139,17 +129,6 @@
- #define IVR_SERIAL_PORT_DEFNS
- #endif
-
--#ifdef CONFIG_TOSHIBA_JMR3927
--#include <asm/jmr3927/jmr3927.h>
--#define TXX927_SERIAL_PORT_DEFNS \
-- { .baud_base = JMR3927_BASE_BAUD, .port = UART0_ADDR, .irq = UART0_INT, \
-- .flags = UART0_FLAGS, .type = 1 }, \
-- { .baud_base = JMR3927_BASE_BAUD, .port = UART1_ADDR, .irq = UART1_INT, \
-- .flags = UART1_FLAGS, .type = 1 },
--#else
--#define TXX927_SERIAL_PORT_DEFNS
--#endif
--
- #ifdef CONFIG_SERIAL_AU1X00
- #include <asm/mach-au1x00/au1000.h>
- #ifdef CONFIG_SOC_AU1000
-@@ -309,9 +288,9 @@
- #define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
-
- #define _JAGUAR_ATX_SERIAL_INIT(int, base) \
-- { baud_base: JAGUAR_ATX_BASE_BAUD, irq: int, \
-- flags: (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
-- iomem_base: (u8 *) base, iomem_reg_shift: 2, \
-+ { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \
-+ .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
-+ .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
- io_type: SERIAL_IO_MEM }
- #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \
- _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
-@@ -325,9 +304,9 @@
- #define OCELOT_3_SERIAL_BASE (signed)0xfd000020
-
- #define _OCELOT_3_SERIAL_INIT(int, base) \
-- { baud_base: OCELOT_3_BASE_BAUD, irq: int, \
-- flags: STD_COM_FLAGS, \
-- iomem_base: (u8 *) base, iomem_reg_shift: 2, \
-+ { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
-+ .flags = STD_COM_FLAGS, \
-+ .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
- io_type: SERIAL_IO_MEM }
-
- #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
-@@ -424,7 +403,6 @@
- #endif /* CONFIG_SGI_IP32 */
-
- #define SERIAL_PORT_DFNS \
-- COBALT_SERIAL_PORT_DEFNS \
- DDB5477_SERIAL_PORT_DEFNS \
- EV96100_SERIAL_PORT_DEFNS \
- EXTRA_SERIAL_PORT_DEFNS \
-@@ -438,7 +416,6 @@
- MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
- MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
- MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
-- TXX927_SERIAL_PORT_DEFNS \
- AU1000_SERIAL_PORT_DEFNS
-
- #endif /* _ASM_SERIAL_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/sibyte/board.h linux_HEAD/include/asm-mips/sibyte/board.h
---- linux-2.6.11.6/include/asm-mips/sibyte/board.h 2005-03-26 04:28:15.000000000 +0100
-+++ linux_HEAD/include/asm-mips/sibyte/board.h 2005-02-17 21:50:45.000000000 +0100
-@@ -21,8 +21,6 @@
-
- #include <linux/config.h>
-
--#ifdef CONFIG_SIBYTE_BOARD
--
- #if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \
- defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE) || \
- defined(CONFIG_SIBYTE_LITTLESUR)
-@@ -54,16 +52,6 @@
- #define setleds(t0,t1,c0,c1,c2,c3)
- #endif /* LEDS_PHYS */
-
--#else
--
--#ifdef LEDS_PHYS
--extern void setleds(char *str);
--#else
--#define setleds(s) do { } while (0)
--#endif /* LEDS_PHYS */
--
- #endif /* __ASSEMBLY__ */
-
--#endif /* CONFIG_SIBYTE_BOARD */
--
- #endif /* _SIBYTE_BOARD_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/sibyte/sb1250.h linux_HEAD/include/asm-mips/sibyte/sb1250.h
---- linux-2.6.11.6/include/asm-mips/sibyte/sb1250.h 2005-03-26 04:28:25.000000000 +0100
-+++ linux_HEAD/include/asm-mips/sibyte/sb1250.h 2005-02-24 00:13:20.000000000 +0100
-@@ -58,6 +58,6 @@ extern void prom_printf(char *fmt, ...);
-
- #endif
-
--#define IOADDR(a) (IO_BASE + (a))
-+#define IOADDR(a) ((void *)(IO_BASE + (a)))
-
- #endif
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/signal.h linux_HEAD/include/asm-mips/signal.h
---- linux-2.6.11.6/include/asm-mips/signal.h 2005-03-26 04:28:18.000000000 +0100
-+++ linux_HEAD/include/asm-mips/signal.h 2005-03-01 22:49:44.000000000 +0100
-@@ -120,7 +120,8 @@ typedef unsigned long old_sigset_t; /*
- set only the low 32 bit of the sigset. */
-
- /* Type of a signal handler. */
--typedef void (*__sighandler_t)(int);
-+typedef void __signalfn_t(int);
-+typedef __signalfn_t __user *__sighandler_t;
-
- /* Fake signal functions */
- #define SIG_DFL ((__sighandler_t)0) /* default signal handling */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/spinlock.h linux_HEAD/include/asm-mips/spinlock.h
---- linux-2.6.11.6/include/asm-mips/spinlock.h 2005-03-26 04:28:37.000000000 +0100
-+++ linux_HEAD/include/asm-mips/spinlock.h 2005-02-17 21:50:44.000000000 +0100
-@@ -140,6 +140,18 @@ typedef struct {
-
- #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0)
-
-+/*
-+ * read_can_lock - would read_trylock() succeed?
-+ * @lock: the rwlock in question.
-+ */
-+#define read_can_lock(rw) ((rw)->lock >= 0)
++MODULE_AUTHOR("");
++MODULE_DESCRIPTION("Framebuffer driver for SMI Voyager");
++MODULE_LICENSE("GPL");
+
-+/*
-+ * write_can_lock - would write_trylock() succeed?
-+ * @lock: the rwlock in question.
-+ */
-+#define write_can_lock(rw) (!(rw)->lock)
-+
- static inline void _raw_read_lock(rwlock_t *rw)
- {
- unsigned int tmp;
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/stackframe.h linux_HEAD/include/asm-mips/stackframe.h
---- linux-2.6.11.6/include/asm-mips/stackframe.h 2005-03-26 04:28:13.000000000 +0100
-+++ linux_HEAD/include/asm-mips/stackframe.h 2005-03-14 02:30:45.000000000 +0100
-@@ -60,7 +60,6 @@
- mfc0 k0, CP0_CONTEXT
- lui k1, %hi(kernelsp)
- srl k0, k0, 23
-- sll k0, k0, 2
- addu k1, k0
- LONG_L k1, %lo(kernelsp)(k1)
- #endif
-@@ -76,9 +75,14 @@
- #endif
- #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
- MFC0 k1, CP0_CONTEXT
-+ lui k0, %highest(kernelsp)
- dsrl k1, 23
-- dsll k1, k1, 3
-- LONG_L k1, kernelsp(k1)
-+ daddiu k0, %higher(kernelsp)
-+ dsll k0, k0, 16
-+ daddiu k0, %hi(kernelsp)
-+ dsll k0, k0, 16
-+ daddu k1, k1, k0
-+ LONG_L k1, %lo(kernelsp)(k1)
- #endif
- .endm
-
-@@ -86,7 +90,6 @@
- #ifdef CONFIG_MIPS32
- mfc0 \temp, CP0_CONTEXT
- srl \temp, 23
-- sll \temp, 2
- LONG_S \stackp, kernelsp(\temp)
- #endif
- #if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64)
-@@ -97,8 +100,8 @@
- LONG_S \stackp, %lo(kernelsp)(\temp)
- #endif
- #if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64)
-- lw \temp, TI_CPU(gp)
-- dsll \temp, 3
-+ MFC0 \temp, CP0_CONTEXT
-+ dsrl \temp, 23
- LONG_S \stackp, kernelsp(\temp)
- #endif
- .endm
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/thread_info.h linux_HEAD/include/asm-mips/thread_info.h
---- linux-2.6.11.6/include/asm-mips/thread_info.h 2005-03-26 04:28:13.000000000 +0100
-+++ linux_HEAD/include/asm-mips/thread_info.h 2005-03-21 20:04:59.000000000 +0100
-@@ -114,6 +114,7 @@ register struct thread_info *__current_t
- #define TIF_SIGPENDING 2 /* signal pending */
- #define TIF_NEED_RESCHED 3 /* rescheduling necessary */
- #define TIF_SYSCALL_AUDIT 4 /* syscall auditing active */
-+#define TIF_SECCOMP 5 /* secure computing */
- #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
- #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
- #define TIF_MEMDIE 18
-@@ -124,13 +125,14 @@ register struct thread_info *__current_t
- #define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
- #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
- #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
-+#define _TIF_SECCOMP (1<<TIF_SECCOMP)
- #define _TIF_USEDFPU (1<<TIF_USEDFPU)
- #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
-
--#define _TIF_WORK_MASK 0x0000ffef /* work to do on
-- interrupt/exception return */
--#define _TIF_ALLWORK_MASK 0x8000ffff /* work to do on any return to
-- u-space */
-+/* work to do on interrupt/exception return */
-+#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP)
-+/* work to do on any return to u-space */
-+#define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP)
-
- #endif /* __KERNEL__ */
-
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/uaccess.h linux_HEAD/include/asm-mips/uaccess.h
---- linux-2.6.11.6/include/asm-mips/uaccess.h 2005-04-03 00:13:08.000000000 +0200
-+++ linux_HEAD/include/asm-mips/uaccess.h 2005-03-21 20:04:59.000000000 +0100
-@@ -219,62 +220,58 @@ static inline int __deprecated verify_ar
- __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
-
- struct __large_struct { unsigned long buf[100]; };
--#define __m(x) (*(struct __large_struct *)(x))
-+#define __m(x) (*(struct __large_struct __user *)(x))
-
- /*
- * Yuck. We need two variants, one for 64bit operation and one
- * for 32 bit mode and old iron.
- */
- #ifdef __mips64
--#define __GET_USER_DW(__gu_err) __get_user_asm("ld", __gu_err)
-+#define __GET_USER_DW(ptr) __get_user_asm("ld", ptr)
- #else
--#define __GET_USER_DW(__gu_err) __get_user_asm_ll32(__gu_err)
-+#define __GET_USER_DW(ptr) __get_user_asm_ll32(ptr)
- #endif
-
- #define __get_user_nocheck(x,ptr,size) \
- ({ \
-- __typeof(*(ptr)) __gu_val = 0; \
-- long __gu_addr; \
-+ __typeof(*(ptr)) __gu_val = (__typeof(*(ptr))) 0; \
- long __gu_err = 0; \
- \
- might_sleep(); \
-- __gu_addr = (long) (ptr); \
- switch (size) { \
-- case 1: __get_user_asm("lb", __gu_err); break; \
-- case 2: __get_user_asm("lh", __gu_err); break; \
-- case 4: __get_user_asm("lw", __gu_err); break; \
-- case 8: __GET_USER_DW(__gu_err); break; \
-+ case 1: __get_user_asm("lb", ptr); break; \
-+ case 2: __get_user_asm("lh", ptr); break; \
-+ case 4: __get_user_asm("lw", ptr); break; \
-+ case 8: __GET_USER_DW(ptr); break; \
- default: __get_user_unknown(); break; \
- } \
-- x = (__typeof__(*(ptr))) __gu_val; \
-+ (x) = (__typeof__(*(ptr))) __gu_val; \
- __gu_err; \
- })
-
- #define __get_user_check(x,ptr,size) \
- ({ \
-+ const __typeof__(*(ptr)) __user * __gu_addr = (ptr); \
- __typeof__(*(ptr)) __gu_val = 0; \
-- long __gu_addr; \
-- long __gu_err; \
-+ long __gu_err = -EFAULT; \
- \
- might_sleep(); \
-- __gu_addr = (long) (ptr); \
-- __gu_err = verify_area(VERIFY_READ, (void *) __gu_addr, size); \
- \
-- if (likely(!__gu_err)) { \
-+ if (likely(access_ok(VERIFY_READ, __gu_addr, size))) { \
- switch (size) { \
-- case 1: __get_user_asm("lb", __gu_err); break; \
-- case 2: __get_user_asm("lh", __gu_err); break; \
-- case 4: __get_user_asm("lw", __gu_err); break; \
-- case 8: __GET_USER_DW(__gu_err); break; \
-+ case 1: __get_user_asm("lb", __gu_addr); break; \
-+ case 2: __get_user_asm("lh", __gu_addr); break; \
-+ case 4: __get_user_asm("lw", __gu_addr); break; \
-+ case 8: __GET_USER_DW(__gu_addr); break; \
- default: __get_user_unknown(); break; \
- } \
- } \
-- x = (__typeof__(*(ptr))) __gu_val; \
-+ (x) = (__typeof__(*(ptr))) __gu_val; \
- __gu_err; \
- })
-
--#define __get_user_asm(insn,__gu_err) \
--({ \
-+#define __get_user_asm(insn, addr) \
-+{ \
- __asm__ __volatile__( \
- "1: " insn " %1, %3 \n" \
- "2: \n" \
-@@ -286,20 +283,20 @@ struct __large_struct { unsigned long bu
- " "__UA_ADDR "\t1b, 3b \n" \
- " .previous \n" \
- : "=r" (__gu_err), "=r" (__gu_val) \
-- : "0" (__gu_err), "o" (__m(__gu_addr)), "i" (-EFAULT)); \
--})
-+ : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \
-+}
-
- /*
- * Get a long long 64 using 32 bit registers.
- */
--#define __get_user_asm_ll32(__gu_err) \
--({ \
-+#define __get_user_asm_ll32(addr) \
-+{ \
- __asm__ __volatile__( \
-- "1: lw %1, %3 \n" \
-- "2: lw %D1, %4 \n" \
-+ "1: lw %1, (%3) \n" \
-+ "2: lw %D1, 4(%3) \n" \
- " move %0, $0 \n" \
- "3: .section .fixup,\"ax\" \n" \
-- "4: li %0, %5 \n" \
-+ "4: li %0, %4 \n" \
- " move %1, $0 \n" \
- " move %D1, $0 \n" \
- " j 3b \n" \
-@@ -309,9 +306,8 @@ struct __large_struct { unsigned long bu
- " " __UA_ADDR " 2b, 4b \n" \
- " .previous \n" \
- : "=r" (__gu_err), "=&r" (__gu_val) \
-- : "0" (__gu_err), "o" (__m(__gu_addr)), \
-- "o" (__m(__gu_addr + 4)), "i" (-EFAULT)); \
--})
-+ : "0" (0), "r" (addr), "i" (-EFAULT)); \
-+}
-
- extern void __get_user_unknown(void);
-
-@@ -320,25 +316,23 @@ extern void __get_user_unknown(void);
- * for 32 bit mode and old iron.
- */
- #ifdef __mips64
--#define __PUT_USER_DW(__pu_val) __put_user_asm("sd", __pu_val)
-+#define __PUT_USER_DW(ptr) __put_user_asm("sd", ptr)
- #else
--#define __PUT_USER_DW(__pu_val) __put_user_asm_ll32(__pu_val)
-+#define __PUT_USER_DW(ptr) __put_user_asm_ll32(ptr)
- #endif
-
- #define __put_user_nocheck(x,ptr,size) \
- ({ \
- __typeof__(*(ptr)) __pu_val; \
-- long __pu_addr; \
- long __pu_err = 0; \
- \
- might_sleep(); \
- __pu_val = (x); \
-- __pu_addr = (long) (ptr); \
- switch (size) { \
-- case 1: __put_user_asm("sb", __pu_val); break; \
-- case 2: __put_user_asm("sh", __pu_val); break; \
-- case 4: __put_user_asm("sw", __pu_val); break; \
-- case 8: __PUT_USER_DW(__pu_val); break; \
-+ case 1: __put_user_asm("sb", ptr); break; \
-+ case 2: __put_user_asm("sh", ptr); break; \
-+ case 4: __put_user_asm("sw", ptr); break; \
-+ case 8: __PUT_USER_DW(ptr); break; \
- default: __put_user_unknown(); break; \
- } \
- __pu_err; \
-@@ -346,29 +340,26 @@ extern void __get_user_unknown(void);
-
- #define __put_user_check(x,ptr,size) \
- ({ \
-- __typeof__(*(ptr)) __pu_val; \
-- long __pu_addr; \
-- long __pu_err; \
-+ __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
-+ __typeof__(*(ptr)) __pu_val = (x); \
-+ long __pu_err = -EFAULT; \
- \
- might_sleep(); \
-- __pu_val = (x); \
-- __pu_addr = (long) (ptr); \
-- __pu_err = verify_area(VERIFY_WRITE, (void *) __pu_addr, size); \
- \
-- if (likely(!__pu_err)) { \
-+ if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \
- switch (size) { \
-- case 1: __put_user_asm("sb", __pu_val); break; \
-- case 2: __put_user_asm("sh", __pu_val); break; \
-- case 4: __put_user_asm("sw", __pu_val); break; \
-- case 8: __PUT_USER_DW(__pu_val); break; \
-+ case 1: __put_user_asm("sb", __pu_addr); break; \
-+ case 2: __put_user_asm("sh", __pu_addr); break; \
-+ case 4: __put_user_asm("sw", __pu_addr); break; \
-+ case 8: __PUT_USER_DW(__pu_addr); break; \
- default: __put_user_unknown(); break; \
- } \
- } \
- __pu_err; \
- })
-
--#define __put_user_asm(insn, __pu_val) \
--({ \
-+#define __put_user_asm(insn, ptr) \
-+{ \
- __asm__ __volatile__( \
- "1: " insn " %z2, %3 # __put_user_asm\n" \
- "2: \n" \
-@@ -380,18 +371,18 @@ extern void __get_user_unknown(void);
- " " __UA_ADDR " 1b, 3b \n" \
- " .previous \n" \
- : "=r" (__pu_err) \
-- : "0" (__pu_err), "Jr" (__pu_val), "o" (__m(__pu_addr)), \
-+ : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), \
- "i" (-EFAULT)); \
--})
-+}
-
--#define __put_user_asm_ll32(__pu_val) \
--({ \
-+#define __put_user_asm_ll32(ptr) \
-+{ \
- __asm__ __volatile__( \
-- "1: sw %2, %3 # __put_user_asm_ll32 \n" \
-- "2: sw %D2, %4 \n" \
-+ "1: sw %2, (%3) # __put_user_asm_ll32 \n" \
-+ "2: sw %D2, 4(%3) \n" \
- "3: \n" \
- " .section .fixup,\"ax\" \n" \
-- "4: li %0, %5 \n" \
-+ "4: li %0, %4 \n" \
- " j 3b \n" \
- " .previous \n" \
- " .section __ex_table,\"a\" \n" \
-@@ -399,9 +390,9 @@ extern void __get_user_unknown(void);
- " " __UA_ADDR " 2b, 4b \n" \
- " .previous" \
- : "=r" (__pu_err) \
-- : "0" (__pu_err), "r" (__pu_val), "o" (__m(__pu_addr)), \
-- "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \
--})
-+ : "0" (0), "r" (__pu_val), "r" (ptr), \
-+ "i" (-EFAULT)); \
-+}
-
- extern void __put_user_unknown(void);
-
-@@ -424,7 +415,7 @@ extern size_t __copy_user(void *__to, co
-
- #define __invoke_copy_to_user(to,from,n) \
- ({ \
-- register void *__cu_to_r __asm__ ("$4"); \
-+ register void __user *__cu_to_r __asm__ ("$4"); \
- register const void *__cu_from_r __asm__ ("$5"); \
- register long __cu_len_r __asm__ ("$6"); \
- \
-@@ -456,7 +447,7 @@ extern size_t __copy_user(void *__to, co
- */
- #define __copy_to_user(to,from,n) \
- ({ \
-- void *__cu_to; \
-+ void __user __user *__cu_to; \
- const void *__cu_from; \
- long __cu_len; \
- \
-@@ -486,7 +477,7 @@ extern size_t __copy_user(void *__to, co
- */
- #define copy_to_user(to,from,n) \
- ({ \
-- void *__cu_to; \
-+ void __user *__cu_to; \
- const void *__cu_from; \
- long __cu_len; \
- \
-@@ -503,7 +494,7 @@ extern size_t __copy_user(void *__to, co
- #define __invoke_copy_from_user(to,from,n) \
- ({ \
- register void *__cu_to_r __asm__ ("$4"); \
-- register const void *__cu_from_r __asm__ ("$5"); \
-+ register const void __user *__cu_from_r __asm__ ("$5"); \
- register long __cu_len_r __asm__ ("$6"); \
- \
- __cu_to_r = (to); \
-@@ -542,7 +533,7 @@ extern size_t __copy_user(void *__to, co
- #define __copy_from_user(to,from,n) \
- ({ \
- void *__cu_to; \
-- const void *__cu_from; \
-+ const void __user *__cu_from; \
- long __cu_len; \
- \
- might_sleep(); \
-@@ -573,7 +564,7 @@ extern size_t __copy_user(void *__to, co
- #define copy_from_user(to,from,n) \
- ({ \
- void *__cu_to; \
-- const void *__cu_from; \
-+ const void __user *__cu_from; \
- long __cu_len; \
- \
- might_sleep(); \
-@@ -590,8 +581,8 @@ extern size_t __copy_user(void *__to, co
-
- #define copy_in_user(to,from,n) \
- ({ \
-- void *__cu_to; \
-- const void *__cu_from; \
-+ void __user *__cu_to; \
-+ const void __user *__cu_from; \
- long __cu_len; \
- \
- might_sleep(); \
-@@ -617,7 +608,7 @@ extern size_t __copy_user(void *__to, co
- * On success, this will be zero.
- */
- static inline __kernel_size_t
--__clear_user(void *addr, __kernel_size_t size)
-+__clear_user(void __user *addr, __kernel_size_t size)
- {
- __kernel_size_t res;
-
-@@ -637,7 +628,7 @@ __clear_user(void *addr, __kernel_size_t
-
- #define clear_user(addr,n) \
- ({ \
-- void * __cl_addr = (addr); \
-+ void __user * __cl_addr = (addr); \
- unsigned long __cl_size = (n); \
- if (__cl_size && access_ok(VERIFY_WRITE, \
- ((unsigned long)(__cl_addr)), __cl_size)) \
-@@ -666,7 +657,7 @@ __clear_user(void *addr, __kernel_size_t
- * and returns @count.
- */
- static inline long
--__strncpy_from_user(char *__to, const char *__from, long __len)
-+__strncpy_from_user(char *__to, const char __user *__from, long __len)
- {
- long res;
-
-@@ -703,7 +694,7 @@ __strncpy_from_user(char *__to, const ch
- * and returns @count.
- */
- static inline long
--strncpy_from_user(char *__to, const char *__from, long __len)
-+strncpy_from_user(char *__to, const char __user *__from, long __len)
- {
- long res;
-
-@@ -722,7 +713,7 @@ strncpy_from_user(char *__to, const char
- }
-
- /* Returns: 0 if bad, string length+1 (memory size) of string if ok */
--static inline long __strlen_user(const char *s)
-+static inline long __strlen_user(const char __user *s)
- {
- long res;
-
-@@ -752,7 +743,7 @@ static inline long __strlen_user(const c
- * If there is a limit on the length of a valid string, you may wish to
- * consider using strnlen_user() instead.
- */
--static inline long strlen_user(const char *s)
-+static inline long strlen_user(const char __user *s)
- {
- long res;
-
-@@ -769,7 +760,7 @@ static inline long strlen_user(const cha
- }
-
- /* Returns: 0 if bad, string length+1 (memory size) of string if ok */
--static inline long __strnlen_user(const char *s, long n)
-+static inline long __strnlen_user(const char __user *s, long n)
- {
- long res;
-
-@@ -800,7 +791,7 @@ static inline long __strnlen_user(const
- * If there is a limit on the length of a valid string, you may wish to
- * consider using strnlen_user() instead.
- */
--static inline long strnlen_user(const char *s, long n)
-+static inline long strnlen_user(const char __user *s, long n)
- {
- long res;
-
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/vr41xx/pci.h linux_HEAD/include/asm-mips/vr41xx/pci.h
---- linux-2.6.11.6/include/asm-mips/vr41xx/pci.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/include/asm-mips/vr41xx/pci.h 2005-03-07 19:42:17.000000000 +0100
-@@ -0,0 +1,90 @@
-+/*
-+ * Include file for NEC VR4100 series PCI Control Unit.
+diff -urpNX dontdiff linux-2.6.12/drivers/video/smivgxfb.h linux_HEAD/drivers/video/smivgxfb.h
+--- linux-2.6.12/drivers/video/smivgxfb.h 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/drivers/video/smivgxfb.h 2005-04-21 07:02:30.000000000 +0200
+@@ -0,0 +1,128 @@
++/***************************************************************************
++ * Silicon Motion VoyagerGX framebuffer driver
+ *
-+ * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa at hh.iij4u.or.jp>
++ * port to 2.6 by Embedded Alley Solutions, Inc
++ * Copyright (C) 2005 Embedded Alley Solutions, Inc
+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+#ifndef __NEC_VR41XX_PCI_H
-+#define __NEC_VR41XX_PCI_H
++ * based on:
++ copyright : (C) 2001 by Szu-Tao Huang
++ email : johuang at siliconmotion.com
++
++ Updated to SM501 by Eric.Devolder at amd.com and dan at embeddededge.com
++ for the AMD Mirage Portable Tablet. 20 Oct 2003
++ ***************************************************************************/
+
-+#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU
++/***************************************************************************
++ * *
++ * This program is free software; you can redistribute it and/or modify *
++ * it under the terms of the GNU General Public License as published by *
++ * the Free Software Foundation; either version 2 of the License, or *
++ * (at your option) any later version. *
++ * *
++ ***************************************************************************/
++#include <linux/config.h>
+
-+struct pci_master_address_conversion {
-+ uint32_t bus_base_address;
-+ uint32_t address_mask;
-+ uint32_t pci_base_address;
-+};
++#define smi_mmiowb(dat,reg) writeb(dat, (SMIRegs + reg))
++#define smi_mmioww(dat,reg) writew(dat, (SMIRegs + reg))
++#define smi_mmiowl(dat,reg) writel(dat, (SMIRegs + reg))
+
-+struct pci_target_address_conversion {
-+ uint32_t address_mask;
-+ uint32_t bus_base_address;
-+};
++#define smi_mmiorb(reg) readb(SMIRegs + reg)
++#define smi_mmiorw(reg) readw(SMIRegs + reg)
++#define smi_mmiorl(reg) readl(SMIRegs + reg)
+
-+typedef enum {
-+ CANNOT_LOCK_FROM_DEVICE,
-+ CAN_LOCK_FROM_DEVICE,
-+} pci_exclusive_access_t;
++#define NR_PALETTE 256
+
-+struct pci_mailbox_address {
-+ uint32_t base_address;
-+};
++/* Address space offsets for various control/status registers.
++*/
++#define MISC_CTRL 0x000004
++#define GPIO_LO_CTRL 0x000008
++#define GPIO_HI_CTRL 0x00000c
++#define DRAM_CTRL 0x000010
++#define CURRENT_POWER_GATE 0x000038
++#define CURRENT_POWER_CLOCK 0x00003C
++#define POWER_MODE1_GATE 0x000048
++#define POWER_MODE1_CLOCK 0x00004C
++#define POWER_MODE_CTRL 0x000054
+
-+struct pci_target_address_window {
-+ uint32_t base_address;
-+};
++#define GPIO_DATA_LO 0x010000
++#define GPIO_DATA_HI 0x010004
++#define GPIO_DATA_DIR_LO 0x010008
++#define GPIO_DATA_DIR_HI 0x01000c
++#define I2C_BYTE_COUNT 0x010040
++#define I2C_CONTROL 0x010041
++#define I2C_STATUS_RESET 0x010042
++#define I2C_SLAVE_ADDRESS 0x010043
++#define I2C_DATA 0x010044
+
-+typedef enum {
-+ PCI_ARBITRATION_MODE_FAIR,
-+ PCI_ARBITRATION_MODE_ALTERNATE_0,
-+ PCI_ARBITRATION_MODE_ALTERNATE_B,
-+} pci_arbiter_priority_control_t;
++#define DE_COLOR_COMPARE 0x100020
++#define DE_COLOR_COMPARE_MASK 0x100024
++#define DE_MASKS 0x100028
++#define DE_WRAP 0x10004C
+
-+typedef enum {
-+ PCI_TAKE_AWAY_GNT_DISABLE,
-+ PCI_TAKE_AWAY_GNT_ENABLE,
-+} pci_take_away_gnt_mode_t;
++#define PANEL_DISPLAY_CTRL 0x080000
++#define PANEL_PAN_CTRL 0x080004
++#define PANEL_COLOR_KEY 0x080008
++#define PANEL_FB_ADDRESS 0x08000C
++#define PANEL_FB_WIDTH 0x080010
++#define PANEL_WINDOW_WIDTH 0x080014
++#define PANEL_WINDOW_HEIGHT 0x080018
++#define PANEL_PLANE_TL 0x08001C
++#define PANEL_PLANE_BR 0x080020
++#define PANEL_HORIZONTAL_TOTAL 0x080024
++#define PANEL_HORIZONTAL_SYNC 0x080028
++#define PANEL_VERTICAL_TOTAL 0x08002C
++#define PANEL_VERTICAL_SYNC 0x080030
++#define PANEL_CURRENT_LINE 0x080034
++#define VIDEO_DISPLAY_CTRL 0x080040
++#define VIDEO_DISPLAY_FB0 0x080044
++#define VIDEO_DISPLAY_FBWIDTH 0x080048
++#define VIDEO_DISPLAY_FB0LAST 0x08004C
++#define VIDEO_DISPLAY_TL 0x080050
++#define VIDEO_DISPLAY_BR 0x080054
++#define VIDEO_SCALE 0x080058
++#define VIDEO_INITIAL_SCALE 0x08005C
++#define VIDEO_YUV_CONSTANTS 0x080060
++#define VIDEO_DISPLAY_FB1 0x080064
++#define VIDEO_DISPLAY_FB1LAST 0x080068
++#define VIDEO_ALPHA_CTRL 0x080080
++#define PANEL_HWC_ADDRESS 0x0800F0
++#define CRT_DISPLAY_CTRL 0x080200
++#define CRT_FB_ADDRESS 0x080204
++#define CRT_FB_WIDTH 0x080208
++#define CRT_HORIZONTAL_TOTAL 0x08020c
++#define CRT_HORIZONTAL_SYNC 0x080210
++#define CRT_VERTICAL_TOTAL 0x080214
++#define CRT_VERTICAL_SYNC 0x080218
++#define CRT_HWC_ADDRESS 0x080230
++#define CRT_HWC_LOCATION 0x080234
+
-+struct pci_controller_unit_setup {
-+ struct pci_master_address_conversion *master_memory1;
-+ struct pci_master_address_conversion *master_memory2;
++#define ZV_CAPTURE_CTRL 0x090000
++#define ZV_CAPTURE_CLIP 0x090004
++#define ZV_CAPTURE_SIZE 0x090008
++#define ZV_CAPTURE_BUF0 0x09000c
++#define ZV_CAPTURE_BUF1 0x090010
++#define ZV_CAPTURE_OFFSET 0x090014
++#define ZV_FIFO_CTRL 0x090018
+
-+ struct pci_target_address_conversion *target_memory1;
-+ struct pci_target_address_conversion *target_memory2;
++#define waitforvsync() udelay(100); udelay(100); udelay(100); udelay(100);
+
-+ struct pci_master_address_conversion *master_io;
++/*
++ * Minimum X and Y resolutions
++ */
++#define MIN_XRES 640
++#define MIN_YRES 480
+
-+ pci_exclusive_access_t exclusive_access;
++/*
++* Private structure
++*/
++struct smifb_par
++{
++ /*
++ * Hardware
++ */
++ u16 chipID;
+
-+ uint32_t pci_clock_max;
-+ uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */
-+
-+ struct pci_mailbox_address *mailbox;
-+ struct pci_target_address_window *target_window1;
-+ struct pci_target_address_window *target_window2;
-+
-+ uint8_t master_latency_timer;
-+ uint8_t retry_limit;
-+
-+ pci_arbiter_priority_control_t arbiter_priority_control;
-+ pci_take_away_gnt_mode_t take_away_gnt_mode;
-+
-+ struct resource *mem_resource;
-+ struct resource *io_resource;
++ u_int width;
++ u_int height;
++ u_int hz;
+};
-+
-+extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup);
-+
-+#endif /* __NEC_VR41XX_PCI_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/asm-mips/vr41xx/vr41xx.h linux_HEAD/include/asm-mips/vr41xx/vr41xx.h
---- linux-2.6.11.6/include/asm-mips/vr41xx/vr41xx.h 2005-04-03 00:13:08.000000000 +0200
-+++ linux_HEAD/include/asm-mips/vr41xx/vr41xx.h 2005-03-09 22:46:16.000000000 +0100
-@@ -248,73 +247,31 @@ enum {
- };
-
- /*
-- * PCI Control Unit
-+ * Serial Interface Unit
- */
--#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU
--
--struct pci_master_address_conversion {
-- uint32_t bus_base_address;
-- uint32_t address_mask;
-- uint32_t pci_base_address;
--};
--
--struct pci_target_address_conversion {
-- uint32_t address_mask;
-- uint32_t bus_base_address;
--};
-+extern void vr41xx_siu_init(void);
-+extern int vr41xx_serial_ports;
-
-+/* SIU interfaces */
- typedef enum {
-- CANNOT_LOCK_FROM_DEVICE,
-- CAN_LOCK_FROM_DEVICE,
--} pci_exclusive_access_t;
--
--struct pci_mailbox_address {
-- uint32_t base_address;
--};
--
--struct pci_target_address_window {
-- uint32_t base_address;
--};
-+ SIU_RS232C,
-+ SIU_IRDA
-+} siu_interface_t;
-
-+/* IrDA interfaces */
- typedef enum {
-- PCI_ARBITRATION_MODE_FAIR,
-- PCI_ARBITRATION_MODE_ALTERNATE_0,
-- PCI_ARBITRATION_MODE_ALTERNATE_B,
--} pci_arbiter_priority_control_t;
--
--typedef enum {
-- PCI_TAKE_AWAY_GNT_DISABLE,
-- PCI_TAKE_AWAY_GNT_ENABLE,
--} pci_take_away_gnt_mode_t;
--
--struct pci_controller_unit_setup {
-- struct pci_master_address_conversion *master_memory1;
-- struct pci_master_address_conversion *master_memory2;
-+ IRDA_NONE,
-+ IRDA_SHARP,
-+ IRDA_TEMIC,
-+ IRDA_HP
-+} irda_module_t;
-
-- struct pci_target_address_conversion *target_memory1;
-- struct pci_target_address_conversion *target_memory2;
-+extern void vr41xx_select_siu_interface(siu_interface_t interface,
-+ irda_module_t module);
-
-- struct pci_master_address_conversion *master_io;
--
-- pci_exclusive_access_t exclusive_access;
--
-- uint32_t pci_clock_max;
-- uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */
--
-- struct pci_mailbox_address *mailbox;
-- struct pci_target_address_window *target_window1;
-- struct pci_target_address_window *target_window2;
--
-- uint8_t master_latency_timer;
-- uint8_t retry_limit;
--
-- pci_arbiter_priority_control_t arbiter_priority_control;
-- pci_take_away_gnt_mode_t take_away_gnt_mode;
--
-- struct resource *mem_resource;
-- struct resource *io_resource;
--};
--
--extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup);
-+/*
-+ * Debug Serial Interface Unit
-+ */
-+extern void vr41xx_dsiu_init(void);
-
- #endif /* __NEC_VR41XX_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/linux/ds17287rtc.h linux_HEAD/include/linux/ds17287rtc.h
---- linux-2.6.11.6/include/linux/ds17287rtc.h 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/include/linux/ds17287rtc.h linux_HEAD/include/linux/ds17287rtc.h
+--- linux-2.6.12/include/linux/ds17287rtc.h 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/include/linux/ds17287rtc.h 2003-04-07 04:28:45.000000000 +0200
@@ -0,0 +1,68 @@
+/*
@@ -47030,8 +69492,8 @@
+#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
+
+#endif /* _DS17287RTC_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/linux/ds1742rtc.h linux_HEAD/include/linux/ds1742rtc.h
---- linux-2.6.11.6/include/linux/ds1742rtc.h 1970-01-01 01:00:00.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/include/linux/ds1742rtc.h linux_HEAD/include/linux/ds1742rtc.h
+--- linux-2.6.12/include/linux/ds1742rtc.h 1970-01-01 01:00:00.000000000 +0100
+++ linux_HEAD/include/linux/ds1742rtc.h 2003-11-18 06:15:20.000000000 +0100
@@ -0,0 +1,53 @@
+/*
@@ -47087,8 +69549,8 @@
+#define RTC_FREQ_TEST 0x40
+
+#endif /* __LINUX_DS1742RTC_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/linux/elf.h linux_HEAD/include/linux/elf.h
---- linux-2.6.11.6/include/linux/elf.h 2005-03-26 04:28:16.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/include/linux/elf.h linux_HEAD/include/linux/elf.h
+--- linux-2.6.12/include/linux/elf.h 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/include/linux/elf.h 2005-02-17 21:50:55.000000000 +0100
@@ -66,7 +66,7 @@ typedef __s64 Elf64_Sxword;
@@ -47099,20 +69561,8 @@
#define EM_PARISC 15 /* HPPA */
-diff -urpNX dontdiff linux-2.6.11.6/include/linux/init.h linux_HEAD/include/linux/init.h
---- linux-2.6.11.6/include/linux/init.h 2005-03-26 04:28:14.000000000 +0100
-+++ linux_HEAD/include/linux/init.h 2005-02-17 21:50:57.000000000 +0100
-@@ -86,6 +86,8 @@ extern char saved_command_line[];
- static initcall_t __initcall_##fn __attribute_used__ \
- __attribute__((__section__(".initcall" level ".init"))) = fn
-
-+#define early_initcall(fn) __define_initcall(".early1",fn)
-+
- #define core_initcall(fn) __define_initcall("1",fn)
- #define postcore_initcall(fn) __define_initcall("2",fn)
- #define arch_initcall(fn) __define_initcall("3",fn)
-diff -urpNX dontdiff linux-2.6.11.6/include/linux/mc146818rtc.h linux_HEAD/include/linux/mc146818rtc.h
---- linux-2.6.11.6/include/linux/mc146818rtc.h 2005-03-26 04:28:26.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/include/linux/mc146818rtc.h linux_HEAD/include/linux/mc146818rtc.h
+--- linux-2.6.12/include/linux/mc146818rtc.h 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/include/linux/mc146818rtc.h 2004-12-04 20:57:43.000000000 +0100
@@ -89,4 +89,12 @@ extern spinlock_t rtc_lock; /* serializ
# define RTC_VRT 0x80 /* valid RAM and time */
@@ -47127,9 +69577,9 @@
+#endif
+
#endif /* _MC146818RTC_H */
-diff -urpNX dontdiff linux-2.6.11.6/include/linux/pci.h linux_HEAD/include/linux/pci.h
---- linux-2.6.11.6/include/linux/pci.h 2005-04-03 00:13:12.000000000 +0200
-+++ linux_HEAD/include/linux/pci.h 2005-03-21 20:05:08.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/include/linux/pci.h linux_HEAD/include/linux/pci.h
+--- linux-2.6.12/include/linux/pci.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/linux/pci.h 2005-07-01 12:10:41.000000000 +0200
@@ -1037,7 +1037,7 @@ enum pci_fixup_pass {
/* Anonymous variables would be nice... */
@@ -47139,9 +69589,22 @@
__attribute__((__section__(#section))) = { vendor, device, hook };
#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
-diff -urpNX dontdiff linux-2.6.11.6/include/linux/serial.h linux_HEAD/include/linux/serial.h
---- linux-2.6.11.6/include/linux/serial.h 2005-03-26 04:28:16.000000000 +0100
-+++ linux_HEAD/include/linux/serial.h 2004-12-23 22:54:30.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/include/linux/pci_ids.h linux_HEAD/include/linux/pci_ids.h
+--- linux-2.6.12/include/linux/pci_ids.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/linux/pci_ids.h 2005-07-10 12:16:34.000000000 +0200
+@@ -2120,6 +2120,9 @@
+ #define PCI_DEVICE_ID_ENE_1410 0x1410
+ #define PCI_DEVICE_ID_ENE_1420 0x1420
+
++#define PCI_VENDOR_ID_MIPS 0x153f
++#define PCI_DEVICE_ID_SOC_IT 0x0001
++
+ #define PCI_VENDOR_ID_SYBA 0x1592
+ #define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782
+ #define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783
+diff -urpNX dontdiff linux-2.6.12/include/linux/serial.h linux_HEAD/include/linux/serial.h
+--- linux-2.6.12/include/linux/serial.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/linux/serial.h 2005-07-10 12:16:38.000000000 +0200
@@ -75,7 +75,8 @@ struct serial_struct {
#define PORT_16654 11
#define PORT_16850 12
@@ -47152,8 +69615,20 @@
#define SERIAL_IO_PORT 0
#define SERIAL_IO_HUB6 1
-diff -urpNX dontdiff linux-2.6.11.6/scripts/genksyms/Makefile linux_HEAD/scripts/genksyms/Makefile
---- linux-2.6.11.6/scripts/genksyms/Makefile 2005-03-26 04:28:36.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/include/linux/serial_core.h linux_HEAD/include/linux/serial_core.h
+--- linux-2.6.12/include/linux/serial_core.h 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/include/linux/serial_core.h 2005-07-10 12:16:38.000000000 +0200
+@@ -104,7 +104,7 @@
+ #define PORT_MPSC 63
+
+ /* TXX9 type number */
+-#define PORT_TXX9 64
++#define PORT_TXX9 64
+
+ /* NEC VR4100 series SIU/DSIU */
+ #define PORT_VR41XX_SIU 65
+diff -urpNX dontdiff linux-2.6.12/scripts/genksyms/Makefile linux_HEAD/scripts/genksyms/Makefile
+--- linux-2.6.12/scripts/genksyms/Makefile 2005-06-17 21:48:29.000000000 +0200
+++ linux_HEAD/scripts/genksyms/Makefile 2004-09-21 13:12:23.000000000 +0200
@@ -47,3 +47,5 @@ clean-files += parse.output
endif
@@ -47161,12 +69636,12 @@
targets += keywords.c lex.c parse.c parse.h
+
+clean-files := keywords.c lex.c parse.c parse.h
-diff -urpNX dontdiff linux-2.6.11.6/scripts/kallsyms.c linux_HEAD/scripts/kallsyms.c
---- linux-2.6.11.6/scripts/kallsyms.c 2005-03-26 04:28:38.000000000 +0100
-+++ linux_HEAD/scripts/kallsyms.c 2005-02-21 15:26:30.000000000 +0100
-@@ -145,6 +145,9 @@ read_symbol(FILE *in, struct sym_entry *
+diff -urpNX dontdiff linux-2.6.12/scripts/kallsyms.c linux_HEAD/scripts/kallsyms.c
+--- linux-2.6.12/scripts/kallsyms.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/scripts/kallsyms.c 2005-07-01 12:10:54.000000000 +0200
+@@ -156,6 +156,9 @@ read_symbol(FILE *in, struct sym_entry *
else if (toupper(s->type) == 'U' ||
- is_arm_mapping_symbol(str))
+ is_arm_mapping_symbol(sym))
return -1;
+ /* exclude also MIPS ELF local symbols ($L123 instead of .L123) */
+ else if (str[0] == '$')
@@ -47174,9 +69649,9 @@
/* include the type field in the symbol name, so that it gets
* compressed together */
-diff -urpNX dontdiff linux-2.6.11.6/sound/oss/Kconfig linux_HEAD/sound/oss/Kconfig
---- linux-2.6.11.6/sound/oss/Kconfig 2005-03-26 04:28:26.000000000 +0100
-+++ linux_HEAD/sound/oss/Kconfig 2005-02-17 21:51:22.000000000 +0100
+diff -urpNX dontdiff linux-2.6.12/sound/oss/Kconfig linux_HEAD/sound/oss/Kconfig
+--- linux-2.6.12/sound/oss/Kconfig 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/sound/oss/Kconfig 2005-07-01 12:10:55.000000000 +0200
@@ -202,7 +202,7 @@ config SOUND_HAL2
depends on SOUND_PRIME!=n && SOUND && SGI_IP22 && EXPERIMENTAL
help
@@ -47196,10 +69671,10 @@
+
config SOUND_TRIDENT
tristate "Trident 4DWave DX/NX, SiS 7018 or ALi 5451 PCI Audio Core"
- depends on SOUND_PRIME!=n && SOUND && SOUND_GAMEPORT
-diff -urpNX dontdiff linux-2.6.11.6/sound/oss/Makefile linux_HEAD/sound/oss/Makefile
---- linux-2.6.11.6/sound/oss/Makefile 2005-03-26 04:28:17.000000000 +0100
-+++ linux_HEAD/sound/oss/Makefile 2005-02-17 21:51:22.000000000 +0100
+ depends on SOUND_PRIME!=n && SOUND
+diff -urpNX dontdiff linux-2.6.12/sound/oss/Makefile linux_HEAD/sound/oss/Makefile
+--- linux-2.6.12/sound/oss/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/sound/oss/Makefile 2005-07-10 12:26:12.000000000 +0200
@@ -64,8 +64,9 @@ endif
obj-$(CONFIG_SOUND_ES1370) += es1370.o
obj-$(CONFIG_SOUND_ES1371) += es1371.o ac97_codec.o
@@ -47212,22 +69687,18 @@
obj-$(CONFIG_SOUND_ESSSOLO1) += esssolo1.o
obj-$(CONFIG_SOUND_FUSION) += cs46xx.o ac97_codec.o
obj-$(CONFIG_SOUND_MAESTRO) += maestro.o
-diff -urpNX dontdiff linux-2.6.11.6/sound/oss/au1000.c linux_HEAD/sound/oss/au1000.c
---- linux-2.6.11.6/sound/oss/au1000.c 2005-03-26 04:28:23.000000000 +0100
-+++ linux_HEAD/sound/oss/au1000.c 2004-10-27 02:15:28.000000000 +0200
-@@ -2123,7 +2123,7 @@ static int __devinit au1000_probe(void)
+diff -urpNX dontdiff linux-2.6.12/sound/oss/au1550_ac97.c linux_HEAD/sound/oss/au1550_ac97.c
+--- linux-2.6.12/sound/oss/au1550_ac97.c 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/sound/oss/au1550_ac97.c 2005-07-10 12:28:27.000000000 +0200
+@@ -35,7 +35,6 @@
- #ifdef CONFIG_MIPS_XXS1500
- /* deassert eapd */
-- wrcodec(&s->codec, AC97_POWER_CONTROL,
-+ wrcodec(&s->codec, AC97_POWER_CONTROL,
- rdcodec(&s->codec, AC97_POWER_CONTROL) & ~0x8000);
- /* mute a number of signals which seem to be causing problems
- * if not muted.
-diff -urpNX dontdiff linux-2.6.11.6/sound/oss/au1550_ac97.c linux_HEAD/sound/oss/au1550_ac97.c
---- linux-2.6.11.6/sound/oss/au1550_ac97.c 2005-03-26 04:28:24.000000000 +0100
-+++ linux_HEAD/sound/oss/au1550_ac97.c 2005-02-17 21:51:24.000000000 +0100
-@@ -59,6 +59,7 @@
+ #undef DEBUG
+
+-#include <linux/version.h>
+ #include <linux/module.h>
+ #include <linux/string.h>
+ #include <linux/ioport.h>
+@@ -59,6 +58,7 @@
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1xxx_psc.h>
#include <asm/mach-au1x00/au1xxx_dbdma.h>
@@ -47235,64 +69706,10 @@
#undef OSS_DOCUMENTED_MIXER_SEMANTICS
-@@ -333,7 +334,7 @@ waitcodec(struct ac97_codec *codec)
- */
- temp = rdcodec(codec, AC97_POWER_CONTROL);
- }
--
-+
- /* Check if Codec REF,ANL,DAC,ADC ready
- */
- if ((temp & 0x7f0f) != 0x000f)
-@@ -1123,7 +1124,7 @@ au1550_write(struct file *file, const ch
-
- count *= db->cnt_factor;
-
-- down(&s->sem);
-+ down(&s->sem);
- add_wait_queue(&db->wait, &wait);
-
- while (count > 0) {
-@@ -1222,7 +1223,7 @@ au1550_poll(struct file *file, struct po
- }
-
- spin_lock_irqsave(&s->lock, flags);
--
-+
- if (file->f_mode & FMODE_READ) {
- if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize)
- mask |= POLLIN | POLLRDNORM;
-@@ -1230,7 +1231,7 @@ au1550_poll(struct file *file, struct po
- if (file->f_mode & FMODE_WRITE) {
- if (s->dma_dac.mapped) {
- if (s->dma_dac.count >=
-- (signed)s->dma_dac.dma_fragsize)
-+ (signed)s->dma_dac.dma_fragsize)
- mask |= POLLOUT | POLLWRNORM;
- } else {
- if ((signed) s->dma_dac.dmasize >=
-@@ -1781,7 +1782,7 @@ au1550_open(struct inode *inode, struct
- else
- pr_debug("open: blocking\n");
- #endif
--
-+
- file->private_data = s;
- /* wait for device to become free */
- down(&s->open_sem);
-@@ -1845,7 +1846,7 @@ au1550_release(struct inode *inode, stru
- struct au1550_state *s = (struct au1550_state *)file->private_data;
-
- lock_kernel();
--
-+
- if (file->f_mode & FMODE_WRITE) {
- unlock_kernel();
- drain_dac(s, file->f_flags & O_NONBLOCK);
-diff -urpNX dontdiff linux-2.6.11.6/sound/oss/au1550_i2s.c linux_HEAD/sound/oss/au1550_i2s.c
---- linux-2.6.11.6/sound/oss/au1550_i2s.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux_HEAD/sound/oss/au1550_i2s.c 2005-01-31 06:45:30.000000000 +0100
-@@ -0,0 +1,2030 @@
+diff -urpNX dontdiff linux-2.6.12/sound/oss/au1550_i2s.c linux_HEAD/sound/oss/au1550_i2s.c
+--- linux-2.6.12/sound/oss/au1550_i2s.c 1970-01-01 01:00:00.000000000 +0100
++++ linux_HEAD/sound/oss/au1550_i2s.c 2005-04-14 16:40:19.000000000 +0200
+@@ -0,0 +1,2029 @@
+/*
+ * au1550_i2s.c -- Sound driver for Alchemy Au1550 MIPS
+ * Internet Edge Processor.
@@ -47336,7 +69753,6 @@
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
-+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/ioport.h>
@@ -49323,829 +71739,3 @@
+
+MODULE_AUTHOR("Advanced Micro Devices (AMD), dan at embeddededge.com");
+MODULE_DESCRIPTION("Au1550 I2S Audio Driver");
-diff -urpNX dontdiff linux-2.6.11.6/sound/oss/nec_vrc5477.c linux_HEAD/sound/oss/nec_vrc5477.c
---- linux-2.6.11.6/sound/oss/nec_vrc5477.c 2005-03-26 04:28:46.000000000 +0100
-+++ linux_HEAD/sound/oss/nec_vrc5477.c 2004-09-21 13:12:32.000000000 +0200
-@@ -397,10 +397,10 @@ static void set_dac_rate(struct vrc5477_
-
- static int ac97_codec_not_present(struct ac97_codec *codec)
- {
-- struct vrc5477_ac97_state *s =
-+ struct vrc5477_ac97_state *s =
- (struct vrc5477_ac97_state *)codec->private_data;
- unsigned long flags;
-- unsigned short count = 0xffff;
-+ unsigned short count = 0xffff;
-
- spin_lock_irqsave(&s->lock, flags);
-
-@@ -419,8 +419,8 @@ static int ac97_codec_not_present(struct
- outl((AC97_RESET << 16) | 0, s->io + VRC5477_CODEC_WR);
-
- /* test whether we get a response from ac97 chip */
-- count = 0xffff;
-- do {
-+ count = 0xffff;
-+ do {
- if (!(inl(s->io + VRC5477_CODEC_WR) & 0x80000000))
- break;
- } while (--count);
-@@ -435,7 +435,7 @@ static int ac97_codec_not_present(struct
-
- /* --------------------------------------------------------------------- */
-
--extern inline void
-+extern inline void
- stop_dac(struct vrc5477_ac97_state *s)
- {
- struct dmabuf* db = &s->dma_dac;
-@@ -652,7 +652,7 @@ static void start_adc(struct vrc5477_ac9
- #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
- #define DMABUF_MINORDER 1
-
--extern inline void dealloc_dmabuf(struct vrc5477_ac97_state *s,
-+extern inline void dealloc_dmabuf(struct vrc5477_ac97_state *s,
- struct dmabuf *db)
- {
- if (db->lbuf) {
-diff -urpNX dontdiff linux-2.6.11.6/sound/pci/ac97/ac97_codec.c linux_HEAD/sound/pci/ac97/ac97_codec.c
---- linux-2.6.11.6/sound/pci/ac97/ac97_codec.c 2005-04-03 00:24:31.000000000 +0200
-+++ linux_HEAD/sound/pci/ac97/ac97_codec.c 2005-03-21 20:05:27.000000000 +0100
-@@ -1308,8 +1308,9 @@ static int snd_ac97_mixer_build(ac97_t *
- }
-
- /* build PC Speaker controls */
-- if ((ac97->flags & AC97_HAS_PC_BEEP) ||
-- snd_ac97_try_volume_mix(ac97, AC97_PC_BEEP)) {
-+ if (!(ac97->flags & AC97_HAS_NO_PC_BEEP) &&
-+ ((ac97->flags & AC97_HAS_PC_BEEP) ||
-+ snd_ac97_try_volume_mix(ac97, AC97_PC_BEEP))) {
- for (idx = 0; idx < 2; idx++)
- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_pc_beep[idx], ac97))) < 0)
- return err;
-@@ -1318,9 +1319,11 @@ static int snd_ac97_mixer_build(ac97_t *
- }
-
- /* build Phone controls */
-- if (snd_ac97_try_volume_mix(ac97, AC97_PHONE)) {
-- if ((err = snd_ac97_cmix_new(card, "Phone Playback", AC97_PHONE, ac97)) < 0)
-- return err;
-+ if (!(ac97->flags & AC97_HAS_NO_PHONE)) {
-+ if (snd_ac97_try_volume_mix(ac97, AC97_PHONE)) {
-+ if ((err = snd_ac97_cmix_new(card, "Phone Playback", AC97_PHONE, ac97)) < 0)
-+ return err;
-+ }
- }
-
- /* build MIC controls */
-@@ -1338,15 +1341,19 @@ static int snd_ac97_mixer_build(ac97_t *
- }
-
- /* build CD controls */
-- if (snd_ac97_try_volume_mix(ac97, AC97_CD)) {
-- if ((err = snd_ac97_cmix_new(card, "CD Playback", AC97_CD, ac97)) < 0)
-- return err;
-+ if (!(ac97->flags & AC97_HAS_NO_CD)) {
-+ if (snd_ac97_try_volume_mix(ac97, AC97_CD)) {
-+ if ((err = snd_ac97_cmix_new(card, "CD Playback", AC97_CD, ac97)) < 0)
-+ return err;
-+ }
- }
-
- /* build Video controls */
-- if (snd_ac97_try_volume_mix(ac97, AC97_VIDEO)) {
-- if ((err = snd_ac97_cmix_new(card, "Video Playback", AC97_VIDEO, ac97)) < 0)
-- return err;
-+ if (!(ac97->flags & AC97_HAS_NO_VIDEO)) {
-+ if (snd_ac97_try_volume_mix(ac97, AC97_VIDEO)) {
-+ if ((err = snd_ac97_cmix_new(card, "Video Playback", AC97_VIDEO, ac97)) < 0)
-+ return err;
-+ }
- }
-
- /* build Aux controls */
-@@ -1392,17 +1399,18 @@ static int snd_ac97_mixer_build(ac97_t *
- }
-
- /* build Capture controls */
-- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_control_capture_src, ac97))) < 0)
-- return err;
-- if (snd_ac97_try_bit(ac97, AC97_REC_GAIN, 15)) {
-- if ((err = snd_ac97_cmute_new(card, "Capture Switch", AC97_REC_GAIN, ac97)) < 0)
-+ if (!(ac97->flags & AC97_HAS_NO_REC_GAIN)) {
-+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_control_capture_src, ac97))) < 0)
-+ return err;
-+ if (snd_ac97_try_bit(ac97, AC97_REC_GAIN, 15)) {
-+ if ((err = snd_ac97_cmute_new(card, "Capture Switch", AC97_REC_GAIN, ac97)) < 0)
-+ return err;
-+ }
-+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_control_capture_vol, ac97))) < 0)
- return err;
-+ snd_ac97_write_cache(ac97, AC97_REC_SEL, 0x0000);
-+ snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x0000);
- }
-- if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_control_capture_vol, ac97))) < 0)
-- return err;
-- snd_ac97_write_cache(ac97, AC97_REC_SEL, 0x0000);
-- snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x0000);
--
- /* build MIC Capture controls */
- if (snd_ac97_try_volume_mix(ac97, AC97_REC_GAIN_MIC)) {
- for (idx = 0; idx < 2; idx++)
-@@ -1544,6 +1552,7 @@ static int snd_ac97_test_rate(ac97_t *ac
- static void snd_ac97_determine_rates(ac97_t *ac97, int reg, int shadow_reg, unsigned int *r_result)
- {
- unsigned int result = 0;
-+ unsigned short saved;
-
- if (ac97->bus->no_vra) {
- *r_result = SNDRV_PCM_RATE_48000;
-@@ -1553,6 +1562,7 @@ static void snd_ac97_determine_rates(ac9
- return;
- }
-
-+ saved = snd_ac97_read(ac97, reg);
- if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
- snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
- AC97_EA_DRA, 0);
-@@ -1591,6 +1601,10 @@ static void snd_ac97_determine_rates(ac9
- snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
- AC97_EA_DRA, 0);
- }
-+ /* restore the default value */
-+ snd_ac97_write_cache(ac97, reg, saved);
-+ if (shadow_reg)
-+ snd_ac97_write_cache(ac97, shadow_reg, saved);
- *r_result = result;
- }
-
-@@ -1614,6 +1628,18 @@ static unsigned int snd_ac97_determine_s
- return result;
- }
-
-+/* look for the codec id table matching with the given id */
-+static const ac97_codec_id_t *look_for_codec_id(const ac97_codec_id_t *table,
-+ unsigned int id)
-+{
-+ const ac97_codec_id_t *pid;
-+
-+ for (pid = table; pid->id; pid++)
-+ if (pid->id == (id & pid->mask))
-+ return pid;
-+ return NULL;
-+}
-+
- void snd_ac97_get_name(ac97_t *ac97, unsigned int id, char *name, int modem)
- {
- const ac97_codec_id_t *pid;
-@@ -1622,35 +1648,30 @@ void snd_ac97_get_name(ac97_t *ac97, uns
- printable(id >> 24),
- printable(id >> 16),
- printable(id >> 8));
-- for (pid = snd_ac97_codec_id_vendors; pid->id; pid++)
-- if (pid->id == (id & pid->mask)) {
-- strcpy(name, pid->name);
-- if (ac97) {
-- if (!modem && pid->patch)
-- pid->patch(ac97);
-- else if (modem && pid->mpatch)
-- pid->mpatch(ac97);
-- }
-- goto __vendor_ok;
-- }
-- return;
-+ pid = look_for_codec_id(snd_ac97_codec_id_vendors, id);
-+ if (! pid)
-+ return;
-
-- __vendor_ok:
-- for (pid = snd_ac97_codec_ids; pid->id; pid++)
-- if (pid->id == (id & pid->mask)) {
-- strcat(name, " ");
-- strcat(name, pid->name);
-- if (pid->mask != 0xffffffff)
-- sprintf(name + strlen(name), " rev %d", id & ~pid->mask);
-- if (ac97) {
-- if (!modem && pid->patch)
-- pid->patch(ac97);
-- else if (modem && pid->mpatch)
-- pid->mpatch(ac97);
-- }
-- return;
-+ strcpy(name, pid->name);
-+ if (ac97 && pid->patch) {
-+ if ((modem && (pid->flags & AC97_MODEM_PATCH)) ||
-+ (! modem && ! (pid->flags & AC97_MODEM_PATCH)))
-+ pid->patch(ac97);
-+ }
-+
-+ pid = look_for_codec_id(snd_ac97_codec_ids, id);
-+ if (pid) {
-+ strcat(name, " ");
-+ strcat(name, pid->name);
-+ if (pid->mask != 0xffffffff)
-+ sprintf(name + strlen(name), " rev %d", id & ~pid->mask);
-+ if (ac97 && pid->patch) {
-+ if ((modem && (pid->flags & AC97_MODEM_PATCH)) ||
-+ (! modem && ! (pid->flags & AC97_MODEM_PATCH)))
-+ pid->patch(ac97);
- }
-- sprintf(name + strlen(name), " id %x", id & 0xff);
-+ } else
-+ sprintf(name + strlen(name), " id %x", id & 0xff);
- }
-
- /**
---- linux-2.6.11.6/drivers/net/meth.c 2005-04-05 14:03:47.000000000 +0200
-+++ linux_HEAD/drivers/net/meth.c 2005-03-02 08:38:38.000000000 +0100
-@@ -27,7 +27,7 @@
- #include <linux/ip.h> /* struct iphdr */
- #include <linux/tcp.h> /* struct tcphdr */
- #include <linux/skbuff.h>
--#include <linux/mii.h> /*MII definitions */
-+#include <linux/mii.h> /* MII definitions */
-
- #include <asm/ip32/mace.h>
- #include <asm/ip32/ip32_ints.h>
-@@ -105,27 +105,27 @@ static inline void load_eaddr(struct net
- (int)o2meth_eaddr[3]&0xFF,(int)o2meth_eaddr[4]&0xFF,(int)o2meth_eaddr[5]&0xFF);
- for (i = 0; i < 6; i++)
- dev->dev_addr[i] = o2meth_eaddr[i];
-- mace_eth_write((*(u64*)o2meth_eaddr)>>16, mac_addr);
-+ mace->eth.mac_addr = (*(unsigned long*)o2meth_eaddr) >> 16;
- }
-
- /*
- * Waits for BUSY status of mdio bus to clear
- */
--#define WAIT_FOR_PHY(___rval) \
-- while ((___rval = mace_eth_read(phy_data)) & MDIO_BUSY) { \
-- udelay(25); \
-+#define WAIT_FOR_PHY(___rval) \
-+ while ((___rval = mace->eth.phy_data) & MDIO_BUSY) { \
-+ udelay(25); \
- }
- /*read phy register, return value read */
- static unsigned long mdio_read(struct meth_private *priv, unsigned long phyreg)
- {
- unsigned long rval;
- WAIT_FOR_PHY(rval);
-- mace_eth_write((priv->phy_addr << 5) | (phyreg & 0x1f), phy_regs);
-+ mace->eth.phy_regs = (priv->phy_addr << 5) | (phyreg & 0x1f);
- udelay(25);
-- mace_eth_write(1, phy_trans_go);
-+ mace->eth.phy_trans_go = 1;
- udelay(25);
- WAIT_FOR_PHY(rval);
-- return rval&MDIO_DATA_MASK;
-+ return rval & MDIO_DATA_MASK;
- }
-
- static int mdio_probe(struct meth_private *priv)
-@@ -191,7 +191,7 @@ static void meth_check_link(struct net_d
- priv->mac_ctrl |= METH_PHY_FDX;
- else
- priv->mac_ctrl &= ~METH_PHY_FDX;
-- mace_eth_write(priv->mac_ctrl, mac_ctrl);
-+ mace->eth.mac_ctrl = priv->mac_ctrl;
- }
-
- if ((priv->mac_ctrl & METH_100MBIT) ^ speed) {
-@@ -200,7 +200,7 @@ static void meth_check_link(struct net_d
- priv->mac_ctrl |= METH_100MBIT;
- else
- priv->mac_ctrl &= ~METH_100MBIT;
-- mace_eth_write(priv->mac_ctrl, mac_ctrl);
-+ mace->eth.mac_ctrl = priv->mac_ctrl;
- }
- }
-
-@@ -214,26 +214,28 @@ static int meth_init_tx_ring(struct meth
- return -ENOMEM;
- memset(priv->tx_ring, 0, TX_RING_BUFFER_SIZE);
- priv->tx_count = priv->tx_read = priv->tx_write = 0;
-- mace_eth_write(priv->tx_ring_dma, tx_ring_base);
-+ mace->eth.tx_ring_base = priv->tx_ring_dma;
- /* Now init skb save area */
-- memset(priv->tx_skbs,0,sizeof(priv->tx_skbs));
-- memset(priv->tx_skb_dmas,0,sizeof(priv->tx_skb_dmas));
-+ memset(priv->tx_skbs, 0, sizeof(priv->tx_skbs));
-+ memset(priv->tx_skb_dmas, 0, sizeof(priv->tx_skb_dmas));
- return 0;
- }
-
- static int meth_init_rx_ring(struct meth_private *priv)
- {
- int i;
-- for(i=0;i<RX_RING_ENTRIES;i++){
-- priv->rx_skbs[i]=alloc_skb(METH_RX_BUFF_SIZE,0);
-- /* 8byte status vector+3quad padding + 2byte padding,
-- to put data on 64bit aligned boundary */
-+
-+ for (i = 0; i < RX_RING_ENTRIES; i++) {
-+ priv->rx_skbs[i] = alloc_skb(METH_RX_BUFF_SIZE, 0);
-+ /* 8byte status vector + 3quad padding + 2byte padding,
-+ * to put data on 64bit aligned boundary */
- skb_reserve(priv->rx_skbs[i],METH_RX_HEAD);
- priv->rx_ring[i]=(rx_packet*)(priv->rx_skbs[i]->head);
- /* I'll need to re-sync it after each RX */
-- priv->rx_ring_dmas[i]=dma_map_single(NULL,priv->rx_ring[i],
-- METH_RX_BUFF_SIZE,DMA_FROM_DEVICE);
-- mace_eth_write(priv->rx_ring_dmas[i], rx_fifo);
-+ priv->rx_ring_dmas[i] =
-+ dma_map_single(NULL, priv->rx_ring[i],
-+ METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+ mace->eth.rx_fifo = priv->rx_ring_dmas[i];
- }
- priv->rx_write = 0;
- return 0;
-@@ -257,10 +259,11 @@ static void meth_free_rx_ring(struct met
- {
- int i;
-
-- for(i=0;i<RX_RING_ENTRIES;i++) {
-- dma_unmap_single(NULL,priv->rx_ring_dmas[i],METH_RX_BUFF_SIZE,DMA_FROM_DEVICE);
-- priv->rx_ring[i]=0;
-- priv->rx_ring_dmas[i]=0;
-+ for (i = 0; i < RX_RING_ENTRIES; i++) {
-+ dma_unmap_single(NULL, priv->rx_ring_dmas[i],
-+ METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+ priv->rx_ring[i] = 0;
-+ priv->rx_ring_dmas[i] = 0;
- kfree_skb(priv->rx_skbs[i]);
- }
- }
-@@ -270,8 +273,9 @@ int meth_reset(struct net_device *dev)
- struct meth_private *priv = (struct meth_private *) dev->priv;
-
- /* Reset card */
-- mace_eth_write(SGI_MAC_RESET, mac_ctrl);
-- mace_eth_write(0, mac_ctrl);
-+ mace->eth.mac_ctrl = SGI_MAC_RESET;
-+ udelay(1);
-+ mace->eth.mac_ctrl = 0;
- udelay(25);
-
- /* Load ethernet address */
-@@ -279,24 +283,24 @@ int meth_reset(struct net_device *dev)
- /* Should load some "errata", but later */
-
- /* Check for device */
-- if(mdio_probe(priv) < 0) {
-+ if (mdio_probe(priv) < 0) {
- DPRINTK("Unable to find PHY\n");
- return -ENODEV;
- }
-
- /* Initial mode: 10 | Half-duplex | Accept normal packets */
- priv->mac_ctrl = METH_ACCEPT_MCAST | METH_DEFAULT_IPG;
-- if(dev->flags | IFF_PROMISC)
-+ if (dev->flags | IFF_PROMISC)
- priv->mac_ctrl |= METH_PROMISC;
-- mace_eth_write(priv->mac_ctrl, mac_ctrl);
-+ mace->eth.mac_ctrl = priv->mac_ctrl;
-
- /* Autonegotiate speed and duplex mode */
- meth_check_link(dev);
-
- /* Now set dma control, but don't enable DMA, yet */
-- priv->dma_ctrl= (4 << METH_RX_OFFSET_SHIFT) |
-- (RX_RING_ENTRIES << METH_RX_DEPTH_SHIFT);
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ priv->dma_ctrl = (4 << METH_RX_OFFSET_SHIFT) |
-+ (RX_RING_ENTRIES << METH_RX_DEPTH_SHIFT);
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
-
- return 0;
- }
-@@ -335,7 +339,7 @@ static int meth_open(struct net_device *
- /* Start DMA */
- priv->dma_ctrl |= METH_DMA_TX_EN | /*METH_DMA_TX_INT_EN |*/
- METH_DMA_RX_EN | METH_DMA_RX_INT_EN;
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
-
- DPRINTK("About to start queue\n");
- netif_start_queue(dev);
-@@ -359,7 +363,7 @@ static int meth_release(struct net_devic
- /* shut down DMA */
- priv->dma_ctrl &= ~(METH_DMA_TX_EN | METH_DMA_TX_INT_EN |
- METH_DMA_RX_EN | METH_DMA_RX_INT_EN);
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
- free_irq(dev->irq, dev);
- meth_free_tx_ring(priv);
- meth_free_rx_ring(priv);
-@@ -373,56 +377,57 @@ static int meth_release(struct net_devic
- static void meth_rx(struct net_device* dev, unsigned long int_status)
- {
- struct sk_buff *skb;
-+ unsigned long status;
- struct meth_private *priv = (struct meth_private *) dev->priv;
-- unsigned long fifo_rptr=(int_status&METH_INT_RX_RPTR_MASK)>>8;
-+ unsigned long fifo_rptr = (int_status & METH_INT_RX_RPTR_MASK) >> 8;
-+
- spin_lock(&priv->meth_lock);
-- priv->dma_ctrl&=~METH_DMA_RX_INT_EN;
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ priv->dma_ctrl &= ~METH_DMA_RX_INT_EN;
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
- spin_unlock(&priv->meth_lock);
-
-- if (int_status & METH_INT_RX_UNDERFLOW){
-- fifo_rptr=(fifo_rptr-1)&(0xF);
-+ if (int_status & METH_INT_RX_UNDERFLOW) {
-+ fifo_rptr = (fifo_rptr - 1) & 0x0f;
- }
-- while(priv->rx_write != fifo_rptr) {
-- u64 status;
-- dma_unmap_single(NULL,priv->rx_ring_dmas[priv->rx_write],
-- METH_RX_BUFF_SIZE,DMA_FROM_DEVICE);
-- status=priv->rx_ring[priv->rx_write]->status.raw;
-+ while (priv->rx_write != fifo_rptr) {
-+ dma_unmap_single(NULL, priv->rx_ring_dmas[priv->rx_write],
-+ METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+ status = priv->rx_ring[priv->rx_write]->status.raw;
- #if MFE_DEBUG
-- if(!(status&METH_RX_ST_VALID)) {
-+ if (!(status & METH_RX_ST_VALID)) {
- DPRINTK("Not received? status=%016lx\n",status);
- }
- #endif
-- if((!(status&METH_RX_STATUS_ERRORS))&&(status&METH_RX_ST_VALID)){
-- int len=(status&0xFFFF) - 4; /* omit CRC */
-+ if ((!(status & METH_RX_STATUS_ERRORS)) && (status & METH_RX_ST_VALID)) {
-+ int len = (status & 0xffff) - 4; /* omit CRC */
- /* length sanity check */
-- if(len < 60 || len > 1518) {
-- printk(KERN_DEBUG "%s: bogus packet size: %d, status=%#2lx.\n",
-+ if (len < 60 || len > 1518) {
-+ printk(KERN_DEBUG "%s: bogus packet size: %ld, status=%#2lx.\n",
- dev->name, priv->rx_write,
- priv->rx_ring[priv->rx_write]->status.raw);
- priv->stats.rx_errors++;
- priv->stats.rx_length_errors++;
-- skb=priv->rx_skbs[priv->rx_write];
-+ skb = priv->rx_skbs[priv->rx_write];
- } else {
-- skb=alloc_skb(METH_RX_BUFF_SIZE,GFP_ATOMIC|GFP_DMA);
-- if(!skb){
-+ skb = alloc_skb(METH_RX_BUFF_SIZE, GFP_ATOMIC | GFP_DMA);
-+ if (!skb) {
- /* Ouch! No memory! Drop packet on the floor */
- DPRINTK("No mem: dropping packet\n");
- priv->stats.rx_dropped++;
-- skb=priv->rx_skbs[priv->rx_write];
-+ skb = priv->rx_skbs[priv->rx_write];
- } else {
-- struct sk_buff *skb_c=priv->rx_skbs[priv->rx_write];
-- /* 8byte status vector+3quad padding + 2byte padding,
-- to put data on 64bit aligned boundary */
-- skb_reserve(skb,METH_RX_HEAD);
-+ struct sk_buff *skb_c = priv->rx_skbs[priv->rx_write];
-+ /* 8byte status vector + 3quad padding + 2byte padding,
-+ * to put data on 64bit aligned boundary */
-+ skb_reserve(skb, METH_RX_HEAD);
- /* Write metadata, and then pass to the receive level */
-- skb_put(skb_c,len);
-- priv->rx_skbs[priv->rx_write]=skb;
-+ skb_put(skb_c, len);
-+ priv->rx_skbs[priv->rx_write] = skb;
- skb_c->dev = dev;
- skb_c->protocol = eth_type_trans(skb_c, dev);
- dev->last_rx = jiffies;
- priv->stats.rx_packets++;
-- priv->stats.rx_bytes+=len;
-+ priv->stats.rx_bytes += len;
- netif_rx(skb_c);
- }
- }
-@@ -445,18 +450,19 @@ static void meth_rx(struct net_device* d
- printk(KERN_WARNING "Carrier Event Seen\n");
- #endif
- }
-- priv->rx_ring[priv->rx_write]=(rx_packet*)skb->head;
-- priv->rx_ring[priv->rx_write]->status.raw=0;
-- priv->rx_ring_dmas[priv->rx_write]=dma_map_single(NULL,priv->rx_ring[priv->rx_write],
-- METH_RX_BUFF_SIZE,DMA_FROM_DEVICE);
-- mace_eth_write(priv->rx_ring_dmas[priv->rx_write], rx_fifo);
-+ priv->rx_ring[priv->rx_write] = (rx_packet*)skb->head;
-+ priv->rx_ring[priv->rx_write]->status.raw = 0;
-+ priv->rx_ring_dmas[priv->rx_write] =
-+ dma_map_single(NULL, priv->rx_ring[priv->rx_write],
-+ METH_RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+ mace->eth.rx_fifo = priv->rx_ring_dmas[priv->rx_write];
- ADVANCE_RX_PTR(priv->rx_write);
- }
- spin_lock(&priv->meth_lock);
- /* In case there was underflow, and Rx DMA was disabled */
-- priv->dma_ctrl|=METH_DMA_RX_INT_EN|METH_DMA_RX_EN;
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-- mace_eth_write(METH_INT_RX_THRESHOLD, int_stat);
-+ priv->dma_ctrl |= METH_DMA_RX_INT_EN | METH_DMA_RX_EN;
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
-+ mace->eth.int_stat = METH_INT_RX_THRESHOLD;
- spin_unlock(&priv->meth_lock);
- }
-
-@@ -464,31 +470,31 @@ static int meth_tx_full(struct net_devic
- {
- struct meth_private *priv = (struct meth_private *) dev->priv;
-
-- return(priv->tx_count >= TX_RING_ENTRIES-1);
-+ return (priv->tx_count >= TX_RING_ENTRIES - 1);
- }
-
- static void meth_tx_cleanup(struct net_device* dev, unsigned long int_status)
- {
- struct meth_private *priv = dev->priv;
-- u64 status;
-+ unsigned long status;
- struct sk_buff *skb;
-- unsigned long rptr=(int_status&TX_INFO_RPTR)>>16;
-+ unsigned long rptr = (int_status&TX_INFO_RPTR) >> 16;
-
- spin_lock(&priv->meth_lock);
-
- /* Stop DMA notification */
- priv->dma_ctrl &= ~(METH_DMA_TX_INT_EN);
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
-
-- while(priv->tx_read != rptr){
-+ while (priv->tx_read != rptr) {
- skb = priv->tx_skbs[priv->tx_read];
- status = priv->tx_ring[priv->tx_read].header.raw;
- #if MFE_DEBUG>=1
-- if(priv->tx_read==priv->tx_write)
-- DPRINTK("Auchi! tx_read=%d,tx_write=%d,rptr=%d?\n",priv->tx_read,priv->tx_write,rptr);
-+ if (priv->tx_read == priv->tx_write)
-+ DPRINTK("Auchi! tx_read=%d,tx_write=%d,rptr=%d?\n", priv->tx_read, priv->tx_write,rptr);
- #endif
-- if(status & METH_TX_ST_DONE) {
-- if(status & METH_TX_ST_SUCCESS){
-+ if (status & METH_TX_ST_DONE) {
-+ if (status & METH_TX_ST_SUCCESS){
- priv->stats.tx_packets++;
- priv->stats.tx_bytes += skb->len;
- } else {
-@@ -518,19 +524,19 @@ static void meth_tx_cleanup(struct net_d
- priv->tx_skbs[priv->tx_read] = NULL;
- priv->tx_ring[priv->tx_read].header.raw = 0;
- priv->tx_read = (priv->tx_read+1)&(TX_RING_ENTRIES-1);
-- priv->tx_count --;
-+ priv->tx_count--;
- }
-
- /* wake up queue if it was stopped */
-- if (netif_queue_stopped(dev) && ! meth_tx_full(dev)) {
-+ if (netif_queue_stopped(dev) && !meth_tx_full(dev)) {
- netif_wake_queue(dev);
- }
-
-- mace_eth_write(METH_INT_TX_EMPTY | METH_INT_TX_PKT, int_stat);
-+ mace->eth.int_stat = METH_INT_TX_EMPTY | METH_INT_TX_PKT;
- spin_unlock(&priv->meth_lock);
- }
-
--static void meth_error(struct net_device* dev, u32 status)
-+static void meth_error(struct net_device* dev, unsigned status)
- {
- struct meth_private *priv = (struct meth_private *) dev->priv;
-
-@@ -548,17 +554,16 @@ static void meth_error(struct net_device
- if (status & (METH_INT_RX_UNDERFLOW)) {
- printk(KERN_WARNING "meth: Rx underflow\n");
- spin_lock(&priv->meth_lock);
-- mace_eth_write(METH_INT_RX_UNDERFLOW, int_stat);
-+ mace->eth.int_stat = METH_INT_RX_UNDERFLOW;
- /* more underflow interrupts will be delivered,
-- effectively throwing us into an infinite loop.
-- Thus I stop processing Rx in this case.
-- */
-- priv->dma_ctrl&=~METH_DMA_RX_EN;
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ * effectively throwing us into an infinite loop.
-+ * Thus I stop processing Rx in this case. */
-+ priv->dma_ctrl &= ~METH_DMA_RX_EN;
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
- DPRINTK("Disabled meth Rx DMA temporarily\n");
- spin_unlock(&priv->meth_lock);
- }
-- mace_eth_write(METH_INT_ERROR, int_stat);
-+ mace->eth.int_stat = METH_INT_ERROR;
- }
-
- /*
-@@ -570,12 +575,12 @@ static irqreturn_t meth_interrupt(int ir
- struct meth_private *priv = (struct meth_private *) dev->priv;
- unsigned long status;
-
-- status = mace_eth_read(int_stat);
-- while (status & 0xFF) {
-+ status = mace->eth.int_stat;
-+ while (status & 0xff) {
- /* First handle errors - if we get Rx underflow,
-- Rx DMA will be disabled, and Rx handler will reenable
-- it. I don't think it's possible to get Rx underflow,
-- without getting Rx interrupt */
-+ * Rx DMA will be disabled, and Rx handler will reenable
-+ * it. I don't think it's possible to get Rx underflow,
-+ * without getting Rx interrupt */
- if (status & METH_INT_ERROR) {
- meth_error(dev, status);
- }
-@@ -589,7 +594,7 @@ static irqreturn_t meth_interrupt(int ir
- /* send it to meth_rx for handling */
- meth_rx(dev, status);
- }
-- status = mace_eth_read(int_stat);
-+ status = mace->eth.int_stat;
- }
-
- return IRQ_HANDLED;
-@@ -601,45 +606,45 @@ static irqreturn_t meth_interrupt(int ir
- static void meth_tx_short_prepare(struct meth_private *priv,
- struct sk_buff *skb)
- {
-- tx_packet *desc=&priv->tx_ring[priv->tx_write];
-- int len = (skb->len<ETH_ZLEN)?ETH_ZLEN:skb->len;
-+ tx_packet *desc = &priv->tx_ring[priv->tx_write];
-+ int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
-
-- desc->header.raw=METH_TX_CMD_INT_EN|(len-1)|((128-len)<<16);
-+ desc->header.raw = METH_TX_CMD_INT_EN | (len-1) | ((128-len) << 16);
- /* maybe I should set whole thing to 0 first... */
-- memcpy(desc->data.dt+(120-len),skb->data,skb->len);
-- if(skb->len < len)
-- memset(desc->data.dt+120-len+skb->len,0,len-skb->len);
-+ memcpy(desc->data.dt + (120 - len), skb->data, skb->len);
-+ if (skb->len < len)
-+ memset(desc->data.dt + 120 - len + skb->len, 0, len-skb->len);
- }
- #define TX_CATBUF1 BIT(25)
- static void meth_tx_1page_prepare(struct meth_private *priv,
- struct sk_buff *skb)
- {
-- tx_packet *desc=&priv->tx_ring[priv->tx_write];
-+ tx_packet *desc = &priv->tx_ring[priv->tx_write];
- void *buffer_data = (void *)(((unsigned long)skb->data + 7) & ~7);
- int unaligned_len = (int)((unsigned long)buffer_data - (unsigned long)skb->data);
- int buffer_len = skb->len - unaligned_len;
- dma_addr_t catbuf;
-
-- desc->header.raw=METH_TX_CMD_INT_EN|TX_CATBUF1|(skb->len-1);
-+ desc->header.raw = METH_TX_CMD_INT_EN | TX_CATBUF1 | (skb->len - 1);
-
- /* unaligned part */
-- if(unaligned_len){
-- memcpy(desc->data.dt+(120-unaligned_len),
-+ if (unaligned_len) {
-+ memcpy(desc->data.dt + (120 - unaligned_len),
- skb->data, unaligned_len);
-- desc->header.raw |= (128-unaligned_len) << 16;
-+ desc->header.raw |= (128 - unaligned_len) << 16;
- }
-
- /* first page */
- catbuf = dma_map_single(NULL, buffer_data, buffer_len,
- DMA_TO_DEVICE);
- desc->data.cat_buf[0].form.start_addr = catbuf >> 3;
-- desc->data.cat_buf[0].form.len = buffer_len-1;
-+ desc->data.cat_buf[0].form.len = buffer_len - 1;
- }
- #define TX_CATBUF2 BIT(26)
- static void meth_tx_2page_prepare(struct meth_private *priv,
- struct sk_buff *skb)
- {
-- tx_packet *desc=&priv->tx_ring[priv->tx_write];
-+ tx_packet *desc = &priv->tx_ring[priv->tx_write];
- void *buffer1_data = (void *)(((unsigned long)skb->data + 7) & ~7);
- void *buffer2_data = (void *)PAGE_ALIGN((unsigned long)skb->data);
- int unaligned_len = (int)((unsigned long)buffer1_data - (unsigned long)skb->data);
-@@ -647,44 +652,44 @@ static void meth_tx_2page_prepare(struct
- int buffer2_len = skb->len - buffer1_len - unaligned_len;
- dma_addr_t catbuf1, catbuf2;
-
-- desc->header.raw=METH_TX_CMD_INT_EN|TX_CATBUF1|TX_CATBUF2|(skb->len-1);
-+ desc->header.raw = METH_TX_CMD_INT_EN | TX_CATBUF1 | TX_CATBUF2| (skb->len - 1);
- /* unaligned part */
-- if(unaligned_len){
-- memcpy(desc->data.dt+(120-unaligned_len),
-+ if (unaligned_len){
-+ memcpy(desc->data.dt + (120 - unaligned_len),
- skb->data, unaligned_len);
-- desc->header.raw |= (128-unaligned_len) << 16;
-+ desc->header.raw |= (128 - unaligned_len) << 16;
- }
-
- /* first page */
- catbuf1 = dma_map_single(NULL, buffer1_data, buffer1_len,
- DMA_TO_DEVICE);
- desc->data.cat_buf[0].form.start_addr = catbuf1 >> 3;
-- desc->data.cat_buf[0].form.len = buffer1_len-1;
-+ desc->data.cat_buf[0].form.len = buffer1_len - 1;
- /* second page */
- catbuf2 = dma_map_single(NULL, buffer2_data, buffer2_len,
- DMA_TO_DEVICE);
- desc->data.cat_buf[1].form.start_addr = catbuf2 >> 3;
-- desc->data.cat_buf[1].form.len = buffer2_len-1;
-+ desc->data.cat_buf[1].form.len = buffer2_len - 1;
- }
-
- static void meth_add_to_tx_ring(struct meth_private *priv, struct sk_buff *skb)
- {
- /* Remember the skb, so we can free it at interrupt time */
- priv->tx_skbs[priv->tx_write] = skb;
-- if(skb->len <= 120) {
-+ if (skb->len <= 120) {
- /* Whole packet fits into descriptor */
-- meth_tx_short_prepare(priv,skb);
-- } else if(PAGE_ALIGN((unsigned long)skb->data) !=
-- PAGE_ALIGN((unsigned long)skb->data+skb->len-1)) {
-+ meth_tx_short_prepare(priv, skb);
-+ } else if (PAGE_ALIGN((unsigned long)skb->data) !=
-+ PAGE_ALIGN((unsigned long)skb->data + skb->len - 1)) {
- /* Packet crosses page boundary */
-- meth_tx_2page_prepare(priv,skb);
-+ meth_tx_2page_prepare(priv, skb);
- } else {
- /* Packet is in one page */
-- meth_tx_1page_prepare(priv,skb);
-+ meth_tx_1page_prepare(priv, skb);
- }
-- priv->tx_write = (priv->tx_write+1) & (TX_RING_ENTRIES-1);
-- mace_eth_write(priv->tx_write, tx_info);
-- priv->tx_count ++;
-+ priv->tx_write = (priv->tx_write + 1) & (TX_RING_ENTRIES - 1);
-+ mace->eth.tx_info = priv->tx_write;
-+ priv->tx_count++;
- }
-
- /*
-@@ -695,10 +700,10 @@ static int meth_tx(struct sk_buff *skb,
- struct meth_private *priv = (struct meth_private *) dev->priv;
- unsigned long flags;
-
-- spin_lock_irqsave(&priv->meth_lock,flags);
-+ spin_lock_irqsave(&priv->meth_lock, flags);
- /* Stop DMA notification */
- priv->dma_ctrl &= ~(METH_DMA_TX_INT_EN);
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
-
- meth_add_to_tx_ring(priv, skb);
- dev->trans_start = jiffies; /* save the timestamp */
-@@ -711,9 +716,9 @@ static int meth_tx(struct sk_buff *skb,
-
- /* Restart DMA notification */
- priv->dma_ctrl |= METH_DMA_TX_INT_EN;
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
-
-- spin_unlock_irqrestore(&priv->meth_lock,flags);
-+ spin_unlock_irqrestore(&priv->meth_lock, flags);
-
- return 0;
- }
-@@ -743,11 +748,11 @@ static void meth_tx_timeout(struct net_d
- meth_init_rx_ring(priv);
-
- /* Restart dma */
-- priv->dma_ctrl|=METH_DMA_TX_EN|METH_DMA_RX_EN|METH_DMA_RX_INT_EN;
-- mace_eth_write(priv->dma_ctrl, dma_ctrl);
-+ priv->dma_ctrl |= METH_DMA_TX_EN | METH_DMA_RX_EN | METH_DMA_RX_INT_EN;
-+ mace->eth.dma_ctrl = priv->dma_ctrl;
-
- /* Enable interrupt */
-- spin_unlock_irqrestore(&priv->meth_lock,flags);
-+ spin_unlock_irqrestore(&priv->meth_lock, flags);
-
- dev->trans_start = jiffies;
- netif_wake_queue(dev);
-@@ -760,8 +765,14 @@ static void meth_tx_timeout(struct net_d
- */
- static int meth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
- {
-- DPRINTK("ioctl\n");
-- return 0;
-+ /* XXX Not yet implemented */
-+ switch(cmd) {
-+ case SIOCGMIIPHY:
-+ case SIOCGMIIREG:
-+ case SIOCSMIIREG:
-+ default:
-+ return -EOPNOTSUPP;
-+ }
- }
-
- /*
-@@ -808,7 +819,7 @@ static struct net_device *meth_init(void
- }
-
- printk(KERN_INFO "%s: SGI MACE Ethernet rev. %d\n",
-- dev->name, (unsigned int)mace_eth_read(mac_ctrl) >> 29);
-+ dev->name, (unsigned int)(mace->eth.mac_ctrl >> 29));
- return 0;
- }
-
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/00list
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/00list 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/00list 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,13 +1,12 @@
00_linux-mips.dpatch
10_arch-makefile.dpatch
11_byteorder-proc.dpatch
-20_addrspace-64bit.dpatch
-21_nptl.dpatch
+12_makefile.dpatch
+20_ioc3.dpatch
+21_ip30.dpatch
30_ip22-eisa-update.dpatch
40_ip27-horribles.dpatch
51_iomap.dpatch
52_ip22-sercon.dpatch
-53_ip22-zilogtimeout.dpatch
54_ip32-eth0.dpatch
55_o32-kcore.dpatch
-56_p2-matrox.dpatch
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/10_arch-makefile.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/10_arch-makefile.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/10_arch-makefile.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -29,15 +29,6 @@
diff -u -p -r1.186 Makefile
--- arch/mips/Makefile 18 Dec 2004 01:15:52 -0000 1.186
+++ arch/mips/Makefile 10 Jan 2005 22:10:32 -0000
-@@ -16,7 +16,7 @@ as-option = $(shell if $(CC) $(CFLAGS) $
- -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
- else echo "$(2)"; fi ;)
-
--cflags-y :=
-+cflags-y := -ffreestanding
-
- #
- # Select the object file format to substitute into the linker script.
@@ -56,7 +56,7 @@ ifdef CONFIG_BUILD_ELF64
gas-abi = 64
ld-emul = $(64bit-emul)
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/12_makefile.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/12_makefile.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/12_makefile.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,36 @@
+#! /bin/sh -e
+## 12_makefile.dpatch by Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Fix Makefile for compiles with modern toolchains.
+
+if [ $# -lt 1 ]; then
+ echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
+ exit 1
+fi
+
+[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
+patch_opts="${patch_opts:--f --no-backup-if-mismatch} ${2:+-d $2}"
+
+case "$1" in
+ -patch) patch -p1 ${patch_opts} < $0;;
+ -unpatch) patch -R -p1 ${patch_opts} < $0;;
+ *)
+ echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
+ exit 1;;
+esac
+
+exit 0
+
+--- linux-2.6.12/Makefile 2005-06-17 21:48:29.000000000 +0200
++++ linux_HEAD/Makefile 2005-07-11 10:20:48.000000000 +0200
+@@ -169,7 +169,8 @@ KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$
+
+ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
+ -e s/arm.*/arm/ -e s/sa110/arm/ \
+- -e s/s390x/s390/ -e s/parisc64/parisc/ )
++ -e s/s390x/s390/ -e s/parisc64/parisc/ \
++ -e s/mips.*/mips/ )
+
+ # Cross compiling and selecting different set of gcc/bin-utils
+ # ---------------------------------------------------------------------------
Property changes on: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/12_makefile.dpatch
___________________________________________________________________
Name: svn:executable
+ *
Deleted: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/20_addrspace-64bit.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/20_addrspace-64bit.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/20_addrspace-64bit.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,139 +0,0 @@
-#! /bin/sh -e
-## 20_addrspace-64bit.dpatch by Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: 64bit address space fixes
-
-if [ $# -lt 1 ]; then
- echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch} ${2:+-d $2}"
-
-case "$1" in
- -patch) patch -p0 ${patch_opts} < $0;;
- -unpatch) patch -R -p0 ${patch_opts} < $0;;
- *)
- echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
- exit 1;;
-esac
-
-exit 0
-
-Index: arch/mips/mm/sc-rm7k.c
-===================================================================
-RCS file: /home/cvs/linux/arch/mips/mm/sc-rm7k.c,v
-retrieving revision 1.7
-diff -u -p -r1.7 sc-rm7k.c
---- arch/mips/mm/sc-rm7k.c 15 Dec 2004 20:39:23 -0000 1.7
-+++ arch/mips/mm/sc-rm7k.c 10 Jan 2005 22:10:33 -0000
-@@ -127,13 +127,13 @@ static __init void __rm7k_sc_enable(void
- ".set mips0\n\t"
- ".set reorder"
- :
-- : "r" (KSEG0ADDR(i)), "i" (Index_Store_Tag_SD));
-+ : "r" (CKSEG0ADDR(i)), "i" (Index_Store_Tag_SD));
- }
- }
-
- static __init void rm7k_sc_enable(void)
- {
-- void (*func)(void) = (void *) KSEG1ADDR(&__rm7k_sc_enable);
-+ void (*func)(void) = (void *) CKSEG1ADDR(&__rm7k_sc_enable);
-
- if (read_c0_config() & 0x08) /* CONF_SE */
- return;
-Index: drivers/media/video/swarm_saa7114h.c
-===================================================================
-RCS file: /home/cvs/linux/drivers/media/video/swarm_saa7114h.c,v
-retrieving revision 1.4
-diff -u -p -r1.4 swarm_saa7114h.c
---- drivers/media/video/swarm_saa7114h.c 26 Oct 2004 02:20:47 -0000 1.4
-+++ drivers/media/video/swarm_saa7114h.c 10 Jan 2005 22:10:34 -0000
-@@ -51,7 +51,6 @@
- #include <linux/sched.h>
- #include <asm/segment.h>
- #include <linux/types.h>
--#include <linux/wrapper.h>
- #include <linux/smp_lock.h>
- #include <asm/hardirq.h>
-
-@@ -102,8 +101,8 @@
-
- #define IF_NAME "saa7114h"
-
--#define MAC2_CSR(r) (KSEG1 + A_MAC_REGISTER(2, r))
--#define MAC2_DMARX0_CSR(r) (KSEG1 + A_MAC_DMA_REGISTER(2, DMA_RX, 0, r))
-+#define MAC2_CSR(r) (CKSEG1 + A_MAC_REGISTER(2, r))
-+#define MAC2_DMARX0_CSR(r) (CKSEG1 + A_MAC_DMA_REGISTER(2, DMA_RX, 0, r))
-
- /* Options */
- #define DMA_DEINTERLACE 1
-@@ -1614,9 +1613,9 @@ static int saa7114h_attach(struct i2c_ad
- decoder->vd = vd;
-
- /* Turn on the ITRDY - preserve the GENO pin for syncser */
-- val = __raw_readq(KSEG1 + A_MAC_REGISTER(2, R_MAC_MDIO));
-+ val = __raw_readq(CKSEG1 + A_MAC_REGISTER(2, R_MAC_MDIO));
- __raw_writeq(M_MAC_MDIO_OUT | (val & M_MAC_GENC),
-- KSEG1 + A_MAC_REGISTER(2, R_MAC_MDIO));
-+ CKSEG1 + A_MAC_REGISTER(2, R_MAC_MDIO));
-
- if ((err = dma_setup(decoder))) {
- i2c_detach_client(client);
---- drivers/net/sgiseeq.c.orig 2005-04-05 08:09:21.000000000 +0200
-+++ drivers/net/sgiseeq.c 2005-04-05 08:10:28.000000000 +0200
-@@ -175,7 +175,7 @@ static int seeq_init_ring(struct net_dev
- buffer = (unsigned long) kmalloc(PKT_BUF_SZ, GFP_KERNEL);
- if (!buffer)
- return -ENOMEM;
-- sp->tx_desc[i].buf_vaddr = KSEG1ADDR(buffer);
-+ sp->tx_desc[i].buf_vaddr = CKSEG1ADDR(buffer);
- sp->tx_desc[i].tdma.pbuf = CPHYSADDR(buffer);
- }
- sp->tx_desc[i].tdma.cntinfo = TCNTINFO_INIT;
-@@ -189,7 +189,7 @@ static int seeq_init_ring(struct net_dev
- buffer = (unsigned long) kmalloc(PKT_BUF_SZ, GFP_KERNEL);
- if (!buffer)
- return -ENOMEM;
-- sp->rx_desc[i].buf_vaddr = KSEG1ADDR(buffer);
-+ sp->rx_desc[i].buf_vaddr = CKSEG1ADDR(buffer);
- sp->rx_desc[i].rdma.pbuf = CPHYSADDR(buffer);
- }
- sp->rx_desc[i].rdma.cntinfo = RCNTINFO_INIT;
-@@ -373,7 +373,7 @@ static inline void kick_tx(struct sgisee
- */
- while ((td->tdma.cntinfo & (HPCDMA_XIU | HPCDMA_ETXD)) ==
- (HPCDMA_XIU | HPCDMA_ETXD))
-- td = (struct sgiseeq_tx_desc *)(long) KSEG1ADDR(td->tdma.pnext);
-+ td = (struct sgiseeq_tx_desc *)(long) CKSEG1ADDR(td->tdma.pnext);
- if (td->tdma.cntinfo & HPCDMA_XIU) {
- hregs->tx_ndptr = CPHYSADDR(td);
- hregs->tx_ctrl = HPC3_ETXCTRL_ACTIVE;
-@@ -653,11 +653,11 @@ static int sgiseeq_init(struct hpc3_regs
- sp->name = sgiseeqstr;
-
- sp->rx_desc = (struct sgiseeq_rx_desc *)
-- KSEG1ADDR(ALIGNED(&sp->srings->rxvector[0]));
-+ CKSEG1ADDR(ALIGNED(&sp->srings->rxvector[0]));
- dma_cache_wback_inv((unsigned long)&sp->srings->rxvector,
- sizeof(sp->srings->rxvector));
- sp->tx_desc = (struct sgiseeq_tx_desc *)
-- KSEG1ADDR(ALIGNED(&sp->srings->txvector[0]));
-+ CKSEG1ADDR(ALIGNED(&sp->srings->txvector[0]));
- dma_cache_wback_inv((unsigned long)&sp->srings->txvector,
- sizeof(sp->srings->txvector));
-
---- drivers/net/sb1250-mac.c.orig 2005-04-05 08:09:31.000000000 +0200
-+++ drivers/net/sb1250-mac.c 2005-04-05 08:10:13.000000000 +0200
-@@ -2879,7 +2879,7 @@ sbmac_init_module(void)
- dev->mem_end = 0;
- if (sbmac_init(dev, idx)) {
- port = A_MAC_CHANNEL_BASE(idx);
-- SBMAC_WRITECSR(KSEG1ADDR(port+R_MAC_ETHERNET_ADDR),
-+ SBMAC_WRITECSR(IOADDR(port+R_MAC_ETHERNET_ADDR),
- sbmac_orig_hwaddr[idx] );
- free_netdev(dev);
- continue;
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/20_ioc3.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/20_ioc3.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/20_ioc3.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,2092 @@
+#! /bin/sh -e
+## 20_ioc3.dpatch by Stanislaw Skowronek <skylark at linux-mips.org>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Improved ioc3 driver, from
+## DP: ftp://ftp.linux-mips.org/pub/linux/mips/people/skylark/linux-mips-2.6.12-ioc3-r23.patch.bz2
+
+if [ $# -lt 1 ]; then
+ echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
+ exit 1
+fi
+
+[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
+patch_opts="${patch_opts:--f --no-backup-if-mismatch} ${2:+-d $2}"
+
+case "$1" in
+ -patch) patch -p1 ${patch_opts} < $0;;
+ -unpatch) patch -R -p1 ${patch_opts} < $0;;
+ *)
+ echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
+ exit 1;;
+esac
+
+exit 0
+
+diff -urN linux-2.6.12/arch/mips/Kconfig linux-2.6.12-ioc3/arch/mips/Kconfig
+--- linux-2.6.12/arch/mips/Kconfig 2005-07-08 13:12:04.000000000 +0200
++++ linux-2.6.12-ioc3/arch/mips/Kconfig 2005-07-09 13:35:08.000000000 +0200
+@@ -1309,6 +1309,14 @@
+
+ source "drivers/pci/Kconfig"
+
++config SGI_IOC3
++ bool "SGI IOC3 Master Driver"
++ depends on PCI
++ help
++ If you have a Silicon Graphics Origin or Octane, say Y.
++ This driver provides base for IOC3 feature drivers, such as
++ Ethernet, keyboard, mouse, serial ports, LEDs and RTC.
++
+ #
+ # ISA support is now enabled via select. Too many systems still have the one
+ # or other ISA chip on the board that users don't know about so don't expect
+diff -urN linux-2.6.12/arch/mips/pci/Makefile linux-2.6.12-ioc3/arch/mips/pci/Makefile
+--- linux-2.6.12/arch/mips/pci/Makefile 2004-12-18 03:23:50.000000000 +0100
++++ linux-2.6.12-ioc3/arch/mips/pci/Makefile 2005-07-09 13:35:08.000000000 +0200
+@@ -52,3 +52,5 @@
+ obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o
+ obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
+ obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
++
++obj-$(CONFIG_SGI_IOC3) += ioc3.o
+diff -urN linux-2.6.12/arch/mips/pci/ioc3.c linux-2.6.12-ioc3/arch/mips/pci/ioc3.c
+--- linux-2.6.12/arch/mips/pci/ioc3.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ioc3/arch/mips/pci/ioc3.c 2005-07-11 07:32:52.000000000 +0200
+@@ -0,0 +1,801 @@
++/*
++ * SGI IOC3 master driver and IRQ demuxer
++ *
++ * Copyright (c) 2005 Stanislaw Skowronek <skylark at linux-mips.org>
++ * Heavily based on similar work by:
++ * Brent Casavant <bcasavan at sgi.com> - IOC4 master driver
++ * Pat Gefre <pfg at sgi.com> - IOC3 serial port IRQ demuxer
++ */
++
++#include <linux/config.h>
++#include <linux/errno.h>
++#include <linux/module.h>
++#include <linux/pci.h>
++#include <linux/interrupt.h>
++#include <linux/spinlock.h>
++#include <linux/delay.h>
++
++#include <linux/ioc3.h>
++
++#define IOC3_PCI_SIZE 0x100000
++
++static LIST_HEAD(ioc3_devices);
++static int ioc3_counter;
++static DECLARE_RWSEM(ioc3_devices_rwsem);
++
++static struct ioc3_submodule *ioc3_submodules[IOC3_MAX_SUBMODULES];
++static struct ioc3_submodule *ioc3_ethernet;
++static DEFINE_RWLOCK(ioc3_submodules_lock);
++
++/* NIC probing code */
++
++static inline unsigned mcr_pack(unsigned pulse, unsigned sample)
++{
++ return (pulse << 10) | (sample << 2);
++}
++
++static int nic_wait(struct ioc3_driver_data *idd)
++{
++ unsigned mcr;
++
++ do {
++ mcr = idd->vma->mcr;
++ } while (!(mcr & 2));
++
++ return mcr & 1;
++}
++
++static int nic_reset(struct ioc3_driver_data *idd)
++{
++ int presence;
++ unsigned long flags;
++
++ local_irq_save(flags);
++ idd->vma->mcr = mcr_pack(500, 65);
++ presence = nic_wait(idd);
++ local_irq_restore(flags);
++
++ udelay(500);
++
++ return presence;
++}
++
++static inline int nic_read_bit(struct ioc3_driver_data *idd)
++{
++ int result;
++ unsigned long flags;
++
++ local_irq_save(flags);
++ idd->vma->mcr = mcr_pack(6, 13);
++ result = nic_wait(idd);
++ local_irq_restore(flags);
++
++ udelay(500);
++
++ return result;
++}
++
++static inline void nic_write_bit(struct ioc3_driver_data *idd, int bit)
++{
++ if (bit)
++ idd->vma->mcr = mcr_pack(6, 110);
++ else
++ idd->vma->mcr = mcr_pack(80, 30);
++
++ nic_wait(idd);
++}
++
++static unsigned nic_read_byte(struct ioc3_driver_data *idd)
++{
++ unsigned result = 0;
++ int i;
++
++ for (i = 0; i < 8; i++)
++ result = (result >> 1) | (nic_read_bit(idd) << 7);
++
++ return result;
++}
++
++static void nic_write_byte(struct ioc3_driver_data *idd, int byte)
++{
++ int i, bit;
++
++ for (i = 8; i; i--) {
++ bit = byte & 1;
++ byte >>= 1;
++
++ nic_write_bit(idd, bit);
++ }
++}
++
++static unsigned long nic_find(struct ioc3_driver_data *idd, int *last, unsigned long addr)
++{
++ int a, b, index, disc;
++
++ nic_reset(idd);
++
++ /* Search ROM. */
++ nic_write_byte(idd, 0xF0);
++
++ /* Algorithm from ``Book of iButton Standards''. */
++ for (index = 0, disc = 0; index < 64; index++) {
++ a = nic_read_bit(idd);
++ b = nic_read_bit(idd);
++
++ if (a && b) {
++ printk(KERN_WARNING "IOC3 NIC search failed.\n");
++ *last = 0;
++ return 0;
++ }
++
++ if (!a && !b) {
++ if (index == *last) {
++ addr |= 1UL << index;
++ } else if (index > *last) {
++ addr &= ~(1UL << index);
++ disc = index;
++ } else if ((addr & (1UL << index)) == 0)
++ disc = index;
++ nic_write_bit(idd, (addr>>index)&1);
++ continue;
++ } else {
++ if (a)
++ addr |= 1UL << index;
++ else
++ addr &= ~(1UL << index);
++ nic_write_bit(idd, a);
++ continue;
++ }
++ }
++
++ *last = disc;
++
++ return addr;
++}
++
++static void nic_addr(struct ioc3_driver_data *idd, unsigned long addr)
++{
++ int index;
++
++ nic_reset(idd);
++ nic_write_byte(idd, 0xF0);
++ for (index = 0; index < 64; index++) {
++ nic_read_bit(idd);
++ nic_read_bit(idd);
++ nic_write_bit(idd, (addr>>index)&1);
++ }
++}
++
++static void crc16_byte(unsigned int *crc, unsigned char db)
++{
++ int i;
++ for(i=0;i<8;i++) {
++ *crc <<= 1;
++ if((db^(*crc>>16)) & 1)
++ *crc ^= 0x8005;
++ db >>= 1;
++ }
++ *crc &= 0xFFFF;
++}
++
++static unsigned int crc16_area(unsigned char *dbs, int size, unsigned int crc)
++{
++ while(size--)
++ crc16_byte(&crc, *(dbs++));
++ return crc;
++}
++
++static void crc8_byte(unsigned int *crc, unsigned char db)
++{
++ int i,f;
++ for(i=0;i<8;i++) {
++ f = (*crc ^ db) & 1;
++ *crc >>= 1;
++ db >>= 1;
++ if(f)
++ *crc ^= 0x8c;
++ }
++ *crc &= 0xff;
++}
++
++static unsigned int crc8_addr(unsigned long addr)
++{
++ int i;
++ unsigned int crc = 0x00;
++ for(i=0;i<8;i++)
++ crc8_byte(&crc, addr>>(i<<3));
++ return crc;
++}
++
++static void read_redir_page(struct ioc3_driver_data *idd, unsigned long addr, int page, unsigned char *redir, unsigned char *data)
++{
++ int loops = 16, i;
++ while(redir[page] != 0xFF) {
++ page = redir[page]^0xFF;
++ loops--;
++ if(loops<0) {
++ printk(KERN_ERR "IOC3: NIC circular redirection\n");
++ return;
++ }
++ }
++ loops = 3;
++ while(loops>0) {
++ nic_addr(idd, addr);
++ nic_write_byte(idd, 0xF0);
++ nic_write_byte(idd, (page << 5) & 0xE0);
++ nic_write_byte(idd, (page >> 3) & 0x1F);
++ for(i=0;i<0x20;i++)
++ data[i] = nic_read_byte(idd);
++ if(crc16_area(data, 0x20, 0x0000) == 0x800d)
++ return;
++ loops--;
++ }
++ printk(KERN_ERR "IOC3: CRC error in data page\n");
++ for(i=0;i<0x20;i++)
++ data[i] = 0x00;
++}
++
++static void read_redir_map(struct ioc3_driver_data *idd, unsigned long addr, unsigned char *redir)
++{
++ int i,j,loops = 3,crc_ok;
++ unsigned int crc;
++ while(loops>0) {
++ crc_ok = 1;
++ nic_addr(idd, addr);
++ nic_write_byte(idd, 0xAA);
++ nic_write_byte(idd, 0x00);
++ nic_write_byte(idd, 0x01);
++ for(i=0;i<64;i+=8) {
++ for(j=0;j<8;j++)
++ redir[i+j] = nic_read_byte(idd);
++ crc = crc16_area(redir+i, 8, (i==0)?0x8707:0x0000);
++ crc16_byte(&crc, nic_read_byte(idd));
++ crc16_byte(&crc, nic_read_byte(idd));
++ if(crc != 0x800d)
++ crc_ok = 0;
++ }
++ if(crc_ok)
++ return;
++ loops--;
++ }
++ printk(KERN_ERR "IOC3: CRC error in redirection page\n");
++ for(i=0;i<64;i++)
++ redir[i] = 0xFF;
++}
++
++static void read_nic(struct ioc3_driver_data *idd, unsigned long addr)
++{
++ unsigned char redir[64];
++ unsigned char data[64],part[32];
++ int i,j;
++ /* read redirections */
++ read_redir_map(idd, addr, redir);
++ /* read data pages */
++ read_redir_page(idd, addr, 0, redir, data);
++ read_redir_page(idd, addr, 1, redir, data+32);
++ /* assemble the part # */
++ j=0;
++ for(i=0;i<19;i++)
++ if(data[i+11] != ' ')
++ part[j++] = data[i+11];
++ for(i=0;i<6;i++)
++ if(data[i+32] != ' ')
++ part[j++] = data[i+32];
++ part[j] = 0;
++ /* skip Octane power supplies */
++ if(!strncmp(part, "060-0035-", 9))
++ return;
++ if(!strncmp(part, "060-0038-", 9))
++ return;
++ strcpy(idd->nic_part, part);
++ /* assemble the serial # */
++ j=0;
++ for(i=0;i<10;i++)
++ if(data[i+1] != ' ')
++ idd->nic_serial[j++] = data[i+1];
++ idd->nic_serial[j] = 0;
++}
++
++static void read_mac(struct ioc3_driver_data *idd, unsigned long addr)
++{
++ int i, loops = 3;
++ unsigned char data[13];
++ while(loops>0) {
++ nic_addr(idd, addr);
++ nic_write_byte(idd, 0xF0);
++ nic_write_byte(idd, 0x00);
++ nic_write_byte(idd, 0x00);
++ nic_read_byte(idd);
++ for(i=0;i<13;i++)
++ data[i] = nic_read_byte(idd);
++ if(crc16_area(data, 13, 0x0000) == 0x800d) {
++ for(i=10;i>4;i--)
++ idd->nic_mac[10-i] = data[i];
++ return;
++ }
++ loops--;
++ }
++ printk(KERN_ERR "IOC3: CRC error in MAC address\n");
++ for(i=0;i<6;i++)
++ idd->nic_mac[i] = 0x00;
++}
++
++static void probe_nic(struct ioc3_driver_data *idd)
++{
++ int save = 0, loops = 3;
++ unsigned long first, addr;
++ idd->vma->gpcr_s = GPCR_MLAN_EN;
++ while(loops>0) {
++ idd->nic_part[0] = 0;
++ idd->nic_serial[0] = 0;
++ addr = first = nic_find(idd, &save, 0);
++ if(!first)
++ return;
++ while(1) {
++ if(crc8_addr(addr))
++ break;
++ else {
++ switch(addr & 0xFF) {
++ case 0x0B:
++ read_nic(idd, addr);
++ break;
++ case 0x09:
++ case 0x89:
++ case 0x91:
++ read_mac(idd, addr);
++ break;
++ }
++ }
++ addr = nic_find(idd, &save, addr);
++ if(addr == first)
++ return;
++ }
++ loops--;
++ }
++ printk(KERN_ERR "IOC3: CRC error in NIC address\n");
++}
++
++/* Interrupts */
++
++#define IOC3_W_IES 0
++#define IOC3_W_IEC 1
++static inline void write_ireg(struct ioc3_driver_data *idd, uint32_t val, int which)
++{
++ unsigned long flags;
++
++ spin_lock_irqsave(&idd->ir_lock, flags);
++ switch (which) {
++ case IOC3_W_IES:
++ writel(val, &idd->vma->sio_ies);
++ break;
++ case IOC3_W_IEC:
++ writel(val, &idd->vma->sio_iec);
++ break;
++ }
++ spin_unlock_irqrestore(&idd->ir_lock, flags);
++}
++static inline uint32_t get_pending_intrs(struct ioc3_driver_data *idd)
++{
++ unsigned long flag;
++ uint32_t intrs = 0;
++
++ spin_lock_irqsave(&idd->ir_lock, flag);
++ intrs = readl(&idd->vma->sio_ir);
++ intrs &= readl(&idd->vma->sio_ies);
++ spin_unlock_irqrestore(&idd->ir_lock, flag);
++ return intrs;
++}
++
++static irqreturn_t ioc3_intr_io(int irq, void *arg, struct pt_regs *regs)
++{
++ unsigned long flags;
++ struct ioc3_driver_data *idd = (struct ioc3_driver_data *)arg;
++ int handled = 1, id;
++ unsigned int pending;
++
++ read_lock_irqsave(&ioc3_submodules_lock, flags);
++ if(!idd->dual_irq && idd->vma->eisr) /* send Ethernet IRQ to the driver */
++ if(ioc3_ethernet && idd->active[ioc3_ethernet->id] && ioc3_ethernet->intr)
++ handled = handled && !ioc3_ethernet->intr(ioc3_ethernet, idd, 0, regs);
++ pending = get_pending_intrs(idd); /* look at the IO IRQs */
++ for(id=0;id<IOC3_MAX_SUBMODULES;id++)
++ if(idd->active[id] && ioc3_submodules[id] && (pending & ioc3_submodules[id]->irq_mask) && ioc3_submodules[id]->intr) {
++ write_ireg(idd, ioc3_submodules[id]->irq_mask, IOC3_W_IEC);
++ if(!ioc3_submodules[id]->intr(ioc3_submodules[id], idd, pending & ioc3_submodules[id]->irq_mask, regs))
++ pending &=~ ioc3_submodules[id]->irq_mask;
++ write_ireg(idd, ioc3_submodules[id]->irq_mask, IOC3_W_IES);
++ }
++ read_unlock_irqrestore(&ioc3_submodules_lock, flags);
++ if(pending) {
++ printk(KERN_WARNING "IOC3: Pending IRQs 0x%08x discarded and disabled\n",pending);
++ write_ireg(idd, pending, IOC3_W_IEC);
++ handled = 1;
++ }
++ return handled?IRQ_HANDLED:IRQ_NONE;
++}
++
++static irqreturn_t ioc3_intr_eth(int irq, void *arg, struct pt_regs *regs)
++{
++ unsigned long flags;
++ struct ioc3_driver_data *idd = (struct ioc3_driver_data *)arg;
++ int handled = 1;
++
++ if(!idd->dual_irq)
++ return IRQ_NONE;
++ read_lock_irqsave(&ioc3_submodules_lock, flags);
++ if(ioc3_ethernet && idd->active[ioc3_ethernet->id] && ioc3_ethernet->intr)
++ handled = handled && !ioc3_ethernet->intr(ioc3_ethernet, idd, 0, regs);
++ read_unlock_irqrestore(&ioc3_submodules_lock, flags);
++ return handled?IRQ_HANDLED:IRQ_NONE;
++}
++
++void ioc3_enable(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ write_ireg(idd, is->irq_mask, IOC3_W_IES);
++}
++
++void ioc3_ack(struct ioc3_submodule *is, struct ioc3_driver_data *idd, unsigned int irqs)
++{
++ writel(irqs & is->irq_mask, &idd->vma->sio_ir);
++}
++
++void ioc3_disable(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ write_ireg(idd, is->irq_mask, IOC3_W_IEC);
++}
++
++void ioc3_gpio(struct ioc3_driver_data *idd, unsigned int mask, unsigned int val)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&idd->gpio_lock, flags);
++ idd->gpdr_shadow &= ~mask;
++ idd->gpdr_shadow |= val&mask;
++ idd->vma->gpdr = idd->gpdr_shadow;
++ spin_unlock_irqrestore(&idd->gpio_lock, flags);
++}
++
++/* Keep it simple, stupid! */
++static int find_slot(void **tab, int max)
++{
++ int i;
++ for(i=0;i<max;i++)
++ if(!(tab[i]))
++ return i;
++ return -1;
++}
++
++/* Register an IOC3 submodule */
++int ioc3_register_submodule(struct ioc3_submodule *is)
++{
++ struct ioc3_driver_data *idd;
++ int alloc_id;
++ unsigned long flags;
++
++ write_lock_irqsave(&ioc3_submodules_lock, flags);
++ alloc_id = find_slot((void **)ioc3_submodules, IOC3_MAX_SUBMODULES);
++ if(alloc_id != -1) {
++ ioc3_submodules[alloc_id] = is;
++ if(is->ethernet) {
++ if(ioc3_ethernet==NULL)
++ ioc3_ethernet=is;
++ else
++ printk(KERN_WARNING "IOC3 Ethernet module already registered!\n");
++ }
++ }
++ write_unlock_irqrestore(&ioc3_submodules_lock, flags);
++
++ if(alloc_id == -1) {
++ printk(KERN_WARNING "Increase IOC3_MAX_SUBMODULES!\n");
++ return -ENOMEM;
++ }
++
++ is->id=alloc_id;
++
++ /* Initialize submodule for each IOC3 */
++ if (!is->probe)
++ return 0;
++
++ down_read(&ioc3_devices_rwsem);
++ list_for_each_entry(idd, &ioc3_devices, list) {
++ /* set to 1 for IRQs in probe */
++ idd->active[alloc_id] = 1;
++ idd->active[alloc_id] = !is->probe(is, idd);
++ }
++ up_read(&ioc3_devices_rwsem);
++
++ return 0;
++}
++
++/* Unregister an IOC3 submodule */
++void ioc3_unregister_submodule(struct ioc3_submodule *is)
++{
++ struct ioc3_driver_data *idd;
++ unsigned long flags;
++
++ write_lock_irqsave(&ioc3_submodules_lock, flags);
++ if(ioc3_submodules[is->id]==is)
++ ioc3_submodules[is->id]=NULL;
++ else
++ printk(KERN_WARNING "IOC3 submodule %s has wrong ID.\n",is->name);
++ if(ioc3_ethernet==is)
++ ioc3_ethernet = NULL;
++ write_unlock_irqrestore(&ioc3_submodules_lock, flags);
++
++ /* Remove submodule for each IOC3 */
++ down_read(&ioc3_devices_rwsem);
++ list_for_each_entry(idd, &ioc3_devices, list)
++ if(idd->active[is->id]) {
++ if(is->remove)
++ if(is->remove(is, idd))
++ printk(KERN_WARNING
++ "%s: IOC3 submodule %s remove failed "
++ "for pci_dev %s.\n",
++ __FUNCTION__, module_name(is->owner),
++ pci_name(idd->pdev));
++ idd->active[is->id] = 0;
++ if(is->irq_mask)
++ write_ireg(idd, is->irq_mask, IOC3_W_IEC);
++ }
++ up_read(&ioc3_devices_rwsem);
++}
++
++/*********************
++ * Device management *
++ *********************/
++
++static char *ioc3_class_names[]={"unknown", "IP27 BaseIO", "IP30 system", "MENET 1/2/3", "MENET 4", "CADduo", "Altix Serial"};
++
++static int ioc3_class(struct ioc3_driver_data *idd)
++{
++ int res = IOC3_CLASS_NONE;
++ /* NIC-based logic */
++ if(!strncmp(idd->nic_part, "030-0891-", 9))
++ res = IOC3_CLASS_BASE_IP30;
++ if(!strncmp(idd->nic_part, "030-1155-", 9))
++ res = IOC3_CLASS_CADDUO;
++ if(!strncmp(idd->nic_part, "030-1657-", 9))
++ res = IOC3_CLASS_SERIAL;
++ if(!strncmp(idd->nic_part, "030-1664-", 9))
++ res = IOC3_CLASS_SERIAL;
++ /* total random heuristics */
++#ifdef CONFIG_SGI_IP27
++ if(!idd->nic_part[0])
++ res = IOC3_CLASS_BASE_IP27;
++#endif
++ /* print educational message */
++ printk(KERN_INFO "IOC3 part: [%s], serial: [%s] => class %s\n", idd->nic_part, idd->nic_serial, ioc3_class_names[res]);
++ return res;
++}
++
++/* Adds a new instance of an IOC3 card */
++static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
++{
++ struct ioc3_driver_data *idd;
++ uint32_t pcmd;
++ int ret, id;
++
++ /* Enable IOC3 and take ownership of it */
++ if ((ret = pci_enable_device(pdev))) {
++ printk(KERN_WARNING
++ "%s: Failed to enable IOC3 device for pci_dev %s.\n",
++ __FUNCTION__, pci_name(pdev));
++ goto out;
++ }
++ pci_set_master(pdev);
++
++ ret = pci_set_dma_mask(pdev, 0xffffffffffffffffULL);
++ if (!ret) {
++ ret = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
++ if (ret < 0) {
++ printk(KERN_WARNING "%s: Unable to obtain 64 bit DMA "
++ "for consistent allocations\n",
++ __FUNCTION__);
++ }
++ }
++
++ /* Set up per-IOC3 data */
++ idd = kmalloc(sizeof(struct ioc3_driver_data), GFP_KERNEL);
++ if (!idd) {
++ printk(KERN_WARNING
++ "%s: Failed to allocate IOC3 data for pci_dev %s.\n",
++ __FUNCTION__, pci_name(pdev));
++ ret = -ENODEV;
++ goto out_idd;
++ }
++ memset(idd, 0, sizeof(struct ioc3_driver_data));
++ spin_lock_init(&idd->ir_lock);
++ spin_lock_init(&idd->gpio_lock);
++ idd->pdev = pdev;
++
++ /* Map all IOC3 registers. These are shared between subdevices
++ * so the main IOC3 module manages them.
++ */
++ idd->pma = pci_resource_start(pdev, 0);
++ if (!idd->pma) {
++ printk(KERN_WARNING
++ "%s: Unable to find IOC3 resource "
++ "for pci_dev %s.\n",
++ __FUNCTION__, pci_name(pdev));
++ ret = -ENODEV;
++ goto out_pci;
++ }
++ if (!request_region(idd->pma, IOC3_PCI_SIZE, "ioc3")) {
++ printk(KERN_WARNING
++ "%s: Unable to request IOC3 region "
++ "for pci_dev %s.\n",
++ __FUNCTION__, pci_name(pdev));
++ ret = -ENODEV;
++ goto out_pci;
++ }
++ idd->vma = ioremap(idd->pma, IOC3_PCI_SIZE);
++ if (!idd->vma) {
++ printk(KERN_WARNING
++ "%s: Unable to remap IOC3 region "
++ "for pci_dev %s.\n",
++ __FUNCTION__, pci_name(pdev));
++ ret = -ENODEV;
++ goto out_misc_region;
++ }
++
++ /* Track PCI-device specific data */
++ pci_set_drvdata(pdev, idd);
++ down_write(&ioc3_devices_rwsem);
++ list_add(&idd->list, &ioc3_devices);
++ idd->id = ioc3_counter++;
++ up_write(&ioc3_devices_rwsem);
++
++ idd->gpdr_shadow = idd->vma->gpdr;
++
++ /* Read IOC3 NIC contents */
++ probe_nic(idd);
++
++ /* Detect IOC3 class */
++ idd->class = ioc3_class(idd);
++
++ /* Initialize IOC3 */
++ pci_read_config_dword(pdev, PCI_COMMAND, &pcmd);
++ pci_write_config_dword(pdev, PCI_COMMAND,
++ pcmd | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
++
++ write_ireg(idd, ~0, IOC3_W_IEC);
++ writel(~0, &idd->vma->sio_ir);
++
++ writel(0, &idd->vma->eier);
++ writel(~0, &idd->vma->eisr);
++
++ /* Set up IRQs */
++ if(idd->class == IOC3_CLASS_BASE_IP30 || idd->class == IOC3_CLASS_BASE_IP27) {
++ idd->dual_irq = 1;
++ if (!request_irq(pdev->irq, ioc3_intr_eth, SA_SHIRQ,
++ "ioc3-eth", (void *)idd)) {
++ idd->irq_eth = pdev->irq;
++ } else {
++ printk(KERN_WARNING
++ "%s : request_irq fails for IRQ 0x%x\n ",
++ __FUNCTION__, pdev->irq);
++ }
++ if (!request_irq(pdev->irq+2, ioc3_intr_io, SA_SHIRQ,
++ "ioc3-io", (void *)idd)) {
++ idd->irq_io = pdev->irq+2;
++ } else {
++ printk(KERN_WARNING
++ "%s : request_irq fails for IRQ 0x%x\n ",
++ __FUNCTION__, pdev->irq+2);
++ }
++ } else {
++ if (!request_irq(pdev->irq, ioc3_intr_io, SA_SHIRQ,
++ "ioc3", (void *)idd)) {
++ idd->irq_io = pdev->irq;
++ } else {
++ printk(KERN_WARNING
++ "%s : request_irq fails for IRQ 0x%x\n ",
++ __FUNCTION__, pdev->irq);
++ }
++ }
++
++ /* Add this IOC3 to all submodules */
++ read_lock(&ioc3_submodules_lock);
++ for(id=0;id<IOC3_MAX_SUBMODULES;id++)
++ if(ioc3_submodules[id] && ioc3_submodules[id]->probe) {
++ idd->active[id] = 1;
++ idd->active[id] = !ioc3_submodules[id]->probe(ioc3_submodules[id], idd);
++ }
++ read_unlock(&ioc3_submodules_lock);
++
++ printk(KERN_INFO "IOC3 Master Driver loaded for %s\n", pci_name(pdev));
++
++ return 0;
++
++out_misc_region:
++ release_region(idd->pma, IOC3_PCI_SIZE);
++out_pci:
++ kfree(idd);
++out_idd:
++ pci_disable_device(pdev);
++out:
++ return ret;
++}
++
++/* Removes a particular instance of an IOC3 card. */
++static void ioc3_remove(struct pci_dev *pdev)
++{
++ int id;
++ struct ioc3_driver_data *idd;
++
++ idd = pci_get_drvdata(pdev);
++
++ /* Remove this IOC3 from all submodules */
++ read_lock(&ioc3_submodules_lock);
++ for(id=0;id<IOC3_MAX_SUBMODULES;id++)
++ if(idd->active[id]) {
++ if(ioc3_submodules[id] && ioc3_submodules[id]->remove)
++ if(ioc3_submodules[id]->remove(ioc3_submodules[id], idd))
++ printk(KERN_WARNING
++ "%s: IOC3 submodule 0x%s remove failed "
++ "for pci_dev %s.\n",
++ __FUNCTION__, module_name(ioc3_submodules[id]->owner),
++ pci_name(pdev));
++ idd->active[id] = 0;
++ }
++ read_unlock(&ioc3_submodules_lock);
++
++ /* Clear and disable all IRQs */
++ write_ireg(idd, ~0, IOC3_W_IEC);
++ writel(~0, &idd->vma->sio_ir);
++
++ /* Release resources */
++ free_irq(idd->irq_io, (void *)idd);
++ if(idd->dual_irq)
++ free_irq(idd->irq_eth, (void *)idd);
++ iounmap(idd->vma);
++ release_region(idd->pma, IOC3_PCI_SIZE);
++
++ /* Disable IOC3 and relinquish */
++ pci_disable_device(pdev);
++
++ /* Remove and free driver data */
++ down_write(&ioc3_devices_rwsem);
++ list_del(&idd->list);
++ up_write(&ioc3_devices_rwsem);
++ kfree(idd);
++}
++
++static struct pci_device_id ioc3_id_table[] = {
++ {PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID},
++ {0}
++};
++
++static struct pci_driver __devinitdata ioc3_driver = {
++ .name = "IOC3",
++ .id_table = ioc3_id_table,
++ .probe = ioc3_probe,
++ .remove = ioc3_remove,
++};
++
++MODULE_DEVICE_TABLE(pci, ioc3_id_table);
++
++/*********************
++ * Module management *
++ *********************/
++
++/* Module load */
++static int __devinit ioc3_init(void)
++{
++ return pci_register_driver(&ioc3_driver);
++}
++
++/* Module unload */
++static void __devexit ioc3_exit(void)
++{
++ pci_unregister_driver(&ioc3_driver);
++}
++
++module_init(ioc3_init);
++module_exit(ioc3_exit);
++
++MODULE_AUTHOR("Stanislaw Skowronek <skylark at linux-mips.org>");
++MODULE_DESCRIPTION("PCI driver for SGI IOC3");
++MODULE_LICENSE("GPL");
++
++EXPORT_SYMBOL(ioc3_register_submodule);
++EXPORT_SYMBOL(ioc3_unregister_submodule);
+diff -urN linux-2.6.12/drivers/char/Kconfig linux-2.6.12-ioc3/drivers/char/Kconfig
+--- linux-2.6.12/drivers/char/Kconfig 2005-07-08 13:13:13.000000000 +0200
++++ linux-2.6.12-ioc3/drivers/char/Kconfig 2005-07-09 13:35:08.000000000 +0200
+@@ -390,6 +390,13 @@
+ Documentation on the Zilog 85C350 serial communications controller
+ is downloadable at <http://www.zilog.com/pdfs/serial/z85c30.pdf>.
+
++config SGI_IOC3_UART
++ bool "SGI IOC3 UART support"
++ depends on SGI_IOC3 && SERIAL_8250
++ help
++ Enable this if you have a SGI Origin or Octane machine. This module
++ provides serial port support for IOC3 chips on those systems.
++
+ config QTRONIX_KEYBOARD
+ bool "Enable Qtronix 990P Keyboard Support"
+ depends on MIPS && (MIPS_ITE8172 || MIPS_IVR)
+diff -urN linux-2.6.12/drivers/char/Makefile linux-2.6.12-ioc3/drivers/char/Makefile
+--- linux-2.6.12/drivers/char/Makefile 2005-07-08 13:13:13.000000000 +0200
++++ linux-2.6.12-ioc3/drivers/char/Makefile 2005-07-09 13:35:08.000000000 +0200
+@@ -64,6 +64,7 @@
+ obj-$(CONFIG_EFI_RTC) += efirtc.o
+ obj-$(CONFIG_SGI_DS1286) += ds1286.o
+ obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
++obj-$(CONFIG_SGI_IOC3_UART) += ioc3uart.o
+ obj-$(CONFIG_DS1302) += ds1302.o
+ obj-$(CONFIG_S3C2410_RTC) += s3c2410-rtc.o
+ ifeq ($(CONFIG_GENERIC_NVRAM),y)
+diff -urN linux-2.6.12/drivers/char/ioc3uart.c linux-2.6.12-ioc3/drivers/char/ioc3uart.c
+--- linux-2.6.12/drivers/char/ioc3uart.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ioc3/drivers/char/ioc3uart.c 2005-07-09 13:35:08.000000000 +0200
+@@ -0,0 +1,130 @@
++/*
++ * SGI IOC3 bridge for UARTs
++ *
++ * Copyright (C) 2005 Stanislaw Skowronek <skylark at linux-mips.org>
++ */
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/serio.h>
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++#include <linux/err.h>
++#include <linux/pci.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/system.h>
++#include <linux/ioc3.h>
++
++#include <linux/serial.h>
++#include <asm/serial.h>
++#define IOC3_BAUD (22000000 / (3*16))
++
++MODULE_AUTHOR("Stanislaw Skowronek <skylark at linux-mips.org>");
++MODULE_DESCRIPTION("SGI IOC3 UART driver");
++MODULE_LICENSE("GPL");
++
++/* !!! write dynirq support for IP27 !!! */
++#ifdef CONFIG_SGI_IP30
++int new_dynamic_irq(void);
++void call_dynamic_irq(int irq, struct pt_regs *regs);
++void delete_dynamic_irq(int irq);
++#else
++int new_dynamic_irq(void) { return 0; }
++void call_dynamic_irq(int irq, struct pt_regs *regs) { }
++void delete_dynamic_irq(int irq) { }
++#endif
++
++struct ioc3uart_data {
++ int line_a, line_b;
++ int irq;
++};
++
++static int ioc3uart_intr(struct ioc3_submodule *is, struct ioc3_driver_data *idd, unsigned int irq, struct pt_regs *regs)
++{
++ struct ioc3uart_data *d = (struct ioc3uart_data *)(idd->data[is->id]);
++
++ ioc3_ack(is, idd, irq);
++ call_dynamic_irq(d->irq, regs);
++
++ return 0;
++}
++
++static int ioc3uart_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ struct serial_struct req;
++ struct ioc3uart_data *d;
++ memset(&req, 0, sizeof(req));
++
++ /* check for UART-less add-on boards */
++ if(idd->class == IOC3_CLASS_MENET_4 || idd->class == IOC3_CLASS_CADDUO)
++ return 1;
++
++ /* set PIO mode for SuperIO UARTs */
++ idd->vma->sscr_a = 0;
++ idd->vma->sscr_b = 0;
++ udelay(1000);
++ idd->vma->sregs.uarta.iu_fcr = 0;
++ idd->vma->sregs.uartb.iu_fcr = 0;
++ udelay(1000);
++
++ d = kmalloc(sizeof(struct ioc3uart_data), GFP_KERNEL);
++ idd->data[is->id] = d;
++ d->irq = new_dynamic_irq();
++
++ /* register serial ports with 8250.c */
++ req.irq = d->irq;
++ req.flags = 0;
++ req.io_type = SERIAL_IO_IOC3;
++ req.iomem_reg_shift = 0;
++ req.baud_base = IOC3_BAUD;
++ req.iomem_base = (unsigned char *) &idd->vma->sregs.uarta;
++ req.iomap_base = ((unsigned long) req.iomem_base) & 0xFFFFFFFFFF;
++ d->line_a = register_serial(&req);
++
++ req.iomem_base = (unsigned char *) &idd->vma->sregs.uartb;
++ req.iomap_base = ((unsigned long) req.iomem_base) & 0xFFFFFFFFFF;
++ d->line_b = register_serial(&req);
++
++ ioc3_enable(is, idd);
++ return 0;
++}
++
++static int ioc3uart_remove(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ struct ioc3uart_data *d = (struct ioc3uart_data *)(idd->data[is->id]);
++ unregister_serial(d->line_a);
++ unregister_serial(d->line_b);
++ delete_dynamic_irq(d->irq);
++ kfree(d);
++ idd->data[is->id] = NULL;
++ return 0;
++}
++
++static struct ioc3_submodule ioc3uart_submodule = {
++ .name = "uart",
++ .probe = ioc3uart_probe,
++ .remove = ioc3uart_remove,
++ .irq_mask = SIO_IR_SA_INT | SIO_IR_SB_INT,
++ .intr = ioc3uart_intr,
++ .owner = THIS_MODULE,
++};
++
++static int __init ioc3uart_init(void)
++{
++ ioc3_register_submodule(&ioc3uart_submodule);
++ return 0;
++}
++
++static void __exit ioc3uart_exit(void)
++{
++ ioc3_unregister_submodule(&ioc3uart_submodule);
++}
++
++module_init(ioc3uart_init);
++module_exit(ioc3uart_exit);
+diff -urN linux-2.6.12/drivers/input/serio/Kconfig linux-2.6.12-ioc3/drivers/input/serio/Kconfig
+--- linux-2.6.12/drivers/input/serio/Kconfig 2005-03-18 21:40:38.000000000 +0100
++++ linux-2.6.12-ioc3/drivers/input/serio/Kconfig 2005-07-09 13:35:08.000000000 +0200
+@@ -18,6 +18,13 @@
+
+ if SERIO
+
++config SERIO_SGI_IOC3
++ tristate "SGI IOC3 keyboard controller"
++ default y
++ depends on SGI_IOC3
++ ---help---
++ If you have an Octane and you want to use its keyboard, select this.
++
+ config SERIO_I8042
+ tristate "i8042 PC Keyboard controller" if EMBEDDED || !X86
+ default y
+diff -urN linux-2.6.12/drivers/input/serio/Makefile linux-2.6.12-ioc3/drivers/input/serio/Makefile
+--- linux-2.6.12/drivers/input/serio/Makefile 2005-03-18 21:40:38.000000000 +0100
++++ linux-2.6.12-ioc3/drivers/input/serio/Makefile 2005-07-09 13:35:08.000000000 +0200
+@@ -19,5 +19,6 @@
+ obj-$(CONFIG_HIL_MLC) += hp_sdc_mlc.o hil_mlc.o
+ obj-$(CONFIG_SERIO_PCIPS2) += pcips2.o
+ obj-$(CONFIG_SERIO_MACEPS2) += maceps2.o
++obj-$(CONFIG_SERIO_SGI_IOC3) += ioc3kbd.o
+ obj-$(CONFIG_SERIO_LIBPS2) += libps2.o
+ obj-$(CONFIG_SERIO_RAW) += serio_raw.o
+diff -urN linux-2.6.12/drivers/input/serio/ioc3kbd.c linux-2.6.12-ioc3/drivers/input/serio/ioc3kbd.c
+--- linux-2.6.12/drivers/input/serio/ioc3kbd.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ioc3/drivers/input/serio/ioc3kbd.c 2005-07-09 13:35:08.000000000 +0200
+@@ -0,0 +1,172 @@
++/*
++ * SGI IOC3 PS/2 controller driver for linux
++ *
++ * Copyright (C) 2005 Stanislaw Skowronek <skylark at linux-mips.org>
++ */
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/serio.h>
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++#include <linux/err.h>
++#include <linux/pci.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/system.h>
++#include <linux/ioc3.h>
++
++MODULE_AUTHOR("Stanislaw Skowronek <skylark at linux-mips.org>");
++MODULE_DESCRIPTION("SGI IOC3 serio driver");
++MODULE_LICENSE("GPL");
++
++struct ioc3kbd_data {
++ struct ioc3_driver_data *idd;
++ struct serio *kbd,*aux;
++};
++
++static int ioc3kbd_write(struct serio *dev, unsigned char val)
++{
++ struct ioc3kbd_data *d = (struct ioc3kbd_data *)(dev->port_data);
++ unsigned mask;
++ unsigned long timeout=0;
++
++ mask = (dev==d->aux) ? KM_CSR_M_WRT_PEND : KM_CSR_K_WRT_PEND;
++ while((d->idd->vma->km_csr & mask) && (timeout<1000)) {
++ udelay(100);
++ timeout++;
++ }
++
++ if(dev==d->aux)
++ d->idd->vma->m_wd=((unsigned)val)&0x000000ff;
++ else
++ d->idd->vma->k_wd=((unsigned)val)&0x000000ff;
++
++ if(timeout>=1000)
++ return -1;
++ return 0;
++}
++
++static int ioc3kbd_intr(struct ioc3_submodule *is, struct ioc3_driver_data *idd, unsigned int irq, struct pt_regs *regs)
++{
++ struct ioc3kbd_data *d = (struct ioc3kbd_data *)(idd->data[is->id]);
++ unsigned int data_k, data_m;
++
++ ioc3_ack(is,idd,irq);
++ data_k=d->idd->vma->k_rd;
++ data_m=d->idd->vma->m_rd;
++
++ if(data_k & KM_RD_VALID_0)
++ serio_interrupt(d->kbd, (data_k >> KM_RD_DATA_0_SHIFT) & 0xFF, 0, regs);
++ if(data_k & KM_RD_VALID_1)
++ serio_interrupt(d->kbd, (data_k >> KM_RD_DATA_1_SHIFT) & 0xFF, 0, regs);
++ if(data_k & KM_RD_VALID_2)
++ serio_interrupt(d->kbd, (data_k >> KM_RD_DATA_2_SHIFT) & 0xFF, 0, regs);
++ if(data_m & KM_RD_VALID_0)
++ serio_interrupt(d->aux, (data_m >> KM_RD_DATA_0_SHIFT) & 0xFF, 0, regs);
++ if(data_m & KM_RD_VALID_1)
++ serio_interrupt(d->aux, (data_m >> KM_RD_DATA_1_SHIFT) & 0xFF, 0, regs);
++ if(data_m & KM_RD_VALID_2)
++ serio_interrupt(d->aux, (data_m >> KM_RD_DATA_2_SHIFT) & 0xFF, 0, regs);
++
++ return 0;
++}
++
++static int ioc3kbd_open(struct serio *dev)
++{
++ return 0;
++}
++
++static void ioc3kbd_close(struct serio *dev)
++{
++}
++
++static struct ioc3kbd_data * __init ioc3kbd_allocate_port(int idx, struct ioc3_driver_data *idd)
++{
++ struct serio *sk, *sa;
++ struct ioc3kbd_data *d;
++
++ sk = kmalloc(sizeof(struct serio), GFP_KERNEL);
++ sa = kmalloc(sizeof(struct serio), GFP_KERNEL);
++ d = kmalloc(sizeof(struct ioc3kbd_data), GFP_KERNEL);
++ if (sk && sa && d) {
++ memset(sk, 0, sizeof(struct serio));
++ sk->id.type = SERIO_8042;
++ sk->write = ioc3kbd_write;
++ sk->open = ioc3kbd_open;
++ sk->close = ioc3kbd_close;
++ snprintf(sk->name, sizeof(sk->name), "IOC3 keyboard %d", idx);
++ snprintf(sk->phys, sizeof(sk->phys), "ioc3/serio%dkbd", idx);
++ sk->port_data = d;
++ sk->dev.parent = &(idd->pdev->dev);
++ memset(sa, 0, sizeof(struct serio));
++ sa->id.type = SERIO_8042;
++ sa->write = ioc3kbd_write;
++ sa->open = ioc3kbd_open;
++ sa->close = ioc3kbd_close;
++ snprintf(sa->name, sizeof(sa->name), "IOC3 auxiliary %d", idx);
++ snprintf(sa->phys, sizeof(sa->phys), "ioc3/serio%daux", idx);
++ sa->port_data = d;
++ sa->dev.parent = &(idd->pdev->dev);
++ d->idd = idd;
++ d->kbd = sk;
++ d->aux = sa;
++ return d;
++ }
++ return NULL;
++}
++
++static int ioc3kbd_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ struct ioc3kbd_data *d;
++ if(idd->class != IOC3_CLASS_BASE_IP30 && idd->class != IOC3_CLASS_CADDUO)
++ return 1;
++ d = ioc3kbd_allocate_port(idd->id, idd);
++ idd->data[is->id] = d;
++ if(!d)
++ return 1;
++ ioc3_enable(is, idd);
++ serio_register_port(d->kbd);
++ serio_register_port(d->aux);
++ return 0;
++}
++
++static int ioc3kbd_remove(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ struct ioc3kbd_data *d = (struct ioc3kbd_data *)(idd->data[is->id]);
++ serio_unregister_port(d->kbd);
++ serio_unregister_port(d->aux);
++ kfree(d->kbd);
++ kfree(d->aux);
++ kfree(d);
++ idd->data[is->id] = NULL;
++ return 0;
++}
++
++static struct ioc3_submodule ioc3kbd_submodule = {
++ .name = "serio",
++ .probe = ioc3kbd_probe,
++ .remove = ioc3kbd_remove,
++ .irq_mask = SIO_IR_KBD_INT,
++ .intr = ioc3kbd_intr,
++ .owner = THIS_MODULE,
++};
++
++static int __init ioc3kbd_init(void)
++{
++ ioc3_register_submodule(&ioc3kbd_submodule);
++ return 0;
++}
++
++static void __exit ioc3kbd_exit(void)
++{
++ ioc3_unregister_submodule(&ioc3kbd_submodule);
++}
++
++module_init(ioc3kbd_init);
++module_exit(ioc3kbd_exit);
+diff -urN linux-2.6.12/drivers/net/Kconfig linux-2.6.12-ioc3/drivers/net/Kconfig
+--- linux-2.6.12/drivers/net/Kconfig 2005-07-08 13:14:10.000000000 +0200
++++ linux-2.6.12-ioc3/drivers/net/Kconfig 2005-07-09 13:35:08.000000000 +0200
+@@ -449,7 +449,7 @@
+
+ config SGI_IOC3_ETH
+ bool "SGI IOC3 Ethernet"
+- depends on NET_ETHERNET && PCI && SGI_IP27
++ depends on NET_ETHERNET && SGI_IOC3
+ select CRC32
+ select MII
+ help
+diff -urN linux-2.6.12/drivers/net/ioc3-eth.c linux-2.6.12-ioc3/drivers/net/ioc3-eth.c
+--- linux-2.6.12/drivers/net/ioc3-eth.c 2005-07-08 13:14:29.000000000 +0200
++++ linux-2.6.12-ioc3/drivers/net/ioc3-eth.c 2005-07-09 13:35:08.000000000 +0200
+@@ -5,6 +5,7 @@
+ *
+ * Driver for SGI's IOC3 based Ethernet cards as found in the PCI card.
+ *
++ * Copyright (C) 2005 Stanislaw Skowronek (port to meta-driver)
+ * Copyright (C) 1999, 2000, 2001, 2003 Ralf Baechle
+ * Copyright (C) 1995, 1999, 2000, 2001 by Silicon Graphics, Inc.
+ *
+@@ -20,15 +21,13 @@
+ * o Use prefetching for large packets. What is a good lower limit for
+ * prefetching?
+ * o We're probably allocating a bit too much memory.
+- * o Use hardware checksums.
+- * o Convert to using a IOC3 meta driver.
+ * o Which PHYs might possibly be attached to the IOC3 in real live,
+ * which workarounds are required for them? Do we ever have Lucent's?
+ * o For the 2.5 branch kill the mii-tool ioctls.
+ */
+
+ #define IOC3_NAME "ioc3-eth"
+-#define IOC3_VERSION "2.6.3-3"
++#define IOC3_VERSION "2.6.4-s2"
+
+ #include <linux/config.h>
+ #include <linux/init.h>
+@@ -45,13 +44,6 @@
+ #include <linux/tcp.h>
+ #include <linux/udp.h>
+
+-#ifdef CONFIG_SERIAL_8250
+-#include <linux/serial.h>
+-#include <asm/serial.h>
+-#define IOC3_BAUD (22000000 / (3*16))
+-#define IOC3_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+-#endif
+-
+ #include <linux/netdevice.h>
+ #include <linux/etherdevice.h>
+ #include <linux/ethtool.h>
+@@ -63,14 +55,19 @@
+ #include <asm/io.h>
+ #include <asm/pgtable.h>
+ #include <asm/uaccess.h>
++
++#ifdef CONFIG_SGI_IP30
++#include <asm/mach-ip30/addrs.h>
++#else
+ #include <asm/sn/types.h>
+ #include <asm/sn/sn0/addrs.h>
+ #include <asm/sn/sn0/hubni.h>
+ #include <asm/sn/sn0/hubio.h>
+ #include <asm/sn/klconfig.h>
+-#include <asm/sn/ioc3.h>
+ #include <asm/sn/sn0/ip27.h>
++#endif
+ #include <asm/pci/bridge.h>
++#include <linux/ioc3.h>
+
+ /*
+ * 64 RX buffers. This is tunable in the range of 16 <= x < 512. The
+@@ -83,6 +80,7 @@
+
+ /* Private per NIC data of the driver. */
+ struct ioc3_private {
++ struct ioc3_driver_data *idd;
+ struct ioc3 *regs;
+ unsigned long *rxr; /* pointer to receiver ring */
+ struct ioc3_etxd *txr;
+@@ -151,8 +149,15 @@
+ return vdev | (0xaUL << PCI64_ATTR_TARG_SHFT) | PCI64_ATTR_PREF |
+ ((unsigned long)ptr & TO_PHYS_MASK);
+ #else
++#ifdef CONFIG_SGI_IP30
++ vdev <<= 58; /* Shift to PCI64_ATTR_VIRTUAL */
++
++ return vdev | (0x8UL << PCI64_ATTR_TARG_SHFT) | PCI64_ATTR_PREF |
++ ((unsigned long)ptr & TO_PHYS_MASK);
++#else
+ return virt_to_bus(ptr);
+ #endif
++#endif
+ }
+
+ /* BEWARE: The IOC3 documentation documents the size of rx buffers as
+@@ -228,219 +233,6 @@
+ #define ioc3_r_midr_w() be32_to_cpu(ioc3->midr_w)
+ #define ioc3_w_midr_w(v) do { ioc3->midr_w = cpu_to_be32(v); } while (0)
+
+-static inline u32 mcr_pack(u32 pulse, u32 sample)
+-{
+- return (pulse << 10) | (sample << 2);
+-}
+-
+-static int nic_wait(struct ioc3 *ioc3)
+-{
+- u32 mcr;
+-
+- do {
+- mcr = ioc3_r_mcr();
+- } while (!(mcr & 2));
+-
+- return mcr & 1;
+-}
+-
+-static int nic_reset(struct ioc3 *ioc3)
+-{
+- int presence;
+-
+- ioc3_w_mcr(mcr_pack(500, 65));
+- presence = nic_wait(ioc3);
+-
+- ioc3_w_mcr(mcr_pack(0, 500));
+- nic_wait(ioc3);
+-
+- return presence;
+-}
+-
+-static inline int nic_read_bit(struct ioc3 *ioc3)
+-{
+- int result;
+-
+- ioc3_w_mcr(mcr_pack(6, 13));
+- result = nic_wait(ioc3);
+- ioc3_w_mcr(mcr_pack(0, 100));
+- nic_wait(ioc3);
+-
+- return result;
+-}
+-
+-static inline void nic_write_bit(struct ioc3 *ioc3, int bit)
+-{
+- if (bit)
+- ioc3_w_mcr(mcr_pack(6, 110));
+- else
+- ioc3_w_mcr(mcr_pack(80, 30));
+-
+- nic_wait(ioc3);
+-}
+-
+-/*
+- * Read a byte from an iButton device
+- */
+-static u32 nic_read_byte(struct ioc3 *ioc3)
+-{
+- u32 result = 0;
+- int i;
+-
+- for (i = 0; i < 8; i++)
+- result = (result >> 1) | (nic_read_bit(ioc3) << 7);
+-
+- return result;
+-}
+-
+-/*
+- * Write a byte to an iButton device
+- */
+-static void nic_write_byte(struct ioc3 *ioc3, int byte)
+-{
+- int i, bit;
+-
+- for (i = 8; i; i--) {
+- bit = byte & 1;
+- byte >>= 1;
+-
+- nic_write_bit(ioc3, bit);
+- }
+-}
+-
+-static u64 nic_find(struct ioc3 *ioc3, int *last)
+-{
+- int a, b, index, disc;
+- u64 address = 0;
+-
+- nic_reset(ioc3);
+- /* Search ROM. */
+- nic_write_byte(ioc3, 0xf0);
+-
+- /* Algorithm from ``Book of iButton Standards''. */
+- for (index = 0, disc = 0; index < 64; index++) {
+- a = nic_read_bit(ioc3);
+- b = nic_read_bit(ioc3);
+-
+- if (a && b) {
+- printk("NIC search failed (not fatal).\n");
+- *last = 0;
+- return 0;
+- }
+-
+- if (!a && !b) {
+- if (index == *last) {
+- address |= 1UL << index;
+- } else if (index > *last) {
+- address &= ~(1UL << index);
+- disc = index;
+- } else if ((address & (1UL << index)) == 0)
+- disc = index;
+- nic_write_bit(ioc3, address & (1UL << index));
+- continue;
+- } else {
+- if (a)
+- address |= 1UL << index;
+- else
+- address &= ~(1UL << index);
+- nic_write_bit(ioc3, a);
+- continue;
+- }
+- }
+-
+- *last = disc;
+-
+- return address;
+-}
+-
+-static int nic_init(struct ioc3 *ioc3)
+-{
+- const char *type;
+- u8 crc;
+- u8 serial[6];
+- int save = 0, i;
+-
+- type = "unknown";
+-
+- while (1) {
+- u64 reg;
+- reg = nic_find(ioc3, &save);
+-
+- switch (reg & 0xff) {
+- case 0x91:
+- type = "DS1981U";
+- break;
+- default:
+- if (save == 0) {
+- /* Let the caller try again. */
+- return -1;
+- }
+- continue;
+- }
+-
+- nic_reset(ioc3);
+-
+- /* Match ROM. */
+- nic_write_byte(ioc3, 0x55);
+- for (i = 0; i < 8; i++)
+- nic_write_byte(ioc3, (reg >> (i << 3)) & 0xff);
+-
+- reg >>= 8; /* Shift out type. */
+- for (i = 0; i < 6; i++) {
+- serial[i] = reg & 0xff;
+- reg >>= 8;
+- }
+- crc = reg & 0xff;
+- break;
+- }
+-
+- printk("Found %s NIC", type);
+- if (type != "unknown") {
+- printk (" registration number %02x:%02x:%02x:%02x:%02x:%02x,"
+- " CRC %02x", serial[0], serial[1], serial[2],
+- serial[3], serial[4], serial[5], crc);
+- }
+- printk(".\n");
+-
+- return 0;
+-}
+-
+-/*
+- * Read the NIC (Number-In-a-Can) device used to store the MAC address on
+- * SN0 / SN00 nodeboards and PCI cards.
+- */
+-static void ioc3_get_eaddr_nic(struct ioc3_private *ip)
+-{
+- struct ioc3 *ioc3 = ip->regs;
+- u8 nic[14];
+- int tries = 2; /* There may be some problem with the battery? */
+- int i;
+-
+- ioc3_w_gpcr_s(1 << 21);
+-
+- while (tries--) {
+- if (!nic_init(ioc3))
+- break;
+- udelay(500);
+- }
+-
+- if (tries < 0) {
+- printk("Failed to read MAC address\n");
+- return;
+- }
+-
+- /* Read Memory. */
+- nic_write_byte(ioc3, 0xf0);
+- nic_write_byte(ioc3, 0x00);
+- nic_write_byte(ioc3, 0x00);
+-
+- for (i = 13; i >= 0; i--)
+- nic[i] = nic_read_byte(ioc3);
+-
+- for (i = 2; i < 8; i++)
+- priv_netdev(ip)->dev_addr[i - 2] = nic[i];
+-}
+-
+ /*
+ * Ok, this is hosed by design. It's necessary to know what machine the
+ * NIC is in in order to know how to read the NIC address. We also have
+@@ -448,12 +240,16 @@
+ */
+ static void ioc3_get_eaddr(struct ioc3_private *ip)
+ {
+- int i;
+-
++ int i,nz=0;
+
+- ioc3_get_eaddr_nic(ip);
++ for(i=0;i<6;i++)
++ nz |= (priv_netdev(ip)->dev_addr[i] = ip->idd->nic_mac[i]);
+
+ printk("Ethernet address is ");
++ if(!nz) {
++ printk("unreadable.\n");
++ return;
++ }
+ for (i = 0; i < 6; i++) {
+ printk("%02x", priv_netdev(ip)->dev_addr[i]);
+ if (i < 5)
+@@ -752,9 +548,9 @@
+
+ /* The interrupt handler does all of the Rx thread work and cleans up
+ after the Tx thread. */
+-static irqreturn_t ioc3_interrupt(int irq, void *_dev, struct pt_regs *regs)
++static int ioc3eth_intr(struct ioc3_submodule *is, struct ioc3_driver_data *idd, unsigned int irq, struct pt_regs *regs)
+ {
+- struct net_device *dev = (struct net_device *)_dev;
++ struct net_device *dev = (struct net_device *)(idd->data[is->id]);
+ struct ioc3_private *ip = netdev_priv(dev);
+ struct ioc3 *ioc3 = ip->regs;
+ const u32 enabled = EISR_RXTIMERINT | EISR_RXOFLO | EISR_RXBUFOFLO |
+@@ -775,7 +571,7 @@
+ if (eisr & EISR_TXEXPLICIT)
+ ioc3_tx(ip);
+
+- return IRQ_HANDLED;
++ return 0;
+ }
+
+ static inline void ioc3_setup_duplex(struct ioc3_private *ip)
+@@ -842,6 +638,7 @@
+ ip->ioc3_timer.expires = jiffies + (12 * HZ)/10; /* 1.2 sec. */
+ ip->ioc3_timer.data = (unsigned long) ip;
+ ip->ioc3_timer.function = &ioc3_timer;
++
+ add_timer(&ip->ioc3_timer);
+
+ out:
+@@ -1028,7 +825,7 @@
+ (void) ioc3_r_emcr();
+
+ /* Misc registers */
+-#ifdef CONFIG_SGI_IP27
++#if (defined CONFIG_SGI_IP27) || (defined CONFIG_SGI_IP30)
+ ioc3_w_erbar(PCI64_ATTR_BAR >> 32); /* Barrier on last store */
+ #else
+ ioc3_w_erbar(0); /* Let PCI API get it right */
+@@ -1065,12 +862,6 @@
+ {
+ struct ioc3_private *ip = netdev_priv(dev);
+
+- if (request_irq(dev->irq, ioc3_interrupt, SA_SHIRQ, ioc3_str, dev)) {
+- printk(KERN_ERR "%s: Can't get irq %d\n", dev->name, dev->irq);
+-
+- return -EAGAIN;
+- }
+-
+ ip->ehar_h = 0;
+ ip->ehar_l = 0;
+ ioc3_init(dev);
+@@ -1088,101 +879,12 @@
+ netif_stop_queue(dev);
+
+ ioc3_stop(ip);
+- free_irq(dev->irq, dev);
+
+ ioc3_free_rings(ip);
+ return 0;
+ }
+
+-/*
+- * MENET cards have four IOC3 chips, which are attached to two sets of
+- * PCI slot resources each: the primary connections are on slots
+- * 0..3 and the secondaries are on 4..7
+- *
+- * All four ethernets are brought out to connectors; six serial ports
+- * (a pair from each of the first three IOC3s) are brought out to
+- * MiniDINs; all other subdevices are left swinging in the wind, leave
+- * them disabled.
+- */
+-static inline int ioc3_is_menet(struct pci_dev *pdev)
+-{
+- struct pci_dev *dev;
+-
+- return pdev->bus->parent == NULL
+- && (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(0, 0)))
+- && dev->vendor == PCI_VENDOR_ID_SGI
+- && dev->device == PCI_DEVICE_ID_SGI_IOC3
+- && (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(1, 0)))
+- && dev->vendor == PCI_VENDOR_ID_SGI
+- && dev->device == PCI_DEVICE_ID_SGI_IOC3
+- && (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(2, 0)))
+- && dev->vendor == PCI_VENDOR_ID_SGI
+- && dev->device == PCI_DEVICE_ID_SGI_IOC3;
+-}
+-
+-#ifdef CONFIG_SERIAL_8250
+-/*
+- * Note about serial ports and consoles:
+- * For console output, everyone uses the IOC3 UARTA (offset 0x178)
+- * connected to the master node (look in ip27_setup_console() and
+- * ip27prom_console_write()).
+- *
+- * For serial (/dev/ttyS0 etc), we can not have hardcoded serial port
+- * addresses on a partitioned machine. Since we currently use the ioc3
+- * serial ports, we use dynamic serial port discovery that the serial.c
+- * driver uses for pci/pnp ports (there is an entry for the SGI ioc3
+- * boards in pci_boards[]). Unfortunately, UARTA's pio address is greater
+- * than UARTB's, although UARTA on o200s has traditionally been known as
+- * port 0. So, we just use one serial port from each ioc3 (since the
+- * serial driver adds addresses to get to higher ports).
+- *
+- * The first one to do a register_console becomes the preferred console
+- * (if there is no kernel command line console= directive). /dev/console
+- * (ie 5, 1) is then "aliased" into the device number returned by the
+- * "device" routine referred to in this console structure
+- * (ip27prom_console_dev).
+- *
+- * Also look in ip27-pci.c:pci_fixup_ioc3() for some comments on working
+- * around ioc3 oddities in this respect.
+- *
+- * The IOC3 serials use a 22MHz clock rate with an additional divider by 3.
+- * (IOC3_BAUD = (22000000 / (3*16)))
+- */
+-
+-static void __devinit ioc3_serial_probe(struct pci_dev *pdev, struct ioc3 *ioc3)
+-{
+- struct serial_struct req;
+-
+- /*
+- * We need to recognice and treat the fourth MENET serial as it
+- * does not have an SuperIO chip attached to it, therefore attempting
+- * to access it will result in bus errors. We call something an
+- * MENET if PCI slot 0, 1, 2 and 3 of a master PCI bus all have an IOC3
+- * in it. This is paranoid but we want to avoid blowing up on a
+- * showhorn PCI box that happens to have 4 IOC3 cards in it so it's
+- * not paranoid enough ...
+- */
+- if (ioc3_is_menet(pdev) && PCI_SLOT(pdev->devfn) == 3)
+- return;
+-
+- /* Register to interrupt zero because we share the interrupt with
+- the serial driver which we don't properly support yet. */
+- memset(&req, 0, sizeof(req));
+- req.irq = 0;
+- req.flags = IOC3_COM_FLAGS;
+- req.io_type = SERIAL_IO_MEM;
+- req.iomem_reg_shift = 0;
+- req.baud_base = IOC3_BAUD;
+-
+- req.iomem_base = (unsigned char *) &ioc3->sregs.uarta;
+- register_serial(&req);
+-
+- req.iomem_base = (unsigned char *) &ioc3->sregs.uartb;
+- register_serial(&req);
+-}
+-#endif
+-
+-static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
++static int ioc3eth_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
+ {
+ unsigned int sw_physid1, sw_physid2;
+ struct net_device *dev = NULL;
+@@ -1192,63 +894,29 @@
+ u32 vendor, model, rev;
+ int err, pci_using_dac;
+
+- /* Configure DMA attributes. */
+- err = pci_set_dma_mask(pdev, 0xffffffffffffffffULL);
+- if (!err) {
+- pci_using_dac = 1;
+- err = pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
+- if (err < 0) {
+- printk(KERN_ERR "%s: Unable to obtain 64 bit DMA "
+- "for consistent allocations\n", pci_name(pdev));
+- goto out;
+- }
+- } else {
+- err = pci_set_dma_mask(pdev, 0xffffffffULL);
+- if (err) {
+- printk(KERN_ERR "%s: No usable DMA configuration, "
+- "aborting.\n", pci_name(pdev));
+- goto out;
+- }
+- pci_using_dac = 0;
+- }
+-
+- if (pci_enable_device(pdev))
+- return -ENODEV;
++ /* check for board type */
++ if(idd->class == IOC3_CLASS_SERIAL)
++ return 1;
+
+ dev = alloc_etherdev(sizeof(struct ioc3_private));
+ if (!dev) {
+ err = -ENOMEM;
+ goto out_disable;
+ }
++ idd->data[is->id] = dev;
+
+- if (pci_using_dac)
+- dev->features |= NETIF_F_HIGHDMA;
+-
+- err = pci_request_regions(pdev, "ioc3");
+- if (err)
+- goto out_free;
++ /* assume we always have DAC */
++ dev->features |= NETIF_F_HIGHDMA;
+
+ SET_MODULE_OWNER(dev);
+- SET_NETDEV_DEV(dev, &pdev->dev);
++ SET_NETDEV_DEV(dev, &(idd->pdev->dev));
+
+ ip = netdev_priv(dev);
+
+- dev->irq = pdev->irq;
++ dev->irq = idd->pdev->irq;
+
+- ioc3_base = pci_resource_start(pdev, 0);
+- ioc3_size = pci_resource_len(pdev, 0);
+- ioc3 = (struct ioc3 *) ioremap(ioc3_base, ioc3_size);
+- if (!ioc3) {
+- printk(KERN_CRIT "ioc3eth(%s): ioremap failed, goodbye.\n",
+- pci_name(pdev));
+- err = -ENOMEM;
+- goto out_res;
+- }
+- ip->regs = ioc3;
+-
+-#ifdef CONFIG_SERIAL_8250
+- ioc3_serial_probe(pdev, ioc3);
+-#endif
++ ip->idd = idd;
++ ip->regs = ioc3 = idd->vma;
+
+ spin_lock_init(&ip->ioc3_lock);
+ init_timer(&ip->ioc3_timer);
+@@ -1256,7 +924,7 @@
+ ioc3_stop(ip);
+ ioc3_init(dev);
+
+- ip->pdev = pdev;
++ ip->pdev = idd->pdev;
+
+ ip->mii.phy_id_mask = 0x1f;
+ ip->mii.reg_num_mask = 0x1f;
+@@ -1268,7 +936,7 @@
+
+ if (ip->mii.phy_id == -1) {
+ printk(KERN_CRIT "ioc3-eth(%s): Didn't find a PHY, goodbye.\n",
+- pci_name(pdev));
++ pci_name(idd->pdev));
+ err = -ENODEV;
+ goto out_stop;
+ }
+@@ -1314,56 +982,40 @@
+ out_stop:
+ ioc3_stop(ip);
+ ioc3_free_rings(ip);
+-out_res:
+- pci_release_regions(pdev);
+-out_free:
+ free_netdev(dev);
+ out_disable:
+- /*
+- * We should call pci_disable_device(pdev); here if the IOC3 wasn't
+- * such a weird device ...
+- */
+ out:
+ return err;
+ }
+
+-static void __devexit ioc3_remove_one (struct pci_dev *pdev)
++static int ioc3eth_remove(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
+ {
+- struct net_device *dev = pci_get_drvdata(pdev);
++ struct net_device *dev = idd->data[is->id];
+ struct ioc3_private *ip = netdev_priv(dev);
+- struct ioc3 *ioc3 = ip->regs;
+
+ unregister_netdev(dev);
+- iounmap(ioc3);
+- pci_release_regions(pdev);
+ free_netdev(dev);
+- /*
+- * We should call pci_disable_device(pdev); here if the IOC3 wasn't
+- * such a weird device ...
+- */
++ return 0;
+ }
+
+-static struct pci_device_id ioc3_pci_tbl[] = {
+- { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID },
+- { 0 }
+-};
+-MODULE_DEVICE_TABLE(pci, ioc3_pci_tbl);
+-
+-static struct pci_driver ioc3_driver = {
+- .name = "ioc3-eth",
+- .id_table = ioc3_pci_tbl,
+- .probe = ioc3_probe,
+- .remove = __devexit_p(ioc3_remove_one),
++static struct ioc3_submodule ioc3eth_submodule = {
++ .name = "ethernet",
++ .probe = ioc3eth_probe,
++ .remove = ioc3eth_remove,
++ .ethernet = 1,
++ .intr = ioc3eth_intr,
++ .owner = THIS_MODULE,
+ };
+
+ static int __init ioc3_init_module(void)
+ {
+- return pci_module_init(&ioc3_driver);
++ ioc3_register_submodule(&ioc3eth_submodule);
++ return 0;
+ }
+
+ static void __exit ioc3_cleanup_module(void)
+ {
+- pci_unregister_driver(&ioc3_driver);
++ ioc3_unregister_submodule(&ioc3eth_submodule);
+ }
+
+ static int ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev)
+diff -urN linux-2.6.12/drivers/serial/8250.c linux-2.6.12-ioc3/drivers/serial/8250.c
+--- linux-2.6.12/drivers/serial/8250.c 2005-07-08 13:15:18.000000000 +0200
++++ linux-2.6.12-ioc3/drivers/serial/8250.c 2005-07-10 22:21:00.000000000 +0200
+@@ -277,6 +277,9 @@
+ case UPIO_MEM:
+ return readb(up->port.membase + offset);
+
++ case UPIO_IOC3:
++ return readb(up->port.membase + (offset^3));
++
+ case UPIO_MEM32:
+ return readl(up->port.membase + offset);
+
+@@ -300,6 +303,10 @@
+ writeb(value, up->port.membase + offset);
+ break;
+
++ case UPIO_IOC3:
++ writeb(value, up->port.membase + (offset^3));
++ break;
++
+ case UPIO_MEM32:
+ writel(value, up->port.membase + offset);
+ break;
+@@ -1821,6 +1828,8 @@
+ int ret = 0;
+
+ switch (up->port.iotype) {
++ case UPIO_IOC3:
++ break;
+ case UPIO_MEM:
+ if (!up->port.mapbase)
+ break;
+@@ -1853,6 +1862,8 @@
+ unsigned int size = 8 << up->port.regshift;
+
+ switch (up->port.iotype) {
++ case UPIO_IOC3:
++ break;
+ case UPIO_MEM:
+ if (!up->port.mapbase)
+ break;
+@@ -2219,8 +2230,10 @@
+
+ add_preferred_console("ttyS", line, options);
+ printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
+- line, port->iotype == UPIO_MEM ? "MMIO" : "I/O port",
+- port->iotype == UPIO_MEM ? (unsigned long) port->mapbase :
++ line, port->iotype == UPIO_MEM ? "MMIO" :
++ port->iotype == UPIO_IOC3 ? "IOC3" : "I/O port",
++ (port->iotype == UPIO_MEM || port->iotype == UPIO_IOC3) ?
++ (unsigned long) port->mapbase :
+ (unsigned long) port->iobase, options);
+ if (!(serial8250_console.flags & CON_ENABLED)) {
+ serial8250_console.flags &= ~CON_PRINTBUFFER;
+diff -urN linux-2.6.12/drivers/serial/serial_core.c linux-2.6.12-ioc3/drivers/serial/serial_core.c
+--- linux-2.6.12/drivers/serial/serial_core.c 2005-07-08 13:15:20.000000000 +0200
++++ linux-2.6.12-ioc3/drivers/serial/serial_core.c 2005-07-09 13:35:08.000000000 +0200
+@@ -1606,9 +1606,10 @@
+
+ ret = sprintf(buf, "%d: uart:%s %s%08lX irq:%d",
+ port->line, uart_type(port),
+- port->iotype == UPIO_MEM ? "mmio:0x" : "port:",
+- port->iotype == UPIO_MEM ? port->mapbase :
+- (unsigned long) port->iobase,
++ port->iotype == UPIO_MEM ? "mmio:0x" :
++ port->iotype == UPIO_IOC3 ? "ioc3:0x" : "port:",
++ (port->iotype == UPIO_MEM || port->iotype == UPIO_IOC3) ?
++ port->mapbase : (unsigned long) port->iobase,
+ port->irq);
+
+ if (port->type == PORT_UNKNOWN) {
+@@ -1928,6 +1929,9 @@
+ case UPIO_MEM32:
+ printk("MMIO 0x%lx", port->mapbase);
+ break;
++ case UPIO_IOC3:
++ printk("IOC3 0x%lx", port->mapbase);
++ break;
+ }
+ printk(" (irq = %d) is a %s\n", port->irq, uart_type(port));
+ }
+@@ -2245,6 +2249,7 @@
+ return (port1->iobase == port2->iobase) &&
+ (port1->hub6 == port2->hub6);
+ case UPIO_MEM:
++ case UPIO_IOC3:
+ return (port1->membase == port2->membase);
+ }
+ return 0;
+diff -urN linux-2.6.12/include/asm-mips/mach-ip27/mangle-port.h linux-2.6.12-ioc3/include/asm-mips/mach-ip27/mangle-port.h
+--- linux-2.6.12/include/asm-mips/mach-ip27/mangle-port.h 2004-08-19 16:32:00.000000000 +0200
++++ linux-2.6.12-ioc3/include/asm-mips/mach-ip27/mangle-port.h 2005-07-10 22:32:11.000000000 +0200
+@@ -8,7 +8,7 @@
+ #ifndef __ASM_MACH_IP27_MANGLE_PORT_H
+ #define __ASM_MACH_IP27_MANGLE_PORT_H
+
+-#define __swizzle_addr_b(port) (port)
++#define __swizzle_addr_b(port) ((port) ^ 3)
+ #define __swizzle_addr_w(port) ((port) ^ 2)
+ #define __swizzle_addr_l(port) (port)
+ #define __swizzle_addr_q(port) (port)
+diff -urN linux-2.6.12/include/linux/ioc3.h linux-2.6.12-ioc3/include/linux/ioc3.h
+--- linux-2.6.12/include/linux/ioc3.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ioc3/include/linux/ioc3.h 2005-07-09 13:35:08.000000000 +0200
+@@ -0,0 +1,87 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (c) 2005 Stanislaw Skowronek <skylark at linux-mips.org>
++ */
++
++#ifndef _LINUX_IOC3_H
++#define _LINUX_IOC3_H
++
++#include <asm-mips/sn/ioc3.h>
++
++#define IOC3_MAX_SUBMODULES 32
++
++#define IOC3_CLASS_NONE 0
++#define IOC3_CLASS_BASE_IP27 1
++#define IOC3_CLASS_BASE_IP30 2
++#define IOC3_CLASS_MENET_123 3
++#define IOC3_CLASS_MENET_4 4
++#define IOC3_CLASS_CADDUO 5
++#define IOC3_CLASS_SERIAL 6
++
++/* One of these per IOC3 */
++struct ioc3_driver_data {
++ struct list_head list;
++ int id; /* IOC3 sequence number */
++ /* PCI mapping */
++ unsigned long pma; /* physical address */
++ struct __iomem ioc3 *vma; /* pointer to registers */
++ struct pci_dev *pdev; /* PCI device */
++ /* IRQ stuff */
++ int dual_irq; /* set if separate IRQs are used */
++ int irq_io, irq_eth; /* IRQ numbers */
++ /* GPIO magic */
++ spinlock_t gpio_lock;
++ unsigned int gpdr_shadow;
++ /* NIC identifiers */
++ char nic_part[32];
++ char nic_serial[16];
++ char nic_mac[6];
++ /* submodule set */
++ int class;
++ void *data[IOC3_MAX_SUBMODULES]; /* for submodule use */
++ int active[IOC3_MAX_SUBMODULES]; /* set if probe succeeds */
++ /* is_ir_lock must be held while
++ * modifying sio_ie values, so
++ * we can be sure that sio_ie is
++ * not changing when we read it
++ * along with sio_ir.
++ */
++ spinlock_t ir_lock; /* SIO_IE[SC] mod lock */
++};
++
++/* One per submodule */
++struct ioc3_submodule {
++ char *name; /* descriptive submodule name */
++ struct module *owner; /* owning kernel module */
++ int ethernet; /* set for ethernet drivers */
++ int (*probe) (struct ioc3_submodule *, struct ioc3_driver_data *);
++ int (*remove) (struct ioc3_submodule *, struct ioc3_driver_data *);
++ int id; /* assigned by IOC3, index for the "data" array */
++ /* IRQ stuff */
++ unsigned int irq_mask; /* IOC3 IRQ mask, leave clear for Ethernet */
++ int (*intr) (struct ioc3_submodule *, struct ioc3_driver_data *, unsigned int, struct pt_regs *);
++ /* private submodule data */
++ void *data; /* assigned by submodule */
++};
++
++/**********************************
++ * Functions needed by submodules *
++ **********************************/
++
++/* registers a submodule for all existing and future IOC3 chips */
++extern int ioc3_register_submodule(struct ioc3_submodule *);
++/* unregisters a submodule */
++extern void ioc3_unregister_submodule(struct ioc3_submodule *);
++/* enables IRQs indicated by irq_mask for a specified IOC3 chip */
++extern void ioc3_enable(struct ioc3_submodule *, struct ioc3_driver_data *);
++/* ackowledges specified IRQs */
++extern void ioc3_ack(struct ioc3_submodule *, struct ioc3_driver_data *, unsigned int);
++/* disables IRQs indicated by irq_mask for a specified IOC3 chip */
++extern void ioc3_disable(struct ioc3_submodule *, struct ioc3_driver_data *);
++/* atomically sets/clears GPIO bits */
++extern void ioc3_gpio(struct ioc3_driver_data *, unsigned int, unsigned int);
++
++#endif
+diff -urN linux-2.6.12/include/linux/serial.h linux-2.6.12-ioc3/include/linux/serial.h
+--- linux-2.6.12/include/linux/serial.h 2005-01-07 15:50:19.000000000 +0100
++++ linux-2.6.12-ioc3/include/linux/serial.h 2005-07-09 13:35:08.000000000 +0200
+@@ -81,6 +81,7 @@
+ #define SERIAL_IO_PORT 0
+ #define SERIAL_IO_HUB6 1
+ #define SERIAL_IO_MEM 2
++#define SERIAL_IO_IOC3 4
+
+ struct serial_uart_config {
+ char *name;
+diff -urN linux-2.6.12/include/linux/serial_core.h linux-2.6.12-ioc3/include/linux/serial_core.h
+--- linux-2.6.12/include/linux/serial_core.h 2005-07-08 13:16:59.000000000 +0200
++++ linux-2.6.12-ioc3/include/linux/serial_core.h 2005-07-09 13:35:08.000000000 +0200
+@@ -208,6 +208,7 @@
+ #define UPIO_HUB6 (1)
+ #define UPIO_MEM (2)
+ #define UPIO_MEM32 (3)
++#define UPIO_IOC3 (4)
+
+ unsigned int read_status_mask; /* driver specific */
+ unsigned int ignore_status_mask; /* driver specific */
Property changes on: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/20_ioc3.dpatch
___________________________________________________________________
Name: svn:executable
+ *
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/21_ip30.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/21_ip30.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/21_ip30.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1,6063 @@
+#! /bin/sh -e
+## 21_ip30.dpatch by Stanislaw Skowronek <skylark at linux-mips.org>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Improved ioc3 driver, from
+## DP: ftp://ftp.linux-mips.org/pub/linux/mips/people/skylark/linux-mips-2.6.12-ip30-r23.patch.bz2
+
+if [ $# -lt 1 ]; then
+ echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
+ exit 1
+fi
+
+[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
+patch_opts="${patch_opts:--f --no-backup-if-mismatch} ${2:+-d $2}"
+
+case "$1" in
+ -patch) patch -p1 ${patch_opts} < $0;;
+ -unpatch) patch -R -p1 ${patch_opts} < $0;;
+ *)
+ echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
+ exit 1;;
+esac
+
+exit 0
+
+diff -urN linux-2.6.12-ioc3/arch/mips/Kconfig linux-2.6.12-ip30/arch/mips/Kconfig
+--- linux-2.6.12-ioc3/arch/mips/Kconfig 2005-07-09 13:35:08.000000000 +0200
++++ linux-2.6.12-ip30/arch/mips/Kconfig 2005-07-10 15:42:33.000000000 +0200
+@@ -484,6 +484,21 @@
+ workstations. To compile a Linux kernel that runs on these, say Y
+ here.
+
++config SGI_IP30
++ bool "Support for SGI IP30 (Octane/Octane2)"
++ select ARC
++ select ARC64
++ select BOOT_ELF64
++ select DMA_IP30
++ select HW_HAS_PCI
++ select PCI_DOMAINS
++ select QL_ISP_A64
++ select SYS_SUPPORTS_64BIT_KERNEL
++ select SYS_SUPPORTS_BIG_ENDIAN
++ help
++ This are the SGI Octane and Octane2 graphics workstations. To
++ compile a Linux kernel that runs on these, say Y here.
++
+ config SGI_IP32
+ bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
+ depends on EXPERIMENTAL
+@@ -671,6 +686,9 @@
+ config DMA_IP27
+ bool
+
++config DMA_IP30
++ bool
++
+ config DMA_IP32
+ bool
+
+@@ -847,7 +865,7 @@
+ config MIPS_L1_CACHE_SHIFT
+ int
+ default "4" if MACH_DECSTATION
+- default "7" if SGI_IP27
++ default "7" if SGI_IP27 || SGI_IP30
+ default "5"
+
+ config HAVE_STD_PC_SERIAL_PORT
+@@ -862,12 +880,12 @@
+
+ config ARC_MEMORY
+ bool
+- depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP32
++ depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP30 || SGI_IP32
+ default y
+
+ config ARC_PROMLIB
+ bool
+- depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32
++ depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP30 || SGI_IP32
+ default y
+
+ config ARC64
+@@ -1207,7 +1225,7 @@
+
+ config SMP
+ bool "Multi-Processing support"
+- depends on CPU_RM9000 || (SIBYTE_SB1250 && !SIBYTE_STANDALONE) || SGI_IP27
++ depends on CPU_RM9000 || (SIBYTE_SB1250 && !SIBYTE_STANDALONE) || SGI_IP27 || SGI_IP30
+ ---help---
+ This enables support for systems with more than one CPU. If you have
+ a system with only one CPU, like most personal computers, say N. If
+diff -urN linux-2.6.12-ioc3/arch/mips/Makefile linux-2.6.12-ip30/arch/mips/Makefile
+--- linux-2.6.12-ioc3/arch/mips/Makefile 2005-07-08 13:12:04.000000000 +0200
++++ linux-2.6.12-ip30/arch/mips/Makefile 2005-07-09 13:36:14.000000000 +0200
+@@ -601,6 +601,15 @@
+ endif
+
+ #
++# SGI-IP30 (Octane/Octane2)
++#
++ifdef CONFIG_SGI_IP30
++core-$(CONFIG_SGI_IP30) += arch/mips/sgi-ip30/
++cflags-$(CONFIG_SGI_IP30) += -Iinclude/asm-mips/mach-ip30
++load-$(CONFIG_SGI_IP30) += 0xa800000020004000
++endif
++
++#
+ # SGI-IP32 (O2)
+ #
+ # Set the load address to >= 80069000 if you want to leave space for symmon,
+diff -urN linux-2.6.12-ioc3/arch/mips/kernel/setup.c linux-2.6.12-ip30/arch/mips/kernel/setup.c
+--- linux-2.6.12-ioc3/arch/mips/kernel/setup.c 2005-07-08 13:12:08.000000000 +0200
++++ linux-2.6.12-ip30/arch/mips/kernel/setup.c 2005-07-09 13:36:14.000000000 +0200
+@@ -150,7 +150,6 @@
+
+ printk("Determined physical RAM map:\n");
+ print_memory_map();
+-
+ for (;;) {
+ /*
+ * "mem=XXX[kKmM]" defines a memory region from
+@@ -300,7 +299,7 @@
+ * Partially used pages are not usable - thus
+ * we are rounding upwards.
+ */
+- start_pfn = PFN_UP(CPHYSADDR(reserved_end));
++ start_pfn = PFN_UP(kernel_physaddr(reserved_end));
+
+ #ifndef CONFIG_SGI_IP27
+ /* Find the highest page frame number we have available. */
+@@ -422,11 +421,11 @@
+ printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
+ (void *)initrd_start, initrd_size);
+
+- if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
++ if (kernel_physaddr(initrd_end) > PFN_PHYS(max_low_pfn)) {
+ printk("initrd extends beyond end of memory "
+ "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
+ sizeof(long) * 2,
+- (unsigned long long)CPHYSADDR(initrd_end),
++ (unsigned long long)kernel_physaddr(initrd_end),
+ sizeof(long) * 2,
+ (unsigned long long)PFN_PHYS(max_low_pfn));
+ initrd_start = initrd_end = 0;
+@@ -434,7 +433,7 @@
+ }
+
+ if (initrd_reserve_bootmem)
+- reserve_bootmem(CPHYSADDR(initrd_start), initrd_size);
++ reserve_bootmem(kernel_physaddr(initrd_start), initrd_size);
+ }
+ #endif /* CONFIG_BLK_DEV_INITRD */
+ }
+@@ -448,10 +447,10 @@
+ * The 64bit code in 32bit object format trick can't represent
+ * 64bit wide relocations for linker script symbols.
+ */
+- code_resource.start = CPHYSADDR(&_text);
+- code_resource.end = CPHYSADDR(&_etext) - 1;
+- data_resource.start = CPHYSADDR(&_etext);
+- data_resource.end = CPHYSADDR(&_edata) - 1;
++ code_resource.start = kernel_physaddr(&_text);
++ code_resource.end = kernel_physaddr(&_etext) - 1;
++ data_resource.start = kernel_physaddr(&_etext);
++ data_resource.end = kernel_physaddr(&_edata) - 1;
+ #else
+ code_resource.start = virt_to_phys(&_text);
+ code_resource.end = virt_to_phys(&_etext) - 1;
+@@ -524,6 +523,10 @@
+ /* call board setup routine */
+ plat_setup();
+
++#ifdef CONFIG_CMDLINE
++ if (strlen(CONFIG_CMDLINE))
++ strlcpy(arcs_cmdline, CONFIG_CMDLINE, sizeof(command_line));
++#endif
+ strlcpy(command_line, arcs_cmdline, sizeof(command_line));
+ strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE);
+
+diff -urN linux-2.6.12-ioc3/arch/mips/mm/Makefile linux-2.6.12-ip30/arch/mips/mm/Makefile
+--- linux-2.6.12-ioc3/arch/mips/mm/Makefile 2005-07-08 13:12:09.000000000 +0200
++++ linux-2.6.12-ip30/arch/mips/mm/Makefile 2005-07-10 15:37:40.000000000 +0200
+@@ -39,6 +39,7 @@
+ obj-$(CONFIG_DMA_NONCOHERENT) += dma-noncoherent.o
+ endif
+ obj-$(CONFIG_DMA_IP27) += dma-ip27.o
++obj-$(CONFIG_DMA_IP30) += dma-ip30.o
+ obj-$(CONFIG_DMA_IP32) += dma-ip32.o
+
+ EXTRA_AFLAGS := $(CFLAGS)
+diff -urN linux-2.6.12-ioc3/arch/mips/mm/dma-ip30.c linux-2.6.12-ip30/arch/mips/mm/dma-ip30.c
+--- linux-2.6.12-ioc3/arch/mips/mm/dma-ip30.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/mm/dma-ip30.c 2005-07-10 16:11:27.000000000 +0200
+@@ -0,0 +1,274 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2000 Ani Joshi <ajoshi at unixbox.com>
++ * Copyright (C) 2000, 2001 Ralf Baechle <ralf at gnu.org>
++ * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
++ * Fixed for IP30: Stanislaw Skowronek <skylark at linux-mips.org> 2005
++ */
++#include <linux/types.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/string.h>
++#include <linux/pci.h>
++
++#ifdef CONFIG_SGI_IP30
++#include <asm/mach-ip30/addrs.h>
++#endif
++#include <asm/cache.h>
++#include <asm/pci/bridge.h>
++
++static inline dma_addr_t pdev_to_baddr(struct pci_dev *dev, dma_addr_t addr)
++{
++ if(dev->dma_mask == 0xFFFFFFFFFFFFFFFFUL) /* 64-bit DMA */
++ return BRIDGE_CONTROLLER(dev->bus)->baddr + addr;
++ if(addr < 0x20000000 || addr >= 0xA0000000) {
++ printk(KERN_ERR "BRIDGE: Mapping can't be realized in direct DMA.\n");
++ return -1;
++ }
++ return PCI32_DIRECT_BASE + addr - 0x20000000;
++}
++
++static inline dma_addr_t dev_to_baddr(struct device *dev, dma_addr_t addr)
++{
++ if(dev)
++ return pdev_to_baddr(to_pci_dev(dev), addr);
++ return addr;
++}
++
++void *dma_alloc_noncoherent(struct device *dev, size_t size,
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
++{
++ void *ret;
++
++ /* ignore region specifiers */
++ gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
++
++ if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
++ gfp |= GFP_DMA;
++ ret = (void *) __get_free_pages(gfp, get_order(size));
++
++ if (ret != NULL) {
++ memset(ret, 0, size);
++ *dma_handle = dev_to_baddr(dev, virt_to_phys(ret));
++ }
++
++ return ret;
++}
++
++EXPORT_SYMBOL(dma_alloc_noncoherent);
++
++void *dma_alloc_coherent(struct device *dev, size_t size,
++ dma_addr_t * dma_handle, unsigned int __nocast gfp)
++ __attribute__((alias("dma_alloc_noncoherent")));
++
++EXPORT_SYMBOL(dma_alloc_coherent);
++
++void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
++ dma_addr_t dma_handle)
++{
++ unsigned long addr = (unsigned long) vaddr;
++
++ free_pages(addr, get_order(size));
++}
++
++EXPORT_SYMBOL(dma_free_noncoherent);
++
++void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
++ dma_addr_t dma_handle) __attribute__((alias("dma_free_noncoherent")));
++
++EXPORT_SYMBOL(dma_free_coherent);
++
++dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++
++ return dev_to_baddr(dev, __pa(ptr));
++}
++
++EXPORT_SYMBOL(dma_map_single);
++
++void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_unmap_single);
++
++int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
++ enum dma_data_direction direction)
++{
++ int i;
++
++ BUG_ON(direction == DMA_NONE);
++
++ for (i = 0; i < nents; i++, sg++) {
++ sg->dma_address = (dma_addr_t) dev_to_baddr(dev,
++ page_to_phys(sg->page) + sg->offset);
++ }
++
++ return nents;
++}
++
++EXPORT_SYMBOL(dma_map_sg);
++
++dma_addr_t dma_map_page(struct device *dev, struct page *page,
++ unsigned long offset, size_t size, enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++
++ return dev_to_baddr(dev, page_to_phys(page) + offset);
++}
++
++EXPORT_SYMBOL(dma_map_page);
++
++void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_unmap_page);
++
++void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_unmap_sg);
++
++void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_sync_single_for_cpu);
++
++void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_sync_single_for_device);
++
++void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
++ unsigned long offset, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
++
++void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
++ unsigned long offset, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_sync_single_range_for_device);
++
++void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_sync_sg_for_cpu);
++
++void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_sync_sg_for_device);
++
++int dma_mapping_error(dma_addr_t dma_addr)
++{
++ return 0;
++}
++
++EXPORT_SYMBOL(dma_mapping_error);
++
++int dma_supported(struct device *dev, u64 mask)
++{
++ /*
++ * we fall back to GFP_DMA when the mask isn't all 1s,
++ * so we can't guarantee allocations that must be
++ * within a tighter range than GFP_DMA..
++ */
++ if (mask < 0x00ffffff)
++ return 0;
++
++ return 1;
++}
++
++EXPORT_SYMBOL(dma_supported);
++
++int dma_is_consistent(dma_addr_t dma_addr)
++{
++ return 1;
++}
++
++EXPORT_SYMBOL(dma_is_consistent);
++
++void dma_cache_sync(void *vaddr, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(direction == DMA_NONE);
++}
++
++EXPORT_SYMBOL(dma_cache_sync);
++
++dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
++ struct page *page, unsigned long offset, int direction)
++{
++ dma64_addr_t addr = page_to_phys(page) + offset;
++
++ return (dma64_addr_t) pdev_to_baddr(pdev, addr);
++}
++
++EXPORT_SYMBOL(pci_dac_page_to_dma);
++
++struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
++ dma64_addr_t dma_addr)
++{
++ struct bridge_controller *bc = BRIDGE_CONTROLLER(pdev->bus);
++
++ return pfn_to_page((dma_addr - bc->baddr) >> PAGE_SHIFT);
++}
++
++EXPORT_SYMBOL(pci_dac_dma_to_page);
++
++unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
++ dma64_addr_t dma_addr)
++{
++ return dma_addr & ~PAGE_MASK;
++}
++
++EXPORT_SYMBOL(pci_dac_dma_to_offset);
++
++void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
++ dma64_addr_t dma_addr, size_t len, int direction)
++{
++ BUG_ON(direction == PCI_DMA_NONE);
++}
++
++EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu);
++
++void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
++ dma64_addr_t dma_addr, size_t len, int direction)
++{
++ BUG_ON(direction == PCI_DMA_NONE);
++}
++
++EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device);
+diff -urN linux-2.6.12-ioc3/arch/mips/mm/init.c linux-2.6.12-ip30/arch/mips/mm/init.c
+--- linux-2.6.12-ioc3/arch/mips/mm/init.c 2005-03-18 21:40:38.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/mm/init.c 2005-07-11 18:16:03.000000000 +0200
+@@ -160,8 +160,19 @@
+ zones_size[ZONE_NORMAL] = low - max_dma;
+ }
+ #else
++#ifdef CONFIG_SGI_IP30
++ max_dma = 0xA0000000UL >> PAGE_SHIFT;
++ if (low < max_dma)
++ zones_size[ZONE_DMA] = low;
++ else {
++ printk(KERN_INFO "SGI Octane system with >2GB physical memory, limiting DMA.\n");
++ zones_size[ZONE_DMA] = max_dma;
++ zones_size[ZONE_NORMAL] = low - max_dma;
++ }
++#else
+ zones_size[ZONE_DMA] = low;
+ #endif
++#endif
+ #ifdef CONFIG_HIGHMEM
+ if (cpu_has_dc_aliases) {
+ printk(KERN_WARNING "This processor doesn't support highmem.");
+@@ -262,13 +273,22 @@
+ }
+ #endif /* !CONFIG_DISCONTIGMEM */
+
++#ifdef CONFIG_MIPS64
++unsigned long kernel_physaddr(unsigned long kva)
++{
++ if(kva&0xffffffff00000000UL==0xffffffff00000000UL)
++ return CPHYSADDR(kva);
++ return XPHYSADDR(kva);
++}
++#endif
++
+ #ifdef CONFIG_BLK_DEV_INITRD
+ void free_initrd_mem(unsigned long start, unsigned long end)
+ {
+ #ifdef CONFIG_MIPS64
+ /* Switch from KSEG0 to XKPHYS addresses */
+- start = (unsigned long)phys_to_virt(CPHYSADDR(start));
+- end = (unsigned long)phys_to_virt(CPHYSADDR(end));
++ start = (unsigned long)phys_to_virt(kernel_physaddr(start));
++ end = (unsigned long)phys_to_virt(kernel_physaddr(end));
+ #endif
+ if (start < end)
+ printk(KERN_INFO "Freeing initrd memory: %ldk freed\n",
+@@ -294,7 +314,7 @@
+ addr = (unsigned long) &__init_begin;
+ while (addr < (unsigned long) &__init_end) {
+ #ifdef CONFIG_MIPS64
+- page = PAGE_OFFSET | CPHYSADDR(addr);
++ page = PAGE_OFFSET | kernel_physaddr(addr);
+ #else
+ page = addr;
+ #endif
+diff -urN linux-2.6.12-ioc3/arch/mips/pci/Makefile linux-2.6.12-ip30/arch/mips/pci/Makefile
+--- linux-2.6.12-ioc3/arch/mips/pci/Makefile 2005-07-09 13:35:08.000000000 +0200
++++ linux-2.6.12-ip30/arch/mips/pci/Makefile 2005-07-09 13:36:14.000000000 +0200
+@@ -43,6 +43,7 @@
+ obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
+ pci-yosemite.o
+ obj-$(CONFIG_SGI_IP27) += pci-ip27.o
++obj-$(CONFIG_SGI_IP30) += pci-ip30.o
+ obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o
+ obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o
+ obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o
+diff -urN linux-2.6.12-ioc3/arch/mips/pci/pci-ip30.c linux-2.6.12-ip30/arch/mips/pci/pci-ip30.c
+--- linux-2.6.12-ioc3/arch/mips/pci/pci-ip30.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/pci/pci-ip30.c 2005-07-10 15:51:00.000000000 +0200
+@@ -0,0 +1,483 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2004,5 Stanislaw Skowronek (skylark at linux-mips.org)
++ * Based on pci-ip27.c by
++ * Copyright (C) 2003 Christoph Hellwig (hch at lst.de)
++ * Copyright (C) 1999, 2000, 04 Ralf Baechle (ralf at linux-mips.org)
++ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
++ */
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/pci.h>
++
++#include <asm/mach-ip30/addrs.h>
++#include <asm/mach-ip30/pcibr.h>
++#include <asm/pci/bridge.h>
++#include <asm/paccess.h>
++
++extern unsigned int allocate_irqno(void);
++
++/*
++ * Max #PCI busses we can handle; ie, max #PCI bridges.
++ */
++#define MAX_PCI_BUSSES 8
++
++/*
++ * Max #PCI devices (like scsi controllers) we handle on a bus.
++ */
++#define MAX_DEVICES_PER_PCIBUS 8
++
++/*
++ * XXX: No kmalloc available when we do our crosstalk scan,
++ * we should try to move it later in the boot process.
++ */
++static struct bridge_controller bridges[MAX_PCI_BUSSES];
++
++/*
++ * Translate from irq to software PCI bus number and PCI slot.
++ */
++struct bridge_controller *irq_to_bridge[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
++int irq_to_slot[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
++
++/*
++ * The Bridge ASIC supports both type 0 and type 1 access. Type 1 is
++ * not really documented, so right now I can't write code which uses it.
++ * Therefore we use type 0 accesses for now even though they won't work
++ * correcly for PCI-to-PCI bridges.
++ *
++ * The function is complicated by the ultimate brokeness of the IOC3 chip
++ * which is used in SGI systems. The IOC3 can only handle 32-bit PCI
++ * accesses and does only decode parts of it's address space.
++ */
++
++static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
++ int where, int size, u32 * value)
++{
++ struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
++ bridge_t *bridge = bc->base;
++ int slot = PCI_SLOT(devfn);
++ int fn = PCI_FUNC(devfn);
++ volatile void *addr;
++ u32 cf, shift, mask;
++ int res;
++
++ addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
++ if (get_dbe(cf, (u32 *) addr))
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ /*
++ * IOC3 is fucked fucked beyond believe ... Don't even give the
++ * generic PCI code a chance to look at it for real ...
++ */
++ if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
++ goto oh_my_gawd;
++
++ addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
++
++ if (size == 1)
++ res = get_dbe(*value, (u8 *) addr);
++ else if (size == 2)
++ res = get_dbe(*value, (u16 *) addr);
++ else
++ res = get_dbe(*value, (u32 *) addr);
++
++ return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
++
++oh_my_gawd:
++
++ /*
++ * IOC3 is fucked fucked beyond believe ... Don't even give the
++ * generic PCI code a chance to look at the wrong register.
++ */
++ if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
++ *value = 0;
++ return PCIBIOS_SUCCESSFUL;
++ }
++
++ /*
++ * IOC3 is fucked fucked beyond believe ... Don't try to access
++ * anything but 32-bit words ...
++ */
++ addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
++
++ if (get_dbe(cf, (u32 *) addr))
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ shift = ((where & 3) << 3);
++ mask = (0xffffffffU >> ((4 - size) << 3));
++ *value = (cf >> shift) & mask;
++
++ return PCIBIOS_SUCCESSFUL;
++}
++
++static int pci_read_config(struct pci_bus *bus, unsigned int devfn,
++ int where, int size, u32 * value)
++{
++ return pci_conf0_read_config(bus, devfn, where, size, value);
++}
++
++static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
++ int where, int size, u32 value)
++{
++ struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
++ bridge_t *bridge = bc->base;
++ int slot = PCI_SLOT(devfn);
++ int fn = PCI_FUNC(devfn);
++ volatile void *addr;
++ u32 cf, shift, mask, smask;
++ int res;
++
++ addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
++ if (get_dbe(cf, (u32 *) addr))
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ /*
++ * IOC3 is fucked fucked beyond believe ... Don't even give the
++ * generic PCI code a chance to look at it for real ...
++ */
++ if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
++ goto oh_my_gawd;
++
++ addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
++
++ if (size == 1) {
++ res = put_dbe(value, (u8 *) addr);
++ } else if (size == 2) {
++ res = put_dbe(value, (u16 *) addr);
++ } else {
++ res = put_dbe(value, (u32 *) addr);
++ }
++
++ if (res)
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ return PCIBIOS_SUCCESSFUL;
++
++oh_my_gawd:
++
++ /*
++ * IOC3 is fucked fucked beyond believe ... Don't even give the
++ * generic PCI code a chance to touch the wrong register.
++ */
++ if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
++ return PCIBIOS_SUCCESSFUL;
++
++ /*
++ * IOC3 is fucked fucked beyond believe ... Don't try to access
++ * anything but 32-bit words ...
++ */
++ addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
++
++ if (get_dbe(cf, (u32 *) addr))
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ shift = ((where & 3) << 3);
++ mask = (0xffffffffU >> ((4 - size) << 3));
++ smask = mask << shift;
++
++ cf = (cf & ~smask) | ((value & mask) << shift);
++ if (put_dbe(cf, (u32 *) addr))
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ return PCIBIOS_SUCCESSFUL;
++}
++
++static int pci_write_config(struct pci_bus *bus, unsigned int devfn,
++ int where, int size, u32 value)
++{
++ return pci_conf0_write_config(bus, devfn, where, size, value);
++}
++
++static struct pci_ops bridge_pci_ops = {
++ .read = pci_read_config,
++ .write = pci_write_config,
++};
++
++unsigned int ip30_bridge_count=0;
++bridge_t *ip30_irq_bridge[64]={NULL};
++unsigned int ip30_irq_in_bridge[64]={0};
++unsigned int ip30_irq_assigned=PCIBR_IRQ_BASE;
++
++/* OK, spikey dildo time */
++#define AT_FAIL 0
++#define AT_D32 1
++#define AT_D64 2
++#define AT_DIO 3
++#define AT_WIN 4
++static char *at_names[]={"failed", "direct 32-bit", "direct 64-bit", "direct I/O", "window"};
++static unsigned int align(unsigned int ptr, unsigned int size)
++{
++ return (ptr+size-1)&~(size-1);
++}
++static inline unsigned int win_size(int n)
++{
++ return (n<2)?0x200000:0x100000;
++}
++static inline unsigned int win_base(int n)
++{
++ return (n<3)?(0x200000*(n+1)):(0x100000*(n+4));
++}
++static int startup_resource(struct pci_controller *hose, struct pci_dev *dev, int res)
++{
++ struct bridge_controller *bc = (struct bridge_controller *)hose;
++ struct resource *rs = &dev->resource[res];
++ bridge_t *bvma = (bridge_t *)bc->base;
++ int slot = PCI_SLOT(dev->devfn);
++ int is_be = bc->slot_be[slot];
++ int is_io = !!(rs->flags & IORESOURCE_IO);
++ unsigned int size = rs->end - rs->start + 1;
++ int at = AT_FAIL;
++ unsigned int base = 0;
++ unsigned long vma = 0;
++ unsigned int devio;
++ int i, j;
++
++ /* check for nonexistant resources */
++ if(size<2)
++ return 0;
++
++ /* try direct mappings first */
++ if(!is_io && !is_be) {
++ base = align(bc->d32_p, size);
++ vma = base + BRIDGE_PCI_MEM32_BASE;
++ bc->d32_p = base + size;
++ at = AT_D32;
++ }
++ if(is_io && !is_be && bc->bridge_rev>=BRIDGE_REV_D) {
++ base = align(bc->dio_p, size);
++ vma = base + BRIDGE_PCI_IO_BASE;
++ bc->dio_p = base + size;
++ at = AT_DIO;
++ }
++
++ /* OK, that failed, try finding a compatible DevIO */
++ if(at == AT_FAIL)
++ for(j=0;j<8;j++) {
++ i = (j+slot)&7;
++ if(bc->win_p[i] && bc->win_io[i] == is_io && bc->win_be[i] == is_be)
++ if(align(bc->win_p[i], size)+size <= win_size(i)) {
++ base = align(bc->win_p[i], size);
++ bc->win_p[i] = base + size;
++ base += win_base(i);
++ vma = base;
++ at = AT_WIN;
++ break;
++ }
++ }
++
++ /* if everything else fails, allocate a new DevIO */
++ if(at == AT_FAIL)
++ for(j=0;j<8;j++) {
++ i = (j+slot)&7;
++ if(!bc->win_p[i] && size <= win_size(i)) {
++ bc->win_p[i] = size;
++ bc->win_io[i] = is_io;
++ bc->win_be[i] = is_be;
++ base = win_base(i);
++ vma = base;
++ at = AT_WIN;
++ /* set the DevIO params */
++ devio = bvma->b_device[i].reg;
++ if(is_be)
++ devio |= BRIDGE_DEV_DEV_SWAP;
++ else
++ devio &= ~BRIDGE_DEV_DEV_SWAP;
++ if(is_io)
++ devio &= ~BRIDGE_DEV_DEV_IO_MEM;
++ else
++ devio |= BRIDGE_DEV_DEV_IO_MEM;
++ devio &= ~BRIDGE_DEV_OFF_MASK;
++ devio |= win_base(i) >> BRIDGE_DEV_OFF_ADDR_SHFT;
++ bvma->b_device[i].reg = devio;
++ break;
++ }
++ }
++
++ /* get real VMA */
++ if(vma < 0xC00000)
++ vma += NODE_SWIN_BASE(bc->nasid, bc->widget_id);
++ else
++ vma += NODE_BWIN_BASE(bc->nasid, bc->widget_id);
++
++ /* dump useless info to console */
++ if(at != AT_FAIL)
++ printk(KERN_INFO "BRIDGE: %s #%d, size 0x%x for %s-endian %s --> %s at bus 0x%08x vma 0x%016lx\n",
++ is_io?"IO":"Memory", res, size, is_be?"big":"little", pci_name(dev), at_names[at], base, vma);
++ else
++ printk(KERN_INFO "BRIDGE: %s #%d, size 0x%x for %s-endian %s --> %s\n",
++ is_io?"IO":"Memory", res, size, is_be?"big":"little", pci_name(dev), at_names[at]);
++
++ if(at == AT_FAIL)
++ return -ENOMEM;
++
++ /* set the device resource to the new address */
++ rs->start = vma;
++ rs->end = vma+size-1;
++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + 4*res, &devio);
++ devio &= 15;
++ devio |= base&~15;
++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4*res, devio);
++
++ return 0;
++}
++
++int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid)
++{
++ struct bridge_controller *bc;
++ static int num_bridges = 0;
++ bridge_t *bridge;
++ int i;
++
++ printk(KERN_INFO "BRIDGE chip at xtalk:%d, initializing...\n", widget_id);
++
++ /* XXX: kludge alert.. */
++ if (!num_bridges)
++ ioport_resource.end = ~0UL;
++
++ bc = &bridges[num_bridges];
++
++ bc->pc.pre_enable = startup_resource;
++
++ bc->pc.pci_ops = &bridge_pci_ops;
++ bc->pc.mem_resource = &bc->mem;
++ bc->pc.io_resource = &bc->io;
++
++ bc->pc.index = num_bridges;
++
++ bc->mem.name = "Bridge PCI MEM";
++ bc->mem.start = NODE_SWIN_BASE(0, widget_id) + PCIBR_OFFSET_MEM;
++ bc->mem.end = NODE_SWIN_BASE(0, widget_id) + PCIBR_OFFSET_IO - 1;
++ bc->pc.mem_offset = NODE_SWIN_BASE(0, widget_id);
++ bc->mem.flags = IORESOURCE_MEM;
++
++ bc->io.name = "Bridge IO MEM";
++ bc->io.start = NODE_SWIN_BASE(0, widget_id) + PCIBR_OFFSET_IO;
++ bc->io.end = NODE_SWIN_BASE(0, widget_id) + PCIBR_OFFSET_END - 1;
++ bc->pc.io_offset = NODE_SWIN_BASE(0, widget_id);
++ bc->io.flags = IORESOURCE_IO;
++
++ bc->irq_cpu = smp_processor_id();
++ bc->widget_id = widget_id;
++ bc->nasid = nasid;
++
++ /* set direct allocation base */
++ bc->dio_p = 0x1000000;
++ bc->d32_p = 0x1000000;
++
++ bc->baddr = (u64)masterwid << 60;
++ bc->baddr |= (1UL << 56); /* Barrier set */
++
++ /*
++ * point to this bridge
++ */
++ bridge = (bridge_t *) RAW_NODE_SWIN_BASE(nasid, widget_id);
++
++ bc->bridge_rev = bridge->b_wid_id >> 28;
++
++ /*
++ * Clear all pending interrupts.
++ */
++ bridge->b_int_rst_stat = BRIDGE_IRR_ALL_CLR;
++
++ /*
++ * Until otherwise set up, assume all interrupts are from slot 0
++ */
++ bridge->b_int_device = 0x0;
++
++ /*
++ * Fix the initial b_device configuration.
++ */
++ bridge->b_wid_control &= ~(BRIDGE_CTRL_IO_SWAP | BRIDGE_CTRL_MEM_SWAP);
++
++ for(i=0;i<8;i++)
++ bridge->b_device[i].reg = 0x12091000;
++
++ /*
++ * Configure direct-mapped DMA
++ */
++ bridge->b_dir_map = (masterwid << BRIDGE_DIRMAP_W_ID_SHFT) | BRIDGE_DIRMAP_ADD512;
++
++ /*
++ * Allocate the RRBs randomly.
++ *
++ * No, I'm joking :)
++ * These are occult numbers of the Black Priesthood of Ancient Mu.
++ */
++
++ bridge->b_even_resp = 0x8888ba98;
++ bridge->b_odd_resp = 0x8888ba98;
++
++ /*
++ * Route all PCI bridge interrupts to the HEART ASIC. The idea is
++ * that we cause the bridge to send an Xtalk write to a specified
++ * interrupt register (0x80 for HEART, 0x90 for HUB) in a defined
++ * widget. The actual IRQ support and masking is done elsewhere.
++ */
++ bridge->b_wid_int_upper = masterwid << 16;
++ bridge->b_wid_int_lower = 0x00000080;
++ /*
++ * We map the IRQs to slots in a straightforward way.
++ */
++ bc->irq_base=ip30_irq_assigned;
++ for(i=0;i<8;i++) {
++ bridge->b_int_addr[i].addr=ip30_irq_assigned;
++ ip30_irq_bridge[ip30_irq_assigned]=bridge;
++ ip30_irq_in_bridge[ip30_irq_assigned]=i;
++ ip30_irq_assigned++;
++ }
++ bridge->b_int_device&=0xFF000000;
++ bridge->b_int_enable=0x7FFFFE00;
++ bridge->b_int_mode=0x00000000;
++ ip30_bridge_count++;
++
++ bridge->b_wid_tflush; /* wait until Bridge PIO complete */
++
++ bc->base = bridge;
++
++ register_pci_controller(&bc->pc);
++
++ num_bridges++;
++
++ return 0;
++}
++
++int __devinit pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
++{
++ struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
++
++ return bc->irq_base+slot;
++}
++
++/* Do platform specific device initialization at pci_enable_device() time */
++int pcibios_plat_dev_init(struct pci_dev *dev)
++{
++ return 0;
++}
++
++static inline void pci_disable_swapping_pio(struct pci_dev *dev)
++{
++ struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
++
++ bc->slot_be[PCI_SLOT(dev->devfn)] = 1;
++}
++
++static inline void pci_disable_swapping_dma(struct pci_dev *dev)
++{
++ struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
++ bridge_t *bvma = (bridge_t *)bc->base;
++ unsigned int devio;
++ int slot = PCI_SLOT(dev->devfn);
++
++ bc->slot_bs[slot] = 1;
++ devio = bvma->b_device[slot].reg;
++ devio &= ~(BRIDGE_DEV_SWAP_PMU | BRIDGE_DEV_SWAP_DIR);
++ bvma->b_device[slot].reg = devio;
++}
++
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
++ pci_disable_swapping_dma);
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_RAD1,
++ pci_disable_swapping_dma);
+diff -urN linux-2.6.12-ioc3/arch/mips/pci/pci.c linux-2.6.12-ip30/arch/mips/pci/pci.c
+--- linux-2.6.12-ioc3/arch/mips/pci/pci.c 2004-12-16 13:55:01.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/pci/pci.c 2005-07-10 13:32:04.000000000 +0200
+@@ -119,6 +119,10 @@
+ /* Scan all of the recorded PCI controllers. */
+ for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
+
++ if (hose->pre_scan)
++ if(hose->pre_scan(hose) < 0)
++ goto out;
++
+ if (request_resource(&iomem_resource, hose->mem_resource) < 0)
+ goto out;
+ if (request_resource(&ioport_resource, hose->io_resource) < 0)
+@@ -131,6 +135,10 @@
+ hose->bus = bus;
+ hose->need_domain_info = need_domain_info;
+ next_busno = bus->subordinate + 1;
++
++ if (hose->post_scan)
++ hose->post_scan(hose, bus);
++
+ /* Don't allow 8-bit bus number overflow inside the hose -
+ reserve some space for bridges. */
+ if (next_busno > 224) {
+@@ -161,6 +169,7 @@
+ u16 cmd, old_cmd;
+ int idx;
+ struct resource *r;
++ struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
+
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+ old_cmd = cmd;
+@@ -169,6 +178,10 @@
+ if (!(mask & (1<<idx)))
+ continue;
+
++ if(hose->pre_enable)
++ if(hose->pre_enable(hose, dev, idx) < 0)
++ return -EINVAL;
++
+ r = &dev->resource[idx];
+ if (!r->start && r->end) {
+ printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/Makefile linux-2.6.12-ip30/arch/mips/sgi-ip30/Makefile
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/Makefile 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,8 @@
++#
++# Makefile for the IP30 specific kernel interface routines under Linux.
++#
++
++obj-y := ip30-setup.o ip30-irq.o ip30-irq-glue.o ip30-timer.o ip30-err.o ip30-xtalk.o ip30-power.o
++obj-$(CONFIG_SMP) += ip30-smp.o ip30-smp-glue.o
++
++EXTRA_AFLAGS := $(CFLAGS)
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-err.c linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-err.c
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-err.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-err.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,37 @@
++/*
++ * ip30-err.c: HEART error handling for IP30 architecture.
++ *
++ * Copyright (C) 2004 Stanislaw Skowronek (skylark at linux-mips.org)
++ */
++
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++#include <linux/errno.h>
++#include <linux/signal.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/time.h>
++#include <linux/timex.h>
++#include <linux/slab.h>
++#include <linux/random.h>
++#include <linux/smp_lock.h>
++#include <linux/kernel_stat.h>
++#include <linux/delay.h>
++
++#include <asm/mach-ip30/heart.h>
++
++void ip30_do_err(struct pt_regs *regs)
++{
++ unsigned long errors = *HEART_ISR;
++ int i;
++ irq_enter();
++ *HEART_CLR_ISR = 0xFFF8000000000000;
++ printk("IP30: HEART ATTACK! Caught errors: 0x%04x!\n",(int)((errors>>51)&0x1FFF));
++ for(i=63;i>=51;i--)
++ if((errors>>i)&1)
++ printk(" interrupt #%d\n",i);
++ irq_exit();
++}
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-irq-glue.S linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-irq-glue.S
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-irq-glue.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-irq-glue.S 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,54 @@
++/*
++ * Copyright (C) 2004,5 Stanislaw Skowronek
++ * based on ip27-irq-glue.S:
++ * Copyright (C) 1999 Ralf Baechle
++ * Copyright (C) 1999 Silicon Graphics
++ */
++#include <asm/asm.h>
++#include <asm/mipsregs.h>
++#include <asm/regdef.h>
++#include <asm/stackframe.h>
++
++ .text
++ .set noat
++ .set reorder
++ .align 5
++NESTED(ip30_irq, PT_SIZE, sp)
++ SAVE_ALL
++ CLI
++ .set at
++ mfc0 s0, CP0_CAUSE
++ mfc0 t0, CP0_STATUS
++ and s0, t0
++
++ /* Check for CPU timer, IRQ60-63 */
++1: andi a0, s0, CAUSEF_IP7
++ beqz a0, 1f
++
++ move a0, sp
++ jal cpu_do_irq
++
++ j ret_from_irq
++
++ /* Check for HEART-routed IRQs, IRQ0-50. */
++1: andi a0, s0, (CAUSEF_IP2 | CAUSEF_IP3 | CAUSEF_IP4 | CAUSEF_IP5)
++ beqz a0, 1f
++
++ move a0, sp
++ jal ip30_do_irq
++
++ j ret_from_irq
++
++ /* Check for HEART-routed ERRs, ERR51-63. */
++1: andi a0, s0, CAUSEF_IP6
++ beqz a0, 1f
++
++ move a0, sp
++ jal ip30_do_err
++
++ j ret_from_irq
++
++ /* Ignore IP0, IP1 (sw int) */
++1:
++ j ret_from_irq
++ END(ip30_irq)
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-irq.c linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-irq.c
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-irq.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-irq.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,304 @@
++/*
++ * ip30-irq.c: Highlevel interrupt handling for IP30 architecture.
++ *
++ * Copyright (C) 2004,5 Stanislaw Skowronek <skylark at linux-mips.org>
++ * Inspired by ip27-irq.c and ip32-irq.c
++ */
++
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++#include <linux/errno.h>
++#include <linux/signal.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/timex.h>
++#include <linux/slab.h>
++#include <linux/random.h>
++#include <linux/smp.h>
++#include <linux/smp_lock.h>
++#include <linux/kernel_stat.h>
++#include <linux/delay.h>
++
++#include <asm/mach-ip30/heart.h>
++#include <asm/mach-ip30/pcibr.h>
++#include <asm/pci/bridge.h>
++
++#undef DEBUG_IRQ
++#undef DEBUG_IRQ_SET
++
++#define DYNAMIC_IRQ_START 64
++
++#ifndef CONFIG_SMP
++#define cpu_logical_map(x) 0
++#define cpu_next_pcpu(x) 0
++#endif
++
++/* CPU IRQ */
++
++void ip30_timer_bcast(void);
++
++void cpu_do_irq(struct pt_regs *regs)
++{
++#ifdef CONFIG_SMP
++ ip30_timer_bcast();
++#endif
++ do_IRQ(TIMER_IRQ, regs);
++}
++
++static void enable_cpu_irq(unsigned int irq)
++{
++ set_c0_status(STATUSF_IP7);
++}
++
++static unsigned int startup_cpu_irq(unsigned int irq)
++{
++ enable_cpu_irq(irq);
++ return 0;
++}
++
++static void disable_cpu_irq(unsigned int irq)
++{
++ clear_c0_status(STATUSF_IP7);
++}
++
++static void end_cpu_irq(unsigned int irq)
++{
++ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
++ enable_cpu_irq (irq);
++}
++
++#define shutdown_cpu_irq disable_cpu_irq
++#define mask_and_ack_cpu_irq disable_cpu_irq
++
++static struct hw_interrupt_type cpu_irq_type = {
++ "CPU",
++ startup_cpu_irq,
++ shutdown_cpu_irq,
++ enable_cpu_irq,
++ disable_cpu_irq,
++ mask_and_ack_cpu_irq,
++ end_cpu_irq,
++ NULL
++};
++
++/* real HEART IRQs */
++
++int heart_irq_thisowner;
++static int heart_irq_owner[SOFT_IRQ_COUNT];
++
++void ip30_do_irq(struct pt_regs *regs)
++{
++ unsigned int pcpu=cpu_logical_map(smp_processor_id());
++ unsigned long irqs=((*HEART_ISR)&0x0007FFFFFFFFFFFF)&(*HEART_IMR(pcpu));
++ unsigned long irqsel;
++ int irqnum;
++#ifdef DEBUG_IRQ
++ if(irqs&~(15UL<<IRQ_TIMER_P(0)))
++ printk("IP30: received HEART IRQs: 0x%016lx (mask 0x%016lx) PCPU%d\n",*HEART_ISR,*HEART_IMR(pcpu),pcpu);
++#endif
++ /* check for all IRQs in decreasing priority order */
++ irqsel=0x0004000000000000;
++ irqnum=50;
++ while(irqsel) { /* poll all interrupts according to priority */
++ if(irqs & irqsel)
++ do_IRQ(irqnum, regs);
++ irqsel>>=1;
++ irqnum--;
++ }
++}
++
++static void enable_heart_irq(unsigned int irq)
++{
++ unsigned long flags;
++ local_irq_save(flags);
++ *HEART_IMR(heart_irq_owner[irq])|=1UL<<irq;
++ local_irq_restore(flags);
++}
++
++static unsigned int startup_heart_irq(unsigned int irq)
++{
++ unsigned long flags;
++ unsigned int device;
++ unsigned int pcpu;
++ if(irq<IRQ_TIMER_P(0) || irq>IRQ_IPI_P(3))
++ pcpu=heart_irq_thisowner=cpu_next_pcpu(heart_irq_thisowner);
++ else
++ pcpu=cpu_logical_map(smp_processor_id());
++#ifdef DEBUG_IRQ_SET
++ printk("IP30: start up IRQ%d for PCPU%d\n",irq,pcpu);
++#endif
++ local_irq_save(flags);
++ if(heart_irq_owner[irq]!=-1) {
++ printk(KERN_ERR "IP30: ambiprocessorous IRQ startup request (is %d, was %d).\n", pcpu, heart_irq_owner[irq]);
++ local_irq_restore(flags);
++ return 0;
++ }
++ heart_irq_owner[irq]=pcpu;
++ *HEART_CLR_ISR=1UL<<irq; /* clear IRQ flag */
++ *HEART_IMR(heart_irq_owner[irq])|=1UL<<irq; /* unmask IRQ */
++ if(ip30_irq_bridge[irq]) {
++ ip30_irq_bridge[irq]->b_int_enable|=1<<ip30_irq_in_bridge[irq];
++ ip30_irq_bridge[irq]->b_int_mode|=1<<ip30_irq_in_bridge[irq];
++ device=ip30_irq_bridge[irq]->b_int_device;
++ device&=~(7<<(ip30_irq_in_bridge[irq]*3));
++ device|=(ip30_irq_in_bridge[irq]<<(ip30_irq_in_bridge[irq]*3));
++ ip30_irq_bridge[irq]->b_int_device=device;
++ ip30_irq_bridge[irq]->b_widget.w_tflush;
++ }
++ local_irq_restore(flags);
++ return 0; /* This is probably not right; we could have pending irqs */
++}
++
++static void disable_heart_irq(unsigned int irq)
++{
++ unsigned long flags;
++ local_irq_save(flags);
++ *HEART_IMR(heart_irq_owner[irq])&=~(1UL<<irq);
++ local_irq_restore(flags);
++}
++
++static void shutdown_heart_irq(unsigned int irq)
++{
++ unsigned long flags;
++#ifdef DEBUG_IRQ_SET
++ printk("IP30: shutdown IRQ%d\n",irq);
++#endif
++ local_irq_save(flags);
++ *HEART_IMR(heart_irq_owner[irq])&=~(1UL<<irq); /* mask IRQ */
++ if(ip30_irq_bridge[irq])
++ ip30_irq_bridge[irq]->b_int_enable&=~(1<<ip30_irq_in_bridge[irq]);
++ heart_irq_owner[irq]=-1;
++ local_irq_restore(flags);
++}
++
++static void mask_and_ack_heart_irq (unsigned int irq)
++{
++ unsigned long flags;
++ local_irq_save(flags);
++ if(irq>=IRQ_TIMER_P(0) && irq<=IRQ_IPI_P(3))
++ *HEART_CLR_ISR=1UL<<irq;
++ if(!ip30_irq_bridge[irq])
++ *HEART_ISR=1UL<<irq;
++ *HEART_IMR(heart_irq_owner[irq])&=~(1UL<<irq);
++ local_irq_restore(flags);
++}
++
++static void end_heart_irq(unsigned int irq)
++{
++ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
++ enable_heart_irq(irq);
++}
++
++static struct hw_interrupt_type heart_irq_type = {
++ "HEART",
++ startup_heart_irq,
++ shutdown_heart_irq,
++ enable_heart_irq,
++ disable_heart_irq,
++ mask_and_ack_heart_irq,
++ end_heart_irq,
++ NULL
++};
++
++/* dynamic pseudo-IRQs */
++
++static void do_nothing_irq(unsigned int irq)
++{
++}
++
++static unsigned int do_nothing_irq_i(unsigned int irq)
++{
++ return 0;
++}
++
++static struct hw_interrupt_type dynamic_irq_type_allocated = {
++ "Allocated",
++ do_nothing_irq_i,
++ do_nothing_irq,
++ do_nothing_irq,
++ do_nothing_irq,
++ do_nothing_irq,
++ do_nothing_irq,
++ NULL
++};
++
++static struct hw_interrupt_type dynamic_irq_type_free = {
++ "Free",
++ do_nothing_irq_i,
++ do_nothing_irq,
++ do_nothing_irq,
++ do_nothing_irq,
++ do_nothing_irq,
++ do_nothing_irq,
++ NULL
++};
++
++int new_dynamic_irq(void)
++{
++ int i;
++ for(i=0;i<NR_IRQS;i++)
++ if(irq_desc[i].handler==&dynamic_irq_type_free)
++ break;
++ if(i==NR_IRQS)
++ return -1;
++ irq_desc[i].handler = &dynamic_irq_type_allocated;
++ return i;
++}
++
++void delete_dynamic_irq(int irq)
++{
++ irq_desc[irq].handler = &dynamic_irq_type_free;
++}
++
++void call_dynamic_irq(int irq, struct pt_regs *regs)
++{
++ do_IRQ(irq, regs);
++}
++
++/* setup procedure */
++
++extern asmlinkage void ip30_irq(void);
++
++void __init arch_init_irq(void)
++{
++ int i;
++/* install our interrupt handler */
++ set_except_vector(0, ip30_irq);
++ *HEART_CLR_ISR=0xFFFFFFFFFFFFFFFF; /* acknowledge everything */
++ *HEART_IMR(0)=0x0000000000000000; /* mask all IRQs, leave errors on */
++ *HEART_IMR(1)=0x0000000000000000;
++ *HEART_IMR(2)=0x0000000000000000;
++ *HEART_IMR(3)=0x0000000000000000;
++ *HEART_IMR(cpu_logical_map(0))=0x7FF8000000000000;
++ for(i=0;i<SOFT_IRQ_COUNT;i++) {
++ irq_desc[i].status = IRQ_DISABLED;
++ irq_desc[i].action = 0;
++ irq_desc[i].depth = 1;
++ irq_desc[i].handler = &heart_irq_type;
++ heart_irq_owner[i] = -1;
++ }
++ irq_desc[TIMER_IRQ].status = IRQ_DISABLED;
++ irq_desc[TIMER_IRQ].action = 0;
++ irq_desc[TIMER_IRQ].depth = 1;
++ irq_desc[TIMER_IRQ].handler = &cpu_irq_type;
++ for(i=DYNAMIC_IRQ_START;i<NR_IRQS;i++) {
++ irq_desc[i].status = IRQ_DISABLED;
++ irq_desc[i].action = 0;
++ irq_desc[i].depth = 1;
++ irq_desc[i].handler = &dynamic_irq_type_free;
++ }
++/* mask IP0, IP1 (sw int) */
++ change_c0_status(ST0_IM, STATUSF_IP2|STATUSF_IP3|STATUSF_IP4|STATUSF_IP5|STATUSF_IP6|STATUSF_IP7);
++ set_c0_status(ST0_IE);
++ printk("IP30: interrupt controller initialized.\n");
++}
++
++void ip30_secondary_init_irq(void)
++{
++ int pcpu=cpu_logical_map(smp_processor_id());
++ *HEART_IMR(pcpu)=0x0000000000000000;
++ change_c0_status(ST0_IM, STATUSF_IP2|STATUSF_IP3|STATUSF_IP4|STATUSF_IP5|STATUSF_IP6);
++}
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-power.c linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-power.c
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-power.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-power.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,62 @@
++/*
++ * ip30-power.c: Software powerdown and reset handling for IP30 architecture.
++ *
++ * Copyright (C) 2004 Stanislaw Skowronek <skylark at linux-mips.org>
++ */
++
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/sched.h>
++#include <linux/smp.h>
++#include <linux/time.h>
++#include <linux/console.h>
++#include <linux/tty.h>
++#include <linux/delay.h>
++
++#include <asm/mach-ip30/heart.h>
++#include <asm/reboot.h>
++#include <asm/time.h>
++#include <asm/io.h>
++
++void ip30_machine_restart(char *command)
++{
++ printk("Rebooting...");
++#ifdef CONFIG_SMP
++ smp_send_stop();
++ udelay(1000);
++#endif
++ /* execute HEART cold reset */
++ *HEART_MODE|=(1UL<<23);
++}
++
++void ip30_soft_powerdown(void);
++
++void ip30_machine_power_off(void)
++{
++#ifdef CONFIG_SGI_IP30_RTC
++ printk("Powering down, please wait...");
++#ifdef CONFIG_SMP
++ smp_send_stop();
++ udelay(1000);
++#endif
++ /* kill interrupts */
++ *HEART_CLR_ISR=0xFFFFFFFFFFFFFFFF;
++ *HEART_IMR(0)=0x0000000000000000;
++ *HEART_IMR(1)=0x0000000000000000;
++ *HEART_IMR(2)=0x0000000000000000;
++ *HEART_IMR(3)=0x0000000000000000;
++ /* execute RTC powerdown */
++ ip30_soft_powerdown();
++#else
++ printk("RTC support is required to power down.\n");
++ printk("System halted.\n");
++ while(1);
++#endif
++}
++
++void ip30_machine_halt(void)
++{
++ ip30_machine_power_off();
++}
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-setup.c linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-setup.c
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-setup.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-setup.c 2005-07-11 18:07:34.000000000 +0200
+@@ -0,0 +1,74 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * SGI IP30 specific setup.
++ *
++ * Copyright (C) 2004,5 Stanislaw Skowronek <skylark at linux-mips.org>
++ */
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/sched.h>
++#include <linux/smp.h>
++#include <linux/time.h>
++#include <linux/console.h>
++#include <linux/tty.h>
++
++#include <asm/bootinfo.h>
++#include <asm/reboot.h>
++#include <asm/time.h>
++#include <asm/io.h>
++#include <asm/mach-ip30/heart.h>
++
++extern void ip30_machine_restart(char *command);
++extern void ip30_machine_halt(void);
++extern void ip30_machine_power_off(void);
++
++extern void ip30_xtalk_setup(void);
++
++extern void __init ip30_time_init(void);
++extern void ip30_timer_setup(struct irqaction *irq);
++
++extern int ip30_locate_bootcpu(void);
++
++static unsigned long ip30_size_memory(void)
++{
++ unsigned long result = 0;
++ unsigned int *memcfg = (unsigned int *)HEART_MEMCFG0;
++ int i;
++
++ for(i=0;i<8;i++)
++ if(memcfg[i]&HEART_MEMCFG_VLD)
++ result += ((memcfg[i]&HEART_MEMCFG_RAM_MSK) >> HEART_MEMCFG_RAM_SHFT) + 1;
++ return result << HEART_MEMCFG_UNIT_SHFT;
++}
++
++static void ip30_fix_memory(void)
++{
++ unsigned long size = ip30_size_memory();
++ printk(KERN_INFO "Detected %ld MB of physical memory.\n", size >> 20);
++ if(size > 0x40000000) {
++ printk(KERN_INFO "Updating PROM memory size.\n");
++ add_memory_region(0x60000000, size - 0x40000000, BOOT_MEM_RAM);
++ }
++}
++
++int __init plat_setup(void)
++{
++ printk("Silicon Graphics Octane (IP30) support: (c) 2004, 2005 Stanislaw Skowronek.\n");
++ set_io_port_base(0x9000000000000000);
++ board_timer_setup = ip30_timer_setup;
++ board_time_init = ip30_time_init;
++ _machine_restart = ip30_machine_restart;
++ _machine_halt = ip30_machine_halt;
++ _machine_power_off = ip30_machine_power_off;
++ ip30_fix_memory();
++ ip30_xtalk_setup();
++#ifdef CONFIG_SMP
++ ip30_locate_bootcpu();
++#endif
++ return 0;
++}
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-smp-glue.S linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-smp-glue.S
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-smp-glue.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-smp-glue.S 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,17 @@
++/*
++ * Copyright (C) 2005 Stanislaw Skowronek
++ */
++
++#include <asm/asm.h>
++#include <asm/mipsregs.h>
++#include <asm/regdef.h>
++#include <asm/stackframe.h>
++
++ .text
++ .set noat
++ .set reorder
++ .align 5
++LEAF(ip30_smp_bootstrap)
++ move gp, a0
++ j smp_bootstrap
++ END(ip30_smp_bootstrap)
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-smp.c linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-smp.c
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-smp.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-smp.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,142 @@
++/*
++ * ip30-smp.c: SMP on IP30 architecture.
++ *
++ * Copyright (C) 2005 Stanislaw Skowronek <skylark at linux-mips.org>
++ */
++
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/smp.h>
++#include <linux/interrupt.h>
++#include <linux/kernel_stat.h>
++#include <linux/spinlock.h>
++
++#include <asm/mmu_context.h>
++#include <asm/mach-ip30/heart.h>
++#include <asm/mach-ip30/racermp.h>
++
++#undef DEBUG_IPI
++
++extern void asmlinkage ip30_smp_bootstrap(void);
++extern void ip30_time_init(void);
++extern void ip30_secondary_init_irq(void);
++
++static spinlock_t ipi_mbx_lock=SPIN_LOCK_UNLOCKED;
++static volatile unsigned int ipi_mailbox[NR_CPUS];
++
++extern unsigned int (*mips_hpt_read)(void);
++extern void (*mips_hpt_init)(unsigned int);
++extern void ip30_secondary_timer_setup(void);
++
++void core_send_ipi(int cpu, unsigned int action)
++{
++ unsigned long flags;
++#ifdef DEBUG_IPI
++ if(action==SMP_CALL_FUNCTION)
++ printk("KERN_INFO IPI call_function TX -> %d\n",cpu);
++#endif
++ spin_lock_irqsave(&ipi_mbx_lock,flags);
++ ipi_mailbox[cpu]|=action;
++ spin_unlock_irqrestore(&ipi_mbx_lock,flags);
++ *HEART_SET_ISR=1UL<<(IRQ_IPI_P(cpu));
++}
++
++int cpu_next_pcpu(int pcpu)
++{
++ int i;
++ for(i=(pcpu+1)%MP_NCPU;!cpu_isset(i,phys_cpu_present_map);i=(i+1)%MP_NCPU)
++ if(i==pcpu)
++ return pcpu;
++ return i;
++}
++
++irqreturn_t ip30_mailbox_irq(int irq, void *dev, struct pt_regs *regs)
++{
++ int cpu=smp_processor_id();
++ int mbx;
++ spin_lock(&ipi_mbx_lock);
++ mbx=ipi_mailbox[cpu];
++ ipi_mailbox[cpu]=0;
++ spin_unlock(&ipi_mbx_lock);
++ if(mbx&SMP_RESCHEDULE_YOURSELF)
++ /* ignore - reschedule after IRQ */ ;
++ if(mbx&SMP_CALL_FUNCTION) {
++ smp_call_function_interrupt();
++#ifdef DEBUG_IPI
++ printk("KERN_INFO IPI call_function RX -> %d\n",smp_processor_id());
++#endif
++ }
++ return IRQ_HANDLED;
++}
++
++void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs);
++void ip30_timer_bcast(void)
++{
++ int i;
++ for(i=1;i<NR_CPUS;i++)
++ if(cpu_isset(i,cpu_present_map))
++ *HEART_SET_ISR=1UL<<(IRQ_TIMER_P(i));
++}
++irqreturn_t ip30_secondary_timer_irq(int irq, void *dev, struct pt_regs *regs)
++{
++ unsigned long flags;
++ local_irq_save(flags);
++ local_timer_interrupt(irq,dev,regs);
++ local_irq_restore(flags);
++ return IRQ_HANDLED;
++}
++
++int ip30_locate_bootcpu(void)
++{
++ int i,j;
++ cpus_clear(phys_cpu_present_map);
++ for(i=0,j=0;i<MP_NCPU;i++)
++ if(MP_MAGIC(i)==MPCONF_MAGIC && MP_VIRTID(i)<NR_CPUS) {
++ cpu_set(i, phys_cpu_present_map);
++ __cpu_number_map[i]=MP_VIRTID(i);
++ __cpu_logical_map[MP_VIRTID(i)]=i;
++ j++;
++ }
++ return j;
++}
++
++void __init prom_build_cpu_map(void)
++{
++ int num=ip30_locate_bootcpu();
++ printk("Detected %d enabled CPU(s).\n", num);
++}
++
++void prom_prepare_cpus(unsigned int max_cpus)
++{
++}
++
++void prom_boot_secondary(int cpu, struct task_struct *idle)
++{
++ int pcpu=cpu_logical_map(cpu);
++ MP_STACKADDR(pcpu)=__KSTK_TOS(idle);
++ MP_LPARM(pcpu)=(unsigned long)idle->thread_info;
++ MP_LAUNCH(pcpu)=ip30_smp_bootstrap;
++}
++
++void prom_init_secondary(void)
++{
++ ip30_secondary_init_irq();
++ mips_hpt_init(mips_hpt_read());
++}
++
++void prom_smp_finish(void)
++{
++ int cpu=smp_processor_id();
++ if(request_irq(IRQ_IPI_P(cpu),ip30_mailbox_irq,0,"SMP IPI",NULL))
++ printk("IP30: IPI allocation for CPU%d failed.\n",cpu);
++ if(request_irq(IRQ_TIMER_P(cpu),ip30_secondary_timer_irq,0,"SMP TIMER",NULL))
++ printk("IP30: TIMER allocation for CPU%d failed.\n",cpu);
++ local_irq_enable();
++}
++
++void prom_cpus_done(void)
++{
++ int cpu=smp_processor_id();
++ if(request_irq(IRQ_IPI_P(cpu),ip30_mailbox_irq,0,"SMP IPI",NULL))
++ printk("IP30: IPI allocation for CPU%d failed.\n",cpu);
++}
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-timer.c linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-timer.c
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-timer.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-timer.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,47 @@
++/*
++ * ip30-timer.c: Timer handling for IP30 architecture.
++ *
++ * Copyright (C) 2004,5 Stanislaw Skowronek <skylark at linux-mips.org>
++ * Inspired by ip32-timer.c
++ */
++
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++#include <linux/errno.h>
++#include <linux/signal.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/time.h>
++#include <linux/timex.h>
++#include <linux/slab.h>
++#include <linux/random.h>
++#include <linux/smp_lock.h>
++#include <linux/kernel_stat.h>
++#include <linux/delay.h>
++
++#include <asm/time.h>
++#include <asm/mipsregs.h>
++#include <asm/mmu_context.h>
++#include <asm/mach-ip30/heart.h>
++
++#define NSEC_PER_CYCLE 80
++#define CYCLES_PER_100MSEC (100000000/NSEC_PER_CYCLE)
++
++void __init ip30_time_init(void)
++{
++ unsigned long heart_compare;
++ printk("IP30: initializing timer.\n", heart_compare);
++ heart_compare = (*HEART_COUNT) + CYCLES_PER_100MSEC;
++ write_c0_count(0);
++ while ((*HEART_COUNT-heart_compare)&0x800000) ;
++ mips_hpt_frequency = read_c0_count() * 10;
++ printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000);
++}
++
++void __init ip30_timer_setup(struct irqaction *irq)
++{
++ setup_irq(TIMER_IRQ, irq);
++}
+diff -urN linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-xtalk.c linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-xtalk.c
+--- linux-2.6.12-ioc3/arch/mips/sgi-ip30/ip30-xtalk.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/arch/mips/sgi-ip30/ip30-xtalk.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,174 @@
++/*
++ * ip30-xtalk.c
++ * (c) 2004, 2005 Stanislaw Skowronek
++ *
++ * XIO bus probing code
++ */
++
++#include <linux/config.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++#include <linux/errno.h>
++#include <linux/signal.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/time.h>
++#include <linux/timex.h>
++#include <linux/slab.h>
++#include <linux/random.h>
++#include <linux/smp_lock.h>
++#include <linux/kernel_stat.h>
++#include <linux/delay.h>
++
++#include <asm/mach-ip30/heart.h>
++#include <asm/mach-ip30/addrs.h>
++#include <asm/mach-ip30/pcibr.h>
++#include <asm/mach-ip30/xtalk.h>
++
++struct widget_ident {
++ unsigned mfgr;
++ unsigned part;
++ char *name;
++ char *revs[16];
++};
++
++static struct widget_ident widget_idents[]={
++ {
++ 0x0,
++ 0x0,
++ "XBow",
++ {NULL, "1.0", "1.1", "1.2", "1.3", "2.0", NULL}
++ },
++ {
++ 0x0,
++ 0xd000,
++ "XXBow",
++ {NULL, "1.0", "2.0", NULL}
++ },
++ {
++ 0x023,
++ 0xc013,
++ "Buzz / Odyssey",
++ {NULL, "A", "B", NULL}
++ },
++ {
++ 0x024,
++ 0xc202,
++ "TPU",
++ {"0", NULL}
++ },
++ {
++ 0x024,
++ 0xd002,
++ "XBridge",
++ {NULL, "A", "B", NULL}
++ },
++ {
++ 0x036,
++ 0xc001,
++ "Heart",
++ {NULL, "A", "B", "C", "D", "E", "F", NULL}
++ },
++ {
++ 0x036,
++ 0xc002,
++ "Bridge",
++ {NULL, "A", "B", "C", "D", NULL}
++ },
++ {
++ 0x036,
++ 0xc101,
++ "Hub",
++ {NULL, "1.0", "2.0", "2.1", "2.2", "2.3", "2.4", NULL}
++ },
++ {
++ 0x036,
++ 0xc110,
++ "Bedrock",
++ {NULL, "1.0", "1.1", NULL}
++ },
++ {
++ 0x2aa,
++ 0xc003,
++ "HQ4 / ImpactSR",
++ {NULL, "A", "B", NULL}
++ },
++ {
++ 0x2aa,
++ 0xc102,
++ "XG / KONA",
++ {NULL}
++ },
++ {
++ -1,
++ -1,
++ NULL,
++ {NULL}
++ }
++};
++
++extern int bridge_probe(nasid_t nasid, int widget, int masterwid);
++
++unsigned long ip30_xtalk_swin(int wid)
++{
++ return 0x10000000|(wid<<24);
++}
++
++unsigned ip30_xtalk_get_id(int wid)
++{
++ unsigned int link_stat;
++ if(wid!=0 && (wid<8 || wid>15))
++ return 0xffffffff;
++ if(wid) {
++ link_stat = *(volatile unsigned int *)(RAW_NODE_SWIN_BASE(0, 0) + 0x114 + 0x40 * (wid - 8));
++ if (!(link_stat & 0x80000000)) /* link alive */
++ return 0xffffffff;
++ }
++ return *(volatile unsigned int *)(RAW_NODE_SWIN_BASE(0, wid) + 0x4);
++}
++
++int ip30_xtalk_find(unsigned mfgr, unsigned part, int last)
++{
++ unsigned wid_id;
++ while(last>0) {
++ last--;
++ wid_id=ip30_xtalk_get_id(last);
++ if(((wid_id>>1)&0x7ff)==mfgr && ((wid_id>>12)&0xffff)==part)
++ return last;
++ }
++ return -1;
++}
++
++void __init ip30_xtalk_setup(void)
++{
++ int i;
++ unsigned int wid_id;
++ unsigned int wid_part, wid_mfgr, wid_rev;
++ struct widget_ident *res;
++ for(i=0; i<IP30_XTALK_NUM_WID; i++) {
++ wid_id = ip30_xtalk_get_id(i);
++ if (wid_id != 0xffffffff) {
++ printk(KERN_INFO "xtalk: Detected ");
++ wid_mfgr = (wid_id >> 1) & 0x7ff;
++ wid_part = (wid_id >> 12) & 0xffff;
++ wid_rev = (wid_id >> 28) & 0xf;
++ for(res=widget_idents; res->name; res++)
++ if(res->mfgr == wid_mfgr && res->part == wid_part)
++ break;
++ if(res->name) {
++ printk(res->name);
++ if(res->revs[wid_rev])
++ printk(" (revision %s)", res->revs[wid_rev]);
++ else
++ printk(" (unknown revision %d)", wid_rev);
++ } else
++ printk("unknown widget 0x%08x", wid_id);
++ printk(" at %d.\n", i);
++ }
++ }
++ i=IP30_XTALK_NUM_WID;
++ while((i=ip30_xtalk_find(PCIBR_XTALK_MFGR,PCIBR_XTALK_PART,i))!=-1)
++ bridge_probe(0, i, IP30_WIDGET_HEART);
++}
+diff -urN linux-2.6.12-ioc3/drivers/char/Kconfig linux-2.6.12-ip30/drivers/char/Kconfig
+--- linux-2.6.12-ioc3/drivers/char/Kconfig 2005-07-09 13:35:08.000000000 +0200
++++ linux-2.6.12-ip30/drivers/char/Kconfig 2005-07-09 13:36:14.000000000 +0200
+@@ -397,6 +397,14 @@
+ Enable this if you have a SGI Origin or Octane machine. This module
+ provides serial port support for IOC3 chips on those systems.
+
++config SGI_IP30_LEDS
++ bool "SGI Octane LED support"
++ depends on SGI_IP30 && SGI_IOC3
++ help
++ If you say Y here and create a character special file /dev/leds with
++ major number 10 and minor number 42 using mknod ("man mknod"), you
++ will be able to control the lightbar on your Octane.
++
+ config QTRONIX_KEYBOARD
+ bool "Enable Qtronix 990P Keyboard Support"
+ depends on MIPS && (MIPS_ITE8172 || MIPS_IVR)
+@@ -789,6 +797,17 @@
+ via the file /proc/rtc and its behaviour is set by various ioctls on
+ /dev/rtc.
+
++config SGI_IP30_RTC
++ bool "SGI Octane RTC support"
++ depends on SGI_IP30 && SGI_IOC3
++ help
++ If you say Y here and create a character special file /dev/rtc with
++ major number 10 and minor number 135 using mknod ("man mknod"), you
++ will get access to the real time clock built into your computer.
++ Every SGI has such a clock built in. It reports status information
++ via the file /proc/rtc and its behaviour is set by various ioctls on
++ /dev/rtc.
++
+ config GEN_RTC
+ tristate "Generic /dev/rtc emulation"
+ depends on RTC!=y && !IA64 && !ARM
+diff -urN linux-2.6.12-ioc3/drivers/char/Makefile linux-2.6.12-ip30/drivers/char/Makefile
+--- linux-2.6.12-ioc3/drivers/char/Makefile 2005-07-09 13:35:08.000000000 +0200
++++ linux-2.6.12-ip30/drivers/char/Makefile 2005-07-09 13:36:14.000000000 +0200
+@@ -64,6 +64,8 @@
+ obj-$(CONFIG_EFI_RTC) += efirtc.o
+ obj-$(CONFIG_SGI_DS1286) += ds1286.o
+ obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
++obj-$(CONFIG_SGI_IP30_LEDS) += ip30-leds.o
++obj-$(CONFIG_SGI_IP30_RTC) += ip30-rtc.o
+ obj-$(CONFIG_SGI_IOC3_UART) += ioc3uart.o
+ obj-$(CONFIG_DS1302) += ds1302.o
+ obj-$(CONFIG_S3C2410_RTC) += s3c2410-rtc.o
+diff -urN linux-2.6.12-ioc3/drivers/char/ip30-leds.c linux-2.6.12-ip30/drivers/char/ip30-leds.c
+--- linux-2.6.12-ioc3/drivers/char/ip30-leds.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/drivers/char/ip30-leds.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,231 @@
++/*
++ * Driver for the LEDs in SGI Octane.
++ *
++ * Copyright (C) 2004 Stanislaw Skowronek
++ */
++
++#include <linux/bcd.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/miscdevice.h>
++#include <linux/ioport.h>
++#include <linux/fcntl.h>
++#include <linux/rtc.h>
++#include <linux/init.h>
++#include <linux/poll.h>
++#include <linux/proc_fs.h>
++#include <linux/smp_lock.h>
++#include <linux/delay.h>
++
++#include <linux/miscdevice.h>
++#include <linux/leds.h>
++
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <asm/system.h>
++
++#include <linux/ioc3.h>
++
++#define LEDS_STREAM_SIZE 4096
++
++/* hardware dependent LEDs driver */
++
++static struct ioc3_driver_data *ioc3=NULL;
++static unsigned int leds_buff;
++
++static void ip30_leds_begin(void)
++{
++ leds_buff = ioc3->gpdr_shadow;
++}
++
++static void ip30_leds_set(int led, unsigned char state)
++{
++ state >>= 7;
++ leds_buff &= ~(1 << led);
++ leds_buff |= state << led;
++}
++
++static void ip30_leds_end(void)
++{
++ ioc3_gpio(ioc3, 3, leds_buff);
++}
++
++/* generic LEDs stream interpreter part */
++
++static spinlock_t leds_lock = SPIN_LOCK_UNLOCKED;
++static int leds_are_open = 0;
++static struct timer_list leds_timer;
++
++static unsigned char leds_stream[LEDS_STREAM_SIZE];
++static int leds_pc = 0;
++
++static void leds_timer_proc(unsigned long param)
++{
++ unsigned long timer_ms = 0;
++ int end_flag = 0;
++ unsigned char byte1, byte2;
++
++ ip30_leds_begin();
++
++ while (!end_flag) {
++ byte1 = leds_stream[leds_pc ++];
++ byte2 = leds_stream[leds_pc ++];
++
++ switch (byte1 >> 6) {
++ case LEDS_OP_SET:
++ ip30_leds_set(byte1 & 0x3f, byte2);
++ break;
++ case LEDS_OP_LOOP:
++ leds_pc = 0;
++ case LEDS_OP_WAIT:
++ timer_ms = ((unsigned long)byte2) << (byte1 & 0x3f);
++ end_flag = 1;
++ break;
++ case LEDS_OP_RSVD:
++ printk(KERN_INFO "ip30-leds: Stream to the future!\n");
++ leds_pc = 0;
++ timer_ms = 0;
++ end_flag = 1;
++ break;
++ }
++
++ if(leds_pc >= LEDS_STREAM_SIZE) {
++ printk(KERN_INFO "ip30-leds: The Neverending Stream?\n");
++ leds_pc = 0;
++ timer_ms = 0;
++ end_flag = 1;
++ }
++ }
++
++ ip30_leds_end();
++
++ if (timer_ms) {
++ timer_ms = (timer_ms * HZ) / 1000;
++ leds_timer.expires = jiffies + timer_ms;
++ add_timer(&leds_timer);
++ }
++}
++
++static int leds_open(struct inode *inode, struct file *file)
++{
++ spin_lock_irq(&leds_lock);
++ if (leds_are_open) {
++ spin_unlock_irq(&leds_lock);
++ return -EBUSY;
++ }
++ leds_are_open = 1;
++ del_timer(&leds_timer);
++ memset(leds_stream, 0xFF, LEDS_STREAM_SIZE);
++ spin_unlock_irq(&leds_lock);
++
++ return 0;
++}
++
++static int leds_release(struct inode *inode, struct file *file)
++{
++ spin_lock_irq(&leds_lock);
++ leds_are_open = 0;
++ leds_pc = 0;
++ leds_timer.expires = jiffies + 1;
++ leds_timer.function = leds_timer_proc;
++ add_timer(&leds_timer);
++ spin_unlock_irq(&leds_lock);
++
++ return 0;
++}
++
++static ssize_t leds_write(struct file *file, const char *buf, size_t count, loff_t * ppos)
++{
++ if (count > LEDS_STREAM_SIZE)
++ return -ENOSPC;
++ copy_from_user(leds_stream, buf, count);
++ return count;
++}
++
++static struct file_operations leds_fops = {
++ .owner = THIS_MODULE,
++ .open = leds_open,
++ .write = leds_write,
++ .release = leds_release,
++};
++
++static struct miscdevice leds_dev= {
++ LEDS_MINOR,
++ "leds",
++ &leds_fops
++};
++
++/* IOC3 SuperIO probe */
++
++static int ioc3led_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ int i, p=0;
++ if (ioc3 || idd->class != IOC3_CLASS_BASE_IP30)
++ return 1; /* no sense in setting LEDs on the MENETs */
++ ioc3 = idd;
++
++ if (misc_register(&leds_dev)) {
++ printk(KERN_ERR "ip30-leds: There is no place for me here <sob, sniff>.\n");
++ return 1;
++ }
++
++ for(i=0;i<3;i++) {
++ leds_stream[p++] = 0x00;
++ leds_stream[p++] = 0x00;
++ leds_stream[p++] = 0x01;
++ leds_stream[p++] = 0xff;
++
++ leds_stream[p++] = 0x48;
++ leds_stream[p++] = 0x01;
++
++ leds_stream[p++] = 0x01;
++ leds_stream[p++] = 0x00;
++ leds_stream[p++] = 0x00;
++ leds_stream[p++] = 0xff;
++
++ leds_stream[p++] = 0x48;
++ leds_stream[p++] = 0x01;
++ }
++ leds_stream[p++] = 0x80;
++ leds_stream[p++] = 0x00;
++
++ init_timer(&leds_timer);
++ leds_timer.expires = jiffies + 1;
++ leds_timer.function = leds_timer_proc;
++ add_timer(&leds_timer);
++
++ return 0;
++}
++
++static int ioc3led_remove(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ if(ioc3 != idd)
++ return 1;
++ misc_deregister(&leds_dev);
++ ioc3 = NULL;
++ return 0;
++}
++
++/* entry/exit functions */
++
++static struct ioc3_submodule ioc3led_submodule = {
++ .name = "leds",
++ .probe = ioc3led_probe,
++ .remove = ioc3led_remove,
++ .owner = THIS_MODULE,
++};
++
++static int __init leds_init(void)
++{
++ ioc3_register_submodule(&ioc3led_submodule);
++ return 0;
++}
++
++static void __exit leds_exit (void)
++{
++ ioc3_unregister_submodule(&ioc3led_submodule);
++}
++
++module_init(leds_init);
++module_exit(leds_exit);
+diff -urN linux-2.6.12-ioc3/drivers/char/ip30-rtc.c linux-2.6.12-ip30/drivers/char/ip30-rtc.c
+--- linux-2.6.12-ioc3/drivers/char/ip30-rtc.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/drivers/char/ip30-rtc.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,353 @@
++/*
++ * Driver for the Maxim/Dallas DS1687 real time clock in SGI Octane.
++ *
++ * Copyright (C) 2004 Stanislaw Skowronek
++ * Somewhat based on: ip27-rtc.c (userland interface code).
++ */
++
++#include <linux/bcd.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/miscdevice.h>
++#include <linux/ioport.h>
++#include <linux/fcntl.h>
++#include <linux/rtc.h>
++#include <linux/init.h>
++#include <linux/poll.h>
++#include <linux/proc_fs.h>
++#include <linux/smp_lock.h>
++#include <linux/delay.h>
++
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <asm/system.h>
++#include <asm/time.h>
++
++#include <linux/ioc3.h>
++
++/* physical access functions */
++
++extern spinlock_t rtc_lock;
++static struct ioc3_driver_data *ioc3=NULL;
++
++#define RTC_ADDR (*(unsigned char *) ((unsigned long)(ioc3->vma) + IOC3_BYTEBUS_DEV1))
++#define RTC_DATA (*(unsigned char *) ((unsigned long)(ioc3->vma) + IOC3_BYTEBUS_DEV2))
++
++static unsigned char ip30_rtc_read(int addr)
++{
++ RTC_ADDR = addr & 0x7f;
++ return RTC_DATA;
++}
++static void ip30_rtc_write(int addr, unsigned char data)
++{
++ RTC_ADDR = addr & 0x7f;
++ RTC_DATA = data;
++}
++
++/* RTC hardware driver */
++
++static void rtc_begin_access(int bank)
++{
++ unsigned char val = ip30_rtc_read(0x0b);
++ unsigned long start = jiffies;
++ spin_lock_irq(&rtc_lock);
++ ip30_rtc_write(0x0b, val | 0x80); /* SET bit */
++ val = ip30_rtc_read(0x0a);
++ while (val & 0x80) { /* UIP bit */
++ udelay(10);
++ if (jiffies > start + 137) {
++ printk(KERN_ERR "ip30-rtc: RTC access lock timeout.\n");
++ return;
++ }
++ val = ip30_rtc_read(0x0a);
++ }
++ ip30_rtc_write(0x0a, (val & 0xef) | (bank << 4));
++}
++
++static void rtc_end_access(void)
++{
++ unsigned char val = ip30_rtc_read(0x0b);
++ ip30_rtc_write(0x0b, val & 0x7f);
++ spin_unlock_irq(&rtc_lock);
++}
++
++static void get_rtc_time(struct rtc_time *rtc_tm)
++{
++ rtc_begin_access(1);
++ rtc_tm->tm_sec = ip30_rtc_read(0x00);
++ rtc_tm->tm_min = ip30_rtc_read(0x02);
++ rtc_tm->tm_hour = ip30_rtc_read(0x04);
++ rtc_tm->tm_mday = ip30_rtc_read(0x07);
++ rtc_tm->tm_mon = ip30_rtc_read(0x08);
++ rtc_tm->tm_year = ip30_rtc_read(0x09);
++ rtc_tm->tm_year += 100 * ip30_rtc_read(0x48);
++ rtc_end_access();
++
++ rtc_tm->tm_year -= 1900;
++ rtc_tm->tm_mon--;
++}
++
++static const unsigned char days_in_mo[] =
++{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
++static int set_rtc_time(struct rtc_time *rtc_tm)
++{
++ unsigned char mon, day, hrs, min, sec, leap_yr;
++ unsigned int yrs;
++
++ yrs = rtc_tm->tm_year + 1900;
++ mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
++ day = rtc_tm->tm_mday;
++ hrs = rtc_tm->tm_hour;
++ min = rtc_tm->tm_min;
++ sec = rtc_tm->tm_sec;
++
++ leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
++ if ((mon > 12) || (day == 0))
++ return -EINVAL;
++
++ if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
++ return -EINVAL;
++
++ if ((hrs >= 24) || (min >= 60) || (sec >= 60))
++ return -EINVAL;
++
++ rtc_begin_access(1);
++ ip30_rtc_write(0x00, sec);
++ ip30_rtc_write(0x02, min);
++ ip30_rtc_write(0x04, hrs);
++ ip30_rtc_write(0x07, day);
++ ip30_rtc_write(0x08, mon);
++ ip30_rtc_write(0x09, yrs % 100);
++ ip30_rtc_write(0x48, yrs / 100);
++ rtc_end_access();
++
++ return 0;
++}
++
++/* power-down logic */
++
++void ip30_soft_powerdown(void)
++{
++ unsigned char val;
++ rtc_begin_access(1);
++
++/* prepare the RTC for waking us up so we don't wind up dead */
++ val = ip30_rtc_read(0x4b);
++ val &= 0x2a;
++ val |= 0x81;
++ ip30_rtc_write(0x4b, val);
++ rtc_end_access();
++
++ while (1) {
++ ip30_rtc_write(0x4a, 0x08); /* power down */
++ udelay(100000);
++ }
++/* there is no way out */
++}
++
++/* userland interface stuff */
++
++static int rtc_is_open = 0;
++
++static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
++ unsigned long arg)
++{
++
++ struct rtc_time wtime;
++
++ switch (cmd) {
++ case RTC_RD_TIME: /* Read the time/date from RTC */
++ {
++ get_rtc_time(&wtime);
++
++ return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
++ }
++ case RTC_SET_TIME: /* Set the RTC */
++ {
++ if (!capable(CAP_SYS_TIME))
++ return -EACCES;
++
++ if (copy_from_user(&wtime, (struct rtc_time*)arg,
++ sizeof(struct rtc_time)))
++ return -EFAULT;
++
++ return set_rtc_time(&wtime);
++ }
++ default:
++ return -EINVAL;
++ }
++}
++
++static int rtc_open(struct inode *inode, struct file *file)
++{
++ spin_lock_irq(&rtc_lock);
++
++ if (rtc_is_open) {
++ spin_unlock_irq(&rtc_lock);
++ return -EBUSY;
++ }
++
++ rtc_is_open = 1;
++ spin_unlock_irq(&rtc_lock);
++
++ return 0;
++}
++
++static int rtc_release(struct inode *inode, struct file *file)
++{
++ spin_lock_irq(&rtc_lock);
++ rtc_is_open = 0;
++ spin_unlock_irq(&rtc_lock);
++
++ return 0;
++}
++
++static struct file_operations rtc_fops = {
++ .owner = THIS_MODULE,
++ .ioctl = rtc_ioctl,
++ .open = rtc_open,
++ .release = rtc_release,
++};
++
++static struct miscdevice rtc_dev=
++{
++ RTC_MINOR,
++ "rtc",
++ &rtc_fops
++};
++
++/*
++ * Info exported via "/proc/rtc".
++ */
++static int rtc_get_status(char *buf)
++{
++ char *p;
++ struct rtc_time tm;
++
++ /*
++ * Just emulate the standard /proc/rtc
++ */
++
++ p = buf;
++
++ get_rtc_time(&tm);
++
++ /*
++ * There is no way to tell if the luser has the RTC set for local
++ * time or for Universal Standard Time (GMT). Probably local though.
++ */
++ p += sprintf(p,
++ "rtc_time\t: %02d:%02d:%02d\n"
++ "rtc_date\t: %04d-%02d-%02d\n"
++ "rtc_epoch\t: %04u\n"
++ "BCD\t\t: no\n"
++ "24hr\t\t: yes\n",
++ tm.tm_hour, tm.tm_min, tm.tm_sec,
++ tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, 1900);
++
++ return p - buf;
++}
++
++static int rtc_read_proc(char *page, char **start, off_t off,
++ int count, int *eof, void *data)
++{
++ int len = rtc_get_status(page);
++ if (len <= off+count) *eof = 1;
++ *start = page + off;
++ len -= off;
++ if (len>count) len = count;
++ if (len<0) len = 0;
++ return len;
++}
++
++/* general MIPS compatibility */
++
++static unsigned long ip30_mips_rtc_get_time(void)
++{
++ struct rtc_time tm;
++ if(ioc3) {
++ get_rtc_time(&tm);
++ return mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
++ }
++ return mktime(2004, 8, 23, 12, 15, 0);
++}
++
++static int ip30_mips_rtc_set_time(unsigned long tim)
++{
++ struct rtc_time tm;
++ to_tm(tim, &tm);
++ if(ioc3)
++ set_rtc_time(&tm);
++ return 0;
++}
++
++/* IOC3 SuperIO probe */
++
++static int ioc3rtc_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ struct rtc_time wtime;
++
++ if (ioc3 || idd->class != IOC3_CLASS_BASE_IP30)
++ return 1; /* this is good and proper */
++ ioc3 = idd;
++
++ if (misc_register(&rtc_dev)) {
++ printk(KERN_ERR "ip30-rtc: Cannot register device.\n");
++ return 1;
++ }
++ if (!create_proc_read_entry("driver/rtc", 0, NULL, rtc_read_proc, NULL)) {
++ printk(KERN_ERR "ip30-rtc: Cannot create procfs entry.\n");
++ misc_deregister(&rtc_dev);
++ return 1;
++ }
++
++/* can we set xtime here? */
++ get_rtc_time(&wtime);
++ write_seqlock_irq(&xtime_lock);
++ xtime.tv_sec = mktime(wtime.tm_year + 1900, wtime.tm_mon + 1, wtime.tm_mday,
++ wtime.tm_hour, wtime.tm_min, wtime.tm_sec);
++ xtime.tv_nsec = 0;
++ set_normalized_timespec(&wall_to_monotonic,
++ -xtime.tv_sec, -xtime.tv_nsec);
++
++ rtc_get_time = ip30_mips_rtc_get_time;
++ rtc_set_time = ip30_mips_rtc_set_time;
++
++ write_sequnlock_irq(&xtime_lock);
++
++ return 0;
++}
++
++static int ioc3rtc_remove(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
++{
++ if(ioc3 != idd)
++ return 1;
++ misc_deregister(&rtc_dev);
++ /* TODO: kill proc, although this driver should not be removable anyway */
++ ioc3 = NULL;
++ return 0;
++}
++
++/* entry/exit functions */
++
++static struct ioc3_submodule ioc3rtc_submodule = {
++ .name = "rtc",
++ .probe = ioc3rtc_probe,
++ .remove = ioc3rtc_remove,
++ .owner = THIS_MODULE,
++};
++
++static int __init rtc_init(void)
++{
++ ioc3_register_submodule(&ioc3rtc_submodule);
++ return 0;
++}
++
++static void __exit rtc_exit (void)
++{
++ ioc3_unregister_submodule(&ioc3rtc_submodule);
++}
++
++module_init(rtc_init);
++module_exit(rtc_exit);
+diff -urN linux-2.6.12-ioc3/drivers/video/Kconfig linux-2.6.12-ip30/drivers/video/Kconfig
+--- linux-2.6.12-ioc3/drivers/video/Kconfig 2005-07-08 13:15:43.000000000 +0200
++++ linux-2.6.12-ip30/drivers/video/Kconfig 2005-07-09 13:36:14.000000000 +0200
+@@ -552,6 +552,20 @@
+ This is the amount of memory reserved for the framebuffer,
+ which can be any value between 1MB and 8MB.
+
++config FB_IMPACTSR
++ tristate "SGI Octane ImpactSR graphics support"
++ depends on FB && SGI_IP30
++ select FB_SOFT_CURSOR
++ help
++ SGI Octane ImpactSR (SI/SSI/MXI/SE/SSE/MXE) graphics card support.
++
++config FB_ODYSSEY
++ tristate "SGI Octane Odyssey graphics support"
++ depends on FB && SGI_IP30
++ select FB_SOFT_CURSOR
++ help
++ SGI Octane Odyssey (VPro V6/V8/V10/V12) graphics card support.
++
+ config BUS_I2C
+ bool
+ depends on (FB = y) && VISWS
+diff -urN linux-2.6.12-ioc3/drivers/video/Makefile linux-2.6.12-ip30/drivers/video/Makefile
+--- linux-2.6.12-ioc3/drivers/video/Makefile 2005-07-08 13:15:43.000000000 +0200
++++ linux-2.6.12-ip30/drivers/video/Makefile 2005-07-09 13:36:14.000000000 +0200
+@@ -92,6 +92,8 @@
+ obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o
+ obj-$(CONFIG_FB_IMX) += imxfb.o
+ obj-$(CONFIG_FB_SMIVGX) += smivgxfb.o
++obj-$(CONFIG_FB_IMPACTSR) += impactsr.o
++obj-$(CONFIG_FB_ODYSSEY) += odyssey.o
+
+ # Platform or fallback drivers go here
+ obj-$(CONFIG_FB_VESA) += vesafb.o
+diff -urN linux-2.6.12-ioc3/drivers/video/impactsr.c linux-2.6.12-ip30/drivers/video/impactsr.c
+--- linux-2.6.12-ioc3/drivers/video/impactsr.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/drivers/video/impactsr.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,919 @@
++/*
++ * linux/drivers/video/impactsr.c -- SGI Octane MardiGras (IMPACTSR) graphics
++ *
++ * Copyright (c) 2004 by Stanislaw Skowronek
++ *
++ * Based on linux/drivers/video/skeletonfb.c
++ *
++ * This driver, as most of the IP30 (SGI Octane) port, is a result of massive
++ * amounts of reverse engineering and trial-and-error. If anyone is interested
++ * in helping with it, please contact me: <skylark at linux-mips.org>.
++ *
++ * The basic functions of this driver are filling and blitting rectangles.
++ * To achieve the latter, two DMA operations are used on Impact. It is unclear
++ * to me, why is it so, but even Xsgi (the IRIX X11 server) does it this way.
++ * It seems that fb->fb operations are not operational on these cards.
++ *
++ * For this purpose, a kernel DMA pool is allocated (pool number 0). This pool
++ * is (by default) 64kB in size. An ioctl could be used to set the value at
++ * run-time. Applications can use this pool, however proper locking has to be
++ * guaranteed. Kernel should be locked out from this pool by an ioctl.
++ *
++ * The IMPACTSR is quite well worked-out currently, except for the Geometry
++ * Engines (GE11). Any information about use of those devices would be very
++ * useful. It would enable a Linux OpenGL driver, as most of OpenGL calls are
++ * supported directly by the hardware. So far, I can't initialize the GE11.
++ * Verification of microcode crashes the graphics.
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/string.h>
++#include <linux/mm.h>
++#include <linux/tty.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/vmalloc.h>
++#include <linux/module.h>
++#include <linux/dma-mapping.h>
++#include <linux/spinlock.h>
++#include <linux/font.h>
++
++#include <asm/mach-ip30/xtalk.h>
++#include <video/impactsr.h>
++
++#define IMPACTSR_KPOOL_SIZE 65536
++
++struct impactsr_par {
++ /* physical mmio base in HEART XTalk space */
++ unsigned long mmio_base;
++ /* virtual mmio base in kernel space */
++ unsigned long mmio_virt;
++ /* DMA pool management */
++ unsigned int *pool_txtbl[5];
++ unsigned int pool_txnum[5];
++ unsigned int pool_txmax[5];
++ unsigned long pool_txphys[5];
++ /* kernel DMA pools */
++ unsigned long **kpool_virt[5];
++ unsigned long *kpool_phys[5];
++ unsigned int kpool_size[5];
++ /* board config */
++ unsigned int num_ge, num_rss;
++ /* locks to prevent simultaneous user and kernel access */
++ int open_flag;
++ int mmap_flag;
++ spinlock_t lock;
++};
++
++static struct fb_fix_screeninfo impactsr_fix = {
++ .id = "ImpactSR 0RSS",
++ .smem_start = 0,
++ .smem_len = 0,
++ .type = FB_TYPE_PACKED_PIXELS,
++ .visual = FB_VISUAL_TRUECOLOR,
++ .xpanstep = 0,
++ .ypanstep = 0,
++ .ywrapstep = 0,
++ .line_length = 0,
++ .accel = FB_ACCEL_SGI_IMPACTSR,
++};
++
++static struct fb_var_screeninfo impactsr_var = {
++ .xres = 1280,
++ .yres = 1024,
++ .xres_virtual = 1280,
++ .yres_virtual = 1024,
++ .bits_per_pixel = 24,
++ .red = { .offset = 0, .length = 8 },
++ .green = { .offset = 8, .length = 8 },
++ .blue = { .offset = 16, .length = 8 },
++ .transp = { .offset = 24, .length = 8 },
++};
++
++static struct fb_info info;
++
++static unsigned int pseudo_palette[256];
++
++static struct impactsr_par current_par;
++
++int impactsr_init(void);
++
++/* --------------------- Gory Details --------------------- */
++#define MMIO (((struct impactsr_par *)p->par)->mmio_virt)
++#define PAR (*((struct impactsr_par *)p->par))
++
++static void impactsr_wait_cfifo(struct fb_info *p,int nslots)
++{
++ while((IMPACTSR_FIFOSTATUS(MMIO)&0xff)>(IMPACTSR_CFIFO_MAX-nslots));
++}
++static void impactsr_wait_cfifo_empty(struct fb_info *p)
++{
++ while(IMPACTSR_FIFOSTATUS(MMIO)&0xff);
++}
++static void impactsr_wait_bfifo(struct fb_info *p,int nslots)
++{
++ while((IMPACTSR_GIOSTATUS(MMIO)&0x1f)>(IMPACTSR_BFIFO_MAX-nslots));
++}
++static void impactsr_wait_bfifo_empty(struct fb_info *p)
++{
++ while(IMPACTSR_GIOSTATUS(MMIO)&0x1f);
++}
++static void impactsr_wait_dma(struct fb_info *p)
++{
++ while(IMPACTSR_DMABUSY(MMIO)&0x1f);
++ while(!(IMPACTSR_STATUS(MMIO)&1));
++ while(!(IMPACTSR_STATUS(MMIO)&2));
++ while(!(IMPACTSR_RESTATUS(MMIO)&0x100));
++}
++static void impactsr_wait_dmaready(struct fb_info *p)
++{
++ IMPACTSR_CFIFOW(MMIO)=0x000e0100;
++ while(IMPACTSR_DMABUSY(MMIO)&0x1eff);
++ while(!(IMPACTSR_STATUS(MMIO)&2));
++}
++
++static void impactsr_inithq4(struct fb_info *p)
++{
++ /* CFIFO parameters */
++ IMPACTSR_CFIFO_HW(MMIO)=0x47;
++ IMPACTSR_CFIFO_LW(MMIO)=0x14;
++ IMPACTSR_CFIFO_DELAY(MMIO)=0x64;
++ /* DFIFO parameters */
++ IMPACTSR_DFIFO_HW(MMIO)=0x40;
++ IMPACTSR_DFIFO_LW(MMIO)=0x10;
++ IMPACTSR_DFIFO_DELAY(MMIO)=0;
++}
++
++static void impactsr_initrss(struct fb_info *p)
++{
++ /* transfer mask registers */
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_COLORMASKLSBSA(0xffffff);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_COLORMASKLSBSB(0xffffff);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_COLORMASKMSBS(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRMASKLO(0xffffff);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRMASKHI(0xffffff);
++ /* use the main plane */
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_DRBPOINTERS(0xc8240);
++ /* set the RE into vertical flip mode */
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CONFIG(0xcac);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XYWIN(0,0x3ff);
++}
++
++static void impactsr_initxmap(struct fb_info *p)
++{
++ /* set XMAP into 24-bpp mode */
++ IMPACTSR_XMAP_PP1SELECT(MMIO)=0x01;
++ IMPACTSR_XMAP_INDEX(MMIO)=0x00;
++ IMPACTSR_XMAP_MAIN_MODE(MMIO)=0x07a4;
++}
++
++static void impactsr_initvc3(struct fb_info *p)
++{
++ /* cursor-b-gone (disable DISPLAY bit) */
++ IMPACTSR_VC3_INDEXDATA(MMIO)=0x1d000100;
++}
++
++static void impactsr_initdma(struct fb_info *p)
++{
++ unsigned long pool;
++ /* clear DMA pools */
++ for(pool=0;pool<5;pool++) {
++ impactsr_wait_cfifo_empty(p);
++ IMPACTSR_CFIFOPW(MMIO)=IMPACTSR_CMD_HQ_TXBASE(pool);
++ IMPACTSR_CFIFOP(MMIO)=0x0000000000000009;
++ IMPACTSR_CFIFOP(MMIO)=IMPACTSR_CMD_HQ_TXMAX(pool,0);
++ IMPACTSR_CFIFOP(MMIO)=IMPACTSR_CMD_HQ_PGBITS(pool,0);
++ IMPACTSR_CFIFOP(MMIO)=0x00484b0400080000|(pool<<40);
++ PAR.pool_txmax[pool]=0;
++ PAR.pool_txnum[pool]=0;
++ }
++ /* set DMA parameters */
++ IMPACTSR_CFIFOP(MMIO)=IMPACTSR_CMD_HQ_PGSIZE(0);
++ IMPACTSR_CFIFOP(MMIO)=IMPACTSR_CMD_HQ_STACKPTR(0);
++ IMPACTSR_CFIFOP(MMIO)=0x00484a0400180000;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_REG32(MMIO,0x40918)=0x00680000;
++ IMPACTSR_REG32(MMIO,0x40920)=0x80280000;
++ IMPACTSR_REG32(MMIO,0x40928)=0x00000000;
++}
++
++static void impactsr_alloctxtbl(struct fb_info *p,int pool,int txmax)
++{
++ dma_addr_t dma_handle;
++ int alloc_size;
++ if(txmax>PAR.pool_txmax[pool]) { /* grow the pool - unlikely but supported */
++ alloc_size=txmax;
++ if(alloc_size<1024)
++ alloc_size=1024;
++ if(PAR.pool_txmax[pool])
++ dma_free_coherent(NULL,PAR.pool_txmax[pool]*4,PAR.pool_txtbl[pool],PAR.pool_txphys[pool]);
++ PAR.pool_txtbl[pool]=dma_alloc_coherent(NULL,alloc_size*4,&dma_handle,GFP_KERNEL);
++ PAR.pool_txphys[pool]=dma_handle;
++ PAR.pool_txmax[pool]=alloc_size;
++ }
++ PAR.pool_txnum[pool]=txmax;
++}
++
++static void impactsr_writetxtbl(struct fb_info *p,int pool)
++{
++ impactsr_wait_cfifo_empty(p);
++ /* inform the card about a new DMA pool */
++ IMPACTSR_CFIFOPW(MMIO)=IMPACTSR_CMD_HQ_TXBASE(pool);
++ IMPACTSR_CFIFOP(MMIO)=PAR.pool_txphys[pool];
++ IMPACTSR_CFIFOP(MMIO)=IMPACTSR_CMD_HQ_TXMAX(pool,PAR.pool_txnum[pool]);
++ IMPACTSR_CFIFOP(MMIO)=IMPACTSR_CMD_HQ_PGBITS(pool,0x0a);
++ IMPACTSR_CFIFOP(MMIO)=0x00484b0400180000|((long)pool<<40);
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++ IMPACTSR_CFIFOPW(MMIO)=0x000e0100;
++}
++
++static void impactsr_settxtbl(struct fb_info *p,int pool,unsigned *txtbl,int txmax)
++{
++ impactsr_alloctxtbl(p,pool,txmax);
++ memcpy(PAR.pool_txtbl[pool],txtbl,txmax*4);
++ impactsr_writetxtbl(p,pool);
++}
++
++static void impactsr_resizekpool(struct fb_info *p,int pool,int size,int growonly)
++{
++ int pages;
++ int i;
++ dma_addr_t dma_handle;
++ if(growonly && PAR.kpool_size[pool]>=size)
++ return;
++ if(size<8192) /* single line smallcopy (1280*4) *must* work */
++ size=8192;
++ pages=(size+PAGE_SIZE-1)>>PAGE_SHIFT;
++ if(PAR.kpool_size[pool]>0) {
++ for(i=0;i<PAR.pool_txnum[pool];i++) {
++ ClearPageReserved(virt_to_page(PAR.kpool_virt[pool][i]));
++ dma_free_coherent(NULL,PAGE_SIZE,PAR.kpool_virt[pool][i],PAR.kpool_phys[pool][i]);
++ }
++ vfree(PAR.kpool_phys[pool]);
++ vfree(PAR.kpool_virt[pool]);
++ }
++ impactsr_alloctxtbl(p,pool,pages);
++ PAR.kpool_virt[pool]=vmalloc(pages*sizeof(unsigned long));
++ PAR.kpool_phys[pool]=vmalloc(pages*sizeof(unsigned long));
++ for(i=0;i<PAR.pool_txnum[pool];i++) {
++ PAR.kpool_virt[pool][i]=dma_alloc_coherent(NULL,PAGE_SIZE,&dma_handle,GFP_KERNEL);
++ SetPageReserved(virt_to_page(PAR.kpool_virt[pool][i]));
++ PAR.kpool_phys[pool][i]=dma_handle;
++ PAR.pool_txtbl[pool][i]=PAR.kpool_phys[pool][i]>>PAGE_SHIFT;
++ }
++ impactsr_writetxtbl(p,pool);
++ PAR.kpool_size[pool]=pages*PAGE_SIZE;
++}
++
++static void impactsr_rect(struct fb_info *p, int x, int y, int w, int h, unsigned c, int lo)
++{
++ impactsr_wait_cfifo_empty(p);
++ if(lo==IMPACTSR_LO_COPY)
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PP1FILLMODE(0x6300,lo);
++ else
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PP1FILLMODE(0x6304,lo);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_FILLMODE(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PACKEDCOLOR(c);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYSTARTI(x,y);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYENDI(x+w-1,y+h-1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_IR_ALIAS(0x18);
++}
++
++static void impactsr_framerect(struct fb_info *p, int x, int y, int w, int h, unsigned c)
++{
++ impactsr_rect(p,x,y,w,1,c,IMPACTSR_LO_COPY);
++ impactsr_rect(p,x,y+h-1,w,1,c,IMPACTSR_LO_COPY);
++ impactsr_rect(p,x,y,1,h,c,IMPACTSR_LO_COPY);
++ impactsr_rect(p,x+w-1,y,1,h,c,IMPACTSR_LO_COPY);
++}
++
++static unsigned long dcntr;
++static void impactsr_debug(struct fb_info *p,int v)
++{
++ int i;
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PIXCMD(3);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PIXELFORMAT(0xe00);
++ switch(v) {
++ case 0:
++ for(i=0;i<64;i++)
++ impactsr_rect(p,4*(i&7),28-4*(i>>3),4,4,(dcntr&(1L<<i))?0xa080ff:0x100030,IMPACTSR_LO_COPY);
++ break;
++ case 1:
++ dcntr++;
++ for(i=0;i<64;i++)
++ impactsr_rect(p,4*(i&7),28-4*(i>>3),4,4,(dcntr&(1L<<i))?0xff80a0:0x300010,IMPACTSR_LO_COPY);
++ break;
++ case 2:
++ for(i=0;i<64;i++)
++ impactsr_rect(p,4*(i&7),28-4*(i>>3),4,4,(dcntr&(1L<<i))?0xa0ff80:0x103000,IMPACTSR_LO_COPY);
++ }
++}
++
++static void impactsr_smallcopy(struct fb_info *p,unsigned sx,unsigned sy,unsigned dx,unsigned dy,unsigned w,unsigned h)
++{
++ if(w<1 || h<1)
++ return;
++ w=(w+1)&~1;
++ /* setup and perform DMA from RE to HOST */
++ impactsr_wait_dma(p);
++ /* select RSS to read from */
++ if(PAR.num_rss == 2) {
++ if(sy&1)
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CONFIG(0xca5);
++ else
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CONFIG(0xca4);
++ } else { /* 1 */
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CONFIG(0xca4);
++ }
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PIXCMD(2);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PP1FILLMODE(0x2200,IMPACTSR_LO_COPY);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_COLORMASKLSBSA(0xffffff);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_COLORMASKLSBSB(0xffffff);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_COLORMASKMSBS(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_DRBPOINTERS(0xc8240);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYSTARTI(sx,sy+h-1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYENDI(sx+w-1,sy);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRMASKLO(0xffffff);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRMASKHI(0xffffff);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRSIZE(w,h);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCOUNTERS(w,h);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRMODE(0x00080);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_FILLMODE(0x01000000);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PIXELFORMAT(0x200);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_SCANWIDTH(w<<2);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_DMATYPE(0x0a);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_LIST_0(0x80000000);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_WIDTH(w<<2);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_OFFSET(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_STARTADDR(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_LINECNT(h);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_WIDTHA(w<<2);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCONTROL(8);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_GLINE_XSTARTF(1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_IR_ALIAS(0x18);
++ IMPACTSR_CFIFOW(MMIO)=0x00080b04;
++ IMPACTSR_CFIFO(MMIO)=0x000000b900190204L;
++ IMPACTSR_CFIFOW(MMIO)=0x00000009;
++ impactsr_wait_dmaready(p);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_GLINE_XSTARTF(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_RE_TOGGLECNTX(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCOUNTERS(0,0);
++ /* setup and perform DMA from HOST to RE */
++ impactsr_wait_dma(p);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CONFIG(0xca4);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PP1FILLMODE(0x6200,IMPACTSR_LO_COPY);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYSTARTI(dx,dy+h-1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYENDI(dx+w-1,dy);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_FILLMODE(0x01400000);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRMODE(0x00080);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PIXELFORMAT(0x600);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_SCANWIDTH(w<<2);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_DMATYPE(0x0c);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PIXCMD(3);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRSIZE(w,h);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCOUNTERS(w,h);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_GLINE_XSTARTF(1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_IR_ALIAS(0x18);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCONTROL(1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_LIST_0(0x80000000);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_OFFSET(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_STARTADDR(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_LINECNT(h);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PG_WIDTHA(w<<2);
++ IMPACTSR_CFIFOW(MMIO)=0x0080b04;
++ IMPACTSR_CFIFO(MMIO)=0x000000b1000e0400L;
++ impactsr_wait_dma(p);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_GLINE_XSTARTF(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_RE_TOGGLECNTX(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCOUNTERS(0,0);
++}
++
++static unsigned impactsr_getpalreg(struct fb_info *p, unsigned i)
++{
++ return ((unsigned *)p->pseudo_palette)[i];
++}
++
++/* ------------ Accelerated Functions --------------------- */
++
++static void impactsr_fillrect(struct fb_info *p, const struct fb_fillrect *region)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if(PAR.open_flag) {
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return;
++ }
++ switch(region->rop) {
++ case ROP_XOR:
++ impactsr_rect(p,region->dx,region->dy,region->width,region->height,impactsr_getpalreg(p,region->color),IMPACTSR_LO_XOR);
++ break;
++ case ROP_COPY:
++ default:
++ impactsr_rect(p,region->dx,region->dy,region->width,region->height,impactsr_getpalreg(p,region->color),IMPACTSR_LO_COPY);
++ break;
++ }
++ spin_unlock_irqrestore(&PAR.lock,flags);
++}
++
++static void impactsr_copyarea(struct fb_info *p, const struct fb_copyarea *area)
++{
++ unsigned sx,sy,dx,dy,w,h;
++ unsigned th,ah;
++ unsigned long flags;
++ w=area->width;
++ h=area->height;
++ if(w<1 || h<1)
++ return;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if(PAR.open_flag) {
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return;
++ }
++ sx=area->sx;
++ sy=0x3ff-(area->sy+h-1);
++ dx=area->dx;
++ dy=0x3ff-(area->dy+h-1);
++ th=PAR.kpool_size[0]/(w*4);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XYWIN(0,0);
++ if(dy>sy) {
++ dy+=h;
++ sy+=h;
++ while(h>0) {
++ ah=th>h?h:th;
++ impactsr_smallcopy(p,sx,sy-ah,dx,dy-ah,w,ah);
++ dy-=ah;
++ sy-=ah;
++ h-=ah;
++ }
++ } else {
++ while(h>0) {
++ ah=th>h?h:th;
++ impactsr_smallcopy(p,sx,sy,dx,dy,w,ah);
++ dy+=ah;
++ sy+=ah;
++ h-=ah;
++ }
++ }
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PIXCMD(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_HQ_PIXELFORMAT(0xe00);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CONFIG(0xcac);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XYWIN(0,0x3ff);
++ spin_unlock_irqrestore(&PAR.lock,flags);
++}
++
++/* 8-bpp blits are done as PIO draw operation; the pixels are unpacked into 32-bpp
++ values from the current palette in software */
++static void impactsr_imageblit_8bpp(struct fb_info *p, const struct fb_image *image)
++{
++ int i,u,v;
++ const unsigned char *dp;
++ unsigned pix;
++ unsigned pal[256];
++ /* setup PIO to RE */
++ impactsr_wait_cfifo_empty(p);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PP1FILLMODE(0x6300,IMPACTSR_LO_COPY);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYSTARTI(image->dx,image->dy);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYENDI(image->dx+image->width-1,image->dy+image->height-1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_FILLMODE(0x00c00000);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRMODE(0x00080);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRSIZE(image->width,image->height);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCOUNTERS(image->width,image->height);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_GLINE_XSTARTF(1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_IR_ALIAS(0x18);
++ /* another workaround.. 33 writes to alpha... hmm... */
++ for(i=0;i<33;i++)
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_ALPHA(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCONTROL(2);
++ /* pairs of pixels are sent in two writes to the RE */
++ i=0;
++ dp=image->data;
++ for(v=0;v<256;v++)
++ pal[v]=impactsr_getpalreg(p,v);
++ for(v=0;v<image->height;v++) {
++ for(u=0;u<image->width;u++) {
++ pix=pal[*(dp++)];
++ if(i)
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CHAR_L(pix);
++ else
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CHAR_H(pix);
++ i^=1;
++ }
++ }
++ if(i)
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CHAR_L(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_GLINE_XSTARTF(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_RE_TOGGLECNTX(0);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_XFRCOUNTERS(0,0);
++}
++
++/* 1-bpp blits are done as character drawing; the bitmaps are drawn as 8-bit wide
++ strips; technically, Impact supports 16-pixel wide characters, but Linux
++ bitmap alignment is 8 bits and most draws are 8 pixels wide (font width), anyway */
++static void impactsr_imageblit_1bpp(struct fb_info *p, const struct fb_image *image)
++{
++ int x,y,w,h,b;
++ int u,v,a;
++ const unsigned char *d;
++ impactsr_wait_cfifo_empty(p);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PP1FILLMODE(0x6300,IMPACTSR_LO_COPY);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_FILLMODE(0x400018);
++ a=impactsr_getpalreg(p,image->fg_color);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_PACKEDCOLOR(a);
++ a=impactsr_getpalreg(p,image->bg_color);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BKGRD_RG(a&0xffff);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BKGRD_BA((a&0xff0000)>>16);
++ x=image->dx;
++ y=image->dy;
++ w=image->width;
++ h=image->height;
++ b=(w+7)/8;
++ for(u=0;u<b;u++) {
++ impactsr_wait_cfifo_empty(p);
++ a=(w<8)?w:8;
++ d=image->data+u;
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYSTARTI(x,y);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_BLOCKXYENDI(x+a-1,y+h-1);
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_IR_ALIAS(0x18);
++ for(v=0;v<h;v++) {
++ IMPACTSR_CFIFO(MMIO)=IMPACTSR_CMD_CHAR((*d)<<24);
++ d+=b;
++ }
++ w-=a;
++ x+=a;
++ }
++}
++
++static void impactsr_imageblit(struct fb_info *p, const struct fb_image *image)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if(PAR.open_flag) {
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return;
++ }
++ switch(image->depth) {
++ case 1:
++ impactsr_imageblit_1bpp(p,image);
++ break;
++ case 8:
++ impactsr_imageblit_8bpp(p,image);
++ break;
++ }
++ spin_unlock_irqrestore(&PAR.lock,flags);
++}
++
++static int impactsr_sync(struct fb_info *info)
++{
++ return 0;
++}
++
++static int impactsr_blank(int blank_mode, struct fb_info *info)
++{
++ /* TODO */
++ return 0;
++}
++
++static int impactsr_setcolreg(unsigned regno, unsigned red, unsigned green,
++ unsigned blue, unsigned transp, struct fb_info *info)
++{
++ if(regno>255)
++ return 1;
++ ((unsigned *)info->pseudo_palette)[regno]=(red>>8)|(green&0xff00)|((blue<<8)&0xff0000);
++ return 0;
++}
++
++/* ------------------- Framebuffer Access -------------------- */
++
++ssize_t impactsr_read(struct file *file, char *buf, size_t count, loff_t *ppos)
++{
++ return -EINVAL;
++}
++
++ssize_t impactsr_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
++{
++ return -EINVAL;
++}
++
++/* --------------------- Userland Access --------------------- */
++
++int impactsr_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
++ unsigned long arg, struct fb_info *info)
++{
++ return -EINVAL;
++}
++
++int impactsr_mmap(struct fb_info *p, struct file *file, struct vm_area_struct *vma)
++{
++ unsigned pool, i, n;
++ unsigned long size = vma->vm_end - vma->vm_start;
++ unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
++ unsigned long start = vma->vm_start;
++
++ switch(offset) {
++ case 0x0000000:
++ if(size!=0x200000)
++ return -EINVAL;
++ if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
++ return -EINVAL;
++ offset += MMIO;
++ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
++ vma->vm_flags |= VM_IO;
++ if (remap_pfn_range(vma, vma->vm_start, offset>>PAGE_SHIFT, size, vma->vm_page_prot))
++ return -EAGAIN;
++ vma->vm_file = file;
++ PAR.mmap_flag = 1;
++ return 0;
++ case 0x1000000:
++ case 0x2000000:
++ case 0x3000000:
++ case 0x8000000:
++ case 0x9000000:
++ case 0xa000000:
++ case 0xb000000:
++ if(size>0x1000000)
++ return EINVAL;
++ pool=offset>>24;
++ impactsr_resizekpool(&info,pool,size,offset&0x8000000);
++ n=(size+PAGE_SIZE-1)>>PAGE_SHIFT;
++ for(i=0;i<n;i++) {
++ if (remap_pfn_range(vma, start, PAR.kpool_phys[pool][i]>>PAGE_SHIFT, PAGE_SIZE, vma->vm_page_prot))
++ return -EAGAIN;
++ start += PAGE_SIZE;
++ }
++ vma->vm_file = file;
++ PAR.mmap_flag = 1;
++ return 0;
++ default:
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++static int impactsr_open(struct fb_info *p, int user)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if (user)
++ PAR.open_flag++;
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return 0;
++}
++
++static int impactsr_release(struct fb_info *p, int user)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if (user && PAR.open_flag) {
++ PAR.open_flag--;
++ if (PAR.open_flag == 0) {
++ impactsr_resizekpool(&info,1,8192,0);
++ impactsr_resizekpool(&info,2,8192,0);
++ impactsr_resizekpool(&info,3,8192,0);
++ PAR.mmap_flag = 0;
++ }
++ }
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return 0;
++}
++
++
++/* ------------------------------------------------------------------------- */
++
++ /*
++ * Frame buffer operations
++ */
++
++static struct fb_ops impactsr_ops = {
++ .owner = THIS_MODULE,
++ .fb_read = impactsr_read,
++ .fb_write = impactsr_write,
++ .fb_blank = impactsr_blank,
++ .fb_fillrect = impactsr_fillrect,
++ .fb_copyarea = impactsr_copyarea,
++ .fb_imageblit = impactsr_imageblit,
++ .fb_cursor = soft_cursor,
++ .fb_sync = impactsr_sync,
++ .fb_ioctl = impactsr_ioctl,
++ .fb_setcolreg = impactsr_setcolreg,
++ .fb_mmap = impactsr_mmap,
++ .fb_open = impactsr_open,
++ .fb_release = impactsr_release,
++};
++
++/* ------------------------------------------------------------------------- */
++
++ /*
++ * Private early console
++ */
++
++#define MMIO_FIXED 0x900000001c000000
++
++static void impactsr_earlyrect(int x, int y, int w, int h, unsigned c)
++{
++ while(IMPACTSR_FIFOSTATUS(MMIO_FIXED)&0xff);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_PP1FILLMODE(0x6300,IMPACTSR_LO_COPY);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_FILLMODE(0);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_PACKEDCOLOR(c);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_BLOCKXYSTARTI(x,y);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_BLOCKXYENDI(x+w-1,y+h-1);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_IR_ALIAS(0x18);
++}
++static void impactsr_paintchar(int x, int y, unsigned char *b, unsigned c, unsigned a)
++{
++ int v;
++ while(IMPACTSR_FIFOSTATUS(MMIO_FIXED)&0xff);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_PP1FILLMODE(0x6300,IMPACTSR_LO_COPY);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_FILLMODE(0x400018);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_PACKEDCOLOR(c);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_BKGRD_RG(a&0xffff);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_BKGRD_BA((a&0xff0000)>>16);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_BLOCKXYSTARTI(x,y);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_BLOCKXYENDI(x+7,y+15);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_IR_ALIAS(0x18);
++ for(v=0;v<16;v++)
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_CHAR((*(b++))<<24);
++}
++static void impactsr_earlyhwinit(void)
++{
++ IMPACTSR_CFIFO_HW(MMIO_FIXED)=0x47;
++ IMPACTSR_CFIFO_LW(MMIO_FIXED)=0x14;
++ IMPACTSR_CFIFO_DELAY(MMIO_FIXED)=0x64;
++ IMPACTSR_DFIFO_HW(MMIO_FIXED)=0x40;
++ IMPACTSR_DFIFO_LW(MMIO_FIXED)=0x10;
++ IMPACTSR_DFIFO_DELAY(MMIO_FIXED)=0;
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_COLORMASKLSBSA(0xffffff);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_COLORMASKLSBSB(0xffffff);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_COLORMASKMSBS(0);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_XFRMASKLO(0xffffff);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_XFRMASKHI(0xffffff);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_DRBPOINTERS(0xc8240);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_CONFIG(0xcac);
++ IMPACTSR_CFIFO(MMIO_FIXED)=IMPACTSR_CMD_XYWIN(0,0x3ff);
++ IMPACTSR_XMAP_PP1SELECT(MMIO_FIXED)=0x01;
++ IMPACTSR_XMAP_INDEX(MMIO_FIXED)=0x00;
++ IMPACTSR_XMAP_MAIN_MODE(MMIO_FIXED)=0x07a4;
++ IMPACTSR_VC3_INDEXDATA(MMIO_FIXED)=0x1d000100;
++}
++
++static int posx=-1, posy;
++static spinlock_t earlylock = SPIN_LOCK_UNLOCKED;
++void impactsr_earlychar(unsigned char c,unsigned f)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&earlylock,flags);
++ if(posx==-1)
++ goto out;
++ if(c=='\n') {
++ posy+=16;
++ if(posy>=1024)
++ posy=0;
++ posx=0;
++ goto out;
++ }
++ if(posx==0) {
++ impactsr_earlyrect(0,posy,1280,16,0x000000);
++ if(posy+16<1024)
++ impactsr_earlyrect(0,posy+16,1280,2,0x0000ff);
++ }
++ impactsr_paintchar(posx,posy,(unsigned char *)font_vga_8x16.data+(c<<4),f,0);
++ posx+=8;
++ if(posx>=1280) {
++ posx=0;
++ posy++;
++ if(posy>=1024)
++ posy=0;
++ }
++out:
++ spin_unlock_irqrestore(&earlylock,flags);
++}
++void impactsr_earlystring(char *s,unsigned f)
++{
++ while(*s)
++ impactsr_earlychar(*(s++),f);
++}
++void impactsr_earlyinit(void)
++{
++ impactsr_earlyhwinit();
++ impactsr_earlyrect(0,0,1280,1024,0);
++ posx=0;
++ posy=0;
++ impactsr_earlystring("ImpactSR early console ready.\n",0xffffff);
++}
++
++/* ------------------------------------------------------------------------- */
++
++ /*
++ * Initialization
++ */
++
++static void __init impactsr_hwinit(void)
++{
++ /* initialize hardware */
++ impactsr_inithq4(&info);
++ impactsr_initvc3(&info);
++ impactsr_initrss(&info);
++ impactsr_initxmap(&info);
++ impactsr_initdma(&info);
++}
++
++static int __init impactsr_devinit(void)
++{
++ int xwid;
++
++ xwid = ip30_xtalk_find(IMPACTSR_XTALK_MFGR, IMPACTSR_XTALK_PART, IP30_XTALK_NUM_WID);
++ if(xwid == -1)
++ return -ENODEV;
++
++ current_par.open_flag = 0;
++ current_par.mmap_flag = 0;
++ current_par.lock = SPIN_LOCK_UNLOCKED;
++
++ current_par.mmio_base = ip30_xtalk_swin(xwid);
++ current_par.mmio_virt = (unsigned long)ioremap(current_par.mmio_base,0x200000);
++
++ impactsr_fix.mmio_start = current_par.mmio_base;
++ impactsr_fix.mmio_len = 0x200000;
++
++ info.flags = FBINFO_FLAG_DEFAULT;
++ info.screen_base = NULL;
++ info.fbops = &impactsr_ops;
++ info.fix = impactsr_fix;
++ info.var = impactsr_var;
++ info.par = ¤t_par;
++ info.pseudo_palette = pseudo_palette;
++
++ /* get board config */
++ current_par.num_ge = IMPACTSR_BDVERS1(current_par.mmio_virt) & 3;
++ current_par.num_rss = current_par.num_ge;
++ info.fix.id[9] = '0' + current_par.num_rss;
++
++ impactsr_hwinit();
++ /* initialize buffers */
++ impactsr_resizekpool(&info,0,65536,0);
++ impactsr_resizekpool(&info,1,8192,0);
++ impactsr_resizekpool(&info,2,8192,0);
++ impactsr_resizekpool(&info,3,8192,0);
++ impactsr_resizekpool(&info,4,8192,0);
++
++ /* This has to been done !!! */
++ fb_alloc_cmap(&info.cmap, 256, 0);
++
++ if (register_framebuffer(&info) < 0)
++ return -EINVAL;
++ printk(KERN_INFO "fb%d: %s frame buffer device\n", info.node,
++ info.fix.id);
++ return 0;
++}
++
++static int __init impactsr_probe(struct device *dev)
++{
++ return impactsr_devinit();
++}
++
++static struct device_driver impactsr_driver = {
++ .name = "impactsr",
++ .bus = &platform_bus_type,
++ .probe = impactsr_probe,
++ /* add remove someday */
++};
++
++static struct platform_device impactsr_device = {
++ .name = "impactsr",
++};
++
++int __init impactsr_init(void)
++{
++ int ret = driver_register(&impactsr_driver);
++ if (!ret) {
++ ret = platform_device_register(&impactsr_device);
++ if (ret)
++ driver_unregister(&impactsr_driver);
++ }
++ return ret;
++}
++
++void __exit impactsr_exit(void)
++{
++ driver_unregister(&impactsr_driver);
++}
++
++module_init(impactsr_init);
++module_exit(impactsr_exit);
++
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.12-ioc3/drivers/video/logo/Kconfig linux-2.6.12-ip30/drivers/video/logo/Kconfig
+--- linux-2.6.12-ioc3/drivers/video/logo/Kconfig 2005-07-08 13:15:56.000000000 +0200
++++ linux-2.6.12-ip30/drivers/video/logo/Kconfig 2005-07-09 13:36:14.000000000 +0200
+@@ -40,7 +40,7 @@
+
+ config LOGO_SGI_CLUT224
+ bool "224-color SGI Linux logo"
+- depends on LOGO && (SGI_IP22 || SGI_IP27 || SGI_IP32 || X86_VISWS)
++ depends on LOGO && (SGI_IP22 || SGI_IP27 || SGI_IP30 || SGI_IP32 || X86_VISWS)
+ default y
+
+ config LOGO_SUN_CLUT224
+diff -urN linux-2.6.12-ioc3/drivers/video/odyssey.c linux-2.6.12-ip30/drivers/video/odyssey.c
+--- linux-2.6.12-ioc3/drivers/video/odyssey.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/drivers/video/odyssey.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,966 @@
++/*
++ * linux/drivers/video/odyssey.c -- SGI Octane Odyssey graphics
++ *
++ * Copyright (c) 2005 by Stanislaw Skowronek
++ *
++ * This driver, as most of the IP30 (SGI Octane) port, is a result of massive
++ * amounts of reverse engineering and trial-and-error. If anyone is interested
++ * in helping with it, please contact me: <skylark at linux-mips.org>.
++ *
++ * Note: the driver is specialcased for 8x16 font (will be a bit faster).
++ *
++ * Odyssey is a really cool graphics device. It is a dual-chip OpenGL
++ * implementation with ARB_imaging support, and overall a very elegant design.
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/string.h>
++#include <linux/mm.h>
++#include <linux/tty.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/vmalloc.h>
++#include <linux/module.h>
++#include <linux/dma-mapping.h>
++#include <linux/spinlock.h>
++#include <linux/font.h>
++
++#include <asm/mach-ip30/xtalk.h>
++#include <video/odyssey.h>
++
++struct odyssey_par {
++ /* physical mmio base in HEART XTalk space */
++ unsigned long mmio_base;
++ /* virtual mmio base in kernel space */
++ unsigned long mmio_virt;
++ /* locks to prevent simultaneous user and kernel access */
++ int open_flag;
++ int mmap_flag;
++ spinlock_t lock;
++};
++
++static struct fb_fix_screeninfo odyssey_fix = {
++ .id = "Odyssey",
++ .smem_start = 0,
++ .smem_len = 0,
++ .type = FB_TYPE_PACKED_PIXELS,
++ .visual = FB_VISUAL_TRUECOLOR,
++ .xpanstep = 0,
++ .ypanstep = 0,
++ .ywrapstep = 0,
++ .line_length = 0,
++ .accel = FB_ACCEL_SGI_ODYSSEY,
++};
++
++static struct fb_var_screeninfo odyssey_var = {
++ .xres = 1280,
++ .yres = 1024,
++ .xres_virtual = 1280,
++ .yres_virtual = 1024,
++ .bits_per_pixel = 24,
++ .red = { .offset = 0, .length = 8 },
++ .green = { .offset = 8, .length = 8 },
++ .blue = { .offset = 16, .length = 8 },
++ .transp = { .offset = 24, .length = 8 },
++};
++
++static struct fb_info info;
++
++static unsigned int pseudo_palette[256];
++
++static struct odyssey_par current_par;
++
++int odyssey_init(void);
++
++/* --------------------- Gory Details --------------------- */
++#define MMIO (((struct odyssey_par *)p->par)->mmio_virt)
++#define PAR (*((struct odyssey_par *)p->par))
++
++static unsigned int pack_ieee754(int val)
++{
++ unsigned sign,exp;
++ if(!val)
++ return 0;
++ sign=val&0x80000000;
++ if(sign)
++ val=-val;
++ if(val&0xff000000)
++ return 0;
++ exp=150;
++ while(!(val&0x00800000)) {
++ val<<=1;
++ exp--;
++ }
++ return sign|(exp<<23)|(val&0x007fffff);
++}
++static void odyssey_wait_cfifo(unsigned long mmio)
++{
++ while(!(ODY_STATUS0(mmio)&ODY_STATUS0_CFIFO_LW));
++}
++static void odyssey_wait_dfifo(unsigned long mmio,int lw)
++{
++ while((ODY_DBESTAT(mmio)&0x7f)>lw);
++}
++static void odyssey_dfifo_write(unsigned long mmio,unsigned reg,unsigned val)
++{
++ ODY_DFIFO_D(mmio)=((unsigned long)(0x30000001|(reg<<14))<<32)|val;
++}
++static void odyssey_flush(unsigned long mmio)
++{
++ odyssey_wait_cfifo(mmio);
++ ODY_CFIFO_W(mmio)=0x00010443;
++ ODY_CFIFO_W(mmio)=0x000000fa;
++ ODY_CFIFO_W(mmio)=0x00010046;
++ ODY_CFIFO_W(mmio)=0x00010046;
++ ODY_CFIFO_W(mmio)=0x00010019;
++ ODY_CFIFO_W(mmio)=0x00010443;
++ ODY_CFIFO_W(mmio)=0x00000096;
++ ODY_CFIFO_W(mmio)=0x00010046;
++ ODY_CFIFO_W(mmio)=0x00010046;
++ ODY_CFIFO_W(mmio)=0x00010046;
++ ODY_CFIFO_W(mmio)=0x00010046;
++ ODY_CFIFO_W(mmio)=0x00010443;
++ ODY_CFIFO_W(mmio)=0x000000fa;
++ ODY_CFIFO_W(mmio)=0x00010046;
++ ODY_CFIFO_W(mmio)=0x00010046;
++}
++static void odyssey_smallflush(unsigned long mmio)
++{
++ odyssey_wait_cfifo(mmio);
++ ODY_CFIFO_W(mmio)=0x00010443;
++ ODY_CFIFO_W(mmio)=0x000000fa;
++ ODY_CFIFO_W(mmio)=0x00010046;
++ ODY_CFIFO_W(mmio)=0x00010046;
++}
++
++static void odyssey_initbuzzgfe(unsigned long mmio)
++{
++ ODY_CFIFO_W(mmio)=0x20008003;
++ ODY_CFIFO_W(mmio)=0x21008010;
++ ODY_CFIFO_W(mmio)=0x22008000;
++ ODY_CFIFO_W(mmio)=0x23008002;
++ ODY_CFIFO_W(mmio)=0x2400800c;
++ ODY_CFIFO_W(mmio)=0x2500800e;
++ ODY_CFIFO_W(mmio)=0x27008000;
++ ODY_CFIFO_W(mmio)=0x28008000;
++ ODY_CFIFO_W(mmio)=0x290080d6;
++ ODY_CFIFO_W(mmio)=0x2a0080e0;
++ ODY_CFIFO_W(mmio)=0x2c0080ea;
++ ODY_CFIFO_W(mmio)=0x2e008380;
++ ODY_CFIFO_W(mmio)=0x2f008000;
++ ODY_CFIFO_W(mmio)=0x30008000;
++ ODY_CFIFO_W(mmio)=0x31008000;
++ ODY_CFIFO_W(mmio)=0x32008000;
++ ODY_CFIFO_W(mmio)=0x33008000;
++ ODY_CFIFO_W(mmio)=0x34008000;
++ ODY_CFIFO_W(mmio)=0x35008000;
++ ODY_CFIFO_W(mmio)=0x310081e0;
++ odyssey_flush(mmio);
++}
++
++static void odyssey_initbuzzxform(unsigned long mmio)
++{
++ ODY_CFIFO_W(mmio)=0x9080bda2;
++ ODY_CFIFO_W(mmio)=0x3f800000;
++ ODY_CFIFO_W(mmio)=0x3f000000;
++ ODY_CFIFO_W(mmio)=0xbf800000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x4e000000;
++ ODY_CFIFO_W(mmio)=0x40400000;
++ ODY_CFIFO_W(mmio)=0x4e000000;
++ ODY_CFIFO_W(mmio)=0x4d000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x34008000;
++ ODY_CFIFO_W(mmio)=0x9080bdc8;
++ ODY_CFIFO_W(mmio)=0x3f800000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x3f000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x3f800000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x3f000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x3f800000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x3f800000;
++ ODY_CFIFO_W(mmio)=0x34008010;
++ ODY_CFIFO_W(mmio)=0x908091df;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x3f800000;
++ ODY_CFIFO_W(mmio)=0x34008000;
++ odyssey_flush(mmio);
++}
++
++static void odyssey_initbuzzrast(unsigned long mmio)
++{
++ ODY_CFIFO_W(mmio)=0x0001203b;
++ ODY_CFIFO_W(mmio)=0x00001000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00001000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00001000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00001000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x0001084a;
++ ODY_CFIFO_W(mmio)=0x00000080;
++ ODY_CFIFO_W(mmio)=0x00000080;
++ ODY_CFIFO_W(mmio)=0x00010845;
++ ODY_CFIFO_W(mmio)=0x000000ff;
++ ODY_CFIFO_W(mmio)=0x000076ff;
++ ODY_CFIFO_W(mmio)=0x0001141b;
++ ODY_CFIFO_W(mmio)=0x00000001;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00011c16;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x03000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00010404;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00011023;
++ ODY_CFIFO_W(mmio)=0x00ff0ff0;
++ ODY_CFIFO_W(mmio)=0x00ff0ff0;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x000000ff;
++ ODY_CFIFO_W(mmio)=0x00011017;
++ ODY_CFIFO_W(mmio)=0x00002000;
++ ODY_CFIFO_W(mmio)=0x00000050;
++ ODY_CFIFO_W(mmio)=0x20004950;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x0001204b;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x004ff3ff;
++ ODY_CFIFO_W(mmio)=0x00ffffff;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00ffffff;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00ffffff;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ odyssey_flush(mmio);
++}
++
++static void odyssey_initpbjvc(unsigned long mmio)
++{
++ int x;
++ odyssey_wait_dfifo(mmio,0);
++ for(x=0;x<16;x++)
++ odyssey_dfifo_write(mmio,0x2900|x,0x905215a6);
++ odyssey_wait_dfifo(mmio,0);
++ for(x=16;x<32;x++)
++ odyssey_dfifo_write(mmio,0x2900|x,0x905215a6);
++ odyssey_wait_dfifo(mmio,0);
++ odyssey_dfifo_write(mmio,0x2581,0x00000000);
++}
++
++static void odyssey_initpbjgamma(unsigned long mmio)
++{
++ unsigned i,v;
++ for(i=0;i<0x200;i++) {
++ if((i&15)==0)
++ odyssey_wait_dfifo(mmio,0);
++ v=i>>2;
++ v=(v<<20)|(v<<10)|v;
++ odyssey_dfifo_write(mmio,i+0x1A00,v);
++ }
++ for(i=0x200;i<0x300;i++) {
++ if((i&15)==0)
++ odyssey_wait_dfifo(mmio,0);
++ v=((i-0x200)>>1)+0x80;
++ v=(v<<20)|(v<<10)|v;
++ odyssey_dfifo_write(mmio,i+0x1A00,v);
++ }
++ for(i=0x300;i<0x600;i++) {
++ if((i&15)==0)
++ odyssey_wait_dfifo(mmio,0);
++ v=(i-0x300)+0x100;
++ v=(v<<20)|(v<<10)|v;
++ odyssey_dfifo_write(mmio,i+0x1A00,v);
++ }
++}
++
++static void odyssey_rect(unsigned long mmio, int x, int y, int w, int h, unsigned c, int lo)
++{
++ if(lo!=ODY_LO_COPY) {
++ ODY_CFIFO_W(mmio)=0x00010404;
++ ODY_CFIFO_W(mmio)=0x00100000;
++ ODY_CFIFO_W(mmio)=0x00010422; /* glLogicOp */
++ ODY_CFIFO_W(mmio)=lo;
++ odyssey_smallflush(mmio);
++ }
++ ODY_CFIFO_W(mmio)=0x00014400; /* glBegin */
++ ODY_CFIFO_W(mmio)=0x00000007; /* GL_QUADS */
++ ODY_CFIFO_W(mmio)=0xc580cc08; /* glColor3ub */
++ ODY_CFIFO_W(mmio)=c&255;
++ ODY_CFIFO_W(mmio)=(c>>8)&255;
++ ODY_CFIFO_W(mmio)=(c>>16)&255;
++ ODY_CFIFO_W(mmio)=0x8080c800; /* glVertex2i */
++ ODY_CFIFO_W(mmio)=x;
++ ODY_CFIFO_W(mmio)=y;
++ ODY_CFIFO_W(mmio)=0x8080c800; /* glVertex2i */
++ ODY_CFIFO_W(mmio)=x+w;
++ ODY_CFIFO_W(mmio)=y;
++ ODY_CFIFO_W(mmio)=0x8080c800; /* glVertex2i */
++ ODY_CFIFO_W(mmio)=x+w;
++ ODY_CFIFO_W(mmio)=y+h;
++ ODY_CFIFO_W(mmio)=0x8080c800; /* glVertex2i */
++ ODY_CFIFO_W(mmio)=x;
++ ODY_CFIFO_W(mmio)=y+h;
++ ODY_CFIFO_W(mmio)=0x00014001; /* glEnd */
++ odyssey_smallflush(mmio);
++ if(lo!=ODY_LO_COPY) {
++ ODY_CFIFO_W(mmio)=0x00010404;
++ ODY_CFIFO_W(mmio)=0x00000000;
++ ODY_CFIFO_W(mmio)=0x00010422; /* glLogicOp */
++ ODY_CFIFO_W(mmio)=ODY_LO_COPY;
++ odyssey_smallflush(mmio);
++ }
++}
++
++static unsigned odyssey_getpalreg(struct fb_info *p, unsigned i)
++{
++ return ((unsigned *)p->pseudo_palette)[i];
++}
++
++/* ------------ Accelerated Functions --------------------- */
++
++static void odyssey_fillrect(struct fb_info *p, const struct fb_fillrect *region)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if(PAR.open_flag) {
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return;
++ }
++ switch(region->rop) {
++ case ROP_XOR:
++ odyssey_rect(MMIO,region->dx,region->dy,region->width,region->height,odyssey_getpalreg(p,region->color),ODY_LO_XOR);
++ break;
++ case ROP_COPY:
++ default:
++ odyssey_rect(MMIO,region->dx,region->dy,region->width,region->height,odyssey_getpalreg(p,region->color),ODY_LO_COPY);
++ break;
++ }
++ spin_unlock_irqrestore(&PAR.lock,flags);
++}
++
++static void odyssey_copyarea(struct fb_info *p, const struct fb_copyarea *area)
++{
++ unsigned long flags;
++ unsigned sx,sy,dx,dy,w,h;
++ w=area->width;
++ h=area->height;
++ if(w<1 || h<1)
++ return;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if(PAR.open_flag) {
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return;
++ }
++ sx=area->sx;
++ sy=area->sy;
++ dx=area->dx;
++ dy=area->dy;
++ odyssey_flush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x00010658;
++ ODY_CFIFO_W(MMIO)=0x00120000;
++ ODY_CFIFO_W(MMIO)=0x00002031;
++ ODY_CFIFO_W(MMIO)=0x00002000;
++ ODY_CFIFO_W(MMIO)=sx|(sy<<16);
++ ODY_CFIFO_W(MMIO)=0x80502050;
++ ODY_CFIFO_W(MMIO)=w|(h<<16); // size
++ ODY_CFIFO_W(MMIO)=0x82223042;
++ ODY_CFIFO_W(MMIO)=0x00002000;
++ ODY_CFIFO_W(MMIO)=dx|(dy<<16); // dest
++ ODY_CFIFO_W(MMIO)=0x3222204b;
++ /* draw stuff */
++ spin_unlock_irqrestore(&PAR.lock,flags);
++}
++
++static void odyssey_imageblit_8bpp(struct fb_info *p, const struct fb_image *image)
++{
++ int i,j,l;
++ const unsigned char *dp;
++ unsigned pal[256];
++ dp=image->data;
++ for(i=0;i<256;i++)
++ pal[i]=odyssey_getpalreg(p,i);
++ /* perform a PIO blit to card */
++ odyssey_smallflush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x00010405;
++ ODY_CFIFO_W(MMIO)=0x00002400;
++ ODY_CFIFO_W(MMIO)=0xc580cc08;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00011453;
++ ODY_CFIFO_W(MMIO)=0x00000002;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ odyssey_flush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x2900812f;
++ ODY_CFIFO_W(MMIO)=0x00014400;
++ ODY_CFIFO_W(MMIO)=0x0000000a;
++ ODY_CFIFO_W(MMIO)=0xcf80a92f;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=pack_ieee754(image->dx);
++ ODY_CFIFO_W(MMIO)=pack_ieee754(image->dy);
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=pack_ieee754(image->dx+image->width);
++ ODY_CFIFO_W(MMIO)=pack_ieee754(image->dy+image->height);
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x8080c800;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00004570;
++ ODY_CFIFO_W(MMIO)=0x0f00104c;
++ ODY_CFIFO_W(MMIO)=0x00000071;
++ for(j=0;j<image->height;j++) {
++ ODY_CFIFO_W(MMIO)=0x00004570;
++ ODY_CFIFO_W(MMIO)=0x0fd1104c;
++ ODY_CFIFO_W(MMIO)=0x00000071;
++ i=image->width;
++ while(i>0) {
++ l=(i>14)?14:i;
++ i-=l;
++ ODY_CFIFO_W(MMIO)=0x00014011|(l<<10);
++ while(l--)
++ ODY_CFIFO_W(MMIO)=pal[*(dp++)];
++ }
++ }
++ ODY_CFIFO_W(MMIO)=0x00014001;
++ odyssey_smallflush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x290080d6;
++ ODY_CFIFO_W(MMIO)=0x00011453;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00010405;
++ ODY_CFIFO_W(MMIO)=0x00002000;
++ odyssey_flush(MMIO);
++}
++
++static void odyssey_imageblit_1bpp_stp(struct fb_info *p, const struct fb_image *image)
++{
++ unsigned palf,palb,buf;
++ int i;
++ const unsigned char *pic;
++ palf=odyssey_getpalreg(p,image->fg_color);
++ palb=odyssey_getpalreg(p,image->bg_color);
++ odyssey_smallflush(MMIO);
++ if((image->dy&31)<16)
++ ODY_CFIFO_W(MMIO)=0x00013c4e;
++ else
++ ODY_CFIFO_W(MMIO)=0x00013c4f;
++ pic=image->data;
++ for(i=0;i<16;i++) {
++ buf=*(pic++);
++ buf|=buf<<8;
++ ODY_CFIFO_W(MMIO)=buf|(buf<<16);
++ }
++ ODY_CFIFO_W(MMIO)=0x00010404;
++ ODY_CFIFO_W(MMIO)=0x00000018;
++ odyssey_smallflush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x0001043f;
++ ODY_CFIFO_W(MMIO)=0x00000010;
++ ODY_CFIFO_W(MMIO)=0x00010c21;
++ ODY_CFIFO_W(MMIO)=0x00000200;
++ ODY_CFIFO_W(MMIO)=((palb&255)<<16)|((palb>>4)&0xff0);
++ ODY_CFIFO_W(MMIO)=(palb&0xff0000)|0xfff;
++ ODY_CFIFO_W(MMIO)=0x00014400;
++ ODY_CFIFO_W(MMIO)=0x00010407;
++ ODY_CFIFO_W(MMIO)=0xc580cc08;
++ ODY_CFIFO_W(MMIO)=palf&255;
++ ODY_CFIFO_W(MMIO)=(palf>>8)&255;
++ ODY_CFIFO_W(MMIO)=(palf>>16)&255;
++ ODY_CFIFO_W(MMIO)=0x8080c800;
++ ODY_CFIFO_W(MMIO)=image->dx;
++ ODY_CFIFO_W(MMIO)=image->dy;
++ ODY_CFIFO_W(MMIO)=0x8080c800;
++ ODY_CFIFO_W(MMIO)=image->dx+8;
++ ODY_CFIFO_W(MMIO)=image->dy;
++ ODY_CFIFO_W(MMIO)=0x8080c800;
++ ODY_CFIFO_W(MMIO)=image->dx+8;
++ ODY_CFIFO_W(MMIO)=image->dy+16;
++ ODY_CFIFO_W(MMIO)=0x8080c800;
++ ODY_CFIFO_W(MMIO)=image->dx;
++ ODY_CFIFO_W(MMIO)=image->dy+16;
++ ODY_CFIFO_W(MMIO)=0x00014001;
++ odyssey_flush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x00010404;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++}
++
++/* this is a slow fallback */
++static void odyssey_imageblit_1bpp_pio(struct fb_info *p, const struct fb_image *image)
++{
++ int i,j,l,c;
++ const unsigned char *dp;
++ unsigned char d=0;
++ unsigned palf,palb;
++ dp=image->data;
++ palf=odyssey_getpalreg(p,image->fg_color);
++ palb=odyssey_getpalreg(p,image->bg_color);
++ /* perform a PIO blit to card */
++ odyssey_smallflush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x00010405;
++ ODY_CFIFO_W(MMIO)=0x00002400;
++ ODY_CFIFO_W(MMIO)=0xc580cc08;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00011453;
++ ODY_CFIFO_W(MMIO)=0x00000002;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ odyssey_flush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x2900812f;
++ ODY_CFIFO_W(MMIO)=0x00014400;
++ ODY_CFIFO_W(MMIO)=0x0000000a;
++ ODY_CFIFO_W(MMIO)=0xcf80a92f;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=pack_ieee754(image->dx);
++ ODY_CFIFO_W(MMIO)=pack_ieee754(image->dy);
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=pack_ieee754(image->dx+image->width);
++ ODY_CFIFO_W(MMIO)=pack_ieee754(image->dy+image->height);
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x8080c800;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00004570;
++ ODY_CFIFO_W(MMIO)=0x0f00104c;
++ ODY_CFIFO_W(MMIO)=0x00000071;
++ for(j=0;j<image->height;j++) {
++ c=0;
++ ODY_CFIFO_W(MMIO)=0x00004570;
++ ODY_CFIFO_W(MMIO)=0x0fd1104c;
++ ODY_CFIFO_W(MMIO)=0x00000071;
++ i=image->width;
++ while(i>0) {
++ l=(i>14)?14:i;
++ i-=l;
++ ODY_CFIFO_W(MMIO)=0x00014011|(l<<10);
++ while(l--) {
++ if(!c)
++ d=*(dp++);
++ ODY_CFIFO_W(MMIO)=(d&0x80)?palf:palb;
++ d<<=1;
++ c=(c+1)&7;
++ }
++ }
++ }
++ ODY_CFIFO_W(MMIO)=0x00014001;
++ odyssey_smallflush(MMIO);
++ ODY_CFIFO_W(MMIO)=0x290080d6;
++ ODY_CFIFO_W(MMIO)=0x00011453;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00000000;
++ ODY_CFIFO_W(MMIO)=0x00010405;
++ ODY_CFIFO_W(MMIO)=0x00002000;
++ odyssey_flush(MMIO);
++}
++
++static void odyssey_imageblit(struct fb_info *p, const struct fb_image *image)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if(PAR.open_flag) {
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return;
++ }
++ switch(image->depth) {
++ case 1:
++ if(image->width!=8 || image->height!=16 ||
++ image->dx&7 || image->dy&15)
++ odyssey_imageblit_1bpp_pio(p,image);
++ else
++ odyssey_imageblit_1bpp_stp(p,image);
++ break;
++ case 8:
++ odyssey_imageblit_8bpp(p,image);
++ break;
++ }
++ spin_unlock_irqrestore(&PAR.lock,flags);
++}
++
++static int odyssey_sync(struct fb_info *info)
++{
++ return 0;
++}
++
++static int odyssey_blank(int blank_mode, struct fb_info *info)
++{
++ /* TODO */
++ return 0;
++}
++
++static int odyssey_setcolreg(unsigned regno, unsigned red, unsigned green,
++ unsigned blue, unsigned transp, struct fb_info *info)
++{
++ if(regno>255)
++ return 1;
++ ((unsigned *)info->pseudo_palette)[regno]=(red>>8)|(green&0xff00)|((blue<<8)&0xff0000);
++ return 0;
++}
++
++/* ------------------- Framebuffer Access -------------------- */
++
++ssize_t odyssey_read(struct file *file, char *buf, size_t count, loff_t *ppos)
++{
++ return -EINVAL;
++}
++
++ssize_t odyssey_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
++{
++ return -EINVAL;
++}
++
++/* --------------------- Userland Access --------------------- */
++
++int odyssey_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
++ unsigned long arg, struct fb_info *info)
++{
++ return -EINVAL;
++}
++
++int odyssey_mmap(struct fb_info *p, struct file *file, struct vm_area_struct *vma)
++{
++ unsigned long size = vma->vm_end - vma->vm_start;
++ unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
++ unsigned long start = vma->vm_start;
++
++ switch(offset) {
++ case 0x0000000:
++ if(size!=0x410000)
++ return -EINVAL;
++ if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
++ return -EINVAL;
++ offset += MMIO;
++ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
++ vma->vm_flags |= VM_IO;
++ if (remap_pfn_range(vma, start, offset>>PAGE_SHIFT, size, vma->vm_page_prot))
++ return -EAGAIN;
++ vma->vm_file = file;
++ PAR.mmap_flag = 1;
++ return 0;
++ default:
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++static int odyssey_open(struct fb_info *p, int user)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if (user)
++ PAR.open_flag++;
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return 0;
++}
++
++static int odyssey_release(struct fb_info *p, int user)
++{
++ unsigned long flags;
++ spin_lock_irqsave(&PAR.lock,flags);
++ if (user && PAR.open_flag) {
++ PAR.open_flag--;
++ if (PAR.open_flag == 0)
++ PAR.mmap_flag = 0;
++ }
++ spin_unlock_irqrestore(&PAR.lock,flags);
++ return 0;
++}
++
++
++/* ------------------------------------------------------------------------- */
++
++ /*
++ * Frame buffer operations
++ */
++
++static struct fb_ops odyssey_ops = {
++ .owner = THIS_MODULE,
++ .fb_read = odyssey_read,
++ .fb_write = odyssey_write,
++ .fb_blank = odyssey_blank,
++ .fb_fillrect = odyssey_fillrect,
++ .fb_copyarea = odyssey_copyarea,
++ .fb_imageblit = odyssey_imageblit,
++ .fb_cursor = soft_cursor,
++ .fb_sync = odyssey_sync,
++ .fb_ioctl = odyssey_ioctl,
++ .fb_setcolreg = odyssey_setcolreg,
++ .fb_mmap = odyssey_mmap,
++ .fb_open = odyssey_open,
++ .fb_release = odyssey_release,
++};
++
++/* ------------------------------------------------------------------------- */
++
++ /*
++ * Private early console
++ */
++
++#define MMIO_FIXED 0x900000001b000000
++
++int odyssey_earlyactive=1;
++static void odyssey_earlyrect(int x, int y, int w, int h, unsigned c)
++{
++ odyssey_rect(MMIO_FIXED,x,y,w,h,c,ODY_LO_COPY);
++}
++static void odyssey_earlypaintchar(int x, int y, unsigned char *b, unsigned c, unsigned a)
++{
++ int i,j;
++ odyssey_smallflush(MMIO_FIXED);
++ ODY_CFIFO_W(MMIO_FIXED)=0x00010405;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00002400;
++ ODY_CFIFO_W(MMIO_FIXED)=0xc580cc08;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00011453;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000002;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ odyssey_flush(MMIO_FIXED);
++ ODY_CFIFO_W(MMIO_FIXED)=0x2900812f;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00014400;
++ ODY_CFIFO_W(MMIO_FIXED)=0x0000000a;
++ ODY_CFIFO_W(MMIO_FIXED)=0xcf80a92f;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=pack_ieee754(x);
++ ODY_CFIFO_W(MMIO_FIXED)=pack_ieee754(y);
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=pack_ieee754(x+8);
++ ODY_CFIFO_W(MMIO_FIXED)=pack_ieee754(y+16);
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x8080c800;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00004570;
++ ODY_CFIFO_W(MMIO_FIXED)=0x0f00104c;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000071;
++ for(j=0;j<16;j++) {
++ ODY_CFIFO_W(MMIO_FIXED)=0x00004570;
++ ODY_CFIFO_W(MMIO_FIXED)=0x0fd1104c;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000071;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00016011;
++ for(i=7;i>=0;i--)
++ if((b[j]>>i)&1)
++ ODY_CFIFO_W(MMIO_FIXED)=c;
++ else
++ ODY_CFIFO_W(MMIO_FIXED)=a;
++ }
++ ODY_CFIFO_W(MMIO_FIXED)=0x00014001;
++ odyssey_smallflush(MMIO_FIXED);
++ ODY_CFIFO_W(MMIO_FIXED)=0x290080d6;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00011453;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00000000;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00010405;
++ ODY_CFIFO_W(MMIO_FIXED)=0x00002000;
++ odyssey_flush(MMIO_FIXED);
++}
++static void odyssey_earlyhwinit(void)
++{
++ odyssey_initbuzzgfe(MMIO_FIXED);
++ odyssey_initbuzzxform(MMIO_FIXED);
++ odyssey_initbuzzrast(MMIO_FIXED);
++ odyssey_initpbjvc(MMIO_FIXED);
++ odyssey_initpbjgamma(MMIO_FIXED);
++}
++
++static int posx=-1, posy;
++static spinlock_t earlylock = SPIN_LOCK_UNLOCKED;
++void odyssey_earlychar(unsigned char c,unsigned f)
++{
++ unsigned long flags;
++ if(!odyssey_earlyactive)
++ return;
++ spin_lock_irqsave(&earlylock,flags);
++ if(posx==-1)
++ goto out;
++ if(c=='\n') {
++ posy+=16;
++ if(posy>=1024)
++ posy=0;
++ posx=0;
++ goto out;
++ }
++ if(posx==0) {
++ odyssey_earlyrect(0,posy,1280,16,0x000000);
++ if(posy+16<1024)
++ odyssey_earlyrect(0,posy+16,1280,1,0x0000ff);
++ }
++ odyssey_earlypaintchar(posx,posy,(unsigned char *)font_vga_8x16.data+(c<<4),f,0);
++ posx+=8;
++ if(posx>=1280) {
++ posx=0;
++ posy++;
++ if(posy>=1024)
++ posy=0;
++ }
++out:
++ spin_unlock_irqrestore(&earlylock,flags);
++}
++void odyssey_earlystring(char *s,unsigned f)
++{
++ while(*s)
++ odyssey_earlychar(*(s++),f);
++}
++void odyssey_earlyinit(void)
++{
++ odyssey_earlyhwinit();
++ odyssey_earlyrect(0,0,1280,1024,0);
++ posx=0;
++ posy=0;
++ odyssey_earlystring("Odyssey early console ready.\n",0xffffff);
++}
++
++/* ------------------------------------------------------------------------- */
++
++ /*
++ * Initialization
++ */
++
++static void __init odyssey_hwinit(unsigned long mmio)
++{
++ /* initialize hardware */
++ odyssey_initbuzzgfe(mmio);
++ odyssey_initbuzzxform(mmio);
++ odyssey_initbuzzrast(mmio);
++ odyssey_initpbjvc(mmio);
++ odyssey_initpbjgamma(mmio);
++}
++
++static int __init odyssey_devinit(void)
++{
++ int xwid;
++
++ xwid = ip30_xtalk_find(ODY_XTALK_MFGR, ODY_XTALK_PART, IP30_XTALK_NUM_WID);
++ if(xwid == -1)
++ return -ENODEV;
++
++ current_par.open_flag = 0;
++ current_par.mmap_flag = 0;
++ current_par.lock = SPIN_LOCK_UNLOCKED;
++
++ current_par.mmio_base = ip30_xtalk_swin(xwid);
++ current_par.mmio_virt = (unsigned long)ioremap(current_par.mmio_base,0x410000);
++
++ odyssey_fix.mmio_start = current_par.mmio_base;
++ odyssey_fix.mmio_len = 0x410000;
++
++ info.flags = FBINFO_FLAG_DEFAULT;
++ info.screen_base = NULL;
++ info.fbops = &odyssey_ops;
++ info.fix = odyssey_fix;
++ info.var = odyssey_var;
++ info.par = ¤t_par;
++ info.pseudo_palette = pseudo_palette;
++
++ odyssey_hwinit(current_par.mmio_virt);
++
++ /* This has to been done !!! */
++ fb_alloc_cmap(&info.cmap, 256, 0);
++
++ odyssey_earlyactive = 0;
++
++ if (register_framebuffer(&info) < 0)
++ return -EINVAL;
++ printk(KERN_INFO "fb%d: %s frame buffer device\n", info.node,
++ info.fix.id);
++
++ return 0;
++}
++
++static int __init odyssey_probe(struct device *dev)
++{
++ return odyssey_devinit();
++}
++
++static struct device_driver odyssey_driver = {
++ .name = "odyssey",
++ .bus = &platform_bus_type,
++ .probe = odyssey_probe,
++ /* add remove someday */
++};
++
++static struct platform_device odyssey_device = {
++ .name = "odyssey",
++};
++
++int __init odyssey_init(void)
++{
++ int ret = driver_register(&odyssey_driver);
++ if (!ret) {
++ ret = platform_device_register(&odyssey_device);
++ if (ret)
++ driver_unregister(&odyssey_driver);
++ }
++ return ret;
++}
++
++void __exit odyssey_exit(void)
++{
++ driver_unregister(&odyssey_driver);
++}
++
++module_init(odyssey_init);
++module_exit(odyssey_exit);
++
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.12-ioc3/include/asm-mips/addrspace.h linux-2.6.12-ip30/include/asm-mips/addrspace.h
+--- linux-2.6.12-ioc3/include/asm-mips/addrspace.h 2005-07-08 13:16:45.000000000 +0200
++++ linux-2.6.12-ip30/include/asm-mips/addrspace.h 2005-07-09 13:36:14.000000000 +0200
+@@ -51,6 +51,14 @@
+ #define XPHYSADDR(a) ((_ACAST64_(a)) & \
+ _LLCONST_(0x000000ffffffffff))
+
++#ifndef __ASSEMBLY__
++#ifdef CONFIG_MIPS64
++unsigned long kernel_physaddr(unsigned long);
++#else
++#define kernel_physaddr CPHYSADDR
++#endif
++#endif
++
+ #ifdef CONFIG_MIPS64
+
+ /*
+diff -urN linux-2.6.12-ioc3/include/asm-mips/mach-ip30/addrs.h linux-2.6.12-ip30/include/asm-mips/mach-ip30/addrs.h
+--- linux-2.6.12-ioc3/include/asm-mips/mach-ip30/addrs.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/asm-mips/mach-ip30/addrs.h 2005-07-10 14:51:01.000000000 +0200
+@@ -0,0 +1,33 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (c) 2004 Stanislaw Skowronek
++ */
++#ifndef _ASM_SGI_IP30_ADDRS_H
++#define _ASM_SGI_IP30_ADDRS_H
++
++#include <linux/config.h>
++
++typedef int nasid_t;
++
++#define IP30_WIDGET_XBOW 0
++#define IP30_WIDGET_HEART 8
++#define IP30_WIDGET_GFX_1 12
++#define IP30_WIDGET_BASEIO 15
++
++#define NODE_SWIN_BASE(nasid, widget) \
++ (0x0000000010000000|(((unsigned long)(widget))<<24))
++#define NODE_BWIN_BASE(nasid, widget) \
++ (0x0000001000000000|(((unsigned long)(widget))<<36))
++
++#define RAW_NODE_SWIN_BASE(nasid, widget) \
++ (0x9000000010000000|(((unsigned long)(widget))<<24))
++#define RAW_NODE_BWIN_BASE(nasid, widget) \
++ (0x9000001000000000|(((unsigned long)(widget))<<36))
++
++#define SWIN_SIZE 0x1000000
++#define BWIN_SIZE 0x1000000000L
++
++#endif /* _ASM_SGI_IP30_ADDRS_H */
+diff -urN linux-2.6.12-ioc3/include/asm-mips/mach-ip30/cpu-feature-overrides.h linux-2.6.12-ip30/include/asm-mips/mach-ip30/cpu-feature-overrides.h
+--- linux-2.6.12-ioc3/include/asm-mips/mach-ip30/cpu-feature-overrides.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/asm-mips/mach-ip30/cpu-feature-overrides.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,28 @@
++#ifndef __ASM_MACH_IP30_CPU_FEATURE_OVERRIDES_H
++#define __ASM_MACH_IP30_CPU_FEATURE_OVERRIDES_H
++
++#define cpu_has_watch 1
++#define cpu_has_mips16 0
++#define cpu_has_divec 0
++#define cpu_has_vce 0
++#define cpu_has_cache_cdex_p 0
++#define cpu_has_cache_cdex_s 0
++#define cpu_has_prefetch 1
++#define cpu_has_mcheck 0
++#define cpu_has_ejtag 0
++
++#define cpu_has_llsc 1
++#define cpu_has_vtag_icache 0
++#define cpu_has_dc_aliases 0
++#define cpu_has_ic_fills_f_dc 0
++
++#define cpu_has_nofpuex 0
++#define cpu_has_64bits 1
++
++#define cpu_has_subset_pcaches 1
++
++#define cpu_dcache_line_size() 32
++#define cpu_icache_line_size() 64
++#define cpu_scache_line_size() 128
++
++#endif
+diff -urN linux-2.6.12-ioc3/include/asm-mips/mach-ip30/heart.h linux-2.6.12-ip30/include/asm-mips/mach-ip30/heart.h
+--- linux-2.6.12-ioc3/include/asm-mips/mach-ip30/heart.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/asm-mips/mach-ip30/heart.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,213 @@
++/*
++ * Copyright (C) 2004,5 Stanislaw Skowronek
++ */
++
++#ifndef _HEART_H
++#define _HEART_H
++
++/* HEART internal register space */
++#define HEART_PIU_BASE 0x900000000FF00000
++
++/* full addresses */
++#define HEART_MODE ((volatile unsigned long *)HEART_PIU_BASE)
++#define HEART_SDRAM_MODE ((volatile unsigned long *)(HEART_PIU_BASE+0x08))
++#define HEART_MEM_REF ((volatile unsigned long *)(HEART_PIU_BASE+0x10))
++#define HEART_MEM_REQ_ARB ((volatile unsigned long *)(HEART_PIU_BASE+0x18))
++#define HEART_MEMCFG0 ((volatile unsigned long *)(HEART_PIU_BASE+0x20))
++#define HEART_MEMCFG1 ((volatile unsigned long *)(HEART_PIU_BASE+0x28))
++#define HEART_MEMCFG2 ((volatile unsigned long *)(HEART_PIU_BASE+0x30))
++#define HEART_MEMCFG3 ((volatile unsigned long *)(HEART_PIU_BASE+0x38))
++#define HEART_FC_MODE ((volatile unsigned long *)(HEART_PIU_BASE+0x40))
++#define HEART_FC_TIMER_LIMIT ((volatile unsigned long *)(HEART_PIU_BASE+0x48))
++#define HEART_FC0_ADDR ((volatile unsigned long *)(HEART_PIU_BASE+0x50))
++#define HEART_FC1_ADDR ((volatile unsigned long *)(HEART_PIU_BASE+0x58))
++#define HEART_FC0_CR_CNT ((volatile unsigned long *)(HEART_PIU_BASE+0x60))
++#define HEART_FC1_CR_CNT ((volatile unsigned long *)(HEART_PIU_BASE+0x68))
++#define HEART_FC0_TIMER ((volatile unsigned long *)(HEART_PIU_BASE+0x70))
++#define HEART_FC1_TIMER ((volatile unsigned long *)(HEART_PIU_BASE+0x78))
++#define HEART_STATUS ((volatile unsigned long *)(HEART_PIU_BASE+0x80))
++#define HEART_BERR_ADDR ((volatile unsigned long *)(HEART_PIU_BASE+0x88))
++#define HEART_BERR_MISC ((volatile unsigned long *)(HEART_PIU_BASE+0x90))
++#define HEART_MEMERR_ADDR ((volatile unsigned long *)(HEART_PIU_BASE+0x98))
++#define HEART_MEMERR_DATA ((volatile unsigned long *)(HEART_PIU_BASE+0xa0))
++#define HEART_PIUR_ACC_ERR ((volatile unsigned long *)(HEART_PIU_BASE+0xa8))
++#define HEART_MLAN_CLK_DIV ((volatile unsigned long *)(HEART_PIU_BASE+0xb0))
++#define HEART_MLAN_CTL ((volatile unsigned long *)(HEART_PIU_BASE+0xb8))
++#define HEART_IMR(x) ((volatile unsigned long *)(HEART_PIU_BASE+0x10000+8*(x)))
++#define HEART_SET_ISR ((volatile unsigned long *)(HEART_PIU_BASE+0x10020))
++#define HEART_CLR_ISR ((volatile unsigned long *)(HEART_PIU_BASE+0x10028))
++#define HEART_ISR ((volatile unsigned long *)(HEART_PIU_BASE+0x10030))
++#define HEART_IMSR ((volatile unsigned long *)(HEART_PIU_BASE+0x10038))
++#define HEART_CAUSE ((volatile unsigned long *)(HEART_PIU_BASE+0x10040))
++#define HEART_COUNT ((volatile unsigned long *)(HEART_PIU_BASE+0x20000)) /* 52-bit counter */
++#define HEART_COMPARE ((volatile unsigned long *)(HEART_PIU_BASE+0x30000)) /* 24-bit compare */
++#define HEART_TRIGGER ((volatile unsigned long *)(HEART_PIU_BASE+0x40000))
++#define HEART_PRID ((volatile unsigned long *)(HEART_PIU_BASE+0x50000))
++#define HEART_SYNC ((volatile unsigned long *)(HEART_PIU_BASE+0x60000))
++
++/* bits in the HEART_MODE registers */
++#define HM_PROC_DISABLE_SHFT 60
++#define HM_PROC_DISABLE_MSK ((unsigned long) 0xf << HM_PROC_DISABLE_SHFT)
++#define HM_PROC_DISABLE(x) ((unsigned long) 0x1 << (x) + HM_PROC_DISABLE_SHFT)
++#define HM_MAX_PSR ((unsigned long) 0x7 << 57)
++#define HM_MAX_IOSR ((unsigned long) 0x7 << 54)
++#define HM_MAX_PEND_IOSR ((unsigned long) 0x7 << 51)
++
++#define HM_TRIG_SRC_SEL_MSK ((unsigned long) 0x7 << 48)
++#define HM_TRIG_HEART_EXC ((unsigned long) 0x0 << 48) /* power-up default */
++#define HM_TRIG_REG_BIT ((unsigned long) 0x1 << 48)
++#define HM_TRIG_SYSCLK ((unsigned long) 0x2 << 48)
++#define HM_TRIG_MEMCLK_2X ((unsigned long) 0x3 << 48)
++#define HM_TRIG_MEMCLK ((unsigned long) 0x4 << 48)
++#define HM_TRIG_IOCLK ((unsigned long) 0x5 << 48)
++
++#define HM_PIU_TEST_MODE ((unsigned long) 0xf << 40)
++
++#define HM_GP_FLAG_MSK ((unsigned long) 0xf << 36)
++#define HM_GP_FLAG(x) ((unsigned long) 0x1 << (x) + 36)
++
++#define HM_MAX_PROC_HYST ((unsigned long) 0xf << 32)
++#define HM_LLP_WRST_AFTER_RST ((unsigned long) 0x1 << 28)
++#define HM_LLP_LINK_RST ((unsigned long) 0x1 << 27)
++#define HM_LLP_WARM_RST ((unsigned long) 0x1 << 26)
++#define HM_COR_ECC_LCK ((unsigned long) 0x1 << 25)
++#define HM_REDUCED_PWR ((unsigned long) 0x1 << 24)
++#define HM_COLD_RST ((unsigned long) 0x1 << 23)
++#define HM_SW_RST ((unsigned long) 0x1 << 22)
++#define HM_MEM_FORCE_WR ((unsigned long) 0x1 << 21)
++#define HM_DB_ERR_GEN ((unsigned long) 0x1 << 20)
++#define HM_SB_ERR_GEN ((unsigned long) 0x1 << 19)
++#define HM_CACHED_PIO_EN ((unsigned long) 0x1 << 18)
++#define HM_CACHED_PROM_EN ((unsigned long) 0x1 << 17)
++#define HM_PE_SYS_COR_ERE ((unsigned long) 0x1 << 16)
++#define HM_GLOBAL_ECC_EN ((unsigned long) 0x1 << 15)
++#define HM_IO_COH_EN ((unsigned long) 0x1 << 14)
++#define HM_INT_EN ((unsigned long) 0x1 << 13)
++#define HM_DATA_CHK_EN ((unsigned long) 0x1 << 12)
++#define HM_REF_EN ((unsigned long) 0x1 << 11)
++#define HM_BAD_SYSWR_ERE ((unsigned long) 0x1 << 10)
++#define HM_BAD_SYSRD_ERE ((unsigned long) 0x1 << 9)
++#define HM_SYSSTATE_ERE ((unsigned long) 0x1 << 8)
++#define HM_SYSCMD_ERE ((unsigned long) 0x1 << 7)
++#define HM_NCOR_SYS_ERE ((unsigned long) 0x1 << 6)
++#define HM_COR_SYS_ERE ((unsigned long) 0x1 << 5)
++#define HM_DATA_ELMNT_ERE ((unsigned long) 0x1 << 4)
++#define HM_MEM_ADDR_PROC_ERE ((unsigned long) 0x1 << 3)
++#define HM_MEM_ADDR_IO_ERE ((unsigned long) 0x1 << 2)
++#define HM_NCOR_MEM_ERE ((unsigned long) 0x1 << 1)
++#define HM_COR_MEM_ERE ((unsigned long) 0x1 << 0)
++
++/* bits in the memory refresh register */
++#define HEART_MEMREF_REFS(x) ((unsigned long) (0xf & (x)) << 16)
++#define HEART_MEMREF_PERIOD(x) ((unsigned long) (0xffff & (x)))
++#define HEART_MEMREF_REFS_VAL HEART_MEMREF_REFS(8)
++#define HEART_MEMREF_PERIOD_VAL HEART_MEMREF_PERIOD(0x4000)
++#define HEART_MEMREF_VAL (HEART_MEMREF_REFS_VAL | HEART_MEMREF_PERIOD_VAL)
++
++/* bits in the memory request arbitrarion register */
++#define HEART_MEMARB_IODIS (1<<20)
++#define HEART_MEMARB_MAXPMWRQS (15<<16)
++#define HEART_MEMARB_MAXPMRRQS (15<<12)
++#define HEART_MEMARB_MAXPMRQS (15<<8)
++#define HEART_MEMARB_MAXRRRQS (15<<4)
++#define HEART_MEMARB_MAXGBRRQS (15)
++
++/* bits in the memory configuration registers */
++#define HEART_MEMCFG_VLD 0x80000000 /* bank valid bit */
++#define HEART_MEMCFG_RAM_MSK 0x003f0000 /* RAM mask */
++#define HEART_MEMCFG_DENSITY 0x01c00000 /* RAM density */
++#define HEART_MEMCFG_RAM_SHFT 16
++#define HEART_MEMCFG_ADDR_MSK 0x000001ff /* base address mask */
++#define HEART_MEMCFG_UNIT_SHFT 25 /* 32 MB is the HEART's basic memory unit */
++
++/* bits in the status register */
++#define HEART_STAT_HSTL_SDRV ((unsigned long) 0x1 << 14)
++#define HEART_STAT_FC_CR_OUT(x) ((unsigned long) 0x1 << (x) + 12)
++#define HEART_STAT_DIR_CNNCT ((unsigned long) 0x1 << 11)
++#define HEART_STAT_TRITON ((unsigned long) 0x1 << 10)
++#define HEART_STAT_R4K ((unsigned long) 0x1 << 9)
++#define HEART_STAT_BIG_ENDIAN ((unsigned long) 0x1 << 8)
++#define HEART_STAT_PROC_ACTIVE_SHFT 4
++#define HEART_STAT_PROC_ACTIVE_MSK ((unsigned long) 0xf << HEART_STAT_PROC_ACTIVE_SHFT)
++#define HEART_STAT_PROC_ACTIVE(x) ((unsigned long) 0x1 << (x) + HEART_STAT_PROC_ACTIVE_SHFT)
++#define HEART_STAT_WIDGET_ID 0xf
++
++/* interrupt handling */
++#define HEART_VEC_TO_IBIT(vec) ((unsigned long) 1 << (vec))
++#define HEART_INT_VECTORS 64 /* how many vectors we manage */
++
++/* IP7 is the CPU count/compare, IP1 and IP0 are SW2 and SW1 */
++#define HEART_INT_LEVEL4 0xfff8000000000000 /* IP6 */
++#define HEART_INT_LEVEL3 0x0004000000000000 /* IP5 */
++#define HEART_INT_LEVEL2 0x0003ffff00000000 /* IP4 */
++#define HEART_INT_LEVEL1 0x00000000ffff0000 /* IP3 */
++#define HEART_INT_LEVEL0 0x000000000000ffff /* IP2 */
++#define HEART_INT_L4SHIFT 51
++#define HEART_INT_L4MASK 0x1fff
++#define HEART_INT_L3SHIFT 50
++#define HEART_INT_L3MASK 0x1
++#define HEART_INT_L2SHIFT 32
++#define HEART_INT_L2MASK 0x3ffff
++#define HEART_INT_L1SHIFT 16
++#define HEART_INT_L1MASK 0xffff
++#define HEART_INT_L0SHIFT 0
++#define HEART_INT_L0MASK 0xffff
++
++/* errors */
++#define IRQ_HEART_ERR 63
++#define IRQ_BUS_ERR_P(x) (59+(x))
++#define IRQ_XT_ERR(xid) (51+((xid)-1)&7)
++#define IRQ_XT_ERR_XBOW 58
++#define IRQ_XT_ERR_F 57
++#define IRQ_XT_ERR_E 56
++#define IRQ_XT_ERR_D 55
++#define IRQ_XT_ERR_C 54
++#define IRQ_XT_ERR_B 53
++#define IRQ_XT_ERR_A 52
++#define IRQ_XT_ERR_9 51
++/* count/compare timer */
++#define IRQ_HEART_CC 50
++/* level 2 interrupts */
++#define IRQ_IPI_P(x) (46+(x))
++#define IRQ_TIMER_P(x) (42+(x))
++#define IRQ_LOCAL_L2_BASE 32
++#define IRQ_LOCAL_L2_NUM 9
++/* level 1 interrupts */
++#define IRQ_LOCAL_L1_BASE 16
++#define IRQ_LOCAL_L1_NUM 16
++/* level 0 interrupts */
++#define IRQ_LOCAL_L0_BASE 3
++#define IRQ_LOCAL_L0_NUM 13
++#define IRQ_FC_HIGH 2
++#define IRQ_FC_LOW 1
++#define IRQ_GENERIC 0
++
++#define SOFT_IRQ_COUNT 51
++#define TIMER_IRQ 63
++
++/* bits in the HEART_CAUSE register */
++#define HC_PE_SYS_COR_ERR_MSK ((unsigned long) 0xf << 60)
++#define HC_PE_SYS_COR_ERR(x) ((unsigned long) 0x1 << (x) + 60)
++#define HC_PIOWDB_OFLOW ((unsigned long) 0x1 << 44)
++#define HC_PIORWRB_OFLOW ((unsigned long) 0x1 << 43)
++#define HC_PIUR_ACC_ERR ((unsigned long) 0x1 << 42)
++#define HC_BAD_SYSWR_ERR ((unsigned long) 0x1 << 41)
++#define HC_BAD_SYSRD_ERR ((unsigned long) 0x1 << 40)
++#define HC_SYSSTATE_ERR_MSK ((unsigned long) 0xf << 36)
++#define HC_SYSSTATE_ERR(x) ((unsigned long) 0x1 << (x) + 36)
++#define HC_SYSCMD_ERR_MSK ((unsigned long) 0xf << 32)
++#define HC_SYSCMD_ERR(x) ((unsigned long) 0x1 << (x) + 32)
++#define HC_NCOR_SYSAD_ERR_MSK ((unsigned long) 0xf << 28)
++#define HC_NCOR_SYSAD_ERR(x) ((unsigned long) 0x1 << (x) + 28)
++#define HC_COR_SYSAD_ERR_MSK ((unsigned long) 0xf << 24)
++#define HC_COR_SYSAD_ERR(x) ((unsigned long) 0x1 << (x) + 24)
++#define HC_DATA_ELMNT_ERR_MSK ((unsigned long) 0xf << 20)
++#define HC_DATA_ELMNT_ERR(x) ((unsigned long) 0x1 << (x) + 20)
++#define HC_WIDGET_ERR ((unsigned long) 0x1 << 16)
++#define HC_MEM_ADDR_ERR_PROC_MSK ((unsigned long) 0xf << 4)
++#define HC_MEM_ADDR_ERR_PROC(x) ((unsigned long) 0x1 << (x) + 4)
++#define HC_MEM_ADDR_ERR_IO ((unsigned long) 0x1 << 2)
++#define HC_NCOR_MEM_ERR ((unsigned long) 0x1 << 1)
++#define HC_COR_MEM_ERR ((unsigned long) 0x1 << 0)
++
++#endif /* _HEART_H */
+diff -urN linux-2.6.12-ioc3/include/asm-mips/mach-ip30/mangle-port.h linux-2.6.12-ip30/include/asm-mips/mach-ip30/mangle-port.h
+--- linux-2.6.12-ioc3/include/asm-mips/mach-ip30/mangle-port.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/asm-mips/mach-ip30/mangle-port.h 2005-07-10 22:18:15.000000000 +0200
+@@ -0,0 +1,16 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2003, 2004 Ralf Baechle
++ */
++#ifndef __ASM_MACH_IP27_MANGLE_PORT_H
++#define __ASM_MACH_IP27_MANGLE_PORT_H
++
++#define __swizzle_addr_b(port) ((port)^3)
++#define __swizzle_addr_w(port) ((port)^2)
++#define __swizzle_addr_l(port) (port)
++#define __swizzle_addr_q(port) (port)
++
++#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */
+diff -urN linux-2.6.12-ioc3/include/asm-mips/mach-ip30/pcibr.h linux-2.6.12-ip30/include/asm-mips/mach-ip30/pcibr.h
+--- linux-2.6.12-ioc3/include/asm-mips/mach-ip30/pcibr.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/asm-mips/mach-ip30/pcibr.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,24 @@
++/*
++ * Definitions for the built-in PCI bridge
++ * Copyright (C) 2004 Stanislaw Skowronek
++ */
++#ifndef _PCIBR_H
++#define _PCIBR_H
++
++#include <asm/mach-ip30/addrs.h>
++#include <asm/pci/bridge.h>
++
++/* Xtalk */
++#define PCIBR_XTALK_MFGR 0x036
++#define PCIBR_XTALK_PART 0xc002
++
++#define PCIBR_OFFSET_MEM 0x200000
++#define PCIBR_OFFSET_IO 0xa00000
++#define PCIBR_OFFSET_END 0xc00000
++
++#define PCIBR_IRQ_BASE 8
++
++extern bridge_t *ip30_irq_bridge[64];
++extern unsigned int ip30_irq_in_bridge[64];
++
++#endif
+diff -urN linux-2.6.12-ioc3/include/asm-mips/mach-ip30/racermp.h linux-2.6.12-ip30/include/asm-mips/mach-ip30/racermp.h
+--- linux-2.6.12-ioc3/include/asm-mips/mach-ip30/racermp.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/asm-mips/mach-ip30/racermp.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2005 Stanislaw Skowronek
++ */
++
++#ifndef _RACERMP_H
++#define _RACERMP_H
++
++#define MPCONF_MAGIC 0xBADDEED2
++#define MPCONF_ADDR 0xA800000000000600L
++#define MPCONF_SIZE 0x80
++#define MPCONF(x) (MPCONF_ADDR+(x)*MPCONF_SIZE)
++
++#define MP_NCPU 4
++
++#define MP_MAGIC(x) (*(volatile unsigned int *)(MPCONF(x)+0x00))
++#define MP_PRID(x) (*(volatile unsigned int *)(MPCONF(x)+0x04))
++#define MP_PHYSID(x) (*(volatile unsigned int *)(MPCONF(x)+0x08))
++#define MP_VIRTID(x) (*(volatile unsigned int *)(MPCONF(x)+0x0c))
++#define MP_SCACHESZ(x) (*(volatile unsigned int *)(MPCONF(x)+0x10))
++#define MP_FANLOADS(x) (*(volatile unsigned short *)(MPCONF(x)+0x14))
++#define MP_LAUNCH(x) (*(volatile void **)(MPCONF(x)+0x18))
++#define MP_RNDVZ(x) (*(volatile void **)(MPCONF(x)+0x20))
++#define MP_STACKADDR(x) (*(volatile unsigned long *)(MPCONF(x)+0x40))
++#define MP_LPARM(x) (*(volatile unsigned long *)(MPCONF(x)+0x48))
++#define MP_RPARM(x) (*(volatile unsigned long *)(MPCONF(x)+0x50))
++#define MP_IDLEFLAG(x) (*(volatile unsigned int *)(MPCONF(x)+0x58))
++
++#endif
+diff -urN linux-2.6.12-ioc3/include/asm-mips/mach-ip30/xtalk.h linux-2.6.12-ip30/include/asm-mips/mach-ip30/xtalk.h
+--- linux-2.6.12-ioc3/include/asm-mips/mach-ip30/xtalk.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/asm-mips/mach-ip30/xtalk.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,13 @@
++/*
++ * Copyright (C) 2004,5 Stanislaw Skowronek
++ */
++
++#ifndef _XTALK_H
++#define _XTALK_H
++
++#define IP30_XTALK_NUM_WID 16
++unsigned ip30_xtalk_get_id(int wid);
++unsigned long ip30_xtalk_swin(int wid);
++int ip30_xtalk_find(unsigned mfgr, unsigned part, int last);
++
++#endif /* _XTALK_H */
+diff -urN linux-2.6.12-ioc3/include/asm-mips/pci/bridge.h linux-2.6.12-ip30/include/asm-mips/pci/bridge.h
+--- linux-2.6.12-ioc3/include/asm-mips/pci/bridge.h 2004-08-30 00:34:25.000000000 +0200
++++ linux-2.6.12-ip30/include/asm-mips/pci/bridge.h 2005-07-10 15:33:12.000000000 +0200
+@@ -840,6 +840,17 @@
+ unsigned int irq_cpu;
+ dma64_addr_t baddr;
+ unsigned int pci_int[8];
++#ifdef CONFIG_SGI_IP30
++ int bridge_rev;
++ unsigned int irq_base;
++ int slot_be[8];
++ int slot_bs[8];
++ unsigned int win_p[8];
++ int win_io[8];
++ int win_be[8];
++ unsigned int dio_p;
++ unsigned int d32_p;
++#endif
+ };
+
+ #define BRIDGE_CONTROLLER(bus) \
+diff -urN linux-2.6.12-ioc3/include/asm-mips/pci.h linux-2.6.12-ip30/include/asm-mips/pci.h
+--- linux-2.6.12-ioc3/include/asm-mips/pci.h 2005-03-18 21:40:41.000000000 +0100
++++ linux-2.6.12-ip30/include/asm-mips/pci.h 2005-07-10 13:00:19.000000000 +0200
+@@ -39,6 +39,13 @@
+ and XFree86. Eventually will be removed. */
+ unsigned int need_domain_info;
+
++ /* called just before pci_scan_bus is executed */
++ int (*pre_scan)(struct pci_controller *);
++ /* called after pci_scan_bus is executed */
++ int (*post_scan)(struct pci_controller *, struct pci_bus *);
++ /* called in pcibios_enable_resources */
++ int (*pre_enable)(struct pci_controller *, struct pci_dev *, int);
++
+ int iommu;
+ };
+
+diff -urN linux-2.6.12-ioc3/include/linux/fb.h linux-2.6.12-ip30/include/linux/fb.h
+--- linux-2.6.12-ioc3/include/linux/fb.h 2005-07-08 13:16:56.000000000 +0200
++++ linux-2.6.12-ip30/include/linux/fb.h 2005-07-09 13:36:14.000000000 +0200
+@@ -116,6 +116,8 @@
+ #define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */
+ #define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */
+ #define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */
++#define FB_ACCEL_SGI_IMPACTSR 666 /* SGI Octane I/E (IMPACTSR) */
++#define FB_ACCEL_SGI_ODYSSEY 668 /* SGI Octane Vx (ODYSSEY) */
+
+ #define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */
+ #define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */
+diff -urN linux-2.6.12-ioc3/include/linux/leds.h linux-2.6.12-ip30/include/linux/leds.h
+--- linux-2.6.12-ioc3/include/linux/leds.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/linux/leds.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,29 @@
++#ifndef LEDS_H
++#define LEDS_H
++
++/*
++ * The LEDs driver reads in a stream of opcodes, two bytes each. The highest
++ * two bits of first byte define the opcode type. Next six bits are parameter
++ * one, and the last eight bits are parameter two.
++ * If a LEDS_LOOP(0) opcode is encountered, the stream is terminated on this
++ * opcode and no operations are performed until a new stream is loaded.
++ * If a LEDS_LOOP(n>0) opcode is encountered, the whole stream is looped.
++ * If neither of these opcodes appears until the end of the stream, the behavior
++ * is the same as at LEDS_LOOP(0), however a warning will be printed.
++ */
++
++#define LEDS_OP_SET 0
++ /* set LED brightness; low bits select LED, next byte sets brightness */
++#define LEDS_OP_WAIT 1
++ /* wait for n ms, where n=param2 * (1 << param1); if n = 0 then stop */
++#define LEDS_OP_LOOP 2
++ /* restart the LEDs, waiting for n ms; if n = 0 then stop */
++#define LEDS_OP_RSVD 3
++ /* reserved opcode */
++
++/*
++ * Anyone who wonders why you can't loop without a delay should consider the
++ * fact that we are processing this opcode inside the kernel.
++ */
++
++#endif
+diff -urN linux-2.6.12-ioc3/include/linux/miscdevice.h linux-2.6.12-ip30/include/linux/miscdevice.h
+--- linux-2.6.12-ioc3/include/linux/miscdevice.h 2005-01-13 15:06:53.000000000 +0100
++++ linux-2.6.12-ip30/include/linux/miscdevice.h 2005-07-09 13:36:14.000000000 +0200
+@@ -12,6 +12,7 @@
+ #define APOLLO_MOUSE_MINOR 7
+ #define PC110PAD_MINOR 9
+ /*#define ADB_MOUSE_MINOR 10 FIXME OBSOLETE */
++#define LEDS_MINOR 42
+ #define WATCHDOG_MINOR 130 /* Watchdog timer */
+ #define TEMP_MINOR 131 /* Temperature Sensor */
+ #define RTC_MINOR 135
+diff -urN linux-2.6.12-ioc3/include/linux/pci_ids.h linux-2.6.12-ip30/include/linux/pci_ids.h
+--- linux-2.6.12-ioc3/include/linux/pci_ids.h 2005-07-08 13:16:58.000000000 +0200
++++ linux-2.6.12-ip30/include/linux/pci_ids.h 2005-07-09 13:36:14.000000000 +0200
+@@ -985,6 +985,7 @@
+
+ #define PCI_VENDOR_ID_SGI 0x10a9
+ #define PCI_DEVICE_ID_SGI_IOC3 0x0003
++#define PCI_DEVICE_ID_SGI_RAD1 0x0005
+ #define PCI_DEVICE_ID_SGI_IOC4 0x100a
+ #define PCI_VENDOR_ID_SGI_LITHIUM 0x1002
+
+diff -urN linux-2.6.12-ioc3/include/sound/rad1.h linux-2.6.12-ip30/include/sound/rad1.h
+--- linux-2.6.12-ioc3/include/sound/rad1.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/sound/rad1.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,231 @@
++#ifndef _RAD1_H
++#define _RAD1_H
++
++#include <linux/types.h>
++
++struct rad1regs {
++ u32 pci_status; /* 0x00000000 */
++ u32 adat_rx_msc_ust; /* 0x00000004 */
++ u32 adat_rx_msc0_submsc; /* 0x00000008 */
++ u32 aes_rx_msc_ust; /* 0x0000000c */
++ u32 aes_rx_msc0_submsc; /* 0x00000010 */
++ u32 atod_msc_ust; /* 0x00000014 */
++ u32 atod_msc0_submsc; /* 0x00000018 */
++ u32 adat_tx_msc_ust; /* 0x0000001c */
++ u32 adat_tx_msc0_submsc; /* 0x00000020 */
++ u32 aes_tx_msc_ust; /* 0x00000024 */
++ u32 aes_tx_msc0_submsc; /* 0x00000028 */
++ u32 dtoa_msc_ust; /* 0x0000002c */
++ u32 ust_register; /* 0x00000030 */
++ u32 gpio_status; /* 0x00000034 */
++ u32 chip_status1; /* 0x00000038 */
++ u32 chip_status0; /* 0x0000003c */
++
++ u32 ust_clock_control; /* 0x00000040 */
++ u32 adat_rx_control; /* 0x00000044 */
++ u32 aes_rx_control; /* 0x00000048 */
++ u32 atod_control; /* 0x0000004c */
++ u32 adat_tx_control; /* 0x00000050 */
++ u32 aes_tx_control; /* 0x00000054 */
++ u32 dtoa_control; /* 0x00000058 */
++ u32 status_timer; /* 0x0000005c */
++
++ u32 _pad70[4];
++
++ u32 misc_control; /* 0x00000070 */
++ u32 pci_holdoff; /* 0x00000074 */
++ u32 pci_arb_control; /* 0x00000078 */
++
++ u32 volume_control; /* 0x0000007c */
++
++ u32 reset; /* 0x00000080 */
++
++ u32 gpio0; /* 0x00000084 */
++ u32 gpio1; /* 0x00000088 */
++ u32 gpio2; /* 0x0000008c */
++ u32 gpio3; /* 0x00000090 */
++
++ u32 _pada0[3];
++
++ u32 clockgen_ictl; /* 0x000000a0 */
++ u32 clockgen_rem; /* 0x000000a4 */
++ u32 freq_synth3_mux_sel; /* 0x000000a8 */
++ u32 freq_synth2_mux_sel; /* 0x000000ac */
++ u32 freq_synth1_mux_sel; /* 0x000000b0 */
++ u32 freq_synth0_mux_sel; /* 0x000000b4 */
++ u32 mpll0_lock_control; /* 0x000000b8 */
++ u32 mpll1_lock_control; /* 0x000000bc */
++
++ u32 _pad400[208];
++
++ struct {
++ u32 loadr; /* 0x00000400 + 12*idx */
++ u32 hiadr; /* 0x00000404 + 12*idx */
++ u32 control; /* 0x00000408 + 12*idx */
++ } pci_descr[16];
++
++ u32 pci_loadr_adat_rx; /* 0x000004c0 */
++ u32 pci_control_adat_rx; /* 0x000004c4 */
++ u32 pci_loadr_aes_rx; /* 0x000004c8 */
++ u32 pci_control_aes_rx; /* 0x000004cc */
++ u32 pci_loadr_atod; /* 0x000004d0 */
++ u32 pci_control_atod; /* 0x000004d4 */
++ u32 pci_loadr_adatsub_rx; /* 0x000004d8 */
++ u32 pci_control_adatsub_rx; /* 0x000004dc */
++ u32 pci_loadr_aessub_rx; /* 0x000004e0 */
++ u32 pci_control_aessub_rx; /* 0x000004e4 */
++ u32 pci_loadr_adat_tx; /* 0x000004e8 */
++ u32 pci_control_adat_tx; /* 0x000004ec */
++ u32 pci_loadr_aes_tx; /* 0x000004f0 */
++ u32 pci_control_aes_tx; /* 0x000004f4 */
++ u32 pci_loadr_dtoa; /* 0x000004f8 */
++ u32 pci_control_dtoa; /* 0x000004fc */
++ u32 pci_loadr_status; /* 0x00000500 */
++ u32 pci_control_status; /* 0x00000504 */
++ u32 pci_hiadr_adat_rx; /* 0x00000508 */
++ u32 pci_hiadr_aes_rx; /* 0x0000050c */
++ u32 pci_hiadr_atod; /* 0x00000510 */
++ u32 pci_hiadr_adatsub_rx; /* 0x00000514 */
++ u32 pci_hiadr_aessub_rx; /* 0x00000518 */
++ u32 pci_hiadr_adat_tx; /* 0x0000051c */
++ u32 pci_hiadr_aes_tx; /* 0x00000520 */
++ u32 pci_hiadr_dtoa; /* 0x00000524 */
++ u32 pci_hiadr_status; /* 0x00000528 */
++
++ u32 _pad1000[693];
++
++ u32 adat_subcode_txa_u0_0; /* 0x00001000 */
++ u32 adat_subcode_txa_u0_1; /* 0x00001004 */
++ u32 adat_subcode_txa_u0_2; /* 0x00001008 */
++ u32 adat_subcode_txa_u0_3; /* 0x0000100c */
++ u32 adat_subcode_txa_u0_4; /* 0x00001010 */
++ u32 adat_subcode_txa_u0_5; /* 0x00001014 */
++ u32 adat_subcode_txa_u1_0; /* 0x00001018 */
++ u32 adat_subcode_txa_u1_1; /* 0x0000101c */
++ u32 adat_subcode_txa_u1_2; /* 0x00001020 */
++ u32 adat_subcode_txa_u1_3; /* 0x00001024 */
++ u32 adat_subcode_txa_u1_4; /* 0x00001028 */
++ u32 adat_subcode_txa_u1_5; /* 0x0000102c */
++ u32 adat_subcode_txa_u2_0; /* 0x00001030 */
++ u32 adat_subcode_txa_u2_1; /* 0x00001034 */
++ u32 adat_subcode_txa_u2_2; /* 0x00001038 */
++ u32 adat_subcode_txa_u2_3; /* 0x0000103c */
++ u32 adat_subcode_txa_u2_4; /* 0x00001040 */
++ u32 adat_subcode_txa_u2_5; /* 0x00001044 */
++ u32 adat_subcode_txa_u3_0; /* 0x00001048 */
++ u32 adat_subcode_txa_u3_1; /* 0x0000104c */
++ u32 adat_subcode_txa_u3_2; /* 0x00001050 */
++ u32 adat_subcode_txa_u3_3; /* 0x00001054 */
++ u32 adat_subcode_txa_u3_4; /* 0x00001058 */
++ u32 adat_subcode_txa_u3_5; /* 0x0000105c */
++ u32 adat_subcode_txa_unused; /* 0x00001060 */
++
++ u32 _pad1080[7];
++
++ u32 adat_subcode_txb_u0_0; /* 0x00001080 */
++ u32 adat_subcode_txb_u0_1; /* 0x00001084 */
++ u32 adat_subcode_txb_u0_2; /* 0x00001088 */
++ u32 adat_subcode_txb_u0_3; /* 0x0000108c */
++ u32 adat_subcode_txb_u0_4; /* 0x00001090 */
++ u32 adat_subcode_txb_u0_5; /* 0x00001094 */
++ u32 adat_subcode_txb_u1_0; /* 0x00001098 */
++ u32 adat_subcode_txb_u1_1; /* 0x0000109c */
++ u32 adat_subcode_txb_u1_2; /* 0x000010a0 */
++ u32 adat_subcode_txb_u1_3; /* 0x000010a4 */
++ u32 adat_subcode_txb_u1_4; /* 0x000010a8 */
++ u32 adat_subcode_txb_u1_5; /* 0x000010ac */
++ u32 adat_subcode_txb_u2_0; /* 0x000010b0 */
++ u32 adat_subcode_txb_u2_1; /* 0x000010b4 */
++ u32 adat_subcode_txb_u2_2; /* 0x000010b8 */
++ u32 adat_subcode_txb_u2_3; /* 0x000010bc */
++ u32 adat_subcode_txb_u2_4; /* 0x000010c0 */
++ u32 adat_subcode_txb_u2_5; /* 0x000010c4 */
++ u32 adat_subcode_txb_u3_0; /* 0x000010c8 */
++ u32 adat_subcode_txb_u3_1; /* 0x000010cc */
++ u32 adat_subcode_txb_u3_2; /* 0x000010d0 */
++ u32 adat_subcode_txb_u3_3; /* 0x000010d4 */
++ u32 adat_subcode_txb_u3_4; /* 0x000010d8 */
++ u32 adat_subcode_txb_u3_5; /* 0x000010dc */
++ u32 adat_subcode_txb_unused; /* 0x000010e0 */
++
++ u32 _pad1100[7];
++
++ u32 aes_subcode_txa_lu0; /* 0x00001100 */
++ u32 aes_subcode_txa_lu1; /* 0x00001104 */
++ u32 aes_subcode_txa_lu2; /* 0x00001108 */
++ u32 aes_subcode_txa_lu3; /* 0x0000110c */
++ u32 aes_subcode_txa_lu4; /* 0x00001110 */
++ u32 aes_subcode_txa_lu5; /* 0x00001114 */
++ u32 aes_subcode_txa_lc0; /* 0x00001118 */
++ u32 aes_subcode_txa_lc1; /* 0x0000111c */
++ u32 aes_subcode_txa_lc2; /* 0x00001120 */
++ u32 aes_subcode_txa_lc3; /* 0x00001124 */
++ u32 aes_subcode_txa_lc4; /* 0x00001128 */
++ u32 aes_subcode_txa_lc5; /* 0x0000112c */
++ u32 aes_subcode_txa_lv0; /* 0x00001130 */
++ u32 aes_subcode_txa_lv1; /* 0x00001134 */
++ u32 aes_subcode_txa_lv2; /* 0x00001138 */
++ u32 aes_subcode_txa_lv3; /* 0x0000113c */
++ u32 aes_subcode_txa_lv4; /* 0x00001140 */
++ u32 aes_subcode_txa_lv5; /* 0x00001144 */
++ u32 aes_subcode_txa_ru0; /* 0x00001148 */
++ u32 aes_subcode_txa_ru1; /* 0x0000114c */
++ u32 aes_subcode_txa_ru2; /* 0x00001150 */
++ u32 aes_subcode_txa_ru3; /* 0x00001154 */
++ u32 aes_subcode_txa_ru4; /* 0x00001158 */
++ u32 aes_subcode_txa_ru5; /* 0x0000115c */
++ u32 aes_subcode_txa_rc0; /* 0x00001160 */
++ u32 aes_subcode_txa_rc1; /* 0x00001164 */
++ u32 aes_subcode_txa_rc2; /* 0x00001168 */
++ u32 aes_subcode_txa_rc3; /* 0x0000116c */
++ u32 aes_subcode_txa_rc4; /* 0x00001170 */
++ u32 aes_subcode_txa_rc5; /* 0x00001174 */
++ u32 aes_subcode_txa_rv0; /* 0x00001178 */
++ u32 aes_subcode_txa_rv1; /* 0x0000117c */
++
++ u32 aes_subcode_txb_lu0; /* 0x00001180 */
++ u32 aes_subcode_txb_lu1; /* 0x00001184 */
++ u32 aes_subcode_txb_lu2; /* 0x00001188 */
++ u32 aes_subcode_txb_lu3; /* 0x0000118c */
++ u32 aes_subcode_txb_lu4; /* 0x00001190 */
++ u32 aes_subcode_txb_lu5; /* 0x00001194 */
++ u32 aes_subcode_txb_lc0; /* 0x00001198 */
++ u32 aes_subcode_txb_lc1; /* 0x0000119c */
++ u32 aes_subcode_txb_lc2; /* 0x000011a0 */
++ u32 aes_subcode_txb_lc3; /* 0x000011a4 */
++ u32 aes_subcode_txb_lc4; /* 0x000011a8 */
++ u32 aes_subcode_txb_lc5; /* 0x000011ac */
++ u32 aes_subcode_txb_lv0; /* 0x000011b0 */
++ u32 aes_subcode_txb_lv1; /* 0x000011b4 */
++ u32 aes_subcode_txb_lv2; /* 0x000011b8 */
++ u32 aes_subcode_txb_lv3; /* 0x000011bc */
++ u32 aes_subcode_txb_lv4; /* 0x000011c0 */
++ u32 aes_subcode_txb_lv5; /* 0x000011c4 */
++ u32 aes_subcode_txb_ru0; /* 0x000011c8 */
++ u32 aes_subcode_txb_ru1; /* 0x000011cc */
++ u32 aes_subcode_txb_ru2; /* 0x000011d0 */
++ u32 aes_subcode_txb_ru3; /* 0x000011d4 */
++ u32 aes_subcode_txb_ru4; /* 0x000011d8 */
++ u32 aes_subcode_txb_ru5; /* 0x000011dc */
++ u32 aes_subcode_txb_rc0; /* 0x000011e0 */
++ u32 aes_subcode_txb_rc1; /* 0x000011e4 */
++ u32 aes_subcode_txb_rc2; /* 0x000011e8 */
++ u32 aes_subcode_txb_rc3; /* 0x000011ec */
++ u32 aes_subcode_txb_rc4; /* 0x000011f0 */
++ u32 aes_subcode_txb_rc5; /* 0x000011f4 */
++ u32 aes_subcode_txb_rv0; /* 0x000011f8 */
++ u32 aes_subcode_txb_rv1; /* 0x000011fc */
++
++ u32 aes_subcode_txa_rv2; /* 0x00001200 */
++ u32 aes_subcode_txa_rv3; /* 0x00001204 */
++ u32 aes_subcode_txa_rv4; /* 0x00001208 */
++ u32 aes_subcode_txa_rv5; /* 0x0000120c */
++
++ u32 aes_subcode_txb_rv2; /* 0x00001210 */
++ u32 aes_subcode_txb_rv3; /* 0x00001214 */
++ u32 aes_subcode_txb_rv4; /* 0x00001218 */
++ u32 aes_subcode_txb_rv5; /* 0x0000121c */
++ u32 aes_subcode_tx_unused; /* 0x00001220 */
++};
++
++#endif
+diff -urN linux-2.6.12-ioc3/include/video/impactsr.h linux-2.6.12-ip30/include/video/impactsr.h
+--- linux-2.6.12-ioc3/include/video/impactsr.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/video/impactsr.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,138 @@
++/*
++ * linux/drivers/video/impactsr.h -- SGI Octane MardiGras (IMPACTSR) graphics
++ *
++ * Copyright (c) 2004 by Stanislaw Skowronek
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#ifndef IMPACTSR_H
++#define IMPACTSR_H
++
++/* Xtalk */
++#define IMPACTSR_XTALK_MFGR 0x2aa
++#define IMPACTSR_XTALK_PART 0xc003
++
++/* Convenient access macros */
++#define IMPACTSR_REG64(vma,off) (*(volatile unsigned long *)((vma)+(off)))
++#define IMPACTSR_REG32(vma,off) (*(volatile unsigned int *)((vma)+(off)))
++#define IMPACTSR_REG16(vma,off) (*(volatile unsigned short *)((vma)+(off)))
++#define IMPACTSR_REG8(vma,off) (*(volatile unsigned char *)((vma)+(off)))
++
++/* ImpactSR (HQ4) register offsets */
++#define IMPACTSR_CFIFO(vma) IMPACTSR_REG64(vma,0x20400)
++#define IMPACTSR_CFIFOW(vma) IMPACTSR_REG32(vma,0x20400)
++#define IMPACTSR_CFIFOP(vma) IMPACTSR_REG64(vma,0x130400)
++#define IMPACTSR_CFIFOPW(vma) IMPACTSR_REG32(vma,0x130400)
++
++#define IMPACTSR_STATUS(vma) IMPACTSR_REG32(vma,0x20000)
++#define IMPACTSR_FIFOSTATUS(vma) IMPACTSR_REG32(vma,0x20008)
++#define IMPACTSR_GIOSTATUS(vma) IMPACTSR_REG32(vma,0x20100)
++#define IMPACTSR_DMABUSY(vma) IMPACTSR_REG32(vma,0x20200)
++
++#define IMPACTSR_RESTATUS(vma) IMPACTSR_REG32(vma,0x2c578)
++
++#define IMPACTSR_CFIFO_HW(vma) IMPACTSR_REG32(vma,0x40000)
++#define IMPACTSR_CFIFO_LW(vma) IMPACTSR_REG32(vma,0x40008)
++#define IMPACTSR_CFIFO_DELAY(vma) IMPACTSR_REG32(vma,0x40010)
++#define IMPACTSR_DFIFO_HW(vma) IMPACTSR_REG32(vma,0x40020)
++#define IMPACTSR_DFIFO_LW(vma) IMPACTSR_REG32(vma,0x40028)
++#define IMPACTSR_DFIFO_DELAY(vma) IMPACTSR_REG32(vma,0x40030)
++
++#define IMPACTSR_XMAP_PP1SELECT(vma) IMPACTSR_REG8(vma,0x71c08)
++#define IMPACTSR_XMAP_INDEX(vma) IMPACTSR_REG8(vma,0x71c88)
++#define IMPACTSR_XMAP_CONFIG(vma) IMPACTSR_REG32(vma,0x71d00)
++#define IMPACTSR_XMAP_CONFIGB(vma) IMPACTSR_REG8(vma,0x71d08)
++#define IMPACTSR_XMAP_BUF_SELECT(vma) IMPACTSR_REG32(vma,0x71d80)
++#define IMPACTSR_XMAP_MAIN_MODE(vma) IMPACTSR_REG32(vma,0x71e00)
++#define IMPACTSR_XMAP_OVERLAY_MODE(vma) IMPACTSR_REG32(vma,0x71e80)
++#define IMPACTSR_XMAP_DIB(vma) IMPACTSR_REG32(vma,0x71f00)
++#define IMPACTSR_XMAP_DIB_DW(vma) IMPACTSR_REG32(vma,0x71f40)
++#define IMPACTSR_XMAP_RE_RAC(vma) IMPACTSR_REG32(vma,0x71f80)
++
++#define IMPACTSR_VC3_INDEX(vma) IMPACTSR_REG8(vma,0x72008)
++#define IMPACTSR_VC3_INDEXDATA(vma) IMPACTSR_REG32(vma,0x72038)
++#define IMPACTSR_VC3_DATA(vma) IMPACTSR_REG16(vma,0x720b0)
++#define IMPACTSR_VC3_RAM(vma) IMPACTSR_REG16(vma,0x72190)
++
++#define IMPACTSR_BDVERS0(vma) IMPACTSR_REG8(vma,0x72408)
++#define IMPACTSR_BDVERS1(vma) IMPACTSR_REG8(vma,0x72488)
++
++/* FIFO status */
++#define IMPACTSR_CFIFO_MAX 128
++#define IMPACTSR_BFIFO_MAX 16
++
++/* Commands for CFIFO */
++#define IMPACTSR_CMD_WRITERSS(reg,val) (((0x00180004L|((reg)<<8))<<32)|((unsigned)(val)&0xffffffff))
++#define IMPACTSR_CMD_EXECRSS(reg,val) (((0x001c0004L|((reg)<<8))<<32)|((unsigned)(val)&0xffffffff))
++
++#define IMPACTSR_CMD_GLINE_XSTARTF(v) IMPACTSR_CMD_WRITERSS(0x00c,v)
++#define IMPACTSR_CMD_IR_ALIAS(v) IMPACTSR_CMD_EXECRSS(0x045,v)
++#define IMPACTSR_CMD_BLOCKXYSTARTI(x,y) IMPACTSR_CMD_WRITERSS(0x046,((x)<<16)|(y))
++#define IMPACTSR_CMD_BLOCKXYENDI(x,y) IMPACTSR_CMD_WRITERSS(0x047,((x)<<16)|(y))
++#define IMPACTSR_CMD_PACKEDCOLOR(v) IMPACTSR_CMD_WRITERSS(0x05b,v)
++#define IMPACTSR_CMD_RED(v) IMPACTSR_CMD_WRITERSS(0x05c,v)
++#define IMPACTSR_CMD_ALPHA(v) IMPACTSR_CMD_WRITERSS(0x05f,v)
++#define IMPACTSR_CMD_CHAR(v) IMPACTSR_CMD_EXECRSS(0x070,v)
++#define IMPACTSR_CMD_CHAR_H(v) IMPACTSR_CMD_WRITERSS(0x070,v)
++#define IMPACTSR_CMD_CHAR_L(v) IMPACTSR_CMD_EXECRSS(0x071,v)
++#define IMPACTSR_CMD_XFRCONTROL(v) IMPACTSR_CMD_WRITERSS(0x102,v)
++#define IMPACTSR_CMD_FILLMODE(v) IMPACTSR_CMD_WRITERSS(0x110,v)
++#define IMPACTSR_CMD_CONFIG(v) IMPACTSR_CMD_WRITERSS(0x112,v)
++#define IMPACTSR_CMD_XYWIN(x,y) IMPACTSR_CMD_WRITERSS(0x115,((y)<<16)|(x))
++#define IMPACTSR_CMD_BKGRD_RG(v) IMPACTSR_CMD_WRITERSS(0x140,((v)<<8))
++#define IMPACTSR_CMD_BKGRD_BA(v) IMPACTSR_CMD_WRITERSS(0x141,((v)<<8))
++#define IMPACTSR_CMD_WINMODE(v) IMPACTSR_CMD_WRITERSS(0x14f,v)
++#define IMPACTSR_CMD_XFRSIZE(x,y) IMPACTSR_CMD_WRITERSS(0x153,((y)<<16)|(x))
++#define IMPACTSR_CMD_XFRMASKLO(v) IMPACTSR_CMD_WRITERSS(0x156,v)
++#define IMPACTSR_CMD_XFRMASKHI(v) IMPACTSR_CMD_WRITERSS(0x157,v)
++#define IMPACTSR_CMD_XFRCOUNTERS(x,y) IMPACTSR_CMD_WRITERSS(0x158,((y)<<16)|(x))
++#define IMPACTSR_CMD_XFRMODE(v) IMPACTSR_CMD_WRITERSS(0x159,v)
++#define IMPACTSR_CMD_RE_TOGGLECNTX(v) IMPACTSR_CMD_WRITERSS(0x15f,v)
++#define IMPACTSR_CMD_PIXCMD(v) IMPACTSR_CMD_WRITERSS(0x160,v)
++#define IMPACTSR_CMD_PP1FILLMODE(m,o) IMPACTSR_CMD_WRITERSS(0x161,(m)|(o<<26))
++#define IMPACTSR_CMD_COLORMASKMSBS(v) IMPACTSR_CMD_WRITERSS(0x162,v)
++#define IMPACTSR_CMD_COLORMASKLSBSA(v) IMPACTSR_CMD_WRITERSS(0x163,v)
++#define IMPACTSR_CMD_COLORMASKLSBSB(v) IMPACTSR_CMD_WRITERSS(0x164,v)
++#define IMPACTSR_CMD_BLENDFACTOR(v) IMPACTSR_CMD_WRITERSS(0x165,v)
++#define IMPACTSR_CMD_DRBPOINTERS(v) IMPACTSR_CMD_WRITERSS(0x16d,v)
++
++#define IMPACTSR_CMD_HQ_PIXELFORMAT(v) (0x000c000400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_SCANWIDTH(v) (0x000a020400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_DMATYPE(v) (0x000a060400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_PG_LIST_0(v) (0x0008000400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_PG_WIDTH(v) (0x0008040400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_PG_OFFSET(v) (0x0008050400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_PG_STARTADDR(v) (0x0008060400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_PG_LINECNT(v) (0x0008070400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_PG_WIDTHA(v) (0x0008080400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_TXBASE(p) (0x00482008|((p)<<9))
++#define IMPACTSR_CMD_HQ_TXMAX(p,v) (0x0048300400000000L|((unsigned)(v)&0xffffffff)|((unsigned long)(p)<<40))
++#define IMPACTSR_CMD_HQ_PGBITS(p,v) (0x00482b0400000000L|((unsigned)(v)&0xffffffff)|((unsigned long)(p)<<40))
++#define IMPACTSR_CMD_HQ_PGSIZE(v) (0x00482a0400000000L|((unsigned)(v)&0xffffffff))
++#define IMPACTSR_CMD_HQ_STACKPTR(v) (0x00483a0400000000L|((unsigned)(v)&0xffffffff))
++
++/* Logic operations for the PP1 (SI=source invert, DI=dest invert, RI=result invert) */
++#define IMPACTSR_LO_CLEAR 0
++#define IMPACTSR_LO_AND 1
++#define IMPACTSR_LO_DIAND 2
++#define IMPACTSR_LO_COPY 3
++#define IMPACTSR_LO_SIAND 4
++#define IMPACTSR_LO_NOP 5
++#define IMPACTSR_LO_XOR 6
++#define IMPACTSR_LO_OR 7
++#define IMPACTSR_LO_RIOR 8
++#define IMPACTSR_LO_RIXOR 9
++#define IMPACTSR_LO_RINOP 10
++#define IMPACTSR_LO_DIOR 11
++#define IMPACTSR_LO_RICOPY 12
++#define IMPACTSR_LO_SIOR 13
++#define IMPACTSR_LO_RIAND 14
++#define IMPACTSR_LO_SET 15
++
++/* Blending factors */
++#define IMPACTSR_BLEND_ALPHA 0x0704c900
++
++#endif /* IMPACTSR_H */
+diff -urN linux-2.6.12-ioc3/include/video/odyssey.h linux-2.6.12-ip30/include/video/odyssey.h
+--- linux-2.6.12-ioc3/include/video/odyssey.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/include/video/odyssey.h 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,52 @@
++/*
++ * linux/drivers/video/odyssey.h -- SGI Octane Odyssey graphics
++ *
++ * Copyright (c) 2005 by Stanislaw Skowronek
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#ifndef ODYSSEY_H
++#define ODYSSEY_H
++
++/* Xtalk */
++#define ODY_XTALK_MFGR 0x023
++#define ODY_XTALK_PART 0xc013
++
++/* Convenient access macros */
++#define ODY_REG64(vma,off) (*(volatile unsigned long *)((vma)+(off)))
++#define ODY_REG32(vma,off) (*(volatile unsigned int *)((vma)+(off)))
++
++/* ImpactSR registers */
++#define ODY_CFIFO_D(vma) ODY_REG64(vma,0x110000)
++#define ODY_CFIFO_W(vma) ODY_REG32(vma,0x110000)
++
++#define ODY_DFIFO_D(vma) ODY_REG64(vma,0x400000)
++#define ODY_DFIFO_W(vma) ODY_REG32(vma,0x400000)
++
++#define ODY_STATUS0(vma) ODY_REG32(vma,0x001064)
++#define ODY_STATUS0_CFIFO_HW 0x00008000
++#define ODY_STATUS0_CFIFO_LW 0x00020000
++#define ODY_DBESTAT(vma) ODY_REG32(vma,0x00106c)
++
++/* Logic operations (SI=source invert, DI=dest invert, RI=result invert) */
++#define ODY_LO_CLEAR 0
++#define ODY_LO_AND 1
++#define ODY_LO_DIAND 2
++#define ODY_LO_COPY 3
++#define ODY_LO_SIAND 4
++#define ODY_LO_NOP 5
++#define ODY_LO_XOR 6
++#define ODY_LO_OR 7
++#define ODY_LO_RIOR 8
++#define ODY_LO_RIXOR 9
++#define ODY_LO_RINOP 10
++#define ODY_LO_DIOR 11
++#define ODY_LO_RICOPY 12
++#define ODY_LO_SIOR 13
++#define ODY_LO_RIAND 14
++#define ODY_LO_SET 15
++
++#endif /* ODYSSEY_H */
+diff -urN linux-2.6.12-ioc3/sound/pci/Kconfig linux-2.6.12-ip30/sound/pci/Kconfig
+--- linux-2.6.12-ioc3/sound/pci/Kconfig 2005-03-18 21:40:42.000000000 +0100
++++ linux-2.6.12-ip30/sound/pci/Kconfig 2005-07-09 13:36:14.000000000 +0200
+@@ -525,4 +525,10 @@
+ To compile this driver as a module, choose M here: the module
+ will be called snd-hda-intel.
+
++config SND_RAD1
++ tristate "SGI RAD1"
++ depends on SND && SGI_IP30
++ help
++ Say 'Y' or 'M' to include support for SGI RAD1 Pro Audio in Octane.
++
+ endmenu
+diff -urN linux-2.6.12-ioc3/sound/pci/Makefile linux-2.6.12-ip30/sound/pci/Makefile
+--- linux-2.6.12-ioc3/sound/pci/Makefile 2005-03-18 21:40:42.000000000 +0100
++++ linux-2.6.12-ip30/sound/pci/Makefile 2005-07-09 13:36:14.000000000 +0200
+@@ -18,6 +18,7 @@
+ snd-intel8x0-objs := intel8x0.o
+ snd-intel8x0m-objs := intel8x0m.o
+ snd-maestro3-objs := maestro3.o
++snd-rad1-objs := rad1.o
+ snd-rme32-objs := rme32.o
+ snd-rme96-objs := rme96.o
+ snd-sonicvibes-objs := sonicvibes.o
+@@ -40,6 +41,7 @@
+ obj-$(CONFIG_SND_INTEL8X0) += snd-intel8x0.o
+ obj-$(CONFIG_SND_INTEL8X0M) += snd-intel8x0m.o
+ obj-$(CONFIG_SND_MAESTRO3) += snd-maestro3.o
++obj-$(CONFIG_SND_RAD1) += snd-rad1.o
+ obj-$(CONFIG_SND_RME32) += snd-rme32.o
+ obj-$(CONFIG_SND_RME96) += snd-rme96.o
+ obj-$(CONFIG_SND_SONICVIBES) += snd-sonicvibes.o
+diff -urN linux-2.6.12-ioc3/sound/pci/rad1.c linux-2.6.12-ip30/sound/pci/rad1.c
+--- linux-2.6.12-ioc3/sound/pci/rad1.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.12-ip30/sound/pci/rad1.c 2005-07-09 13:36:14.000000000 +0200
+@@ -0,0 +1,478 @@
++/*
++ * rad1.c - ALSA driver for SGI RAD1 (as found in Octane and Octane2)
++ * Copyright (C) 2004 by Stanislaw Skowronek <skylark at linux-mips.org>
++ *
++ * The RAD1 chip can be construed as the ultimate evil. It sends no
++ * interrupts on buffer completion, or even depending on the sample
++ * rate. So we have to hook into the system timer and hope for the best.
++ *
++ * This driver allocates DMA descriptors 0 and 1 for analog output (DTOA).
++ * The descriptors are used alternately. Crossing a descriptor boundary
++ * is detected by polling PCI_CONTROL_DTOA (it contains the next
++ * descriptor number) every 1ms. Believe it or not, IRIX does it this way.
++ *
++ * To add insult to injury, this chip clips (saturates) 32-bit data to
++ * 24 bits. Unfortunately, ALSA lib can't be relied upon to sign-extend the
++ * bytes written to the mmap area (non-sign-extended data cause problems
++ * after clipping). This complicates the driver and makes it ugly.
++ *
++ * This driver is incomplete because of lack of documentation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA02111-1307 USA
++ */
++
++#include <sound/driver.h>
++#include <linux/delay.h>
++#include <linux/init.h>
++#include <linux/pci.h>
++#include <linux/slab.h>
++#include <linux/timer.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++
++#include <sound/rad1.h>
++
++#define RATE_IS_44100
++
++typedef struct snd_rad1 rad1_t;
++struct snd_rad1 {
++ /* per-card */
++ snd_card_t *card;
++ snd_pcm_t *pcm;
++ struct pci_dev *pci;
++ unsigned long mmio_phys;
++ volatile struct rad1regs *mmio;
++ struct timer_list timer;
++ /* per-channel */
++ snd_pcm_substream_t *substream;
++ int run_period;
++ int run_period_next;
++ int run_descr;
++ int run_descr_next;
++ int *dma_virt;
++ unsigned long dma_phys;
++ unsigned long dma_periods;
++ unsigned long dma_period_bytes;
++ int *vbuf_virt;
++ unsigned long vbuf_phys;
++ unsigned long vbuf_size;
++ unsigned int virt_pos;
++ int run_dma;
++};
++#define chip_t rad1_t
++
++void snd_rad1_hw_init(rad1_t *chip)
++{
++ chip->mmio->reset=0xffffffff;
++ udelay(1000);
++ chip->mmio->reset=0xffe3cffe;
++ chip->mmio->pci_holdoff=0x08000010;
++ chip->mmio->pci_arb_control=0x00fac688;
++ chip->mmio->atod_control=0x03000000;
++ chip->mmio->dtoa_control=0x40000000;
++ chip->mmio->aes_rx_control=0x00000010;
++ chip->mmio->aes_tx_control=0x40000000;
++ chip->mmio->adat_rx_control=0xa0000008;
++ chip->mmio->adat_tx_control=0x20000000;
++ chip->mmio->gpio3=0x00000002;
++ chip->mmio->misc_control=0x00000480;
++ chip->mmio->mpll0_lock_control=0x9fffffff;
++ chip->mmio->mpll1_lock_control=0x9fffffff;
++ chip->mmio->reset=0xffe3c0fe;
++ udelay(1000);
++ chip->mmio->clockgen_ictl=0x02000001;
++ chip->mmio->reset=0xffe24070;
++ udelay(1000);
++ chip->mmio->reset=0xffe20000;
++ chip->mmio->gpio2=0x00000002;
++ chip->mmio->volume_control=0xd6d6d6d6;
++ chip->mmio->gpio1=0x00000003;
++ chip->mmio->clockgen_rem=0x0000ffff;
++ chip->mmio->dtoa_control=0x40000000;
++ chip->mmio->clockgen_ictl=0x40000403;
++ chip->mmio->freq_synth2_mux_sel=0x00000000;
++ udelay(10000);
++}
++
++void snd_rad1_hw_set_descr(rad1_t *chip, int descr, int next)
++{
++ unsigned long len = chip->dma_period_bytes;
++ unsigned long addr = descr * len;
++ addr += chip->vbuf_phys;
++
++ chip->mmio->pci_descr[descr].hiadr=(addr>>32)&0xffffffff;
++ chip->mmio->pci_descr[descr].loadr=addr&0xffffffff;
++ chip->mmio->pci_descr[descr].control=((-len)&0xffffff80)|(next<<3);
++}
++
++void snd_rad1_hw_prepare_dma(rad1_t *chip, int descr, int next)
++{
++ unsigned long len = chip->dma_period_bytes;
++ unsigned long addr = descr * len;
++ addr += chip->vbuf_phys;
++
++ chip->mmio->pci_hiadr_dtoa=(addr>>32)&0xffffffff;
++ chip->mmio->pci_loadr_dtoa=addr&0xffffffff;
++ chip->mmio->pci_control_dtoa=((-len)&0xffffff80)|(next<<3);
++}
++
++void snd_rad1_hw_run(rad1_t *chip, int run)
++{
++ chip->mmio->dtoa_control=0x40000000|(run?1:0);
++}
++
++void snd_rad1_hw_setrate(rad1_t *chip, int rate)
++{
++ switch(rate) {
++ case 48000:
++ chip->mmio->freq_synth2_mux_sel=0x00000001;
++ chip->mmio->clockgen_ictl=0x40000403;
++ break;
++ case 44100:
++ chip->mmio->freq_synth2_mux_sel=0x00000000;
++ chip->mmio->clockgen_ictl=0x40000403;
++ break;
++ case 22050:
++ chip->mmio->freq_synth2_mux_sel=0x00000000;
++ chip->mmio->clockgen_ictl=0x40000404;
++ break;
++ case 11025:
++ chip->mmio->freq_synth2_mux_sel=0x00000000;
++ chip->mmio->clockgen_ictl=0x40000405;
++ break;
++ default:
++ printk(KERN_INFO "Unsupported playback PCM sample rate: %d\n",rate);
++ }
++}
++
++void snd_rad1_shift24(int *dest, int *src, unsigned count)
++{
++ int i;
++ for(i=0;i<count;i++)
++ dest[i] = src[i] >> 8;
++}
++
++void snd_rad1_poll_timer(unsigned long chip_virt)
++{
++ rad1_t *chip = (rad1_t *)chip_virt;
++ unsigned stat = chip->mmio->pci_control_dtoa;
++ unsigned next = (stat>>3)&15;
++
++ if (next != chip->run_descr_next && chip->run_dma) {
++ snd_pcm_period_elapsed(chip->substream);
++
++ chip->run_descr = chip->run_descr_next;
++ chip->run_descr_next = next;
++ chip->run_period = chip->run_period_next;
++ chip->run_period_next = (chip->run_period + 1) % chip->dma_periods;
++
++ snd_rad1_hw_set_descr(chip, chip->run_descr_next, chip->run_descr);
++
++ snd_rad1_shift24(chip->vbuf_virt + chip->run_descr_next * (chip->dma_period_bytes >> 2),
++ chip->dma_virt + chip->run_period * (chip->dma_period_bytes >> 2),
++ chip->dma_period_bytes >> 2);
++ chip->virt_pos = chip->run_period_next * (chip->dma_period_bytes >> 3);
++ }
++
++ if(chip->run_dma) {
++ chip->timer.expires = jiffies+1;
++ add_timer(&chip->timer);
++ }
++}
++
++static snd_pcm_hardware_t snd_rad1_playback_hw = {
++ .info = (SNDRV_PCM_INFO_INTERLEAVED |
++ SNDRV_PCM_INFO_MMAP |
++ SNDRV_PCM_INFO_MMAP_VALID |
++ SNDRV_PCM_INFO_BLOCK_TRANSFER |
++ SNDRV_PCM_INFO_RESUME),
++ .formats = SNDRV_PCM_FMTBIT_S32_BE,
++ .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_11025,
++ .rate_min = 11025,
++ .rate_max = 48000,
++ .channels_min = 2,
++ .channels_max = 2,
++ .buffer_bytes_max = 1048576,
++ .period_bytes_min = 8192,
++ .period_bytes_max = 262144,
++ .periods_min = 8,
++ .periods_max = 32,
++};
++
++static int snd_rad1_playback_open(snd_pcm_substream_t *substream)
++{
++ snd_pcm_runtime_t *runtime = substream->runtime;
++
++ runtime->hw = snd_rad1_playback_hw;
++ return 0;
++}
++
++static int snd_rad1_playback_close(snd_pcm_substream_t *substream)
++{
++ rad1_t *chip = snd_pcm_substream_chip(substream);
++
++ chip->run_dma=0;
++ return 0;
++}
++
++static int snd_rad1_pcm_hw_params(snd_pcm_substream_t *substream, snd_pcm_hw_params_t *hw_params)
++{
++ return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
++}
++
++static int snd_rad1_pcm_hw_free(snd_pcm_substream_t *substream)
++{
++ rad1_t *chip = snd_pcm_substream_chip(substream);
++
++ if(chip->vbuf_virt) {
++ chip->run_dma=0;
++ dma_free_coherent(NULL, chip->vbuf_size, chip->vbuf_virt, chip->vbuf_phys);
++ chip->vbuf_virt = NULL;
++ }
++ return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_rad1_pcm_prepare(snd_pcm_substream_t *substream)
++{
++ rad1_t *chip = snd_pcm_substream_chip(substream);
++ snd_pcm_runtime_t *runtime = substream->runtime;
++ dma_addr_t dma_handle;
++
++ del_timer(&chip->timer);
++ snd_rad1_hw_run(chip, 0);
++
++ chip->substream = substream;
++
++ chip->dma_phys = runtime->dma_addr;
++ chip->dma_virt = (int *)runtime->dma_area;
++ chip->dma_periods = runtime->periods;
++ chip->dma_period_bytes = frames_to_bytes(runtime, runtime->period_size);
++
++ if(chip->vbuf_virt)
++ dma_free_coherent(NULL, chip->vbuf_size, chip->vbuf_virt, chip->vbuf_phys);
++ chip->vbuf_size = chip->dma_period_bytes * 2;
++ chip->vbuf_virt = dma_alloc_coherent(NULL, chip->vbuf_size, &dma_handle, GFP_KERNEL);
++ if(!chip->vbuf_virt) {
++ printk(KERN_ERR "rad1: can't allocate DMA buffer memory!\n");
++ return -ENOMEM;
++ }
++ chip->vbuf_phys = dma_handle;
++ memset(chip->vbuf_virt, 0, chip->vbuf_size);
++
++ snd_rad1_hw_setrate(chip, runtime->rate);
++
++ chip->run_descr = 0;
++ chip->run_descr_next = 1;
++ chip->run_period = 0;
++ chip->run_period_next = 1;
++ chip->virt_pos = 0;
++ snd_rad1_hw_set_descr(chip, 0, 1);
++ snd_rad1_hw_set_descr(chip, 1, 0);
++ snd_rad1_hw_prepare_dma(chip, 0, 1);
++
++ chip->timer.expires = jiffies + 1;
++ chip->timer.function = snd_rad1_poll_timer;
++ chip->timer.data = (unsigned long)chip;
++ chip->run_dma=1;
++ add_timer(&chip->timer);
++
++ return 0;
++}
++
++static int snd_rad1_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
++{
++ rad1_t *chip = snd_pcm_substream_chip(substream);
++
++ switch(cmd) {
++ case SNDRV_PCM_TRIGGER_START:
++ case SNDRV_PCM_TRIGGER_RESUME:
++ snd_rad1_hw_run(chip, 1);
++ return 0;
++ case SNDRV_PCM_TRIGGER_STOP:
++ case SNDRV_PCM_TRIGGER_SUSPEND:
++ snd_rad1_hw_run(chip, 0);
++ return 0;
++ default:
++ return -EINVAL;
++ }
++}
++
++static snd_pcm_uframes_t snd_rad1_pcm_pointer(snd_pcm_substream_t *substream)
++{
++ rad1_t *chip = snd_pcm_substream_chip(substream);
++
++ return chip->virt_pos;
++}
++
++static snd_pcm_ops_t snd_rad1_playback_ops = {
++ .open = snd_rad1_playback_open,
++ .close = snd_rad1_playback_close,
++ .hw_params = snd_rad1_pcm_hw_params,
++ .hw_free = snd_rad1_pcm_hw_free,
++ .prepare = snd_rad1_pcm_prepare,
++ .trigger = snd_rad1_pcm_trigger,
++ .pointer = snd_rad1_pcm_pointer,
++ .ioctl = snd_pcm_lib_ioctl,
++};
++
++static int __devinit snd_rad1_new_pcm(rad1_t *chip)
++{
++ snd_pcm_t *pcm;
++ int err;
++ init_timer(&chip->timer);
++ if ((err = snd_pcm_new(chip->card, "RAD1 PCM", 0, 1, 0, &pcm)) < 0)
++ return err;
++ pcm->private_data = chip;
++ strcpy(pcm->name, "RAD1 PCM");
++ chip->pcm = pcm;
++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rad1_playback_ops);
++ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 262144, 262144);
++ return 0;
++}
++
++static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
++static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
++static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
++static int ndev;
++
++static int snd_rad1_free(rad1_t *chip)
++{
++ if (chip->mmio)
++ iounmap((void *)(chip->mmio));
++ pci_release_regions(chip->pci);
++ kfree(chip);
++ return 0;
++}
++
++static int snd_rad1_dev_free(snd_device_t *device)
++{
++ rad1_t *chip = device->device_data;
++ return snd_rad1_free(chip);
++}
++
++static int __devinit snd_rad1_create(snd_card_t *card, struct pci_dev *pci, rad1_t **rchip)
++{
++ rad1_t *chip;
++ int err;
++ static snd_device_ops_t ops = {
++ .dev_free = snd_rad1_dev_free,
++ };
++
++ *rchip = NULL;
++
++ if((err = pci_enable_device(pci)) < 0)
++ return err;
++
++ chip = kcalloc(sizeof(rad1_t), 1, GFP_KERNEL);
++ if (chip == NULL)
++ return -ENOMEM;
++
++ chip->card = card;
++ chip->pci = pci;
++
++ pci_set_master(pci);
++
++ if ((err = pci_request_regions(pci, "RAD1")) < 0) {
++ kfree(chip);
++ return err;
++ }
++
++ chip->mmio_phys = pci_resource_start(pci, 0);
++ chip->mmio = ioremap_nocache(chip->mmio_phys, pci_resource_len(pci, 0));
++
++ snd_rad1_hw_init(chip);
++
++ if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
++ snd_rad1_free(chip);
++ return err;
++ }
++ *rchip = chip;
++ return 0;
++}
++
++static struct pci_device_id snd_rad1_ids[] = {
++ { 0x10a9, 0x0005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
++ { 0, },
++};
++
++static int __devinit snd_rad1_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
++{
++ snd_card_t *card;
++ rad1_t *chip;
++ int err;
++
++ if (ndev >= SNDRV_CARDS)
++ return -ENODEV;
++ if (!enable[ndev]) {
++ ndev++;
++ return -ENOENT;
++ }
++
++ card = snd_card_new(index[ndev], id[ndev], THIS_MODULE, 0);
++ if (card == NULL)
++ return -ENOMEM;
++
++ if ((err = snd_rad1_create(card, pci, &chip)) < 0) {
++ snd_card_free(card);
++ return err;
++ }
++
++ strcpy(card->driver, "RAD1");
++ strcpy(card->shortname, "SGI RAD Pro Audio");
++ sprintf(card->longname, "%s at 0x%lx", card->shortname, chip->mmio_phys);
++
++ if ((err = snd_rad1_new_pcm(chip)) < 0) {
++ snd_card_free(card);
++ return err;
++ }
++
++ if ((err = snd_card_register(card)) < 0) {
++ snd_card_free(card);
++ return err;
++ }
++
++ pci_set_drvdata(pci, card);
++ ndev++;
++ return 0;
++}
++
++static void __devexit snd_rad1_remove(struct pci_dev *pci)
++{
++ snd_card_free(pci_get_drvdata(pci));
++ pci_set_drvdata(pci, NULL);
++}
++
++MODULE_DEVICE_TABLE(pci, snd_rad1_ids);
++
++static struct pci_driver driver = {
++ .name = "SGI RAD1",
++ .id_table = snd_rad1_ids,
++ .probe = snd_rad1_probe,
++ .remove = __devexit_p(snd_rad1_remove),
++};
++
++static int __init alsa_card_rad1_init(void)
++{
++ return pci_module_init(&driver);
++}
++
++static void __exit alsa_card_rad1_exit(void)
++{
++ pci_unregister_driver(&driver);
++}
++
++module_init(alsa_card_rad1_init)
++module_exit(alsa_card_rad1_exit)
Property changes on: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/21_ip30.dpatch
___________________________________________________________________
Name: svn:executable
+ *
Deleted: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/21_nptl.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/21_nptl.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/21_nptl.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,457 +0,0 @@
-#! /bin/sh -e
-## 21_nptl.dpatch by Daniel Jacobowitz <dan at debian.org>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Here's a kernel patch to enable NPTL support. This doesn't include Maciej's
-## DP: uber-fast rdhwr emulation; I believe we ought to include both the fast and
-## DP: slow paths, since the slow path will handle use of other destination
-## DP: registers. Changes:
-## DP:
-## DP: - Clone takes five arguments, not four. Um, this bit is gross.
-## DP: - New syscall sys_set_thread_area. Only glibc uses this.
-## DP: - Emulation of the rdhwr instruction. This version is only loosely
-## DP: based on the emulation on the malta branch; the major difference
-## DP: is that I fixed ll/sc/rdhwr emulation in branch delay slots.
-## DP: GCC 4.1 will generate rdhwr in branch delay slots in some
-## DP: conditions.
-## DP: - PTRACE_GET_THREAD_AREA support for GDB.
-## DP:
-## DP: How's it look? I've just finished hopefully final tests for the
-## DP: glibc bits, and will post them once this patch is resolved.
-## DP:
-## DP: [Credit goes to Manish Lachwani at MontaVista for writing the
-## DP: first draft of this patch, though he won't recognize most of this
-## DP: copy :-)]
-
-if [ $# -lt 1 ]; then
- echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch} ${2:+-d $2}"
-
-case "$1" in
- -patch) patch -p1 ${patch_opts} < $0;;
- -unpatch) patch -R -p1 ${patch_opts} < $0;;
- *)
- echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
- exit 1;;
-esac
-
-exit 0
-
-Index: linux/arch/mips/kernel/syscall.c
-===================================================================
---- linux.orig/arch/mips/kernel/syscall.c 2005-03-15 10:09:23.000000000 -0500
-+++ linux/arch/mips/kernel/syscall.c 2005-03-15 10:30:09.000000000 -0500
-@@ -176,14 +176,28 @@ _sys_clone(nabi_no_regargs struct pt_reg
- {
- unsigned long clone_flags;
- unsigned long newsp;
-- int *parent_tidptr, *child_tidptr;
-+ int __user *parent_tidptr, *child_tidptr;
-
- clone_flags = regs.regs[4];
- newsp = regs.regs[5];
- if (!newsp)
- newsp = regs.regs[29];
-- parent_tidptr = (int *) regs.regs[6];
-- child_tidptr = (int *) regs.regs[7];
-+ parent_tidptr = (int __user *) regs.regs[6];
-+#ifdef CONFIG_MIPS32
-+ /* We need to fetch the fifth argument off the stack. */
-+ child_tidptr = NULL;
-+ if (clone_flags & (CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID)) {
-+ int __user *__user *usp = (int __user *__user *) regs.regs[29];
-+ if (regs.regs[2] == __NR_syscall) {
-+ if (get_user (child_tidptr, &usp[5]))
-+ return -EFAULT;
-+ }
-+ else if (get_user (child_tidptr, &usp[4]))
-+ return -EFAULT;
-+ }
-+#else
-+ child_tidptr = (int __user *) regs.regs[8];
-+#endif
- return do_fork(clone_flags, newsp, ®s, 0,
- parent_tidptr, child_tidptr);
- }
-@@ -245,6 +259,16 @@ asmlinkage int sys_olduname(struct oldol
- return error;
- }
-
-+void sys_set_thread_area(unsigned long addr)
-+{
-+ struct thread_info *ti = current->thread_info;
-+
-+ ti->tp_value = addr;
-+
-+ /* If some future MIPS implementation has this register in hardware,
-+ * we will need to update it here (and in context switches). */
-+}
-+
- asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
- {
- int tmp, len;
-Index: linux/arch/mips/kernel/traps.c
-===================================================================
---- linux.orig/arch/mips/kernel/traps.c 2005-03-15 10:09:23.000000000 -0500
-+++ linux/arch/mips/kernel/traps.c 2005-03-15 10:33:48.000000000 -0500
-@@ -360,6 +360,10 @@ static inline int get_insn_opcode(struct
- #define OFFSET 0x0000ffff
- #define LL 0xc0000000
- #define SC 0xe0000000
-+#define SPEC3 0x7c000000
-+#define RD 0x0000f800
-+#define FUNC 0x0000003f
-+#define RDHWR 0x0000003b
-
- /*
- * The ll_bit is cleared by r*_switch.S
-@@ -408,9 +412,10 @@ static inline void simulate_ll(struct pt
-
- preempt_enable();
-
-+ compute_return_epc(regs);
-+
- regs->regs[(opcode & RT) >> 16] = value;
-
-- compute_return_epc(regs);
- return;
-
- sig:
-@@ -446,9 +451,9 @@ static inline void simulate_sc(struct pt
- preempt_disable();
-
- if (ll_bit == 0 || ll_task != current) {
-- regs->regs[reg] = 0;
- preempt_enable();
- compute_return_epc(regs);
-+ regs->regs[reg] = 0;
- return;
- }
-
-@@ -459,9 +464,8 @@ static inline void simulate_sc(struct pt
- goto sig;
- }
-
-- regs->regs[reg] = 1;
--
- compute_return_epc(regs);
-+ regs->regs[reg] = 1;
- return;
-
- sig:
-@@ -494,6 +498,37 @@ static inline int simulate_llsc(struct p
- return -EFAULT; /* Strange things going on ... */
- }
-
-+/*
-+ * Simulate trapping 'rdhwr' instructions to provide user accessible
-+ * registers not implemented in hardware. The only current use of this
-+ * is the thread area pointer.
-+ */
-+static inline int simulate_rdhwr(struct pt_regs *regs)
-+{
-+ struct thread_info *ti = current->thread_info;
-+ unsigned int opcode;
-+
-+ if (unlikely(get_insn_opcode(regs, &opcode)))
-+ return -EFAULT;
-+
-+ if (unlikely(compute_return_epc(regs)))
-+ return -EFAULT;
-+
-+ if ((opcode & OPCODE) == SPEC3 && (opcode & FUNC) == RDHWR) {
-+ int rd = (opcode & RD) >> 11;
-+ int rt = (opcode & RT) >> 16;
-+ switch (rd) {
-+ case 29:
-+ regs->regs[rt] = ti->tp_value;
-+ break;
-+ default:
-+ return -EFAULT;
-+ }
-+ }
-+
-+ return 0;
-+}
-+
- asmlinkage void do_ov(struct pt_regs *regs)
- {
- siginfo_t info;
-@@ -640,6 +675,9 @@ asmlinkage void do_ri(struct pt_regs *re
- if (!simulate_llsc(regs))
- return;
-
-+ if (!simulate_rdhwr(regs))
-+ return;
-+
- force_sig(SIGILL, current);
- }
-
-@@ -653,11 +691,13 @@ asmlinkage void do_cpu(struct pt_regs *r
-
- switch (cpid) {
- case 0:
-- if (cpu_has_llsc)
-- break;
-+ if (!cpu_has_llsc)
-+ if (!simulate_llsc(regs))
-+ return;
-
-- if (!simulate_llsc(regs))
-+ if (!simulate_rdhwr(regs))
- return;
-+
- break;
-
- case 1:
-Index: linux/arch/mips/kernel/process.c
-===================================================================
---- linux.orig/arch/mips/kernel/process.c 2005-03-15 10:09:23.000000000 -0500
-+++ linux/arch/mips/kernel/process.c 2005-03-16 09:04:04.049856461 -0500
-@@ -89,6 +89,7 @@ int copy_thread(int nr, unsigned long cl
- struct thread_info *ti = p->thread_info;
- struct pt_regs *childregs;
- long childksp;
-+ p->set_child_tid = p->clear_child_tid = NULL;
-
- childksp = (unsigned long)ti + THREAD_SIZE - 32;
-
-@@ -134,6 +135,9 @@ int copy_thread(int nr, unsigned long cl
- childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
- clear_tsk_thread_flag(p, TIF_USEDFPU);
-
-+ if (clone_flags & CLONE_SETTLS)
-+ ti->tp_value = regs->regs[7];
-+
- return 0;
- }
-
-Index: linux/include/asm-mips/inst.h
-===================================================================
---- linux.orig/include/asm-mips/inst.h 2005-03-15 10:09:23.000000000 -0500
-+++ linux/include/asm-mips/inst.h 2005-03-15 10:09:29.000000000 -0500
-@@ -28,7 +28,7 @@ enum major_op {
- sdl_op, sdr_op, swr_op, cache_op,
- ll_op, lwc1_op, lwc2_op, pref_op,
- lld_op, ldc1_op, ldc2_op, ld_op,
-- sc_op, swc1_op, swc2_op, major_3b_op, /* Opcode 0x3b is unused */
-+ sc_op, swc1_op, swc2_op, rdhwr_op,
- scd_op, sdc1_op, sdc2_op, sd_op
- };
-
-Index: linux/arch/mips/kernel/ptrace.c
-===================================================================
---- linux.orig/arch/mips/kernel/ptrace.c 2005-03-15 10:09:23.000000000 -0500
-+++ linux/arch/mips/kernel/ptrace.c 2005-03-15 10:09:29.000000000 -0500
-@@ -287,6 +287,11 @@ asmlinkage int sys_ptrace(long request,
- ret = ptrace_detach(child, data);
- break;
-
-+ case PTRACE_GET_THREAD_AREA:
-+ ret = put_user(child->thread_info->tp_value,
-+ (unsigned long __user *) data);
-+ break;
-+
- default:
- ret = ptrace_request(child, request, addr, data);
- break;
-Index: linux/include/asm-mips/thread_info.h
-===================================================================
---- linux.orig/include/asm-mips/thread_info.h 2005-03-15 10:09:23.000000000 -0500
-+++ linux/include/asm-mips/thread_info.h 2005-03-15 10:34:51.000000000 -0500
-@@ -26,6 +26,7 @@ struct thread_info {
- struct task_struct *task; /* main task structure */
- struct exec_domain *exec_domain; /* execution domain */
- unsigned long flags; /* low level flags */
-+ unsigned long tp_value; /* thread pointer */
- __u32 cpu; /* current CPU */
- __s32 preempt_count; /* 0 => preemptable, <0 => BUG */
-
-Index: linux/arch/mips/kernel/offset.c
-===================================================================
---- linux.orig/arch/mips/kernel/offset.c 2005-03-15 10:09:23.000000000 -0500
-+++ linux/arch/mips/kernel/offset.c 2005-03-15 10:09:29.000000000 -0500
-@@ -95,6 +95,7 @@ void output_thread_info_defines(void)
- offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count);
- offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
- offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
-+ offset("#define TI_TP_VALUE ", struct thread_info, tp_value);
- constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
- constant("#define _THREAD_SIZE ", THREAD_SIZE);
- constant("#define _THREAD_MASK ", THREAD_MASK);
-Index: linux/arch/mips/kernel/scall64-o32.S
-===================================================================
---- linux.orig/arch/mips/kernel/scall64-o32.S 2005-03-15 10:09:23.000000000 -0500
-+++ linux/arch/mips/kernel/scall64-o32.S 2005-03-15 10:29:46.000000000 -0500
-@@ -322,7 +322,7 @@ sys_call_table:
- PTR sys32_ipc
- PTR sys_fsync
- PTR sys32_sigreturn
-- PTR sys_clone /* 4120 */
-+ PTR sys32_clone /* 4120 */
- PTR sys_setdomainname
- PTR sys32_newuname
- PTR sys_ni_syscall /* sys_modify_ldt */
-@@ -485,4 +485,5 @@ sys_call_table:
- PTR sys_add_key /* 4280 */
- PTR sys_request_key
- PTR sys_keyctl
-+ PTR sys_set_thread_area
- .size sys_call_table,.-sys_call_table
-Index: linux/arch/mips/kernel/linux32.c
-===================================================================
---- linux.orig/arch/mips/kernel/linux32.c 2005-03-15 10:09:23.000000000 -0500
-+++ linux/arch/mips/kernel/linux32.c 2005-03-15 10:29:02.000000000 -0500
-@@ -1471,3 +1471,38 @@ sysn32_rt_sigtimedwait(const sigset_t __
- }
- return sys_rt_sigtimedwait(uthese, uinfo, uts, sigsetsize);
- }
-+
-+save_static_function(sys32_clone);
-+__attribute_used__ noinline static int
-+_sys32_clone(unsigned long __dummy0,
-+ unsigned long __dummy1,
-+ unsigned long __dummy2,
-+ unsigned long __dummy3,
-+ unsigned long __dummy4,
-+ unsigned long __dummy5,
-+ unsigned long __dummy6,
-+ unsigned long __dummy7,
-+ struct pt_regs regs)
-+{
-+ unsigned long clone_flags;
-+ unsigned long newsp;
-+ int __user *parent_tidptr, *child_tidptr;
-+
-+ clone_flags = regs.regs[4];
-+ newsp = regs.regs[5];
-+ if (!newsp)
-+ newsp = regs.regs[29];
-+ parent_tidptr = (int *) regs.regs[6];
-+
-+ /* Use __dummy4 instead of getting it off the stack, so that
-+ syscall() works. */
-+ child_tidptr = (int __user *) __dummy4;
-+ return do_fork(clone_flags, newsp, ®s, 0,
-+ parent_tidptr, child_tidptr);
-+}
-+
-+extern asmlinkage void sys_set_thread_area(u32 addr);
-+asmlinkage void sys32_set_thread_area(u32 addr)
-+{
-+ sys_set_thread_area(AA(addr));
-+}
-Index: linux/arch/mips/kernel/ptrace32.c
-===================================================================
---- linux.orig/arch/mips/kernel/ptrace32.c 2005-03-15 10:09:23.000000000 -0500
-+++ linux/arch/mips/kernel/ptrace32.c 2005-03-15 10:09:29.000000000 -0500
-@@ -268,6 +268,11 @@ asmlinkage int sys32_ptrace(int request,
- wake_up_process(child);
- break;
-
-+ case PTRACE_GET_THREAD_AREA:
-+ ret = put_user(child->thread_info->tp_value,
-+ (unsigned int __user *) (unsigned long) data);
-+ break;
-+
- case PTRACE_DETACH: /* detach a process that was attached. */
- ret = ptrace_detach(child, data);
- break;
-Index: linux/arch/mips/kernel/scall32-o32.S
-===================================================================
---- linux.orig/arch/mips/kernel/scall32-o32.S 2005-03-15 10:04:30.000000000 -0500
-+++ linux/arch/mips/kernel/scall32-o32.S 2005-03-15 10:29:24.000000000 -0500
-@@ -623,6 +623,7 @@ einval: li v0, -EINVAL
- sys sys_add_key 5
- sys sys_request_key 4
- sys sys_keyctl 5
-+ sys sys_set_thread_area 1
-
- .endm
-
-Index: linux/include/asm-mips/unistd.h
-===================================================================
---- linux.orig/include/asm-mips/unistd.h 2005-02-02 09:17:33.000000000 -0500
-+++ linux/include/asm-mips/unistd.h 2005-03-15 10:26:02.000000000 -0500
-@@ -303,16 +303,17 @@
- #define __NR_add_key (__NR_Linux + 280)
- #define __NR_request_key (__NR_Linux + 281)
- #define __NR_keyctl (__NR_Linux + 282)
-+#define __NR_set_thread_area (__NR_Linux + 283)
-
- /*
- * Offset of the last Linux o32 flavoured syscall
- */
--#define __NR_Linux_syscalls 282
-+#define __NR_Linux_syscalls 283
-
- #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
-
- #define __NR_O32_Linux 4000
--#define __NR_O32_Linux_syscalls 282
-+#define __NR_O32_Linux_syscalls 283
-
- #if _MIPS_SIM == _MIPS_SIM_ABI64
-
-@@ -562,16 +563,17 @@
- #define __NR_add_key (__NR_Linux + 239)
- #define __NR_request_key (__NR_Linux + 240)
- #define __NR_keyctl (__NR_Linux + 241)
-+#define __NR_set_thread_area (__NR_Linux + 242)
-
- /*
- * Offset of the last Linux 64-bit flavoured syscall
- */
--#define __NR_Linux_syscalls 241
-+#define __NR_Linux_syscalls 242
-
- #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
-
- #define __NR_64_Linux 5000
--#define __NR_64_Linux_syscalls 241
-+#define __NR_64_Linux_syscalls 242
-
- #if _MIPS_SIM == _MIPS_SIM_NABI32
-
-@@ -825,16 +827,17 @@
- #define __NR_add_key (__NR_Linux + 243)
- #define __NR_request_key (__NR_Linux + 244)
- #define __NR_keyctl (__NR_Linux + 245)
-+#define __NR_set_thread_area (__NR_Linux + 246)
-
- /*
- * Offset of the last N32 flavoured syscall
- */
--#define __NR_Linux_syscalls 245
-+#define __NR_Linux_syscalls 246
-
- #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
-
- #define __NR_N32_Linux 6000
--#define __NR_N32_Linux_syscalls 245
-+#define __NR_N32_Linux_syscalls 246
-
- #ifndef __ASSEMBLY__
-
-Index: linux/arch/mips/kernel/scall64-64.S
-===================================================================
---- linux.orig/arch/mips/kernel/scall64-64.S 2005-01-20 16:26:58.000000000 -0500
-+++ linux/arch/mips/kernel/scall64-64.S 2005-03-15 10:29:48.000000000 -0500
-@@ -449,3 +449,4 @@ sys_call_table:
- PTR sys_add_key
- PTR sys_request_key /* 5240 */
- PTR sys_keyctl
-+ PTR sys_set_thread_area
-Index: linux/arch/mips/kernel/scall64-n32.S
-===================================================================
---- linux.orig/arch/mips/kernel/scall64-n32.S 2005-03-15 10:09:21.000000000 -0500
-+++ linux/arch/mips/kernel/scall64-n32.S 2005-03-16 09:04:03.388011517 -0500
-@@ -363,3 +363,4 @@ EXPORT(sysn32_call_table)
- PTR sys_add_key
- PTR sys_request_key
- PTR sys_keyctl /* 6245 */
-+ PTR sys_set_thread_area
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/40_ip27-horribles.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/40_ip27-horribles.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/40_ip27-horribles.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -22,140 +22,173 @@
exit 0
-Index: arch/mips/pci/pci.c
+Index: arch/mips/mm/c-r4k.c
===================================================================
-RCS file: /home/cvs/linux/arch/mips/pci/pci.c,v
+RCS file: /home/cvs/linux/arch/mips/mm/c-r4k.c,v
+retrieving revision 1.108
+diff -u -p -r1.108 c-r4k.c
+--- arch/mips/mm/c-r4k.c 25 Apr 2005 16:36:23 -0000 1.108
++++ arch/mips/mm/c-r4k.c 8 Jul 2005 09:17:59 -0000
+@@ -1264,9 +1264,8 @@ void __init ld_mmu_r4xx0(void)
+ _dma_cache_inv = r4k_dma_cache_inv;
+ #endif
+
+- __flush_cache_all();
+- coherency_setup();
+-
+ build_clear_page();
+ build_copy_page();
++ local_r4k___flush_cache_all(NULL);
++ coherency_setup();
+ }
+Index: arch/mips/mm/c-tx39.c
+===================================================================
+RCS file: /home/cvs/linux/arch/mips/mm/c-tx39.c,v
retrieving revision 1.30
-diff -u -p -r1.30 pci.c
---- arch/mips/pci/pci.c 16 Dec 2004 12:55:01 -0000 1.30
-+++ arch/mips/pci/pci.c 10 Jan 2005 22:10:33 -0000
-@@ -20,11 +20,11 @@
- * Make this long-lived so that we know when shutting down
- * whether we probed only or not.
- */
--int pci_probe_only;
-+int pci_probe_only = 1;
+diff -u -p -r1.30 c-tx39.c
+--- arch/mips/mm/c-tx39.c 27 Jun 2005 08:39:23 -0000 1.30
++++ arch/mips/mm/c-tx39.c 8 Jul 2005 09:17:59 -0000
+@@ -492,4 +492,5 @@ void __init ld_mmu_tx39(void)
- #define PCI_ASSIGN_ALL_BUSSES 1
+ build_clear_page();
+ build_copy_page();
++ tx39h_flush_icache_all();
+ }
+Index: arch/mips/mm/pg-r4k.c
+===================================================================
+RCS file: /home/cvs/linux/arch/mips/mm/pg-r4k.c,v
+retrieving revision 1.16
+diff -u -p -r1.16 pg-r4k.c
+--- arch/mips/mm/pg-r4k.c 15 Jan 2005 01:31:05 -0000 1.16
++++ arch/mips/mm/pg-r4k.c 8 Jul 2005 09:17:59 -0000
+@@ -404,9 +404,6 @@ dest = label();
--unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
-+unsigned int pci_probe = 0; // PCI_ASSIGN_ALL_BUSSES;
+ build_jr_ra();
- /*
- * The PCI controller list.
-Index: drivers/md/md.c
-===================================================================
-RCS file: /home/cvs/linux/drivers/md/md.c,v
-retrieving revision 1.78
-diff -u -p -r1.78 md.c
---- drivers/md/md.c 4 Dec 2004 18:16:04 -0000 1.78
-+++ drivers/md/md.c 10 Jan 2005 22:10:33 -0000
-@@ -429,6 +429,7 @@ abort:
- return ret;
+- flush_icache_range((unsigned long)&clear_page_array,
+- (unsigned long) epc);
+-
+ BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array));
}
-+#if 0
- static unsigned int calc_sb_csum(mdp_super_t * sb)
- {
- unsigned int disk_csum, csum;
-@@ -439,6 +440,23 @@ static unsigned int calc_sb_csum(mdp_sup
- sb->sb_csum = disk_csum;
- return csum;
+@@ -482,8 +479,5 @@ dest = label();
+
+ build_jr_ra();
+
+- flush_icache_range((unsigned long)©_page_array,
+- (unsigned long) epc);
+-
+ BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array));
}
-+#else
-+unsigned long calc_sb_csum(mdp_super_t *super)
-+{
-+ unsigned int oldcsum = super->sb_csum;
-+ unsigned long long newcsum = 0;
-+ unsigned long csum;
-+ int i;
-+ unsigned int *superc = (int*) super;
-+ super->sb_csum = 0;
-+
-+ for(i=0; i<MD_SB_BYTES/4; i++)
-+ newcsum+= superc[i];
-+ csum = (newcsum& 0xffffffff) + (newcsum>>32);
-+ super->sb_csum = oldcsum;
-+ return csum;
-+}
-+#endif
+Index: arch/mips/mm/tlbex.c
+===================================================================
+RCS file: /home/cvs/linux/arch/mips/mm/tlbex.c,v
+retrieving revision 1.26
+diff -u -p -r1.26 tlbex.c
+--- arch/mips/mm/tlbex.c 30 Jun 2005 10:51:01 -0000 1.26
++++ arch/mips/mm/tlbex.c 8 Jul 2005 09:17:59 -0000
+@@ -743,7 +743,6 @@ static void __init build_r3000_tlb_refil
+ #endif
+ memcpy((void *)CAC_BASE, tlb_handler, 0x80);
+- flush_icache_range(CAC_BASE, CAC_BASE + 0x80);
+ }
/*
-Index: drivers/scsi/qlogicisp.c
-===================================================================
-RCS file: /home/cvs/linux/drivers/scsi/qlogicisp.c,v
-retrieving revision 1.40
-diff -u -p -r1.40 qlogicisp.c
---- drivers/scsi/qlogicisp.c 25 Oct 2004 20:44:35 -0000 1.40
-+++ drivers/scsi/qlogicisp.c 10 Jan 2005 22:10:34 -0000
-@@ -1044,28 +1044,31 @@ void isp1020_intr_handler(int irq, void
+@@ -1256,7 +1255,6 @@ static void __init build_r4000_tlb_refil
+ #endif
- DEBUG_INTR(isp1020_print_status_entry(sts));
+ memcpy((void *)CAC_BASE, final_handler, 0x100);
+- flush_icache_range(CAC_BASE, CAC_BASE + 0x100);
+ }
-- if (sts->hdr.entry_type == ENTRY_STATUS)
-- Cmnd->result = isp1020_return_status(sts);
-- else
-- Cmnd->result = DID_ERROR << 16;
+ /*
+@@ -1517,9 +1515,6 @@ static void __init build_r3000_tlb_load_
+ printk("%08x\n", handle_tlbl[i]);
+ }
+ #endif
-
-- if (Cmnd->use_sg)
-- pci_unmap_sg(hostdata->pci_dev,
-- (struct scatterlist *)Cmnd->buffer,
-- Cmnd->use_sg,
-- scsi_to_pci_dma_dir(Cmnd->sc_data_direction));
-- else if (Cmnd->request_bufflen)
-- pci_unmap_single(hostdata->pci_dev,
-+ if (Cmnd) {
-+ if (sts->hdr.entry_type == ENTRY_STATUS)
-+ Cmnd->result = isp1020_return_status(sts);
-+ else
-+ Cmnd->result = DID_ERROR << 16;
-+
-+ if (Cmnd->use_sg)
-+ pci_unmap_sg(hostdata->pci_dev,
-+ (struct scatterlist *)Cmnd->buffer,
-+ Cmnd->use_sg,
-+ scsi_to_pci_dma_dir(Cmnd->sc_data_direction));
-+ else if (Cmnd->request_bufflen)
-+ pci_unmap_single(hostdata->pci_dev,
- #ifdef CONFIG_QL_ISP_A64
-- (dma_addr_t)((long)Cmnd->SCp.ptr),
-+ (dma_addr_t)((long)Cmnd->SCp.ptr),
- #else
-- (u32)((long)Cmnd->SCp.ptr),
-+ (u32)((long)Cmnd->SCp.ptr),
+- flush_icache_range((unsigned long)handle_tlbl,
+- (unsigned long)handle_tlbl + FASTPATH_SIZE * sizeof(u32));
+ }
+
+ static void __init build_r3000_tlb_store_handler(void)
+@@ -1557,9 +1552,6 @@ static void __init build_r3000_tlb_store
+ printk("%08x\n", handle_tlbs[i]);
+ }
#endif
-- Cmnd->request_bufflen,
-- scsi_to_pci_dma_dir(Cmnd->sc_data_direction));
-+ Cmnd->request_bufflen,
-+ scsi_to_pci_dma_dir(Cmnd->sc_data_direction));
+-
+- flush_icache_range((unsigned long)handle_tlbs,
+- (unsigned long)handle_tlbs + FASTPATH_SIZE * sizeof(u32));
+ }
- isp_outw(out_ptr, host, MBOX5);
- (*Cmnd->scsi_done)(Cmnd);
-+ } else
-+ printk(KERN_CRIT "qlogic: Cmnd == NULL");
+ static void __init build_r3000_tlb_modify_handler(void)
+@@ -1597,9 +1589,6 @@ static void __init build_r3000_tlb_modif
+ printk("%08x\n", handle_tlbm[i]);
}
- hostdata->res_out_ptr = out_ptr;
+ #endif
+-
+- flush_icache_range((unsigned long)handle_tlbm,
+- (unsigned long)handle_tlbm + FASTPATH_SIZE * sizeof(u32));
+ }
-@@ -1233,6 +1236,13 @@ int isp1020_reset(Scsi_Cmnd *Cmnd, unsig
- return return_status;
+ /*
+@@ -1689,9 +1678,6 @@ static void __init build_r4000_tlb_load_
+ printk("%08x\n", handle_tlbl[i]);
+ }
+ #endif
+-
+- flush_icache_range((unsigned long)handle_tlbl,
+- (unsigned long)handle_tlbl + FASTPATH_SIZE * sizeof(u32));
}
-+static int
-+isp1020_eh_abort(struct scsi_cmnd * cmd)
-+{
-+ printk(KERN_WARNING "ISP1020 is toast\n");
-+ return -ENODEV;
-+}
-+
+ static void __init build_r4000_tlb_store_handler(void)
+@@ -1728,9 +1714,6 @@ static void __init build_r4000_tlb_store
+ printk("%08x\n", handle_tlbs[i]);
+ }
+ #endif
+-
+- flush_icache_range((unsigned long)handle_tlbs,
+- (unsigned long)handle_tlbs + FASTPATH_SIZE * sizeof(u32));
+ }
- int isp1020_biosparam(struct scsi_device *sdev, struct block_device *n,
- sector_t capacity, int ip[])
-@@ -1984,6 +1994,7 @@ static Scsi_Host_Template driver_templat
- .release = isp1020_release,
- .info = isp1020_info,
- .queuecommand = isp1020_queuecommand,
-+ .eh_abort_handler = isp1020_eh_abort,
- .bios_param = isp1020_biosparam,
- .can_queue = QLOGICISP_REQ_QUEUE_LEN,
- .this_id = -1,
+ static void __init build_r4000_tlb_modify_handler(void)
+@@ -1768,9 +1751,6 @@ static void __init build_r4000_tlb_modif
+ printk("%08x\n", handle_tlbm[i]);
+ }
+ #endif
+-
+- flush_icache_range((unsigned long)handle_tlbm,
+- (unsigned long)handle_tlbm + FASTPATH_SIZE * sizeof(u32));
+ }
+
+ void __init build_tlb_refill_handler(void)
+Index: arch/mips/pci/pci.c
+===================================================================
+RCS file: /home/cvs/linux/arch/mips/pci/pci.c,v
+retrieving revision 1.30
+diff -u -p -r1.30 pci.c
+--- arch/mips/pci/pci.c 16 Dec 2004 12:55:01 -0000 1.30
++++ arch/mips/pci/pci.c 8 Jul 2005 09:17:59 -0000
+@@ -20,11 +20,19 @@
+ * Make this long-lived so that we know when shutting down
+ * whether we probed only or not.
+ */
+-int pci_probe_only;
++#ifdef CONFIG_MIPS_SGI_IP27
++int pci_probe_only = 1;
++#else
++int pci_probe_only;
++#endif
+
+ #define PCI_ASSIGN_ALL_BUSSES 1
+
+-unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
++#ifdef CONFIG_MIPS_SGI_IP27
++unsigned int pci_probe = 0;
++#else
++unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
++#endif
+
+ /*
+ * The PCI controller list.
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/51_iomap.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/51_iomap.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/51_iomap.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -31,9 +31,9 @@
#
-lib-y += csum_partial_copy.o dec_and_lock.o memcpy.o promlib.o strlen_user.o \
-- strncpy_user.o strnlen_user.o
+- strncpy_user.o strnlen_user.o uncached.o
+lib-y += csum_partial_copy.o dec_and_lock.o iomap.o memcpy.o promlib.o \
-+ strlen_user.o strncpy_user.o strnlen_user.o
++ strlen_user.o strncpy_user.o strnlen_user.o uncached.o
EXTRA_AFLAGS := $(CFLAGS)
diff -urN -X dontdiff a-orig/arch/mips/lib/iomap.c a/arch/mips/lib/iomap.c
Deleted: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/53_ip22-zilogtimeout.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/53_ip22-zilogtimeout.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/53_ip22-zilogtimeout.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,42 +0,0 @@
-#! /bin/sh -e
-## 53_ip22-zilogtimeout.dpatch by Thiemo Seufer <seufer at csv.ica.uni-stuttgart.de>
-##
-## DP: Originally from Peter Fuerst
-
-if [ $# -lt 1 ]; then
- echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch} ${2:+-d $2}"
-
-case "$1" in
- -patch) patch -p0 ${patch_opts} < $0;;
- -unpatch) patch -R -p0 ${patch_opts} < $0;;
- *)
- echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
- exit 1;;
-esac
-
-exit 0
-
---- drivers/serial/ip22zilog.c.orig 2005-02-17 01:53:55.000000000 +0100
-+++ drivers/serial/ip22zilog.c 2005-02-17 10:38:56.000000000 +0100
-@@ -881,6 +881,7 @@ ip22zilog_set_termios(struct uart_port *
- up->cflag = termios->c_cflag;
-
- ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port));
-+ uart_update_timeout(port, termios->c_cflag, baud);
-
- spin_unlock_irqrestore(&up->port.lock, flags);
- }
-@@ -1047,6 +1048,8 @@ ip22serial_console_termios(struct consol
- }
-
- con->cflag = cflag | CS8; /* 8N1 */
-+
-+ uart_update_timeout(&ip22zilog_port_table[con->index].port, cflag, baud);
- }
-
- static int __init ip22zilog_console_setup(struct console *con, char *options)
Deleted: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/56_p2-matrox.dpatch
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/patches/56_p2-matrox.dpatch 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/patches/56_p2-matrox.dpatch 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,83 +0,0 @@
-#! /bin/sh -e
-## 56_p2-matrox.dpatch by Peter 'p2' De Schrijver <p2 at mind.be>
-##
-## DP: Matrox BE fix
-## DP:
-## DP: Signed-off-by: Peter 'p2' De Schrijver <p2 at mind.be>
-
-if [ $# -lt 1 ]; then
- echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
- exit 1
-fi
-
-[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
-patch_opts="${patch_opts:--f --no-backup-if-mismatch} ${2:+-d $2}"
-
-case "$1" in
- -patch) patch -p1 ${patch_opts} < $0;;
- -unpatch) patch -R -p1 ${patch_opts} < $0;;
- *)
- echo "`basename $0`: script expects -patch|-unpatch as argument" >&2
- exit 1;;
-esac
-
-exit 0
-
-diff -ur -x Entries linux-2.6.12-rc1/drivers/video/matrox/matroxfb_accel.c linux/drivers/video/matrox/matroxfb_accel.c
---- linux-2.6.12-rc1/drivers/video/matrox/matroxfb_accel.c 2004-10-25 22:44:40.000000000 +0200
-+++ linux/drivers/video/matrox/matroxfb_accel.c 2005-03-24 00:39:35.000000000 +0100
-@@ -438,13 +438,21 @@
- } else if (step == 1) {
- /* Special case for 1..8bit widths */
- while (height--) {
-- mga_writel(mmio, 0, *chardata);
-+#if defined(__BIG_ENDIAN)
-+ fb_writel((*chardata) << 24, mmio.vaddr);
-+#else
-+ fb_writel(*chardata, mmio.vaddr);
-+#endif
- chardata++;
- }
- } else if (step == 2) {
- /* Special case for 9..15bit widths */
- while (height--) {
-- mga_writel(mmio, 0, *(u_int16_t*)chardata);
-+#if defined(__BIG_ENDIAN)
-+ fb_writel((*(u_int16_t*)chardata) << 16, mmio.vaddr);
-+#else
-+ fb_writel(*(u_int16_t*)chardata, mmio.vaddr);
-+#endif
- chardata += 2;
- }
- } else {
-@@ -454,7 +462,7 @@
- =09
- for (i = 0; i < step; i += 4) {
- /* Hope that there are at least three readable bytes beyond the end of bitmap */
-- mga_writel(mmio, 0, get_unaligned((u_int32_t*)(chardata + i)));
-+ fb_writel(get_unaligned((u_int32_t*)(chardata + i)),mmio.vaddr);
- }
- chardata += step;
- }
-diff -ur -x Entries linux-2.6.12-rc1/drivers/video/matrox/matroxfb_base.h linux/drivers/video/matrox/matroxfb_base.h
---- linux-2.6.12-rc1/drivers/video/matrox/matroxfb_base.h 2005-03-18 18:37:57.000000000 +0100
-+++ linux/drivers/video/matrox/matroxfb_base.h 2005-03-22 00:18:50.000000000 +0100
-@@ -170,14 +170,14 @@
-
- if ((unsigned long)src & 3) {
- while (len >= 4) {
-- writel(get_unaligned((u32 *)src), addr);
-+ fb_writel(get_unaligned((u32 *)src), addr);
- addr++;
- len -= 4;
- src += 4;
- }
- } else {
- while (len >= 4) {
-- writel(*(u32 *)src, addr);
-+ fb_writel(*(u32 *)src, addr);
- addr++;
- len -= 4;
- src += 4;
-
-
Modified: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/rules
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/rules 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/rules 2005-08-08 18:03:31 UTC (rev 3749)
@@ -1,6 +1,6 @@
#!/usr/bin/make -f
#
-# debian/rules for kernel-patch-mips
+# debian/rules for linux-patch-mips
#
# Copyright (C) 2005 Thiemo Seufer
@@ -9,121 +9,119 @@
SHELL := sh -e
-DEB_HOST_ARCH ?= $(shell dpkg-architecture -qDEB_HOST_ARCH)
+debarch := $(shell dpkg-architecture -qDEB_HOST_ARCH)
+# The version of our linux-source build-dependency.
+sourcever := $(shell grep -v ^\# debian/sourceversion)
+
+# The kernel module ABI version.
+abiver := $(shell grep -v ^\# debian/abiversion)
+
# The package version should be
-# <kernel upstream>-<abi version>-<debian revision>
-# e.g. 2.6.10-1-1
+# <kernel upstream>-<debian revision>
+# e.g. 2.6.10-1
debver := $(shell dpkg-parsechangelog |grep '^Version: ' |sed -e 's/^Version: //')
-kernabiver := $(shell echo $(debver) |sed 's/-[^-]*$$//')
-kernver := $(shell echo $(kernabiver) |sed 's/-[^-]*$$//')
-abiver := $(shell echo $(kernabiver) |sed 's/.*-//g')
+kernver := $(word 1,$(subst -, ,$(debver)))
+major_v := $(word 1,$(subst ., ,$(kernver)))
+minor_v := $(word 2,$(subst ., ,$(kernver)))
+major := $(major_v).$(minor_v)
-mtdir := mips-tools
-kdir := build-tmp/kernel-source-$(kernver)
+# The flavours we're building for.
+flavours := $(shell grep -v ^\# debian/flavours.$(debarch))
-# the flavours we're building for
-flavours := $(shell grep -v ^\# debian/flavours.$(DEB_HOST_ARCH))
+# The list of all flavour specific header packages.
+flavour-headers := $(foreach fla,$(flavours),linux-headers-$(kernver)-$(abiver)-$(fla))
-# handle mips-tools package build
-MT_CFLAGS = -W -Wall -g -pipe
-ifneq (,$(findstring noopt,$(DEB_BUILD_OPTIONS)))
- MT_CFLAGS += -O0
-else
- MT_CFLAGS += -O2
-endif
+# The mips tools package directory
+mtdir := mips-tools
-MT_INSTALL = install -m 755 -o root -g root
-ifeq (,$(findstring nostrip,$(DEB_BUILD_OPTIONS)))
- MT_INSTALL += -s
-endif
+NUM_CPUS := $(shell grep '^processor[:space:]*' /proc/cpuinfo | wc -l)
-NUM_CPUS=`cat /proc/cpuinfo | grep '^processor[:space:]*' | wc -l`
+# The place the source tarball unpacks to.
+kdir := linux-source-$(kernver)
+export kernver abiver debver debarch NUM_CPUS DEB_BUILD_OPTIONS SHELL kdir mtdir
+
unpack: stamps/source-unpack-stamp
stamps/source-unpack-stamp:
- rm -rf stamps build-tmp
- mkdir stamps build-tmp
- tar -C build-tmp --bzip2 -xf /usr/src/kernel-source-$(kernver).tar.bz2
- ln -sf asm-mips $(kdir)/include/asm
+ rm -rf stamps
+ mkdir stamps
+ tar -C debian --bzip2 -xf /usr/src/linux-source-$(kernver).tar.bz2
+ ln -sf asm-mips debian/$(kdir)/include/asm
touch $@
patch: stamps/source-patch-stamp
stamps/source-patch-stamp: stamps/source-unpack-stamp
- dpatch -d $(kdir) apply-all
+ dpatch -d debian/$(kdir) apply-all
dpatch cat-all > $@
unpatch:
ifneq (,$(wildcard stamps/source-patch-stamp))
- dpatch -d $(kdir) deapply-all
+ dpatch -d debian/$(kdir) deapply-all
rm -f stamps/source-patch-stamp
endif
-debian/control: debian/changelog debian/flavours.$(DEB_HOST_ARCH) \
+# This needs to be phony in order to rebuild.
+.PHONY: debian/control
+debian/control: debian/changelog \
+ debian/flavours.$(debarch) \
debian/control.in/stub \
- $(foreach sub,$(flavours),debian/control.in/$(sub))
- sed -e 's/@@KERNVER@@/$(kernver)/g' \
- -e 's/@@ABIVER@@/$(abiver)/g' \
+ $(foreach fla,$(flavours),debian/control.in/$(fla))
+ sed -e 's/@sourcever@/$(sourcever)/g' \
+ -e 's/@kernver@/$(kernver)/g' \
+ -e 's/@abiver@/$(abiver)/g' \
+ -e 's/@arch@/$(debarch)/g' \
+ -e 's/@major@/$(major)/g' \
+ -e 's/@flavour-headers@/$(flavour-headers)/g' \
debian/control.in/stub >$@ && echo '' >> $@
- $(foreach sub,$(flavours), \
- sed -e 's/@@KERNVER@@/$(kernver)/g' \
- -e 's/@@ABIVER@@/$(abiver)/g' \
- debian/control.in/$(sub) >>$@ \
+ $(foreach fla,$(flavours), \
+ sed -e 's/@sourcever@/$(sourcever)/g' \
+ -e 's/@kernver@/$(kernver)/g' \
+ -e 's/@abiver@/$(abiver)/g' \
+ -e 's/@arch@/$(debarch)/g' \
+ -e 's/@major@/$(major)/g' \
+ -e 's/@flavour@/$(fla)/g' \
+ debian/control.in/$(fla) >> $@ \
&& echo '' >> $@ &&) :
-clean:
- dh_testdir
- rm -rf stamps build-tmp
- dh_clean
+build: stamps/build
+stamps/build: debian/control patch
+ $(MAKE) -C debian build-mips-tools
+ touch $@
-# We can't use the build target because the tree is mangled by the
-# binary targets afterwards
-build: debian/control
-
-install: stamps/source-patch-stamp
+install: build
dh_testdir
dh_testroot
dh_clean -k
dh_installdirs -p$(mtdir)
+ $(MAKE) -C debian install-mips-tools
- # build the mips-tools
- cd $(kdir) && make-kpkg clean && make-kpkg debian
- cd $(kdir)/arch/mips/boot \
- && gcc $(MT_CFLAGS) -o elf2ecoff elf2ecoff.c
-
- # install files for mips-tools package
- $(MT_INSTALL) -D $(kdir)/arch/mips/boot/elf2ecoff debian/$(mtdir)/usr/bin/elf2ecoff
-
-binary-headers: install
+clean:
dh_testdir
- dh_testroot
+ rm -rf stamps debian/$(kdir) debian/*.deb
+ $(MAKE) -C debian clean-mips-tools
+ $(foreach fla,$(flavours), \
+ $(MAKE) -C debian flavour=$(fla) clean-flavour &&) :
ifneq ($(flavours),)
- cd $(kdir) && make-kpkg clean && make-kpkg debian
- cp -p debian/changelog debian/control debian/copyright debian/post-install $(kdir)/debian/
- echo official > $(kdir)/debian/official
- # We use a random config. If this is not generic enough, we
- # have to switch to flavour-specific header packages.
- cp debian/config/mips/r4k-ip22 $(kdir)/.config
- cd $(kdir) && make-kpkg --append-to-version=-$(abiver) kernel_headers
- mv build-tmp/kernel-headers-$(kernabiver)_$(debver)_$(DEB_HOST_ARCH).deb ..
+ $(MAKE) -C debian clean-generic-headers
endif
+ dh_clean
-binary-images: stamps/source-patch-stamp
+binary-images: patch
dh_testdir
dh_testroot
- #chmod a+x ./scripts/copy-modules
+ $(foreach fla,$(flavours), \
+ $(MAKE) -C debian flavour=$(fla) build-flavour && \
+ cp -l debian/linux-image-$(kernver)-$(abiver)-$(fla)_$(debver)_$(debarch).deb .. && \
+ cp -l debian/linux-headers-$(kernver)-$(abiver)-$(fla)_$(debver)_$(debarch).deb .. &&) :
- # Messes up version detection with kernel-package - but that's good
- $(foreach sub,$(flavours), \
- echo "Building subarch $(sub)" && \
- ( cd $(kdir) && make-kpkg clean && make-kpkg debian ) && \
- cp -p debian/changelog debian/control debian/copyright \
- debian/post-install $(kdir)/debian/ && \
- echo official > $(kdir)/debian/official && \
- cp debian/config/$(DEB_HOST_ARCH)/$(sub) $(kdir)/.config && \
- ( cd $(kdir) && CONCURRENCY_LEVEL=$(NUM_CPUS) make-kpkg \
- --subarch $(sub) --append-to-version=-$(abiver)-$(sub) kernel_image ) && \
- mv build-tmp/kernel-image-$(kernabiver)-$(sub)_$(debver)_$(DEB_HOST_ARCH).deb .. && ) :
+binary-headers: patch
+ dh_testdir
+ dh_testroot
+ifneq ($(flavours),)
+ $(MAKE) -C debian build-generic-headers
+ cp -l debian/linux-headers-$(kernver)-$(abiver)_$(debver)_$(debarch).deb ..
+endif
binary-arch: binary-images binary-headers
dh_testdir
@@ -144,39 +142,17 @@
dh_md5sums -p$(mtdir)
dh_builddeb -p$(mtdir)
# finally add the kernel images and headers
- $(foreach sub,$(flavours), \
- dpkg-distaddfile kernel-image-$(kernabiver)-$(sub)_$(debver)_$(DEB_HOST_ARCH).deb base optional && ) :
+ $(foreach fla,$(flavours), \
+ dpkg-distaddfile linux-image-$(kernver)-$(abiver)-$(fla)_$(debver)_$(debarch).deb base optional && \
+ dpkg-distaddfile linux-headers-$(kernver)-$(abiver)-$(fla)_$(debver)_$(debarch).deb devel optional &&) :
ifneq ($(flavours),)
- dpkg-distaddfile kernel-headers-$(kernabiver)_$(debver)_$(DEB_HOST_ARCH).deb devel optional
+ dpkg-distaddfile linux-headers-$(kernver)-$(abiver)_$(debver)_$(debarch).deb devel optional
endif
binary-indep:
binary: binary-arch binary-indep
-.PHONY: binary binary-arch binary-indep binary-images binary-headers build \
- clean install patch unpatch
-
-#############################################################
-
-## environment for make-kpkg
-#export INITRD=Yes
-#export INITRD_OK=WeKnowWhatWeAreDoing
-
-#stamp-configure-prepare:
-# -$(MAKE) -s -C config default > $(KSOURCE)/.config
-
-## copy build infrastructure for kernel modules
-# cd $(KFLAVOUR); find scripts -type f ! -name '*.o' | cpio -pd $(KSRC)
-# cat debian/build-files | ( cd $(KFLAVOUR); cpio -pd $(KSRC) )
-
-#install-clean:
-# for file in debian/*.m4; do rm -f $${file%.m4}; done
-# for dir in debian/kernel-*; do if test -d $$dir; then rm -rf $$dir; fi; done
-# rm -f stamp-install-*
-
-#############################################################
-
-# Local Variables:
-# mode:Makefile
-# End:
+.PHONY: build build-flavour \
+ binary binary-arch binary-indep binary-images binary-headers \
+ clean install patch unpatch unpack
Added: trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/sourceversion
===================================================================
--- trunk/kernel/mips/kernel-patch-2.6.11-mips-2.6.11/debian/sourceversion 2005-07-12 17:20:39 UTC (rev 3479)
+++ trunk/kernel/mips/kernel-patch-2.6.12-mips-2.6.12/debian/sourceversion 2005-08-08 18:03:31 UTC (rev 3749)
@@ -0,0 +1 @@
+2.6.12-1
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