r2601 - in trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches: . series
Sven Luther
luther@costa.debian.org
Fri, 04 Mar 2005 18:33:54 +0100
Author: luther
Date: 2005-03-04 18:33:54 +0100 (Fri, 04 Mar 2005)
New Revision: 2601
Modified:
trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/powerpc-g4-l2-flush-errata.dpatch
trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/series/2.6.11-1
Log:
Adapted powerpc-g4-l2-flush-errata.dpatch.
Modified: trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/powerpc-g4-l2-flush-errata.dpatch
===================================================================
--- trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/powerpc-g4-l2-flush-errata.dpatch 2005-03-04 17:26:30 UTC (rev 2600)
+++ trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/powerpc-g4-l2-flush-errata.dpatch 2005-03-04 17:33:54 UTC (rev 2601)
@@ -8,9 +8,10 @@
. $(dirname $0)/DPATCH
@DPATCH@
---- 1.31/arch/ppc/kernel/cputable.c 2004-11-11 09:25:53 +01:00
-+++ edited/arch/ppc/kernel/cputable.c 2005-01-02 12:53:10 +01:00
-@@ -380,7 +380,7 @@ struct cpu_spec cpu_specs[] = {
+diff -urN kernel-source-2.6.11-2.6.11-orig/arch/ppc/kernel/cputable.c kernel-source-2.6.11-2.6.11/arch/ppc/kernel/cputable.c
+--- kernel-source-2.6.11-2.6.11-orig/arch/ppc/kernel/cputable.c 2005-03-02 08:38:09.000000000 +0100
++++ kernel-source-2.6.11-2.6.11/arch/ppc/kernel/cputable.c 2005-03-04 18:31:46.617848664 +0100
+@@ -380,7 +380,7 @@
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
@@ -19,7 +20,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -397,7 +397,7 @@ struct cpu_spec cpu_specs[] = {
+@@ -397,7 +397,7 @@
CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
@@ -28,7 +29,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -413,7 +413,8 @@ struct cpu_spec cpu_specs[] = {
+@@ -413,7 +413,8 @@
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
@@ -38,7 +39,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -428,7 +429,8 @@ struct cpu_spec cpu_specs[] = {
+@@ -428,7 +429,8 @@
CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
@@ -48,7 +49,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -445,7 +447,8 @@ struct cpu_spec cpu_specs[] = {
+@@ -445,7 +447,8 @@
CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
@@ -58,7 +59,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -462,7 +465,7 @@ struct cpu_spec cpu_specs[] = {
+@@ -462,7 +465,7 @@
CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
@@ -67,7 +68,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -479,7 +482,8 @@ struct cpu_spec cpu_specs[] = {
+@@ -479,7 +482,8 @@
CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
@@ -77,7 +78,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -496,7 +500,8 @@ struct cpu_spec cpu_specs[] = {
+@@ -496,7 +500,8 @@
CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
@@ -87,7 +88,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -513,7 +518,7 @@ struct cpu_spec cpu_specs[] = {
+@@ -513,7 +518,7 @@
CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
@@ -96,7 +97,7 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
-@@ -529,7 +534,8 @@ struct cpu_spec cpu_specs[] = {
+@@ -529,7 +534,8 @@
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
@@ -106,8 +107,9 @@
.cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
.icache_bsize = 32,
.dcache_bsize = 32,
---- 1.11/arch/ppc/kernel/l2cr.S 2004-02-21 02:30:29 +01:00
-+++ edited/arch/ppc/kernel/l2cr.S 2005-01-02 12:55:28 +01:00
+diff -urN kernel-source-2.6.11-2.6.11-orig/arch/ppc/kernel/l2cr.S kernel-source-2.6.11-2.6.11/arch/ppc/kernel/l2cr.S
+--- kernel-source-2.6.11-2.6.11-orig/arch/ppc/kernel/l2cr.S 2005-03-02 08:38:10.000000000 +0100
++++ kernel-source-2.6.11-2.6.11/arch/ppc/kernel/l2cr.S 2005-03-04 18:31:46.864811120 +0100
@@ -19,7 +19,7 @@
/*
Thur, Dec. 12, 1998.
@@ -139,7 +141,7 @@
Author: Terry Greeniaus (tgree@phys.ualberta.ca)
Please e-mail updates to this file to me, thanks!
*/
-@@ -154,9 +157,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+@@ -155,9 +158,7 @@
Don't do this unless you accomodate all processor variations.
The bit moved on the 7450.....
****/
@@ -150,7 +152,7 @@
lis r4,0x0002
mtctr r4
li r4,0
-@@ -175,7 +176,23 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
+@@ -176,7 +177,23 @@
dcbf 0,r4
addi r4,r4,32 /* Go to start of next cache line */
bdnz 1b
@@ -174,7 +176,7 @@
2:
/* Set up the L2CR configuration bits (and switch L2 off) */
/* CPU errata: Make sure the mtspr below is already in the
-@@ -292,17 +309,18 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
+@@ -293,17 +310,18 @@
/* Flush the cache.
*/
@@ -204,7 +206,7 @@
2:
/* Set up the L3CR configuration bits (and switch L3 off) */
-@@ -348,8 +366,8 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
+@@ -349,8 +367,8 @@
cmplwi r5,0
beq 4f
@@ -215,7 +217,7 @@
mtspr SPRN_L3CR,r3
sync
-@@ -357,6 +375,15 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
+@@ -358,6 +376,15 @@
li r0,256
mtctr r0
1: bdnz 1b
@@ -231,9 +233,10 @@
/* Restore MSR (restores EE and DR bits to original state) */
4: SYNC
---- 1.36/arch/ppc/kernel/traps.c 2004-11-02 15:40:33 +01:00
-+++ edited/arch/ppc/kernel/traps.c 2005-01-02 12:53:46 +01:00
-@@ -298,7 +298,9 @@ void MachineCheckException(struct pt_reg
+diff -urN kernel-source-2.6.11-2.6.11-orig/arch/ppc/kernel/traps.c kernel-source-2.6.11-2.6.11/arch/ppc/kernel/traps.c
+--- kernel-source-2.6.11-2.6.11-orig/arch/ppc/kernel/traps.c 2005-03-02 08:37:50.000000000 +0100
++++ kernel-source-2.6.11-2.6.11/arch/ppc/kernel/traps.c 2005-03-04 18:31:46.867810664 +0100
+@@ -307,7 +307,9 @@
case 0x80000:
printk("Machine check signal\n");
break;
@@ -244,9 +247,10 @@
case 0x40000:
case 0x140000: /* 7450 MSS error and TEA */
printk("Transfer error ack signal\n");
---- 1.10/include/asm-ppc/cputable.h 2004-11-11 09:25:52 +01:00
-+++ edited/include/asm-ppc/cputable.h 2005-01-02 12:53:46 +01:00
-@@ -83,6 +83,7 @@ extern struct cpu_spec *cur_cpu_spec[];
+diff -urN kernel-source-2.6.11-2.6.11-orig/include/asm-ppc/cputable.h kernel-source-2.6.11-2.6.11/include/asm-ppc/cputable.h
+--- kernel-source-2.6.11-2.6.11-orig/include/asm-ppc/cputable.h 2005-03-02 08:38:07.000000000 +0100
++++ kernel-source-2.6.11-2.6.11/include/asm-ppc/cputable.h 2005-03-04 18:31:46.942799264 +0100
+@@ -83,6 +83,7 @@
#define CPU_FTR_HAS_HIGH_BATS 0x00010000
#define CPU_FTR_NEED_COHERENT 0x00020000
#define CPU_FTR_NO_BTIC 0x00040000
Modified: trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/series/2.6.11-1
===================================================================
--- trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/series/2.6.11-1 2005-03-04 17:26:30 UTC (rev 2600)
+++ trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/series/2.6.11-1 2005-03-04 17:33:54 UTC (rev 2601)
@@ -26,7 +26,8 @@
+ doc-post_halloween.dpatch
+ powerpc-fix-power3-ftbfs.dpatch
+ powerpc-serial.dpatch
-# + powerpc-g4-l2-flush-errata.dpatch
++ powerpc-g4-l2-flush-errata.dpatch
+
# + fs-asfs.dpatch
# + modular-ide-pnp.dpatch
# + modular-ide.dpatch