r3237 - in trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian: . patches patches/series
Dann Frazier
dannf@costa.debian.org
Tue, 24 May 2005 06:32:36 +0000
Author: dannf
Date: 2005-05-24 06:32:34 +0000 (Tue, 24 May 2005)
New Revision: 3237
Added:
trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/patches/mckinley_icache.dpatch
trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/patches/series/2.6.8-17
Modified:
trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/changelog
Log:
fix cache coherency bug needed to support a new ia64 chip
Modified: trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/changelog
===================================================================
--- trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/changelog 2005-05-24 01:40:51 UTC (rev 3236)
+++ trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/changelog 2005-05-24 06:32:34 UTC (rev 3237)
@@ -1,3 +1,13 @@
+kernel-source-2.6.8 (2.6.8-17) UNRELEASED; urgency=low
+
+ * mckinley_icache.dpatch:
+ Fix a cache coherency bug unearthed by a new ia64 processor, codenamed
+ Montecito. This bug causes data corruption that has manifested itself
+ in kernel hangs and userspace crashes, and causes d-i to fail.
+ Reference: http://www.intel.com/cd/ids/developer/asmo-na/eng/215766.htm
+
+ -- dann frazier <dannf@debian.org> Mon, 23 May 2005 23:57:00 -0600
+
kernel-source-2.6.8 (2.6.8-16) unstable; urgency=low
* smbfs-overrun.dpatch:
Added: trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/patches/mckinley_icache.dpatch
===================================================================
--- trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/patches/mckinley_icache.dpatch 2005-05-24 01:40:51 UTC (rev 3236)
+++ trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/patches/mckinley_icache.dpatch 2005-05-24 06:32:34 UTC (rev 3237)
@@ -0,0 +1,250 @@
+#! /bin/sh -e
+## <PATCHNAME>.dpatch by <PATCH_AUTHOR@EMAI>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Description: Fix cache coherency bug unearthed by "montecito" ia64 chip
+## DP: Patch author: Rohit Seth <rohit.seth@intel.com>
+## DP: Upstream status: backported
+. $(dirname $0)/DPATCH
+
+@DPATCH@
+#
+# Backported to 2.6.8 by dann frazier <dannf@hp.com>
+#
+
+#
+# This is a BitKeeper generated diff -Nru style patch.
+#
+# ChangeSet
+# 2005/03/28 20:05:21-08:00 rohit.seth@intel.com
+# [PATCH] arch hook for notifying changes in PTE protections bits
+#
+# Recently on IA-64, we have found an issue where old data could be used by
+# apps. The sequence of operations includes few mprotects from user space
+# (glibc) goes like this:
+#
+# 1- The text region of an executable is mmaped using
+# PROT_READ|PROT_EXEC. As a result, a shared page is allocated to user.
+#
+# 2- User then requests the text region to be mprotected with
+# PROT_READ|PROT_WRITE. Kernel removes the execute permission and leave
+# the read permission on the text region.
+#
+# 3- Subsequent write operation by user results in page fault and
+# eventually resulting in COW break. User gets a new private copy of the
+# page. At this point kernel marks the new page for defered flush.
+#
+# 4- User then request the text region to be mprotected back with
+# PROT_READ|PROT_EXEC. mprotect suppport code in kernel, flushes the
+# caches, updates the PTEs and then flushes the TLBs. Though after
+# updating the PTEs with new permissions, we don't let the arch specific
+# code know about the new mappings (through update_mmu_cache like
+# routine). IA-64 typically uses update_mmu_cache to check for the
+# defered flush flag (that got set in step 3) to maintain cache coherency
+# lazily (The local I and D caches on IA-64 are incoherent).
+#
+# DavidM suggeested that we would need to add a hook in the function
+# change_pte_range in mm/mprotect.c This would let the architecture specific
+# code to look at the new ptes to decide if it needs to update any other
+# architectual/kernel state based on the updated (new permissions) PTE
+# values.
+#
+# We have added a new hook lazy_mmu_prot_update(pte_t) that gets called
+# protection bits in PTEs change. This hook provides an opportunity to arch
+# specific code to do needful. On IA-64 this will be used for lazily making
+# the I and D caches coherent.
+#
+# Signed-off-by: David Mosberger <davidm@hpl.hp.com>
+# Signed-off-by: Rohit Seth <rohit.seth@intel.com>
+# Signed-off-by: Andrew Morton <akpm@osdl.org>
+# Signed-off-by: Linus Torvalds <torvalds@osdl.org>
+#
+# Documentation/cachetlb.txt
+# 2005/03/28 14:21:43-08:00 rohit.seth@intel.com +5 -0
+# arch hook for notifying changes in PTE protections bits
+#
+# arch/ia64/hp/common/sba_iommu.c
+# 2005/03/28 14:21:43-08:00 rohit.seth@intel.com +1 -1
+# arch hook for notifying changes in PTE protections bits
+#
+# arch/ia64/lib/swiotlb.c
+# 2005/03/28 14:21:43-08:00 rohit.seth@intel.com +1 -1
+# arch hook for notifying changes in PTE protections bits
+#
+# arch/ia64/mm/init.c
+# 2005/03/28 14:21:43-08:00 rohit.seth@intel.com +1 -2
+# arch hook for notifying changes in PTE protections bits
+#
+# include/asm-generic/pgtable.h
+# 2005/03/28 14:21:43-08:00 rohit.seth@intel.com +4 -0
+# arch hook for notifying changes in PTE protections bits
+#
+# include/asm-ia64/pgtable.h
+# 2005/03/28 14:21:43-08:00 rohit.seth@intel.com +4 -1
+# arch hook for notifying changes in PTE protections bits
+#
+# mm/memory.c
+# 2005/03/28 14:21:43-08:00 rohit.seth@intel.com +6 -0
+# arch hook for notifying changes in PTE protections bits
+#
+# mm/mprotect.c
+# 2005/03/28 14:21:43-08:00 rohit.seth@intel.com +3 -2
+# arch hook for notifying changes in PTE protections bits
+#
+diff -urN kernel-source-2.6.8-2.6.8.orig/Documentation/cachetlb.txt kernel-source-2.6.8-2.6.8/Documentation/cachetlb.txt
+--- kernel-source-2.6.8-2.6.8.orig/Documentation/cachetlb.txt 2004-08-13 23:36:45.000000000 -0600
++++ kernel-source-2.6.8-2.6.8/Documentation/cachetlb.txt 2005-05-15 22:53:32.683207640 -0600
+@@ -142,6 +142,11 @@
+ The ia64 sn2 platform is one example of a platform
+ that uses this interface.
+
++8) void lazy_mmu_prot_update (pte_t pte)
++ This interface is called whenever the protection on
++ any user PTEs change. This interface provides a notification
++ to architecture specific code to take appropiate action.
++
+
+ Next, we have the cache flushing interfaces. In general, when Linux
+ is changing an existing virtual-->physical mapping to a new value,
+diff -urN kernel-source-2.6.8-2.6.8.orig/arch/ia64/hp/common/sba_iommu.c kernel-source-2.6.8-2.6.8/arch/ia64/hp/common/sba_iommu.c
+--- kernel-source-2.6.8-2.6.8.orig/arch/ia64/hp/common/sba_iommu.c 2004-08-13 23:36:17.000000000 -0600
++++ kernel-source-2.6.8-2.6.8/arch/ia64/hp/common/sba_iommu.c 2005-05-15 22:53:32.693949828 -0600
+@@ -757,7 +757,7 @@
+ #ifdef ENABLE_MARK_CLEAN
+ /**
+ * Since DMA is i-cache coherent, any (complete) pages that were written via
+- * DMA can be marked as "clean" so that update_mmu_cache() doesn't have to
++ * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to
+ * flush them when they get mapped into an executable vm-area.
+ */
+ static void
+diff -urN kernel-source-2.6.8-2.6.8.orig/arch/ia64/lib/swiotlb.c kernel-source-2.6.8-2.6.8/arch/ia64/lib/swiotlb.c
+--- kernel-source-2.6.8-2.6.8.orig/arch/ia64/lib/swiotlb.c 2004-08-13 23:37:37.000000000 -0600
++++ kernel-source-2.6.8-2.6.8/arch/ia64/lib/swiotlb.c 2005-05-15 22:53:32.697856078 -0600
+@@ -337,7 +337,7 @@
+
+ /*
+ * Since DMA is i-cache coherent, any (complete) pages that were written via
+- * DMA can be marked as "clean" so that update_mmu_cache() doesn't have to
++ * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to
+ * flush them when they get mapped into an executable vm-area.
+ */
+ static void
+diff -urN kernel-source-2.6.8-2.6.8.orig/arch/ia64/mm/init.c kernel-source-2.6.8-2.6.8/arch/ia64/mm/init.c
+--- kernel-source-2.6.8-2.6.8.orig/arch/ia64/mm/init.c 2004-08-13 23:36:56.000000000 -0600
++++ kernel-source-2.6.8-2.6.8/arch/ia64/mm/init.c 2005-05-15 22:53:32.698832640 -0600
+@@ -76,7 +76,7 @@
+ }
+
+ void
+-update_mmu_cache (struct vm_area_struct *vma, unsigned long vaddr, pte_t pte)
++lazy_mmu_prot_update (pte_t pte)
+ {
+ unsigned long addr;
+ struct page *page;
+@@ -85,7 +85,7 @@
+ return; /* not an executable page... */
+
+ page = pte_page(pte);
+- /* don't use VADDR: it may not be mapped on this CPU (or may have just been flushed): */
++
+ addr = (unsigned long) page_address(page);
+
+ if (test_bit(PG_arch_1, &page->flags))
+diff -urN kernel-source-2.6.8-2.6.8.orig/include/asm-generic/pgtable.h kernel-source-2.6.8-2.6.8/include/asm-generic/pgtable.h
+--- kernel-source-2.6.8-2.6.8.orig/include/asm-generic/pgtable.h 2004-08-13 23:36:44.000000000 -0600
++++ kernel-source-2.6.8-2.6.8/include/asm-generic/pgtable.h 2005-05-15 22:53:32.699809203 -0600
+@@ -126,4 +126,7 @@
+ #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
+ #endif
+
++#ifndef __HAVE_ARCH_LAZY_MMU_UPDATE
++#define lazy_mmu_prot_update(pte) do { } while (0)
++#endif
+ #endif /* _ASM_GENERIC_PGTABLE_H */
+diff -urN kernel-source-2.6.8-2.6.8.orig/include/asm-ia64/pgtable.h kernel-source-2.6.8-2.6.8/include/asm-ia64/pgtable.h
+--- kernel-source-2.6.8-2.6.8.orig/include/asm-ia64/pgtable.h 2004-08-13 23:36:44.000000000 -0600
++++ kernel-source-2.6.8-2.6.8/include/asm-ia64/pgtable.h 2005-05-15 22:53:32.700785765 -0600
+@@ -419,6 +419,7 @@
+ {
+ return pte_val(a) == pte_val(b);
+ }
++#define update_mmu_cache(vma,address,pte) do { } while (0)
+
+ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+ extern void paging_init (void);
+@@ -479,7 +480,7 @@
+ * information. However, we use this routine to take care of any (delayed) i-cache
+ * flushing that may be necessary.
+ */
+-extern void update_mmu_cache (struct vm_area_struct *vma, unsigned long vaddr, pte_t pte);
++extern void lazy_mmu_prot_update (pte_t pte);
+
+ #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
+ /*
+@@ -558,6 +559,7 @@
+ #define __HAVE_ARCH_PTEP_MKDIRTY
+ #define __HAVE_ARCH_PTE_SAME
+ #define __HAVE_ARCH_PGD_OFFSET_GATE
++#define __HAVE_ARCH_LAZY_MMU_UPDATE
+ #include <asm-generic/pgtable.h>
+
+ #endif /* _ASM_IA64_PGTABLE_H */
+diff -urN kernel-source-2.6.8-2.6.8.orig/mm/memory.c kernel-source-2.6.8-2.6.8/mm/memory.c
+--- kernel-source-2.6.8-2.6.8.orig/mm/memory.c 2004-08-13 23:36:57.000000000 -0600
++++ kernel-source-2.6.8-2.6.8/mm/memory.c 2005-05-15 22:53:32.701762328 -0600
+@@ -1016,6 +1016,7 @@
+ vma);
+ ptep_establish(vma, address, page_table, entry);
+ update_mmu_cache(vma, address, entry);
++ lazy_mmu_prot_update(entry);
+ }
+
+ /*
+@@ -1068,6 +1069,7 @@
+ vma);
+ ptep_set_access_flags(vma, address, page_table, entry, 1);
+ update_mmu_cache(vma, address, entry);
++ lazy_mmu_prot_update(entry);
+ pte_unmap(page_table);
+ spin_unlock(&mm->page_table_lock);
+ return VM_FAULT_MINOR;
+@@ -1456,6 +1458,7 @@
+
+ /* No need to invalidate - it was non-present before */
+ update_mmu_cache(vma, addr, entry);
++ lazy_mmu_prot_update(entry);
+ spin_unlock(&mm->page_table_lock);
+ out:
+ return VM_FAULT_MINOR;
+@@ -1573,6 +1576,7 @@
+
+ /* no need to invalidate: a not-present page shouldn't be cached */
+ update_mmu_cache(vma, address, entry);
++ lazy_mmu_prot_update(entry);
+ spin_unlock(&mm->page_table_lock);
+ out:
+ return ret;
+@@ -1667,6 +1671,7 @@
+ entry = pte_mkyoung(entry);
+ ptep_set_access_flags(vma, address, pte, entry, write_access);
+ update_mmu_cache(vma, address, entry);
++ lazy_mmu_prot_update(entry);
+ pte_unmap(pte);
+ spin_unlock(&mm->page_table_lock);
+ return VM_FAULT_MINOR;
+diff -urN kernel-source-2.6.8-2.6.8.orig/mm/mprotect.c kernel-source-2.6.8-2.6.8/mm/mprotect.c
+--- kernel-source-2.6.8-2.6.8.orig/mm/mprotect.c 2004-08-13 23:38:11.000000000 -0600
++++ kernel-source-2.6.8-2.6.8/mm/mprotect.c 2005-05-15 22:53:32.702738890 -0600
+@@ -51,8 +51,9 @@
+ * bits by wiping the pte and then setting the new pte
+ * into place.
+ */
+- entry = ptep_get_and_clear(pte);
+- set_pte(pte, pte_modify(entry, newprot));
++ entry = pte_modify(ptep_get_and_clear(pte), newprot);
++ set_pte(pte, entry);
++ lazy_mmu_prot_update(entry);
+ }
+ address += PAGE_SIZE;
+ pte++;
Added: trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/patches/series/2.6.8-17
===================================================================
--- trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/patches/series/2.6.8-17 2005-05-24 01:40:51 UTC (rev 3236)
+++ trunk/kernel/source/kernel-source-2.6.8-2.6.8/debian/patches/series/2.6.8-17 2005-05-24 06:32:34 UTC (rev 3237)
@@ -0,0 +1 @@
++ mckinley_icache.dpatch