[kernel] r7111 - in dists/sid/linux-2.6/debian: patches patches/series

Martin Michlmayr tbm at costa.debian.org
Tue Aug 8 10:49:04 UTC 2006


Author: tbm
Date: Tue Aug  8 10:49:03 2006
New Revision: 7111

Added:
   dists/sid/linux-2.6/debian/patches/arm-iop-fix-80219-detection.patch
   dists/sid/linux-2.6/debian/patches/arm-iop-generic-backport.patch
   dists/sid/linux-2.6/debian/patches/arm-iop-mtd-maps.patch
   dists/sid/linux-2.6/debian/patches/arm-iop-n2100.patch
Modified:
   dists/sid/linux-2.6/debian/changelog
   dists/sid/linux-2.6/debian/patches/series/6

Log:
add Thecus N2100 support


Modified: dists/sid/linux-2.6/debian/changelog
==============================================================================
--- dists/sid/linux-2.6/debian/changelog	(original)
+++ dists/sid/linux-2.6/debian/changelog	Tue Aug  8 10:49:03 2006
@@ -10,6 +10,9 @@
   * mips/mipsel: Use gcc-4.1.
   * arm/ixp4xx: Update config based on the NSLU2 config.
   * arm/s3c2410: Make sure that CONFIG_CPU_BIG_ENDIAN is not set.
+  * arm: xscale: don't mis-report 80219 as an iop32x
+  * arm: Add an MTD maps for IOP3xx boards
+  * arm: Add support for the Thecus N2100.
 
   [ Bastian Blank ]
   * Shrink short descriptions.

Added: dists/sid/linux-2.6/debian/patches/arm-iop-fix-80219-detection.patch
==============================================================================
--- (empty file)
+++ dists/sid/linux-2.6/debian/patches/arm-iop-fix-80219-detection.patch	Tue Aug  8 10:49:03 2006
@@ -0,0 +1,70 @@
+# Upstream status: in 2.6.18-rc3
+
+commit a6a38a66224c7c578cfed2f584b440c81af0c3ae
+Author: Lennert Buytenhek <buytenh at wantstofly.org>
+Date:   Sat Jul 29 08:29:26 2006 +0100
+
+    [ARM] 3736/1: xscale: don't mis-report 80219 as an iop32x
+    
+    Patch from Lennert Buytenhek
+    
+    The IOP 80219 xscale CPU is a stripped down version of the IOP32x.
+    But the fact that the 80219 and IOP32x are very similar doesn't mean
+    that they need to share a cpu table entry.  It's also somewhat confusing
+    for the end user to see the 80219 reported as an IOP32x, so this patch
+    splits the IOP32x cpu table entry to make a separate entry for the
+    80219.
+    
+    Signed-off-by: Lennert Buytenhek <buytenh at wantstofly.org>
+    Signed-off-by: Dan Williams <dan.j.williams at intel.com>
+    Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
+
+
+diff -urN a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
+--- a/arch/arm/mm/proc-xscale.S	2006-08-03 11:39:01.692744500 +0000
++++ b/arch/arm/mm/proc-xscale.S	2006-08-03 11:44:23.780873750 +0000
+@@ -532,6 +532,11 @@
+ 	.asciz	"XScale-80200"
+ 	.size	cpu_80200_name, . - cpu_80200_name
+ 
++	.type	cpu_80219_name, #object
++cpu_80219_name:
++	.asciz	"XScale-80219"
++	.size	cpu_80219_name, . - cpu_80219_name
++
+ 	.type	cpu_8032x_name, #object
+ cpu_8032x_name:
+ 	.asciz	"XScale-IOP8032x Family"
+@@ -606,10 +611,30 @@
+ 	.long	xscale_cache_fns
+ 	.size	__80200_proc_info, . - __80200_proc_info
+ 
++	.type	__80219_proc_info,#object
++__80219_proc_info:
++	.long	0x69052e20
++	.long	0xffffffe0
++	.long   PMD_TYPE_SECT | \
++		PMD_SECT_BUFFERABLE | \
++		PMD_SECT_CACHEABLE | \
++		PMD_SECT_AP_WRITE | \
++		PMD_SECT_AP_READ
++	b	__xscale_setup
++	.long	cpu_arch_name
++	.long	cpu_elf_name
++	.long	HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
++	.long	cpu_80219_name
++	.long	xscale_processor_functions
++	.long	v4wbi_tlb_fns
++	.long	xscale_mc_user_fns
++	.long	xscale_cache_fns
++	.size	__80219_proc_info, . - __80219_proc_info
++
+ 	.type	__8032x_proc_info,#object
+ __8032x_proc_info:
+ 	.long	0x69052420
+-	.long	0xfffff5e0      @ mask should accomodate IOP80219 also
++	.long	0xffffffe0
+ 	.long   PMD_TYPE_SECT | \
+ 		PMD_SECT_BUFFERABLE | \
+ 		PMD_SECT_CACHEABLE | \
+

Added: dists/sid/linux-2.6/debian/patches/arm-iop-generic-backport.patch
==============================================================================
--- (empty file)
+++ dists/sid/linux-2.6/debian/patches/arm-iop-generic-backport.patch	Tue Aug  8 10:49:03 2006
@@ -0,0 +1,222 @@
+# Backport of a number of generic functions which subsequent patches use
+# Upstream status: will go into 2.6.19
+
+diff -urN a/arch/arm/mach-iop3xx/Makefile b/arch/arm/mach-iop3xx/Makefile
+--- a/arch/arm/mach-iop3xx/Makefile	2006-08-03 11:39:01.664742750 +0000
++++ b/arch/arm/mach-iop3xx/Makefile	2006-08-07 17:33:38.237095500 +0000
+@@ -10,7 +10,7 @@
+ obj-n			:=
+ obj-			:=
+ 
+-obj-$(CONFIG_ARCH_IOP321)  += iop321-setup.o iop321-irq.o iop321-pci.o iop321-time.o
++obj-$(CONFIG_ARCH_IOP321)  += iop321-setup.o iop321-irq.o iop321-pci.o iop321-time.o iop321-gpio.o
+ 
+ obj-$(CONFIG_ARCH_IOP331)  += iop331-setup.o iop331-irq.o iop331-pci.o iop331-time.o
+ 
+diff -urN a/arch/arm/mach-iop3xx/iop321-gpio.c b/arch/arm/mach-iop3xx/iop321-gpio.c
+--- a/arch/arm/mach-iop3xx/iop321-gpio.c	1970-01-01 00:00:00.000000000 +0000
++++ b/arch/arm/mach-iop3xx/iop321-gpio.c	2006-08-07 17:33:38.237095500 +0000
+@@ -0,0 +1,44 @@
++/*
++ * arch/arm/plat-iop/gpio.c
++ * GPIO handling for Intel IOP3xx processors.
++ *
++ * Copyright (C) 2006 Lennert Buytenhek <buytenh at wantstofly.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or (at
++ * your option) any later version.
++ */
++
++#include <linux/device.h>
++#include <asm/arch/iop321.h>
++
++void gpio_line_config(int line, int direction)
++{
++	unsigned long flags;
++
++	if (direction == GPIO_IN) {
++		*IOP321_GPOE |= 1 << line;
++	} else if (direction == GPIO_OUT) {
++		*IOP321_GPOE &= ~(1 << line);
++	}
++}
++EXPORT_SYMBOL(gpio_line_config);
++
++int gpio_line_get(int line)
++{
++	return !!(*IOP321_GPID & (1 << line));
++}
++EXPORT_SYMBOL(gpio_line_get);
++
++void gpio_line_set(int line, int value)
++{
++	unsigned long flags;
++
++	if (value == GPIO_LOW) {
++		*IOP321_GPOD &= ~(1 << line);
++	} else if (value == GPIO_HIGH) {
++		*IOP321_GPOD |= 1 << line;
++	}
++}
++EXPORT_SYMBOL(gpio_line_set);
+diff -urN a/arch/arm/mach-iop3xx/iop321-setup.c b/arch/arm/mach-iop3xx/iop321-setup.c
+--- a/arch/arm/mach-iop3xx/iop321-setup.c	2006-08-03 11:39:01.664742750 +0000
++++ b/arch/arm/mach-iop3xx/iop321-setup.c	2006-08-07 17:33:38.237095500 +0000
+@@ -75,7 +75,7 @@
+ 	}
+ };
+ 
+-static struct resource iop32x_i2c_0_resources[] = {
++struct resource iop32x_i2c_0_resources[] = {
+ 	[0] = {
+ 		.start = 0xfffff680,
+ 		.end = 0xfffff698,
+@@ -88,7 +88,7 @@
+ 	}
+ };
+ 
+-static struct resource iop32x_i2c_1_resources[] = {
++struct resource iop32x_i2c_1_resources[] = {
+ 	[0] = {
+ 		.start = 0xfffff6a0,
+ 		.end = 0xfffff6b8,
+@@ -101,14 +101,14 @@
+ 	}
+ };
+ 
+-static struct platform_device iop32x_i2c_0_controller = {
++struct platform_device iop32x_i2c_0_controller = {
+ 	.name = "IOP3xx-I2C",
+ 	.id = 0,
+ 	.num_resources = 2,
+ 	.resource = iop32x_i2c_0_resources
+ };
+ 
+-static struct platform_device iop32x_i2c_1_controller = {
++struct platform_device iop32x_i2c_1_controller = {
+ 	.name = "IOP3xx-I2C",
+ 	.id = 1,
+ 	.num_resources = 2,
+diff -urN a/arch/arm/mach-iop3xx/iop321-time.c b/arch/arm/mach-iop3xx/iop321-time.c
+--- a/arch/arm/mach-iop3xx/iop321-time.c	2006-08-03 11:39:01.664742750 +0000
++++ b/arch/arm/mach-iop3xx/iop321-time.c	2006-08-07 17:33:50.349852500 +0000
+@@ -28,6 +28,19 @@
+ 
+ #define IOP321_TIME_SYNC 0
+ 
++static unsigned long ticks_per_jiffy;
++static unsigned long ticks_per_usec;
++static unsigned long next_jiffy_time;
++
++unsigned long iop3xx_gettimeoffset(void)
++{
++	unsigned long offset;
++
++	offset = next_jiffy_time - *IOP321_TU_TCR1;
++
++	return offset / ticks_per_usec;
++}
++
+ static inline unsigned long get_elapsed(void)
+ {
+ 	return LATCH - *IOP321_TU_TCR0;
+@@ -65,6 +78,24 @@
+ }
+ 
+ static irqreturn_t
++iop3xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++{
++	write_seqlock(&xtime_lock);
++
++	asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));
++
++	while ((signed long)(next_jiffy_time - *IOP321_TU_TCR1)
++							>= ticks_per_jiffy) {
++		timer_tick(regs);
++		next_jiffy_time -= ticks_per_jiffy;
++	}
++
++	write_sequnlock(&xtime_lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t
+ iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+ {
+ 	u32 tisr;
+@@ -82,12 +113,41 @@
+ 	return IRQ_HANDLED;
+ }
+ 
++static struct irqaction iop3xx_timer_irq = {
++	.name		= "IOP3XX Timer Tick",
++	.handler	= iop3xx_timer_interrupt,
++	.flags		= SA_INTERRUPT | SA_TIMER,
++};
++
+ static struct irqaction iop321_timer_irq = {
+ 	.name		= "IOP321 Timer Tick",
+ 	.handler	= iop321_timer_interrupt,
+ 	.flags		= SA_INTERRUPT | SA_TIMER,
+ };
+ 
++void __init iop3xx_init_time(unsigned long tick_rate)
++{
++	u32 timer_ctl;
++
++	ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
++	ticks_per_usec = tick_rate / 1000000;
++	next_jiffy_time = 0xffffffff;
++
++	timer_ctl = IOP321_TMR_EN | IOP321_TMR_PRIVILEGED | IOP321_TMR_RELOAD |
++			IOP321_TMR_RATIO_1_1;
++
++	/*
++	* We use timer 0 for our timer interrupt, and timer 1 as
++	* monotonic counter for tracking missed jiffies.
++	*/
++	asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));
++	asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
++	asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));
++	asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));
++
++	setup_irq(IRQ_IOP321_TIMER0, &iop3xx_timer_irq);
++}
++
+ static void __init iop321_timer_init(void)
+ {
+ 	u32 timer_ctl;
+diff -urN a/include/asm-arm/arch-iop3xx/iop321.h b/include/asm-arm/arch-iop3xx/iop321.h
+--- a/include/asm-arm/arch-iop3xx/iop321.h	2006-08-03 11:39:08.109145500 +0000
++++ b/include/asm-arm/arch-iop3xx/iop321.h	2006-08-07 17:33:38.241095750 +0000
+@@ -232,6 +232,12 @@
+ #define IOP321_GPID       (volatile u32 *)IOP321_REG_ADDR(0x000007C8)
+ #define IOP321_GPOD       (volatile u32 *)IOP321_REG_ADDR(0x000007CC)
+ 
++#define GPIO_IN			0
++#define GPIO_OUT		1
++#define GPIO_LOW		0
++#define GPIO_HIGH		1
++#define IOP3XX_GPIO_LINE(x)	(x)
++
+ /* Interrupt Controller */
+ #define IOP321_INTCTL     (volatile u32 *)IOP321_REG_ADDR(0x000007D0)
+ #define IOP321_INTSTR     (volatile u32 *)IOP321_REG_ADDR(0x000007D4)
+@@ -340,6 +346,13 @@
+ extern void iop321_map_io(void);
+ extern void iop321_init_irq(void);
+ extern void iop321_time_init(void);
++extern unsigned long iop3xx_gettimeoffset(void);
++extern void iop3xx_init_time(unsigned long);
++extern struct platform_device iop32x_i2c_0_controller;
++extern struct platform_device iop32x_i2c_1_controller;
++extern void gpio_line_config(int line, int direction);
++extern int  gpio_line_get(int line);
++extern void gpio_line_set(int line, int value);
+ #endif
+ 
+ #endif // _IOP321_HW_H_
+

Added: dists/sid/linux-2.6/debian/patches/arm-iop-mtd-maps.patch
==============================================================================
--- (empty file)
+++ dists/sid/linux-2.6/debian/patches/arm-iop-mtd-maps.patch	Tue Aug  8 10:49:03 2006
@@ -0,0 +1,188 @@
+# Add an MTD maps for IOP3xx boards
+# Upstream status: can be solved in a better way as of 2.6.18
+
+diff -urN a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
+--- a/drivers/mtd/maps/Kconfig	2006-08-03 11:39:05.885006500 +0000
++++ b/drivers/mtd/maps/Kconfig	2006-08-07 17:19:06.190596000 +0000
+@@ -447,6 +447,14 @@
+ 	  21285 bridge used with Intel's StrongARM processors. More info at
+ 	  <http://www.intel.com/design/bridge/docs/21285_documentation.htm>.
+ 
++config MTD_IOP3XX
++	tristate "CFI Flash device mapped on the XScale IOP3XX board"
++	depends on ARM && MTD_CFI && ARCH_IOP3XX
++	help
++	  This enables access routines for the flash chips on the Intel XScale
++	  IOP3XX based evaluation board. If you have one of these boards and
++	  would like to use the flash chips on it, say 'Y'.
++
+ config MTD_IQ80310
+ 	tristate "CFI Flash device mapped on the XScale IQ80310 board"
+ 	depends on MTD_CFI && ARCH_IQ80310
+diff -urN a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
+--- a/drivers/mtd/maps/Makefile	2006-08-03 11:39:05.885006500 +0000
++++ b/drivers/mtd/maps/Makefile	2006-08-07 17:18:53.981833000 +0000
+@@ -15,7 +15,7 @@
+ obj-$(CONFIG_MTD_CSTM_MIPS_IXX)	+= cstm_mips_ixx.o
+ obj-$(CONFIG_MTD_DC21285)	+= dc21285.o
+ obj-$(CONFIG_MTD_DILNETPC)	+= dilnetpc.o
+-obj-$(CONFIG_MTD_IQ80310)	+= iq80310.o
++obj-$(CONFIG_MTD_IOP3XX)	+= iop3xx.o
+ obj-$(CONFIG_MTD_L440GX)	+= l440gx.o
+ obj-$(CONFIG_MTD_AMD76XROM)	+= amd76xrom.o
+ obj-$(CONFIG_MTD_ICHXROM)	+= ichxrom.o
+diff -urN a/drivers/mtd/maps/iop3xx.c b/drivers/mtd/maps/iop3xx.c
+--- a/drivers/mtd/maps/iop3xx.c	1970-01-01 00:00:00.000000000 +0000
++++ b/drivers/mtd/maps/iop3xx.c	2006-08-07 17:18:53.981833000 +0000
+@@ -0,0 +1,150 @@
++/*
++ * $Id: iop3xx.c,v 1.17 2003/06/23 11:48:18 dwmw2 Exp $
++ *
++ * Mapping for Intel XScale IOP3xx based platforms
++ *
++ * Author:	Nicolas Pitre
++ * Copyright:	(C) 2001-2003 MontaVista Software Inc.
++ * 
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * 09/03: Cleaned up to be generic to all IOP3xx systems - ds
++ *
++ * If you add a new machine type with a different WINDOW_SIZE or 
++ * physmap addr, just wrap the init in if(machine_is_X()) { }
++ * and make sure your board header gets included in 
++ * include/asm-arm/arch-iop3xx/hardware.h to pick up the definitions.
++ *
++ * DO NOT fill this file with #ifdef CONFIG_ARCH_XXXX crap.
++ */
++
++#include <linux/module.h>
++#include <linux/types.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <asm/io.h>
++#include <asm/mach-types.h>
++#include <asm/hardware.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/map.h>
++#include <linux/mtd/partitions.h>
++
++static struct mtd_info *mymtd;
++
++static struct map_info iop3xx_map = {
++	.name = "IOP3xx Flash",
++};
++
++static struct mtd_partition iop3xx_partitions[6] = {
++	{
++		.name =		"RedBoot",
++		.size =		0x00040000,
++		.offset =	0,
++	},{
++		.name =		"ramdisk",
++		.size =		0x00d00000,
++		.offset =	0x00040000,
++	},{
++		.name =		"kernel",
++		.size =		0x00160000,
++		.offset =	0x00d40000
++	},{
++		.name =		"user",
++		.size =		0x00120000,
++		.offset =	0x00ea0000
++	},{
++		.name =		"RedBoot config",
++		.size =		0x00020000,
++		.offset =	0x00fc0000,
++	//	.mask_flags =	MTD_WRITEABLE
++	},{ 
++                .name =         "FIS directory",
++                .size =         0x00020000,
++                .offset =       0x00fe0000
++        }
++};
++
++static struct mtd_info *mymtd;
++static struct mtd_partition *parsed_parts;
++static const char *probes[] = { "RedBoot", "cmdlinepart", NULL };
++
++static int __init init_iop3xx(void)
++{
++	struct mtd_partition *parts;
++	int nb_parts = 0;
++	int parsed_nr_parts = 0;
++	int ret;
++
++	if(machine_is_iq80321()) {
++		iop3xx_map.phys = IQ80321_FLASHBASE;
++		iop3xx_map.size = IQ80321_FLASHSIZE;
++		iop3xx_map.bankwidth = IQ80321_FLASHWIDTH;
++	} else if(machine_is_iq31244()) {
++		iop3xx_map.phys = IQ31244_FLASHBASE;
++		iop3xx_map.size = IQ31244_FLASHSIZE;
++		iop3xx_map.bankwidth = IQ31244_FLASHWIDTH;
++	} else if(machine_is_iq80331()) {
++		iop3xx_map.phys = IQ80331_FLASHBASE;
++		iop3xx_map.size = IQ80331_FLASHSIZE;
++		iop3xx_map.bankwidth = IQ80331_FLASHWIDTH;
++	} else if(machine_is_n2100()) {
++		iop3xx_map.phys = N2100_FLASHBASE;
++		iop3xx_map.size = N2100_FLASHSIZE;
++		iop3xx_map.bankwidth = N2100_FLASHWIDTH;
++	} else {
++		printk("Unknown IOP3xx platform - flash access disabled\n");
++		return -ENODEV;
++	}
++
++	iop3xx_map.virt = 
++		(unsigned long)ioremap(iop3xx_map.phys, iop3xx_map.size );
++	if (!iop3xx_map.virt) {
++		printk("Failed to ioremap\n");
++		return -EIO;
++	}
++	simple_map_init(&iop3xx_map);
++
++	mymtd = do_map_probe("cfi_probe", &iop3xx_map);
++	if (!mymtd) {
++		iounmap((void *)iop3xx_map.virt);
++		return -ENXIO;
++	}
++	mymtd->owner = THIS_MODULE;
++
++	ret = parse_mtd_partitions(mymtd, probes, &parsed_parts, 0);
++	ret=-1;
++	if (ret > 0)
++		parsed_nr_parts = ret;
++	if (parsed_nr_parts > 0) {
++		parts = parsed_parts;
++		nb_parts = parsed_nr_parts;
++	} else {
++		parts = iop3xx_partitions;
++		nb_parts = ARRAY_SIZE(iop3xx_partitions);
++	}
++	add_mtd_partitions(mymtd, parts, nb_parts);
++	return 0;
++}
++
++static void __exit cleanup_iop3xx(void)
++{
++	if (mymtd) {
++		del_mtd_partitions(mymtd);
++		map_destroy(mymtd);
++		if (parsed_parts)
++			kfree(parsed_parts);
++	}
++	if (iop3xx_map.virt)
++		iounmap((void *)iop3xx_map.virt);
++}
++
++module_init(init_iop3xx);
++module_exit(cleanup_iop3xx);
++
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Nicolas Pitre <nico at cam.org>");
++MODULE_DESCRIPTION("MTD map driver for Intel XScale IOP3xx Platforms");
+

Added: dists/sid/linux-2.6/debian/patches/arm-iop-n2100.patch
==============================================================================
--- (empty file)
+++ dists/sid/linux-2.6/debian/patches/arm-iop-n2100.patch	Tue Aug  8 10:49:03 2006
@@ -0,0 +1,350 @@
+# Backport of Thecus N2100 support
+# Upstream status: will go into 2.6.19
+
+diff -urN a/arch/arm/mach-iop3xx/Kconfig b/arch/arm/mach-iop3xx/Kconfig
+--- a/arch/arm/mach-iop3xx/Kconfig	2006-08-03 11:39:01.664742750 +0000
++++ b/arch/arm/mach-iop3xx/Kconfig	2006-08-03 13:49:30.197995500 +0000
+@@ -11,6 +11,12 @@
+ 	  Say Y here if you want to run your kernel on the Intel IQ80321
+ 	  evaluation kit for the IOP321 chipset.
+ 
++config MACH_N2100
++	bool "Enable support for the Thecus n2100"
++	help
++	  Say Y here if you want to run your kernel on the Thecus n2100
++	  NAS appliance.
++
+ config ARCH_IQ31244
+ 	bool "Enable support for IQ31244"
+ 	select ARCH_IOP321
+diff -urN a/arch/arm/mach-iop3xx/Makefile b/arch/arm/mach-iop3xx/Makefile
+--- a/arch/arm/mach-iop3xx/Makefile	2006-08-03 11:39:01.664742750 +0000
++++ b/arch/arm/mach-iop3xx/Makefile	2006-08-03 13:49:30.197995500 +0000
+@@ -21,3 +21,6 @@
+ obj-$(CONFIG_ARCH_IQ80331) += iq80331-mm.o iq80331-pci.o
+ 
+ obj-$(CONFIG_MACH_IQ80332) += iq80332-mm.o iq80332-pci.o
++
++obj-$(CONFIG_MACH_N2100) += n2100.o
++
+diff -urN a/arch/arm/mach-iop3xx/iop321-irq.c b/arch/arm/mach-iop3xx/iop321-irq.c
+--- a/arch/arm/mach-iop3xx/iop321-irq.c	2006-08-03 11:39:01.664742750 +0000
++++ b/arch/arm/mach-iop3xx/iop321-irq.c	2006-08-03 13:49:30.201995750 +0000
+@@ -82,7 +82,8 @@
+ 	intctl_write(0);		// disable all interrupts
+ 	intstr_write(0);		// treat all as IRQ
+ 	if(machine_is_iq80321() ||
+-	   machine_is_iq31244()) 	// all interrupts are inputs to chip
++	   machine_is_iq31244() ||
++	   machine_is_n2100())		// all interrupts are inputs to chip
+ 		*IOP321_PCIIRSR = 0x0f;
+ 
+ 	for(i = IOP321_IRQ_OFS; i < NR_IOP321_IRQS; i++)
+diff -urN a/arch/arm/mach-iop3xx/n2100.c b/arch/arm/mach-iop3xx/n2100.c
+--- a/arch/arm/mach-iop3xx/n2100.c	1970-01-01 00:00:00.000000000 +0000
++++ b/arch/arm/mach-iop3xx/n2100.c	2006-08-03 13:49:30.201995750 +0000
+@@ -0,0 +1,233 @@
++/*
++ * arch/arm/mach-iop32x/n2100.c
++ *
++ * Board support code the the Thecus N2100 platform.
++ *
++ * Author: Rory Bolt <rorybolt at pacbell.net>
++ * Copyright (C) 2002 Rory Bolt
++ * Copyright 2003 (c) MontaVista, Software, Inc.
++ * Copyright (C) 2004 Intel Corp.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/mm.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/kernel.h>
++#include <linux/pci.h>
++#include <linux/pm.h>
++#include <linux/string.h>
++#include <linux/slab.h>
++#include <linux/serial_core.h>
++#include <linux/serial_8250.h>
++#include <linux/mtd/physmap.h>
++#include <linux/platform_device.h>
++#include <linux/reboot.h>
++#include <asm/hardware.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/pci.h>
++#include <asm/mach/time.h>
++#include <asm/mach-types.h>
++#include <asm/page.h>
++#include <asm/pgtable.h>
++
++/*
++ * N2100 timer tick configuration.
++ */
++static void __init n2100_timer_init(void)
++{
++	/* 33.000 MHz crystal.  */
++	iop3xx_init_time(198000000);
++}
++
++static struct sys_timer n2100_timer = {
++	.init		= n2100_timer_init,
++	.offset		= iop3xx_gettimeoffset,
++};
++
++
++/*
++ * N2100 I/O.
++ */
++static struct map_desc n2100_io_desc[] __initdata = {
++	{	/* on-board devices */
++		.virtual	= N2100_UART,
++		.pfn		= __phys_to_pfn(N2100_UART),
++		.length		= 0x00100000,
++		.type		= MT_DEVICE
++	},
++};
++
++void __init n2100_map_io(void)
++{
++	iop321_map_io();
++	iotable_init(n2100_io_desc, ARRAY_SIZE(n2100_io_desc));
++}
++
++
++/*
++ * N2100 PCI.
++ */
++static inline int __init
++n2100_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
++{
++	int irq;
++
++	if (PCI_SLOT(dev->devfn) == 1) {
++		/* RTL8110SB #1 */
++		irq = IRQ_IOP321_XINT0;
++	} else if (PCI_SLOT(dev->devfn) == 2) {
++		/* RTL8110SB #2 */
++		irq = IRQ_IOP321_XINT1;
++	} else if (PCI_SLOT(dev->devfn) == 3) {
++		/* Sil3512 */
++		irq = IRQ_IOP321_XINT2;
++	} else if (PCI_SLOT(dev->devfn) == 4 && pin == 1) {
++		/* VT6212 INTA */
++		irq = IRQ_IOP321_XINT1;
++	} else if (PCI_SLOT(dev->devfn) == 4 && pin == 2) {
++		/* VT6212 INTB */
++		irq = IRQ_IOP321_XINT0;
++	} else if (PCI_SLOT(dev->devfn) == 4 && pin == 3) {
++		/* VT6212 INTC */
++		irq = IRQ_IOP321_XINT2;
++	} else if (PCI_SLOT(dev->devfn) == 5) {
++		/* Mini-PCI slot */
++		irq = IRQ_IOP321_XINT3;
++	} else {
++		printk(KERN_ERR "n2100_pci_map_irq() called for unknown "
++			"device PCI:%d:%d:%d\n", dev->bus->number,
++			PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
++		irq = -1;
++	}
++
++	return irq;
++}
++
++static int n2100_setup(int nr, struct pci_sys_data *sys)
++{
++	struct resource *res;
++
++	if(nr != 0)
++		return 0;
++
++	res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
++	if (!res)
++		panic("PCI: unable to alloc resources");
++
++	res[0].start = IOP321_PCI_LOWER_IO_VA;
++	res[0].end   = IOP321_PCI_UPPER_IO_VA;
++	res[0].name  = "N2100 PCI I/O Space";
++	res[0].flags = IORESOURCE_IO;
++	request_resource(&ioport_resource, &res[0]);
++
++	res[1].start = IOP321_PCI_LOWER_MEM_PA;
++	res[1].end   = IOP321_PCI_UPPER_MEM_PA;
++	res[1].name  = "N2100 PCI Memory Space";
++	res[1].flags = IORESOURCE_MEM;
++	request_resource(&iomem_resource, &res[1]);
++
++	sys->mem_offset = IOP321_PCI_MEM_OFFSET;
++	sys->io_offset  = IOP321_PCI_IO_OFFSET;
++
++	sys->resource[0] = &res[0];
++	sys->resource[1] = &res[1];
++	sys->resource[2] = NULL;
++
++	return 1;
++}
++
++static void n2100_preinit(void)
++{
++	iop321_init();
++}
++
++static struct hw_pci n2100_pci __initdata = {
++	.swizzle	= pci_std_swizzle,
++	.nr_controllers = 1,
++	.setup		= n2100_setup,
++	.scan		= iop321_scan_bus,
++	.preinit	= n2100_preinit,
++	.map_irq	= n2100_pci_map_irq,
++};
++
++static int __init n2100_pci_init(void)
++{
++	if (machine_is_n2100())
++		pci_common_init(&n2100_pci);
++
++	return 0;
++}
++
++subsys_initcall(n2100_pci_init);
++
++
++/*
++ * Pull PCA9532 GPIO #8 low to power off the machine.
++ */
++static void n2100_power_off(void)
++{
++	local_irq_disable();
++
++	/* Start condition, I2C address of PCA9532, write transaction.  */
++	*IOP321_IDBR0 = 0xc0;
++	*IOP321_ICR0 = 0xe9;
++	mdelay(1);
++
++	/* Write address 0x08.  */
++	*IOP321_IDBR0 = 0x08;
++	*IOP321_ICR0 = 0xe8;
++	mdelay(1);
++
++	/* Write data 0x01, stop condition.  */
++	*IOP321_IDBR0 = 0x01;
++	*IOP321_ICR0 = 0xea;
++
++	while (1)
++		;
++}
++
++
++static struct timer_list power_button_poll_timer;
++
++static void power_button_poll(unsigned long dummy)
++{
++	if (gpio_line_get(N2100_POWER_BUTTON) == 0) {
++		ctrl_alt_del();
++		return;
++	}
++
++	power_button_poll_timer.expires = jiffies + (HZ / 10);
++	add_timer(&power_button_poll_timer);
++}
++
++
++static void __init n2100_init_machine(void)
++{
++	platform_device_register(&iop32x_i2c_0_controller);
++
++	pm_power_off = n2100_power_off;
++
++	init_timer(&power_button_poll_timer);
++	power_button_poll_timer.function = power_button_poll;
++	power_button_poll_timer.expires = jiffies + (HZ / 10);
++	add_timer(&power_button_poll_timer);
++}
++
++MACHINE_START(N2100, "Thecus N2100")
++	/* Maintainer: Lennert Buytenhek <buytenh at wantstofly.org> */
++	.phys_io	= N2100_UART,
++	.io_pg_offst	= ((N2100_UART) >> 18) & 0xfffc,
++	.boot_params	= 0xa0000100,
++	.map_io		= n2100_map_io,
++	.init_irq	= iop321_init_irq,
++	.timer		= &n2100_timer,
++	.init_machine	= n2100_init_machine,
++MACHINE_END
+diff -urN a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
+--- a/arch/arm/tools/mach-types	2006-08-03 11:39:01.696744750 +0000
++++ b/arch/arm/tools/mach-types	2006-08-03 13:49:30.201995750 +0000
+@@ -1040,3 +1040,4 @@
+ ai2410			MACH_AI2410		AI2410			1027
+ ixp465			MACH_IXP465		IXP465			1028
+ balloon3		MACH_BALLOON3		BALLOON3		1029
++n2100			MACH_N2100		N2100			1101
+diff -urN a/include/asm-arm/arch-iop3xx/hardware.h b/include/asm-arm/arch-iop3xx/hardware.h
+--- a/include/asm-arm/arch-iop3xx/hardware.h	2006-08-03 11:39:08.109145500 +0000
++++ b/include/asm-arm/arch-iop3xx/hardware.h	2006-08-03 13:49:30.201995750 +0000
+@@ -53,5 +53,6 @@
+ #include "iq31244.h"
+ #include "iq80331.h"
+ #include "iq80332.h"
++#include "n2100.h"
+ 
+ #endif  /* _ASM_ARCH_HARDWARE_H */
+diff -urN a/include/asm-arm/arch-iop3xx/n2100.h b/include/asm-arm/arch-iop3xx/n2100.h
+--- a/include/asm-arm/arch-iop3xx/n2100.h	1970-01-01 00:00:00.000000000 +0000
++++ b/include/asm-arm/arch-iop3xx/n2100.h	2006-08-03 13:49:30.205996000 +0000
+@@ -0,0 +1,22 @@
++/*
++ * include/asm/arch-iop32x/n2100.h
++ *
++ * Thecus N2100 board registers
++ */
++
++#ifndef __N2100_H
++#define __N2100_H
++
++#define N2100_UART		0xfe800000	/* UART */
++
++#define N2100_FLASHBASE		0xf0000000
++#define N2100_FLASHSIZE		0x01000000
++#define N2100_FLASHWIDTH	2
++
++#define N2100_COPY_BUTTON	IOP3XX_GPIO_LINE(0)
++#define N2100_PCA9532_RESET	IOP3XX_GPIO_LINE(2)
++#define N2100_RESET_BUTTON	IOP3XX_GPIO_LINE(3)
++#define N2100_HARDWARE_RESET	IOP3XX_GPIO_LINE(4)
++#define N2100_POWER_BUTTON	IOP3XX_GPIO_LINE(5)
++
++#endif
+diff -urN a/include/asm-arm/arch-iop3xx/system.h b/include/asm-arm/arch-iop3xx/system.h
+--- a/include/asm-arm/arch-iop3xx/system.h	2006-08-03 11:39:08.133147000 +0000
++++ b/include/asm-arm/arch-iop3xx/system.h	2006-08-03 13:49:30.205996000 +0000
+@@ -8,6 +8,8 @@
+  * published by the Free Software Foundation.
+  */
+ 
++#include <asm/mach-types.h>
++
+ static inline void arch_idle(void)
+ {
+ 	cpu_do_idle();
+@@ -16,6 +18,14 @@
+ 
+ static inline void arch_reset(char mode)
+ {
++
++	if (machine_is_n2100()) {
++		gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
++		gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
++		while (1)
++			;
++}	
++
+ #ifdef CONFIG_ARCH_IOP321
+     *IOP321_PCSR = 0x30;
+ #endif

Modified: dists/sid/linux-2.6/debian/patches/series/6
==============================================================================
--- dists/sid/linux-2.6/debian/patches/series/6	(original)
+++ dists/sid/linux-2.6/debian/patches/series/6	Tue Aug  8 10:49:03 2006
@@ -1,3 +1,7 @@
 - budget-av-compile-fix.patch
 + 2.6.17.8
 + advansys_fdomain-pci-id-table.patch
++ arm-iop-fix-80219-detection.patch
++ arm-iop-generic-backport.patch
++ arm-iop-mtd-maps.patch
++ arm-iop-n2100.patch



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