[kernel] r13395 - in dists/trunk/linux-2.6/debian/patches: features/all series
Ben Hutchings
benh at alioth.debian.org
Sun Apr 12 04:24:31 UTC 2009
Author: benh
Date: Sun Apr 12 04:24:29 2009
New Revision: 13395
Log:
Update and reenable radeon request_firmware() patch
Modified:
dists/trunk/linux-2.6/debian/patches/features/all/drivers-gpu-drm-radeon-request_firmware.patch
dists/trunk/linux-2.6/debian/patches/series/base
Modified: dists/trunk/linux-2.6/debian/patches/features/all/drivers-gpu-drm-radeon-request_firmware.patch
==============================================================================
--- dists/trunk/linux-2.6/debian/patches/features/all/drivers-gpu-drm-radeon-request_firmware.patch Sun Apr 12 02:48:47 2009 (r13394)
+++ dists/trunk/linux-2.6/debian/patches/features/all/drivers-gpu-drm-radeon-request_firmware.patch Sun Apr 12 04:24:29 2009 (r13395)
@@ -1,14 +1,15 @@
-From 0c5cd2de22213db543529e803d0159a0e12ea7b6 Mon Sep 17 00:00:00 2001
+From fd63ae3af6c8ab1eeb658b501db2a5a593cdd353 Mon Sep 17 00:00:00 2001
From: Ben Hutchings <ben at decadent.org.uk>
-Date: Wed, 15 Oct 2008 01:29:35 +0100
+Date: Sun, 12 Apr 2009 04:56:11 +0100
Subject: [PATCH] radeon: Use request_firmware() to load CP microcode
Tested on Radeon 7500 (RV200) with and without firmware installed.
---
drivers/gpu/drm/Kconfig | 2 +-
- drivers/gpu/drm/radeon/radeon_cp.c | 115 +++++++++++++++++++++++------------
- drivers/gpu/drm/radeon/radeon_drv.h | 6 ++
- 3 files changed, 83 insertions(+), 40 deletions(-)
+ drivers/gpu/drm/radeon/r600_cp.c | 252 +++++++++++++++--------------------
+ drivers/gpu/drm/radeon/radeon_cp.c | 121 +++++++++++------
+ drivers/gpu/drm/radeon/radeon_drv.h | 5 +
+ 4 files changed, 188 insertions(+), 192 deletions(-)
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index b0414ee..fb97c8a 100644
@@ -23,11 +24,322 @@
help
Choose this option if you have an ATI Radeon graphics card. There
are both PCI and AGP versions. You don't need to choose this to
+diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
+index bc9d09d..4620b1b 100644
+--- a/drivers/gpu/drm/radeon/r600_cp.c
++++ b/drivers/gpu/drm/radeon/r600_cp.c
+@@ -31,7 +31,22 @@
+ #include "radeon_drm.h"
+ #include "radeon_drv.h"
+
+-#include "r600_microcode.h"
++#define PFP_UCODE_SIZE 576
++#define PM4_UCODE_SIZE 1792
++#define R700_PFP_UCODE_SIZE 848
++#define R700_PM4_UCODE_SIZE 1360
++
++/* Firmware Names */
++MODULE_FIRMWARE("radeon/R600_cp.bin");
++MODULE_FIRMWARE("radeon/RV610_cp.bin");
++MODULE_FIRMWARE("radeon/RV630_cp.bin");
++MODULE_FIRMWARE("radeon/RV620_cp.bin");
++MODULE_FIRMWARE("radeon/RV635_cp.bin");
++MODULE_FIRMWARE("radeon/RV670_cp.bin");
++MODULE_FIRMWARE("radeon/RS780_cp.bin");
++MODULE_FIRMWARE("radeon/RV770_cp.bin");
++MODULE_FIRMWARE("radeon/RV730_cp.bin");
++MODULE_FIRMWARE("radeon/RV710_cp.bin");
+
+ # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
+ # define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
+@@ -275,11 +290,68 @@ static void r600_vm_init(struct drm_device *dev)
+ r600_vm_flush_gart_range(dev);
+ }
+
+-/* load r600 microcode */
++static int r600_cp_init_microcode(drm_radeon_private_t *dev_priv)
++{
++ struct platform_device *pdev;
++ const char *chip_name;
++ size_t required_size;
++ char fw_name[30];
++ int err;
++
++ pdev = platform_device_register_simple("r600_cp", 0, NULL, 0);
++ err = IS_ERR(pdev);
++ if (err) {
++ printk(KERN_ERR "r600_cp: Failed to register firmware\n");
++ return -EINVAL;
++ }
++
++ switch (dev_priv->flags & RADEON_FAMILY_MASK) {
++ case CHIP_R600: chip_name = "R600"; break;
++ case CHIP_RV610: chip_name = "RV610"; break;
++ case CHIP_RV630: chip_name = "RV630"; break;
++ case CHIP_RV620: chip_name = "RV620"; break;
++ case CHIP_RV635: chip_name = "RV635"; break;
++ case CHIP_RV670: chip_name = "RV670"; break;
++ case CHIP_RS780: chip_name = "RS780"; break;
++ case CHIP_RV770: chip_name = "RV770"; break;
++ case CHIP_RV730: chip_name = "RV730"; break;
++ case CHIP_RV710: chip_name = "RV710"; break;
++ default: BUG();
++ }
++
++ if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
++ required_size = (R700_PM4_UCODE_SIZE * 4 +
++ R700_PFP_UCODE_SIZE * 4);
++ else
++ required_size = PM4_UCODE_SIZE * 12 + PFP_UCODE_SIZE * 4;
++
++ DRM_INFO("Loading %s CP Microcode\n", chip_name);
++ snprintf(fw_name, sizeof(fw_name), "radeon/%s_cp.bin", chip_name);
++
++ err = request_firmware(&dev_priv->fw, fw_name, &pdev->dev);
++ platform_device_unregister(pdev);
++ if (err) {
++ printk(KERN_ERR "r600_cp: Failed to load firmware \"%s\"\n",
++ fw_name);
++ } else if (dev_priv->fw->size != required_size) {
++ printk(KERN_ERR
++ "r600_cp: Bogus length %zu in firmware \"%s\"\n",
++ dev_priv->fw->size, fw_name);
++ err = -EINVAL;
++ release_firmware(dev_priv->fw);
++ dev_priv->fw = NULL;
++ }
++ return err;
++}
++
+ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
+ {
++ const __be32 *fw_data;
+ int i;
+
++ if (!dev_priv->fw)
++ return;
++
+ r600_do_cp_stop(dev_priv);
+
+ RADEON_WRITE(R600_CP_RB_CNTL,
+@@ -292,114 +364,18 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
+ DRM_UDELAY(15000);
+ RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
+
+- RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+-
+- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R600)) {
+- DRM_INFO("Loading R600 CP Microcode\n");
+- for (i = 0; i < PM4_UCODE_SIZE; i++) {
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- R600_cp_microcode[i][0]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- R600_cp_microcode[i][1]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- R600_cp_microcode[i][2]);
+- }
+-
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading R600 PFP Microcode\n");
+- for (i = 0; i < PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, R600_pfp_microcode[i]);
+- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610)) {
+- DRM_INFO("Loading RV610 CP Microcode\n");
+- for (i = 0; i < PM4_UCODE_SIZE; i++) {
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV610_cp_microcode[i][0]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV610_cp_microcode[i][1]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV610_cp_microcode[i][2]);
+- }
+-
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RV610 PFP Microcode\n");
+- for (i = 0; i < PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV610_pfp_microcode[i]);
+- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630)) {
+- DRM_INFO("Loading RV630 CP Microcode\n");
+- for (i = 0; i < PM4_UCODE_SIZE; i++) {
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV630_cp_microcode[i][0]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV630_cp_microcode[i][1]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV630_cp_microcode[i][2]);
+- }
+-
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RV630 PFP Microcode\n");
+- for (i = 0; i < PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV630_pfp_microcode[i]);
+- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620)) {
+- DRM_INFO("Loading RV620 CP Microcode\n");
+- for (i = 0; i < PM4_UCODE_SIZE; i++) {
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV620_cp_microcode[i][0]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV620_cp_microcode[i][1]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV620_cp_microcode[i][2]);
+- }
+-
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RV620 PFP Microcode\n");
+- for (i = 0; i < PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV620_pfp_microcode[i]);
+- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV635)) {
+- DRM_INFO("Loading RV635 CP Microcode\n");
+- for (i = 0; i < PM4_UCODE_SIZE; i++) {
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV635_cp_microcode[i][0]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV635_cp_microcode[i][1]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV635_cp_microcode[i][2]);
+- }
++ fw_data = (const __be32 *)dev_priv->fw->data;
+
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RV635 PFP Microcode\n");
+- for (i = 0; i < PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV635_pfp_microcode[i]);
+- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV670)) {
+- DRM_INFO("Loading RV670 CP Microcode\n");
+- for (i = 0; i < PM4_UCODE_SIZE; i++) {
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV670_cp_microcode[i][0]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV670_cp_microcode[i][1]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RV670_cp_microcode[i][2]);
+- }
++ RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
++ for (i = 0; i < PM4_UCODE_SIZE * 3; i++)
++ RADEON_WRITE(R600_CP_ME_RAM_DATA,
++ be32_to_cpup(fw_data++));
+
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RV670 PFP Microcode\n");
+- for (i = 0; i < PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]);
+- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
+- DRM_INFO("Loading RS780 CP Microcode\n");
+- for (i = 0; i < PM4_UCODE_SIZE; i++) {
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RS780_cp_microcode[i][0]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RS780_cp_microcode[i][1]);
+- RADEON_WRITE(R600_CP_ME_RAM_DATA,
+- RS780_cp_microcode[i][2]);
+- }
++ RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
++ for (i = 0; i < PFP_UCODE_SIZE; i++)
++ RADEON_WRITE(R600_CP_PFP_UCODE_DATA,
++ be32_to_cpup(fw_data++));
+
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RS780 PFP Microcode\n");
+- for (i = 0; i < PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]);
+- }
+ RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+ RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+ RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0);
+@@ -458,11 +434,14 @@ static void r700_vm_init(struct drm_device *dev)
+ r600_vm_flush_gart_range(dev);
+ }
+
+-/* load r600 microcode */
+ static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv)
+ {
++ const __be32 *fw_data;
+ int i;
+
++ if (!dev_priv->fw)
++ return;
++
+ r600_do_cp_stop(dev_priv);
+
+ RADEON_WRITE(R600_CP_RB_CNTL,
+@@ -475,47 +454,18 @@ static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv)
+ DRM_UDELAY(15000);
+ RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
+
++ fw_data = (const __be32 *)dev_priv->fw->data + R700_PM4_UCODE_SIZE;
++ RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
++ for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
++ RADEON_WRITE(R600_CP_PFP_UCODE_DATA, be32_to_cpup(fw_data++));
++ RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+
+- if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV770)) {
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RV770 PFP Microcode\n");
+- for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV770_pfp_microcode[i]);
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+-
+- RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+- DRM_INFO("Loading RV770 CP Microcode\n");
+- for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_ME_RAM_DATA, RV770_cp_microcode[i]);
+- RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+-
+- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV730)) {
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RV730 PFP Microcode\n");
+- for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV730_pfp_microcode[i]);
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+-
+- RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+- DRM_INFO("Loading RV730 CP Microcode\n");
+- for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_ME_RAM_DATA, RV730_cp_microcode[i]);
+- RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+-
+- } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV710)) {
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+- DRM_INFO("Loading RV710 PFP Microcode\n");
+- for (i = 0; i < R700_PFP_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV710_pfp_microcode[i]);
+- RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+-
+- RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+- DRM_INFO("Loading RV710 CP Microcode\n");
+- for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
+- RADEON_WRITE(R600_CP_ME_RAM_DATA, RV710_cp_microcode[i]);
+- RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
++ fw_data = (const __be32 *)dev_priv->fw->data;
++ RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
++ for (i = 0; i < R700_PM4_UCODE_SIZE; i++)
++ RADEON_WRITE(R600_CP_ME_RAM_DATA, be32_to_cpup(fw_data++));
++ RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+
+- }
+ RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
+ RADEON_WRITE(R600_CP_ME_RAM_WADDR, 0);
+ RADEON_WRITE(R600_CP_ME_RAM_RADDR, 0);
+@@ -2107,6 +2057,14 @@ int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
+ r600_vm_init(dev);
+ }
+
++ if (!dev_priv->fw) {
++ int err = r600_cp_init_microcode(dev_priv);
++ if (err) {
++ DRM_ERROR("Failed to load firmware!\n");
++ r600_do_cleanup_cp(dev);
++ return err;
++ }
++ }
+ if (((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770))
+ r700_cp_load_microcode(dev_priv);
+ else
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
-index 92965db..efe6e59 100644
+index 77a7a4d..e9894ac 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
-@@ -36,10 +36,23 @@
+@@ -36,10 +36,25 @@
#include "radeon_drv.h"
#include "r300_reg.h"
@@ -41,6 +353,7 @@
+#define FIRMWARE_R300 "radeon/R300_cp.bin"
+#define FIRMWARE_R420 "radeon/R420_cp.bin"
+#define FIRMWARE_RS690 "radeon/RS690_cp.bin"
++#define FIRMWARE_RS600 "radeon/RS600_cp.bin"
+#define FIRMWARE_R520 "radeon/R520_cp.bin"
+
+MODULE_FIRMWARE(FIRMWARE_R100);
@@ -48,12 +361,13 @@
+MODULE_FIRMWARE(FIRMWARE_R300);
+MODULE_FIRMWARE(FIRMWARE_R420);
+MODULE_FIRMWARE(FIRMWARE_RS690);
++MODULE_FIRMWARE(FIRMWARE_RS600);
+MODULE_FIRMWARE(FIRMWARE_R520);
+
static int radeon_do_cleanup_cp(struct drm_device * dev);
static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
-@@ -319,37 +332,34 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
+@@ -451,37 +466,34 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
*/
/* Load the microcode for the CP */
@@ -104,7 +418,7 @@
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV350) ||
-@@ -357,31 +367,16 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
+@@ -489,39 +501,19 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
DRM_INFO("Loading R300 Microcode\n");
@@ -136,14 +450,22 @@
- RS690_cp_microcode[i][0]);
- }
+ fw_name = FIRMWARE_RS690;
+ } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
+ DRM_INFO("Loading RS600 Microcode\n");
+- for (i = 0; i < 256; i++) {
+- RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
+- RS600_cp_microcode[i][1]);
+- RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
+- RS600_cp_microcode[i][0]);
+- }
++ fw_name = FIRMWARE_RS600;
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) ||
-@@ -389,11 +384,41 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
+@@ -529,11 +521,40 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV560) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV570)) {
DRM_INFO("Loading R500 Microcode\n");
-- for (i = 0; i < 256; i++) {
+ fw_name = FIRMWARE_R520;
+ }
+
@@ -152,7 +474,7 @@
+ if (err) {
+ printk(KERN_ERR "radeon_cp: Failed to load firmware \"%s\"\n",
+ fw_name);
-+ } else if (dev_priv->fw->size % 8) {
++ } else if (dev_priv->fw->size != 256 * 8) {
+ printk(KERN_ERR
+ "radeon_cp: Bogus length %zu in firmware \"%s\"\n",
+ dev_priv->fw->size, fw_name);
@@ -166,25 +488,24 @@
+static void radeon_cp_load_microcode(drm_radeon_private_t *dev_priv)
+{
+ const __be32 *fw_data;
-+ int i, size;
++ int i;
+
+ radeon_do_wait_for_idle(dev_priv);
+
+ if (dev_priv->fw) {
-+ size = dev_priv->fw->size / 4;
+ fw_data = (const __be32 *)&dev_priv->fw->data[0];
+ RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0);
-+ for (i = 0; i < size; i += 2) {
+ for (i = 0; i < 256; i++) {
RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
- R520_cp_microcode[i][1]);
-+ be32_to_cpup(&fw_data[i]));
++ be32_to_cpup(fw_data++));
RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
- R520_cp_microcode[i][0]);
-+ be32_to_cpup(&fw_data[i + 1]));
++ be32_to_cpup(fw_data++));
}
}
}
-@@ -1224,6 +1249,14 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
+@@ -1486,6 +1507,14 @@ static int radeon_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init,
radeon_set_pcigart(dev_priv, 1);
}
@@ -199,10 +520,10 @@
radeon_cp_load_microcode(dev_priv);
radeon_cp_init_ring_buffer(dev, dev_priv, file_priv);
-@@ -1450,6 +1483,10 @@ void radeon_do_release(struct drm_device * dev)
-
- /* deallocate kernel resources */
- radeon_do_cleanup_cp(dev);
+@@ -1755,6 +1784,10 @@ void radeon_do_release(struct drm_device * dev)
+ r600_do_cleanup_cp(dev);
+ else
+ radeon_do_cleanup_cp(dev);
+ if (dev_priv->fw) {
+ release_firmware(dev_priv->fw);
+ dev_priv->fw = NULL;
@@ -211,7 +532,7 @@
}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
-index 490bc7c..046343f 100644
+index ed4d27e..829eefa 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -31,6 +31,9 @@
@@ -224,16 +545,15 @@
/* General customization:
*/
-@@ -321,6 +324,9 @@ typedef struct drm_radeon_private {
- int num_gb_pipes;
- int track_flush;
- drm_local_map_t *mmio;
-+
+@@ -348,6 +351,8 @@ typedef struct drm_radeon_private {
+ int r700_sc_hiz_tile_fifo_size;
+ int r700_sc_earlyz_tile_fifo_fize;
+
+ /* firmware */
+ const struct firmware *fw;
} drm_radeon_private_t;
typedef struct drm_radeon_buf_priv {
--
-1.6.1.3
+1.5.6.5
Modified: dists/trunk/linux-2.6/debian/patches/series/base
==============================================================================
--- dists/trunk/linux-2.6/debian/patches/series/base Sun Apr 12 02:48:47 2009 (r13394)
+++ dists/trunk/linux-2.6/debian/patches/series/base Sun Apr 12 04:24:29 2009 (r13395)
@@ -8,8 +8,7 @@
+ features/all/drivers-gpu-drm-mga-request_firmware.patch
+ features/all/drivers-gpu-drm-r128-request_firmware.patch
-# FIXME:
-#+ features/all/drivers-gpu-drm-radeon-request_firmware.patch
++ features/all/drivers-gpu-drm-radeon-request_firmware.patch
# rt2860sta needs ITU-T CRC on bit-reversed data
+ features/all/lib-crcitut-bit-reversed.patch
+ features/all/drivers-staging-rt2860sta-request_firmware.patch
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