[kernel] r16020 - in dists/sid/linux-2.6/debian: . patches/bugfix/x86 patches/series
Ben Hutchings
benh at alioth.debian.org
Sun Jul 25 02:39:52 UTC 2010
Author: benh
Date: Sun Jul 25 02:39:49 2010
New Revision: 16020
Log:
drm/i915: Enable low-power render writes on GEN3 hardware (Closes: #590193)
Added:
dists/sid/linux-2.6/debian/patches/bugfix/x86/drm-i915-Define-MI_ARB_STATE-bits.patch
dists/sid/linux-2.6/debian/patches/bugfix/x86/drm-i915-enable-low-power-render-writes-on-GEN3-hard.patch
Modified:
dists/sid/linux-2.6/debian/changelog
dists/sid/linux-2.6/debian/patches/series/19
Modified: dists/sid/linux-2.6/debian/changelog
==============================================================================
--- dists/sid/linux-2.6/debian/changelog Sun Jul 25 02:18:16 2010 (r16019)
+++ dists/sid/linux-2.6/debian/changelog Sun Jul 25 02:39:49 2010 (r16020)
@@ -6,6 +6,8 @@
[ Ben Hutchings ]
* linux-base: Remove dependency on libapt-pkg-perl (Closes: #589996)
+ * drm/i915: Enable low-power render writes on GEN3 hardware (915, 945,
+ G33 and Atom "Pineview") (Closes: #590193, maybe others)
-- Ben Hutchings <ben at decadent.org.uk> Sat, 24 Jul 2010 00:41:51 +0100
Added: dists/sid/linux-2.6/debian/patches/bugfix/x86/drm-i915-Define-MI_ARB_STATE-bits.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux-2.6/debian/patches/bugfix/x86/drm-i915-Define-MI_ARB_STATE-bits.patch Sun Jul 25 02:39:49 2010 (r16020)
@@ -0,0 +1,95 @@
+From f2a5a8fc1794ff6f28a6b5b58d3f647bbeb0b4f6 Mon Sep 17 00:00:00 2001
+From: Keith Packard <keithp at keithp.com>
+Date: Mon, 19 Jul 2010 21:12:35 -0700
+Subject: [PATCH 1/2] drm/i915: Define MI_ARB_STATE bits
+
+commit 45503ded966c98e604c9667c0b458d40666b9ef3 upstream.
+
+The i915 memory arbiter has a register full of configuration
+bits which are currently not defined in the driver header file.
+
+Signed-off-by: Keith Packard <keithp at keithp.com>
+cc: stable at kernel.org
+Signed-off-by: Dave Airlie <airlied at redhat.com>
+---
+ drivers/gpu/drm/i915/i915_reg.h | 64 +++++++++++++++++++++++++++++++++++++++
+ 1 files changed, 64 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
+index 30a2322..635d349 100644
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -326,6 +326,70 @@
+ #define LM_BURST_LENGTH 0x00000700
+ #define LM_FIFO_WATERMARK 0x0000001F
+ #define MI_ARB_STATE 0x020e4 /* 915+ only */
++#define MI_ARB_MASK_SHIFT 16 /* shift for enable bits */
++
++/* Make render/texture TLB fetches lower priorty than associated data
++ * fetches. This is not turned on by default
++ */
++#define MI_ARB_RENDER_TLB_LOW_PRIORITY (1 << 15)
++
++/* Isoch request wait on GTT enable (Display A/B/C streams).
++ * Make isoch requests stall on the TLB update. May cause
++ * display underruns (test mode only)
++ */
++#define MI_ARB_ISOCH_WAIT_GTT (1 << 14)
++
++/* Block grant count for isoch requests when block count is
++ * set to a finite value.
++ */
++#define MI_ARB_BLOCK_GRANT_MASK (3 << 12)
++#define MI_ARB_BLOCK_GRANT_8 (0 << 12) /* for 3 display planes */
++#define MI_ARB_BLOCK_GRANT_4 (1 << 12) /* for 2 display planes */
++#define MI_ARB_BLOCK_GRANT_2 (2 << 12) /* for 1 display plane */
++#define MI_ARB_BLOCK_GRANT_0 (3 << 12) /* don't use */
++
++/* Enable render writes to complete in C2/C3/C4 power states.
++ * If this isn't enabled, render writes are prevented in low
++ * power states. That seems bad to me.
++ */
++#define MI_ARB_C3_LP_WRITE_ENABLE (1 << 11)
++
++/* This acknowledges an async flip immediately instead
++ * of waiting for 2TLB fetches.
++ */
++#define MI_ARB_ASYNC_FLIP_ACK_IMMEDIATE (1 << 10)
++
++/* Enables non-sequential data reads through arbiter
++ */
++#define MI_ARB_DUAL_DATA_PHASE_DISABLE (1 << 9)
++
++/* Disable FSB snooping of cacheable write cycles from binner/render
++ * command stream
++ */
++#define MI_ARB_CACHE_SNOOP_DISABLE (1 << 8)
++
++/* Arbiter time slice for non-isoch streams */
++#define MI_ARB_TIME_SLICE_MASK (7 << 5)
++#define MI_ARB_TIME_SLICE_1 (0 << 5)
++#define MI_ARB_TIME_SLICE_2 (1 << 5)
++#define MI_ARB_TIME_SLICE_4 (2 << 5)
++#define MI_ARB_TIME_SLICE_6 (3 << 5)
++#define MI_ARB_TIME_SLICE_8 (4 << 5)
++#define MI_ARB_TIME_SLICE_10 (5 << 5)
++#define MI_ARB_TIME_SLICE_14 (6 << 5)
++#define MI_ARB_TIME_SLICE_16 (7 << 5)
++
++/* Low priority grace period page size */
++#define MI_ARB_LOW_PRIORITY_GRACE_4KB (0 << 4) /* default */
++#define MI_ARB_LOW_PRIORITY_GRACE_8KB (1 << 4)
++
++/* Disable display A/B trickle feed */
++#define MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE (1 << 2)
++
++/* Set display plane priority */
++#define MI_ARB_DISPLAY_PRIORITY_A_B (0 << 0) /* display A > display B */
++#define MI_ARB_DISPLAY_PRIORITY_B_A (1 << 0) /* display B > display A */
++
+ #define CACHE_MODE_0 0x02120 /* 915+ only */
+ #define CM0_MASK_SHIFT 16
+ #define CM0_IZ_OPT_DISABLE (1<<6)
+--
+1.7.1
+
Added: dists/sid/linux-2.6/debian/patches/bugfix/x86/drm-i915-enable-low-power-render-writes-on-GEN3-hard.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux-2.6/debian/patches/bugfix/x86/drm-i915-enable-low-power-render-writes-on-GEN3-hard.patch Sun Jul 25 02:39:49 2010 (r16020)
@@ -0,0 +1,56 @@
+From 075ba085f92dd92bc8631def439dd4c2e1c5f841 Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied at redhat.com>
+Date: Tue, 20 Jul 2010 13:15:31 +1000
+Subject: [PATCH 2/2] drm/i915: enable low power render writes on GEN3 hardware.
+
+commit 944001201ca0196bcdb088129e5866a9f379d08c upstream.
+
+A lot of 945GMs have had stability issues for a long time, this manifested as X hangs, blitter engine hangs, and lots of crashes.
+
+one such report is at:
+https://bugs.freedesktop.org/show_bug.cgi?id=20560
+
+along with numerous distro bugzillas.
+
+This only took a week of digging and hair ripping to figure out.
+
+Tracked down and tested on a 945GM Lenovo T60,
+previously running
+x11perf -copypixwin500
+or
+x11perf -copywinpix500
+repeatedly would cause the GPU to wedge within 4 or 5 tries, with random busy bits set.
+
+After this patch no hangs were observed.
+
+cc: stable at kernel.org
+Signed-off-by: Dave Airlie <airlied at redhat.com>
+[bwh: Adjust context for Debian's 2.6.32]
+---
+ drivers/gpu/drm/i915/i915_gem.c | 10 ++++++++++
+ 1 files changed, 10 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
+index 552bb60..8a41c4e 100644
+--- a/drivers/gpu/drm/i915/i915_gem.c
++++ b/drivers/gpu/drm/i915/i915_gem.c
+@@ -4999,6 +4999,16 @@ i915_gem_load(struct drm_device *dev)
+ list_add(&dev_priv->mm.shrink_list, &shrink_list);
+ spin_unlock(&shrink_list_lock);
+
++ /* On GEN3 we really need to make sure the ARB C3 LP bit is set */
++ if (IS_GEN3(dev)) {
++ u32 tmp = I915_READ(MI_ARB_STATE);
++ if (!(tmp & MI_ARB_C3_LP_WRITE_ENABLE)) {
++ /* arb state is a masked write, so set bit + bit in mask */
++ tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE << MI_ARB_MASK_SHIFT);
++ I915_WRITE(MI_ARB_STATE, tmp);
++ }
++ }
++
+ /* Old X drivers will take 0-2 for front, back, depth buffers */
+ dev_priv->fence_reg_start = 3;
+
+--
+1.7.1
+
Modified: dists/sid/linux-2.6/debian/patches/series/19
==============================================================================
--- dists/sid/linux-2.6/debian/patches/series/19 Sun Jul 25 02:18:16 2010 (r16019)
+++ dists/sid/linux-2.6/debian/patches/series/19 Sun Jul 25 02:39:49 2010 (r16020)
@@ -1,2 +1,4 @@
+ bugfix/all/inotify-fix-inotify-oneshot-support.patch
+ bugfix/all/inotify-send-IN_UNMOUNT-events.patch
++ bugfix/x86/drm-i915-Define-MI_ARB_STATE-bits.patch
++ bugfix/x86/drm-i915-enable-low-power-render-writes-on-GEN3-hard.patch
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