[kernel] r15638 - in dists/lenny-security/linux-2.6: . debian debian/config debian/patches/bugfix/all debian/patches/bugfix/x86 debian/patches/features/all debian/patches/features/all/openvz debian/patches/features/all/xen debian/patches/series debian/templates/temp.image.plain
Dann Frazier
dannf at alioth.debian.org
Fri May 7 16:45:22 UTC 2010
Author: dannf
Date: Fri May 7 16:45:16 2010
New Revision: 15638
Log:
merge in 2.6.26-22; its had plenty of bake-time in p-u
Added:
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/ALSA-cs4232-fix-crash-during-chip-PNP-detection.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/ALSA-cs4232-fix-crash-during-chip-PNP-detection.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Allow-phy-reset-to-be-skipped-during-chip-reset.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Allow-phy-reset-to-be-skipped-during-chip-reset.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Fix-panic-in-bnx2_poll_work.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Fix-panic-in-bnx2_poll_work.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Prevent-ethtool-s-from-crashing-when-device-is-down.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Prevent-ethtool-s-from-crashing-when-device-is-down.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/dmfe-tulip-Let-dmfe-handle-DM910x-except-SPARC-onboard.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/dmfe-tulip-Let-dmfe-handle-DM910x-except-SPARC-onboard.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/fix-braindamage-in-audit_tree.c-untag_chunk.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/fix-braindamage-in-audit_tree.c-untag_chunk.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/fix-more-leaks-in-audit_tree.c-tag_chunk.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/fix-more-leaks-in-audit_tree.c-tag_chunk.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/ipv6-fix-pending-dad.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/ipv6-fix-pending-dad.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/matroxfb-fix-problems-with-display-stability.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/matroxfb-fix-problems-with-display-stability.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/megaraid_sas-add-readl-to-force-PCI-posting-flush.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/megaraid_sas-add-readl-to-force-PCI-posting-flush.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/megaraid_sas-add-the-shutdown-DCMD-cmd.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/megaraid_sas-add-the-shutdown-DCMD-cmd.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/qla2xxx-disable-broken-msi.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/qla2xxx-disable-broken-msi.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/saa7134-fix-deadlock.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/saa7134-fix-deadlock.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/via-velocity-give-rx-descriptors-later.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/via-velocity-give-rx-descriptors-later.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/via-velocity-move-residual-free-rx-descriptors-count.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/via-velocity-move-residual-free-rx-descriptors-count.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/x86-Increase-MIN_GAP-to-include-randomized-stack.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/x86-Increase-MIN_GAP-to-include-randomized-stack.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/all/yealink-reliably-kill-urbs.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/yealink-reliably-kill-urbs.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-X86_FEATURE_HYPERVISOR-feature-bit.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-X86_FEATURE_HYPERVISOR-feature-bit.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-a-synthetic-TSC_RELIABLE-feature-bit.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-a-synthetic-TSC_RELIABLE-feature-bit.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-a-synthetic-TS_RELIABLE-feature-bit.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-a-synthetic-TS_RELIABLE-feature-bit.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/fix-vmi-clocksource.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/fix-vmi-clocksource.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/hypervisor-detection-and-get-tsc_freq-from-hypervisor.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/hypervisor-detection-and-get-tsc_freq-from-hypervisor.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/skip-verification-by-the-watchdog-for-TSC-clocksource.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/skip-verification-by-the-watchdog-for-TSC-clocksource.patch
dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/vmware-look-for-DMI-string-in-product-serial-key.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/vmware-look-for-DMI-string-in-product-serial-key.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/add-be2net.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/add-be2net.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/ata-piix-add-intel-pci-ids.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/ata-piix-add-intel-pci-ids.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-add.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-add.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-backport.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-backport.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-kbuild.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-kbuild.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716S.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716S.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/megaraid_sas-add-new-controllers-0x78-0x79.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/megaraid_sas-add-new-controllers-0x78-0x79.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0080-Endless-loop-in-__sk_stream_wait_memory.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0080-Endless-loop-in-__sk_stream_wait_memory.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0087-cpt-dump-inode-content-for-shm_file_operations.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0087-cpt-dump-inode-content-for-shm_file_operations.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0088-cfq-unlink-queues-at-bc-destroy.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0088-cfq-unlink-queues-at-bc-destroy.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0089-inotify-unblock-umounting.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0089-inotify-unblock-umounting.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/xen/add-x86-hyper-vendor-defines.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/xen/add-x86-hyper-vendor-defines.patch
dists/lenny-security/linux-2.6/debian/patches/features/all/xen/xen-fix-msi-hypercall.patch
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/xen/xen-fix-msi-hypercall.patch
dists/lenny-security/linux-2.6/debian/patches/series/22
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/series/22
dists/lenny-security/linux-2.6/debian/patches/series/22-extra
- copied unchanged from r15629, releases/linux-2.6/2.6.26-22/debian/patches/series/22-extra
dists/lenny-security/linux-2.6/debian/patches/series/22lenny1
- copied unchanged from r15626, dists/lenny-security/linux-2.6/debian/patches/series/21lenny5
Deleted:
dists/lenny-security/linux-2.6/debian/patches/series/21lenny5
Modified:
dists/lenny-security/linux-2.6/ (props changed)
dists/lenny-security/linux-2.6/debian/changelog
dists/lenny-security/linux-2.6/debian/config/config
dists/lenny-security/linux-2.6/debian/config/defines
dists/lenny-security/linux-2.6/debian/templates/temp.image.plain/postinst
Modified: dists/lenny-security/linux-2.6/debian/changelog
==============================================================================
--- dists/lenny-security/linux-2.6/debian/changelog Fri May 7 15:48:22 2010 (r15637)
+++ dists/lenny-security/linux-2.6/debian/changelog Fri May 7 16:45:16 2010 (r15638)
@@ -1,4 +1,4 @@
-linux-2.6 (2.6.26-21lenny5) UNRELEASED; urgency=high
+linux-2.6 (2.6.26-22lenny1) UNRELEASED; urgency=high
[ dann frazier ]
* USB: usbfs: only copy the actual data received (CVE-2010-1083)
@@ -20,7 +20,60 @@
* r8169: Increase default RX buffer size to avoid RX scattering bug
(CVE-2009-4537)
- -- dann frazier <dannf at debian.org> Wed, 21 Apr 2010 22:37:06 -0600
+ -- dann frazier <dannf at debian.org> Wed, 05 May 2010 18:00:36 -0600
+
+linux-2.6 (2.6.26-22) stable; urgency=high
+
+ [ maximilian attems ]
+ * [openvz] 1f7db8e checkpointing shared memory fails. (closes: #562891)
+ * [openvz] 1a6d795 Fix cfq related oops. (closes: #562892)
+ * [openvz] ddbec37 inotify: unblock umounting. (closes: #513537)
+ * ALSA: cs4232: fix crash during chip PNP detection. (closes: #529697)
+ * matroxfb: fix problems with display stability. (closes: #479652)
+ * [openvz] [UBC]: Endless loop in __sk_stream_wait_memory.
+ (closes: #542633)
+
+ [ Moritz Muehlenhoff ]
+ * Fix deadlock in saa7134-empress driver (Closes: #499671)
+ * x86, vmi: TSC going backwards check in vmi clocksource (Closes: #524521)
+ * ipv6: fix run pending DAD when interface becomes ready (Closes: #508460)
+ * ata_piix: IDE Mode SATA patch for Intel Ibex Peak DeviceIDs (Closes: #5571533)
+
+ [ Ben Hutchings ]
+ * via-velocity: Give RX descriptors to the NIC later on open or MTU change
+ (Closes: #508527)
+ * Add atl1c driver for Atheros AR8131 and AR8132 Ethernet controllers
+ (Closes: #562694)
+ * dmfe/tulip: Let dmfe handle DM910x except for SPARC on-board chips
+ (Closes: #515533)
+ * x86: Increase MIN_GAP to include randomized stack (Closes: #559035)
+ * bnx2: Add PCI IDs for Broadcom 5716 and 5716S (Closes: #565353)
+ * bnx2: Fix several crash bugs (Closes: #565960)
+ * audit: Fix memory management bugs (Closes: #562815)
+ - fix braindamage in audit_tree.c untag_chunk()
+ - fix more leaks in audit_tree.c tag_chunk()
+ * megaraid_sas: Fix I/O and shutdown sequencing bugs (Closes: #568345)
+ * megaraid_sas: Add support for MegaRAID SAS 9260 and other PCIe gen2
+ controllers (Closes: #547183)
+ * postinst: Fix pattern-matching for 'do_bootloader' configuration option
+ (Closes: #568317)
+ * yealink: Reliably kill URBs, fixing potential deadlock (Closes: #570532)
+ * qla2xxx: Disable MSI/MSI-X on some chips or as selected by module parameter
+ (Closes: #572322)
+ - MSI is disabled on QLA24xx chips other than QLA2432 (MSI-X already was)
+ - MSI-X is disabled if qlx2enablemsix=2
+ - MSI and MSI-X are disabled if qlx2enablemsix=0
+ * Adjust fix for #524542 to avoid changing ABI
+
+ [ dann frazier ]
+ * Add be2net driver (Closes: #570428)
+ * Fix issues with tsc clocksource on VMWare (Closes: #524542)
+
+ [ Ian Campbell ]
+ * [xen/x86] Use correct form of PHYSDEVOP_map_pirq hypercall to prevent crash
+ when trying to use MSI in domain 0 (Closes: #571603)
+
+ -- dann frazier <dannf at debian.org> Tue, 09 Mar 2010 09:52:09 -0700
linux-2.6 (2.6.26-21lenny4) stable-security; urgency=high
Modified: dists/lenny-security/linux-2.6/debian/config/config
==============================================================================
--- dists/lenny-security/linux-2.6/debian/config/config Fri May 7 15:48:22 2010 (r15637)
+++ dists/lenny-security/linux-2.6/debian/config/config Fri May 7 16:45:16 2010 (r15638)
@@ -1015,6 +1015,7 @@
CONFIG_QLA3XXX=m
CONFIG_ATL1=m
CONFIG_ATL1E=m
+CONFIG_ATL1C=m
CONFIG_NETDEV_10000=y
CONFIG_CHELSIO_T1=m
CONFIG_CHELSIO_T1_1G=y
@@ -1030,6 +1031,7 @@
CONFIG_NIU=m
CONFIG_MLX4_DEBUG=y
CONFIG_TEHUTI=m
+CONFIG_BE2NET=m
CONFIG_PPP=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_FILTER=y
Modified: dists/lenny-security/linux-2.6/debian/config/defines
==============================================================================
--- dists/lenny-security/linux-2.6/debian/config/defines Fri May 7 15:48:22 2010 (r15637)
+++ dists/lenny-security/linux-2.6/debian/config/defines Fri May 7 16:45:16 2010 (r15638)
@@ -1,6 +1,6 @@
[abi]
abiname: 2
-ignore-changes: cn_add_callback gfn_* kvm_* __kvm_* emulate_instruction emulator_read_std emulator_write_emulated fx_init load_pdptrs
+ignore-changes: cn_add_callback gfn_* kvm_* __kvm_* emulate_instruction emulator_read_std emulator_write_emulated fx_init load_pdptrs saa7134_* saa_dsp_writel ub_sock_snd_queue_add
[base]
arches:
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/ALSA-cs4232-fix-crash-during-chip-PNP-detection.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/ALSA-cs4232-fix-crash-during-chip-PNP-detection.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/ALSA-cs4232-fix-crash-during-chip-PNP-detection.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/ALSA-cs4232-fix-crash-during-chip-PNP-detection.patch)
@@ -0,0 +1,30 @@
+From b15ebe2616289da258f85b3ff142fca237ef9f59 Mon Sep 17 00:00:00 2001
+From: Krzysztof Helt <krzysztof.h1 at wp.pl>
+Date: Wed, 23 Jul 2008 07:48:49 +0200
+Subject: [PATCH] ALSA: cs4232: fix crash during chip PNP detection
+
+The acard->wss pointer is uninitialized in this function
+which leads to crash during chip PNP detection.
+
+Signed-off-by: Krzysztof Helt <krzysztof.h1 at wp.pl>
+Acked-by: Rene Herman <rene.herman at gmail.com>
+Signed-off-by: Takashi Iwai <tiwai at suse.de>
+---
+ sound/isa/cs423x/cs4236.c | 1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+
+diff --git a/sound/isa/cs423x/cs4236.c b/sound/isa/cs423x/cs4236.c
+index dbe63db..4d4b8dd 100644
+--- a/sound/isa/cs423x/cs4236.c
++++ b/sound/isa/cs423x/cs4236.c
+@@ -325,6 +325,7 @@ static int __devinit snd_cs423x_pnp_init_mpu(int dev, struct pnp_dev *pdev)
+ static int __devinit snd_card_cs4232_pnp(int dev, struct snd_card_cs4236 *acard,
+ struct pnp_dev *pdev)
+ {
++ acard->wss = pdev;
+ if (snd_cs423x_pnp_init_wss(dev, acard->wss) < 0)
+ return -EBUSY;
+ cport[dev] = -1;
+--
+1.5.6.5
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Allow-phy-reset-to-be-skipped-during-chip-reset.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Allow-phy-reset-to-be-skipped-during-chip-reset.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Allow-phy-reset-to-be-skipped-during-chip-reset.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Allow-phy-reset-to-be-skipped-during-chip-reset.patch)
@@ -0,0 +1,218 @@
+From 9a120bc570627342c17befaa6af9b0a556dfda48 Mon Sep 17 00:00:00 2001
+From: Michael Chan <mchan at broadcom.com>
+Date: Fri, 16 May 2008 22:17:45 -0700
+Subject: [PATCH] bnx2: Allow phy reset to be skipped during chip reset.
+
+Andy Gospodarek <andy at greyhouse.net> found that netconsole would
+panic when resetting bnx2 devices.
+
+>From Andy:
+"The issue is the bnx2_set_link in bnx2_init_nic will print a link-status
+message before we are fully initialized and ready to start polling.
+Polling is currently disabled in this state, but since the
+__LINK_STATE_RX_SCHED is overloaded to not only try and disable polling
+but also to make the system aware there is something waiting to be
+polled, we really have to fix this in drivers.
+
+The problematic call is the one to netif_rx_complete as it tries to
+remove an entry from the poll_list when there isn't one."
+
+While this netconsole problem should be fixed separately, we really
+should not reset the PHY when changing ring sizes, MTU, or other
+similar settings. The PHY reset causes several seconds of unnecessary
+link disruptions.
+
+Signed-off-by: Michael Chan <mchan at broadcom.com>
+Acked-by: Andy Gospodarek <andy at greyhouse.net>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/bnx2.c | 50 +++++++++++++++++++++++++++-----------------------
+ 1 files changed, 27 insertions(+), 23 deletions(-)
+
+diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
+index 4b46e68..934c2bf 100644
+--- a/drivers/net/bnx2.c
++++ b/drivers/net/bnx2.c
+@@ -1875,7 +1875,7 @@ bnx2_setup_phy(struct bnx2 *bp, u8 port)
+ }
+
+ static int
+-bnx2_init_5709s_phy(struct bnx2 *bp)
++bnx2_init_5709s_phy(struct bnx2 *bp, int reset_phy)
+ {
+ u32 val;
+
+@@ -1890,7 +1890,8 @@ bnx2_init_5709s_phy(struct bnx2 *bp)
+ bnx2_write_phy(bp, MII_BNX2_AER_AER, MII_BNX2_AER_AER_AN_MMD);
+
+ bnx2_write_phy(bp, MII_BNX2_BLK_ADDR, MII_BNX2_BLK_ADDR_COMBO_IEEEB0);
+- bnx2_reset_phy(bp);
++ if (reset_phy)
++ bnx2_reset_phy(bp);
+
+ bnx2_write_phy(bp, MII_BNX2_BLK_ADDR, MII_BNX2_BLK_ADDR_SERDES_DIG);
+
+@@ -1924,11 +1925,12 @@ bnx2_init_5709s_phy(struct bnx2 *bp)
+ }
+
+ static int
+-bnx2_init_5708s_phy(struct bnx2 *bp)
++bnx2_init_5708s_phy(struct bnx2 *bp, int reset_phy)
+ {
+ u32 val;
+
+- bnx2_reset_phy(bp);
++ if (reset_phy)
++ bnx2_reset_phy(bp);
+
+ bp->mii_up1 = BCM5708S_UP1;
+
+@@ -1981,9 +1983,10 @@ bnx2_init_5708s_phy(struct bnx2 *bp)
+ }
+
+ static int
+-bnx2_init_5706s_phy(struct bnx2 *bp)
++bnx2_init_5706s_phy(struct bnx2 *bp, int reset_phy)
+ {
+- bnx2_reset_phy(bp);
++ if (reset_phy)
++ bnx2_reset_phy(bp);
+
+ bp->phy_flags &= ~BNX2_PHY_FLAG_PARALLEL_DETECT;
+
+@@ -2018,11 +2021,12 @@ bnx2_init_5706s_phy(struct bnx2 *bp)
+ }
+
+ static int
+-bnx2_init_copper_phy(struct bnx2 *bp)
++bnx2_init_copper_phy(struct bnx2 *bp, int reset_phy)
+ {
+ u32 val;
+
+- bnx2_reset_phy(bp);
++ if (reset_phy)
++ bnx2_reset_phy(bp);
+
+ if (bp->phy_flags & BNX2_PHY_FLAG_CRC_FIX) {
+ bnx2_write_phy(bp, 0x18, 0x0c00);
+@@ -2070,7 +2074,7 @@ bnx2_init_copper_phy(struct bnx2 *bp)
+
+
+ static int
+-bnx2_init_phy(struct bnx2 *bp)
++bnx2_init_phy(struct bnx2 *bp, int reset_phy)
+ {
+ u32 val;
+ int rc = 0;
+@@ -2096,14 +2100,14 @@ bnx2_init_phy(struct bnx2 *bp)
+
+ if (bp->phy_flags & BNX2_PHY_FLAG_SERDES) {
+ if (CHIP_NUM(bp) == CHIP_NUM_5706)
+- rc = bnx2_init_5706s_phy(bp);
++ rc = bnx2_init_5706s_phy(bp, reset_phy);
+ else if (CHIP_NUM(bp) == CHIP_NUM_5708)
+- rc = bnx2_init_5708s_phy(bp);
++ rc = bnx2_init_5708s_phy(bp, reset_phy);
+ else if (CHIP_NUM(bp) == CHIP_NUM_5709)
+- rc = bnx2_init_5709s_phy(bp);
++ rc = bnx2_init_5709s_phy(bp, reset_phy);
+ }
+ else {
+- rc = bnx2_init_copper_phy(bp);
++ rc = bnx2_init_copper_phy(bp, reset_phy);
+ }
+
+ setup_phy:
+@@ -4873,7 +4877,7 @@ bnx2_reset_nic(struct bnx2 *bp, u32 reset_code)
+ }
+
+ static int
+-bnx2_init_nic(struct bnx2 *bp)
++bnx2_init_nic(struct bnx2 *bp, int reset_phy)
+ {
+ int rc;
+
+@@ -4881,7 +4885,7 @@ bnx2_init_nic(struct bnx2 *bp)
+ return rc;
+
+ spin_lock_bh(&bp->phy_lock);
+- bnx2_init_phy(bp);
++ bnx2_init_phy(bp, reset_phy);
+ bnx2_set_link(bp);
+ if (bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP)
+ bnx2_remote_phy_event(bp);
+@@ -5269,7 +5273,7 @@ bnx2_test_loopback(struct bnx2 *bp)
+
+ bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_RESET);
+ spin_lock_bh(&bp->phy_lock);
+- bnx2_init_phy(bp);
++ bnx2_init_phy(bp, 1);
+ spin_unlock_bh(&bp->phy_lock);
+ if (bnx2_run_loopback(bp, BNX2_MAC_LOOPBACK))
+ rc |= BNX2_MAC_LOOPBACK_FAILED;
+@@ -5659,7 +5663,7 @@ bnx2_open(struct net_device *dev)
+ return rc;
+ }
+
+- rc = bnx2_init_nic(bp);
++ rc = bnx2_init_nic(bp, 1);
+
+ if (rc) {
+ bnx2_napi_disable(bp);
+@@ -5691,7 +5695,7 @@ bnx2_open(struct net_device *dev)
+
+ bnx2_setup_int_mode(bp, 1);
+
+- rc = bnx2_init_nic(bp);
++ rc = bnx2_init_nic(bp, 0);
+
+ if (!rc)
+ rc = bnx2_request_irq(bp);
+@@ -5727,7 +5731,7 @@ bnx2_reset_task(struct work_struct *work)
+ bp->in_reset_task = 1;
+ bnx2_netif_stop(bp);
+
+- bnx2_init_nic(bp);
++ bnx2_init_nic(bp, 1);
+
+ atomic_set(&bp->intr_sem, 1);
+ bnx2_netif_start(bp);
+@@ -6421,7 +6425,7 @@ bnx2_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal)
+
+ if (netif_running(bp->dev)) {
+ bnx2_netif_stop(bp);
+- bnx2_init_nic(bp);
++ bnx2_init_nic(bp, 0);
+ bnx2_netif_start(bp);
+ }
+
+@@ -6464,7 +6468,7 @@ bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx)
+ rc = bnx2_alloc_mem(bp);
+ if (rc)
+ return rc;
+- bnx2_init_nic(bp);
++ bnx2_init_nic(bp, 0);
+ bnx2_netif_start(bp);
+ }
+ return 0;
+@@ -6732,7 +6736,7 @@ bnx2_self_test(struct net_device *dev, struct ethtool_test *etest, u64 *buf)
+ bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_RESET);
+ }
+ else {
+- bnx2_init_nic(bp);
++ bnx2_init_nic(bp, 1);
+ bnx2_netif_start(bp);
+ }
+
+@@ -7619,7 +7623,7 @@ bnx2_resume(struct pci_dev *pdev)
+
+ bnx2_set_power_state(bp, PCI_D0);
+ netif_device_attach(dev);
+- bnx2_init_nic(bp);
++ bnx2_init_nic(bp, 1);
+ bnx2_netif_start(bp);
+ return 0;
+ }
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Fix-panic-in-bnx2_poll_work.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Fix-panic-in-bnx2_poll_work.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Fix-panic-in-bnx2_poll_work.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Fix-panic-in-bnx2_poll_work.patch)
@@ -0,0 +1,55 @@
+Based on:
+
+From: Michael Chan <mchan at broadcom.com>
+Subject: [PATCH] bnx2: Fix panic in bnx2_poll_work().
+
+commit 581daf7e00c5e766f26aff80a61a860a17b0d75a upstream.
+
+Add barrier() to bnx2_get_hw_{tx|rx}_cons() to fix this issue:
+
+http://bugzilla.kernel.org/show_bug.cgi?id=12698
+
+This issue was reported by multiple i386 users. Without barrier(),
+the compiled code looks like the following where %eax contains the
+address of the tx_cons or rx_cons in the DMA status block. The
+status block contents can change between the cmpb and the movzwl
+instruction. The driver would crash if the value was not 0xff during
+the cmpb instruction, but changed to 0xff during the movzwl
+instruction.
+
+6828: 80 38 ff cmpb $0xff,(%eax)
+682b: 0f b7 10 movzwl (%eax),%edx
+
+With the added barrier(), the compiled code now looks correct:
+
+683d: 0f b7 10 movzwl (%eax),%edx
+6840: 0f b6 c2 movzbl %dl,%eax
+6843: 3d ff 00 00 00 cmp $0xff,%eax
+
+Thanks to Pascal de Bruijn <pmjdebruijn at pcode.nl> for reporting the
+problem and Holger Noefer <hnoefer at pironet-ndh.com> for patiently
+testing test patches for us.
+
+[greg - took out version change]
+
+--- a/drivers/net/bnx2.c
++++ b/drivers/net/bnx2.c
+@@ -2491,7 +2491,7 @@ bnx2_get_hw_tx_cons(struct bnx2_napi *bnapi)
+ cons = bnapi->status_blk->status_tx_quick_consumer_index0;
+ else
+ cons = bnapi->status_blk_msix->status_tx_quick_consumer_index;
+-
++ barrier();
+ if (unlikely((cons & MAX_TX_DESC_CNT) == MAX_TX_DESC_CNT))
+ cons++;
+ return cons;
+@@ -2755,7 +2755,7 @@ bnx2_get_hw_rx_cons(struct bnx2_napi *bnapi)
+ bnx2_get_hw_rx_cons(struct bnx2_napi *bnapi)
+ {
+ u16 cons = bnapi->status_blk->status_rx_quick_consumer_index0;
+-
++ barrier();
+ if (unlikely((cons & MAX_RX_DESC_CNT) == MAX_RX_DESC_CNT))
+ cons++;
+ return cons;
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Prevent-ethtool-s-from-crashing-when-device-is-down.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Prevent-ethtool-s-from-crashing-when-device-is-down.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/bnx2-Prevent-ethtool-s-from-crashing-when-device-is-down.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/bnx2-Prevent-ethtool-s-from-crashing-when-device-is-down.patch)
@@ -0,0 +1,48 @@
+From d6b14486953d0e8d1c57db29bf6104cea198b884 Mon Sep 17 00:00:00 2001
+From: Michael Chan <mchan at broadcom.com>
+Date: Mon, 14 Jul 2008 22:37:21 -0700
+Subject: [PATCH] bnx2: Prevent ethtool -s from crashing when device is down.
+
+The device may be in D3-hot state and may crash if we try to
+configure the speed settings by accessing the registers.
+
+Signed-off-by: Michael Chan <mchan at broadcom.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/bnx2.c | 13 ++++++++++++-
+ 1 files changed, 12 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
+index ad61cfd..e9cfb02 100644
+--- a/drivers/net/bnx2.c
++++ b/drivers/net/bnx2.c
+@@ -6215,6 +6215,12 @@ bnx2_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+ !(bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP))
+ goto err_out_unlock;
+
++ /* If device is down, we can store the settings only if the user
++ * is setting the currently active port.
++ */
++ if (!netif_running(dev) && cmd->port != bp->phy_port)
++ goto err_out_unlock;
++
+ if (cmd->autoneg == AUTONEG_ENABLE) {
+ autoneg |= AUTONEG_SPEED;
+
+@@ -6272,7 +6278,12 @@ bnx2_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+ bp->req_line_speed = req_line_speed;
+ bp->req_duplex = req_duplex;
+
+- err = bnx2_setup_phy(bp, cmd->port);
++ err = 0;
++ /* If device is down, the new settings will be picked up when it is
++ * brought up.
++ */
++ if (netif_running(dev))
++ err = bnx2_setup_phy(bp, cmd->port);
+
+ err_out_unlock:
+ spin_unlock_bh(&bp->phy_lock);
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/dmfe-tulip-Let-dmfe-handle-DM910x-except-SPARC-onboard.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/dmfe-tulip-Let-dmfe-handle-DM910x-except-SPARC-onboard.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/dmfe-tulip-Let-dmfe-handle-DM910x-except-SPARC-onboard.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/dmfe-tulip-Let-dmfe-handle-DM910x-except-SPARC-onboard.patch)
@@ -0,0 +1,131 @@
+From 42d0b8e38a1f545c7893e57fea2a14bc59b8a6df Mon Sep 17 00:00:00 2001
+From: Ben Hutchings <ben at decadent.org.uk>
+Date: Tue, 29 Dec 2009 17:21:05 +0100
+Subject: [PATCH] dmfe/tulip: Let dmfe handle DM910x except for SPARC on-board chips
+
+The Davicom DM9100 and DM9102 chips are used on the motherboards of
+some SPARC systems (supported by the tulip driver) and also in PCI
+expansion cards (supported by the dmfe driver). There is no
+difference in the PCI device ids for the two different configurations,
+so these drivers both claim the device ids. However, it is possible
+to distinguish the two configurations by the presence of Open Firmware
+properties for them, so we do that.
+---
+ drivers/net/tulip/Kconfig | 4 ++++
+ drivers/net/tulip/dmfe.c | 17 +++++++++++++++++
+ drivers/net/tulip/tulip_core.c | 32 +++++++++++++++++++++++++-------
+ 3 files changed, 46 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/net/tulip/Kconfig b/drivers/net/tulip/Kconfig
+index 1cc8cf4..516713f 100644
+--- a/drivers/net/tulip/Kconfig
++++ b/drivers/net/tulip/Kconfig
+@@ -101,6 +101,10 @@ config TULIP_NAPI_HW_MITIGATION
+
+ If in doubt, say Y.
+
++config TULIP_DM910X
++ def_bool y
++ depends on TULIP && SPARC
++
+ config DE4X5
+ tristate "Generic DECchip & DIGITAL EtherWORKS PCI/EISA"
+ depends on PCI || EISA
+diff --git a/drivers/net/tulip/dmfe.c b/drivers/net/tulip/dmfe.c
+index ad63621..b2273a1 100644
+--- a/drivers/net/tulip/dmfe.c
++++ b/drivers/net/tulip/dmfe.c
+@@ -377,6 +377,23 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,
+ if (!printed_version++)
+ printk(version);
+
++ /*
++ * SPARC on-board DM910x chips should be handled by the main
++ * tulip driver, except for early DM9100s.
++ */
++#ifdef CONFIG_TULIP_DM910X
++ if (ent->driver_data == PCI_DM9100_ID && pdev->revision >= 0x30 ||
++ ent->driver_data == PCI_DM9102_ID) {
++ struct device_node *dp = pci_device_to_OF_node(pdev);
++
++ if (dp && of_get_property(dp, "local-mac-address", NULL)) {
++ printk(KERN_INFO DRV_NAME
++ ": skipping on-board DM910x (use tulip)\n");
++ return -ENODEV;
++ }
++ }
++#endif
++
+ /* Init network device */
+ dev = alloc_etherdev(sizeof(*db));
+ if (dev == NULL)
+diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
+index 0fa3140..595777d 100644
+--- a/drivers/net/tulip/tulip_core.c
++++ b/drivers/net/tulip/tulip_core.c
+@@ -196,9 +196,13 @@ struct tulip_chip_table tulip_tbl[] = {
+ | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
+
+ /* DM910X */
++#ifdef CONFIG_TULIP_DM910X
+ { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
+ HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
+ tulip_timer, tulip_media_task },
++#else
++ { NULL },
++#endif
+
+ /* RS7112 */
+ { "Conexant LANfinity", 256, 0x0001ebef,
+@@ -228,8 +232,10 @@ static struct pci_device_id tulip_pci_tbl[] = {
+ { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
+ { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
+ { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
++#ifdef CONFIG_TULIP_DM910X
+ { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
+ { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
++#endif
+ { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
+ { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
+ { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
+@@ -1299,18 +1305,30 @@ static int __devinit tulip_init_one (struct pci_dev *pdev,
+ }
+
+ /*
+- * Early DM9100's need software CRC and the DMFE driver
++ * DM910x chips should be handled by the dmfe driver, except
++ * on-board chips on SPARC systems. Also, early DM9100s need
++ * software CRC which only the dmfe driver supports.
+ */
+
+- if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
+- {
+- /* Read Chip revision */
+- if (pdev->revision < 0x30)
+- {
+- printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
++#ifdef CONFIG_TULIP_DM910X
++ if (chip_idx == DM910X) {
++ struct device_node *dp;
++
++ if (pdev->vendor == 0x1282 && pdev->device == 0x9100 &&
++ pdev->revision < 0x30) {
++ printk(KERN_INFO PFX
++ "skipping early DM9100 with Crc bug (use dmfe)\n");
++ return -ENODEV;
++ }
++
++ dp = pci_device_to_OF_node(pdev);
++ if (!(dp && of_get_property(dp, "local-mac-address", NULL))) {
++ printk(KERN_INFO PFX
++ "skipping DM910x expansion card (use dmfe)\n");
+ return -ENODEV;
+ }
+ }
++#endif
+
+ /*
+ * Looks for early PCI chipsets where people report hangs
+--
+1.6.5.7
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/fix-braindamage-in-audit_tree.c-untag_chunk.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/fix-braindamage-in-audit_tree.c-untag_chunk.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/fix-braindamage-in-audit_tree.c-untag_chunk.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/fix-braindamage-in-audit_tree.c-untag_chunk.patch)
@@ -0,0 +1,61 @@
+From 0ad8dbec4622c3eef0abe019b9f036ff6a12f277 Mon Sep 17 00:00:00 2001
+From: Al Viro <viro at ZenIV.linux.org.uk>
+Date: Sat, 19 Dec 2009 15:59:45 +0000
+Subject: [PATCH] fix braindamage in audit_tree.c untag_chunk()
+
+commit 6f5d51148921c242680a7a1d9913384a30ab3cbe upstream.
+
+... aka "Al had badly fscked up when writing that thing and nobody
+noticed until Eric had fixed leaks that used to mask the breakage".
+
+The function essentially creates a copy of old array sans one element
+and replaces the references to elements of original (they are on cyclic
+lists) with those to corresponding elements of new one. After that the
+old one is fair game for freeing.
+
+First of all, there's a dumb braino: when we get to list_replace_init we
+use indices for wrong arrays - position in new one with the old array
+and vice versa.
+
+Another bug is more subtle - termination condition is wrong if the
+element to be excluded happens to be the last one. We shouldn't go
+until we fill the new array, we should go until we'd finished the old
+one. Otherwise the element we are trying to kill will remain on the
+cyclic lists...
+
+That crap used to be masked by several leaks, so it was not quite
+trivial to hit. Eric had fixed some of those leaks a while ago and the
+shit had hit the fan...
+
+Signed-off-by: Al Viro <viro at zeniv.linux.org.uk>
+Signed-off-by: Linus Torvalds <torvalds at linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh at suse.de>
+---
+ kernel/audit_tree.c | 4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/kernel/audit_tree.c b/kernel/audit_tree.c
+index 894b599..053ab6c 100644
+--- a/kernel/audit_tree.c
++++ b/kernel/audit_tree.c
+@@ -276,7 +276,7 @@ static void untag_chunk(struct node *p)
+ owner->root = NULL;
+ }
+
+- for (i = j = 0; i < size; i++, j++) {
++ for (i = j = 0; j <= size; i++, j++) {
+ struct audit_tree *s;
+ if (&chunk->owners[j] == p) {
+ list_del_init(&p->list);
+@@ -289,7 +289,7 @@ static void untag_chunk(struct node *p)
+ if (!s) /* result of earlier fallback */
+ continue;
+ get_tree(s);
+- list_replace_init(&chunk->owners[i].list, &new->owners[j].list);
++ list_replace_init(&chunk->owners[j].list, &new->owners[i].list);
+ }
+
+ list_replace_rcu(&chunk->hash, &new->hash);
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/fix-more-leaks-in-audit_tree.c-tag_chunk.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/fix-more-leaks-in-audit_tree.c-tag_chunk.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/fix-more-leaks-in-audit_tree.c-tag_chunk.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/fix-more-leaks-in-audit_tree.c-tag_chunk.patch)
@@ -0,0 +1,55 @@
+From 6f5195525e548d474a77ce00baa927e5c7ed6976 Mon Sep 17 00:00:00 2001
+From: Al Viro <viro at ZenIV.linux.org.uk>
+Date: Sat, 19 Dec 2009 16:03:30 +0000
+Subject: [PATCH] fix more leaks in audit_tree.c tag_chunk()
+
+commit b4c30aad39805902cf5b855aa8a8b22d728ad057 upstream.
+
+Several leaks in audit_tree didn't get caught by commit
+318b6d3d7ddbcad3d6867e630711b8a705d873d7, including the leak on normal
+exit in case of multiple rules refering to the same chunk.
+
+Signed-off-by: Al Viro <viro at zeniv.linux.org.uk>
+Signed-off-by: Linus Torvalds <torvalds at linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh at suse.de>
+---
+ kernel/audit_tree.c | 9 ++++++---
+ 1 files changed, 6 insertions(+), 3 deletions(-)
+
+diff --git a/kernel/audit_tree.c b/kernel/audit_tree.c
+index 053ab6c..ef96b29 100644
+--- a/kernel/audit_tree.c
++++ b/kernel/audit_tree.c
+@@ -372,15 +372,17 @@ static int tag_chunk(struct inode *inode, struct audit_tree *tree)
+ for (n = 0; n < old->count; n++) {
+ if (old->owners[n].owner == tree) {
+ spin_unlock(&hash_lock);
+- put_inotify_watch(watch);
++ put_inotify_watch(&old->watch);
+ return 0;
+ }
+ }
+ spin_unlock(&hash_lock);
+
+ chunk = alloc_chunk(old->count + 1);
+- if (!chunk)
++ if (!chunk) {
++ put_inotify_watch(&old->watch);
+ return -ENOMEM;
++ }
+
+ mutex_lock(&inode->inotify_mutex);
+ if (inotify_clone_watch(&old->watch, &chunk->watch) < 0) {
+@@ -422,7 +424,8 @@ static int tag_chunk(struct inode *inode, struct audit_tree *tree)
+ spin_unlock(&hash_lock);
+ inotify_evict_watch(&old->watch);
+ mutex_unlock(&inode->inotify_mutex);
+- put_inotify_watch(&old->watch);
++ put_inotify_watch(&old->watch); /* pair to inotify_find_watch */
++ put_inotify_watch(&old->watch); /* and kill it */
+ return 0;
+ }
+
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/ipv6-fix-pending-dad.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/ipv6-fix-pending-dad.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/ipv6-fix-pending-dad.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/ipv6-fix-pending-dad.patch)
@@ -0,0 +1,68 @@
+From: Benjamin Thery <benjamin.thery at bull.net>
+Date: Wed, 5 Nov 2008 09:43:57 +0000 (-0800)
+Subject: ipv6: fix run pending DAD when interface becomes ready
+X-Git-Tag: v2.6.28-rc4~22^2~4
+X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftorvalds%2Flinux-2.6.git;a=commitdiff_plain;h=e3ec6cfc260e2322834e200c2fa349cdf104fd13
+
+ipv6: fix run pending DAD when interface becomes ready
+
+With some net devices types, an IPv6 address configured while the
+interface was down can stay 'tentative' forever, even after the interface
+is set up. In some case, pending IPv6 DADs are not executed when the
+device becomes ready.
+
+I observed this while doing some tests with kvm. If I assign an IPv6
+address to my interface eth0 (kvm driver rtl8139) when it is still down
+then the address is flagged tentative (IFA_F_TENTATIVE). Then, I set
+eth0 up, and to my surprise, the address stays 'tentative', no DAD is
+executed and the address can't be pinged.
+
+I also observed the same behaviour, without kvm, with virtual interfaces
+types macvlan and veth.
+
+Some easy steps to reproduce the issue with macvlan:
+
+1. ip link add link eth0 type macvlan
+2. ip -6 addr add 2003::ab32/64 dev macvlan0
+3. ip addr show dev macvlan0
+ ...
+ inet6 2003::ab32/64 scope global tentative
+ ...
+4. ip link set macvlan0 up
+5. ip addr show dev macvlan0
+ ...
+ inet6 2003::ab32/64 scope global tentative
+ ...
+ Address is still tentative
+
+I think there's a bug in net/ipv6/addrconf.c, addrconf_notify():
+addrconf_dad_run() is not always run when the interface is flagged IF_READY.
+Currently it is only run when receiving NETDEV_CHANGE event. Looks like
+some (virtual) devices doesn't send this event when becoming up.
+
+For both NETDEV_UP and NETDEV_CHANGE events, when the interface becomes
+ready, run_pending should be set to 1. Patch below.
+
+'run_pending = 1' could be moved below the if/else block but it makes
+the code less readable.
+
+Signed-off-by: Benjamin Thery <benjamin.thery at bull.net>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+
+diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
+index eea9542..d9da5eb 100644
+--- a/net/ipv6/addrconf.c
++++ b/net/ipv6/addrconf.c
+@@ -2483,8 +2483,10 @@ static int addrconf_notify(struct notifier_block *this, unsigned long event,
+ if (!idev && dev->mtu >= IPV6_MIN_MTU)
+ idev = ipv6_add_dev(dev);
+
+- if (idev)
++ if (idev) {
+ idev->if_flags |= IF_READY;
++ run_pending = 1;
++ }
+ } else {
+ if (!addrconf_qdisc_ok(dev)) {
+ /* device is still not ready. */
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/matroxfb-fix-problems-with-display-stability.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/matroxfb-fix-problems-with-display-stability.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/matroxfb-fix-problems-with-display-stability.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/matroxfb-fix-problems-with-display-stability.patch)
@@ -0,0 +1,47 @@
+From 8c651311a3a08c1e4815de6933e00a760e498dae Mon Sep 17 00:00:00 2001
+From: Alan Cox <alan at linux.intel.com>
+Date: Tue, 15 Dec 2009 16:46:40 -0800
+Subject: matroxfb: fix problems with display stability
+
+From: Alan Cox <alan at linux.intel.com>
+
+commit 8c651311a3a08c1e4815de6933e00a760e498dae upstream.
+
+Regression caused in 2.6.23 and then despite repeated requests never fixed
+or dealt with (Petr promised to sort it in 2008 but seems to have
+forgotten).
+
+Enough is enough - remove the problem line that was added. If it upsets
+someone they've had two years to deal with it and at the very least it'll
+rattle their cage and wake them up.
+
+Addresses http://bugzilla.kernel.org/show_bug.cgi?id=9709
+
+Signed-off-by: Alan Cox <alan at linux.intel.com>
+Reported-by: Damon <account at bugzilla.kernel.org.juxtaposition.net>
+Tested-by: Ruud van Melick <rvm1974 at raketnet.nl>
+Cc: Petr Vandrovec <VANDROVE at vc.cvut.cz>
+Cc: Pekka Enberg <penberg at cs.helsinki.fi>
+Cc: Paul A. Clarke <pc at us.ibm.com>
+Signed-off-by: Andrew Morton <akpm at linux-foundation.org>
+Signed-off-by: Linus Torvalds <torvalds at linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh at suse.de>
+
+---
+ drivers/video/matrox/g450_pll.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/video/matrox/g450_pll.c b/drivers/video/matrox/g450_pll.c
+index d42346e..3dcb6d2 100644
+--- a/drivers/video/matrox/g450_pll.c
++++ b/drivers/video/matrox/g450_pll.c
+@@ -341,7 +341,8 @@ static int __g450_setclk(WPMINFO unsigned int fout, unsigned int pll,
+ M1064_XDVICLKCTRL_C1DVICLKEN |
+ M1064_XDVICLKCTRL_DVILOOPCTL |
+ M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
+- matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL,tmp);
++ /* Setting this breaks PC systems so don't do it */
++ /* matroxfb_DAC_out(PMINFO M1064_XDVICLKCTRL,tmp); */
+ matroxfb_DAC_out(PMINFO M1064_XPWRCTRL,
+ xpwrctrl);
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/megaraid_sas-add-readl-to-force-PCI-posting-flush.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/megaraid_sas-add-readl-to-force-PCI-posting-flush.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/megaraid_sas-add-readl-to-force-PCI-posting-flush.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/megaraid_sas-add-readl-to-force-PCI-posting-flush.patch)
@@ -0,0 +1,43 @@
+From 06f579dee5dd75c2aaf8fe83d034b5470eeee2f4 Mon Sep 17 00:00:00 2001
+From: Yang, Bo <Bo.Yang at lsi.com>
+Date: Sun, 10 Aug 2008 12:42:37 -0700
+Subject: [PATCH] [SCSI] megaraid_sas: add readl to force PCI posting flush
+
+MegaRAID SAS Driver get unexpected Interrupt. Add the dummy readl to
+force PCI flush will fix this issue.
+
+Signed-off-by: Bo Yang <bo.yang at lsi.com>
+Signed-off-by: Andrew Morton <akpm at linux-foundation.org>
+Cc: Stable Tree <stable at kernel.org>
+Signed-off-by: James Bottomley <James.Bottomley at HansenPartnership.com>
+---
+ drivers/scsi/megaraid/megaraid_sas.c | 6 ++++++
+ 1 files changed, 6 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
+index fc7ac15..d7b9984 100644
+--- a/drivers/scsi/megaraid/megaraid_sas.c
++++ b/drivers/scsi/megaraid/megaraid_sas.c
+@@ -198,6 +198,9 @@ megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
+ */
+ writel(status, ®s->outbound_intr_status);
+
++ /* Dummy readl to force pci flush */
++ readl(®s->outbound_intr_status);
++
+ return 0;
+ }
+
+@@ -293,6 +296,9 @@ megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
+ */
+ writel(status, ®s->outbound_doorbell_clear);
+
++ /* Dummy readl to force pci flush */
++ readl(®s->outbound_doorbell_clear);
++
+ return 0;
+ }
+ /**
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/megaraid_sas-add-the-shutdown-DCMD-cmd.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/megaraid_sas-add-the-shutdown-DCMD-cmd.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/megaraid_sas-add-the-shutdown-DCMD-cmd.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/megaraid_sas-add-the-shutdown-DCMD-cmd.patch)
@@ -0,0 +1,30 @@
+From 530e6fc1e05f14762aea954ca8d6422c5a7077c1 Mon Sep 17 00:00:00 2001
+From: Yang, Bo <Bo.Yang at lsi.com>
+Date: Sun, 10 Aug 2008 12:42:37 -0700
+Subject: [PATCH] [SCSI] megaraid_sas: add the shutdown DCMD cmd to driver shutdown routine
+
+Add the shutdown DCMD cmd to driver shutdown routine to make megaraid sas
+FW shutdown proper.
+
+Signed-off-by: Bo Yang <bo.yang at lsi.com>
+Signed-off-by: Andrew Morton <akpm at linux-foundation.org>
+Signed-off-by: James Bottomley <James.Bottomley at HansenPartnership.com>
+---
+ drivers/scsi/megaraid/megaraid_sas.c | 1 +
+ 1 files changed, 1 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
+index d7b9984..e880cd4 100644
+--- a/drivers/scsi/megaraid/megaraid_sas.c
++++ b/drivers/scsi/megaraid/megaraid_sas.c
+@@ -2863,6 +2863,7 @@ static void megasas_shutdown(struct pci_dev *pdev)
+ {
+ struct megasas_instance *instance = pci_get_drvdata(pdev);
+ megasas_flush_cache(instance);
++ megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
+ }
+
+ /**
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/qla2xxx-disable-broken-msi.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/qla2xxx-disable-broken-msi.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/qla2xxx-disable-broken-msi.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/qla2xxx-disable-broken-msi.patch)
@@ -0,0 +1,97 @@
+From: Ben Hutchings <ben at decadent.org.uk>
+Subject: [PATCH] qla2xxx: Disable MSI/MSI-X on some chips or as selected by module parameter
+
+Based on these patches applied to RHEL 5:
+
+linux-2.6-scsi-qla2xxx-disable-msi-x-by-default.patch
+linux-2.6-scsi-qla2xxx-msi-x-hardware-issues-on-platforms.patch
+linux-2.6-scsi-qla2xxx-allow-use-of-msi-when-msi-x-disabled.patch
+linux-2.6-scsi-qla2xxx-enable-msi-x-correctly-on-qlogic-2xxx-series.patch
+
+The combined effect is:
+- MSI is disabled on QLA24xx chips other than QLA2432 (MSI-X already was)
+- MSI-X is disabled if qlx2enablemsix=2
+- MSI and MSI-X are disabled if qlx2enablemsix=0
+
+--- a/drivers/scsi/qla2xxx/qla_gbl.h
++++ b/drivers/scsi/qla2xxx/qla_gbl.h
+@@ -62,6 +62,7 @@ extern int ql2xfdmienable;
+ extern int ql2xallocfwdump;
+ extern int ql2xextended_error_logging;
+ extern int ql2xqfullrampup;
++extern int ql2xenablemsix;
+ extern int num_hosts;
+
+ extern int qla2x00_loop_reset(scsi_qla_host_t *);
+--- a/drivers/scsi/qla2xxx/qla_isr.c
++++ b/drivers/scsi/qla2xxx/qla_isr.c
+@@ -1769,18 +1769,12 @@ qla2x00_request_irqs(scsi_qla_host_t *ha)
+ int ret;
+ device_reg_t __iomem *reg = ha->iobase;
+
+- /* If possible, enable MSI-X. */
+- if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha))
+- goto skip_msix;
+-
+- if (IS_QLA2432(ha) && (ha->chip_revision < QLA_MSIX_CHIP_REV_24XX ||
+- !QLA_MSIX_FW_MODE_1(ha->fw_attributes))) {
+- DEBUG2(qla_printk(KERN_WARNING, ha,
+- "MSI-X: Unsupported ISP2432 (0x%X, 0x%X).\n",
+- ha->chip_revision, ha->fw_attributes));
++ /* If possible, enable MSI-X, MSI. */
++ if (ql2xenablemsix == 0)
++ goto skip_msi;
+
+- goto skip_msix;
+- }
++ if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha))
++ goto skip_msi;
+
+ if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
+ (ha->pdev->subsystem_device == 0x7040 ||
+@@ -1794,6 +1788,17 @@ qla2x00_request_irqs(scsi_qla_host_t *ha)
+ goto skip_msi;
+ }
+
++ if (ql2xenablemsix == 2)
++ goto skip_msix;
++
++ if (IS_QLA2432(ha) && (ha->chip_revision < QLA_MSIX_CHIP_REV_24XX ||
++ !QLA_MSIX_FW_MODE_1(ha->fw_attributes))) {
++ DEBUG2(qla_printk(KERN_WARNING, ha,
++ "MSI-X: Unsupported ISP2432 (0x%X, 0x%X).\n",
++ ha->chip_revision, ha->fw_attributes));
++ goto skip_msix;
++ }
++
+ ret = qla24xx_enable_msix(ha);
+ if (!ret) {
+ DEBUG2(qla_printk(KERN_INFO, ha,
+@@ -1805,9 +1810,6 @@ qla2x00_request_irqs(scsi_qla_host_t *ha)
+ "MSI-X: Falling back-to INTa mode -- %d.\n", ret);
+ skip_msix:
+
+- if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha))
+- goto skip_msi;
+-
+ ret = pci_enable_msi(ha->pdev);
+ if (!ret) {
+ DEBUG2(qla_printk(KERN_INFO, ha, "MSI: Enabled.\n"));
+--- a/drivers/scsi/qla2xxx/qla_os.c
++++ b/drivers/scsi/qla2xxx/qla_os.c
+@@ -87,6 +87,15 @@ MODULE_PARM_DESC(ql2xqfullrampup,
+ "depth for a device after a queue-full condition has been "
+ "detected. Default is 120 seconds.");
+
++int ql2xenablemsix = 1;
++module_param(ql2xenablemsix, int, S_IRUGO|S_IRUSR);
++MODULE_PARM_DESC(ql2xenablemsix,
++ "Set to enable MSI or MSI-X interrupt mechanism."
++ " Default is 1, enable MSI-X interrupt mechanism."
++ " 0 = enable traditional pin-based mechanism."
++ " 1 = enable MSI-X interrupt mechanism."
++ " 2 = enable MSI interrupt mechanism.");
++
+ /*
+ * SCSI host template entry points
+ */
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/saa7134-fix-deadlock.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/saa7134-fix-deadlock.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/saa7134-fix-deadlock.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/saa7134-fix-deadlock.patch)
@@ -0,0 +1,80 @@
+From: Hans Verkuil <hverkuil at xs4all.nl>
+Date: Sat, 26 Jul 2008 12:01:24 +0000 (-0300)
+Subject: V4L/DVB (8505): saa7134-empress.c: fix deadlock
+X-Git-Tag: v2.6.27-rc1~31^2~36
+X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Fnext%2Flinux-next.git;a=commitdiff_plain;h=1052efe0fc69130d9d6a44bc9ceecd229221d9a1
+
+V4L/DVB (8505): saa7134-empress.c: fix deadlock
+
+ts_release() locked a mutex that videobuf_stop() also tried to obtain.
+But ts_release() shouldn't hold that mutex at all.
+
+Make empress_users atomic as well to prevent possible race condition.
+
+Signed-off-by: Hans Verkuil <hverkuil at xs4all.nl>
+Signed-off-by: Mauro Carvalho Chehab <mchehab at infradead.org>
+---
+
+diff --git a/drivers/media/video/saa7134/saa7134-empress.c b/drivers/media/video/saa7134/saa7134-empress.c
+index 8b3f951..2ecfbd1 100644
+--- a/drivers/media/video/saa7134/saa7134-empress.c
++++ b/drivers/media/video/saa7134/saa7134-empress.c
+@@ -89,14 +89,14 @@ static int ts_open(struct inode *inode, struct file *file)
+ err = -EBUSY;
+ if (!mutex_trylock(&dev->empress_tsq.vb_lock))
+ goto done;
+- if (dev->empress_users)
++ if (atomic_read(&dev->empress_users))
+ goto done_up;
+
+ /* Unmute audio */
+ saa_writeb(SAA7134_AUDIO_MUTE_CTRL,
+ saa_readb(SAA7134_AUDIO_MUTE_CTRL) & ~(1 << 6));
+
+- dev->empress_users++;
++ atomic_inc(&dev->empress_users);
+ file->private_data = dev;
+ err = 0;
+
+@@ -110,8 +110,6 @@ static int ts_release(struct inode *inode, struct file *file)
+ {
+ struct saa7134_dev *dev = file->private_data;
+
+- mutex_lock(&dev->empress_tsq.vb_lock);
+-
+ videobuf_stop(&dev->empress_tsq);
+ videobuf_mmap_free(&dev->empress_tsq);
+
+@@ -122,9 +120,7 @@ static int ts_release(struct inode *inode, struct file *file)
+ saa_writeb(SAA7134_AUDIO_MUTE_CTRL,
+ saa_readb(SAA7134_AUDIO_MUTE_CTRL) | (1 << 6));
+
+- dev->empress_users--;
+-
+- mutex_unlock(&dev->empress_tsq.vb_lock);
++ atomic_dec(&dev->empress_users);
+
+ return 0;
+ }
+@@ -447,7 +443,7 @@ static void empress_signal_update(struct work_struct *work)
+ ts_reset_encoder(dev);
+ } else {
+ dprintk("video signal acquired\n");
+- if (dev->empress_users)
++ if (atomic_read(&dev->empress_users))
+ ts_init_encoder(dev);
+ }
+ }
+diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h
+index ade4e19..ed20dd5 100644
+--- a/drivers/media/video/saa7134/saa7134.h
++++ b/drivers/media/video/saa7134/saa7134.h
+@@ -561,7 +561,7 @@ struct saa7134_dev {
+ /* SAA7134_MPEG_EMPRESS only */
+ struct video_device *empress_dev;
+ struct videobuf_queue empress_tsq;
+- unsigned int empress_users;
++ atomic_t empress_users;
+ struct work_struct empress_workqueue;
+ int empress_started;
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/via-velocity-give-rx-descriptors-later.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/via-velocity-give-rx-descriptors-later.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/via-velocity-give-rx-descriptors-later.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/via-velocity-give-rx-descriptors-later.patch)
@@ -0,0 +1,35 @@
+From: Ben Hutchings <ben at decadent.org.uk>
+Subject: [PATCH] via-velocity: Give RX descriptors to the NIC later on open or MTU change
+
+velocity_open() calls velocity_give_many_rx_descs(), which gives RX
+descriptors to the NIC, before installing an interrupt handler or
+calling velocity_init_registers(). I think this is very unsafe and it
+appears to explain the bug report <http://bugs.debian.org/508527>.
+
+On MTU change, velocity_give_many_rx_descs() is again called before
+velocity_init_registers(). I'm not sure whether this is unsafe but
+it does look wrong.
+
+Therefore, move the calls to velocity_give_many_rx_descs() after
+request_irq() and velocity_init_registers().
+
+--- a/drivers/net/via-velocity.c
++++ b/drivers/net/via-velocity.c
+@@ -2237,8 +2237,6 @@ static int velocity_open(struct net_device *dev)
+ /* Ensure chip is running */
+ pci_set_power_state(vptr->pdev, PCI_D0);
+
+- velocity_give_many_rx_descs(vptr);
+-
+ velocity_init_registers(vptr, VELOCITY_INIT_COLD);
+
+ ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
+@@ -2250,6 +2248,8 @@ static int velocity_open(struct net_device *dev)
+ goto out;
+ }
+
++ velocity_give_many_rx_descs(vptr);
++
+ mac_enable_int(vptr->mac_regs);
+ netif_start_queue(dev);
+ napi_enable(&vptr->napi);
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/via-velocity-move-residual-free-rx-descriptors-count.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/via-velocity-move-residual-free-rx-descriptors-count.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/via-velocity-move-residual-free-rx-descriptors-count.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/via-velocity-move-residual-free-rx-descriptors-count.patch)
@@ -0,0 +1,128 @@
+From 28133176082d9bcafb5958b8fac80943e51d5eda Mon Sep 17 00:00:00 2001
+From: Francois Romieu <romieu at fr.zoreil.com>
+Date: Fri, 11 Jul 2008 00:05:17 +0200
+Subject: [PATCH] via-velocity: move residual free rx descriptors count register update
+
+Updates of the RBRDU have two different meanings depending on their
+context:
+1. the receiving process has not started - the value which is written
+ into the RBRDU register is supposed to be the free rx descriptors
+ count (rounded to a multiple of 4)
+2. the receiving process is running - the value increments the count
+ above (sic)
+
+The update is currently issued deep inside the rx replenish chain (see
+velocity_give_many_rx_descs).
+
+Let's propagate enough information to the caller so that the rx
+replenish functions do not depend on hardware any more.
+
+It is needed to perform the Rx/Tx buffers housekeeping when MTU changes.
+
+Signed-off-by: Francois Romieu <romieu at fr.zoreil.com>
+Signed-off-by: Jeff Garzik <jgarzik at redhat.com>
+---
+ drivers/net/via-velocity.c | 28 ++++++++++++++--------------
+ 1 files changed, 14 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
+index 86b256c..086d69c 100644
+--- a/drivers/net/via-velocity.c
++++ b/drivers/net/via-velocity.c
+@@ -1155,7 +1155,7 @@ static void velocity_free_rings(struct velocity_info *vptr)
+ pci_free_consistent(vptr->pdev, size, vptr->rd_ring, vptr->rd_pool_dma);
+ }
+
+-static inline void velocity_give_many_rx_descs(struct velocity_info *vptr)
++static void velocity_give_many_rx_descs(struct velocity_info *vptr)
+ {
+ struct mac_regs __iomem *regs = vptr->mac_regs;
+ int avail, dirty, unusable;
+@@ -1182,7 +1182,7 @@ static inline void velocity_give_many_rx_descs(struct velocity_info *vptr)
+
+ static int velocity_rx_refill(struct velocity_info *vptr)
+ {
+- int dirty = vptr->rd_dirty, done = 0, ret = 0;
++ int dirty = vptr->rd_dirty, done = 0;
+
+ do {
+ struct rx_desc *rd = vptr->rd_ring + dirty;
+@@ -1192,8 +1192,7 @@ static int velocity_rx_refill(struct velocity_info *vptr)
+ break;
+
+ if (!vptr->rd_info[dirty].skb) {
+- ret = velocity_alloc_rx_buf(vptr, dirty);
+- if (ret < 0)
++ if (velocity_alloc_rx_buf(vptr, dirty) < 0)
+ break;
+ }
+ done++;
+@@ -1203,10 +1202,9 @@ static int velocity_rx_refill(struct velocity_info *vptr)
+ if (done) {
+ vptr->rd_dirty = dirty;
+ vptr->rd_filled += done;
+- velocity_give_many_rx_descs(vptr);
+ }
+
+- return ret;
++ return done;
+ }
+
+ /**
+@@ -1219,25 +1217,27 @@ static int velocity_rx_refill(struct velocity_info *vptr)
+
+ static int velocity_init_rd_ring(struct velocity_info *vptr)
+ {
+- int ret;
+ int mtu = vptr->dev->mtu;
++ int ret = -ENOMEM;
+
+ vptr->rx_buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
+
+ vptr->rd_info = kcalloc(vptr->options.numrx,
+ sizeof(struct velocity_rd_info), GFP_KERNEL);
+ if (!vptr->rd_info)
+- return -ENOMEM;
++ goto out;
+
+ vptr->rd_filled = vptr->rd_dirty = vptr->rd_curr = 0;
+
+- ret = velocity_rx_refill(vptr);
+- if (ret < 0) {
++ if (velocity_rx_refill(vptr) != vptr->options.numrx) {
+ VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
+ "%s: failed to allocate RX buffer.\n", vptr->dev->name);
+ velocity_free_rd_ring(vptr);
++ goto out;
+ }
+
++ ret = 0;
++out:
+ return ret;
+ }
+
+@@ -1412,10 +1412,8 @@ static int velocity_rx_srv(struct velocity_info *vptr, int status)
+
+ vptr->rd_curr = rd_curr;
+
+- if (works > 0 && velocity_rx_refill(vptr) < 0) {
+- VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
+- "%s: rx buf allocation failure\n", vptr->dev->name);
+- }
++ if ((works > 0) && (velocity_rx_refill(vptr) > 0))
++ velocity_give_many_rx_descs(vptr);
+
+ VAR_USED(stats);
+ return works;
+@@ -1877,6 +1875,8 @@ static int velocity_open(struct net_device *dev)
+ /* Ensure chip is running */
+ pci_set_power_state(vptr->pdev, PCI_D0);
+
++ velocity_give_many_rx_descs(vptr);
++
+ velocity_init_registers(vptr, VELOCITY_INIT_COLD);
+
+ ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
+--
+1.6.5.4
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/x86-Increase-MIN_GAP-to-include-randomized-stack.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/x86-Increase-MIN_GAP-to-include-randomized-stack.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/x86-Increase-MIN_GAP-to-include-randomized-stack.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/x86-Increase-MIN_GAP-to-include-randomized-stack.patch)
@@ -0,0 +1,80 @@
+From 2578cf95969936c372db29ee2bbc21c9b6a299aa Mon Sep 17 00:00:00 2001
+From: Michal Hocko <mhocko at suse.cz>
+Date: Wed, 7 Oct 2009 17:38:24 -0400
+Subject: [PATCH] x86: Increase MIN_GAP to include randomized stack
+
+[ trivial backport to 2.6.27: Chuck Ebbert <cebbert at redhat.com> ]
+
+commit 80938332d8cf652f6b16e0788cf0ca136befe0b5 upstream.
+
+Currently we are not including randomized stack size when calculating
+mmap_base address in arch_pick_mmap_layout for topdown case. This might
+cause that mmap_base starts in the stack reserved area because stack is
+randomized by 1GB for 64b (8MB for 32b) and the minimum gap is 128MB.
+
+If the stack really grows down to mmap_base then we can get silent mmap
+region overwrite by the stack values.
+
+Let's include maximum stack randomization size into MIN_GAP which is
+used as the low bound for the gap in mmap.
+
+Signed-off-by: Michal Hocko <mhocko at suse.cz>
+LKML-Reference: <1252400515-6866-1-git-send-email-mhocko at suse.cz>
+Acked-by: Jiri Kosina <jkosina at suse.cz>
+Signed-off-by: H. Peter Anvin <hpa at zytor.com>
+Cc: Chuck Ebbert <cebbert at redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh at suse.de>
+---
+ arch/x86/mm/mmap.c | 17 +++++++++++++++--
+ include/asm-x86/elf.h | 2 ++
+ 2 files changed, 17 insertions(+), 2 deletions(-)
+
+diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
+index 56fe712..47dd8f5 100644
+--- a/arch/x86/mm/mmap.c
++++ b/arch/x86/mm/mmap.c
+@@ -29,13 +29,26 @@
+ #include <linux/random.h>
+ #include <linux/limits.h>
+ #include <linux/sched.h>
++#include <asm/elf.h>
++
++static unsigned int stack_maxrandom_size(void)
++{
++ unsigned int max = 0;
++ if ((current->flags & PF_RANDOMIZE) &&
++ !(current->personality & ADDR_NO_RANDOMIZE)) {
++ max = ((-1U) & STACK_RND_MASK) << PAGE_SHIFT;
++ }
++
++ return max;
++}
++
+
+ /*
+ * Top of mmap area (just below the process stack).
+ *
+- * Leave an at least ~128 MB hole.
++ * Leave an at least ~128 MB hole with possible stack randomization.
+ */
+-#define MIN_GAP (128*1024*1024)
++#define MIN_GAP (128*1024*1024UL + stack_maxrandom_size())
+ #define MAX_GAP (TASK_SIZE/6*5)
+
+ /*
+diff --git a/include/asm-x86/elf.h b/include/asm-x86/elf.h
+index 7be4733..36343b6 100644
+--- a/include/asm-x86/elf.h
++++ b/include/asm-x86/elf.h
+@@ -287,6 +287,8 @@ do { \
+
+ #ifdef CONFIG_X86_32
+
++#define STACK_RND_MASK (0x7ff)
++
+ #define VDSO_HIGH_BASE (__fix_to_virt(FIX_VDSO))
+
+ #define ARCH_DLINFO ARCH_DLINFO_IA32(vdso_enabled)
+--
+1.6.5.7
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/all/yealink-reliably-kill-urbs.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/yealink-reliably-kill-urbs.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/all/yealink-reliably-kill-urbs.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/all/yealink-reliably-kill-urbs.patch)
@@ -0,0 +1,124 @@
+From b4ecda3e965a87881a94017cb0cd484d65799261 Mon Sep 17 00:00:00 2001
+From: Oliver Neukum <oliver at neukum.org>
+Date: Thu, 3 Jul 2008 12:02:03 -0400
+Subject: [PATCH] Input: yealink - reliably kill urbs
+
+Yealink uses two URBs that submit each other. This arrangement
+cannot be reliably killed with usb_kill_urb() alone, as there's
+a window during which the wrong URB may be killed. The fix is
+to introduce a flag.
+
+[dtor at mail.ru: remove spinlock, flag alone should be enough]
+[bwh: revert __func__ to __FUNCTION__ for 2.6.26]
+Signed-off-by: Oliver Neukum <oneukum at suse.de>
+Signed-off-by: Dmitry Torokhov <dtor at mail.ru>
+---
+ drivers/input/misc/yealink.c | 44 +++++++++++++++++++++++++++--------------
+ 1 files changed, 29 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/input/misc/yealink.c b/drivers/input/misc/yealink.c
+index 8a949e7..facefd3 100644
+--- a/drivers/input/misc/yealink.c
++++ b/drivers/input/misc/yealink.c
+@@ -119,6 +119,8 @@ struct yealink_dev {
+ u8 lcdMap[ARRAY_SIZE(lcdMap)]; /* state of LCD, LED ... */
+ int key_code; /* last reported key */
+
++ unsigned int shutdown:1;
++
+ int stat_ix;
+ union {
+ struct yld_status s;
+@@ -424,10 +426,10 @@ send_update:
+ static void urb_irq_callback(struct urb *urb)
+ {
+ struct yealink_dev *yld = urb->context;
+- int ret;
++ int ret, status = urb->status;
+
+- if (urb->status)
+- err("%s - urb status %d", __FUNCTION__, urb->status);
++ if (status)
++ err("%s - urb status %d", __FUNCTION__, status);
+
+ switch (yld->irq_data->cmd) {
+ case CMD_KEYPRESS:
+@@ -447,32 +449,37 @@ static void urb_irq_callback(struct urb *urb)
+
+ yealink_do_idle_tasks(yld);
+
+- ret = usb_submit_urb(yld->urb_ctl, GFP_ATOMIC);
+- if (ret)
+- err("%s - usb_submit_urb failed %d", __FUNCTION__, ret);
++ if (!yld->shutdown) {
++ ret = usb_submit_urb(yld->urb_ctl, GFP_ATOMIC);
++ if (ret && ret != -EPERM)
++ err("%s - usb_submit_urb failed %d", __FUNCTION__, ret);
++ }
+ }
+
+ static void urb_ctl_callback(struct urb *urb)
+ {
+ struct yealink_dev *yld = urb->context;
+- int ret;
++ int ret = 0, status = urb->status;
+
+- if (urb->status)
+- err("%s - urb status %d", __FUNCTION__, urb->status);
++ if (status)
++ err("%s - urb status %d", __FUNCTION__, status);
+
+ switch (yld->ctl_data->cmd) {
+ case CMD_KEYPRESS:
+ case CMD_SCANCODE:
+ /* ask for a response */
+- ret = usb_submit_urb(yld->urb_irq, GFP_ATOMIC);
++ if (!yld->shutdown)
++ ret = usb_submit_urb(yld->urb_irq, GFP_ATOMIC);
+ break;
+ default:
+ /* send new command */
+ yealink_do_idle_tasks(yld);
+- ret = usb_submit_urb(yld->urb_ctl, GFP_ATOMIC);
++ if (!yld->shutdown)
++ ret = usb_submit_urb(yld->urb_ctl, GFP_ATOMIC);
++ break;
+ }
+
+- if (ret)
++ if (ret && ret != -EPERM)
+ err("%s - usb_submit_urb failed %d", __FUNCTION__, ret);
+ }
+
+@@ -531,8 +538,18 @@ static void input_close(struct input_dev *dev)
+ {
+ struct yealink_dev *yld = input_get_drvdata(dev);
+
++ yld->shutdown = 1;
++ /*
++ * Make sure the flag is seen by other CPUs before we start
++ * killing URBs so new URBs won't be submitted
++ */
++ smp_wmb();
++
+ usb_kill_urb(yld->urb_ctl);
+ usb_kill_urb(yld->urb_irq);
++
++ yld->shutdown = 0;
++ smp_wmb();
+ }
+
+ /*******************************************************************************
+@@ -809,9 +826,6 @@ static int usb_cleanup(struct yealink_dev *yld, int err)
+ if (yld == NULL)
+ return err;
+
+- usb_kill_urb(yld->urb_irq); /* parameter validation in core/urb */
+- usb_kill_urb(yld->urb_ctl); /* parameter validation in core/urb */
+-
+ if (yld->idev) {
+ if (err)
+ input_free_device(yld->idev);
+--
+1.6.6.2
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-X86_FEATURE_HYPERVISOR-feature-bit.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-X86_FEATURE_HYPERVISOR-feature-bit.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-X86_FEATURE_HYPERVISOR-feature-bit.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-X86_FEATURE_HYPERVISOR-feature-bit.patch)
@@ -0,0 +1,33 @@
+commit 49ab56ac6e1b907b7dadb72a4012460359feaf0e
+Author: Alok Kataria <akataria at vmware.com>
+Date: Sat Nov 1 18:34:37 2008 -0700
+
+ x86: add X86_FEATURE_HYPERVISOR feature bit
+
+ Impact: Number declaration only.
+
+ Add X86_FEATURE_HYPERVISOR bit (CPUID level 1, ECX, bit 31).
+
+ Signed-off-by: H. Peter Anvin <hpa at zytor.com>
+
+Backported to Debian's 2.6.26 by dann frazier <dannf at debian.org>
+
+diff -urpN a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
+--- a/include/asm-x86/cpufeature.h 2009-07-16 14:25:56.000000000 -0600
++++ b/include/asm-x86/cpufeature.h 2009-07-16 14:28:37.000000000 -0600
+@@ -91,6 +91,7 @@
+ #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
+ #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
+ #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */
++#define X86_FEATURE_HYPERVISOR (4*32+31) /* Running on a hypervisor */
+
+ /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
+ #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
+@@ -188,6 +189,7 @@ extern const char * const x86_power_flag
+ #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
+ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
+ #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
++#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
+
+ #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
+ # define cpu_has_invlpg 1
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-a-synthetic-TSC_RELIABLE-feature-bit.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-a-synthetic-TSC_RELIABLE-feature-bit.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-a-synthetic-TSC_RELIABLE-feature-bit.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-a-synthetic-TSC_RELIABLE-feature-bit.patch)
@@ -0,0 +1,114 @@
+commit 2ca7545f254a0a2f754bfbdaaba15aee85397cb7
+Author: Alok Kataria <akataria at vmware.com>
+Date: Mon Jan 26 21:00:22 2009 +0100
+
+ UBUNTU: x86: Add a synthetic TSC_RELIABLE feature bit.
+
+ Bug: #319945
+
+ Impact: Changes timebase calibration on Vmware.
+
+ Use the synthetic TSC_RELIABLE bit to workaround virtualization anomalies.
+
+ Virtual TSCs can be kept nearly in sync, but because the virtual TSC
+ offset is set by software, it's not perfect. So, the TSC
+ synchronization test can fail. Even then the TSC can be used as a
+ clocksource since the VMware platform exports a reliable TSC to the
+ guest for timekeeping purposes. Use this bit to check if we need to
+ skip the TSC sync checks.
+
+ Along with this also set the CONSTANT_TSC bit when on VMware, since we
+ still want to use TSC as clocksource on VM running over hardware which
+ has unsynchronized TSC's (opteron's), since the hypervisor will take
+ care of providing consistent TSC to the guest.
+
+ Signed-off-by: Alok N Kataria <akataria at vmware.com>
+ Signed-off-by: Dan Hecht <dhecht at vmware.com>
+ Signed-off-by: H. Peter Anvin <hpa at zytor.com>
+ Acked-by: Tim Gardner <tim.gardner at canonical.com>
+ Acked-by: Stefan Bader <stefan.bader at canonical.com>
+
+Adjusted to apply to Debian's 2.6.26 by dann frazier <dannf at debian.org>
+and Ben Hutchings <ben at decadent.org.uk>
+
+diff -urpN a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
+--- a/arch/x86/kernel/cpu/hypervisor.c 2009-07-19 16:58:14.000000000 -0600
++++ b/arch/x86/kernel/cpu/hypervisor.c 2009-07-19 17:10:14.000000000 -0600
+@@ -44,7 +44,17 @@ unsigned long get_hypervisor_tsc_freq(vo
+ return 0;
+ }
+
++static inline void __cpuinit
++hypervisor_set_feature_bits(struct cpuinfo_x86 *c)
++{
++ if (x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE) {
++ vmware_set_feature_bits(c);
++ return;
++ }
++}
++
+ void __cpuinit init_hypervisor(struct cpuinfo_x86 *c)
+ {
+ detect_hypervisor_vendor(c);
++ hypervisor_set_feature_bits(c);
+ }
+diff -urpN a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
+--- a/arch/x86/kernel/cpu/vmware.c 2009-07-19 16:58:14.000000000 -0600
++++ b/arch/x86/kernel/cpu/vmware.c 2009-07-19 17:09:10.000000000 -0600
+@@ -94,3 +94,21 @@ unsigned long vmware_get_tsc_khz(void)
+ BUG_ON(!vmware_platform());
+ return __vmware_get_tsc_khz();
+ }
++
++/*
++ * VMware hypervisor takes care of exporting a reliable TSC to the guest.
++ * Still, due to timing difference when running on virtual cpus, the TSC can
++ * be marked as unstable in some cases. For example, the TSC sync check at
++ * bootup can fail due to a marginal offset between vcpus' TSCs (though the
++ * TSCs do not drift from each other). Also, the ACPI PM timer clocksource
++ * is not suitable as a watchdog when running on a hypervisor because the
++ * kernel may miss a wrap of the counter if the vcpu is descheduled for a
++ * long time. To skip these checks at runtime we set these capability bits,
++ * so that the kernel could just trust the hypervisor with providing a
++ * reliable virtual TSC that is suitable for timekeeping.
++ */
++void __cpuinit vmware_set_feature_bits(struct cpuinfo_x86 *c)
++{
++ set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
++ set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
++}
+diff -urpN a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
+--- a/arch/x86/kernel/tsc_sync.c 2008-07-13 15:51:29.000000000 -0600
++++ b/arch/x86/kernel/tsc_sync.c 2009-07-19 17:09:10.000000000 -0600
+@@ -110,6 +110,12 @@ void __cpuinit check_tsc_sync_source(int
+ if (unsynchronized_tsc())
+ return;
+
++ if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) {
++ printk(KERN_INFO
++ "Skipping synchronization checks as TSC is reliable.\n");
++ return;
++ }
++
+ printk(KERN_INFO "checking TSC synchronization [CPU#%d -> CPU#%d]:",
+ smp_processor_id(), cpu);
+
+@@ -163,7 +169,7 @@ void __cpuinit check_tsc_sync_target(voi
+ {
+ int cpus = 2;
+
+- if (unsynchronized_tsc())
++ if (unsynchronized_tsc() || boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
+ return;
+
+ /*
+diff -urpN a/include/asm-x86/vmware.h b/include/asm-x86/vmware.h
+--- a/include/asm-x86/vmware.h 2009-07-19 16:58:52.000000000 -0600
++++ b/include/asm-x86/vmware.h 2009-07-19 17:09:10.000000000 -0600
+@@ -22,5 +22,6 @@
+
+ extern unsigned long vmware_get_tsc_khz(void);
+ extern int vmware_platform(void);
++extern void vmware_set_feature_bits(struct cpuinfo_x86 *c);
+
+ #endif
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-a-synthetic-TS_RELIABLE-feature-bit.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-a-synthetic-TS_RELIABLE-feature-bit.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/add-a-synthetic-TS_RELIABLE-feature-bit.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/add-a-synthetic-TS_RELIABLE-feature-bit.patch)
@@ -0,0 +1,29 @@
+commit b2bcc7b299f37037b4a78dc1538e5d6508ae8110
+Author: Alok Kataria <akataria at vmware.com>
+Date: Fri Oct 31 11:59:53 2008 -0700
+
+ x86: add a synthetic TSC_RELIABLE feature bit
+
+ Impact: None, bit reservation only
+
+ Add a synthetic TSC_RELIABLE feature bit which will be used to mark
+ TSC as reliable so that we could skip all the runtime checks for
+ TSC stablity, which have false positives in virtual environment.
+
+ Signed-off-by: Alok N Kataria <akataria at vmware.com>
+ Signed-off-by: Dan Hecht <dhecht at vmware.com>
+ Signed-off-by: H. Peter Anvin <hpa at zytor.com>
+
+Backported to Debian's 2.6.26 by dann frazier <dannf at debian.org>
+
+diff -urpN a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
+--- a/include/asm-x86/cpufeature.h 2008-07-13 15:51:29.000000000 -0600
++++ b/include/asm-x86/cpufeature.h 2009-07-16 14:25:56.000000000 -0600
+@@ -79,6 +79,7 @@
+ #define X86_FEATURE_REP_GOOD (3*32+16) /* rep microcode works well on this CPU */
+ #define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */
+ #define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
++#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */
+
+ /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
+ #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/fix-vmi-clocksource.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/fix-vmi-clocksource.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/fix-vmi-clocksource.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/fix-vmi-clocksource.patch)
@@ -0,0 +1,40 @@
+From 48ffc70b675aa7798a52a2e92e20f6cce9140b3d Mon Sep 17 00:00:00 2001
+From: Alok N Kataria <akataria at vmware.com>
+Date: Wed, 18 Feb 2009 12:33:55 -0800
+Subject: [PATCH] x86, vmi: TSC going backwards check in vmi clocksource
+
+Impact: fix time warps under vmware
+
+Similar to the check for TSC going backwards in the TSC clocksource,
+we also need this check for VMI clocksource.
+
+Signed-off-by: Alok N Kataria <akataria at vmware.com>
+Cc: Zachary Amsden <zach at vmware.com>
+Signed-off-by: Ingo Molnar <mingo at elte.hu>
+Cc: stable at kernel.org
+---
+ arch/x86/kernel/vmiclock_32.c | 5 ++++-
+ 1 files changed, 4 insertions(+), 1 deletions(-)
+
+diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
+index c4c1f9e..bde106c 100644
+--- a/arch/x86/kernel/vmiclock_32.c
++++ b/arch/x86/kernel/vmiclock_32.c
+@@ -283,10 +283,13 @@ void __devinit vmi_time_ap_init(void)
+ #endif
+
+ /** vmi clocksource */
++static struct clocksource clocksource_vmi;
+
+ static cycle_t read_real_cycles(void)
+ {
+- return vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
++ cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
++ return ret >= clocksource_vmi.cycle_last ?
++ ret : clocksource_vmi.cycle_last;
+ }
+
+ static struct clocksource clocksource_vmi = {
+--
+1.7.0
+
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/hypervisor-detection-and-get-tsc_freq-from-hypervisor.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/hypervisor-detection-and-get-tsc_freq-from-hypervisor.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/hypervisor-detection-and-get-tsc_freq-from-hypervisor.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/hypervisor-detection-and-get-tsc_freq-from-hypervisor.patch)
@@ -0,0 +1,419 @@
+commit fd59eae709565d0c294f84bc2bf3c942a561c474
+Author: Alok Kataria <akataria at vmware.com>
+Date: Fri Jan 16 15:35:02 2009 -0800
+
+ UBUNTU: x86: Hypervisor detection and get tsc_freq from hypervisor
+
+ Bug: #319945
+ BumpABI: yes
+ ABI changes: Adds an element to cpuinfo_x86 which modifies the hash for
+ boot_cpu_data and per_cpu__cpu_info.
+
+ Impact: Changes timebase calibration on Vmware.
+
+ This patch adds function to detect if we are running under VMware.
+ The current way to check if we are on VMware is following,
+ # check if "hypervisor present bit" is set, if so read the 0x40000000
+ cpuid leaf and check for "VMwareVMware" signature.
+ # if the above fails, check the DMI vendors name for "VMware" string
+ if we find one we query the VMware hypervisor port to check if we are
+ under VMware.
+
+ The DMI + "VMware hypervisor port check" is needed for older VMware products,
+ which don't implement the hypervisor signature cpuid leaf.
+ Also note that since we are checking for the DMI signature the hypervisor
+ port should never be accessed on native hardware.
+
+ This patch also adds a hypervisor_get_tsc_freq function, instead of
+ calibrating the frequency which can be error prone in virtualized
+ environment, we ask the hypervisor for it. We get the frequency from
+ the hypervisor by accessing the hypervisor port if we are running on VMware.
+ Other hypervisors too can add code to the generic routine to get frequency on
+ their platform.
+
+ Signed-off-by: Alok N Kataria <akataria at vmware.com>
+ Signed-off-by: Dan Hecht <dhecht at vmware.com>
+ Signed-off-by: H. Peter Anvin <hpa at zytor.com>
+ Signed-off-by: Stefan Bader <stefan.bader at canonical.com>
+ Acked-by: Tim Gardner <tim.gardner at canonical.com>
+
+Backported to Debian's 2.6.26 by dann frazier <dannf at debian.org>
+and Ben Hutchings <ben at decadent.org.uk>
+
+diff -urpN a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
+--- a/arch/x86/kernel/cpu/common.c 2008-07-13 15:51:29.000000000 -0600
++++ b/arch/x86/kernel/cpu/common.c 2009-07-19 17:05:05.000000000 -0600
+@@ -13,6 +13,7 @@
+ #include <asm/mtrr.h>
+ #include <asm/mce.h>
+ #include <asm/pat.h>
++#include <asm/hypervisor.h>
+ #ifdef CONFIG_X86_LOCAL_APIC
+ #include <asm/mpspec.h>
+ #include <asm/apic.h>
+@@ -491,6 +492,8 @@ void __cpuinit identify_cpu(struct cpuin
+ c->x86, c->x86_model);
+ }
+
++ init_hypervisor(c);
++
+ /*
+ * On SMP, boot_cpu_data holds the common feature set between
+ * all CPUs; so make sure that we indicate which features are
+diff -urpN a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
+--- a/arch/x86/kernel/cpu/hypervisor.c 1969-12-31 17:00:00.000000000 -0700
++++ b/arch/x86/kernel/cpu/hypervisor.c 2009-07-19 16:58:14.000000000 -0600
+@@ -0,0 +1,54 @@
++/*
++ * Common hypervisor code
++ *
++ * Copyright (C) 2008, VMware, Inc.
++ * Author : Alok N Kataria <akataria at vmware.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ */
++
++#include <linux/init.h>
++
++#include <asm/processor.h>
++#include <asm/vmware.h>
++#include <asm/hypervisor.h>
++
++static unsigned int x86_hyper_vendor;
++
++static inline void __cpuinit
++detect_hypervisor_vendor(struct cpuinfo_x86 *c)
++{
++ if (c != &boot_cpu_data)
++ return;
++ if (vmware_platform()) {
++ x86_hyper_vendor = X86_HYPER_VENDOR_VMWARE;
++ } else {
++ x86_hyper_vendor = X86_HYPER_VENDOR_NONE;
++ }
++}
++
++unsigned long get_hypervisor_tsc_freq(void)
++{
++ if (x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE)
++ return vmware_get_tsc_khz();
++ return 0;
++}
++
++void __cpuinit init_hypervisor(struct cpuinfo_x86 *c)
++{
++ detect_hypervisor_vendor(c);
++}
+diff -urpN a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
+--- a/arch/x86/kernel/cpu/Makefile 2008-07-13 15:51:29.000000000 -0600
++++ b/arch/x86/kernel/cpu/Makefile 2009-07-19 17:05:37.000000000 -0600
+@@ -4,6 +4,7 @@
+
+ obj-y := intel_cacheinfo.o addon_cpuid_features.o
+ obj-y += proc.o feature_names.o
++obj-y += vmware.o hypervisor.o
+
+ obj-$(CONFIG_X86_32) += common.o bugs.o
+ obj-$(CONFIG_X86_32) += amd.o
+diff -urpN a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
+--- a/arch/x86/kernel/cpu/vmware.c 1969-12-31 17:00:00.000000000 -0700
++++ b/arch/x86/kernel/cpu/vmware.c 2009-07-19 16:58:14.000000000 -0600
+@@ -0,0 +1,96 @@
++/*
++ * VMware Detection code.
++ *
++ * Copyright (C) 2008, VMware, Inc.
++ * Author : Alok N Kataria <akataria at vmware.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ */
++
++#include <linux/dmi.h>
++#include <linux/init.h>
++
++#include <asm/div64.h>
++#include <asm/vmware.h>
++
++#define CPUID_VMWARE_INFO_LEAF 0x40000000
++#define VMWARE_HYPERVISOR_MAGIC 0x564D5868
++#define VMWARE_HYPERVISOR_PORT 0x5658
++
++#define VMWARE_PORT_CMD_GETVERSION 10
++#define VMWARE_PORT_CMD_GETHZ 45
++
++#define VMWARE_PORT(cmd, eax, ebx, ecx, edx) \
++ __asm__("inl (%%dx)" : \
++ "=a"(eax), "=c"(ecx), "=d"(edx), "=b"(ebx) : \
++ "0"(VMWARE_HYPERVISOR_MAGIC), \
++ "1"(VMWARE_PORT_CMD_##cmd), \
++ "2"(VMWARE_HYPERVISOR_PORT), "3"(UINT_MAX) : \
++ "memory");
++
++static inline int __vmware_platform(void)
++{
++ uint32_t eax, ebx, ecx, edx;
++ VMWARE_PORT(GETVERSION, eax, ebx, ecx, edx);
++ return eax != (uint32_t)-1 && ebx == VMWARE_HYPERVISOR_MAGIC;
++}
++
++static unsigned long __vmware_get_tsc_khz(void)
++{
++ uint64_t tsc_hz;
++ uint32_t eax, ebx, ecx, edx;
++
++ VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
++
++ if (ebx == UINT_MAX)
++ return 0;
++ tsc_hz = eax | (((uint64_t)ebx) << 32);
++ do_div(tsc_hz, 1000);
++ BUG_ON(tsc_hz >> 32);
++ return tsc_hz;
++}
++
++/*
++ * While checking the dmi string infomation, just checking the product
++ * serial key should be enough, as this will always have a VMware
++ * specific string when running under VMware hypervisor.
++ */
++int vmware_platform(void)
++{
++ if (cpu_has_hypervisor) {
++ unsigned int eax, ebx, ecx, edx;
++ char hyper_vendor_id[13];
++
++ cpuid(CPUID_VMWARE_INFO_LEAF, &eax, &ebx, &ecx, &edx);
++ memcpy(hyper_vendor_id + 0, &ebx, 4);
++ memcpy(hyper_vendor_id + 4, &ecx, 4);
++ memcpy(hyper_vendor_id + 8, &edx, 4);
++ hyper_vendor_id[12] = '\0';
++ if (!strcmp(hyper_vendor_id, "VMwareVMware"))
++ return 1;
++ } else if (dmi_available && dmi_name_in_serial("VMware") &&
++ __vmware_platform())
++ return 1;
++
++ return 0;
++}
++
++unsigned long vmware_get_tsc_khz(void)
++{
++ BUG_ON(!vmware_platform());
++ return __vmware_get_tsc_khz();
++}
+diff -urpN a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
+--- a/arch/x86/kernel/setup_32.c 2009-07-19 16:50:37.000000000 -0600
++++ b/arch/x86/kernel/setup_32.c 2009-07-19 17:02:57.000000000 -0600
+@@ -67,6 +67,7 @@
+ #include <asm/bios_ebda.h>
+ #include <asm/cacheflush.h>
+ #include <asm/processor.h>
++#include <asm/hypervisor.h>
+
+ /* This value is set up by the early boot code to point to the value
+ immediately after the boot time page tables. It contains a *physical*
+@@ -885,6 +886,12 @@ void __init setup_arch(char **cmdline_p)
+
+ dmi_scan_machine();
+
++ /*
++ * VMware detection requires dmi to be available, so this
++ * needs to be done after dmi_scan_machine, for the BP.
++ */
++ init_hypervisor(&boot_cpu_data);
++
+ io_delay_init();
+
+ #ifdef CONFIG_X86_SMP
+diff -urpN a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
+--- a/arch/x86/kernel/setup_64.c 2008-07-13 15:51:29.000000000 -0600
++++ b/arch/x86/kernel/setup_64.c 2009-07-19 17:01:31.000000000 -0600
+@@ -71,6 +71,7 @@
+ #include <asm/topology.h>
+ #include <asm/trampoline.h>
+ #include <asm/pat.h>
++#include <asm/hypervisor.h>
+
+ #include <mach_apic.h>
+ #ifdef CONFIG_PARAVIRT
+@@ -400,6 +401,12 @@ void __init setup_arch(char **cmdline_p)
+
+ dmi_scan_machine();
+
++ /*
++ * VMware detection requires dmi to be available, so this
++ * needs to be done after dmi_scan_machine, for the BP.
++ */
++ init_hypervisor(&boot_cpu_data);
++
+ io_delay_init();
+
+ #ifdef CONFIG_KVM_CLOCK
+@@ -1094,6 +1101,8 @@ void __cpuinit identify_cpu(struct cpuin
+
+ c->apicid = phys_pkg_id(0);
+
++ init_hypervisor(c);
++
+ /*
+ * Vendor-specific initialization. In this section we
+ * canonicalize the feature flags, meaning if there are
+diff -urpN a/arch/x86/kernel/tsc_32.c b/arch/x86/kernel/tsc_32.c
+--- a/arch/x86/kernel/tsc_32.c 2008-07-13 15:51:29.000000000 -0600
++++ b/arch/x86/kernel/tsc_32.c 2009-07-19 16:58:14.000000000 -0600
+@@ -11,6 +11,7 @@
+ #include <asm/tsc.h>
+ #include <asm/io.h>
+ #include <asm/timer.h>
++#include <asm/hypervisor.h>
+
+ #include "mach_timer.h"
+
+@@ -149,11 +150,17 @@ unsigned long long sched_clock(void)
+ unsigned long native_calculate_cpu_khz(void)
+ {
+ unsigned long long start, end;
+- unsigned long count;
++ unsigned long count, hypervisor_tsc_khz;
+ u64 delta64 = (u64)ULLONG_MAX;
+ int i;
+ unsigned long flags;
+
++ hypervisor_tsc_khz = get_hypervisor_tsc_freq();
++ if (hypervisor_tsc_khz) {
++ printk(KERN_INFO "TSC: Frequency read from the hypervisor\n");
++ return hypervisor_tsc_khz;
++ }
++
+ local_irq_save(flags);
+
+ /* run 3 times to ensure the cache is warm and to get an accurate reading */
+diff -urpN a/arch/x86/kernel/tsc_64.c b/arch/x86/kernel/tsc_64.c
+--- a/arch/x86/kernel/tsc_64.c 2008-07-13 15:51:29.000000000 -0600
++++ b/arch/x86/kernel/tsc_64.c 2009-07-19 17:02:19.000000000 -0600
+@@ -12,6 +12,7 @@
+ #include <asm/timex.h>
+ #include <asm/timer.h>
+ #include <asm/vgtod.h>
++#include <asm/hypervisor.h>
+
+ static int notsc __initdata = 0;
+
+@@ -199,8 +200,16 @@ static unsigned long __init tsc_read_ref
+ void __init tsc_calibrate(void)
+ {
+ unsigned long flags, tsc1, tsc2, tr1, tr2, pm1, pm2, hpet1, hpet2;
++ unsigned long hypervisor_tsc_khz;
+ int hpet = is_hpet_enabled(), cpu;
+
++ hypervisor_tsc_khz = get_hypervisor_tsc_freq();
++ if (hypervisor_tsc_khz) {
++ printk(KERN_INFO "TSC: Frequency read from the hypervisor\n");
++ tsc_khz = hypervisor_tsc_khz;
++ goto out;
++ }
++
+ local_irq_save(flags);
+
+ tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
+diff -urpN a/include/asm-x86/hypervisor.h b/include/asm-x86/hypervisor.h
+--- a/include/asm-x86/hypervisor.h 1969-12-31 17:00:00.000000000 -0700
++++ b/include/asm-x86/hypervisor.h 2009-07-19 16:58:14.000000000 -0600
+@@ -0,0 +1,26 @@
++/*
++ * Copyright (C) 2008, VMware, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ */
++#ifndef ASM_X86__HYPERVISOR_H
++#define ASM_X86__HYPERVISOR_H
++
++extern unsigned long get_hypervisor_tsc_freq(void);
++extern void init_hypervisor(struct cpuinfo_x86 *c);
++
++#endif
+diff -urpN a/include/asm-x86/processor.h b/include/asm-x86/processor.h
+--- a/include/asm-x86/processor.h 2008-07-13 15:51:29.000000000 -0600
++++ b/include/asm-x86/processor.h 2009-07-19 17:00:56.000000000 -0600
+@@ -122,6 +123,9 @@ struct cpuinfo_x86 {
+
+ #define X86_VENDOR_UNKNOWN 0xff
+
++#define X86_HYPER_VENDOR_NONE 0
++#define X86_HYPER_VENDOR_VMWARE 1
++
+ /*
+ * capabilities of CPUs
+ */
+diff -urpN a/include/asm-x86/vmware.h b/include/asm-x86/vmware.h
+--- a/include/asm-x86/vmware.h 1969-12-31 17:00:00.000000000 -0700
++++ b/include/asm-x86/vmware.h 2009-07-19 16:58:52.000000000 -0600
+@@ -0,0 +1,26 @@
++/*
++ * Copyright (C) 2008, VMware, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
++ *
++ */
++#ifndef ASM_X86__VMWARE_H
++#define ASM_X86__VMWARE_H
++
++extern unsigned long vmware_get_tsc_khz(void);
++extern int vmware_platform(void);
++
++#endif
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/skip-verification-by-the-watchdog-for-TSC-clocksource.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/skip-verification-by-the-watchdog-for-TSC-clocksource.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/skip-verification-by-the-watchdog-for-TSC-clocksource.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/skip-verification-by-the-watchdog-for-TSC-clocksource.patch)
@@ -0,0 +1,68 @@
+commit 0532dac67ee608e6f583549452ec07e9d2788af7
+Author: Alok Kataria <akataria at vmware.com>
+Date: Mon Jan 26 21:00:22 2009 +0100
+
+ UBUNTU: x86: Skip verification by the watchdog for TSC clocksource.
+
+ Bug: #319945
+
+ Impact: Changes timekeeping on Vmware (or with tsc=reliable).
+
+ This is achieved by resetting the CLOCKSOURCE_MUST_VERIFY flag.
+
+ We add a tsc=reliable commandline option to enable this.
+ This enables legacy hardware without HPET, LAPIC, or ACPI timers
+ to enter high-resolution timer mode.
+
+ Along with that have extended this to be used in virtualization environement
+ too. Now we also set this flag if the X86_FEATURE_TSC_RELIABLE bit is set.
+
+ This is important since there is a wrap-around problem with the acpi_pm timer.
+ The acpi_pm counter is just 24bits and this can overflow in ~4 seconds. With
+ the NO_HZ kernels in virtualized environment, there can be situations when
+ the guest is descheduled for longer duration, as a result we may miss the wrap
+ of the acpi counter. When TSC is used as a clocksource and acpi_pm timer is
+ being used as the watchdog clocksource this error in acpi_pm results in TSC
+ being marked as unstable, and essentially results in time dropping in chunks
+ of 4 seconds whenever this wrap is missed. Since the virtualized TSC is
+ reliable on VMware, we should always use the TSCs clocksource on VMware, so
+ we skip the verfication at runtime, by checking for the feature bit.
+
+ Since we reset the flag for mgeode systems too, i have combined
+ the mgeode case with the feature bit check.
+
+ Signed-off-by: Jeff Hansen <jhansen at cardaccess-inc.com>
+ Signed-off-by: Alok N Kataria <akataria at vmware.com>
+ Signed-off-by: Dan Hecht <dhecht at vmware.com>
+ Signed-off-by: H. Peter Anvin <hpa at zytor.com>
+ Acked-by: Tim Gardner <tim.gardner at canonical.com>
+ Acked-by: Stefan Bader <stefan.bader at canonical.com>
+
+Adjusted to apply to Debian's 2.6.26 by dann frazier <dannf at debian.org>
+
+diff -urpN a/arch/x86/kernel/tsc_32.c b/arch/x86/kernel/tsc_32.c
+--- a/arch/x86/kernel/tsc_32.c 2009-07-19 16:58:14.000000000 -0600
++++ b/arch/x86/kernel/tsc_32.c 2009-07-19 17:11:35.000000000 -0600
+@@ -446,6 +446,9 @@ void __init tsc_init(void)
+
+ unsynchronized_tsc();
+ check_geode_tsc_reliable();
++ if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
++ clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
++
+ current_tsc_khz = tsc_khz;
+ clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
+ clocksource_tsc.shift);
+diff -urpN a/arch/x86/kernel/tsc_64.c b/arch/x86/kernel/tsc_64.c
+--- a/arch/x86/kernel/tsc_64.c 2009-07-19 17:02:19.000000000 -0600
++++ b/arch/x86/kernel/tsc_64.c 2009-07-19 17:11:35.000000000 -0600
+@@ -357,6 +357,9 @@ EXPORT_SYMBOL_GPL(mark_tsc_unstable);
+ void __init init_tsc_clocksource(void)
+ {
+ if (!notsc) {
++ if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
++ clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
++
+ clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
+ clocksource_tsc.shift);
+ if (check_tsc_unstable())
Copied: dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/vmware-look-for-DMI-string-in-product-serial-key.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/vmware-look-for-DMI-string-in-product-serial-key.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/bugfix/x86/vmware-look-for-DMI-string-in-product-serial-key.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/bugfix/x86/vmware-look-for-DMI-string-in-product-serial-key.patch)
@@ -0,0 +1,65 @@
+commit bb363507f6359762f368b09bf36309425768910a
+Author: Alok Kataria <akataria at vmware.com>
+Date: Mon Jan 26 21:00:23 2009 +0100
+
+ UBUNTU: x86: vmware: look for DMI string in the product serial key
+
+ Bug: #319945
+
+ Impact: Should permit VMware detection on older platforms where the
+ vendor is changed. Could theoretically cause a regression if some
+ weird serial number scheme contains the string "VMware" by pure
+ chance. Seems unlikely, especially with the mixed case.
+
+ In some user configured cases, VMware may choose not to put a VMware specific
+ DMI string, but the product serial key is always there and is VMware specific.
+ Add a interface to check the serial key, when checking for VMware in the DMI
+ information.
+
+ Signed-off-by: Alok N Kataria <akataria at vmware.com>
+ Signed-off-by: H. Peter Anvin <hpa at zytor.com>
+ Acked-by: Tim Gardner <tim.gardner at canonical.com>
+ Acked-by: Stefan Bader <stefan.bader at canonical.com>
+
+Backported to Debian's 2.6.26 by dann frazier <dannf at debian.org>
+
+diff -urpN a/drivers/firmware/dmi_scan.c b/drivers/firmware/dmi_scan.c
+--- a/drivers/firmware/dmi_scan.c 2008-07-13 15:51:29.000000000 -0600
++++ b/drivers/firmware/dmi_scan.c 2009-07-19 17:15:17.000000000 -0600
+@@ -452,6 +452,17 @@ const char *dmi_get_system_info(int fiel
+ }
+ EXPORT_SYMBOL(dmi_get_system_info);
+
++/**
++ * dmi_name_in_serial - Check if string is in the DMI product serial
++ * information.
++ */
++int dmi_name_in_serial(const char *str)
++{
++ int f = DMI_PRODUCT_SERIAL;
++ if (dmi_ident[f] && strstr(dmi_ident[f], str))
++ return 1;
++ return 0;
++}
+
+ /**
+ * dmi_name_in_vendors - Check if string is anywhere in the DMI vendor information.
+diff -urpN a/include/linux/dmi.h b/include/linux/dmi.h
+--- a/include/linux/dmi.h 2008-07-13 15:51:29.000000000 -0600
++++ b/include/linux/dmi.h 2009-07-19 17:15:17.000000000 -0600
+@@ -81,6 +81,7 @@ extern const struct dmi_device * dmi_fin
+ extern void dmi_scan_machine(void);
+ extern int dmi_get_year(int field);
+ extern int dmi_name_in_vendors(const char *str);
++extern int dmi_name_in_serial(const char *str);
+ extern int dmi_available;
+ extern int dmi_walk(void (*decode)(const struct dmi_header *));
+
+@@ -93,6 +94,7 @@ static inline const struct dmi_device *
+ static inline void dmi_scan_machine(void) { return; }
+ static inline int dmi_get_year(int year) { return 0; }
+ static inline int dmi_name_in_vendors(const char *s) { return 0; }
++static inline int dmi_name_in_serial(const char *s) { return 0; }
+ #define dmi_available 0
+ static inline int dmi_walk(void (*decode)(const struct dmi_header *))
+ { return -1; }
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/add-be2net.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/add-be2net.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/add-be2net.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/add-be2net.patch)
@@ -0,0 +1,5779 @@
+Backport of the following commits to Debian's 2.6.26:
+
+6b7c5b947c671a96e39f9526a5fd70c178b8dfd1
+ea1dae11e0baca5d633207fe50fc3cd30a5d68ee
+1ab1ab7543de53c945ea24140409ef67ed173eb4
+4097f663cbe9e58de7ebed222f8af33267f297a8
+65f71b8bd2651e6d6ca9b09fe53a8db2da22b85c
+728a9972d1f290608e730b9ccec2061aa81f6609
+03a980d162eb48a79ce21d47f45b9ec7d9db20e9
+c4ca2374312b4de819dd700e72a68395eddb5fcb
+ebc8d2ab61dde6cf775ae7bb1ed9e38dfe12ca65
+b305be78a044c5f6a9d146229a280d08db0c630a
+6811086899f2740c08d0ade26f8b9d705708e0cc
+76fbb42919396b9bf68c9a03ceb037c971a02e2f
+a7a0ef31def6b6badd94fc96c8f17c2e18d91513
+934037bc2ed29a94bbde72aa6a2e66bdc5861b98
+5fb379ee67a7ec55ff65b467b472f3d69b60ba16
+6ac7b687cb3acc437a586794949a43f5249956bb
+24307eef74bd38e3fc6a6df8f8a1bfc48967f9f6
+a8f447bda3ee00e3a3ab080c48db40078ea65221
+bd46cb6cf11867130a41ea9546dd65688b71f3c2
+c001c213b109c8baeeb6d012b422bf059b18368f
+fa77406aee9d33f35c7202dcd83436feb12d9fc3
+8788fdc2a53cf012a43808877eaa6ac7e3c923b4
+eec368fb3ce3ee9e7bb042bbafb03f297d96e55e
+5f0b849eb35d09cd2f332d5031051c1a8976c30b
+efd2e40a8cc891e8f90e0bdde000006bd6201530
+d9509ac1295ce2ec121333d29b8a85a9e564f817
+14074eab8dcaa7f66d8f52612b2dcec51222bb5f
+a8e9179a7de196d37410fd3e9528081f22c70a4e
+cdab23b7017693c00dd69fa28bcdf5b0434b3838
+859b1e4ec86840b0d0980f82b626d687be682eb9
+9b0365f1954b0b54a896171b4438ed42ad7ef02f
+a65027e4d80ece5a5a3bd4fc4808a83208430929
+b628bde2b5390776efc30837798d016ec1aa3ebe
+1a8887d81ac4bbee6153b4bc9b9f9e099fb5f07e
+b31c50a7f9e93a61d14740dedcbbf2c376998bc7
+dcb9b5648a04d9178f9af9d8b684831a8ea59b9f
+c5b9b92e07e4973b299537c5c684037349dc7e5c
+49643848f9ec8182cf04a83115f58d43854bbdc6
+583e3f34ebf421e51bf15beb9df84ef70f7dd3f9
+78122a52b39c9527fa3a32afbb6572964c17c651
+fad9ab2cefd3a3b4754f49eb41e2f43ea314cdce
+73d540f282c0d8ce48fafd7fcc844e91f31d4103
+43a04fdc369ce4fb6718b95e1c930ff8661e65c1
+12d7ea2c5a5c87834daf9fcd920aab80ff6248b1
+0388f251a33ea60937564ad1f27cf77243409f06
+59fd5d87a4243a992f3a3e69f3627cf4c509608e
+f5209b4446d185cc95f46363f8043a743530c15a
+9e90c961134929678022aee0c68b16c1ed520614
+4f2aa89cd263932d61f286307771996df76bf63e
+e7b909a68cfb83e4bafdadac39534969ce260518
+01ed30da5d2e718df458f1680fd97751a769c1a2
+2243e2e95e24f4c4b1c6575b874ebe0b837d2208
+8d56ff11708e5809c644a6d687a5dff4551043b4
+713d039426a80ed78e71294cfb5d0a009bb20b42
+51c59870f324805ed30eaa2c0089b4cb5f9f7c71
+35a652859ad76d8bd989025952ecb80d7c5304a4
+ca9e4988ccbde3b11116679f1b023eb75df8017e
+ca66ef500b874de4bf58e05f9d18ccdce64eabbc
+b7b83ac39a177741a378d728d82e87de9b0a01a5
+0dffc83e5b831df1df83dfe32a0c267347f9950b
+d744b44e21a2c908aae23a60da1b4ce35cd925ef
+71d8d1b58aa4025ea73a66a130a98d0ed077f9b1
+16c02145902d8597841a25e8443cfb082898a2d7
+26d92f9276a56d55511a427fb70bd70886af647a
+fa4281bbbcb44d1f8bdac894ad0696535272cc43
+7b139c83c590d4965259aad8889cbb08104b2891
+d291b9af1a1a12f59a464494900c6e0db26e2ec3
+55bdeed9f67a92f184e1ddcdd722e622d9dd10c6
+07793d33b4fba00f5bd1dac78fa038bb0e23fa5c
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 56a2f67..1c0bd41 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -3623,6 +3623,15 @@ L: linux-ide at vger.kernel.org
+ T: git kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev.git
+ S: Supported
+
++SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER
++P: Sathya Perla
++M: sathyap at serverengines.com
++P: Subbu Seetharaman
++M: subbus at serverengines.com
++L: netdev at vger.kernel.org
++W: http://www.serverengines.com
++S: Supported
++
+ SGI SN-IA64 (Altix) SERIAL CONSOLE DRIVER
+ P: Pat Gefre
+ M: pfg at sgi.com
+diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
+index f4182cf..04e05e1 100644
+--- a/drivers/net/Kconfig
++++ b/drivers/net/Kconfig
+@@ -2581,6 +2581,8 @@ config BNX2X
+
+ source "drivers/net/sfc/Kconfig"
+
++source "drivers/net/benet/Kconfig"
++
+ endif # NETDEV_10000
+
+ source "drivers/net/tokenring/Kconfig"
+diff --git a/drivers/net/Makefile b/drivers/net/Makefile
+index dcbfe84..032a745 100644
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -18,6 +18,7 @@ obj-$(CONFIG_BONDING) += bonding/
+ obj-$(CONFIG_ATL1) += atlx/
+ obj-$(CONFIG_GIANFAR) += gianfar_driver.o
+ obj-$(CONFIG_TEHUTI) += tehuti.o
++obj-$(CONFIG_BE2NET) += benet/
+
+ gianfar_driver-objs := gianfar.o \
+ gianfar_ethtool.o \
+diff --git a/drivers/net/benet/Kconfig b/drivers/net/benet/Kconfig
+new file mode 100644
+index 0000000..c6934f1
+--- /dev/null
++++ b/drivers/net/benet/Kconfig
+@@ -0,0 +1,7 @@
++config BE2NET
++ tristate "ServerEngines' 10Gbps NIC - BladeEngine 2"
++ depends on PCI && INET
++ select INET_LRO
++ help
++ This driver implements the NIC functionality for ServerEngines'
++ 10Gbps network adapter - BladeEngine 2.
+diff --git a/drivers/net/benet/Makefile b/drivers/net/benet/Makefile
+new file mode 100644
+index 0000000..a60cd80
+--- /dev/null
++++ b/drivers/net/benet/Makefile
+@@ -0,0 +1,7 @@
++#
++# Makefile to build the network driver for ServerEngine's BladeEngine.
++#
++
++obj-$(CONFIG_BE2NET) += be2net.o
++
++be2net-y := be_main.o be_cmds.o be_ethtool.o
+diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h
+new file mode 100644
+index 0000000..f63730f
+--- /dev/null
++++ b/drivers/net/benet/be.h
+@@ -0,0 +1,394 @@
++/*
++ * Copyright (C) 2005 - 2009 ServerEngines
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation. The full GNU General
++ * Public License is included in this distribution in the file called COPYING.
++ *
++ * Contact Information:
++ * linux-drivers at serverengines.com
++ *
++ * ServerEngines
++ * 209 N. Fair Oaks Ave
++ * Sunnyvale, CA 94085
++ */
++
++#ifndef BE_H
++#define BE_H
++
++#include <linux/pci.h>
++#include <linux/etherdevice.h>
++#include <linux/version.h>
++#include <linux/delay.h>
++#include <net/tcp.h>
++#include <net/ip.h>
++#include <net/ipv6.h>
++#include <linux/if_vlan.h>
++#include <linux/workqueue.h>
++#include <linux/interrupt.h>
++#include <linux/inet_lro.h>
++
++#include "be_hw.h"
++
++#define DRV_VER "2.0.348"
++#define DRV_NAME "be2net"
++#define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
++#define BE3_NAME "ServerEngines BladeEngine3 10Gbps NIC"
++#define OC_NAME "Emulex OneConnect 10Gbps NIC"
++#define OC_NAME1 "Emulex OneConnect 10Gbps NIC (be3)"
++#define DRV_DESC BE_NAME "Driver"
++
++#define BE_VENDOR_ID 0x19a2
++#define BE_DEVICE_ID1 0x211
++#define BE_DEVICE_ID2 0x221
++#define OC_DEVICE_ID1 0x700
++#define OC_DEVICE_ID2 0x701
++#define OC_DEVICE_ID3 0x710
++
++static inline char *nic_name(struct pci_dev *pdev)
++{
++ switch (pdev->device) {
++ case OC_DEVICE_ID1:
++ case OC_DEVICE_ID2:
++ return OC_NAME;
++ case OC_DEVICE_ID3:
++ return OC_NAME1;
++ case BE_DEVICE_ID2:
++ return BE3_NAME;
++ default:
++ return BE_NAME;
++ }
++}
++
++/* Number of bytes of an RX frame that are copied to skb->data */
++#define BE_HDR_LEN 64
++#define BE_MAX_JUMBO_FRAME_SIZE 9018
++#define BE_MIN_MTU 256
++
++#define BE_NUM_VLANS_SUPPORTED 64
++#define BE_MAX_EQD 96
++#define BE_MAX_TX_FRAG_COUNT 30
++
++#define EVNT_Q_LEN 1024
++#define TX_Q_LEN 2048
++#define TX_CQ_LEN 1024
++#define RX_Q_LEN 1024 /* Does not support any other value */
++#define RX_CQ_LEN 1024
++#define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
++#define MCC_CQ_LEN 256
++
++#define BE_NAPI_WEIGHT 64
++#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
++#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
++
++#define BE_MAX_LRO_DESCRIPTORS 16
++#define BE_MAX_FRAGS_PER_FRAME (min((u32) 16, (u32) MAX_SKB_FRAGS))
++
++#define FW_VER_LEN 32
++
++struct be_dma_mem {
++ void *va;
++ dma_addr_t dma;
++ u32 size;
++};
++
++struct be_queue_info {
++ struct be_dma_mem dma_mem;
++ u16 len;
++ u16 entry_size; /* Size of an element in the queue */
++ u16 id;
++ u16 tail, head;
++ bool created;
++ atomic_t used; /* Number of valid elements in the queue */
++};
++
++static inline u32 MODULO(u16 val, u16 limit)
++{
++ BUG_ON(limit & (limit - 1));
++ return val & (limit - 1);
++}
++
++static inline void index_adv(u16 *index, u16 val, u16 limit)
++{
++ *index = MODULO((*index + val), limit);
++}
++
++static inline void index_inc(u16 *index, u16 limit)
++{
++ *index = MODULO((*index + 1), limit);
++}
++
++static inline void *queue_head_node(struct be_queue_info *q)
++{
++ return q->dma_mem.va + q->head * q->entry_size;
++}
++
++static inline void *queue_tail_node(struct be_queue_info *q)
++{
++ return q->dma_mem.va + q->tail * q->entry_size;
++}
++
++static inline void queue_head_inc(struct be_queue_info *q)
++{
++ index_inc(&q->head, q->len);
++}
++
++static inline void queue_tail_inc(struct be_queue_info *q)
++{
++ index_inc(&q->tail, q->len);
++}
++
++struct be_eq_obj {
++ struct be_queue_info q;
++ char desc[32];
++
++ /* Adaptive interrupt coalescing (AIC) info */
++ bool enable_aic;
++ u16 min_eqd; /* in usecs */
++ u16 max_eqd; /* in usecs */
++ u16 cur_eqd; /* in usecs */
++
++ struct napi_struct napi;
++};
++
++struct be_mcc_obj {
++ struct be_queue_info q;
++ struct be_queue_info cq;
++};
++
++struct be_drvr_stats {
++ u32 be_tx_reqs; /* number of TX requests initiated */
++ u32 be_tx_stops; /* number of times TX Q was stopped */
++ u32 be_fwd_reqs; /* number of send reqs through forwarding i/f */
++ u32 be_tx_wrbs; /* number of tx WRBs used */
++ u32 be_tx_events; /* number of tx completion events */
++ u32 be_tx_compl; /* number of tx completion entries processed */
++ ulong be_tx_jiffies;
++ u64 be_tx_bytes;
++ u64 be_tx_bytes_prev;
++ u32 be_tx_rate;
++
++ u32 cache_barrier[16];
++
++ u32 be_ethrx_post_fail;/* number of ethrx buffer alloc failures */
++ u32 be_rx_polls; /* number of times NAPI called poll function */
++ u32 be_rx_events; /* number of ucast rx completion events */
++ u32 be_rx_compl; /* number of rx completion entries processed */
++ u32 be_lro_hgram_data[8]; /* histogram of LRO data packets */
++ u32 be_lro_hgram_ack[8]; /* histogram of LRO ACKs */
++ ulong be_rx_jiffies;
++ u64 be_rx_bytes;
++ u64 be_rx_bytes_prev;
++ u32 be_rx_rate;
++ /* number of non ether type II frames dropped where
++ * frame len > length field of Mac Hdr */
++ u32 be_802_3_dropped_frames;
++ /* number of non ether type II frames malformed where
++ * in frame len < length field of Mac Hdr */
++ u32 be_802_3_malformed_frames;
++ u32 be_rxcp_err; /* Num rx completion entries w/ err set. */
++ ulong rx_fps_jiffies; /* jiffies at last FPS calc */
++ u32 be_rx_frags;
++ u32 be_prev_rx_frags;
++ u32 be_rx_fps; /* Rx frags per second */
++};
++
++struct be_stats_obj {
++ struct be_drvr_stats drvr_stats;
++ struct be_dma_mem cmd;
++};
++
++struct be_tx_obj {
++ struct be_queue_info q;
++ struct be_queue_info cq;
++ /* Remember the skbs that were transmitted */
++ struct sk_buff *sent_skb_list[TX_Q_LEN];
++};
++
++/* Struct to remember the pages posted for rx frags */
++struct be_rx_page_info {
++ struct page *page;
++ dma_addr_t bus;
++ u16 page_offset;
++ bool last_page_user;
++};
++
++struct be_rx_obj {
++ struct be_queue_info q;
++ struct be_queue_info cq;
++ struct be_rx_page_info page_info_tbl[RX_Q_LEN];
++ struct net_lro_mgr lro_mgr;
++ struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS];
++};
++
++#define BE_NUM_MSIX_VECTORS 2 /* 1 each for Tx and Rx */
++struct be_adapter {
++ struct pci_dev *pdev;
++ struct net_device *netdev;
++
++ u8 __iomem *csr;
++ u8 __iomem *db; /* Door Bell */
++ u8 __iomem *pcicfg; /* PCI config space */
++
++ spinlock_t mbox_lock; /* For serializing mbox cmds to BE card */
++ struct be_dma_mem mbox_mem;
++ /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
++ * is stored for freeing purpose */
++ struct be_dma_mem mbox_mem_alloced;
++
++ struct be_mcc_obj mcc_obj;
++ spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
++ spinlock_t mcc_cq_lock;
++
++ struct msix_entry msix_entries[BE_NUM_MSIX_VECTORS];
++ bool msix_enabled;
++ bool isr_registered;
++
++ /* TX Rings */
++ struct be_eq_obj tx_eq;
++ struct be_tx_obj tx_obj;
++
++ u32 cache_line_break[8];
++
++ /* Rx rings */
++ struct be_eq_obj rx_eq;
++ struct be_rx_obj rx_obj;
++ u32 big_page_size; /* Compounded page size shared by rx wrbs */
++ bool rx_post_starved; /* Zero rx frags have been posted to BE */
++
++ struct vlan_group *vlan_grp;
++ u16 num_vlans;
++ u8 vlan_tag[VLAN_GROUP_ARRAY_LEN];
++ struct be_dma_mem mc_cmd_mem;
++
++ struct be_stats_obj stats;
++ /* Work queue used to perform periodic tasks like getting statistics */
++ struct delayed_work work;
++
++ /* Ethtool knobs and info */
++ bool rx_csum; /* BE card must perform rx-checksumming */
++ u32 max_rx_coal;
++ char fw_ver[FW_VER_LEN];
++ u32 if_handle; /* Used to configure filtering */
++ u32 pmac_id; /* MAC addr handle used by BE card */
++
++ bool link_up;
++ u32 port_num;
++ bool promiscuous;
++ bool wol;
++ u32 rx_fc; /* Rx flow control */
++ u32 tx_fc; /* Tx flow control */
++ int link_speed;
++ u8 port_type;
++ u8 transceiver;
++ u8 generation; /* BladeEngine ASIC generation */
++};
++
++/* BladeEngine Generation numbers */
++#define BE_GEN2 2
++#define BE_GEN3 3
++
++extern struct ethtool_ops be_ethtool_ops;
++
++#define drvr_stats(adapter) (&adapter->stats.drvr_stats)
++
++static inline unsigned int be_pci_func(struct be_adapter *adapter)
++{
++ return PCI_FUNC(adapter->pdev->devfn);
++}
++
++#define PAGE_SHIFT_4K 12
++#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
++
++/* Returns number of pages spanned by the data starting at the given addr */
++#define PAGES_4K_SPANNED(_address, size) \
++ ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
++ (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
++
++/* Byte offset into the page corresponding to given address */
++#define OFFSET_IN_PAGE(addr) \
++ ((size_t)(addr) & (PAGE_SIZE_4K-1))
++
++/* Returns bit offset within a DWORD of a bitfield */
++#define AMAP_BIT_OFFSET(_struct, field) \
++ (((size_t)&(((_struct *)0)->field))%32)
++
++/* Returns the bit mask of the field that is NOT shifted into location. */
++static inline u32 amap_mask(u32 bitsize)
++{
++ return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
++}
++
++static inline void
++amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
++{
++ u32 *dw = (u32 *) ptr + dw_offset;
++ *dw &= ~(mask << offset);
++ *dw |= (mask & value) << offset;
++}
++
++#define AMAP_SET_BITS(_struct, field, ptr, val) \
++ amap_set(ptr, \
++ offsetof(_struct, field)/32, \
++ amap_mask(sizeof(((_struct *)0)->field)), \
++ AMAP_BIT_OFFSET(_struct, field), \
++ val)
++
++static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
++{
++ u32 *dw = (u32 *) ptr;
++ return mask & (*(dw + dw_offset) >> offset);
++}
++
++#define AMAP_GET_BITS(_struct, field, ptr) \
++ amap_get(ptr, \
++ offsetof(_struct, field)/32, \
++ amap_mask(sizeof(((_struct *)0)->field)), \
++ AMAP_BIT_OFFSET(_struct, field))
++
++#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
++#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
++static inline void swap_dws(void *wrb, int len)
++{
++#ifdef __BIG_ENDIAN
++ u32 *dw = wrb;
++ BUG_ON(len % 4);
++ do {
++ *dw = cpu_to_le32(*dw);
++ dw++;
++ len -= 4;
++ } while (len);
++#endif /* __BIG_ENDIAN */
++}
++
++static inline u8 is_tcp_pkt(struct sk_buff *skb)
++{
++ u8 val = 0;
++
++ if (ip_hdr(skb)->version == 4)
++ val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
++ else if (ip_hdr(skb)->version == 6)
++ val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
++
++ return val;
++}
++
++static inline u8 is_udp_pkt(struct sk_buff *skb)
++{
++ u8 val = 0;
++
++ if (ip_hdr(skb)->version == 4)
++ val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
++ else if (ip_hdr(skb)->version == 6)
++ val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
++
++ return val;
++}
++
++extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
++ u16 num_popped);
++extern void be_link_status_update(struct be_adapter *adapter, bool link_up);
++extern void netdev_stats_update(struct be_adapter *adapter);
++#endif /* BE_H */
+diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
+new file mode 100644
+index 0000000..f3ba2e8
+--- /dev/null
++++ b/drivers/net/benet/be_cmds.c
+@@ -0,0 +1,1407 @@
++/*
++ * Copyright (C) 2005 - 2009 ServerEngines
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation. The full GNU General
++ * Public License is included in this distribution in the file called COPYING.
++ *
++ * Contact Information:
++ * linux-drivers at serverengines.com
++ *
++ * ServerEngines
++ * 209 N. Fair Oaks Ave
++ * Sunnyvale, CA 94085
++ */
++
++#include "be.h"
++#include "be_cmds.h"
++
++static void be_mcc_notify(struct be_adapter *adapter)
++{
++ struct be_queue_info *mccq = &adapter->mcc_obj.q;
++ u32 val = 0;
++
++ val |= mccq->id & DB_MCCQ_RING_ID_MASK;
++ val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT;
++ iowrite32(val, adapter->db + DB_MCCQ_OFFSET);
++}
++
++/* To check if valid bit is set, check the entire word as we don't know
++ * the endianness of the data (old entry is host endian while a new entry is
++ * little endian) */
++static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl)
++{
++ if (compl->flags != 0) {
++ compl->flags = le32_to_cpu(compl->flags);
++ BUG_ON((compl->flags & CQE_FLAGS_VALID_MASK) == 0);
++ return true;
++ } else {
++ return false;
++ }
++}
++
++/* Need to reset the entire word that houses the valid bit */
++static inline void be_mcc_compl_use(struct be_mcc_compl *compl)
++{
++ compl->flags = 0;
++}
++
++static int be_mcc_compl_process(struct be_adapter *adapter,
++ struct be_mcc_compl *compl)
++{
++ u16 compl_status, extd_status;
++
++ /* Just swap the status to host endian; mcc tag is opaquely copied
++ * from mcc_wrb */
++ be_dws_le_to_cpu(compl, 4);
++
++ compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) &
++ CQE_STATUS_COMPL_MASK;
++ if (compl_status == MCC_STATUS_SUCCESS) {
++ if (compl->tag0 == OPCODE_ETH_GET_STATISTICS) {
++ struct be_cmd_resp_get_stats *resp =
++ adapter->stats.cmd.va;
++ be_dws_le_to_cpu(&resp->hw_stats,
++ sizeof(resp->hw_stats));
++ netdev_stats_update(adapter);
++ }
++ } else if (compl_status != MCC_STATUS_NOT_SUPPORTED) {
++ extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) &
++ CQE_STATUS_EXTD_MASK;
++ dev_warn(&adapter->pdev->dev,
++ "Error in cmd completion - opcode %d, compl %d, extd %d\n",
++ compl->tag0, compl_status, extd_status);
++ }
++ return compl_status;
++}
++
++/* Link state evt is a string of bytes; no need for endian swapping */
++static void be_async_link_state_process(struct be_adapter *adapter,
++ struct be_async_event_link_state *evt)
++{
++ be_link_status_update(adapter,
++ evt->port_link_status == ASYNC_EVENT_LINK_UP);
++}
++
++static inline bool is_link_state_evt(u32 trailer)
++{
++ return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
++ ASYNC_TRAILER_EVENT_CODE_MASK) ==
++ ASYNC_EVENT_CODE_LINK_STATE);
++}
++
++static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter)
++{
++ struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq;
++ struct be_mcc_compl *compl = queue_tail_node(mcc_cq);
++
++ if (be_mcc_compl_is_new(compl)) {
++ queue_tail_inc(mcc_cq);
++ return compl;
++ }
++ return NULL;
++}
++
++int be_process_mcc(struct be_adapter *adapter)
++{
++ struct be_mcc_compl *compl;
++ int num = 0, status = 0;
++
++ spin_lock_bh(&adapter->mcc_cq_lock);
++ while ((compl = be_mcc_compl_get(adapter))) {
++ if (compl->flags & CQE_FLAGS_ASYNC_MASK) {
++ /* Interpret flags as an async trailer */
++ BUG_ON(!is_link_state_evt(compl->flags));
++
++ /* Interpret compl as a async link evt */
++ be_async_link_state_process(adapter,
++ (struct be_async_event_link_state *) compl);
++ } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) {
++ status = be_mcc_compl_process(adapter, compl);
++ atomic_dec(&adapter->mcc_obj.q.used);
++ }
++ be_mcc_compl_use(compl);
++ num++;
++ }
++
++ if (num)
++ be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, num);
++
++ spin_unlock_bh(&adapter->mcc_cq_lock);
++ return status;
++}
++
++/* Wait till no more pending mcc requests are present */
++static int be_mcc_wait_compl(struct be_adapter *adapter)
++{
++#define mcc_timeout 120000 /* 12s timeout */
++ int i, status;
++ for (i = 0; i < mcc_timeout; i++) {
++ status = be_process_mcc(adapter);
++ if (status)
++ return status;
++
++ if (atomic_read(&adapter->mcc_obj.q.used) == 0)
++ break;
++ udelay(100);
++ }
++ if (i == mcc_timeout) {
++ dev_err(&adapter->pdev->dev, "mccq poll timed out\n");
++ return -1;
++ }
++ return 0;
++}
++
++/* Notify MCC requests and wait for completion */
++static int be_mcc_notify_wait(struct be_adapter *adapter)
++{
++ be_mcc_notify(adapter);
++ return be_mcc_wait_compl(adapter);
++}
++
++static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db)
++{
++ int cnt = 0, wait = 5;
++ u32 ready;
++
++ do {
++ ready = ioread32(db) & MPU_MAILBOX_DB_RDY_MASK;
++ if (ready)
++ break;
++
++ if (cnt > 200000) {
++ dev_err(&adapter->pdev->dev, "mbox poll timed out\n");
++ return -1;
++ }
++
++ if (cnt > 50)
++ wait = 200;
++ cnt += wait;
++ udelay(wait);
++ } while (true);
++
++ return 0;
++}
++
++/*
++ * Insert the mailbox address into the doorbell in two steps
++ * Polls on the mbox doorbell till a command completion (or a timeout) occurs
++ */
++static int be_mbox_notify_wait(struct be_adapter *adapter)
++{
++ int status;
++ u32 val = 0;
++ void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET;
++ struct be_dma_mem *mbox_mem = &adapter->mbox_mem;
++ struct be_mcc_mailbox *mbox = mbox_mem->va;
++ struct be_mcc_compl *compl = &mbox->compl;
++
++ val |= MPU_MAILBOX_DB_HI_MASK;
++ /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
++ val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
++ iowrite32(val, db);
++
++ /* wait for ready to be set */
++ status = be_mbox_db_ready_wait(adapter, db);
++ if (status != 0)
++ return status;
++
++ val = 0;
++ /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */
++ val |= (u32)(mbox_mem->dma >> 4) << 2;
++ iowrite32(val, db);
++
++ status = be_mbox_db_ready_wait(adapter, db);
++ if (status != 0)
++ return status;
++
++ /* A cq entry has been made now */
++ if (be_mcc_compl_is_new(compl)) {
++ status = be_mcc_compl_process(adapter, &mbox->compl);
++ be_mcc_compl_use(compl);
++ if (status)
++ return status;
++ } else {
++ dev_err(&adapter->pdev->dev, "invalid mailbox completion\n");
++ return -1;
++ }
++ return 0;
++}
++
++static int be_POST_stage_get(struct be_adapter *adapter, u16 *stage)
++{
++ u32 sem = ioread32(adapter->csr + MPU_EP_SEMAPHORE_OFFSET);
++
++ *stage = sem & EP_SEMAPHORE_POST_STAGE_MASK;
++ if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK)
++ return -1;
++ else
++ return 0;
++}
++
++int be_cmd_POST(struct be_adapter *adapter)
++{
++ u16 stage;
++ int status, timeout = 0;
++
++ do {
++ status = be_POST_stage_get(adapter, &stage);
++ if (status) {
++ dev_err(&adapter->pdev->dev, "POST error; stage=0x%x\n",
++ stage);
++ return -1;
++ } else if (stage != POST_STAGE_ARMFW_RDY) {
++ set_current_state(TASK_INTERRUPTIBLE);
++ schedule_timeout(2 * HZ);
++ timeout += 2;
++ } else {
++ return 0;
++ }
++ } while (timeout < 20);
++
++ dev_err(&adapter->pdev->dev, "POST timeout; stage=0x%x\n", stage);
++ return -1;
++}
++
++static inline void *embedded_payload(struct be_mcc_wrb *wrb)
++{
++ return wrb->payload.embedded_payload;
++}
++
++static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
++{
++ return &wrb->payload.sgl[0];
++}
++
++/* Don't touch the hdr after it's prepared */
++static void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
++ bool embedded, u8 sge_cnt, u32 opcode)
++{
++ if (embedded)
++ wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
++ else
++ wrb->embedded |= (sge_cnt & MCC_WRB_SGE_CNT_MASK) <<
++ MCC_WRB_SGE_CNT_SHIFT;
++ wrb->payload_length = payload_len;
++ wrb->tag0 = opcode;
++ be_dws_cpu_to_le(wrb, 8);
++}
++
++/* Don't touch the hdr after it's prepared */
++static void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
++ u8 subsystem, u8 opcode, int cmd_len)
++{
++ req_hdr->opcode = opcode;
++ req_hdr->subsystem = subsystem;
++ req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
++ req_hdr->version = 0;
++}
++
++static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
++ struct be_dma_mem *mem)
++{
++ int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
++ u64 dma = (u64)mem->dma;
++
++ for (i = 0; i < buf_pages; i++) {
++ pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF);
++ pages[i].hi = cpu_to_le32(upper_32_bits(dma));
++ dma += PAGE_SIZE_4K;
++ }
++}
++
++/* Converts interrupt delay in microseconds to multiplier value */
++static u32 eq_delay_to_mult(u32 usec_delay)
++{
++#define MAX_INTR_RATE 651042
++ const u32 round = 10;
++ u32 multiplier;
++
++ if (usec_delay == 0)
++ multiplier = 0;
++ else {
++ u32 interrupt_rate = 1000000 / usec_delay;
++ /* Max delay, corresponding to the lowest interrupt rate */
++ if (interrupt_rate == 0)
++ multiplier = 1023;
++ else {
++ multiplier = (MAX_INTR_RATE - interrupt_rate) * round;
++ multiplier /= interrupt_rate;
++ /* Round the multiplier to the closest value.*/
++ multiplier = (multiplier + round/2) / round;
++ multiplier = min(multiplier, (u32)1023);
++ }
++ }
++ return multiplier;
++}
++
++static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter)
++{
++ struct be_dma_mem *mbox_mem = &adapter->mbox_mem;
++ struct be_mcc_wrb *wrb
++ = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb;
++ memset(wrb, 0, sizeof(*wrb));
++ return wrb;
++}
++
++static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter)
++{
++ struct be_queue_info *mccq = &adapter->mcc_obj.q;
++ struct be_mcc_wrb *wrb;
++
++ if (atomic_read(&mccq->used) >= mccq->len) {
++ dev_err(&adapter->pdev->dev, "Out of MCCQ wrbs\n");
++ return NULL;
++ }
++
++ wrb = queue_head_node(mccq);
++ queue_head_inc(mccq);
++ atomic_inc(&mccq->used);
++ memset(wrb, 0, sizeof(*wrb));
++ return wrb;
++}
++
++/* Tell fw we're about to start firing cmds by writing a
++ * special pattern across the wrb hdr; uses mbox
++ */
++int be_cmd_fw_init(struct be_adapter *adapter)
++{
++ u8 *wrb;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = (u8 *)wrb_from_mbox(adapter);
++ *wrb++ = 0xFF;
++ *wrb++ = 0x12;
++ *wrb++ = 0x34;
++ *wrb++ = 0xFF;
++ *wrb++ = 0xFF;
++ *wrb++ = 0x56;
++ *wrb++ = 0x78;
++ *wrb = 0xFF;
++
++ status = be_mbox_notify_wait(adapter);
++
++ spin_unlock(&adapter->mbox_lock);
++ return status;
++}
++
++/* Tell fw we're done with firing cmds by writing a
++ * special pattern across the wrb hdr; uses mbox
++ */
++int be_cmd_fw_clean(struct be_adapter *adapter)
++{
++ u8 *wrb;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = (u8 *)wrb_from_mbox(adapter);
++ *wrb++ = 0xFF;
++ *wrb++ = 0xAA;
++ *wrb++ = 0xBB;
++ *wrb++ = 0xFF;
++ *wrb++ = 0xFF;
++ *wrb++ = 0xCC;
++ *wrb++ = 0xDD;
++ *wrb = 0xFF;
++
++ status = be_mbox_notify_wait(adapter);
++
++ spin_unlock(&adapter->mbox_lock);
++ return status;
++}
++int be_cmd_eq_create(struct be_adapter *adapter,
++ struct be_queue_info *eq, int eq_delay)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_eq_create *req;
++ struct be_dma_mem *q_mem = &eq->dma_mem;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, OPCODE_COMMON_EQ_CREATE);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_EQ_CREATE, sizeof(*req));
++
++ req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
++
++ AMAP_SET_BITS(struct amap_eq_context, func, req->context,
++ be_pci_func(adapter));
++ AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
++ /* 4byte eqe*/
++ AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
++ AMAP_SET_BITS(struct amap_eq_context, count, req->context,
++ __ilog2_u32(eq->len/256));
++ AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context,
++ eq_delay_to_mult(eq_delay));
++ be_dws_cpu_to_le(req->context, sizeof(req->context));
++
++ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_eq_create *resp = embedded_payload(wrb);
++ eq->id = le16_to_cpu(resp->eq_id);
++ eq->created = true;
++ }
++
++ spin_unlock(&adapter->mbox_lock);
++ return status;
++}
++
++/* Uses mbox */
++int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
++ u8 type, bool permanent, u32 if_handle)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_mac_query *req;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_NTWK_MAC_QUERY);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req));
++
++ req->type = type;
++ if (permanent) {
++ req->permanent = 1;
++ } else {
++ req->if_id = cpu_to_le16((u16) if_handle);
++ req->permanent = 0;
++ }
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_mac_query *resp = embedded_payload(wrb);
++ memcpy(mac_addr, resp->mac.addr, ETH_ALEN);
++ }
++
++ spin_unlock(&adapter->mbox_lock);
++ return status;
++}
++
++/* Uses synchronous MCCQ */
++int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
++ u32 if_id, u32 *pmac_id)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_pmac_add *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_NTWK_PMAC_ADD);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req));
++
++ req->if_id = cpu_to_le32(if_id);
++ memcpy(req->mac_address, mac_addr, ETH_ALEN);
++
++ status = be_mcc_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb);
++ *pmac_id = le32_to_cpu(resp->pmac_id);
++ }
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses synchronous MCCQ */
++int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_pmac_del *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_NTWK_PMAC_DEL);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req));
++
++ req->if_id = cpu_to_le32(if_id);
++ req->pmac_id = cpu_to_le32(pmac_id);
++
++ status = be_mcc_notify_wait(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses Mbox */
++int be_cmd_cq_create(struct be_adapter *adapter,
++ struct be_queue_info *cq, struct be_queue_info *eq,
++ bool sol_evts, bool no_delay, int coalesce_wm)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_cq_create *req;
++ struct be_dma_mem *q_mem = &cq->dma_mem;
++ void *ctxt;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++ ctxt = &req->context;
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_CQ_CREATE);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_CQ_CREATE, sizeof(*req));
++
++ req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
++
++ AMAP_SET_BITS(struct amap_cq_context, coalescwm, ctxt, coalesce_wm);
++ AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
++ AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
++ __ilog2_u32(cq->len/256));
++ AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
++ AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
++ AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
++ AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
++ AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1);
++ AMAP_SET_BITS(struct amap_cq_context, func, ctxt, be_pci_func(adapter));
++ be_dws_cpu_to_le(ctxt, sizeof(req->context));
++
++ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_cq_create *resp = embedded_payload(wrb);
++ cq->id = le16_to_cpu(resp->cq_id);
++ cq->created = true;
++ }
++
++ spin_unlock(&adapter->mbox_lock);
++
++ return status;
++}
++
++static u32 be_encoded_q_len(int q_len)
++{
++ u32 len_encoded = fls(q_len); /* log2(len) + 1 */
++ if (len_encoded == 16)
++ len_encoded = 0;
++ return len_encoded;
++}
++
++int be_cmd_mccq_create(struct be_adapter *adapter,
++ struct be_queue_info *mccq,
++ struct be_queue_info *cq)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_mcc_create *req;
++ struct be_dma_mem *q_mem = &mccq->dma_mem;
++ void *ctxt;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++ ctxt = &req->context;
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_MCC_CREATE);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_MCC_CREATE, sizeof(*req));
++
++ req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
++
++ AMAP_SET_BITS(struct amap_mcc_context, fid, ctxt, be_pci_func(adapter));
++ AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1);
++ AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt,
++ be_encoded_q_len(mccq->len));
++ AMAP_SET_BITS(struct amap_mcc_context, cq_id, ctxt, cq->id);
++
++ be_dws_cpu_to_le(ctxt, sizeof(req->context));
++
++ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb);
++ mccq->id = le16_to_cpu(resp->id);
++ mccq->created = true;
++ }
++ spin_unlock(&adapter->mbox_lock);
++
++ return status;
++}
++
++int be_cmd_txq_create(struct be_adapter *adapter,
++ struct be_queue_info *txq,
++ struct be_queue_info *cq)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_eth_tx_create *req;
++ struct be_dma_mem *q_mem = &txq->dma_mem;
++ void *ctxt;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++ ctxt = &req->context;
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_ETH_TX_CREATE);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_TX_CREATE,
++ sizeof(*req));
++
++ req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
++ req->ulp_num = BE_ULP1_NUM;
++ req->type = BE_ETH_TX_RING_TYPE_STANDARD;
++
++ AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt,
++ be_encoded_q_len(txq->len));
++ AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt,
++ be_pci_func(adapter));
++ AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1);
++ AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id);
++
++ be_dws_cpu_to_le(ctxt, sizeof(req->context));
++
++ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb);
++ txq->id = le16_to_cpu(resp->cid);
++ txq->created = true;
++ }
++
++ spin_unlock(&adapter->mbox_lock);
++
++ return status;
++}
++
++/* Uses mbox */
++int be_cmd_rxq_create(struct be_adapter *adapter,
++ struct be_queue_info *rxq, u16 cq_id, u16 frag_size,
++ u16 max_frame_size, u32 if_id, u32 rss)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_eth_rx_create *req;
++ struct be_dma_mem *q_mem = &rxq->dma_mem;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_ETH_RX_CREATE);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_RX_CREATE,
++ sizeof(*req));
++
++ req->cq_id = cpu_to_le16(cq_id);
++ req->frag_size = fls(frag_size) - 1;
++ req->num_pages = 2;
++ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
++ req->interface_id = cpu_to_le32(if_id);
++ req->max_frame_size = cpu_to_le16(max_frame_size);
++ req->rss_queue = cpu_to_le32(rss);
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb);
++ rxq->id = le16_to_cpu(resp->id);
++ rxq->created = true;
++ }
++
++ spin_unlock(&adapter->mbox_lock);
++
++ return status;
++}
++
++/* Generic destroyer function for all types of queues
++ * Uses Mbox
++ */
++int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
++ int queue_type)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_q_destroy *req;
++ u8 subsys = 0, opcode = 0;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ switch (queue_type) {
++ case QTYPE_EQ:
++ subsys = CMD_SUBSYSTEM_COMMON;
++ opcode = OPCODE_COMMON_EQ_DESTROY;
++ break;
++ case QTYPE_CQ:
++ subsys = CMD_SUBSYSTEM_COMMON;
++ opcode = OPCODE_COMMON_CQ_DESTROY;
++ break;
++ case QTYPE_TXQ:
++ subsys = CMD_SUBSYSTEM_ETH;
++ opcode = OPCODE_ETH_TX_DESTROY;
++ break;
++ case QTYPE_RXQ:
++ subsys = CMD_SUBSYSTEM_ETH;
++ opcode = OPCODE_ETH_RX_DESTROY;
++ break;
++ case QTYPE_MCCQ:
++ subsys = CMD_SUBSYSTEM_COMMON;
++ opcode = OPCODE_COMMON_MCC_DESTROY;
++ break;
++ default:
++ BUG();
++ }
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, opcode);
++
++ be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req));
++ req->id = cpu_to_le16(q->id);
++
++ status = be_mbox_notify_wait(adapter);
++
++ spin_unlock(&adapter->mbox_lock);
++
++ return status;
++}
++
++/* Create an rx filtering policy configuration on an i/f
++ * Uses mbox
++ */
++int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
++ u8 *mac, bool pmac_invalid, u32 *if_handle, u32 *pmac_id)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_if_create *req;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_NTWK_INTERFACE_CREATE);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req));
++
++ req->capability_flags = cpu_to_le32(cap_flags);
++ req->enable_flags = cpu_to_le32(en_flags);
++ req->pmac_invalid = pmac_invalid;
++ if (!pmac_invalid)
++ memcpy(req->mac_addr, mac, ETH_ALEN);
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_if_create *resp = embedded_payload(wrb);
++ *if_handle = le32_to_cpu(resp->interface_id);
++ if (!pmac_invalid)
++ *pmac_id = le32_to_cpu(resp->pmac_id);
++ }
++
++ spin_unlock(&adapter->mbox_lock);
++ return status;
++}
++
++/* Uses mbox */
++int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_if_destroy *req;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_NTWK_INTERFACE_DESTROY);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req));
++
++ req->interface_id = cpu_to_le32(interface_id);
++
++ status = be_mbox_notify_wait(adapter);
++
++ spin_unlock(&adapter->mbox_lock);
++
++ return status;
++}
++
++/* Get stats is a non embedded command: the request is not embedded inside
++ * WRB but is a separate dma memory block
++ * Uses asynchronous MCC
++ */
++int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_get_stats *req;
++ struct be_sge *sge;
++ int status = 0;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = nonemb_cmd->va;
++ sge = nonembedded_sgl(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1,
++ OPCODE_ETH_GET_STATISTICS);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
++ OPCODE_ETH_GET_STATISTICS, sizeof(*req));
++ sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
++ sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
++ sge->len = cpu_to_le32(nonemb_cmd->size);
++
++ be_mcc_notify(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses synchronous mcc */
++int be_cmd_link_status_query(struct be_adapter *adapter,
++ bool *link_up, u8 *mac_speed, u16 *link_speed)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_link_status *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ *link_up = false;
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_NTWK_LINK_STATUS_QUERY);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req));
++
++ status = be_mcc_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_link_status *resp = embedded_payload(wrb);
++ if (resp->mac_speed != PHY_LINK_SPEED_ZERO) {
++ *link_up = true;
++ *link_speed = le16_to_cpu(resp->link_speed);
++ *mac_speed = resp->mac_speed;
++ }
++ }
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses Mbox */
++int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_get_fw_version *req;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_GET_FW_VERSION);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_GET_FW_VERSION, sizeof(*req));
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
++ strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN);
++ }
++
++ spin_unlock(&adapter->mbox_lock);
++ return status;
++}
++
++/* set the EQ delay interval of an EQ to specified value
++ * Uses async mcc
++ */
++int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_modify_eq_delay *req;
++ int status = 0;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_MODIFY_EQ_DELAY);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req));
++
++ req->num_eq = cpu_to_le32(1);
++ req->delay[0].eq_id = cpu_to_le32(eq_id);
++ req->delay[0].phase = 0;
++ req->delay[0].delay_multiplier = cpu_to_le32(eqd);
++
++ be_mcc_notify(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses sycnhronous mcc */
++int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
++ u32 num, bool untagged, bool promiscuous)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_vlan_config *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_NTWK_VLAN_CONFIG);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req));
++
++ req->interface_id = if_id;
++ req->promiscuous = promiscuous;
++ req->untagged = untagged;
++ req->num_vlan = num;
++ if (!promiscuous) {
++ memcpy(req->normal_vlan, vtag_array,
++ req->num_vlan * sizeof(vtag_array[0]));
++ }
++
++ status = be_mcc_notify_wait(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses MCC for this command as it may be called in BH context
++ * Uses synchronous mcc
++ */
++int be_cmd_promiscuous_config(struct be_adapter *adapter, u8 port_num, bool en)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_promiscuous_config *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, OPCODE_ETH_PROMISCUOUS);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
++ OPCODE_ETH_PROMISCUOUS, sizeof(*req));
++
++ if (port_num)
++ req->port1_promiscuous = en;
++ else
++ req->port0_promiscuous = en;
++
++ status = be_mcc_notify_wait(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/*
++ * Uses MCC for this command as it may be called in BH context
++ * (mc == NULL) => multicast promiscous
++ */
++int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id,
++ struct dev_mc_list *mc_list, u32 mc_count,
++ struct be_dma_mem *mem)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_mcast_mac_config *req = mem->va;
++ struct be_sge *sge;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ sge = nonembedded_sgl(wrb);
++ memset(req, 0, sizeof(*req));
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1,
++ OPCODE_COMMON_NTWK_MULTICAST_SET);
++ sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma));
++ sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF);
++ sge->len = cpu_to_le32(mem->size);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_NTWK_MULTICAST_SET, sizeof(*req));
++
++ req->interface_id = if_id;
++ if (mc_list) {
++ int i;
++ struct dev_mc_list *mc;
++
++ req->num_mac = cpu_to_le16(mc_count);
++
++ for (mc = mc_list, i = 0; mc; mc = mc->next, i++)
++ memcpy(req->mac[i].byte, mc->dmi_addr, ETH_ALEN);
++ } else {
++ req->promiscuous = 1;
++ }
++
++ status = be_mcc_notify_wait(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses synchrounous mcc */
++int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_set_flow_control *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_SET_FLOW_CONTROL);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req));
++
++ req->tx_flow_control = cpu_to_le16((u16)tx_fc);
++ req->rx_flow_control = cpu_to_le16((u16)rx_fc);
++
++ status = be_mcc_notify_wait(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses sycn mcc */
++int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_get_flow_control *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_GET_FLOW_CONTROL);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req));
++
++ status = be_mcc_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_get_flow_control *resp =
++ embedded_payload(wrb);
++ *tx_fc = le16_to_cpu(resp->tx_flow_control);
++ *rx_fc = le16_to_cpu(resp->rx_flow_control);
++ }
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses mbox */
++int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_query_fw_cfg *req;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_QUERY_FIRMWARE_CONFIG);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req));
++
++ status = be_mbox_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb);
++ *port_num = le32_to_cpu(resp->phys_port);
++ }
++
++ spin_unlock(&adapter->mbox_lock);
++ return status;
++}
++
++/* Uses mbox */
++int be_cmd_reset_function(struct be_adapter *adapter)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_hdr *req;
++ int status;
++
++ spin_lock(&adapter->mbox_lock);
++
++ wrb = wrb_from_mbox(adapter);
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_FUNCTION_RESET);
++
++ be_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_FUNCTION_RESET, sizeof(*req));
++
++ status = be_mbox_notify_wait(adapter);
++
++ spin_unlock(&adapter->mbox_lock);
++ return status;
++}
++
++/* Uses sync mcc */
++int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num,
++ u8 bcn, u8 sts, u8 state)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_enable_disable_beacon *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_ENABLE_DISABLE_BEACON);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req));
++
++ req->port_num = port_num;
++ req->beacon_state = state;
++ req->beacon_duration = bcn;
++ req->status_duration = sts;
++
++ status = be_mcc_notify_wait(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses sync mcc */
++int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_get_beacon_state *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
++ OPCODE_COMMON_GET_BEACON_STATE);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req));
++
++ req->port_num = port_num;
++
++ status = be_mcc_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_get_beacon_state *resp =
++ embedded_payload(wrb);
++ *state = resp->beacon_state;
++ }
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++/* Uses sync mcc */
++int be_cmd_read_port_type(struct be_adapter *adapter, u32 port,
++ u8 *connector)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_port_type *req;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = embedded_payload(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(struct be_cmd_resp_port_type), true, 0,
++ OPCODE_COMMON_READ_TRANSRECV_DATA);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
++ OPCODE_COMMON_READ_TRANSRECV_DATA, sizeof(*req));
++
++ req->port = cpu_to_le32(port);
++ req->page_num = cpu_to_le32(TR_PAGE_A0);
++ status = be_mcc_notify_wait(adapter);
++ if (!status) {
++ struct be_cmd_resp_port_type *resp = embedded_payload(wrb);
++ *connector = resp->data.connector;
++ }
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
++
++extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
++ struct be_dma_mem *nonemb_cmd)
++{
++ struct be_mcc_wrb *wrb;
++ struct be_cmd_req_acpi_wol_magic_config *req;
++ struct be_sge *sge;
++ int status;
++
++ spin_lock_bh(&adapter->mcc_lock);
++
++ wrb = wrb_from_mccq(adapter);
++ if (!wrb) {
++ status = -EBUSY;
++ goto err;
++ }
++ req = nonemb_cmd->va;
++ sge = nonembedded_sgl(wrb);
++
++ be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1,
++ OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG);
++
++ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
++ OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req));
++ memcpy(req->magic_mac, mac, ETH_ALEN);
++
++ sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
++ sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
++ sge->len = cpu_to_le32(nonemb_cmd->size);
++
++ status = be_mcc_notify_wait(adapter);
++
++err:
++ spin_unlock_bh(&adapter->mcc_lock);
++ return status;
++}
+diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h
+new file mode 100644
+index 0000000..ecb477c
+--- /dev/null
++++ b/drivers/net/benet/be_cmds.h
+@@ -0,0 +1,846 @@
++/*
++ * Copyright (C) 2005 - 2009 ServerEngines
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation. The full GNU General
++ * Public License is included in this distribution in the file called COPYING.
++ *
++ * Contact Information:
++ * linux-drivers at serverengines.com
++ *
++ * ServerEngines
++ * 209 N. Fair Oaks Ave
++ * Sunnyvale, CA 94085
++ */
++
++/*
++ * The driver sends configuration and managements command requests to the
++ * firmware in the BE. These requests are communicated to the processor
++ * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
++ * WRB inside a MAILBOX.
++ * The commands are serviced by the ARM processor in the BladeEngine's MPU.
++ */
++
++struct be_sge {
++ u32 pa_lo;
++ u32 pa_hi;
++ u32 len;
++};
++
++#define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/
++#define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
++#define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
++struct be_mcc_wrb {
++ u32 embedded; /* dword 0 */
++ u32 payload_length; /* dword 1 */
++ u32 tag0; /* dword 2 */
++ u32 tag1; /* dword 3 */
++ u32 rsvd; /* dword 4 */
++ union {
++ u8 embedded_payload[236]; /* used by embedded cmds */
++ struct be_sge sgl[19]; /* used by non-embedded cmds */
++ } payload;
++};
++
++#define CQE_FLAGS_VALID_MASK (1 << 31)
++#define CQE_FLAGS_ASYNC_MASK (1 << 30)
++#define CQE_FLAGS_COMPLETED_MASK (1 << 28)
++#define CQE_FLAGS_CONSUMED_MASK (1 << 27)
++
++/* Completion Status */
++enum {
++ MCC_STATUS_SUCCESS = 0x0,
++/* The client does not have sufficient privileges to execute the command */
++ MCC_STATUS_INSUFFICIENT_PRIVILEGES = 0x1,
++/* A parameter in the command was invalid. */
++ MCC_STATUS_INVALID_PARAMETER = 0x2,
++/* There are insufficient chip resources to execute the command */
++ MCC_STATUS_INSUFFICIENT_RESOURCES = 0x3,
++/* The command is completing because the queue was getting flushed */
++ MCC_STATUS_QUEUE_FLUSHING = 0x4,
++/* The command is completing with a DMA error */
++ MCC_STATUS_DMA_FAILED = 0x5,
++ MCC_STATUS_NOT_SUPPORTED = 66
++};
++
++#define CQE_STATUS_COMPL_MASK 0xFFFF
++#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
++#define CQE_STATUS_EXTD_MASK 0xFFFF
++#define CQE_STATUS_EXTD_SHIFT 16 /* bits 16 - 31 */
++
++struct be_mcc_compl {
++ u32 status; /* dword 0 */
++ u32 tag0; /* dword 1 */
++ u32 tag1; /* dword 2 */
++ u32 flags; /* dword 3 */
++};
++
++/* When the async bit of mcc_compl is set, the last 4 bytes of
++ * mcc_compl is interpreted as follows:
++ */
++#define ASYNC_TRAILER_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
++#define ASYNC_TRAILER_EVENT_CODE_MASK 0xFF
++#define ASYNC_EVENT_CODE_LINK_STATE 0x1
++struct be_async_event_trailer {
++ u32 code;
++};
++
++enum {
++ ASYNC_EVENT_LINK_DOWN = 0x0,
++ ASYNC_EVENT_LINK_UP = 0x1
++};
++
++/* When the event code of an async trailer is link-state, the mcc_compl
++ * must be interpreted as follows
++ */
++struct be_async_event_link_state {
++ u8 physical_port;
++ u8 port_link_status;
++ u8 port_duplex;
++ u8 port_speed;
++ u8 port_fault;
++ u8 rsvd0[7];
++ struct be_async_event_trailer trailer;
++} __packed;
++
++struct be_mcc_mailbox {
++ struct be_mcc_wrb wrb;
++ struct be_mcc_compl compl;
++};
++
++#define CMD_SUBSYSTEM_COMMON 0x1
++#define CMD_SUBSYSTEM_ETH 0x3
++
++#define OPCODE_COMMON_NTWK_MAC_QUERY 1
++#define OPCODE_COMMON_NTWK_MAC_SET 2
++#define OPCODE_COMMON_NTWK_MULTICAST_SET 3
++#define OPCODE_COMMON_NTWK_VLAN_CONFIG 4
++#define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5
++#define OPCODE_COMMON_CQ_CREATE 12
++#define OPCODE_COMMON_EQ_CREATE 13
++#define OPCODE_COMMON_MCC_CREATE 21
++#define OPCODE_COMMON_NTWK_RX_FILTER 34
++#define OPCODE_COMMON_GET_FW_VERSION 35
++#define OPCODE_COMMON_SET_FLOW_CONTROL 36
++#define OPCODE_COMMON_GET_FLOW_CONTROL 37
++#define OPCODE_COMMON_SET_FRAME_SIZE 39
++#define OPCODE_COMMON_MODIFY_EQ_DELAY 41
++#define OPCODE_COMMON_FIRMWARE_CONFIG 42
++#define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50
++#define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51
++#define OPCODE_COMMON_MCC_DESTROY 53
++#define OPCODE_COMMON_CQ_DESTROY 54
++#define OPCODE_COMMON_EQ_DESTROY 55
++#define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
++#define OPCODE_COMMON_NTWK_PMAC_ADD 59
++#define OPCODE_COMMON_NTWK_PMAC_DEL 60
++#define OPCODE_COMMON_FUNCTION_RESET 61
++#define OPCODE_COMMON_ENABLE_DISABLE_BEACON 69
++#define OPCODE_COMMON_GET_BEACON_STATE 70
++#define OPCODE_COMMON_READ_TRANSRECV_DATA 73
++
++#define OPCODE_ETH_ACPI_CONFIG 2
++#define OPCODE_ETH_PROMISCUOUS 3
++#define OPCODE_ETH_GET_STATISTICS 4
++#define OPCODE_ETH_TX_CREATE 7
++#define OPCODE_ETH_RX_CREATE 8
++#define OPCODE_ETH_TX_DESTROY 9
++#define OPCODE_ETH_RX_DESTROY 10
++#define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG 12
++
++struct be_cmd_req_hdr {
++ u8 opcode; /* dword 0 */
++ u8 subsystem; /* dword 0 */
++ u8 port_number; /* dword 0 */
++ u8 domain; /* dword 0 */
++ u32 timeout; /* dword 1 */
++ u32 request_length; /* dword 2 */
++ u8 version; /* dword 3 */
++ u8 rsvd[3]; /* dword 3 */
++};
++
++#define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
++#define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */
++struct be_cmd_resp_hdr {
++ u32 info; /* dword 0 */
++ u32 status; /* dword 1 */
++ u32 response_length; /* dword 2 */
++ u32 actual_resp_len; /* dword 3 */
++};
++
++struct phys_addr {
++ u32 lo;
++ u32 hi;
++};
++
++/**************************
++ * BE Command definitions *
++ **************************/
++
++/* Pseudo amap definition in which each bit of the actual structure is defined
++ * as a byte: used to calculate offset/shift/mask of each field */
++struct amap_eq_context {
++ u8 cidx[13]; /* dword 0*/
++ u8 rsvd0[3]; /* dword 0*/
++ u8 epidx[13]; /* dword 0*/
++ u8 valid; /* dword 0*/
++ u8 rsvd1; /* dword 0*/
++ u8 size; /* dword 0*/
++ u8 pidx[13]; /* dword 1*/
++ u8 rsvd2[3]; /* dword 1*/
++ u8 pd[10]; /* dword 1*/
++ u8 count[3]; /* dword 1*/
++ u8 solevent; /* dword 1*/
++ u8 stalled; /* dword 1*/
++ u8 armed; /* dword 1*/
++ u8 rsvd3[4]; /* dword 2*/
++ u8 func[8]; /* dword 2*/
++ u8 rsvd4; /* dword 2*/
++ u8 delaymult[10]; /* dword 2*/
++ u8 rsvd5[2]; /* dword 2*/
++ u8 phase[2]; /* dword 2*/
++ u8 nodelay; /* dword 2*/
++ u8 rsvd6[4]; /* dword 2*/
++ u8 rsvd7[32]; /* dword 3*/
++} __packed;
++
++struct be_cmd_req_eq_create {
++ struct be_cmd_req_hdr hdr;
++ u16 num_pages; /* sword */
++ u16 rsvd0; /* sword */
++ u8 context[sizeof(struct amap_eq_context) / 8];
++ struct phys_addr pages[8];
++} __packed;
++
++struct be_cmd_resp_eq_create {
++ struct be_cmd_resp_hdr resp_hdr;
++ u16 eq_id; /* sword */
++ u16 rsvd0; /* sword */
++} __packed;
++
++/******************** Mac query ***************************/
++enum {
++ MAC_ADDRESS_TYPE_STORAGE = 0x0,
++ MAC_ADDRESS_TYPE_NETWORK = 0x1,
++ MAC_ADDRESS_TYPE_PD = 0x2,
++ MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
++};
++
++struct mac_addr {
++ u16 size_of_struct;
++ u8 addr[ETH_ALEN];
++} __packed;
++
++struct be_cmd_req_mac_query {
++ struct be_cmd_req_hdr hdr;
++ u8 type;
++ u8 permanent;
++ u16 if_id;
++} __packed;
++
++struct be_cmd_resp_mac_query {
++ struct be_cmd_resp_hdr hdr;
++ struct mac_addr mac;
++};
++
++/******************** PMac Add ***************************/
++struct be_cmd_req_pmac_add {
++ struct be_cmd_req_hdr hdr;
++ u32 if_id;
++ u8 mac_address[ETH_ALEN];
++ u8 rsvd0[2];
++} __packed;
++
++struct be_cmd_resp_pmac_add {
++ struct be_cmd_resp_hdr hdr;
++ u32 pmac_id;
++};
++
++/******************** PMac Del ***************************/
++struct be_cmd_req_pmac_del {
++ struct be_cmd_req_hdr hdr;
++ u32 if_id;
++ u32 pmac_id;
++};
++
++/******************** Create CQ ***************************/
++/* Pseudo amap definition in which each bit of the actual structure is defined
++ * as a byte: used to calculate offset/shift/mask of each field */
++struct amap_cq_context {
++ u8 cidx[11]; /* dword 0*/
++ u8 rsvd0; /* dword 0*/
++ u8 coalescwm[2]; /* dword 0*/
++ u8 nodelay; /* dword 0*/
++ u8 epidx[11]; /* dword 0*/
++ u8 rsvd1; /* dword 0*/
++ u8 count[2]; /* dword 0*/
++ u8 valid; /* dword 0*/
++ u8 solevent; /* dword 0*/
++ u8 eventable; /* dword 0*/
++ u8 pidx[11]; /* dword 1*/
++ u8 rsvd2; /* dword 1*/
++ u8 pd[10]; /* dword 1*/
++ u8 eqid[8]; /* dword 1*/
++ u8 stalled; /* dword 1*/
++ u8 armed; /* dword 1*/
++ u8 rsvd3[4]; /* dword 2*/
++ u8 func[8]; /* dword 2*/
++ u8 rsvd4[20]; /* dword 2*/
++ u8 rsvd5[32]; /* dword 3*/
++} __packed;
++
++struct be_cmd_req_cq_create {
++ struct be_cmd_req_hdr hdr;
++ u16 num_pages;
++ u16 rsvd0;
++ u8 context[sizeof(struct amap_cq_context) / 8];
++ struct phys_addr pages[8];
++} __packed;
++
++struct be_cmd_resp_cq_create {
++ struct be_cmd_resp_hdr hdr;
++ u16 cq_id;
++ u16 rsvd0;
++} __packed;
++
++/******************** Create MCCQ ***************************/
++/* Pseudo amap definition in which each bit of the actual structure is defined
++ * as a byte: used to calculate offset/shift/mask of each field */
++struct amap_mcc_context {
++ u8 con_index[14];
++ u8 rsvd0[2];
++ u8 ring_size[4];
++ u8 fetch_wrb;
++ u8 fetch_r2t;
++ u8 cq_id[10];
++ u8 prod_index[14];
++ u8 fid[8];
++ u8 pdid[9];
++ u8 valid;
++ u8 rsvd1[32];
++ u8 rsvd2[32];
++} __packed;
++
++struct be_cmd_req_mcc_create {
++ struct be_cmd_req_hdr hdr;
++ u16 num_pages;
++ u16 rsvd0;
++ u8 context[sizeof(struct amap_mcc_context) / 8];
++ struct phys_addr pages[8];
++} __packed;
++
++struct be_cmd_resp_mcc_create {
++ struct be_cmd_resp_hdr hdr;
++ u16 id;
++ u16 rsvd0;
++} __packed;
++
++/******************** Create TxQ ***************************/
++#define BE_ETH_TX_RING_TYPE_STANDARD 2
++#define BE_ULP1_NUM 1
++
++/* Pseudo amap definition in which each bit of the actual structure is defined
++ * as a byte: used to calculate offset/shift/mask of each field */
++struct amap_tx_context {
++ u8 rsvd0[16]; /* dword 0 */
++ u8 tx_ring_size[4]; /* dword 0 */
++ u8 rsvd1[26]; /* dword 0 */
++ u8 pci_func_id[8]; /* dword 1 */
++ u8 rsvd2[9]; /* dword 1 */
++ u8 ctx_valid; /* dword 1 */
++ u8 cq_id_send[16]; /* dword 2 */
++ u8 rsvd3[16]; /* dword 2 */
++ u8 rsvd4[32]; /* dword 3 */
++ u8 rsvd5[32]; /* dword 4 */
++ u8 rsvd6[32]; /* dword 5 */
++ u8 rsvd7[32]; /* dword 6 */
++ u8 rsvd8[32]; /* dword 7 */
++ u8 rsvd9[32]; /* dword 8 */
++ u8 rsvd10[32]; /* dword 9 */
++ u8 rsvd11[32]; /* dword 10 */
++ u8 rsvd12[32]; /* dword 11 */
++ u8 rsvd13[32]; /* dword 12 */
++ u8 rsvd14[32]; /* dword 13 */
++ u8 rsvd15[32]; /* dword 14 */
++ u8 rsvd16[32]; /* dword 15 */
++} __packed;
++
++struct be_cmd_req_eth_tx_create {
++ struct be_cmd_req_hdr hdr;
++ u8 num_pages;
++ u8 ulp_num;
++ u8 type;
++ u8 bound_port;
++ u8 context[sizeof(struct amap_tx_context) / 8];
++ struct phys_addr pages[8];
++} __packed;
++
++struct be_cmd_resp_eth_tx_create {
++ struct be_cmd_resp_hdr hdr;
++ u16 cid;
++ u16 rsvd0;
++} __packed;
++
++/******************** Create RxQ ***************************/
++struct be_cmd_req_eth_rx_create {
++ struct be_cmd_req_hdr hdr;
++ u16 cq_id;
++ u8 frag_size;
++ u8 num_pages;
++ struct phys_addr pages[2];
++ u32 interface_id;
++ u16 max_frame_size;
++ u16 rsvd0;
++ u32 rss_queue;
++} __packed;
++
++struct be_cmd_resp_eth_rx_create {
++ struct be_cmd_resp_hdr hdr;
++ u16 id;
++ u8 cpu_id;
++ u8 rsvd0;
++} __packed;
++
++/******************** Q Destroy ***************************/
++/* Type of Queue to be destroyed */
++enum {
++ QTYPE_EQ = 1,
++ QTYPE_CQ,
++ QTYPE_TXQ,
++ QTYPE_RXQ,
++ QTYPE_MCCQ
++};
++
++struct be_cmd_req_q_destroy {
++ struct be_cmd_req_hdr hdr;
++ u16 id;
++ u16 bypass_flush; /* valid only for rx q destroy */
++} __packed;
++
++/************ I/f Create (it's actually I/f Config Create)**********/
++
++/* Capability flags for the i/f */
++enum be_if_flags {
++ BE_IF_FLAGS_RSS = 0x4,
++ BE_IF_FLAGS_PROMISCUOUS = 0x8,
++ BE_IF_FLAGS_BROADCAST = 0x10,
++ BE_IF_FLAGS_UNTAGGED = 0x20,
++ BE_IF_FLAGS_ULP = 0x40,
++ BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
++ BE_IF_FLAGS_VLAN = 0x100,
++ BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
++ BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
++ BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800
++};
++
++/* An RX interface is an object with one or more MAC addresses and
++ * filtering capabilities. */
++struct be_cmd_req_if_create {
++ struct be_cmd_req_hdr hdr;
++ u32 version; /* ignore currntly */
++ u32 capability_flags;
++ u32 enable_flags;
++ u8 mac_addr[ETH_ALEN];
++ u8 rsvd0;
++ u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
++ u32 vlan_tag; /* not used currently */
++} __packed;
++
++struct be_cmd_resp_if_create {
++ struct be_cmd_resp_hdr hdr;
++ u32 interface_id;
++ u32 pmac_id;
++};
++
++/****** I/f Destroy(it's actually I/f Config Destroy )**********/
++struct be_cmd_req_if_destroy {
++ struct be_cmd_req_hdr hdr;
++ u32 interface_id;
++};
++
++/*************** HW Stats Get **********************************/
++struct be_port_rxf_stats {
++ u32 rx_bytes_lsd; /* dword 0*/
++ u32 rx_bytes_msd; /* dword 1*/
++ u32 rx_total_frames; /* dword 2*/
++ u32 rx_unicast_frames; /* dword 3*/
++ u32 rx_multicast_frames; /* dword 4*/
++ u32 rx_broadcast_frames; /* dword 5*/
++ u32 rx_crc_errors; /* dword 6*/
++ u32 rx_alignment_symbol_errors; /* dword 7*/
++ u32 rx_pause_frames; /* dword 8*/
++ u32 rx_control_frames; /* dword 9*/
++ u32 rx_in_range_errors; /* dword 10*/
++ u32 rx_out_range_errors; /* dword 11*/
++ u32 rx_frame_too_long; /* dword 12*/
++ u32 rx_address_match_errors; /* dword 13*/
++ u32 rx_vlan_mismatch; /* dword 14*/
++ u32 rx_dropped_too_small; /* dword 15*/
++ u32 rx_dropped_too_short; /* dword 16*/
++ u32 rx_dropped_header_too_small; /* dword 17*/
++ u32 rx_dropped_tcp_length; /* dword 18*/
++ u32 rx_dropped_runt; /* dword 19*/
++ u32 rx_64_byte_packets; /* dword 20*/
++ u32 rx_65_127_byte_packets; /* dword 21*/
++ u32 rx_128_256_byte_packets; /* dword 22*/
++ u32 rx_256_511_byte_packets; /* dword 23*/
++ u32 rx_512_1023_byte_packets; /* dword 24*/
++ u32 rx_1024_1518_byte_packets; /* dword 25*/
++ u32 rx_1519_2047_byte_packets; /* dword 26*/
++ u32 rx_2048_4095_byte_packets; /* dword 27*/
++ u32 rx_4096_8191_byte_packets; /* dword 28*/
++ u32 rx_8192_9216_byte_packets; /* dword 29*/
++ u32 rx_ip_checksum_errs; /* dword 30*/
++ u32 rx_tcp_checksum_errs; /* dword 31*/
++ u32 rx_udp_checksum_errs; /* dword 32*/
++ u32 rx_non_rss_packets; /* dword 33*/
++ u32 rx_ipv4_packets; /* dword 34*/
++ u32 rx_ipv6_packets; /* dword 35*/
++ u32 rx_ipv4_bytes_lsd; /* dword 36*/
++ u32 rx_ipv4_bytes_msd; /* dword 37*/
++ u32 rx_ipv6_bytes_lsd; /* dword 38*/
++ u32 rx_ipv6_bytes_msd; /* dword 39*/
++ u32 rx_chute1_packets; /* dword 40*/
++ u32 rx_chute2_packets; /* dword 41*/
++ u32 rx_chute3_packets; /* dword 42*/
++ u32 rx_management_packets; /* dword 43*/
++ u32 rx_switched_unicast_packets; /* dword 44*/
++ u32 rx_switched_multicast_packets; /* dword 45*/
++ u32 rx_switched_broadcast_packets; /* dword 46*/
++ u32 tx_bytes_lsd; /* dword 47*/
++ u32 tx_bytes_msd; /* dword 48*/
++ u32 tx_unicastframes; /* dword 49*/
++ u32 tx_multicastframes; /* dword 50*/
++ u32 tx_broadcastframes; /* dword 51*/
++ u32 tx_pauseframes; /* dword 52*/
++ u32 tx_controlframes; /* dword 53*/
++ u32 tx_64_byte_packets; /* dword 54*/
++ u32 tx_65_127_byte_packets; /* dword 55*/
++ u32 tx_128_256_byte_packets; /* dword 56*/
++ u32 tx_256_511_byte_packets; /* dword 57*/
++ u32 tx_512_1023_byte_packets; /* dword 58*/
++ u32 tx_1024_1518_byte_packets; /* dword 59*/
++ u32 tx_1519_2047_byte_packets; /* dword 60*/
++ u32 tx_2048_4095_byte_packets; /* dword 61*/
++ u32 tx_4096_8191_byte_packets; /* dword 62*/
++ u32 tx_8192_9216_byte_packets; /* dword 63*/
++ u32 rx_fifo_overflow; /* dword 64*/
++ u32 rx_input_fifo_overflow; /* dword 65*/
++};
++
++struct be_rxf_stats {
++ struct be_port_rxf_stats port[2];
++ u32 rx_drops_no_pbuf; /* dword 132*/
++ u32 rx_drops_no_txpb; /* dword 133*/
++ u32 rx_drops_no_erx_descr; /* dword 134*/
++ u32 rx_drops_no_tpre_descr; /* dword 135*/
++ u32 management_rx_port_packets; /* dword 136*/
++ u32 management_rx_port_bytes; /* dword 137*/
++ u32 management_rx_port_pause_frames; /* dword 138*/
++ u32 management_rx_port_errors; /* dword 139*/
++ u32 management_tx_port_packets; /* dword 140*/
++ u32 management_tx_port_bytes; /* dword 141*/
++ u32 management_tx_port_pause; /* dword 142*/
++ u32 management_rx_port_rxfifo_overflow; /* dword 143*/
++ u32 rx_drops_too_many_frags; /* dword 144*/
++ u32 rx_drops_invalid_ring; /* dword 145*/
++ u32 forwarded_packets; /* dword 146*/
++ u32 rx_drops_mtu; /* dword 147*/
++ u32 rsvd0[15];
++};
++
++struct be_erx_stats {
++ u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/
++ u32 debug_wdma_sent_hold; /* dword 44*/
++ u32 debug_wdma_pbfree_sent_hold; /* dword 45*/
++ u32 debug_wdma_zerobyte_pbfree_sent_hold; /* dword 46*/
++ u32 debug_pmem_pbuf_dealloc; /* dword 47*/
++};
++
++struct be_hw_stats {
++ struct be_rxf_stats rxf;
++ u32 rsvd[48];
++ struct be_erx_stats erx;
++};
++
++struct be_cmd_req_get_stats {
++ struct be_cmd_req_hdr hdr;
++ u8 rsvd[sizeof(struct be_hw_stats)];
++};
++
++struct be_cmd_resp_get_stats {
++ struct be_cmd_resp_hdr hdr;
++ struct be_hw_stats hw_stats;
++};
++
++struct be_cmd_req_vlan_config {
++ struct be_cmd_req_hdr hdr;
++ u8 interface_id;
++ u8 promiscuous;
++ u8 untagged;
++ u8 num_vlan;
++ u16 normal_vlan[64];
++} __packed;
++
++struct be_cmd_req_promiscuous_config {
++ struct be_cmd_req_hdr hdr;
++ u8 port0_promiscuous;
++ u8 port1_promiscuous;
++ u16 rsvd0;
++} __packed;
++
++/******************** Multicast MAC Config *******************/
++#define BE_MAX_MC 64 /* set mcast promisc if > 64 */
++struct macaddr {
++ u8 byte[ETH_ALEN];
++};
++
++struct be_cmd_req_mcast_mac_config {
++ struct be_cmd_req_hdr hdr;
++ u16 num_mac;
++ u8 promiscuous;
++ u8 interface_id;
++ struct macaddr mac[BE_MAX_MC];
++} __packed;
++
++static inline struct be_hw_stats *
++hw_stats_from_cmd(struct be_cmd_resp_get_stats *cmd)
++{
++ return &cmd->hw_stats;
++}
++
++/******************** Link Status Query *******************/
++struct be_cmd_req_link_status {
++ struct be_cmd_req_hdr hdr;
++ u32 rsvd;
++};
++
++enum {
++ PHY_LINK_DUPLEX_NONE = 0x0,
++ PHY_LINK_DUPLEX_HALF = 0x1,
++ PHY_LINK_DUPLEX_FULL = 0x2
++};
++
++enum {
++ PHY_LINK_SPEED_ZERO = 0x0, /* => No link */
++ PHY_LINK_SPEED_10MBPS = 0x1,
++ PHY_LINK_SPEED_100MBPS = 0x2,
++ PHY_LINK_SPEED_1GBPS = 0x3,
++ PHY_LINK_SPEED_10GBPS = 0x4
++};
++
++struct be_cmd_resp_link_status {
++ struct be_cmd_resp_hdr hdr;
++ u8 physical_port;
++ u8 mac_duplex;
++ u8 mac_speed;
++ u8 mac_fault;
++ u8 mgmt_mac_duplex;
++ u8 mgmt_mac_speed;
++ u16 link_speed;
++ u32 rsvd0;
++} __packed;
++
++/******************** Port Identification ***************************/
++/* Identifies the type of port attached to NIC */
++struct be_cmd_req_port_type {
++ struct be_cmd_req_hdr hdr;
++ u32 page_num;
++ u32 port;
++};
++
++enum {
++ TR_PAGE_A0 = 0xa0,
++ TR_PAGE_A2 = 0xa2
++};
++
++struct be_cmd_resp_port_type {
++ struct be_cmd_resp_hdr hdr;
++ u32 page_num;
++ u32 port;
++ struct data {
++ u8 identifier;
++ u8 identifier_ext;
++ u8 connector;
++ u8 transceiver[8];
++ u8 rsvd0[3];
++ u8 length_km;
++ u8 length_hm;
++ u8 length_om1;
++ u8 length_om2;
++ u8 length_cu;
++ u8 length_cu_m;
++ u8 vendor_name[16];
++ u8 rsvd;
++ u8 vendor_oui[3];
++ u8 vendor_pn[16];
++ u8 vendor_rev[4];
++ } data;
++};
++
++/******************** Get FW Version *******************/
++struct be_cmd_req_get_fw_version {
++ struct be_cmd_req_hdr hdr;
++ u8 rsvd0[FW_VER_LEN];
++ u8 rsvd1[FW_VER_LEN];
++} __packed;
++
++struct be_cmd_resp_get_fw_version {
++ struct be_cmd_resp_hdr hdr;
++ u8 firmware_version_string[FW_VER_LEN];
++ u8 fw_on_flash_version_string[FW_VER_LEN];
++} __packed;
++
++/******************** Set Flow Contrl *******************/
++struct be_cmd_req_set_flow_control {
++ struct be_cmd_req_hdr hdr;
++ u16 tx_flow_control;
++ u16 rx_flow_control;
++} __packed;
++
++/******************** Get Flow Contrl *******************/
++struct be_cmd_req_get_flow_control {
++ struct be_cmd_req_hdr hdr;
++ u32 rsvd;
++};
++
++struct be_cmd_resp_get_flow_control {
++ struct be_cmd_resp_hdr hdr;
++ u16 tx_flow_control;
++ u16 rx_flow_control;
++} __packed;
++
++/******************** Modify EQ Delay *******************/
++struct be_cmd_req_modify_eq_delay {
++ struct be_cmd_req_hdr hdr;
++ u32 num_eq;
++ struct {
++ u32 eq_id;
++ u32 phase;
++ u32 delay_multiplier;
++ } delay[8];
++} __packed;
++
++struct be_cmd_resp_modify_eq_delay {
++ struct be_cmd_resp_hdr hdr;
++ u32 rsvd0;
++} __packed;
++
++/******************** Get FW Config *******************/
++struct be_cmd_req_query_fw_cfg {
++ struct be_cmd_req_hdr hdr;
++ u32 rsvd[30];
++};
++
++struct be_cmd_resp_query_fw_cfg {
++ struct be_cmd_resp_hdr hdr;
++ u32 be_config_number;
++ u32 asic_revision;
++ u32 phys_port;
++ u32 function_mode;
++ u32 rsvd[26];
++};
++
++/******************** Port Beacon ***************************/
++
++#define BEACON_STATE_ENABLED 0x1
++#define BEACON_STATE_DISABLED 0x0
++
++struct be_cmd_req_enable_disable_beacon {
++ struct be_cmd_req_hdr hdr;
++ u8 port_num;
++ u8 beacon_state;
++ u8 beacon_duration;
++ u8 status_duration;
++} __packed;
++
++struct be_cmd_resp_enable_disable_beacon {
++ struct be_cmd_resp_hdr resp_hdr;
++ u32 rsvd0;
++} __packed;
++
++struct be_cmd_req_get_beacon_state {
++ struct be_cmd_req_hdr hdr;
++ u8 port_num;
++ u8 rsvd0;
++ u16 rsvd1;
++} __packed;
++
++struct be_cmd_resp_get_beacon_state {
++ struct be_cmd_resp_hdr resp_hdr;
++ u8 beacon_state;
++ u8 rsvd0[3];
++} __packed;
++
++/************************ WOL *******************************/
++struct be_cmd_req_acpi_wol_magic_config{
++ struct be_cmd_req_hdr hdr;
++ u32 rsvd0[145];
++ u8 magic_mac[6];
++ u8 rsvd2[2];
++} __packed;
++
++extern int be_pci_fnum_get(struct be_adapter *adapter);
++extern int be_cmd_POST(struct be_adapter *adapter);
++extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
++ u8 type, bool permanent, u32 if_handle);
++extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
++ u32 if_id, u32 *pmac_id);
++extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id);
++extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
++ u32 en_flags, u8 *mac, bool pmac_invalid,
++ u32 *if_handle, u32 *pmac_id);
++extern int be_cmd_if_destroy(struct be_adapter *adapter, u32 if_handle);
++extern int be_cmd_eq_create(struct be_adapter *adapter,
++ struct be_queue_info *eq, int eq_delay);
++extern int be_cmd_cq_create(struct be_adapter *adapter,
++ struct be_queue_info *cq, struct be_queue_info *eq,
++ bool sol_evts, bool no_delay,
++ int num_cqe_dma_coalesce);
++extern int be_cmd_mccq_create(struct be_adapter *adapter,
++ struct be_queue_info *mccq,
++ struct be_queue_info *cq);
++extern int be_cmd_txq_create(struct be_adapter *adapter,
++ struct be_queue_info *txq,
++ struct be_queue_info *cq);
++extern int be_cmd_rxq_create(struct be_adapter *adapter,
++ struct be_queue_info *rxq, u16 cq_id,
++ u16 frag_size, u16 max_frame_size, u32 if_id,
++ u32 rss);
++extern int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
++ int type);
++extern int be_cmd_link_status_query(struct be_adapter *adapter,
++ bool *link_up, u8 *mac_speed, u16 *link_speed);
++extern int be_cmd_reset(struct be_adapter *adapter);
++extern int be_cmd_get_stats(struct be_adapter *adapter,
++ struct be_dma_mem *nonemb_cmd);
++extern int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver);
++
++extern int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd);
++extern int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id,
++ u16 *vtag_array, u32 num, bool untagged,
++ bool promiscuous);
++extern int be_cmd_promiscuous_config(struct be_adapter *adapter,
++ u8 port_num, bool en);
++extern int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id,
++ struct dev_mc_list *mc_list, u32 mc_count,
++ struct be_dma_mem *mem);
++extern int be_cmd_set_flow_control(struct be_adapter *adapter,
++ u32 tx_fc, u32 rx_fc);
++extern int be_cmd_get_flow_control(struct be_adapter *adapter,
++ u32 *tx_fc, u32 *rx_fc);
++extern int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num);
++extern int be_cmd_reset_function(struct be_adapter *adapter);
++extern int be_process_mcc(struct be_adapter *adapter);
++extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
++ u8 port_num, u8 beacon, u8 status, u8 state);
++extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
++ u8 port_num, u32 *state);
++extern int be_cmd_read_port_type(struct be_adapter *adapter, u32 port,
++ u8 *connector);
++extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
++ struct be_dma_mem *nonemb_cmd);
++extern int be_cmd_fw_init(struct be_adapter *adapter);
++extern int be_cmd_fw_clean(struct be_adapter *adapter);
+diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c
+new file mode 100644
+index 0000000..0160ceb
+--- /dev/null
++++ b/drivers/net/benet/be_ethtool.c
+@@ -0,0 +1,491 @@
++/*
++ * Copyright (C) 2005 - 2009 ServerEngines
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation. The full GNU General
++ * Public License is included in this distribution in the file called COPYING.
++ *
++ * Contact Information:
++ * linux-drivers at serverengines.com
++ *
++ * ServerEngines
++ * 209 N. Fair Oaks Ave
++ * Sunnyvale, CA 94085
++ */
++
++#include "be.h"
++#include "be_cmds.h"
++#include <linux/ethtool.h>
++
++struct be_ethtool_stat {
++ char desc[ETH_GSTRING_LEN];
++ int type;
++ int size;
++ int offset;
++};
++
++enum {NETSTAT, PORTSTAT, MISCSTAT, DRVSTAT, ERXSTAT};
++#define FIELDINFO(_struct, field) FIELD_SIZEOF(_struct, field), \
++ offsetof(_struct, field)
++#define NETSTAT_INFO(field) #field, NETSTAT,\
++ FIELDINFO(struct net_device_stats,\
++ field)
++#define DRVSTAT_INFO(field) #field, DRVSTAT,\
++ FIELDINFO(struct be_drvr_stats, field)
++#define MISCSTAT_INFO(field) #field, MISCSTAT,\
++ FIELDINFO(struct be_rxf_stats, field)
++#define PORTSTAT_INFO(field) #field, PORTSTAT,\
++ FIELDINFO(struct be_port_rxf_stats, \
++ field)
++#define ERXSTAT_INFO(field) #field, ERXSTAT,\
++ FIELDINFO(struct be_erx_stats, field)
++
++static const struct be_ethtool_stat et_stats[] = {
++ {NETSTAT_INFO(rx_packets)},
++ {NETSTAT_INFO(tx_packets)},
++ {NETSTAT_INFO(rx_bytes)},
++ {NETSTAT_INFO(tx_bytes)},
++ {NETSTAT_INFO(rx_errors)},
++ {NETSTAT_INFO(tx_errors)},
++ {NETSTAT_INFO(rx_dropped)},
++ {NETSTAT_INFO(tx_dropped)},
++ {DRVSTAT_INFO(be_tx_reqs)},
++ {DRVSTAT_INFO(be_tx_stops)},
++ {DRVSTAT_INFO(be_fwd_reqs)},
++ {DRVSTAT_INFO(be_tx_wrbs)},
++ {DRVSTAT_INFO(be_rx_polls)},
++ {DRVSTAT_INFO(be_tx_events)},
++ {DRVSTAT_INFO(be_rx_events)},
++ {DRVSTAT_INFO(be_tx_compl)},
++ {DRVSTAT_INFO(be_rx_compl)},
++ {DRVSTAT_INFO(be_ethrx_post_fail)},
++ {DRVSTAT_INFO(be_802_3_dropped_frames)},
++ {DRVSTAT_INFO(be_802_3_malformed_frames)},
++ {DRVSTAT_INFO(be_tx_rate)},
++ {DRVSTAT_INFO(be_rx_rate)},
++ {PORTSTAT_INFO(rx_unicast_frames)},
++ {PORTSTAT_INFO(rx_multicast_frames)},
++ {PORTSTAT_INFO(rx_broadcast_frames)},
++ {PORTSTAT_INFO(rx_crc_errors)},
++ {PORTSTAT_INFO(rx_alignment_symbol_errors)},
++ {PORTSTAT_INFO(rx_pause_frames)},
++ {PORTSTAT_INFO(rx_control_frames)},
++ {PORTSTAT_INFO(rx_in_range_errors)},
++ {PORTSTAT_INFO(rx_out_range_errors)},
++ {PORTSTAT_INFO(rx_frame_too_long)},
++ {PORTSTAT_INFO(rx_address_match_errors)},
++ {PORTSTAT_INFO(rx_vlan_mismatch)},
++ {PORTSTAT_INFO(rx_dropped_too_small)},
++ {PORTSTAT_INFO(rx_dropped_too_short)},
++ {PORTSTAT_INFO(rx_dropped_header_too_small)},
++ {PORTSTAT_INFO(rx_dropped_tcp_length)},
++ {PORTSTAT_INFO(rx_dropped_runt)},
++ {PORTSTAT_INFO(rx_fifo_overflow)},
++ {PORTSTAT_INFO(rx_input_fifo_overflow)},
++ {PORTSTAT_INFO(rx_ip_checksum_errs)},
++ {PORTSTAT_INFO(rx_tcp_checksum_errs)},
++ {PORTSTAT_INFO(rx_udp_checksum_errs)},
++ {PORTSTAT_INFO(rx_non_rss_packets)},
++ {PORTSTAT_INFO(rx_ipv4_packets)},
++ {PORTSTAT_INFO(rx_ipv6_packets)},
++ {PORTSTAT_INFO(tx_unicastframes)},
++ {PORTSTAT_INFO(tx_multicastframes)},
++ {PORTSTAT_INFO(tx_broadcastframes)},
++ {PORTSTAT_INFO(tx_pauseframes)},
++ {PORTSTAT_INFO(tx_controlframes)},
++ {MISCSTAT_INFO(rx_drops_no_pbuf)},
++ {MISCSTAT_INFO(rx_drops_no_txpb)},
++ {MISCSTAT_INFO(rx_drops_no_erx_descr)},
++ {MISCSTAT_INFO(rx_drops_no_tpre_descr)},
++ {MISCSTAT_INFO(rx_drops_too_many_frags)},
++ {MISCSTAT_INFO(rx_drops_invalid_ring)},
++ {MISCSTAT_INFO(forwarded_packets)},
++ {MISCSTAT_INFO(rx_drops_mtu)},
++ {ERXSTAT_INFO(rx_drops_no_fragments)},
++};
++#define ETHTOOL_STATS_NUM ARRAY_SIZE(et_stats)
++
++static void
++be_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ strcpy(drvinfo->driver, DRV_NAME);
++ strcpy(drvinfo->version, DRV_VER);
++ strncpy(drvinfo->fw_version, adapter->fw_ver, FW_VER_LEN);
++ strcpy(drvinfo->bus_info, pci_name(adapter->pdev));
++ drvinfo->testinfo_len = 0;
++ drvinfo->regdump_len = 0;
++ drvinfo->eedump_len = 0;
++}
++
++static int
++be_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ struct be_eq_obj *rx_eq = &adapter->rx_eq;
++ struct be_eq_obj *tx_eq = &adapter->tx_eq;
++
++ coalesce->rx_max_coalesced_frames = adapter->max_rx_coal;
++
++ coalesce->rx_coalesce_usecs = rx_eq->cur_eqd;
++ coalesce->rx_coalesce_usecs_high = rx_eq->max_eqd;
++ coalesce->rx_coalesce_usecs_low = rx_eq->min_eqd;
++
++ coalesce->tx_coalesce_usecs = tx_eq->cur_eqd;
++ coalesce->tx_coalesce_usecs_high = tx_eq->max_eqd;
++ coalesce->tx_coalesce_usecs_low = tx_eq->min_eqd;
++
++ coalesce->use_adaptive_rx_coalesce = rx_eq->enable_aic;
++ coalesce->use_adaptive_tx_coalesce = tx_eq->enable_aic;
++
++ return 0;
++}
++
++/*
++ * This routine is used to set interrup coalescing delay *as well as*
++ * the number of pkts to coalesce for LRO.
++ */
++static int
++be_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ struct be_eq_obj *rx_eq = &adapter->rx_eq;
++ struct be_eq_obj *tx_eq = &adapter->tx_eq;
++ u32 tx_max, tx_min, tx_cur;
++ u32 rx_max, rx_min, rx_cur;
++ int status = 0;
++
++ if (coalesce->use_adaptive_tx_coalesce == 1)
++ return -EINVAL;
++
++ adapter->max_rx_coal = coalesce->rx_max_coalesced_frames;
++ if (adapter->max_rx_coal > BE_MAX_FRAGS_PER_FRAME)
++ adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
++
++ /* if AIC is being turned on now, start with an EQD of 0 */
++ if (rx_eq->enable_aic == 0 &&
++ coalesce->use_adaptive_rx_coalesce == 1) {
++ rx_eq->cur_eqd = 0;
++ }
++ rx_eq->enable_aic = coalesce->use_adaptive_rx_coalesce;
++
++ rx_max = coalesce->rx_coalesce_usecs_high;
++ rx_min = coalesce->rx_coalesce_usecs_low;
++ rx_cur = coalesce->rx_coalesce_usecs;
++
++ tx_max = coalesce->tx_coalesce_usecs_high;
++ tx_min = coalesce->tx_coalesce_usecs_low;
++ tx_cur = coalesce->tx_coalesce_usecs;
++
++ if (tx_cur > BE_MAX_EQD)
++ tx_cur = BE_MAX_EQD;
++ if (tx_eq->cur_eqd != tx_cur) {
++ status = be_cmd_modify_eqd(adapter, tx_eq->q.id, tx_cur);
++ if (!status)
++ tx_eq->cur_eqd = tx_cur;
++ }
++
++ if (rx_eq->enable_aic) {
++ if (rx_max > BE_MAX_EQD)
++ rx_max = BE_MAX_EQD;
++ if (rx_min > rx_max)
++ rx_min = rx_max;
++ rx_eq->max_eqd = rx_max;
++ rx_eq->min_eqd = rx_min;
++ if (rx_eq->cur_eqd > rx_max)
++ rx_eq->cur_eqd = rx_max;
++ if (rx_eq->cur_eqd < rx_min)
++ rx_eq->cur_eqd = rx_min;
++ } else {
++ if (rx_cur > BE_MAX_EQD)
++ rx_cur = BE_MAX_EQD;
++ if (rx_eq->cur_eqd != rx_cur) {
++ status = be_cmd_modify_eqd(adapter, rx_eq->q.id,
++ rx_cur);
++ if (!status)
++ rx_eq->cur_eqd = rx_cur;
++ }
++ }
++ return 0;
++}
++
++static u32 be_get_rx_csum(struct net_device *netdev)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ return adapter->rx_csum;
++}
++
++static int be_set_rx_csum(struct net_device *netdev, uint32_t data)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ if (data)
++ adapter->rx_csum = true;
++ else
++ adapter->rx_csum = false;
++
++ return 0;
++}
++
++static void
++be_get_ethtool_stats(struct net_device *netdev,
++ struct ethtool_stats *stats, uint64_t *data)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ struct be_drvr_stats *drvr_stats = &adapter->stats.drvr_stats;
++ struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
++ struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
++ struct be_port_rxf_stats *port_stats =
++ &rxf_stats->port[adapter->port_num];
++ struct net_device_stats *net_stats = &netdev->stats;
++ struct be_erx_stats *erx_stats = &hw_stats->erx;
++ void *p = NULL;
++ int i;
++
++ for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
++ switch (et_stats[i].type) {
++ case NETSTAT:
++ p = net_stats;
++ break;
++ case DRVSTAT:
++ p = drvr_stats;
++ break;
++ case PORTSTAT:
++ p = port_stats;
++ break;
++ case MISCSTAT:
++ p = rxf_stats;
++ break;
++ case ERXSTAT: /* Currently only one ERX stat is provided */
++ p = (u32 *)erx_stats + adapter->rx_obj.q.id;
++ break;
++ }
++
++ p = (u8 *)p + et_stats[i].offset;
++ data[i] = (et_stats[i].size == sizeof(u64)) ?
++ *(u64 *)p: *(u32 *)p;
++ }
++
++ return;
++}
++
++static void
++be_get_stat_strings(struct net_device *netdev, uint32_t stringset,
++ uint8_t *data)
++{
++ int i;
++ switch (stringset) {
++ case ETH_SS_STATS:
++ for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
++ memcpy(data, et_stats[i].desc, ETH_GSTRING_LEN);
++ data += ETH_GSTRING_LEN;
++ }
++ break;
++ }
++}
++
++static int be_get_stats_count(struct net_device *netdev)
++{
++ return ETHTOOL_STATS_NUM;
++}
++
++static int be_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ u8 mac_speed = 0, connector = 0;
++ u16 link_speed = 0;
++ bool link_up = false;
++ int status;
++
++ if (adapter->link_speed < 0) {
++ status = be_cmd_link_status_query(adapter, &link_up,
++ &mac_speed, &link_speed);
++
++ /* link_speed is in units of 10 Mbps */
++ if (link_speed) {
++ ecmd->speed = link_speed*10;
++ } else {
++ switch (mac_speed) {
++ case PHY_LINK_SPEED_1GBPS:
++ ecmd->speed = SPEED_1000;
++ break;
++ case PHY_LINK_SPEED_10GBPS:
++ ecmd->speed = SPEED_10000;
++ break;
++ }
++ }
++
++ status = be_cmd_read_port_type(adapter, adapter->port_num,
++ &connector);
++ if (!status) {
++ switch (connector) {
++ case 7:
++ ecmd->port = PORT_FIBRE;
++ ecmd->transceiver = XCVR_EXTERNAL;
++ break;
++ case 0:
++ ecmd->port = PORT_TP;
++ ecmd->transceiver = XCVR_EXTERNAL;
++ break;
++ default:
++ ecmd->port = PORT_TP;
++ ecmd->transceiver = XCVR_INTERNAL;
++ break;
++ }
++ } else {
++ ecmd->port = PORT_AUI;
++ ecmd->transceiver = XCVR_INTERNAL;
++ }
++
++ /* Save for future use */
++ adapter->link_speed = ecmd->speed;
++ adapter->port_type = ecmd->port;
++ adapter->transceiver = ecmd->transceiver;
++ } else {
++ ecmd->speed = adapter->link_speed;
++ ecmd->port = adapter->port_type;
++ ecmd->transceiver = adapter->transceiver;
++ }
++
++ ecmd->duplex = DUPLEX_FULL;
++ ecmd->autoneg = AUTONEG_DISABLE;
++ ecmd->phy_address = adapter->port_num;
++ switch (ecmd->port) {
++ case PORT_FIBRE:
++ ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
++ break;
++ case PORT_TP:
++ ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_TP);
++ break;
++ case PORT_AUI:
++ ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_AUI);
++ break;
++ }
++
++ return 0;
++}
++
++static void
++be_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ ring->rx_max_pending = adapter->rx_obj.q.len;
++ ring->tx_max_pending = adapter->tx_obj.q.len;
++
++ ring->rx_pending = atomic_read(&adapter->rx_obj.q.used);
++ ring->tx_pending = atomic_read(&adapter->tx_obj.q.used);
++}
++
++static void
++be_get_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ be_cmd_get_flow_control(adapter, &ecmd->tx_pause, &ecmd->rx_pause);
++ ecmd->autoneg = 0;
++}
++
++static int
++be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ int status;
++
++ if (ecmd->autoneg != 0)
++ return -EINVAL;
++ adapter->tx_fc = ecmd->tx_pause;
++ adapter->rx_fc = ecmd->rx_pause;
++
++ status = be_cmd_set_flow_control(adapter,
++ adapter->tx_fc, adapter->rx_fc);
++ if (status)
++ dev_warn(&adapter->pdev->dev, "Pause param set failed.\n");
++
++ return status;
++}
++
++static int
++be_phys_id(struct net_device *netdev, u32 data)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ int status;
++ u32 cur;
++
++ be_cmd_get_beacon_state(adapter, adapter->port_num, &cur);
++
++ if (cur == BEACON_STATE_ENABLED)
++ return 0;
++
++ if (data < 2)
++ data = 2;
++
++ status = be_cmd_set_beacon_state(adapter, adapter->port_num, 0, 0,
++ BEACON_STATE_ENABLED);
++ set_current_state(TASK_INTERRUPTIBLE);
++ schedule_timeout(data*HZ);
++
++ status = be_cmd_set_beacon_state(adapter, adapter->port_num, 0, 0,
++ BEACON_STATE_DISABLED);
++
++ return status;
++}
++
++static void
++be_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ wol->supported = WAKE_MAGIC;
++ if (adapter->wol)
++ wol->wolopts = WAKE_MAGIC;
++ else
++ wol->wolopts = 0;
++ memset(&wol->sopass, 0, sizeof(wol->sopass));
++ return;
++}
++
++static int
++be_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ if (wol->wolopts & ~WAKE_MAGIC)
++ return -EINVAL;
++
++ if (wol->wolopts & WAKE_MAGIC)
++ adapter->wol = true;
++ else
++ adapter->wol = false;
++
++ return 0;
++}
++
++struct ethtool_ops be_ethtool_ops = {
++ .get_settings = be_get_settings,
++ .get_drvinfo = be_get_drvinfo,
++ .get_wol = be_get_wol,
++ .set_wol = be_set_wol,
++ .get_link = ethtool_op_get_link,
++ .get_coalesce = be_get_coalesce,
++ .set_coalesce = be_set_coalesce,
++ .get_ringparam = be_get_ringparam,
++ .get_pauseparam = be_get_pauseparam,
++ .set_pauseparam = be_set_pauseparam,
++ .get_rx_csum = be_get_rx_csum,
++ .set_rx_csum = be_set_rx_csum,
++ .get_tx_csum = ethtool_op_get_tx_csum,
++ .set_tx_csum = ethtool_op_set_tx_hw_csum,
++ .get_sg = ethtool_op_get_sg,
++ .set_sg = ethtool_op_set_sg,
++ .get_tso = ethtool_op_get_tso,
++ .set_tso = ethtool_op_set_tso,
++ .get_strings = be_get_stat_strings,
++ .get_stats_count = be_get_stats_count,
++ .phys_id = be_phys_id,
++ .get_ethtool_stats = be_get_ethtool_stats,
++};
+diff --git a/drivers/net/benet/be_hw.h b/drivers/net/benet/be_hw.h
+new file mode 100644
+index 0000000..0dc120e
+--- /dev/null
++++ b/drivers/net/benet/be_hw.h
+@@ -0,0 +1,222 @@
++/*
++ * Copyright (C) 2005 - 2009 ServerEngines
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation. The full GNU General
++ * Public License is included in this distribution in the file called COPYING.
++ *
++ * Contact Information:
++ * linux-drivers at serverengines.com
++ *
++ * ServerEngines
++ * 209 N. Fair Oaks Ave
++ * Sunnyvale, CA 94085
++ */
++
++/********* Mailbox door bell *************/
++/* Used for driver communication with the FW.
++ * The software must write this register twice to post any command. First,
++ * it writes the register with hi=1 and the upper bits of the physical address
++ * for the MAILBOX structure. Software must poll the ready bit until this
++ * is acknowledged. Then, sotware writes the register with hi=0 with the lower
++ * bits in the address. It must poll the ready bit until the command is
++ * complete. Upon completion, the MAILBOX will contain a valid completion
++ * queue entry.
++ */
++#define MPU_MAILBOX_DB_OFFSET 0x160
++#define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */
++#define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */
++
++#define MPU_EP_CONTROL 0
++
++/********** MPU semphore ******************/
++#define MPU_EP_SEMAPHORE_OFFSET 0xac
++#define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
++#define EP_SEMAPHORE_POST_ERR_MASK 0x1
++#define EP_SEMAPHORE_POST_ERR_SHIFT 31
++/* MPU semphore POST stage values */
++#define POST_STAGE_AWAITING_HOST_RDY 0x1 /* FW awaiting goahead from host */
++#define POST_STAGE_HOST_RDY 0x2 /* Host has given go-ahed to FW */
++#define POST_STAGE_BE_RESET 0x3 /* Host wants to reset chip */
++#define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */
++
++/********* Memory BAR register ************/
++#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
++/* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
++ * Disable" may still globally block interrupts in addition to individual
++ * interrupt masks; a mechanism for the device driver to block all interrupts
++ * atomically without having to arbitrate for the PCI Interrupt Disable bit
++ * with the OS.
++ */
++#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */
++
++/********* Power managment (WOL) **********/
++#define PCICFG_PM_CONTROL_OFFSET 0x44
++#define PCICFG_PM_CONTROL_MASK 0x108 /* bits 3 & 8 */
++
++/********* ISR0 Register offset **********/
++#define CEV_ISR0_OFFSET 0xC18
++#define CEV_ISR_SIZE 4
++
++/********* Event Q door bell *************/
++#define DB_EQ_OFFSET DB_CQ_OFFSET
++#define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
++/* Clear the interrupt for this eq */
++#define DB_EQ_CLR_SHIFT (9) /* bit 9 */
++/* Must be 1 */
++#define DB_EQ_EVNT_SHIFT (10) /* bit 10 */
++/* Number of event entries processed */
++#define DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
++/* Rearm bit */
++#define DB_EQ_REARM_SHIFT (29) /* bit 29 */
++
++/********* Compl Q door bell *************/
++#define DB_CQ_OFFSET 0x120
++#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
++/* Number of event entries processed */
++#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
++/* Rearm bit */
++#define DB_CQ_REARM_SHIFT (29) /* bit 29 */
++
++/********** TX ULP door bell *************/
++#define DB_TXULP1_OFFSET 0x60
++#define DB_TXULP_RING_ID_MASK 0x7FF /* bits 0 - 10 */
++/* Number of tx entries posted */
++#define DB_TXULP_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */
++#define DB_TXULP_NUM_POSTED_MASK 0x3FFF /* bits 16 - 29 */
++
++/********** RQ(erx) door bell ************/
++#define DB_RQ_OFFSET 0x100
++#define DB_RQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
++/* Number of rx frags posted */
++#define DB_RQ_NUM_POSTED_SHIFT (24) /* bits 24 - 31 */
++
++/********** MCC door bell ************/
++#define DB_MCCQ_OFFSET 0x140
++#define DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */
++/* Number of entries posted */
++#define DB_MCCQ_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */
++
++/*
++ * BE descriptors: host memory data structures whose formats
++ * are hardwired in BE silicon.
++ */
++/* Event Queue Descriptor */
++#define EQ_ENTRY_VALID_MASK 0x1 /* bit 0 */
++#define EQ_ENTRY_RES_ID_MASK 0xFFFF /* bits 16 - 31 */
++#define EQ_ENTRY_RES_ID_SHIFT 16
++struct be_eq_entry {
++ u32 evt;
++};
++
++/* TX Queue Descriptor */
++#define ETH_WRB_FRAG_LEN_MASK 0xFFFF
++struct be_eth_wrb {
++ u32 frag_pa_hi; /* dword 0 */
++ u32 frag_pa_lo; /* dword 1 */
++ u32 rsvd0; /* dword 2 */
++ u32 frag_len; /* dword 3: bits 0 - 15 */
++} __packed;
++
++/* Pseudo amap definition for eth_hdr_wrb in which each bit of the
++ * actual structure is defined as a byte : used to calculate
++ * offset/shift/mask of each field */
++struct amap_eth_hdr_wrb {
++ u8 rsvd0[32]; /* dword 0 */
++ u8 rsvd1[32]; /* dword 1 */
++ u8 complete; /* dword 2 */
++ u8 event;
++ u8 crc;
++ u8 forward;
++ u8 ipsec;
++ u8 mgmt;
++ u8 ipcs;
++ u8 udpcs;
++ u8 tcpcs;
++ u8 lso;
++ u8 vlan;
++ u8 gso[2];
++ u8 num_wrb[5];
++ u8 lso_mss[14];
++ u8 len[16]; /* dword 3 */
++ u8 vlan_tag[16];
++} __packed;
++
++struct be_eth_hdr_wrb {
++ u32 dw[4];
++};
++
++/* TX Compl Queue Descriptor */
++
++/* Pseudo amap definition for eth_tx_compl in which each bit of the
++ * actual structure is defined as a byte: used to calculate
++ * offset/shift/mask of each field */
++struct amap_eth_tx_compl {
++ u8 wrb_index[16]; /* dword 0 */
++ u8 ct[2]; /* dword 0 */
++ u8 port[2]; /* dword 0 */
++ u8 rsvd0[8]; /* dword 0 */
++ u8 status[4]; /* dword 0 */
++ u8 user_bytes[16]; /* dword 1 */
++ u8 nwh_bytes[8]; /* dword 1 */
++ u8 lso; /* dword 1 */
++ u8 cast_enc[2]; /* dword 1 */
++ u8 rsvd1[5]; /* dword 1 */
++ u8 rsvd2[32]; /* dword 2 */
++ u8 pkts[16]; /* dword 3 */
++ u8 ringid[11]; /* dword 3 */
++ u8 hash_val[4]; /* dword 3 */
++ u8 valid; /* dword 3 */
++} __packed;
++
++struct be_eth_tx_compl {
++ u32 dw[4];
++};
++
++/* RX Queue Descriptor */
++struct be_eth_rx_d {
++ u32 fragpa_hi;
++ u32 fragpa_lo;
++};
++
++/* RX Compl Queue Descriptor */
++
++/* Pseudo amap definition for eth_rx_compl in which each bit of the
++ * actual structure is defined as a byte: used to calculate
++ * offset/shift/mask of each field */
++struct amap_eth_rx_compl {
++ u8 vlan_tag[16]; /* dword 0 */
++ u8 pktsize[14]; /* dword 0 */
++ u8 port; /* dword 0 */
++ u8 ip_opt; /* dword 0 */
++ u8 err; /* dword 1 */
++ u8 rsshp; /* dword 1 */
++ u8 ipf; /* dword 1 */
++ u8 tcpf; /* dword 1 */
++ u8 udpf; /* dword 1 */
++ u8 ipcksm; /* dword 1 */
++ u8 l4_cksm; /* dword 1 */
++ u8 ip_version; /* dword 1 */
++ u8 macdst[6]; /* dword 1 */
++ u8 vtp; /* dword 1 */
++ u8 rsvd0; /* dword 1 */
++ u8 fragndx[10]; /* dword 1 */
++ u8 ct[2]; /* dword 1 */
++ u8 sw; /* dword 1 */
++ u8 numfrags[3]; /* dword 1 */
++ u8 rss_flush; /* dword 2 */
++ u8 cast_enc[2]; /* dword 2 */
++ u8 qnq; /* dword 2 */
++ u8 rss_bank; /* dword 2 */
++ u8 rsvd1[23]; /* dword 2 */
++ u8 lro_pkt; /* dword 2 */
++ u8 rsvd2[2]; /* dword 2 */
++ u8 valid; /* dword 2 */
++ u8 rsshash[32]; /* dword 3 */
++} __packed;
++
++struct be_eth_rx_compl {
++ u32 dw[4];
++};
+diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
+new file mode 100644
+index 0000000..e497e51
+--- /dev/null
++++ b/drivers/net/benet/be_main.c
+@@ -0,0 +1,2240 @@
++/*
++ * Copyright (C) 2005 - 2009 ServerEngines
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License version 2
++ * as published by the Free Software Foundation. The full GNU General
++ * Public License is included in this distribution in the file called COPYING.
++ *
++ * Contact Information:
++ * linux-drivers at serverengines.com
++ *
++ * ServerEngines
++ * 209 N. Fair Oaks Ave
++ * Sunnyvale, CA 94085
++ */
++
++#include "be.h"
++#include "be_cmds.h"
++#include <asm/div64.h>
++
++MODULE_VERSION(DRV_VER);
++MODULE_DEVICE_TABLE(pci, be_dev_ids);
++MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
++MODULE_AUTHOR("ServerEngines Corporation");
++MODULE_LICENSE("GPL");
++
++static unsigned int rx_frag_size = 2048;
++module_param(rx_frag_size, uint, S_IRUGO);
++MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
++
++static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
++ { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
++ { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
++ { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
++ { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
++ { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
++ { 0 }
++};
++MODULE_DEVICE_TABLE(pci, be_dev_ids);
++
++static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
++{
++ struct be_dma_mem *mem = &q->dma_mem;
++ if (mem->va)
++ pci_free_consistent(adapter->pdev, mem->size,
++ mem->va, mem->dma);
++}
++
++static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
++ u16 len, u16 entry_size)
++{
++ struct be_dma_mem *mem = &q->dma_mem;
++
++ memset(q, 0, sizeof(*q));
++ q->len = len;
++ q->entry_size = entry_size;
++ mem->size = len * entry_size;
++ mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
++ if (!mem->va)
++ return -1;
++ memset(mem->va, 0, mem->size);
++ return 0;
++}
++
++static void be_intr_set(struct be_adapter *adapter, bool enable)
++{
++ u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
++ u32 reg = ioread32(addr);
++ u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
++
++ if (!enabled && enable)
++ reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
++ else if (enabled && !enable)
++ reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
++ else
++ return;
++
++ iowrite32(reg, addr);
++}
++
++static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
++{
++ u32 val = 0;
++ val |= qid & DB_RQ_RING_ID_MASK;
++ val |= posted << DB_RQ_NUM_POSTED_SHIFT;
++ iowrite32(val, adapter->db + DB_RQ_OFFSET);
++}
++
++static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
++{
++ u32 val = 0;
++ val |= qid & DB_TXULP_RING_ID_MASK;
++ val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
++ iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
++}
++
++static void be_eq_notify(struct be_adapter *adapter, u16 qid,
++ bool arm, bool clear_int, u16 num_popped)
++{
++ u32 val = 0;
++ val |= qid & DB_EQ_RING_ID_MASK;
++ if (arm)
++ val |= 1 << DB_EQ_REARM_SHIFT;
++ if (clear_int)
++ val |= 1 << DB_EQ_CLR_SHIFT;
++ val |= 1 << DB_EQ_EVNT_SHIFT;
++ val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
++ iowrite32(val, adapter->db + DB_EQ_OFFSET);
++}
++
++void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
++{
++ u32 val = 0;
++ val |= qid & DB_CQ_RING_ID_MASK;
++ if (arm)
++ val |= 1 << DB_CQ_REARM_SHIFT;
++ val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
++ iowrite32(val, adapter->db + DB_CQ_OFFSET);
++}
++
++static int be_mac_addr_set(struct net_device *netdev, void *p)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ struct sockaddr *addr = p;
++ int status = 0;
++
++ if (!is_valid_ether_addr(addr->sa_data))
++ return -EADDRNOTAVAIL;
++
++ status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
++ if (status)
++ return status;
++
++ status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
++ adapter->if_handle, &adapter->pmac_id);
++ if (!status)
++ memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
++
++ return status;
++}
++
++void netdev_stats_update(struct be_adapter *adapter)
++{
++ struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
++ struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
++ struct be_port_rxf_stats *port_stats =
++ &rxf_stats->port[adapter->port_num];
++ struct net_device_stats *dev_stats = &adapter->netdev->stats;
++ struct be_erx_stats *erx_stats = &hw_stats->erx;
++
++ dev_stats->rx_packets = port_stats->rx_total_frames;
++ dev_stats->tx_packets = port_stats->tx_unicastframes +
++ port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
++ dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
++ (u64) port_stats->rx_bytes_lsd;
++ dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
++ (u64) port_stats->tx_bytes_lsd;
++
++ /* bad pkts received */
++ dev_stats->rx_errors = port_stats->rx_crc_errors +
++ port_stats->rx_alignment_symbol_errors +
++ port_stats->rx_in_range_errors +
++ port_stats->rx_out_range_errors +
++ port_stats->rx_frame_too_long +
++ port_stats->rx_dropped_too_small +
++ port_stats->rx_dropped_too_short +
++ port_stats->rx_dropped_header_too_small +
++ port_stats->rx_dropped_tcp_length +
++ port_stats->rx_dropped_runt +
++ port_stats->rx_tcp_checksum_errs +
++ port_stats->rx_ip_checksum_errs +
++ port_stats->rx_udp_checksum_errs;
++
++ /* no space in linux buffers: best possible approximation */
++ dev_stats->rx_dropped =
++ erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
++
++ /* detailed rx errors */
++ dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
++ port_stats->rx_out_range_errors +
++ port_stats->rx_frame_too_long;
++
++ /* receive ring buffer overflow */
++ dev_stats->rx_over_errors = 0;
++
++ dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
++
++ /* frame alignment errors */
++ dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
++
++ /* receiver fifo overrun */
++ /* drops_no_pbuf is no per i/f, it's per BE card */
++ dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
++ port_stats->rx_input_fifo_overflow +
++ rxf_stats->rx_drops_no_pbuf;
++ /* receiver missed packetd */
++ dev_stats->rx_missed_errors = 0;
++
++ /* packet transmit problems */
++ dev_stats->tx_errors = 0;
++
++ /* no space available in linux */
++ dev_stats->tx_dropped = 0;
++
++ dev_stats->multicast = port_stats->rx_multicast_frames;
++ dev_stats->collisions = 0;
++
++ /* detailed tx_errors */
++ dev_stats->tx_aborted_errors = 0;
++ dev_stats->tx_carrier_errors = 0;
++ dev_stats->tx_fifo_errors = 0;
++ dev_stats->tx_heartbeat_errors = 0;
++ dev_stats->tx_window_errors = 0;
++}
++
++void be_link_status_update(struct be_adapter *adapter, bool link_up)
++{
++ struct net_device *netdev = adapter->netdev;
++
++ /* If link came up or went down */
++ if (adapter->link_up != link_up) {
++ adapter->link_speed = -1;
++ if (link_up) {
++ netif_start_queue(netdev);
++ netif_carrier_on(netdev);
++ printk(KERN_INFO "%s: Link up\n", netdev->name);
++ } else {
++ netif_stop_queue(netdev);
++ netif_carrier_off(netdev);
++ printk(KERN_INFO "%s: Link down\n", netdev->name);
++ }
++ adapter->link_up = link_up;
++ }
++}
++
++/* Update the EQ delay n BE based on the RX frags consumed / sec */
++static void be_rx_eqd_update(struct be_adapter *adapter)
++{
++ struct be_eq_obj *rx_eq = &adapter->rx_eq;
++ struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
++ ulong now = jiffies;
++ u32 eqd;
++
++ if (!rx_eq->enable_aic)
++ return;
++
++ /* Wrapped around */
++ if (time_before(now, stats->rx_fps_jiffies)) {
++ stats->rx_fps_jiffies = now;
++ return;
++ }
++
++ /* Update once a second */
++ if ((now - stats->rx_fps_jiffies) < HZ)
++ return;
++
++ stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
++ ((now - stats->rx_fps_jiffies) / HZ);
++
++ stats->rx_fps_jiffies = now;
++ stats->be_prev_rx_frags = stats->be_rx_frags;
++ eqd = stats->be_rx_fps / 110000;
++ eqd = eqd << 3;
++ if (eqd > rx_eq->max_eqd)
++ eqd = rx_eq->max_eqd;
++ if (eqd < rx_eq->min_eqd)
++ eqd = rx_eq->min_eqd;
++ if (eqd < 10)
++ eqd = 0;
++ if (eqd != rx_eq->cur_eqd)
++ be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
++
++ rx_eq->cur_eqd = eqd;
++}
++
++static struct net_device_stats *be_get_stats(struct net_device *dev)
++{
++ return &dev->stats;
++}
++
++static u32 be_calc_rate(u64 bytes, unsigned long ticks)
++{
++ u64 rate = bytes;
++
++ do_div(rate, ticks / HZ);
++ rate <<= 3; /* bytes/sec -> bits/sec */
++ do_div(rate, 1000000ul); /* MB/Sec */
++
++ return rate;
++}
++
++static void be_tx_rate_update(struct be_adapter *adapter)
++{
++ struct be_drvr_stats *stats = drvr_stats(adapter);
++ ulong now = jiffies;
++
++ /* Wrapped around? */
++ if (time_before(now, stats->be_tx_jiffies)) {
++ stats->be_tx_jiffies = now;
++ return;
++ }
++
++ /* Update tx rate once in two seconds */
++ if ((now - stats->be_tx_jiffies) > 2 * HZ) {
++ stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
++ - stats->be_tx_bytes_prev,
++ now - stats->be_tx_jiffies);
++ stats->be_tx_jiffies = now;
++ stats->be_tx_bytes_prev = stats->be_tx_bytes;
++ }
++}
++
++static void be_tx_stats_update(struct be_adapter *adapter,
++ u32 wrb_cnt, u32 copied, bool stopped)
++{
++ struct be_drvr_stats *stats = drvr_stats(adapter);
++ stats->be_tx_reqs++;
++ stats->be_tx_wrbs += wrb_cnt;
++ stats->be_tx_bytes += copied;
++ if (stopped)
++ stats->be_tx_stops++;
++}
++
++/* Determine number of WRB entries needed to xmit data in an skb */
++static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
++{
++ int cnt = (skb->len > skb->data_len);
++
++ cnt += skb_shinfo(skb)->nr_frags;
++
++ /* to account for hdr wrb */
++ cnt++;
++ if (cnt & 1) {
++ /* add a dummy to make it an even num */
++ cnt++;
++ *dummy = true;
++ } else
++ *dummy = false;
++ BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
++ return cnt;
++}
++
++static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
++{
++ wrb->frag_pa_hi = upper_32_bits(addr);
++ wrb->frag_pa_lo = addr & 0xFFFFFFFF;
++ wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
++}
++
++static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
++ bool vlan, u32 wrb_cnt, u32 len)
++{
++ memset(hdr, 0, sizeof(*hdr));
++
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
++
++ if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
++ hdr, skb_shinfo(skb)->gso_size);
++ } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
++ if (is_tcp_pkt(skb))
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
++ else if (is_udp_pkt(skb))
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
++ }
++
++ if (vlan && vlan_tx_tag_present(skb)) {
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
++ hdr, vlan_tx_tag_get(skb));
++ }
++
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
++ AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
++}
++
++
++static int make_tx_wrbs(struct be_adapter *adapter,
++ struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
++{
++ u64 busaddr;
++ u32 i, copied = 0;
++ struct pci_dev *pdev = adapter->pdev;
++ struct sk_buff *first_skb = skb;
++ struct be_queue_info *txq = &adapter->tx_obj.q;
++ struct be_eth_wrb *wrb;
++ struct be_eth_hdr_wrb *hdr;
++
++ atomic_add(wrb_cnt, &txq->used);
++ hdr = queue_head_node(txq);
++ queue_head_inc(txq);
++
++ if (skb->len > skb->data_len) {
++ int len = skb->len - skb->data_len;
++ busaddr = pci_map_single(pdev, skb->data, len,
++ PCI_DMA_TODEVICE);
++ wrb = queue_head_node(txq);
++ wrb_fill(wrb, busaddr, len);
++ be_dws_cpu_to_le(wrb, sizeof(*wrb));
++ queue_head_inc(txq);
++ copied += len;
++ }
++
++ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
++ struct skb_frag_struct *frag =
++ &skb_shinfo(skb)->frags[i];
++ busaddr = pci_map_page(pdev, frag->page,
++ frag->page_offset,
++ frag->size, PCI_DMA_TODEVICE);
++ wrb = queue_head_node(txq);
++ wrb_fill(wrb, busaddr, frag->size);
++ be_dws_cpu_to_le(wrb, sizeof(*wrb));
++ queue_head_inc(txq);
++ copied += frag->size;
++ }
++
++ if (dummy_wrb) {
++ wrb = queue_head_node(txq);
++ wrb_fill(wrb, 0, 0);
++ be_dws_cpu_to_le(wrb, sizeof(*wrb));
++ queue_head_inc(txq);
++ }
++
++ wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
++ wrb_cnt, copied);
++ be_dws_cpu_to_le(hdr, sizeof(*hdr));
++
++ return copied;
++}
++
++static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ struct be_tx_obj *tx_obj = &adapter->tx_obj;
++ struct be_queue_info *txq = &tx_obj->q;
++ u32 wrb_cnt = 0, copied = 0;
++ u32 start = txq->head;
++ bool dummy_wrb, stopped = false;
++
++ wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
++
++ copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
++
++ /* record the sent skb in the sent_skb table */
++ BUG_ON(tx_obj->sent_skb_list[start]);
++ tx_obj->sent_skb_list[start] = skb;
++
++ /* Ensure that txq has space for the next skb; Else stop the queue
++ * *BEFORE* ringing the tx doorbell, so that we serialze the
++ * tx compls of the current transmit which'll wake up the queue
++ */
++ if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
++ netif_stop_queue(netdev);
++ stopped = true;
++ }
++
++ be_txq_notify(adapter, txq->id, wrb_cnt);
++
++ netdev->trans_start = jiffies;
++
++ be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
++ return NETDEV_TX_OK;
++}
++
++static int be_change_mtu(struct net_device *netdev, int new_mtu)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ if (new_mtu < BE_MIN_MTU ||
++ new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
++ dev_info(&adapter->pdev->dev,
++ "MTU must be between %d and %d bytes\n",
++ BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
++ return -EINVAL;
++ }
++ dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
++ netdev->mtu, new_mtu);
++ netdev->mtu = new_mtu;
++ return 0;
++}
++
++/*
++ * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
++ * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
++ * set the BE in promiscuous VLAN mode.
++ */
++static int be_vid_config(struct be_adapter *adapter)
++{
++ u16 vtag[BE_NUM_VLANS_SUPPORTED];
++ u16 ntags = 0, i;
++ int status;
++
++ if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
++ /* Construct VLAN Table to give to HW */
++ for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
++ if (adapter->vlan_tag[i]) {
++ vtag[ntags] = cpu_to_le16(i);
++ ntags++;
++ }
++ }
++ status = be_cmd_vlan_config(adapter, adapter->if_handle,
++ vtag, ntags, 1, 0);
++ } else {
++ status = be_cmd_vlan_config(adapter, adapter->if_handle,
++ NULL, 0, 1, 1);
++ }
++ return status;
++}
++
++static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ struct be_eq_obj *rx_eq = &adapter->rx_eq;
++ struct be_eq_obj *tx_eq = &adapter->tx_eq;
++
++ be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
++ be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
++ adapter->vlan_grp = grp;
++ be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
++ be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
++}
++
++static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ adapter->num_vlans++;
++ adapter->vlan_tag[vid] = 1;
++
++ be_vid_config(adapter);
++}
++
++static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ adapter->num_vlans--;
++ adapter->vlan_tag[vid] = 0;
++
++ vlan_group_set_device(adapter->vlan_grp, vid, NULL);
++ be_vid_config(adapter);
++}
++
++static void be_set_multicast_list(struct net_device *netdev)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ if (netdev->flags & IFF_PROMISC) {
++ be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
++ adapter->promiscuous = true;
++ goto done;
++ }
++
++ /* BE was previously in promiscous mode; disable it */
++ if (adapter->promiscuous) {
++ adapter->promiscuous = false;
++ be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
++ }
++
++ /* Enable multicast promisc if num configured exceeds what we support */
++ if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
++ be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
++ &adapter->mc_cmd_mem);
++ goto done;
++ }
++
++ be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
++ netdev->mc_count, &adapter->mc_cmd_mem);
++done:
++ return;
++}
++
++static void be_rx_rate_update(struct be_adapter *adapter)
++{
++ struct be_drvr_stats *stats = drvr_stats(adapter);
++ ulong now = jiffies;
++
++ /* Wrapped around */
++ if (time_before(now, stats->be_rx_jiffies)) {
++ stats->be_rx_jiffies = now;
++ return;
++ }
++
++ /* Update the rate once in two seconds */
++ if ((now - stats->be_rx_jiffies) < 2 * HZ)
++ return;
++
++ stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
++ - stats->be_rx_bytes_prev,
++ now - stats->be_rx_jiffies);
++ stats->be_rx_jiffies = now;
++ stats->be_rx_bytes_prev = stats->be_rx_bytes;
++}
++
++static void be_rx_stats_update(struct be_adapter *adapter,
++ u32 pktsize, u16 numfrags)
++{
++ struct be_drvr_stats *stats = drvr_stats(adapter);
++
++ stats->be_rx_compl++;
++ stats->be_rx_frags += numfrags;
++ stats->be_rx_bytes += pktsize;
++}
++
++static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
++{
++ u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
++
++ l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
++ ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
++ ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
++ if (ip_version) {
++ tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
++ udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
++ }
++ ipv6_chk = (ip_version && (tcpf || udpf));
++
++ return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
++}
++
++static struct be_rx_page_info *
++get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
++{
++ struct be_rx_page_info *rx_page_info;
++ struct be_queue_info *rxq = &adapter->rx_obj.q;
++
++ rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
++ BUG_ON(!rx_page_info->page);
++
++ if (rx_page_info->last_page_user)
++ pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
++ adapter->big_page_size, PCI_DMA_FROMDEVICE);
++
++ atomic_dec(&rxq->used);
++ return rx_page_info;
++}
++
++/* Throwaway the data in the Rx completion */
++static void be_rx_compl_discard(struct be_adapter *adapter,
++ struct be_eth_rx_compl *rxcp)
++{
++ struct be_queue_info *rxq = &adapter->rx_obj.q;
++ struct be_rx_page_info *page_info;
++ u16 rxq_idx, i, num_rcvd;
++
++ rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
++ num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
++
++ for (i = 0; i < num_rcvd; i++) {
++ page_info = get_rx_page_info(adapter, rxq_idx);
++ put_page(page_info->page);
++ memset(page_info, 0, sizeof(*page_info));
++ index_inc(&rxq_idx, rxq->len);
++ }
++}
++
++/*
++ * skb_fill_rx_data forms a complete skb for an ether frame
++ * indicated by rxcp.
++ */
++static void skb_fill_rx_data(struct be_adapter *adapter,
++ struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
++{
++ struct be_queue_info *rxq = &adapter->rx_obj.q;
++ struct be_rx_page_info *page_info;
++ u16 rxq_idx, i, num_rcvd, j;
++ u32 pktsize, hdr_len, curr_frag_len, size;
++ u8 *start;
++
++ rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
++ pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
++ num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
++
++ page_info = get_rx_page_info(adapter, rxq_idx);
++
++ start = page_address(page_info->page) + page_info->page_offset;
++ prefetch(start);
++
++ /* Copy data in the first descriptor of this completion */
++ curr_frag_len = min(pktsize, rx_frag_size);
++
++ /* Copy the header portion into skb_data */
++ hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
++ memcpy(skb->data, start, hdr_len);
++ skb->len = curr_frag_len;
++ if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
++ /* Complete packet has now been moved to data */
++ put_page(page_info->page);
++ skb->data_len = 0;
++ skb->tail += curr_frag_len;
++ } else {
++ skb_shinfo(skb)->nr_frags = 1;
++ skb_shinfo(skb)->frags[0].page = page_info->page;
++ skb_shinfo(skb)->frags[0].page_offset =
++ page_info->page_offset + hdr_len;
++ skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
++ skb->data_len = curr_frag_len - hdr_len;
++ skb->tail += hdr_len;
++ }
++ memset(page_info, 0, sizeof(*page_info));
++
++ if (pktsize <= rx_frag_size) {
++ BUG_ON(num_rcvd != 1);
++ goto done;
++ }
++
++ /* More frags present for this completion */
++ size = pktsize;
++ for (i = 1, j = 0; i < num_rcvd; i++) {
++ size -= curr_frag_len;
++ index_inc(&rxq_idx, rxq->len);
++ page_info = get_rx_page_info(adapter, rxq_idx);
++
++ curr_frag_len = min(size, rx_frag_size);
++
++ /* Coalesce all frags from the same physical page in one slot */
++ if (page_info->page_offset == 0) {
++ /* Fresh page */
++ j++;
++ skb_shinfo(skb)->frags[j].page = page_info->page;
++ skb_shinfo(skb)->frags[j].page_offset =
++ page_info->page_offset;
++ skb_shinfo(skb)->frags[j].size = 0;
++ skb_shinfo(skb)->nr_frags++;
++ } else {
++ put_page(page_info->page);
++ }
++
++ skb_shinfo(skb)->frags[j].size += curr_frag_len;
++ skb->len += curr_frag_len;
++ skb->data_len += curr_frag_len;
++
++ memset(page_info, 0, sizeof(*page_info));
++ }
++ BUG_ON(j > MAX_SKB_FRAGS);
++
++done:
++ be_rx_stats_update(adapter, pktsize, num_rcvd);
++ return;
++}
++
++/* Process the RX completion indicated by rxcp when LRO is disabled */
++static void be_rx_compl_process(struct be_adapter *adapter,
++ struct be_eth_rx_compl *rxcp)
++{
++ struct sk_buff *skb;
++ u32 vtp, vid;
++
++ vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
++
++ skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
++ if (!skb) {
++ if (net_ratelimit())
++ dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
++ be_rx_compl_discard(adapter, rxcp);
++ return;
++ }
++
++ skb_reserve(skb, NET_IP_ALIGN);
++
++ skb_fill_rx_data(adapter, skb, rxcp);
++
++ if (do_pkt_csum(rxcp, adapter->rx_csum))
++ skb->ip_summed = CHECKSUM_NONE;
++ else
++ skb->ip_summed = CHECKSUM_UNNECESSARY;
++
++ skb->truesize = skb->len + sizeof(struct sk_buff);
++ skb->protocol = eth_type_trans(skb, adapter->netdev);
++ skb->dev = adapter->netdev;
++
++ if (vtp) {
++ if (!adapter->vlan_grp || adapter->num_vlans == 0) {
++ kfree_skb(skb);
++ return;
++ }
++ vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
++ vid = be16_to_cpu(vid);
++ vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
++ } else {
++ netif_receive_skb(skb);
++ }
++
++ adapter->netdev->last_rx = jiffies;
++
++ return;
++}
++
++/* Process the RX completion indicated by rxcp when LRO is enabled */
++static void be_rx_compl_process_lro(struct be_adapter *adapter,
++ struct be_eth_rx_compl *rxcp)
++{
++ struct be_rx_page_info *page_info;
++ struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
++ struct be_queue_info *rxq = &adapter->rx_obj.q;
++ u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
++ u16 i, rxq_idx = 0, vid, j;
++
++ num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
++ pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
++ vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
++ rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
++
++ remaining = pkt_size;
++ for (i = 0, j = -1; i < num_rcvd; i++) {
++ page_info = get_rx_page_info(adapter, rxq_idx);
++
++ curr_frag_len = min(remaining, rx_frag_size);
++
++ /* Coalesce all frags from the same physical page in one slot */
++ if (i == 0 || page_info->page_offset == 0) {
++ /* First frag or Fresh page */
++ j++;
++ rx_frags[j].page = page_info->page;
++ rx_frags[j].page_offset = page_info->page_offset;
++ rx_frags[j].size = 0;
++ } else {
++ put_page(page_info->page);
++ }
++ rx_frags[j].size += curr_frag_len;
++
++ remaining -= curr_frag_len;
++ index_inc(&rxq_idx, rxq->len);
++ memset(page_info, 0, sizeof(*page_info));
++ }
++ BUG_ON(j > MAX_SKB_FRAGS);
++
++ if (likely(!vlanf)) {
++ lro_receive_frags(&adapter->rx_obj.lro_mgr, rx_frags, pkt_size,
++ pkt_size, NULL, 0);
++ } else {
++ vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
++ vid = be16_to_cpu(vid);
++
++ if (!adapter->vlan_grp || adapter->num_vlans == 0)
++ return;
++
++ lro_vlan_hwaccel_receive_frags(&adapter->rx_obj.lro_mgr,
++ rx_frags, pkt_size, pkt_size, adapter->vlan_grp,
++ vid, NULL, 0);
++ }
++
++ be_rx_stats_update(adapter, pkt_size, num_rcvd);
++ return;
++}
++
++static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
++{
++ struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
++
++ if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
++ return NULL;
++
++ be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
++
++ queue_tail_inc(&adapter->rx_obj.cq);
++ return rxcp;
++}
++
++/* To reset the valid bit, we need to reset the whole word as
++ * when walking the queue the valid entries are little-endian
++ * and invalid entries are host endian
++ */
++static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
++{
++ rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
++}
++
++static inline struct page *be_alloc_pages(u32 size)
++{
++ gfp_t alloc_flags = GFP_ATOMIC;
++ u32 order = get_order(size);
++ if (order > 0)
++ alloc_flags |= __GFP_COMP;
++ return alloc_pages(alloc_flags, order);
++}
++
++/*
++ * Allocate a page, split it to fragments of size rx_frag_size and post as
++ * receive buffers to BE
++ */
++static void be_post_rx_frags(struct be_adapter *adapter)
++{
++ struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
++ struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
++ struct be_queue_info *rxq = &adapter->rx_obj.q;
++ struct page *pagep = NULL;
++ struct be_eth_rx_d *rxd;
++ u64 page_dmaaddr = 0, frag_dmaaddr;
++ u32 posted, page_offset = 0;
++
++ page_info = &page_info_tbl[rxq->head];
++ for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
++ if (!pagep) {
++ pagep = be_alloc_pages(adapter->big_page_size);
++ if (unlikely(!pagep)) {
++ drvr_stats(adapter)->be_ethrx_post_fail++;
++ break;
++ }
++ page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
++ adapter->big_page_size,
++ PCI_DMA_FROMDEVICE);
++ page_info->page_offset = 0;
++ } else {
++ get_page(pagep);
++ page_info->page_offset = page_offset + rx_frag_size;
++ }
++ page_offset = page_info->page_offset;
++ page_info->page = pagep;
++ pci_unmap_addr_set(page_info, bus, page_dmaaddr);
++ frag_dmaaddr = page_dmaaddr + page_info->page_offset;
++
++ rxd = queue_head_node(rxq);
++ rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
++ rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
++
++ /* Any space left in the current big page for another frag? */
++ if ((page_offset + rx_frag_size + rx_frag_size) >
++ adapter->big_page_size) {
++ pagep = NULL;
++ page_info->last_page_user = true;
++ }
++
++ prev_page_info = page_info;
++ queue_head_inc(rxq);
++ page_info = &page_info_tbl[rxq->head];
++ }
++ if (pagep)
++ prev_page_info->last_page_user = true;
++
++ if (posted) {
++ atomic_add(posted, &rxq->used);
++ be_rxq_notify(adapter, rxq->id, posted);
++ } else if (atomic_read(&rxq->used) == 0) {
++ /* Let be_worker replenish when memory is available */
++ adapter->rx_post_starved = true;
++ }
++
++ return;
++}
++
++static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
++{
++ struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
++
++ if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
++ return NULL;
++
++ be_dws_le_to_cpu(txcp, sizeof(*txcp));
++
++ txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
++
++ queue_tail_inc(tx_cq);
++ return txcp;
++}
++
++static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
++{
++ struct be_queue_info *txq = &adapter->tx_obj.q;
++ struct be_eth_wrb *wrb;
++ struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
++ struct sk_buff *sent_skb;
++ u64 busaddr;
++ u16 cur_index, num_wrbs = 0;
++
++ cur_index = txq->tail;
++ sent_skb = sent_skbs[cur_index];
++ BUG_ON(!sent_skb);
++ sent_skbs[cur_index] = NULL;
++
++ do {
++ cur_index = txq->tail;
++ wrb = queue_tail_node(txq);
++ be_dws_le_to_cpu(wrb, sizeof(*wrb));
++ busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
++ if (busaddr != 0) {
++ pci_unmap_single(adapter->pdev, busaddr,
++ wrb->frag_len, PCI_DMA_TODEVICE);
++ }
++ num_wrbs++;
++ queue_tail_inc(txq);
++ } while (cur_index != last_index);
++
++ atomic_sub(num_wrbs, &txq->used);
++
++ kfree_skb(sent_skb);
++}
++
++static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
++{
++ struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
++
++ if (!eqe->evt)
++ return NULL;
++
++ eqe->evt = le32_to_cpu(eqe->evt);
++ queue_tail_inc(&eq_obj->q);
++ return eqe;
++}
++
++static int event_handle(struct be_adapter *adapter,
++ struct be_eq_obj *eq_obj)
++{
++ struct be_eq_entry *eqe;
++ u16 num = 0;
++
++ while ((eqe = event_get(eq_obj)) != NULL) {
++ eqe->evt = 0;
++ num++;
++ }
++
++ /* Deal with any spurious interrupts that come
++ * without events
++ */
++ be_eq_notify(adapter, eq_obj->q.id, true, true, num);
++ if (num)
++ napi_schedule(&eq_obj->napi);
++
++ return num;
++}
++
++/* Just read and notify events without processing them.
++ * Used at the time of destroying event queues */
++static void be_eq_clean(struct be_adapter *adapter,
++ struct be_eq_obj *eq_obj)
++{
++ struct be_eq_entry *eqe;
++ u16 num = 0;
++
++ while ((eqe = event_get(eq_obj)) != NULL) {
++ eqe->evt = 0;
++ num++;
++ }
++
++ if (num)
++ be_eq_notify(adapter, eq_obj->q.id, false, true, num);
++}
++
++static void be_rx_q_clean(struct be_adapter *adapter)
++{
++ struct be_rx_page_info *page_info;
++ struct be_queue_info *rxq = &adapter->rx_obj.q;
++ struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
++ struct be_eth_rx_compl *rxcp;
++ u16 tail;
++
++ /* First cleanup pending rx completions */
++ while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
++ be_rx_compl_discard(adapter, rxcp);
++ be_rx_compl_reset(rxcp);
++ be_cq_notify(adapter, rx_cq->id, true, 1);
++ }
++
++ /* Then free posted rx buffer that were not used */
++ tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
++ for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
++ page_info = get_rx_page_info(adapter, tail);
++ put_page(page_info->page);
++ memset(page_info, 0, sizeof(*page_info));
++ }
++ BUG_ON(atomic_read(&rxq->used));
++}
++
++static void be_tx_compl_clean(struct be_adapter *adapter)
++{
++ struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
++ struct be_queue_info *txq = &adapter->tx_obj.q;
++ struct be_eth_tx_compl *txcp;
++ u16 end_idx, cmpl = 0, timeo = 0;
++
++ /* Wait for a max of 200ms for all the tx-completions to arrive. */
++ do {
++ while ((txcp = be_tx_compl_get(tx_cq))) {
++ end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
++ wrb_index, txcp);
++ be_tx_compl_process(adapter, end_idx);
++ cmpl++;
++ }
++ if (cmpl) {
++ be_cq_notify(adapter, tx_cq->id, false, cmpl);
++ cmpl = 0;
++ }
++
++ if (atomic_read(&txq->used) == 0 || ++timeo > 200)
++ break;
++
++ mdelay(1);
++ } while (true);
++
++ if (atomic_read(&txq->used))
++ dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
++ atomic_read(&txq->used));
++}
++
++static void be_mcc_queues_destroy(struct be_adapter *adapter)
++{
++ struct be_queue_info *q;
++
++ q = &adapter->mcc_obj.q;
++ if (q->created)
++ be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
++ be_queue_free(adapter, q);
++
++ q = &adapter->mcc_obj.cq;
++ if (q->created)
++ be_cmd_q_destroy(adapter, q, QTYPE_CQ);
++ be_queue_free(adapter, q);
++}
++
++/* Must be called only after TX qs are created as MCC shares TX EQ */
++static int be_mcc_queues_create(struct be_adapter *adapter)
++{
++ struct be_queue_info *q, *cq;
++
++ /* Alloc MCC compl queue */
++ cq = &adapter->mcc_obj.cq;
++ if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
++ sizeof(struct be_mcc_compl)))
++ goto err;
++
++ /* Ask BE to create MCC compl queue; share TX's eq */
++ if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
++ goto mcc_cq_free;
++
++ /* Alloc MCC queue */
++ q = &adapter->mcc_obj.q;
++ if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
++ goto mcc_cq_destroy;
++
++ /* Ask BE to create MCC queue */
++ if (be_cmd_mccq_create(adapter, q, cq))
++ goto mcc_q_free;
++
++ return 0;
++
++mcc_q_free:
++ be_queue_free(adapter, q);
++mcc_cq_destroy:
++ be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
++mcc_cq_free:
++ be_queue_free(adapter, cq);
++err:
++ return -1;
++}
++
++static void be_tx_queues_destroy(struct be_adapter *adapter)
++{
++ struct be_queue_info *q;
++
++ q = &adapter->tx_obj.q;
++ if (q->created)
++ be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
++ be_queue_free(adapter, q);
++
++ q = &adapter->tx_obj.cq;
++ if (q->created)
++ be_cmd_q_destroy(adapter, q, QTYPE_CQ);
++ be_queue_free(adapter, q);
++
++ /* Clear any residual events */
++ be_eq_clean(adapter, &adapter->tx_eq);
++
++ q = &adapter->tx_eq.q;
++ if (q->created)
++ be_cmd_q_destroy(adapter, q, QTYPE_EQ);
++ be_queue_free(adapter, q);
++}
++
++static int be_tx_queues_create(struct be_adapter *adapter)
++{
++ struct be_queue_info *eq, *q, *cq;
++
++ adapter->tx_eq.max_eqd = 0;
++ adapter->tx_eq.min_eqd = 0;
++ adapter->tx_eq.cur_eqd = 96;
++ adapter->tx_eq.enable_aic = false;
++ /* Alloc Tx Event queue */
++ eq = &adapter->tx_eq.q;
++ if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
++ return -1;
++
++ /* Ask BE to create Tx Event queue */
++ if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
++ goto tx_eq_free;
++ /* Alloc TX eth compl queue */
++ cq = &adapter->tx_obj.cq;
++ if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
++ sizeof(struct be_eth_tx_compl)))
++ goto tx_eq_destroy;
++
++ /* Ask BE to create Tx eth compl queue */
++ if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
++ goto tx_cq_free;
++
++ /* Alloc TX eth queue */
++ q = &adapter->tx_obj.q;
++ if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
++ goto tx_cq_destroy;
++
++ /* Ask BE to create Tx eth queue */
++ if (be_cmd_txq_create(adapter, q, cq))
++ goto tx_q_free;
++ return 0;
++
++tx_q_free:
++ be_queue_free(adapter, q);
++tx_cq_destroy:
++ be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
++tx_cq_free:
++ be_queue_free(adapter, cq);
++tx_eq_destroy:
++ be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
++tx_eq_free:
++ be_queue_free(adapter, eq);
++ return -1;
++}
++
++static void be_rx_queues_destroy(struct be_adapter *adapter)
++{
++ struct be_queue_info *q;
++
++ q = &adapter->rx_obj.q;
++ if (q->created) {
++ be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
++ be_rx_q_clean(adapter);
++ }
++ be_queue_free(adapter, q);
++
++ q = &adapter->rx_obj.cq;
++ if (q->created)
++ be_cmd_q_destroy(adapter, q, QTYPE_CQ);
++ be_queue_free(adapter, q);
++
++ /* Clear any residual events */
++ be_eq_clean(adapter, &adapter->rx_eq);
++
++ q = &adapter->rx_eq.q;
++ if (q->created)
++ be_cmd_q_destroy(adapter, q, QTYPE_EQ);
++ be_queue_free(adapter, q);
++}
++
++static int be_rx_queues_create(struct be_adapter *adapter)
++{
++ struct be_queue_info *eq, *q, *cq;
++ int rc;
++
++ adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
++ adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
++ adapter->rx_eq.max_eqd = BE_MAX_EQD;
++ adapter->rx_eq.min_eqd = 0;
++ adapter->rx_eq.cur_eqd = 0;
++ adapter->rx_eq.enable_aic = true;
++
++ /* Alloc Rx Event queue */
++ eq = &adapter->rx_eq.q;
++ rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
++ sizeof(struct be_eq_entry));
++ if (rc)
++ return rc;
++
++ /* Ask BE to create Rx Event queue */
++ rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
++ if (rc)
++ goto rx_eq_free;
++
++ /* Alloc RX eth compl queue */
++ cq = &adapter->rx_obj.cq;
++ rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
++ sizeof(struct be_eth_rx_compl));
++ if (rc)
++ goto rx_eq_destroy;
++
++ /* Ask BE to create Rx eth compl queue */
++ rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
++ if (rc)
++ goto rx_cq_free;
++
++ /* Alloc RX eth queue */
++ q = &adapter->rx_obj.q;
++ rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
++ if (rc)
++ goto rx_cq_destroy;
++
++ /* Ask BE to create Rx eth queue */
++ rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
++ BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
++ if (rc)
++ goto rx_q_free;
++
++ return 0;
++rx_q_free:
++ be_queue_free(adapter, q);
++rx_cq_destroy:
++ be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
++rx_cq_free:
++ be_queue_free(adapter, cq);
++rx_eq_destroy:
++ be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
++rx_eq_free:
++ be_queue_free(adapter, eq);
++ return rc;
++}
++
++/* There are 8 evt ids per func. Retruns the evt id's bit number */
++static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
++{
++ return eq_id - 8 * be_pci_func(adapter);
++}
++
++static irqreturn_t be_intx(int irq, void *dev)
++{
++ struct be_adapter *adapter = dev;
++ int isr;
++
++ isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
++ (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
++ if (!isr)
++ return IRQ_NONE;
++
++ event_handle(adapter, &adapter->tx_eq);
++ event_handle(adapter, &adapter->rx_eq);
++
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t be_msix_rx(int irq, void *dev)
++{
++ struct be_adapter *adapter = dev;
++
++ event_handle(adapter, &adapter->rx_eq);
++
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
++{
++ struct be_adapter *adapter = dev;
++
++ event_handle(adapter, &adapter->tx_eq);
++
++ return IRQ_HANDLED;
++}
++
++static inline bool do_lro(struct be_adapter *adapter,
++ struct be_eth_rx_compl *rxcp)
++{
++ int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
++ int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
++
++ if (err)
++ drvr_stats(adapter)->be_rxcp_err++;
++
++ return (!tcp_frame || err || (adapter->max_rx_coal <= 1)) ?
++ false : true;
++}
++
++int be_poll_rx(struct napi_struct *napi, int budget)
++{
++ struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
++ struct be_adapter *adapter =
++ container_of(rx_eq, struct be_adapter, rx_eq);
++ struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
++ struct be_eth_rx_compl *rxcp;
++ u32 work_done;
++
++ adapter->stats.drvr_stats.be_rx_polls++;
++ for (work_done = 0; work_done < budget; work_done++) {
++ rxcp = be_rx_compl_get(adapter);
++ if (!rxcp)
++ break;
++
++ if (do_lro(adapter, rxcp))
++ be_rx_compl_process_lro(adapter, rxcp);
++ else
++ be_rx_compl_process(adapter, rxcp);
++
++ be_rx_compl_reset(rxcp);
++ }
++
++ lro_flush_all(&adapter->rx_obj.lro_mgr);
++
++ /* Refill the queue */
++ if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
++ be_post_rx_frags(adapter);
++
++ /* All consumed */
++ if (work_done < budget) {
++ napi_complete(napi);
++ be_cq_notify(adapter, rx_cq->id, true, work_done);
++ } else {
++ /* More to be consumed; continue with interrupts disabled */
++ be_cq_notify(adapter, rx_cq->id, false, work_done);
++ }
++ return work_done;
++}
++
++void be_process_tx(struct be_adapter *adapter)
++{
++ struct be_queue_info *txq = &adapter->tx_obj.q;
++ struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
++ struct be_eth_tx_compl *txcp;
++ u32 num_cmpl = 0;
++ u16 end_idx;
++
++ while ((txcp = be_tx_compl_get(tx_cq))) {
++ end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
++ wrb_index, txcp);
++ be_tx_compl_process(adapter, end_idx);
++ num_cmpl++;
++ }
++
++ if (num_cmpl) {
++ be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
++
++ /* As Tx wrbs have been freed up, wake up netdev queue if
++ * it was stopped due to lack of tx wrbs.
++ */
++ if (netif_queue_stopped(adapter->netdev) &&
++ atomic_read(&txq->used) < txq->len / 2) {
++ netif_wake_queue(adapter->netdev);
++ }
++
++ drvr_stats(adapter)->be_tx_events++;
++ drvr_stats(adapter)->be_tx_compl += num_cmpl;
++ }
++}
++
++/* As TX and MCC share the same EQ check for both TX and MCC completions.
++ * For TX/MCC we don't honour budget; consume everything
++ */
++static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
++{
++ struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
++ struct be_adapter *adapter =
++ container_of(tx_eq, struct be_adapter, tx_eq);
++
++ napi_complete(napi);
++
++ be_process_tx(adapter);
++
++ be_process_mcc(adapter);
++
++ return 1;
++}
++
++static void be_worker(struct work_struct *work)
++{
++ struct be_adapter *adapter =
++ container_of(work, struct be_adapter, work.work);
++
++ be_cmd_get_stats(adapter, &adapter->stats.cmd);
++
++ /* Set EQ delay */
++ be_rx_eqd_update(adapter);
++
++ be_tx_rate_update(adapter);
++ be_rx_rate_update(adapter);
++
++ if (adapter->rx_post_starved) {
++ adapter->rx_post_starved = false;
++ be_post_rx_frags(adapter);
++ }
++
++ schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
++}
++
++static void be_msix_disable(struct be_adapter *adapter)
++{
++ if (adapter->msix_enabled) {
++ pci_disable_msix(adapter->pdev);
++ adapter->msix_enabled = false;
++ }
++}
++
++static void be_msix_enable(struct be_adapter *adapter)
++{
++ int i, status;
++
++ for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
++ adapter->msix_entries[i].entry = i;
++
++ status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
++ BE_NUM_MSIX_VECTORS);
++ if (status == 0)
++ adapter->msix_enabled = true;
++ return;
++}
++
++static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
++{
++ return adapter->msix_entries[
++ be_evt_bit_get(adapter, eq_id)].vector;
++}
++
++static int be_request_irq(struct be_adapter *adapter,
++ struct be_eq_obj *eq_obj,
++ void *handler, char *desc)
++{
++ struct net_device *netdev = adapter->netdev;
++ int vec;
++
++ sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
++ vec = be_msix_vec_get(adapter, eq_obj->q.id);
++ return request_irq(vec, handler, 0, eq_obj->desc, adapter);
++}
++
++static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
++{
++ int vec = be_msix_vec_get(adapter, eq_obj->q.id);
++ free_irq(vec, adapter);
++}
++
++static int be_msix_register(struct be_adapter *adapter)
++{
++ int status;
++
++ status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
++ if (status)
++ goto err;
++
++ status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
++ if (status)
++ goto free_tx_irq;
++
++ return 0;
++
++free_tx_irq:
++ be_free_irq(adapter, &adapter->tx_eq);
++err:
++ dev_warn(&adapter->pdev->dev,
++ "MSIX Request IRQ failed - err %d\n", status);
++ pci_disable_msix(adapter->pdev);
++ adapter->msix_enabled = false;
++ return status;
++}
++
++static int be_irq_register(struct be_adapter *adapter)
++{
++ struct net_device *netdev = adapter->netdev;
++ int status;
++
++ if (adapter->msix_enabled) {
++ status = be_msix_register(adapter);
++ if (status == 0)
++ goto done;
++ }
++
++ /* INTx */
++ netdev->irq = adapter->pdev->irq;
++ status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
++ adapter);
++ if (status) {
++ dev_err(&adapter->pdev->dev,
++ "INTx request IRQ failed - err %d\n", status);
++ return status;
++ }
++done:
++ adapter->isr_registered = true;
++ return 0;
++}
++
++static void be_irq_unregister(struct be_adapter *adapter)
++{
++ struct net_device *netdev = adapter->netdev;
++
++ if (!adapter->isr_registered)
++ return;
++
++ /* INTx */
++ if (!adapter->msix_enabled) {
++ free_irq(netdev->irq, adapter);
++ goto done;
++ }
++
++ /* MSIx */
++ be_free_irq(adapter, &adapter->tx_eq);
++ be_free_irq(adapter, &adapter->rx_eq);
++done:
++ adapter->isr_registered = false;
++ return;
++}
++
++static int be_open(struct net_device *netdev)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ struct be_eq_obj *rx_eq = &adapter->rx_eq;
++ struct be_eq_obj *tx_eq = &adapter->tx_eq;
++ bool link_up;
++ int status;
++ u8 mac_speed;
++ u16 link_speed;
++
++ /* First time posting */
++ be_post_rx_frags(adapter);
++
++ napi_enable(&rx_eq->napi);
++ napi_enable(&tx_eq->napi);
++
++ be_irq_register(adapter);
++
++ be_intr_set(adapter, true);
++
++ /* The evt queues are created in unarmed state; arm them */
++ be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
++ be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
++
++ /* Rx compl queue may be in unarmed state; rearm it */
++ be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
++
++ status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
++ &link_speed);
++ if (status)
++ goto ret_sts;
++ be_link_status_update(adapter, link_up);
++
++ status = be_vid_config(adapter);
++ if (status)
++ goto ret_sts;
++
++ status = be_cmd_set_flow_control(adapter,
++ adapter->tx_fc, adapter->rx_fc);
++ if (status)
++ goto ret_sts;
++
++ schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
++ret_sts:
++ return status;
++}
++
++static int be_setup_wol(struct be_adapter *adapter, bool enable)
++{
++ struct be_dma_mem cmd;
++ int status = 0;
++ u8 mac[ETH_ALEN];
++
++ memset(mac, 0, ETH_ALEN);
++
++ cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
++ cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
++ if (cmd.va == NULL)
++ return -1;
++ memset(cmd.va, 0, cmd.size);
++
++ if (enable) {
++ status = pci_write_config_dword(adapter->pdev,
++ PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
++ if (status) {
++ dev_err(&adapter->pdev->dev,
++ "Could not enable Wake-on-lan \n");
++ pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
++ cmd.dma);
++ return status;
++ }
++ status = be_cmd_enable_magic_wol(adapter,
++ adapter->netdev->dev_addr, &cmd);
++ pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
++ pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
++ } else {
++ status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
++ pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
++ pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
++ }
++
++ pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
++ return status;
++}
++
++static int be_setup(struct be_adapter *adapter)
++{
++ struct net_device *netdev = adapter->netdev;
++ u32 cap_flags, en_flags;
++ int status;
++
++ cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
++ BE_IF_FLAGS_MCAST_PROMISCUOUS |
++ BE_IF_FLAGS_PROMISCUOUS |
++ BE_IF_FLAGS_PASS_L3L4_ERRORS;
++ en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
++ BE_IF_FLAGS_PASS_L3L4_ERRORS;
++
++ status = be_cmd_if_create(adapter, cap_flags, en_flags,
++ netdev->dev_addr, false/* pmac_invalid */,
++ &adapter->if_handle, &adapter->pmac_id);
++ if (status != 0)
++ goto do_none;
++
++ status = be_tx_queues_create(adapter);
++ if (status != 0)
++ goto if_destroy;
++
++ status = be_rx_queues_create(adapter);
++ if (status != 0)
++ goto tx_qs_destroy;
++
++ status = be_mcc_queues_create(adapter);
++ if (status != 0)
++ goto rx_qs_destroy;
++
++ adapter->link_speed = -1;
++
++ return 0;
++
++rx_qs_destroy:
++ be_rx_queues_destroy(adapter);
++tx_qs_destroy:
++ be_tx_queues_destroy(adapter);
++if_destroy:
++ be_cmd_if_destroy(adapter, adapter->if_handle);
++do_none:
++ return status;
++}
++
++static int be_clear(struct be_adapter *adapter)
++{
++ be_mcc_queues_destroy(adapter);
++ be_rx_queues_destroy(adapter);
++ be_tx_queues_destroy(adapter);
++
++ be_cmd_if_destroy(adapter, adapter->if_handle);
++
++ /* tell fw we're done with firing cmds */
++ be_cmd_fw_clean(adapter);
++ return 0;
++}
++
++static int be_close(struct net_device *netdev)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++ struct be_eq_obj *rx_eq = &adapter->rx_eq;
++ struct be_eq_obj *tx_eq = &adapter->tx_eq;
++ int vec;
++
++ cancel_delayed_work_sync(&adapter->work);
++
++ netif_stop_queue(netdev);
++ netif_carrier_off(netdev);
++ adapter->link_up = false;
++
++ be_intr_set(adapter, false);
++
++ if (adapter->msix_enabled) {
++ vec = be_msix_vec_get(adapter, tx_eq->q.id);
++ synchronize_irq(vec);
++ vec = be_msix_vec_get(adapter, rx_eq->q.id);
++ synchronize_irq(vec);
++ } else {
++ synchronize_irq(netdev->irq);
++ }
++ be_irq_unregister(adapter);
++
++ napi_disable(&rx_eq->napi);
++ napi_disable(&tx_eq->napi);
++
++ /* Wait for all pending tx completions to arrive so that
++ * all tx skbs are freed.
++ */
++ be_tx_compl_clean(adapter);
++
++ return 0;
++}
++
++static int be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
++ void **ip_hdr, void **tcpudp_hdr,
++ u64 *hdr_flags, void *priv)
++{
++ struct ethhdr *eh;
++ struct vlan_ethhdr *veh;
++ struct iphdr *iph;
++ u8 *va = page_address(frag->page) + frag->page_offset;
++ unsigned long ll_hlen;
++
++ prefetch(va);
++ eh = (struct ethhdr *)va;
++ *mac_hdr = eh;
++ ll_hlen = ETH_HLEN;
++ if (eh->h_proto != htons(ETH_P_IP)) {
++ if (eh->h_proto == htons(ETH_P_8021Q)) {
++ veh = (struct vlan_ethhdr *)va;
++ if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
++ return -1;
++
++ ll_hlen += VLAN_HLEN;
++ } else {
++ return -1;
++ }
++ }
++ *hdr_flags = LRO_IPV4;
++ iph = (struct iphdr *)(va + ll_hlen);
++ *ip_hdr = iph;
++ if (iph->protocol != IPPROTO_TCP)
++ return -1;
++ *hdr_flags |= LRO_TCP;
++ *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
++
++ return 0;
++}
++
++static void be_lro_init(struct be_adapter *adapter, struct net_device *netdev)
++{
++ struct net_lro_mgr *lro_mgr;
++
++ lro_mgr = &adapter->rx_obj.lro_mgr;
++ lro_mgr->dev = netdev;
++ lro_mgr->features = LRO_F_NAPI;
++ lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
++ lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
++ lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
++ lro_mgr->lro_arr = adapter->rx_obj.lro_desc;
++ lro_mgr->get_frag_header = be_get_frag_header;
++ lro_mgr->max_aggr = BE_MAX_FRAGS_PER_FRAME;
++}
++
++static void be_netdev_init(struct net_device *netdev)
++{
++ struct be_adapter *adapter = netdev_priv(netdev);
++
++ netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
++ NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM;
++
++ netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
++
++ netdev->flags |= IFF_MULTICAST;
++
++ adapter->rx_csum = true;
++
++ /* Default settings for Rx and Tx flow control */
++ adapter->rx_fc = true;
++ adapter->tx_fc = true;
++
++ netdev->open = &be_open;
++ netdev->stop = &be_close;
++ netdev->hard_start_xmit = &be_xmit;
++ netdev->get_stats = &be_get_stats;
++ netdev->set_rx_mode = &be_set_multicast_list;
++ netdev->set_mac_address = &be_mac_addr_set;
++ netdev->change_mtu = &be_change_mtu;
++ netdev->vlan_rx_register = &be_vlan_register;
++ netdev->vlan_rx_add_vid = &be_vlan_add_vid;
++ netdev->vlan_rx_kill_vid = &be_vlan_rem_vid;
++
++ SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
++
++ be_lro_init(adapter, netdev);
++
++ netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
++ BE_NAPI_WEIGHT);
++ netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
++ BE_NAPI_WEIGHT);
++
++ netif_carrier_off(netdev);
++ netif_stop_queue(netdev);
++}
++
++static void be_unmap_pci_bars(struct be_adapter *adapter)
++{
++ if (adapter->csr)
++ iounmap(adapter->csr);
++ if (adapter->db)
++ iounmap(adapter->db);
++ if (adapter->pcicfg)
++ iounmap(adapter->pcicfg);
++}
++
++static int be_map_pci_bars(struct be_adapter *adapter)
++{
++ u8 __iomem *addr;
++ int pcicfg_reg;
++
++ addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
++ pci_resource_len(adapter->pdev, 2));
++ if (addr == NULL)
++ return -ENOMEM;
++ adapter->csr = addr;
++
++ addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
++ 128 * 1024);
++ if (addr == NULL)
++ goto pci_map_err;
++ adapter->db = addr;
++
++ if (adapter->generation == BE_GEN2)
++ pcicfg_reg = 1;
++ else
++ pcicfg_reg = 0;
++
++ addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
++ pci_resource_len(adapter->pdev, pcicfg_reg));
++ if (addr == NULL)
++ goto pci_map_err;
++ adapter->pcicfg = addr;
++
++ return 0;
++pci_map_err:
++ be_unmap_pci_bars(adapter);
++ return -ENOMEM;
++}
++
++
++static void be_ctrl_cleanup(struct be_adapter *adapter)
++{
++ struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
++
++ be_unmap_pci_bars(adapter);
++
++ if (mem->va)
++ pci_free_consistent(adapter->pdev, mem->size,
++ mem->va, mem->dma);
++
++ mem = &adapter->mc_cmd_mem;
++ if (mem->va)
++ pci_free_consistent(adapter->pdev, mem->size,
++ mem->va, mem->dma);
++}
++
++static int be_ctrl_init(struct be_adapter *adapter)
++{
++ struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
++ struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
++ struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
++ int status;
++
++ status = be_map_pci_bars(adapter);
++ if (status)
++ goto done;
++
++ mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
++ mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
++ mbox_mem_alloc->size, &mbox_mem_alloc->dma);
++ if (!mbox_mem_alloc->va) {
++ status = -ENOMEM;
++ goto unmap_pci_bars;
++ }
++
++ mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
++ mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
++ mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
++ memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
++
++ mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
++ mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
++ &mc_cmd_mem->dma);
++ if (mc_cmd_mem->va == NULL) {
++ status = -ENOMEM;
++ goto free_mbox;
++ }
++ memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
++
++ spin_lock_init(&adapter->mbox_lock);
++ spin_lock_init(&adapter->mcc_lock);
++ spin_lock_init(&adapter->mcc_cq_lock);
++
++ return 0;
++
++free_mbox:
++ pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
++ mbox_mem_alloc->va, mbox_mem_alloc->dma);
++
++unmap_pci_bars:
++ be_unmap_pci_bars(adapter);
++
++done:
++ return status;
++}
++
++static void be_stats_cleanup(struct be_adapter *adapter)
++{
++ struct be_stats_obj *stats = &adapter->stats;
++ struct be_dma_mem *cmd = &stats->cmd;
++
++ if (cmd->va)
++ pci_free_consistent(adapter->pdev, cmd->size,
++ cmd->va, cmd->dma);
++}
++
++static int be_stats_init(struct be_adapter *adapter)
++{
++ struct be_stats_obj *stats = &adapter->stats;
++ struct be_dma_mem *cmd = &stats->cmd;
++
++ cmd->size = sizeof(struct be_cmd_req_get_stats);
++ cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
++ if (cmd->va == NULL)
++ return -1;
++ memset(cmd->va, 0, cmd->size);
++ return 0;
++}
++
++static void __devexit be_remove(struct pci_dev *pdev)
++{
++ struct be_adapter *adapter = pci_get_drvdata(pdev);
++
++ if (!adapter)
++ return;
++
++ unregister_netdev(adapter->netdev);
++
++ be_clear(adapter);
++
++ be_stats_cleanup(adapter);
++
++ be_ctrl_cleanup(adapter);
++
++ be_msix_disable(adapter);
++
++ pci_set_drvdata(pdev, NULL);
++ pci_release_regions(pdev);
++ pci_disable_device(pdev);
++
++ free_netdev(adapter->netdev);
++}
++
++static int be_get_config(struct be_adapter *adapter)
++{
++ int status;
++ u8 mac[ETH_ALEN];
++
++ status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
++ if (status)
++ return status;
++
++ status = be_cmd_query_fw_cfg(adapter, &adapter->port_num);
++ if (status)
++ return status;
++
++ memset(mac, 0, ETH_ALEN);
++ status = be_cmd_mac_addr_query(adapter, mac,
++ MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
++ if (status)
++ return status;
++
++ if (!is_valid_ether_addr(mac))
++ return -EADDRNOTAVAIL;
++
++ memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
++ memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
++
++ return 0;
++}
++
++static int __devinit be_probe(struct pci_dev *pdev,
++ const struct pci_device_id *pdev_id)
++{
++ int status = 0;
++ struct be_adapter *adapter;
++ struct net_device *netdev;
++
++ status = pci_enable_device(pdev);
++ if (status)
++ goto do_none;
++
++ status = pci_request_regions(pdev, DRV_NAME);
++ if (status)
++ goto disable_dev;
++ pci_set_master(pdev);
++
++ netdev = alloc_etherdev(sizeof(struct be_adapter));
++ if (netdev == NULL) {
++ status = -ENOMEM;
++ goto rel_reg;
++ }
++ adapter = netdev_priv(netdev);
++
++ switch (pdev->device) {
++ case BE_DEVICE_ID1:
++ case OC_DEVICE_ID1:
++ adapter->generation = BE_GEN2;
++ break;
++ case BE_DEVICE_ID2:
++ case OC_DEVICE_ID2:
++ adapter->generation = BE_GEN3;
++ break;
++ default:
++ adapter->generation = 0;
++ }
++
++ adapter->pdev = pdev;
++ pci_set_drvdata(pdev, adapter);
++ adapter->netdev = netdev;
++ be_netdev_init(netdev);
++ SET_NETDEV_DEV(netdev, &pdev->dev);
++
++ be_msix_enable(adapter);
++
++ status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
++ if (!status) {
++ netdev->features |= NETIF_F_HIGHDMA;
++ } else {
++ status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
++ if (status) {
++ dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
++ goto free_netdev;
++ }
++ }
++
++ status = be_ctrl_init(adapter);
++ if (status)
++ goto free_netdev;
++
++ /* sync up with fw's ready state */
++ status = be_cmd_POST(adapter);
++ if (status)
++ goto ctrl_clean;
++
++ /* tell fw we're ready to fire cmds */
++ status = be_cmd_fw_init(adapter);
++ if (status)
++ goto ctrl_clean;
++
++ status = be_cmd_reset_function(adapter);
++ if (status)
++ goto ctrl_clean;
++
++ status = be_stats_init(adapter);
++ if (status)
++ goto ctrl_clean;
++
++ status = be_get_config(adapter);
++ if (status)
++ goto stats_clean;
++
++ INIT_DELAYED_WORK(&adapter->work, be_worker);
++
++ status = be_setup(adapter);
++ if (status)
++ goto stats_clean;
++
++ status = register_netdev(netdev);
++ if (status != 0)
++ goto unsetup;
++
++ dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
++ return 0;
++
++unsetup:
++ be_clear(adapter);
++stats_clean:
++ be_stats_cleanup(adapter);
++ctrl_clean:
++ be_ctrl_cleanup(adapter);
++free_netdev:
++ be_msix_disable(adapter);
++ free_netdev(adapter->netdev);
++ pci_set_drvdata(pdev, NULL);
++rel_reg:
++ pci_release_regions(pdev);
++disable_dev:
++ pci_disable_device(pdev);
++do_none:
++ dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
++ return status;
++}
++
++static int be_suspend(struct pci_dev *pdev, pm_message_t state)
++{
++ struct be_adapter *adapter = pci_get_drvdata(pdev);
++ struct net_device *netdev = adapter->netdev;
++
++ if (adapter->wol)
++ be_setup_wol(adapter, true);
++
++ netif_device_detach(netdev);
++ if (netif_running(netdev)) {
++ rtnl_lock();
++ be_close(netdev);
++ rtnl_unlock();
++ }
++ be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
++ be_clear(adapter);
++
++ pci_save_state(pdev);
++ pci_disable_device(pdev);
++ pci_set_power_state(pdev, pci_choose_state(pdev, state));
++ return 0;
++}
++
++static int be_resume(struct pci_dev *pdev)
++{
++ int status = 0;
++ struct be_adapter *adapter = pci_get_drvdata(pdev);
++ struct net_device *netdev = adapter->netdev;
++
++ netif_device_detach(netdev);
++
++ status = pci_enable_device(pdev);
++ if (status)
++ return status;
++
++ pci_set_power_state(pdev, 0);
++ pci_restore_state(pdev);
++
++ /* tell fw we're ready to fire cmds */
++ status = be_cmd_fw_init(adapter);
++ if (status)
++ return status;
++
++ be_setup(adapter);
++ if (netif_running(netdev)) {
++ rtnl_lock();
++ be_open(netdev);
++ rtnl_unlock();
++ }
++ netif_device_attach(netdev);
++
++ if (adapter->wol)
++ be_setup_wol(adapter, false);
++ return 0;
++}
++
++static struct pci_driver be_driver = {
++ .name = DRV_NAME,
++ .id_table = be_dev_ids,
++ .probe = be_probe,
++ .remove = be_remove,
++ .suspend = be_suspend,
++ .resume = be_resume
++};
++
++static int __init be_init_module(void)
++{
++ if (rx_frag_size != 8192 && rx_frag_size != 4096
++ && rx_frag_size != 2048) {
++ printk(KERN_WARNING DRV_NAME
++ " : Module param rx_frag_size must be 2048/4096/8192."
++ " Using 2048\n");
++ rx_frag_size = 2048;
++ }
++
++ return pci_register_driver(&be_driver);
++}
++module_init(be_init_module);
++
++static void __exit be_exit_module(void)
++{
++ pci_unregister_driver(&be_driver);
++}
++module_exit(be_exit_module);
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/ata-piix-add-intel-pci-ids.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/ata-piix-add-intel-pci-ids.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/ata-piix-add-intel-pci-ids.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/ata-piix-add-intel-pci-ids.patch)
@@ -0,0 +1,33 @@
+From: Seth Heasley <seth.heasley at intel.com>
+Date: Tue, 12 Aug 2008 00:03:18 +0000 (-0700)
+Subject: ata_piix: IDE Mode SATA patch for Intel Ibex Peak DeviceIDs
+X-Git-Tag: v2.6.27-rc5~51^2~9
+X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftorvalds%2Flinux-2.6.git;a=commitdiff_plain;h=c6c6a1afefe51d488c050464f261d4711bea9a37
+
+ata_piix: IDE Mode SATA patch for Intel Ibex Peak DeviceIDs
+
+This patch adds the Intel Ibex Peak (PCH) IDE mode SATA Controller DeviceIDs.
+
+Signed-off-by: Seth Heasley <seth.heasley at intel.com>
+Signed-off-by: Jeff Garzik <jgarzik at redhat.com>
+---
+
+diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
+index c294121..b1d08a8 100644
+--- a/drivers/ata/ata_piix.c
++++ b/drivers/ata/ata_piix.c
+@@ -275,6 +275,14 @@ static const struct pci_device_id piix_pci_tbl[] = {
+ { 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
+ /* SATA Controller IDE (ICH10) */
+ { 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
++ /* SATA Controller IDE (PCH) */
++ { 0x8086, 0x3b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
++ /* SATA Controller IDE (PCH) */
++ { 0x8086, 0x3b26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
++ /* SATA Controller IDE (PCH) */
++ { 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
++ /* SATA Controller IDE (PCH) */
++ { 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
+
+ { } /* terminate list */
+ };
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-add.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-add.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-add.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-add.patch)
@@ -0,0 +1,5154 @@
+Generated with 'git diff v2.6.26..v2.6.33-rc1 drivers/net/atl1c/'
+
+diff --git a/drivers/net/atl1c/Makefile b/drivers/net/atl1c/Makefile
+new file mode 100644
+index 0000000..c37d966
+--- /dev/null
++++ b/drivers/net/atl1c/Makefile
+@@ -0,0 +1,2 @@
++obj-$(CONFIG_ATL1C) += atl1c.o
++atl1c-objs := atl1c_main.o atl1c_hw.o atl1c_ethtool.o
+diff --git a/drivers/net/atl1c/atl1c.h b/drivers/net/atl1c/atl1c.h
+new file mode 100644
+index 0000000..efe5435
+--- /dev/null
++++ b/drivers/net/atl1c/atl1c.h
+@@ -0,0 +1,628 @@
++/*
++ * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
++ *
++ * Derived from Intel e1000 driver
++ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program; if not, write to the Free Software Foundation, Inc., 59
++ * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ */
++
++#ifndef _ATL1C_H_
++#define _ATL1C_H_
++
++#include <linux/version.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++#include <linux/module.h>
++#include <linux/pci.h>
++#include <linux/netdevice.h>
++#include <linux/etherdevice.h>
++#include <linux/skbuff.h>
++#include <linux/ioport.h>
++#include <linux/slab.h>
++#include <linux/list.h>
++#include <linux/delay.h>
++#include <linux/sched.h>
++#include <linux/in.h>
++#include <linux/ip.h>
++#include <linux/ipv6.h>
++#include <linux/udp.h>
++#include <linux/mii.h>
++#include <linux/io.h>
++#include <linux/vmalloc.h>
++#include <linux/pagemap.h>
++#include <linux/tcp.h>
++#include <linux/ethtool.h>
++#include <linux/if_vlan.h>
++#include <linux/workqueue.h>
++#include <net/checksum.h>
++#include <net/ip6_checksum.h>
++
++#include "atl1c_hw.h"
++
++/* Wake Up Filter Control */
++#define AT_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
++#define AT_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
++#define AT_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
++#define AT_WUFC_MC 0x00000008 /* Multicast Wakeup Enable */
++#define AT_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
++
++#define AT_VLAN_TO_TAG(_vlan, _tag) \
++ _tag = ((((_vlan) >> 8) & 0xFF) |\
++ (((_vlan) & 0xFF) << 8))
++
++#define AT_TAG_TO_VLAN(_tag, _vlan) \
++ _vlan = ((((_tag) >> 8) & 0xFF) |\
++ (((_tag) & 0xFF) << 8))
++
++#define SPEED_0 0xffff
++#define HALF_DUPLEX 1
++#define FULL_DUPLEX 2
++
++#define AT_RX_BUF_SIZE (ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)
++#define MAX_JUMBO_FRAME_SIZE (9*1024)
++#define MAX_TX_OFFLOAD_THRESH (9*1024)
++
++#define AT_MAX_RECEIVE_QUEUE 4
++#define AT_DEF_RECEIVE_QUEUE 1
++#define AT_MAX_TRANSMIT_QUEUE 2
++
++#define AT_DMA_HI_ADDR_MASK 0xffffffff00000000ULL
++#define AT_DMA_LO_ADDR_MASK 0x00000000ffffffffULL
++
++#define AT_TX_WATCHDOG (5 * HZ)
++#define AT_MAX_INT_WORK 5
++#define AT_TWSI_EEPROM_TIMEOUT 100
++#define AT_HW_MAX_IDLE_DELAY 10
++#define AT_SUSPEND_LINK_TIMEOUT 28
++
++#define AT_ASPM_L0S_TIMER 6
++#define AT_ASPM_L1_TIMER 12
++
++#define ATL1C_PCIE_L0S_L1_DISABLE 0x01
++#define ATL1C_PCIE_PHY_RESET 0x02
++
++#define ATL1C_ASPM_L0s_ENABLE 0x0001
++#define ATL1C_ASPM_L1_ENABLE 0x0002
++
++#define AT_REGS_LEN (75 * sizeof(u32))
++#define AT_EEPROM_LEN 512
++
++#define ATL1C_GET_DESC(R, i, type) (&(((type *)((R)->desc))[i]))
++#define ATL1C_RFD_DESC(R, i) ATL1C_GET_DESC(R, i, struct atl1c_rx_free_desc)
++#define ATL1C_TPD_DESC(R, i) ATL1C_GET_DESC(R, i, struct atl1c_tpd_desc)
++#define ATL1C_RRD_DESC(R, i) ATL1C_GET_DESC(R, i, struct atl1c_recv_ret_status)
++
++/* tpd word 1 bit 0:7 General Checksum task offload */
++#define TPD_L4HDR_OFFSET_MASK 0x00FF
++#define TPD_L4HDR_OFFSET_SHIFT 0
++
++/* tpd word 1 bit 0:7 Large Send task offload (IPv4/IPV6) */
++#define TPD_TCPHDR_OFFSET_MASK 0x00FF
++#define TPD_TCPHDR_OFFSET_SHIFT 0
++
++/* tpd word 1 bit 0:7 Custom Checksum task offload */
++#define TPD_PLOADOFFSET_MASK 0x00FF
++#define TPD_PLOADOFFSET_SHIFT 0
++
++/* tpd word 1 bit 8:17 */
++#define TPD_CCSUM_EN_MASK 0x0001
++#define TPD_CCSUM_EN_SHIFT 8
++#define TPD_IP_CSUM_MASK 0x0001
++#define TPD_IP_CSUM_SHIFT 9
++#define TPD_TCP_CSUM_MASK 0x0001
++#define TPD_TCP_CSUM_SHIFT 10
++#define TPD_UDP_CSUM_MASK 0x0001
++#define TPD_UDP_CSUM_SHIFT 11
++#define TPD_LSO_EN_MASK 0x0001 /* TCP Large Send Offload */
++#define TPD_LSO_EN_SHIFT 12
++#define TPD_LSO_VER_MASK 0x0001
++#define TPD_LSO_VER_SHIFT 13 /* 0 : ipv4; 1 : ipv4/ipv6 */
++#define TPD_CON_VTAG_MASK 0x0001
++#define TPD_CON_VTAG_SHIFT 14
++#define TPD_INS_VTAG_MASK 0x0001
++#define TPD_INS_VTAG_SHIFT 15
++#define TPD_IPV4_PACKET_MASK 0x0001 /* valid when LSO VER is 1 */
++#define TPD_IPV4_PACKET_SHIFT 16
++#define TPD_ETH_TYPE_MASK 0x0001
++#define TPD_ETH_TYPE_SHIFT 17 /* 0 : 802.3 frame; 1 : Ethernet */
++
++/* tpd word 18:25 Custom Checksum task offload */
++#define TPD_CCSUM_OFFSET_MASK 0x00FF
++#define TPD_CCSUM_OFFSET_SHIFT 18
++#define TPD_CCSUM_EPAD_MASK 0x0001
++#define TPD_CCSUM_EPAD_SHIFT 30
++
++/* tpd word 18:30 Large Send task offload (IPv4/IPV6) */
++#define TPD_MSS_MASK 0x1FFF
++#define TPD_MSS_SHIFT 18
++
++#define TPD_EOP_MASK 0x0001
++#define TPD_EOP_SHIFT 31
++
++struct atl1c_tpd_desc {
++ __le16 buffer_len; /* include 4-byte CRC */
++ __le16 vlan_tag;
++ __le32 word1;
++ __le64 buffer_addr;
++};
++
++struct atl1c_tpd_ext_desc {
++ u32 reservd_0;
++ __le32 word1;
++ __le32 pkt_len;
++ u32 reservd_1;
++};
++/* rrs word 0 bit 0:31 */
++#define RRS_RX_CSUM_MASK 0xFFFF
++#define RRS_RX_CSUM_SHIFT 0
++#define RRS_RX_RFD_CNT_MASK 0x000F
++#define RRS_RX_RFD_CNT_SHIFT 16
++#define RRS_RX_RFD_INDEX_MASK 0x0FFF
++#define RRS_RX_RFD_INDEX_SHIFT 20
++
++/* rrs flag bit 0:16 */
++#define RRS_HEAD_LEN_MASK 0x00FF
++#define RRS_HEAD_LEN_SHIFT 0
++#define RRS_HDS_TYPE_MASK 0x0003
++#define RRS_HDS_TYPE_SHIFT 8
++#define RRS_CPU_NUM_MASK 0x0003
++#define RRS_CPU_NUM_SHIFT 10
++#define RRS_HASH_FLG_MASK 0x000F
++#define RRS_HASH_FLG_SHIFT 12
++
++#define RRS_HDS_TYPE_HEAD 1
++#define RRS_HDS_TYPE_DATA 2
++
++#define RRS_IS_NO_HDS_TYPE(flag) \
++ ((((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK) == 0)
++
++#define RRS_IS_HDS_HEAD(flag) \
++ ((((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK) == \
++ RRS_HDS_TYPE_HEAD)
++
++#define RRS_IS_HDS_DATA(flag) \
++ ((((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK) == \
++ RRS_HDS_TYPE_DATA)
++
++/* rrs word 3 bit 0:31 */
++#define RRS_PKT_SIZE_MASK 0x3FFF
++#define RRS_PKT_SIZE_SHIFT 0
++#define RRS_ERR_L4_CSUM_MASK 0x0001
++#define RRS_ERR_L4_CSUM_SHIFT 14
++#define RRS_ERR_IP_CSUM_MASK 0x0001
++#define RRS_ERR_IP_CSUM_SHIFT 15
++#define RRS_VLAN_INS_MASK 0x0001
++#define RRS_VLAN_INS_SHIFT 16
++#define RRS_PROT_ID_MASK 0x0007
++#define RRS_PROT_ID_SHIFT 17
++#define RRS_RX_ERR_SUM_MASK 0x0001
++#define RRS_RX_ERR_SUM_SHIFT 20
++#define RRS_RX_ERR_CRC_MASK 0x0001
++#define RRS_RX_ERR_CRC_SHIFT 21
++#define RRS_RX_ERR_FAE_MASK 0x0001
++#define RRS_RX_ERR_FAE_SHIFT 22
++#define RRS_RX_ERR_TRUNC_MASK 0x0001
++#define RRS_RX_ERR_TRUNC_SHIFT 23
++#define RRS_RX_ERR_RUNC_MASK 0x0001
++#define RRS_RX_ERR_RUNC_SHIFT 24
++#define RRS_RX_ERR_ICMP_MASK 0x0001
++#define RRS_RX_ERR_ICMP_SHIFT 25
++#define RRS_PACKET_BCAST_MASK 0x0001
++#define RRS_PACKET_BCAST_SHIFT 26
++#define RRS_PACKET_MCAST_MASK 0x0001
++#define RRS_PACKET_MCAST_SHIFT 27
++#define RRS_PACKET_TYPE_MASK 0x0001
++#define RRS_PACKET_TYPE_SHIFT 28
++#define RRS_FIFO_FULL_MASK 0x0001
++#define RRS_FIFO_FULL_SHIFT 29
++#define RRS_802_3_LEN_ERR_MASK 0x0001
++#define RRS_802_3_LEN_ERR_SHIFT 30
++#define RRS_RXD_UPDATED_MASK 0x0001
++#define RRS_RXD_UPDATED_SHIFT 31
++
++#define RRS_ERR_L4_CSUM 0x00004000
++#define RRS_ERR_IP_CSUM 0x00008000
++#define RRS_VLAN_INS 0x00010000
++#define RRS_RX_ERR_SUM 0x00100000
++#define RRS_RX_ERR_CRC 0x00200000
++#define RRS_802_3_LEN_ERR 0x40000000
++#define RRS_RXD_UPDATED 0x80000000
++
++#define RRS_PACKET_TYPE_802_3 1
++#define RRS_PACKET_TYPE_ETH 0
++#define RRS_PACKET_IS_ETH(word) \
++ ((((word) >> RRS_PACKET_TYPE_SHIFT) & RRS_PACKET_TYPE_MASK) == \
++ RRS_PACKET_TYPE_ETH)
++#define RRS_RXD_IS_VALID(word) \
++ ((((word) >> RRS_RXD_UPDATED_SHIFT) & RRS_RXD_UPDATED_MASK) == 1)
++
++#define RRS_PACKET_PROT_IS_IPV4_ONLY(word) \
++ ((((word) >> RRS_PROT_ID_SHIFT) & RRS_PROT_ID_MASK) == 1)
++#define RRS_PACKET_PROT_IS_IPV6_ONLY(word) \
++ ((((word) >> RRS_PROT_ID_SHIFT) & RRS_PROT_ID_MASK) == 6)
++
++struct atl1c_recv_ret_status {
++ __le32 word0;
++ __le32 rss_hash;
++ __le16 vlan_tag;
++ __le16 flag;
++ __le32 word3;
++};
++
++/* RFD desciptor */
++struct atl1c_rx_free_desc {
++ __le64 buffer_addr;
++};
++
++/* DMA Order Settings */
++enum atl1c_dma_order {
++ atl1c_dma_ord_in = 1,
++ atl1c_dma_ord_enh = 2,
++ atl1c_dma_ord_out = 4
++};
++
++enum atl1c_dma_rcb {
++ atl1c_rcb_64 = 0,
++ atl1c_rcb_128 = 1
++};
++
++enum atl1c_mac_speed {
++ atl1c_mac_speed_0 = 0,
++ atl1c_mac_speed_10_100 = 1,
++ atl1c_mac_speed_1000 = 2
++};
++
++enum atl1c_dma_req_block {
++ atl1c_dma_req_128 = 0,
++ atl1c_dma_req_256 = 1,
++ atl1c_dma_req_512 = 2,
++ atl1c_dma_req_1024 = 3,
++ atl1c_dma_req_2048 = 4,
++ atl1c_dma_req_4096 = 5
++};
++
++enum atl1c_rss_mode {
++ atl1c_rss_mode_disable = 0,
++ atl1c_rss_sig_que = 1,
++ atl1c_rss_mul_que_sig_int = 2,
++ atl1c_rss_mul_que_mul_int = 4,
++};
++
++enum atl1c_rss_type {
++ atl1c_rss_disable = 0,
++ atl1c_rss_ipv4 = 1,
++ atl1c_rss_ipv4_tcp = 2,
++ atl1c_rss_ipv6 = 4,
++ atl1c_rss_ipv6_tcp = 8
++};
++
++enum atl1c_nic_type {
++ athr_l1c = 0,
++ athr_l2c = 1,
++};
++
++enum atl1c_trans_queue {
++ atl1c_trans_normal = 0,
++ atl1c_trans_high = 1
++};
++
++struct atl1c_hw_stats {
++ /* rx */
++ unsigned long rx_ok; /* The number of good packet received. */
++ unsigned long rx_bcast; /* The number of good broadcast packet received. */
++ unsigned long rx_mcast; /* The number of good multicast packet received. */
++ unsigned long rx_pause; /* The number of Pause packet received. */
++ unsigned long rx_ctrl; /* The number of Control packet received other than Pause frame. */
++ unsigned long rx_fcs_err; /* The number of packets with bad FCS. */
++ unsigned long rx_len_err; /* The number of packets with mismatch of length field and actual size. */
++ unsigned long rx_byte_cnt; /* The number of bytes of good packet received. FCS is NOT included. */
++ unsigned long rx_runt; /* The number of packets received that are less than 64 byte long and with good FCS. */
++ unsigned long rx_frag; /* The number of packets received that are less than 64 byte long and with bad FCS. */
++ unsigned long rx_sz_64; /* The number of good and bad packets received that are 64 byte long. */
++ unsigned long rx_sz_65_127; /* The number of good and bad packets received that are between 65 and 127-byte long. */
++ unsigned long rx_sz_128_255; /* The number of good and bad packets received that are between 128 and 255-byte long. */
++ unsigned long rx_sz_256_511; /* The number of good and bad packets received that are between 256 and 511-byte long. */
++ unsigned long rx_sz_512_1023; /* The number of good and bad packets received that are between 512 and 1023-byte long. */
++ unsigned long rx_sz_1024_1518; /* The number of good and bad packets received that are between 1024 and 1518-byte long. */
++ unsigned long rx_sz_1519_max; /* The number of good and bad packets received that are between 1519-byte and MTU. */
++ unsigned long rx_sz_ov; /* The number of good and bad packets received that are more than MTU size truncated by Selene. */
++ unsigned long rx_rxf_ov; /* The number of frame dropped due to occurrence of RX FIFO overflow. */
++ unsigned long rx_rrd_ov; /* The number of frame dropped due to occurrence of RRD overflow. */
++ unsigned long rx_align_err; /* Alignment Error */
++ unsigned long rx_bcast_byte_cnt; /* The byte count of broadcast packet received, excluding FCS. */
++ unsigned long rx_mcast_byte_cnt; /* The byte count of multicast packet received, excluding FCS. */
++ unsigned long rx_err_addr; /* The number of packets dropped due to address filtering. */
++
++ /* tx */
++ unsigned long tx_ok; /* The number of good packet transmitted. */
++ unsigned long tx_bcast; /* The number of good broadcast packet transmitted. */
++ unsigned long tx_mcast; /* The number of good multicast packet transmitted. */
++ unsigned long tx_pause; /* The number of Pause packet transmitted. */
++ unsigned long tx_exc_defer; /* The number of packets transmitted with excessive deferral. */
++ unsigned long tx_ctrl; /* The number of packets transmitted is a control frame, excluding Pause frame. */
++ unsigned long tx_defer; /* The number of packets transmitted that is deferred. */
++ unsigned long tx_byte_cnt; /* The number of bytes of data transmitted. FCS is NOT included. */
++ unsigned long tx_sz_64; /* The number of good and bad packets transmitted that are 64 byte long. */
++ unsigned long tx_sz_65_127; /* The number of good and bad packets transmitted that are between 65 and 127-byte long. */
++ unsigned long tx_sz_128_255; /* The number of good and bad packets transmitted that are between 128 and 255-byte long. */
++ unsigned long tx_sz_256_511; /* The number of good and bad packets transmitted that are between 256 and 511-byte long. */
++ unsigned long tx_sz_512_1023; /* The number of good and bad packets transmitted that are between 512 and 1023-byte long. */
++ unsigned long tx_sz_1024_1518; /* The number of good and bad packets transmitted that are between 1024 and 1518-byte long. */
++ unsigned long tx_sz_1519_max; /* The number of good and bad packets transmitted that are between 1519-byte and MTU. */
++ unsigned long tx_1_col; /* The number of packets subsequently transmitted successfully with a single prior collision. */
++ unsigned long tx_2_col; /* The number of packets subsequently transmitted successfully with multiple prior collisions. */
++ unsigned long tx_late_col; /* The number of packets transmitted with late collisions. */
++ unsigned long tx_abort_col; /* The number of transmit packets aborted due to excessive collisions. */
++ unsigned long tx_underrun; /* The number of transmit packets aborted due to transmit FIFO underrun, or TRD FIFO underrun */
++ unsigned long tx_rd_eop; /* The number of times that read beyond the EOP into the next frame area when TRD was not written timely */
++ unsigned long tx_len_err; /* The number of transmit packets with length field does NOT match the actual frame size. */
++ unsigned long tx_trunc; /* The number of transmit packets truncated due to size exceeding MTU. */
++ unsigned long tx_bcast_byte; /* The byte count of broadcast packet transmitted, excluding FCS. */
++ unsigned long tx_mcast_byte; /* The byte count of multicast packet transmitted, excluding FCS. */
++};
++
++struct atl1c_hw {
++ u8 __iomem *hw_addr; /* inner register address */
++ struct atl1c_adapter *adapter;
++ enum atl1c_nic_type nic_type;
++ enum atl1c_dma_order dma_order;
++ enum atl1c_dma_rcb rcb_value;
++ enum atl1c_dma_req_block dmar_block;
++ enum atl1c_dma_req_block dmaw_block;
++
++ u16 device_id;
++ u16 vendor_id;
++ u16 subsystem_id;
++ u16 subsystem_vendor_id;
++ u8 revision_id;
++
++ u32 intr_mask;
++ u8 dmaw_dly_cnt;
++ u8 dmar_dly_cnt;
++
++ u8 preamble_len;
++ u16 max_frame_size;
++ u16 min_frame_size;
++
++ enum atl1c_mac_speed mac_speed;
++ bool mac_duplex;
++ bool hibernate;
++ u16 media_type;
++#define MEDIA_TYPE_AUTO_SENSOR 0
++#define MEDIA_TYPE_100M_FULL 1
++#define MEDIA_TYPE_100M_HALF 2
++#define MEDIA_TYPE_10M_FULL 3
++#define MEDIA_TYPE_10M_HALF 4
++
++ u16 autoneg_advertised;
++ u16 mii_autoneg_adv_reg;
++ u16 mii_1000t_ctrl_reg;
++
++ u16 tx_imt; /* TX Interrupt Moderator timer ( 2us resolution) */
++ u16 rx_imt; /* RX Interrupt Moderator timer ( 2us resolution) */
++ u16 ict; /* Interrupt Clear timer (2us resolution) */
++ u16 ctrl_flags;
++#define ATL1C_INTR_CLEAR_ON_READ 0x0001
++#define ATL1C_INTR_MODRT_ENABLE 0x0002
++#define ATL1C_CMB_ENABLE 0x0004
++#define ATL1C_SMB_ENABLE 0x0010
++#define ATL1C_TXQ_MODE_ENHANCE 0x0020
++#define ATL1C_RX_IPV6_CHKSUM 0x0040
++#define ATL1C_ASPM_L0S_SUPPORT 0x0080
++#define ATL1C_ASPM_L1_SUPPORT 0x0100
++#define ATL1C_ASPM_CTRL_MON 0x0200
++#define ATL1C_HIB_DISABLE 0x0400
++#define ATL1C_LINK_CAP_1000M 0x0800
++#define ATL1C_FPGA_VERSION 0x8000
++ u16 cmb_tpd;
++ u16 cmb_rrd;
++ u16 cmb_rx_timer; /* 2us resolution */
++ u16 cmb_tx_timer;
++ u32 smb_timer;
++
++ u16 rrd_thresh; /* Threshold of number of RRD produced to trigger
++ interrupt request */
++ u16 tpd_thresh;
++ u8 tpd_burst; /* Number of TPD to prefetch in cache-aligned burst. */
++ u8 rfd_burst;
++ enum atl1c_rss_type rss_type;
++ enum atl1c_rss_mode rss_mode;
++ u8 rss_hash_bits;
++ u32 base_cpu;
++ u32 indirect_tab;
++ u8 mac_addr[ETH_ALEN];
++ u8 perm_mac_addr[ETH_ALEN];
++
++ bool phy_configured;
++ bool re_autoneg;
++ bool emi_ca;
++};
++
++/*
++ * atl1c_ring_header represents a single, contiguous block of DMA space
++ * mapped for the three descriptor rings (tpd, rfd, rrd) and the two
++ * message blocks (cmb, smb) described below
++ */
++struct atl1c_ring_header {
++ void *desc; /* virtual address */
++ dma_addr_t dma; /* physical address*/
++ unsigned int size; /* length in bytes */
++};
++
++/*
++ * atl1c_buffer is wrapper around a pointer to a socket buffer
++ * so a DMA handle can be stored along with the skb
++ */
++struct atl1c_buffer {
++ struct sk_buff *skb; /* socket buffer */
++ u16 length; /* rx buffer length */
++ u16 flags; /* information of buffer */
++#define ATL1C_BUFFER_FREE 0x0001
++#define ATL1C_BUFFER_BUSY 0x0002
++#define ATL1C_BUFFER_STATE_MASK 0x0003
++
++#define ATL1C_PCIMAP_SINGLE 0x0004
++#define ATL1C_PCIMAP_PAGE 0x0008
++#define ATL1C_PCIMAP_TYPE_MASK 0x000C
++
++#define ATL1C_PCIMAP_TODEVICE 0x0010
++#define ATL1C_PCIMAP_FROMDEVICE 0x0020
++#define ATL1C_PCIMAP_DIRECTION_MASK 0x0030
++ dma_addr_t dma;
++};
++
++#define ATL1C_SET_BUFFER_STATE(buff, state) do { \
++ ((buff)->flags) &= ~ATL1C_BUFFER_STATE_MASK; \
++ ((buff)->flags) |= (state); \
++ } while (0)
++
++#define ATL1C_SET_PCIMAP_TYPE(buff, type, direction) do { \
++ ((buff)->flags) &= ~ATL1C_PCIMAP_TYPE_MASK; \
++ ((buff)->flags) |= (type); \
++ ((buff)->flags) &= ~ATL1C_PCIMAP_DIRECTION_MASK; \
++ ((buff)->flags) |= (direction); \
++ } while (0)
++
++/* transimit packet descriptor (tpd) ring */
++struct atl1c_tpd_ring {
++ void *desc; /* descriptor ring virtual address */
++ dma_addr_t dma; /* descriptor ring physical address */
++ u16 size; /* descriptor ring length in bytes */
++ u16 count; /* number of descriptors in the ring */
++ u16 next_to_use; /* this is protectd by adapter->tx_lock */
++ atomic_t next_to_clean;
++ struct atl1c_buffer *buffer_info;
++};
++
++/* receive free descriptor (rfd) ring */
++struct atl1c_rfd_ring {
++ void *desc; /* descriptor ring virtual address */
++ dma_addr_t dma; /* descriptor ring physical address */
++ u16 size; /* descriptor ring length in bytes */
++ u16 count; /* number of descriptors in the ring */
++ u16 next_to_use;
++ u16 next_to_clean;
++ struct atl1c_buffer *buffer_info;
++};
++
++/* receive return desciptor (rrd) ring */
++struct atl1c_rrd_ring {
++ void *desc; /* descriptor ring virtual address */
++ dma_addr_t dma; /* descriptor ring physical address */
++ u16 size; /* descriptor ring length in bytes */
++ u16 count; /* number of descriptors in the ring */
++ u16 next_to_use;
++ u16 next_to_clean;
++};
++
++struct atl1c_cmb {
++ void *cmb;
++ dma_addr_t dma;
++};
++
++struct atl1c_smb {
++ void *smb;
++ dma_addr_t dma;
++};
++
++/* board specific private data structure */
++struct atl1c_adapter {
++ struct net_device *netdev;
++ struct pci_dev *pdev;
++ struct vlan_group *vlgrp;
++ struct napi_struct napi;
++ struct atl1c_hw hw;
++ struct atl1c_hw_stats hw_stats;
++ struct net_device_stats net_stats;
++ struct mii_if_info mii; /* MII interface info */
++ u16 rx_buffer_len;
++
++ unsigned long flags;
++#define __AT_TESTING 0x0001
++#define __AT_RESETTING 0x0002
++#define __AT_DOWN 0x0003
++ u8 work_event;
++#define ATL1C_WORK_EVENT_RESET 0x01
++#define ATL1C_WORK_EVENT_LINK_CHANGE 0x02
++ u32 msg_enable;
++
++ bool have_msi;
++ u32 wol;
++ u16 link_speed;
++ u16 link_duplex;
++
++ spinlock_t mdio_lock;
++ spinlock_t tx_lock;
++ atomic_t irq_sem;
++
++ struct work_struct common_task;
++ struct timer_list watchdog_timer;
++ struct timer_list phy_config_timer;
++
++ /* All Descriptor memory */
++ struct atl1c_ring_header ring_header;
++ struct atl1c_tpd_ring tpd_ring[AT_MAX_TRANSMIT_QUEUE];
++ struct atl1c_rfd_ring rfd_ring[AT_MAX_RECEIVE_QUEUE];
++ struct atl1c_rrd_ring rrd_ring[AT_MAX_RECEIVE_QUEUE];
++ struct atl1c_cmb cmb;
++ struct atl1c_smb smb;
++ int num_rx_queues;
++ u32 bd_number; /* board number;*/
++};
++
++#define AT_WRITE_REG(a, reg, value) ( \
++ writel((value), ((a)->hw_addr + reg)))
++
++#define AT_WRITE_FLUSH(a) (\
++ readl((a)->hw_addr))
++
++#define AT_READ_REG(a, reg, pdata) do { \
++ if (unlikely((a)->hibernate)) { \
++ readl((a)->hw_addr + reg); \
++ *(u32 *)pdata = readl((a)->hw_addr + reg); \
++ } else { \
++ *(u32 *)pdata = readl((a)->hw_addr + reg); \
++ } \
++ } while (0)
++
++#define AT_WRITE_REGB(a, reg, value) (\
++ writeb((value), ((a)->hw_addr + reg)))
++
++#define AT_READ_REGB(a, reg) (\
++ readb((a)->hw_addr + reg))
++
++#define AT_WRITE_REGW(a, reg, value) (\
++ writew((value), ((a)->hw_addr + reg)))
++
++#define AT_READ_REGW(a, reg) (\
++ readw((a)->hw_addr + reg))
++
++#define AT_WRITE_REG_ARRAY(a, reg, offset, value) ( \
++ writel((value), (((a)->hw_addr + reg) + ((offset) << 2))))
++
++#define AT_READ_REG_ARRAY(a, reg, offset) ( \
++ readl(((a)->hw_addr + reg) + ((offset) << 2)))
++
++extern char atl1c_driver_name[];
++extern char atl1c_driver_version[];
++
++extern int atl1c_up(struct atl1c_adapter *adapter);
++extern void atl1c_down(struct atl1c_adapter *adapter);
++extern void atl1c_reinit_locked(struct atl1c_adapter *adapter);
++extern s32 atl1c_reset_hw(struct atl1c_hw *hw);
++extern void atl1c_set_ethtool_ops(struct net_device *netdev);
++#endif /* _ATL1C_H_ */
+diff --git a/drivers/net/atl1c/atl1c_ethtool.c b/drivers/net/atl1c/atl1c_ethtool.c
+new file mode 100644
+index 0000000..9b1e0ea
+--- /dev/null
++++ b/drivers/net/atl1c/atl1c_ethtool.c
+@@ -0,0 +1,319 @@
++/*
++ * Copyright(c) 2009 - 2009 Atheros Corporation. All rights reserved.
++ *
++ * Derived from Intel e1000 driver
++ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program; if not, write to the Free Software Foundation, Inc., 59
++ * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ *
++ */
++
++#include <linux/netdevice.h>
++#include <linux/ethtool.h>
++
++#include "atl1c.h"
++
++static int atl1c_get_settings(struct net_device *netdev,
++ struct ethtool_cmd *ecmd)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct atl1c_hw *hw = &adapter->hw;
++
++ ecmd->supported = (SUPPORTED_10baseT_Half |
++ SUPPORTED_10baseT_Full |
++ SUPPORTED_100baseT_Half |
++ SUPPORTED_100baseT_Full |
++ SUPPORTED_Autoneg |
++ SUPPORTED_TP);
++ if (hw->ctrl_flags & ATL1C_LINK_CAP_1000M)
++ ecmd->supported |= SUPPORTED_1000baseT_Full;
++
++ ecmd->advertising = ADVERTISED_TP;
++
++ ecmd->advertising |= hw->autoneg_advertised;
++
++ ecmd->port = PORT_TP;
++ ecmd->phy_address = 0;
++ ecmd->transceiver = XCVR_INTERNAL;
++
++ if (adapter->link_speed != SPEED_0) {
++ ecmd->speed = adapter->link_speed;
++ if (adapter->link_duplex == FULL_DUPLEX)
++ ecmd->duplex = DUPLEX_FULL;
++ else
++ ecmd->duplex = DUPLEX_HALF;
++ } else {
++ ecmd->speed = -1;
++ ecmd->duplex = -1;
++ }
++
++ ecmd->autoneg = AUTONEG_ENABLE;
++ return 0;
++}
++
++static int atl1c_set_settings(struct net_device *netdev,
++ struct ethtool_cmd *ecmd)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct atl1c_hw *hw = &adapter->hw;
++ u16 autoneg_advertised;
++
++ while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
++ msleep(1);
++
++ if (ecmd->autoneg == AUTONEG_ENABLE) {
++ autoneg_advertised = ADVERTISED_Autoneg;
++ } else {
++ if (ecmd->speed == SPEED_1000) {
++ if (ecmd->duplex != DUPLEX_FULL) {
++ if (netif_msg_link(adapter))
++ dev_warn(&adapter->pdev->dev,
++ "1000M half is invalid\n");
++ clear_bit(__AT_RESETTING, &adapter->flags);
++ return -EINVAL;
++ }
++ autoneg_advertised = ADVERTISED_1000baseT_Full;
++ } else if (ecmd->speed == SPEED_100) {
++ if (ecmd->duplex == DUPLEX_FULL)
++ autoneg_advertised = ADVERTISED_100baseT_Full;
++ else
++ autoneg_advertised = ADVERTISED_100baseT_Half;
++ } else {
++ if (ecmd->duplex == DUPLEX_FULL)
++ autoneg_advertised = ADVERTISED_10baseT_Full;
++ else
++ autoneg_advertised = ADVERTISED_10baseT_Half;
++ }
++ }
++
++ if (hw->autoneg_advertised != autoneg_advertised) {
++ hw->autoneg_advertised = autoneg_advertised;
++ if (atl1c_restart_autoneg(hw) != 0) {
++ if (netif_msg_link(adapter))
++ dev_warn(&adapter->pdev->dev,
++ "ethtool speed/duplex setting failed\n");
++ clear_bit(__AT_RESETTING, &adapter->flags);
++ return -EINVAL;
++ }
++ }
++ clear_bit(__AT_RESETTING, &adapter->flags);
++ return 0;
++}
++
++static u32 atl1c_get_tx_csum(struct net_device *netdev)
++{
++ return (netdev->features & NETIF_F_HW_CSUM) != 0;
++}
++
++static u32 atl1c_get_msglevel(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ return adapter->msg_enable;
++}
++
++static void atl1c_set_msglevel(struct net_device *netdev, u32 data)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ adapter->msg_enable = data;
++}
++
++static int atl1c_get_regs_len(struct net_device *netdev)
++{
++ return AT_REGS_LEN;
++}
++
++static void atl1c_get_regs(struct net_device *netdev,
++ struct ethtool_regs *regs, void *p)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct atl1c_hw *hw = &adapter->hw;
++ u32 *regs_buff = p;
++ u16 phy_data;
++
++ memset(p, 0, AT_REGS_LEN);
++
++ regs->version = 0;
++ AT_READ_REG(hw, REG_VPD_CAP, p++);
++ AT_READ_REG(hw, REG_PM_CTRL, p++);
++ AT_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL, p++);
++ AT_READ_REG(hw, REG_TWSI_CTRL, p++);
++ AT_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL, p++);
++ AT_READ_REG(hw, REG_MASTER_CTRL, p++);
++ AT_READ_REG(hw, REG_MANUAL_TIMER_INIT, p++);
++ AT_READ_REG(hw, REG_IRQ_MODRT_TIMER_INIT, p++);
++ AT_READ_REG(hw, REG_GPHY_CTRL, p++);
++ AT_READ_REG(hw, REG_LINK_CTRL, p++);
++ AT_READ_REG(hw, REG_IDLE_STATUS, p++);
++ AT_READ_REG(hw, REG_MDIO_CTRL, p++);
++ AT_READ_REG(hw, REG_SERDES_LOCK, p++);
++ AT_READ_REG(hw, REG_MAC_CTRL, p++);
++ AT_READ_REG(hw, REG_MAC_IPG_IFG, p++);
++ AT_READ_REG(hw, REG_MAC_STA_ADDR, p++);
++ AT_READ_REG(hw, REG_MAC_STA_ADDR+4, p++);
++ AT_READ_REG(hw, REG_RX_HASH_TABLE, p++);
++ AT_READ_REG(hw, REG_RX_HASH_TABLE+4, p++);
++ AT_READ_REG(hw, REG_RXQ_CTRL, p++);
++ AT_READ_REG(hw, REG_TXQ_CTRL, p++);
++ AT_READ_REG(hw, REG_MTU, p++);
++ AT_READ_REG(hw, REG_WOL_CTRL, p++);
++
++ atl1c_read_phy_reg(hw, MII_BMCR, &phy_data);
++ regs_buff[73] = (u32) phy_data;
++ atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
++ regs_buff[74] = (u32) phy_data;
++}
++
++static int atl1c_get_eeprom_len(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ if (atl1c_check_eeprom_exist(&adapter->hw))
++ return AT_EEPROM_LEN;
++ else
++ return 0;
++}
++
++static int atl1c_get_eeprom(struct net_device *netdev,
++ struct ethtool_eeprom *eeprom, u8 *bytes)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct atl1c_hw *hw = &adapter->hw;
++ u32 *eeprom_buff;
++ int first_dword, last_dword;
++ int ret_val = 0;
++ int i;
++
++ if (eeprom->len == 0)
++ return -EINVAL;
++
++ if (!atl1c_check_eeprom_exist(hw)) /* not exist */
++ return -EINVAL;
++
++ eeprom->magic = adapter->pdev->vendor |
++ (adapter->pdev->device << 16);
++
++ first_dword = eeprom->offset >> 2;
++ last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
++
++ eeprom_buff = kmalloc(sizeof(u32) *
++ (last_dword - first_dword + 1), GFP_KERNEL);
++ if (eeprom_buff == NULL)
++ return -ENOMEM;
++
++ for (i = first_dword; i < last_dword; i++) {
++ if (!atl1c_read_eeprom(hw, i * 4, &(eeprom_buff[i-first_dword]))) {
++ kfree(eeprom_buff);
++ return -EIO;
++ }
++ }
++
++ memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3),
++ eeprom->len);
++ kfree(eeprom_buff);
++
++ return ret_val;
++ return 0;
++}
++
++static void atl1c_get_drvinfo(struct net_device *netdev,
++ struct ethtool_drvinfo *drvinfo)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ strlcpy(drvinfo->driver, atl1c_driver_name, sizeof(drvinfo->driver));
++ strlcpy(drvinfo->version, atl1c_driver_version,
++ sizeof(drvinfo->version));
++ strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
++ strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
++ sizeof(drvinfo->bus_info));
++ drvinfo->n_stats = 0;
++ drvinfo->testinfo_len = 0;
++ drvinfo->regdump_len = atl1c_get_regs_len(netdev);
++ drvinfo->eedump_len = atl1c_get_eeprom_len(netdev);
++}
++
++static void atl1c_get_wol(struct net_device *netdev,
++ struct ethtool_wolinfo *wol)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ wol->supported = WAKE_MAGIC | WAKE_PHY;
++ wol->wolopts = 0;
++
++ if (adapter->wol & AT_WUFC_EX)
++ wol->wolopts |= WAKE_UCAST;
++ if (adapter->wol & AT_WUFC_MC)
++ wol->wolopts |= WAKE_MCAST;
++ if (adapter->wol & AT_WUFC_BC)
++ wol->wolopts |= WAKE_BCAST;
++ if (adapter->wol & AT_WUFC_MAG)
++ wol->wolopts |= WAKE_MAGIC;
++ if (adapter->wol & AT_WUFC_LNKC)
++ wol->wolopts |= WAKE_PHY;
++
++ return;
++}
++
++static int atl1c_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE |
++ WAKE_UCAST | WAKE_BCAST | WAKE_MCAST))
++ return -EOPNOTSUPP;
++ /* these settings will always override what we currently have */
++ adapter->wol = 0;
++
++ if (wol->wolopts & WAKE_MAGIC)
++ adapter->wol |= AT_WUFC_MAG;
++ if (wol->wolopts & WAKE_PHY)
++ adapter->wol |= AT_WUFC_LNKC;
++
++ device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
++
++ return 0;
++}
++
++static int atl1c_nway_reset(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ if (netif_running(netdev))
++ atl1c_reinit_locked(adapter);
++ return 0;
++}
++
++static const struct ethtool_ops atl1c_ethtool_ops = {
++ .get_settings = atl1c_get_settings,
++ .set_settings = atl1c_set_settings,
++ .get_drvinfo = atl1c_get_drvinfo,
++ .get_regs_len = atl1c_get_regs_len,
++ .get_regs = atl1c_get_regs,
++ .get_wol = atl1c_get_wol,
++ .set_wol = atl1c_set_wol,
++ .get_msglevel = atl1c_get_msglevel,
++ .set_msglevel = atl1c_set_msglevel,
++ .nway_reset = atl1c_nway_reset,
++ .get_link = ethtool_op_get_link,
++ .get_eeprom_len = atl1c_get_eeprom_len,
++ .get_eeprom = atl1c_get_eeprom,
++ .get_tx_csum = atl1c_get_tx_csum,
++ .get_sg = ethtool_op_get_sg,
++ .set_sg = ethtool_op_set_sg,
++};
++
++void atl1c_set_ethtool_ops(struct net_device *netdev)
++{
++ SET_ETHTOOL_OPS(netdev, &atl1c_ethtool_ops);
++}
+diff --git a/drivers/net/atl1c/atl1c_hw.c b/drivers/net/atl1c/atl1c_hw.c
+new file mode 100644
+index 0000000..3e69b94
+--- /dev/null
++++ b/drivers/net/atl1c/atl1c_hw.c
+@@ -0,0 +1,527 @@
++/*
++ * Copyright(c) 2007 Atheros Corporation. All rights reserved.
++ *
++ * Derived from Intel e1000 driver
++ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program; if not, write to the Free Software Foundation, Inc., 59
++ * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ */
++#include <linux/pci.h>
++#include <linux/delay.h>
++#include <linux/mii.h>
++#include <linux/crc32.h>
++
++#include "atl1c.h"
++
++/*
++ * check_eeprom_exist
++ * return 1 if eeprom exist
++ */
++int atl1c_check_eeprom_exist(struct atl1c_hw *hw)
++{
++ u32 data;
++
++ AT_READ_REG(hw, REG_TWSI_DEBUG, &data);
++ if (data & TWSI_DEBUG_DEV_EXIST)
++ return 1;
++
++ return 0;
++}
++
++void atl1c_hw_set_mac_addr(struct atl1c_hw *hw)
++{
++ u32 value;
++ /*
++ * 00-0B-6A-F6-00-DC
++ * 0: 6AF600DC 1: 000B
++ * low dword
++ */
++ value = (((u32)hw->mac_addr[2]) << 24) |
++ (((u32)hw->mac_addr[3]) << 16) |
++ (((u32)hw->mac_addr[4]) << 8) |
++ (((u32)hw->mac_addr[5])) ;
++ AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value);
++ /* hight dword */
++ value = (((u32)hw->mac_addr[0]) << 8) |
++ (((u32)hw->mac_addr[1])) ;
++ AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value);
++}
++
++/*
++ * atl1c_get_permanent_address
++ * return 0 if get valid mac address,
++ */
++static int atl1c_get_permanent_address(struct atl1c_hw *hw)
++{
++ u32 addr[2];
++ u32 i;
++ u32 otp_ctrl_data;
++ u32 twsi_ctrl_data;
++ u8 eth_addr[ETH_ALEN];
++
++ /* init */
++ addr[0] = addr[1] = 0;
++ AT_READ_REG(hw, REG_OTP_CTRL, &otp_ctrl_data);
++ if (atl1c_check_eeprom_exist(hw)) {
++ /* Enable OTP CLK */
++ if (!(otp_ctrl_data & OTP_CTRL_CLK_EN)) {
++ otp_ctrl_data |= OTP_CTRL_CLK_EN;
++ AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data);
++ AT_WRITE_FLUSH(hw);
++ msleep(1);
++ }
++
++ AT_READ_REG(hw, REG_TWSI_CTRL, &twsi_ctrl_data);
++ twsi_ctrl_data |= TWSI_CTRL_SW_LDSTART;
++ AT_WRITE_REG(hw, REG_TWSI_CTRL, twsi_ctrl_data);
++ for (i = 0; i < AT_TWSI_EEPROM_TIMEOUT; i++) {
++ msleep(10);
++ AT_READ_REG(hw, REG_TWSI_CTRL, &twsi_ctrl_data);
++ if ((twsi_ctrl_data & TWSI_CTRL_SW_LDSTART) == 0)
++ break;
++ }
++ if (i >= AT_TWSI_EEPROM_TIMEOUT)
++ return -1;
++ }
++ /* Disable OTP_CLK */
++ if (otp_ctrl_data & OTP_CTRL_CLK_EN) {
++ otp_ctrl_data &= ~OTP_CTRL_CLK_EN;
++ AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data);
++ AT_WRITE_FLUSH(hw);
++ msleep(1);
++ }
++
++ /* maybe MAC-address is from BIOS */
++ AT_READ_REG(hw, REG_MAC_STA_ADDR, &addr[0]);
++ AT_READ_REG(hw, REG_MAC_STA_ADDR + 4, &addr[1]);
++ *(u32 *) ð_addr[2] = swab32(addr[0]);
++ *(u16 *) ð_addr[0] = swab16(*(u16 *)&addr[1]);
++
++ if (is_valid_ether_addr(eth_addr)) {
++ memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
++ return 0;
++ }
++
++ return -1;
++}
++
++bool atl1c_read_eeprom(struct atl1c_hw *hw, u32 offset, u32 *p_value)
++{
++ int i;
++ int ret = false;
++ u32 otp_ctrl_data;
++ u32 control;
++ u32 data;
++
++ if (offset & 3)
++ return ret; /* address do not align */
++
++ AT_READ_REG(hw, REG_OTP_CTRL, &otp_ctrl_data);
++ if (!(otp_ctrl_data & OTP_CTRL_CLK_EN))
++ AT_WRITE_REG(hw, REG_OTP_CTRL,
++ (otp_ctrl_data | OTP_CTRL_CLK_EN));
++
++ AT_WRITE_REG(hw, REG_EEPROM_DATA_LO, 0);
++ control = (offset & EEPROM_CTRL_ADDR_MASK) << EEPROM_CTRL_ADDR_SHIFT;
++ AT_WRITE_REG(hw, REG_EEPROM_CTRL, control);
++
++ for (i = 0; i < 10; i++) {
++ udelay(100);
++ AT_READ_REG(hw, REG_EEPROM_CTRL, &control);
++ if (control & EEPROM_CTRL_RW)
++ break;
++ }
++ if (control & EEPROM_CTRL_RW) {
++ AT_READ_REG(hw, REG_EEPROM_CTRL, &data);
++ AT_READ_REG(hw, REG_EEPROM_DATA_LO, p_value);
++ data = data & 0xFFFF;
++ *p_value = swab32((data << 16) | (*p_value >> 16));
++ ret = true;
++ }
++ if (!(otp_ctrl_data & OTP_CTRL_CLK_EN))
++ AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data);
++
++ return ret;
++}
++/*
++ * Reads the adapter's MAC address from the EEPROM
++ *
++ * hw - Struct containing variables accessed by shared code
++ */
++int atl1c_read_mac_addr(struct atl1c_hw *hw)
++{
++ int err = 0;
++
++ err = atl1c_get_permanent_address(hw);
++ if (err)
++ random_ether_addr(hw->perm_mac_addr);
++
++ memcpy(hw->mac_addr, hw->perm_mac_addr, sizeof(hw->perm_mac_addr));
++ return 0;
++}
++
++/*
++ * atl1c_hash_mc_addr
++ * purpose
++ * set hash value for a multicast address
++ * hash calcu processing :
++ * 1. calcu 32bit CRC for multicast address
++ * 2. reverse crc with MSB to LSB
++ */
++u32 atl1c_hash_mc_addr(struct atl1c_hw *hw, u8 *mc_addr)
++{
++ u32 crc32;
++ u32 value = 0;
++ int i;
++
++ crc32 = ether_crc_le(6, mc_addr);
++ for (i = 0; i < 32; i++)
++ value |= (((crc32 >> i) & 1) << (31 - i));
++
++ return value;
++}
++
++/*
++ * Sets the bit in the multicast table corresponding to the hash value.
++ * hw - Struct containing variables accessed by shared code
++ * hash_value - Multicast address hash value
++ */
++void atl1c_hash_set(struct atl1c_hw *hw, u32 hash_value)
++{
++ u32 hash_bit, hash_reg;
++ u32 mta;
++
++ /*
++ * The HASH Table is a register array of 2 32-bit registers.
++ * It is treated like an array of 64 bits. We want to set
++ * bit BitArray[hash_value]. So we figure out what register
++ * the bit is in, read it, OR in the new bit, then write
++ * back the new value. The register is determined by the
++ * upper bit of the hash value and the bit within that
++ * register are determined by the lower 5 bits of the value.
++ */
++ hash_reg = (hash_value >> 31) & 0x1;
++ hash_bit = (hash_value >> 26) & 0x1F;
++
++ mta = AT_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg);
++
++ mta |= (1 << hash_bit);
++
++ AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta);
++}
++
++/*
++ * Reads the value from a PHY register
++ * hw - Struct containing variables accessed by shared code
++ * reg_addr - address of the PHY register to read
++ */
++int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data)
++{
++ u32 val;
++ int i;
++
++ val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
++ MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW |
++ MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
++
++ AT_WRITE_REG(hw, REG_MDIO_CTRL, val);
++
++ for (i = 0; i < MDIO_WAIT_TIMES; i++) {
++ udelay(2);
++ AT_READ_REG(hw, REG_MDIO_CTRL, &val);
++ if (!(val & (MDIO_START | MDIO_BUSY)))
++ break;
++ }
++ if (!(val & (MDIO_START | MDIO_BUSY))) {
++ *phy_data = (u16)val;
++ return 0;
++ }
++
++ return -1;
++}
++
++/*
++ * Writes a value to a PHY register
++ * hw - Struct containing variables accessed by shared code
++ * reg_addr - address of the PHY register to write
++ * data - data to write to the PHY
++ */
++int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data)
++{
++ int i;
++ u32 val;
++
++ val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
++ (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
++ MDIO_SUP_PREAMBLE | MDIO_START |
++ MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
++
++ AT_WRITE_REG(hw, REG_MDIO_CTRL, val);
++
++ for (i = 0; i < MDIO_WAIT_TIMES; i++) {
++ udelay(2);
++ AT_READ_REG(hw, REG_MDIO_CTRL, &val);
++ if (!(val & (MDIO_START | MDIO_BUSY)))
++ break;
++ }
++
++ if (!(val & (MDIO_START | MDIO_BUSY)))
++ return 0;
++
++ return -1;
++}
++
++/*
++ * Configures PHY autoneg and flow control advertisement settings
++ *
++ * hw - Struct containing variables accessed by shared code
++ */
++static int atl1c_phy_setup_adv(struct atl1c_hw *hw)
++{
++ u16 mii_adv_data = ADVERTISE_DEFAULT_CAP & ~ADVERTISE_SPEED_MASK;
++ u16 mii_giga_ctrl_data = GIGA_CR_1000T_DEFAULT_CAP &
++ ~GIGA_CR_1000T_SPEED_MASK;
++
++ if (hw->autoneg_advertised & ADVERTISED_10baseT_Half)
++ mii_adv_data |= ADVERTISE_10HALF;
++ if (hw->autoneg_advertised & ADVERTISED_10baseT_Full)
++ mii_adv_data |= ADVERTISE_10FULL;
++ if (hw->autoneg_advertised & ADVERTISED_100baseT_Half)
++ mii_adv_data |= ADVERTISE_100HALF;
++ if (hw->autoneg_advertised & ADVERTISED_100baseT_Full)
++ mii_adv_data |= ADVERTISE_100FULL;
++
++ if (hw->autoneg_advertised & ADVERTISED_Autoneg)
++ mii_adv_data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
++ ADVERTISE_100HALF | ADVERTISE_100FULL;
++
++ if (hw->ctrl_flags & ATL1C_LINK_CAP_1000M) {
++ if (hw->autoneg_advertised & ADVERTISED_1000baseT_Half)
++ mii_giga_ctrl_data |= ADVERTISE_1000HALF;
++ if (hw->autoneg_advertised & ADVERTISED_1000baseT_Full)
++ mii_giga_ctrl_data |= ADVERTISE_1000FULL;
++ if (hw->autoneg_advertised & ADVERTISED_Autoneg)
++ mii_giga_ctrl_data |= ADVERTISE_1000HALF |
++ ADVERTISE_1000FULL;
++ }
++
++ if (atl1c_write_phy_reg(hw, MII_ADVERTISE, mii_adv_data) != 0 ||
++ atl1c_write_phy_reg(hw, MII_GIGA_CR, mii_giga_ctrl_data) != 0)
++ return -1;
++ return 0;
++}
++
++void atl1c_phy_disable(struct atl1c_hw *hw)
++{
++ AT_WRITE_REGW(hw, REG_GPHY_CTRL,
++ GPHY_CTRL_PW_WOL_DIS | GPHY_CTRL_EXT_RESET);
++}
++
++static void atl1c_phy_magic_data(struct atl1c_hw *hw)
++{
++ u16 data;
++
++ data = ANA_LOOP_SEL_10BT | ANA_EN_MASK_TB | ANA_EN_10BT_IDLE |
++ ((1 & ANA_INTERVAL_SEL_TIMER_MASK) <<
++ ANA_INTERVAL_SEL_TIMER_SHIFT);
++
++ atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_18);
++ atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
++
++ data = (2 & ANA_SERDES_CDR_BW_MASK) | ANA_MS_PAD_DBG |
++ ANA_SERDES_EN_DEEM | ANA_SERDES_SEL_HSP | ANA_SERDES_EN_PLL |
++ ANA_SERDES_EN_LCKDT;
++
++ atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_5);
++ atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
++
++ data = (44 & ANA_LONG_CABLE_TH_100_MASK) |
++ ((33 & ANA_SHORT_CABLE_TH_100_MASK) <<
++ ANA_SHORT_CABLE_TH_100_SHIFT) | ANA_BP_BAD_LINK_ACCUM |
++ ANA_BP_SMALL_BW;
++
++ atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_54);
++ atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
++
++ data = (11 & ANA_IECHO_ADJ_MASK) | ((11 & ANA_IECHO_ADJ_MASK) <<
++ ANA_IECHO_ADJ_2_SHIFT) | ((8 & ANA_IECHO_ADJ_MASK) <<
++ ANA_IECHO_ADJ_1_SHIFT) | ((8 & ANA_IECHO_ADJ_MASK) <<
++ ANA_IECHO_ADJ_0_SHIFT);
++
++ atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_4);
++ atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
++
++ data = ANA_RESTART_CAL | ((7 & ANA_MANUL_SWICH_ON_MASK) <<
++ ANA_MANUL_SWICH_ON_SHIFT) | ANA_MAN_ENABLE |
++ ANA_SEL_HSP | ANA_EN_HB | ANA_OEN_125M;
++
++ atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_0);
++ atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
++
++ if (hw->ctrl_flags & ATL1C_HIB_DISABLE) {
++ atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_41);
++ if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &data) != 0)
++ return;
++ data &= ~ANA_TOP_PS_EN;
++ atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
++
++ atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_11);
++ if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &data) != 0)
++ return;
++ data &= ~ANA_PS_HIB_EN;
++ atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
++ }
++}
++
++int atl1c_phy_reset(struct atl1c_hw *hw)
++{
++ struct atl1c_adapter *adapter = hw->adapter;
++ struct pci_dev *pdev = adapter->pdev;
++ u32 phy_ctrl_data = GPHY_CTRL_DEFAULT;
++ u32 mii_ier_data = IER_LINK_UP | IER_LINK_DOWN;
++ int err;
++
++ if (hw->ctrl_flags & ATL1C_HIB_DISABLE)
++ phy_ctrl_data &= ~GPHY_CTRL_HIB_EN;
++
++ AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data);
++ AT_WRITE_FLUSH(hw);
++ msleep(40);
++ phy_ctrl_data |= GPHY_CTRL_EXT_RESET;
++ AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data);
++ AT_WRITE_FLUSH(hw);
++ msleep(10);
++
++ /*Enable PHY LinkChange Interrupt */
++ err = atl1c_write_phy_reg(hw, MII_IER, mii_ier_data);
++ if (err) {
++ if (netif_msg_hw(adapter))
++ dev_err(&pdev->dev,
++ "Error enable PHY linkChange Interrupt\n");
++ return err;
++ }
++ if (!(hw->ctrl_flags & ATL1C_FPGA_VERSION))
++ atl1c_phy_magic_data(hw);
++ return 0;
++}
++
++int atl1c_phy_init(struct atl1c_hw *hw)
++{
++ struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
++ struct pci_dev *pdev = adapter->pdev;
++ int ret_val;
++ u16 mii_bmcr_data = BMCR_RESET;
++ u16 phy_id1, phy_id2;
++
++ if ((atl1c_read_phy_reg(hw, MII_PHYSID1, &phy_id1) != 0) ||
++ (atl1c_read_phy_reg(hw, MII_PHYSID2, &phy_id2) != 0)) {
++ if (netif_msg_link(adapter))
++ dev_err(&pdev->dev, "Error get phy ID\n");
++ return -1;
++ }
++ switch (hw->media_type) {
++ case MEDIA_TYPE_AUTO_SENSOR:
++ ret_val = atl1c_phy_setup_adv(hw);
++ if (ret_val) {
++ if (netif_msg_link(adapter))
++ dev_err(&pdev->dev,
++ "Error Setting up Auto-Negotiation\n");
++ return ret_val;
++ }
++ mii_bmcr_data |= BMCR_AUTO_NEG_EN | BMCR_RESTART_AUTO_NEG;
++ break;
++ case MEDIA_TYPE_100M_FULL:
++ mii_bmcr_data |= BMCR_SPEED_100 | BMCR_FULL_DUPLEX;
++ break;
++ case MEDIA_TYPE_100M_HALF:
++ mii_bmcr_data |= BMCR_SPEED_100;
++ break;
++ case MEDIA_TYPE_10M_FULL:
++ mii_bmcr_data |= BMCR_SPEED_10 | BMCR_FULL_DUPLEX;
++ break;
++ case MEDIA_TYPE_10M_HALF:
++ mii_bmcr_data |= BMCR_SPEED_10;
++ break;
++ default:
++ if (netif_msg_link(adapter))
++ dev_err(&pdev->dev, "Wrong Media type %d\n",
++ hw->media_type);
++ return -1;
++ break;
++ }
++
++ ret_val = atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data);
++ if (ret_val)
++ return ret_val;
++ hw->phy_configured = true;
++
++ return 0;
++}
++
++/*
++ * Detects the current speed and duplex settings of the hardware.
++ *
++ * hw - Struct containing variables accessed by shared code
++ * speed - Speed of the connection
++ * duplex - Duplex setting of the connection
++ */
++int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex)
++{
++ int err;
++ u16 phy_data;
++
++ /* Read PHY Specific Status Register (17) */
++ err = atl1c_read_phy_reg(hw, MII_GIGA_PSSR, &phy_data);
++ if (err)
++ return err;
++
++ if (!(phy_data & GIGA_PSSR_SPD_DPLX_RESOLVED))
++ return -1;
++
++ switch (phy_data & GIGA_PSSR_SPEED) {
++ case GIGA_PSSR_1000MBS:
++ *speed = SPEED_1000;
++ break;
++ case GIGA_PSSR_100MBS:
++ *speed = SPEED_100;
++ break;
++ case GIGA_PSSR_10MBS:
++ *speed = SPEED_10;
++ break;
++ default:
++ return -1;
++ break;
++ }
++
++ if (phy_data & GIGA_PSSR_DPLX)
++ *duplex = FULL_DUPLEX;
++ else
++ *duplex = HALF_DUPLEX;
++
++ return 0;
++}
++
++int atl1c_restart_autoneg(struct atl1c_hw *hw)
++{
++ int err = 0;
++ u16 mii_bmcr_data = BMCR_RESET;
++
++ err = atl1c_phy_setup_adv(hw);
++ if (err)
++ return err;
++ mii_bmcr_data |= BMCR_AUTO_NEG_EN | BMCR_RESTART_AUTO_NEG;
++
++ return atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data);
++}
+diff --git a/drivers/net/atl1c/atl1c_hw.h b/drivers/net/atl1c/atl1c_hw.h
+new file mode 100644
+index 0000000..c2c738d
+--- /dev/null
++++ b/drivers/net/atl1c/atl1c_hw.h
+@@ -0,0 +1,859 @@
++/*
++ * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
++ *
++ * Derived from Intel e1000 driver
++ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program; if not, write to the Free Software Foundation, Inc., 59
++ * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ */
++
++#ifndef _ATL1C_HW_H_
++#define _ATL1C_HW_H_
++
++#include <linux/types.h>
++#include <linux/mii.h>
++
++struct atl1c_adapter;
++struct atl1c_hw;
++
++/* function prototype */
++void atl1c_phy_disable(struct atl1c_hw *hw);
++void atl1c_hw_set_mac_addr(struct atl1c_hw *hw);
++int atl1c_phy_reset(struct atl1c_hw *hw);
++int atl1c_read_mac_addr(struct atl1c_hw *hw);
++int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex);
++u32 atl1c_hash_mc_addr(struct atl1c_hw *hw, u8 *mc_addr);
++void atl1c_hash_set(struct atl1c_hw *hw, u32 hash_value);
++int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data);
++int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data);
++bool atl1c_read_eeprom(struct atl1c_hw *hw, u32 offset, u32 *p_value);
++int atl1c_phy_init(struct atl1c_hw *hw);
++int atl1c_check_eeprom_exist(struct atl1c_hw *hw);
++int atl1c_restart_autoneg(struct atl1c_hw *hw);
++
++/* register definition */
++#define REG_DEVICE_CAP 0x5C
++#define DEVICE_CAP_MAX_PAYLOAD_MASK 0x7
++#define DEVICE_CAP_MAX_PAYLOAD_SHIFT 0
++
++#define REG_DEVICE_CTRL 0x60
++#define DEVICE_CTRL_MAX_PAYLOAD_MASK 0x7
++#define DEVICE_CTRL_MAX_PAYLOAD_SHIFT 5
++#define DEVICE_CTRL_MAX_RREQ_SZ_MASK 0x7
++#define DEVICE_CTRL_MAX_RREQ_SZ_SHIFT 12
++
++#define REG_LINK_CTRL 0x68
++#define LINK_CTRL_L0S_EN 0x01
++#define LINK_CTRL_L1_EN 0x02
++
++#define REG_VPD_CAP 0x6C
++#define VPD_CAP_ID_MASK 0xff
++#define VPD_CAP_ID_SHIFT 0
++#define VPD_CAP_NEXT_PTR_MASK 0xFF
++#define VPD_CAP_NEXT_PTR_SHIFT 8
++#define VPD_CAP_VPD_ADDR_MASK 0x7FFF
++#define VPD_CAP_VPD_ADDR_SHIFT 16
++#define VPD_CAP_VPD_FLAG 0x80000000
++
++#define REG_VPD_DATA 0x70
++
++#define REG_PCIE_UC_SEVERITY 0x10C
++#define PCIE_UC_SERVRITY_TRN 0x00000001
++#define PCIE_UC_SERVRITY_DLP 0x00000010
++#define PCIE_UC_SERVRITY_PSN_TLP 0x00001000
++#define PCIE_UC_SERVRITY_FCP 0x00002000
++#define PCIE_UC_SERVRITY_CPL_TO 0x00004000
++#define PCIE_UC_SERVRITY_CA 0x00008000
++#define PCIE_UC_SERVRITY_UC 0x00010000
++#define PCIE_UC_SERVRITY_ROV 0x00020000
++#define PCIE_UC_SERVRITY_MLFP 0x00040000
++#define PCIE_UC_SERVRITY_ECRC 0x00080000
++#define PCIE_UC_SERVRITY_UR 0x00100000
++
++#define REG_DEV_SERIALNUM_CTRL 0x200
++#define REG_DEV_MAC_SEL_MASK 0x0 /* 0:EUI; 1:MAC */
++#define REG_DEV_MAC_SEL_SHIFT 0
++#define REG_DEV_SERIAL_NUM_EN_MASK 0x1
++#define REG_DEV_SERIAL_NUM_EN_SHIFT 1
++
++#define REG_TWSI_CTRL 0x218
++#define TWSI_CTRL_LD_OFFSET_MASK 0xFF
++#define TWSI_CTRL_LD_OFFSET_SHIFT 0
++#define TWSI_CTRL_LD_SLV_ADDR_MASK 0x7
++#define TWSI_CTRL_LD_SLV_ADDR_SHIFT 8
++#define TWSI_CTRL_SW_LDSTART 0x800
++#define TWSI_CTRL_HW_LDSTART 0x1000
++#define TWSI_CTRL_SMB_SLV_ADDR_MASK 0x7F
++#define TWSI_CTRL_SMB_SLV_ADDR_SHIFT 15
++#define TWSI_CTRL_LD_EXIST 0x400000
++#define TWSI_CTRL_READ_FREQ_SEL_MASK 0x3
++#define TWSI_CTRL_READ_FREQ_SEL_SHIFT 23
++#define TWSI_CTRL_FREQ_SEL_100K 0
++#define TWSI_CTRL_FREQ_SEL_200K 1
++#define TWSI_CTRL_FREQ_SEL_300K 2
++#define TWSI_CTRL_FREQ_SEL_400K 3
++#define TWSI_CTRL_SMB_SLV_ADDR
++#define TWSI_CTRL_WRITE_FREQ_SEL_MASK 0x3
++#define TWSI_CTRL_WRITE_FREQ_SEL_SHIFT 24
++
++
++#define REG_PCIE_DEV_MISC_CTRL 0x21C
++#define PCIE_DEV_MISC_EXT_PIPE 0x2
++#define PCIE_DEV_MISC_RETRY_BUFDIS 0x1
++#define PCIE_DEV_MISC_SPIROM_EXIST 0x4
++#define PCIE_DEV_MISC_SERDES_ENDIAN 0x8
++#define PCIE_DEV_MISC_SERDES_SEL_DIN 0x10
++
++#define REG_PCIE_PHYMISC 0x1000
++#define PCIE_PHYMISC_FORCE_RCV_DET 0x4
++
++#define REG_TWSI_DEBUG 0x1108
++#define TWSI_DEBUG_DEV_EXIST 0x20000000
++
++#define REG_EEPROM_CTRL 0x12C0
++#define EEPROM_CTRL_DATA_HI_MASK 0xFFFF
++#define EEPROM_CTRL_DATA_HI_SHIFT 0
++#define EEPROM_CTRL_ADDR_MASK 0x3FF
++#define EEPROM_CTRL_ADDR_SHIFT 16
++#define EEPROM_CTRL_ACK 0x40000000
++#define EEPROM_CTRL_RW 0x80000000
++
++#define REG_EEPROM_DATA_LO 0x12C4
++
++#define REG_OTP_CTRL 0x12F0
++#define OTP_CTRL_CLK_EN 0x0002
++
++#define REG_PM_CTRL 0x12F8
++#define PM_CTRL_SDES_EN 0x00000001
++#define PM_CTRL_RBER_EN 0x00000002
++#define PM_CTRL_CLK_REQ_EN 0x00000004
++#define PM_CTRL_ASPM_L1_EN 0x00000008
++#define PM_CTRL_SERDES_L1_EN 0x00000010
++#define PM_CTRL_SERDES_PLL_L1_EN 0x00000020
++#define PM_CTRL_SERDES_PD_EX_L1 0x00000040
++#define PM_CTRL_SERDES_BUDS_RX_L1_EN 0x00000080
++#define PM_CTRL_L0S_ENTRY_TIMER_MASK 0xF
++#define PM_CTRL_L0S_ENTRY_TIMER_SHIFT 8
++#define PM_CTRL_ASPM_L0S_EN 0x00001000
++#define PM_CTRL_CLK_SWH_L1 0x00002000
++#define PM_CTRL_CLK_PWM_VER1_1 0x00004000
++#define PM_CTRL_PCIE_RECV 0x00008000
++#define PM_CTRL_L1_ENTRY_TIMER_MASK 0xF
++#define PM_CTRL_L1_ENTRY_TIMER_SHIFT 16
++#define PM_CTRL_PM_REQ_TIMER_MASK 0xF
++#define PM_CTRL_PM_REQ_TIMER_SHIFT 20
++#define PM_CTRL_LCKDET_TIMER_MASK 0x3F
++#define PM_CTRL_LCKDET_TIMER_SHIFT 24
++#define PM_CTRL_MAC_ASPM_CHK 0x40000000
++#define PM_CTRL_HOTRST 0x80000000
++
++/* Selene Master Control Register */
++#define REG_MASTER_CTRL 0x1400
++#define MASTER_CTRL_SOFT_RST 0x1
++#define MASTER_CTRL_TEST_MODE_MASK 0x3
++#define MASTER_CTRL_TEST_MODE_SHIFT 2
++#define MASTER_CTRL_BERT_START 0x10
++#define MASTER_CTRL_MTIMER_EN 0x100
++#define MASTER_CTRL_MANUAL_INT 0x200
++#define MASTER_CTRL_TX_ITIMER_EN 0x400
++#define MASTER_CTRL_RX_ITIMER_EN 0x800
++#define MASTER_CTRL_CLK_SEL_DIS 0x1000
++#define MASTER_CTRL_CLK_SWH_MODE 0x2000
++#define MASTER_CTRL_INT_RDCLR 0x4000
++#define MASTER_CTRL_REV_NUM_SHIFT 16
++#define MASTER_CTRL_REV_NUM_MASK 0xff
++#define MASTER_CTRL_DEV_ID_SHIFT 24
++#define MASTER_CTRL_DEV_ID_MASK 0x7f
++#define MASTER_CTRL_OTP_SEL 0x80000000
++
++/* Timer Initial Value Register */
++#define REG_MANUAL_TIMER_INIT 0x1404
++
++/* IRQ ModeratorTimer Initial Value Register */
++#define REG_IRQ_MODRT_TIMER_INIT 0x1408
++#define IRQ_MODRT_TIMER_MASK 0xffff
++#define IRQ_MODRT_TX_TIMER_SHIFT 0
++#define IRQ_MODRT_RX_TIMER_SHIFT 16
++
++#define REG_GPHY_CTRL 0x140C
++#define GPHY_CTRL_EXT_RESET 0x1
++#define GPHY_CTRL_RTL_MODE 0x2
++#define GPHY_CTRL_LED_MODE 0x4
++#define GPHY_CTRL_ANEG_NOW 0x8
++#define GPHY_CTRL_REV_ANEG 0x10
++#define GPHY_CTRL_GATE_25M_EN 0x20
++#define GPHY_CTRL_LPW_EXIT 0x40
++#define GPHY_CTRL_PHY_IDDQ 0x80
++#define GPHY_CTRL_PHY_IDDQ_DIS 0x100
++#define GPHY_CTRL_GIGA_DIS 0x200
++#define GPHY_CTRL_HIB_EN 0x400
++#define GPHY_CTRL_HIB_PULSE 0x800
++#define GPHY_CTRL_SEL_ANA_RST 0x1000
++#define GPHY_CTRL_PHY_PLL_ON 0x2000
++#define GPHY_CTRL_PWDOWN_HW 0x4000
++#define GPHY_CTRL_PHY_PLL_BYPASS 0x8000
++
++#define GPHY_CTRL_DEFAULT ( \
++ GPHY_CTRL_SEL_ANA_RST |\
++ GPHY_CTRL_HIB_PULSE |\
++ GPHY_CTRL_HIB_EN)
++
++#define GPHY_CTRL_PW_WOL_DIS ( \
++ GPHY_CTRL_SEL_ANA_RST |\
++ GPHY_CTRL_HIB_PULSE |\
++ GPHY_CTRL_HIB_EN |\
++ GPHY_CTRL_PWDOWN_HW |\
++ GPHY_CTRL_PHY_IDDQ)
++
++/* Block IDLE Status Register */
++#define REG_IDLE_STATUS 0x1410
++#define IDLE_STATUS_MASK 0x00FF
++#define IDLE_STATUS_RXMAC_NO_IDLE 0x1
++#define IDLE_STATUS_TXMAC_NO_IDLE 0x2
++#define IDLE_STATUS_RXQ_NO_IDLE 0x4
++#define IDLE_STATUS_TXQ_NO_IDLE 0x8
++#define IDLE_STATUS_DMAR_NO_IDLE 0x10
++#define IDLE_STATUS_DMAW_NO_IDLE 0x20
++#define IDLE_STATUS_SMB_NO_IDLE 0x40
++#define IDLE_STATUS_CMB_NO_IDLE 0x80
++
++/* MDIO Control Register */
++#define REG_MDIO_CTRL 0x1414
++#define MDIO_DATA_MASK 0xffff /* On MDIO write, the 16-bit
++ * control data to write to PHY
++ * MII management register */
++#define MDIO_DATA_SHIFT 0 /* On MDIO read, the 16-bit
++ * status data that was read
++ * from the PHY MII management register */
++#define MDIO_REG_ADDR_MASK 0x1f /* MDIO register address */
++#define MDIO_REG_ADDR_SHIFT 16
++#define MDIO_RW 0x200000 /* 1: read, 0: write */
++#define MDIO_SUP_PREAMBLE 0x400000 /* Suppress preamble */
++#define MDIO_START 0x800000 /* Write 1 to initiate the MDIO
++ * master. And this bit is self
++ * cleared after one cycle */
++#define MDIO_CLK_SEL_SHIFT 24
++#define MDIO_CLK_25_4 0
++#define MDIO_CLK_25_6 2
++#define MDIO_CLK_25_8 3
++#define MDIO_CLK_25_10 4
++#define MDIO_CLK_25_14 5
++#define MDIO_CLK_25_20 6
++#define MDIO_CLK_25_28 7
++#define MDIO_BUSY 0x8000000
++#define MDIO_AP_EN 0x10000000
++#define MDIO_WAIT_TIMES 10
++
++/* MII PHY Status Register */
++#define REG_PHY_STATUS 0x1418
++#define PHY_GENERAL_STATUS_MASK 0xFFFF
++#define PHY_STATUS_RECV_ENABLE 0x0001
++#define PHY_OE_PWSP_STATUS_MASK 0x07FF
++#define PHY_OE_PWSP_STATUS_SHIFT 16
++#define PHY_STATUS_LPW_STATE 0x80000000
++/* BIST Control and Status Register0 (for the Packet Memory) */
++#define REG_BIST0_CTRL 0x141c
++#define BIST0_NOW 0x1
++#define BIST0_SRAM_FAIL 0x2 /* 1: The SRAM failure is
++ * un-repairable because
++ * it has address decoder
++ * failure or more than 1 cell
++ * stuck-to-x failure */
++#define BIST0_FUSE_FLAG 0x4
++
++/* BIST Control and Status Register1(for the retry buffer of PCI Express) */
++#define REG_BIST1_CTRL 0x1420
++#define BIST1_NOW 0x1
++#define BIST1_SRAM_FAIL 0x2
++#define BIST1_FUSE_FLAG 0x4
++
++/* SerDes Lock Detect Control and Status Register */
++#define REG_SERDES_LOCK 0x1424
++#define SERDES_LOCK_DETECT 0x1 /* SerDes lock detected. This signal
++ * comes from Analog SerDes */
++#define SERDES_LOCK_DETECT_EN 0x2 /* 1: Enable SerDes Lock detect function */
++
++/* MAC Control Register */
++#define REG_MAC_CTRL 0x1480
++#define MAC_CTRL_TX_EN 0x1
++#define MAC_CTRL_RX_EN 0x2
++#define MAC_CTRL_TX_FLOW 0x4
++#define MAC_CTRL_RX_FLOW 0x8
++#define MAC_CTRL_LOOPBACK 0x10
++#define MAC_CTRL_DUPLX 0x20
++#define MAC_CTRL_ADD_CRC 0x40
++#define MAC_CTRL_PAD 0x80
++#define MAC_CTRL_LENCHK 0x100
++#define MAC_CTRL_HUGE_EN 0x200
++#define MAC_CTRL_PRMLEN_SHIFT 10
++#define MAC_CTRL_PRMLEN_MASK 0xf
++#define MAC_CTRL_RMV_VLAN 0x4000
++#define MAC_CTRL_PROMIS_EN 0x8000
++#define MAC_CTRL_TX_PAUSE 0x10000
++#define MAC_CTRL_SCNT 0x20000
++#define MAC_CTRL_SRST_TX 0x40000
++#define MAC_CTRL_TX_SIMURST 0x80000
++#define MAC_CTRL_SPEED_SHIFT 20
++#define MAC_CTRL_SPEED_MASK 0x3
++#define MAC_CTRL_DBG_TX_BKPRESURE 0x400000
++#define MAC_CTRL_TX_HUGE 0x800000
++#define MAC_CTRL_RX_CHKSUM_EN 0x1000000
++#define MAC_CTRL_MC_ALL_EN 0x2000000
++#define MAC_CTRL_BC_EN 0x4000000
++#define MAC_CTRL_DBG 0x8000000
++#define MAC_CTRL_SINGLE_PAUSE_EN 0x10000000
++
++/* MAC IPG/IFG Control Register */
++#define REG_MAC_IPG_IFG 0x1484
++#define MAC_IPG_IFG_IPGT_SHIFT 0 /* Desired back to back
++ * inter-packet gap. The
++ * default is 96-bit time */
++#define MAC_IPG_IFG_IPGT_MASK 0x7f
++#define MAC_IPG_IFG_MIFG_SHIFT 8 /* Minimum number of IFG to
++ * enforce in between RX frames */
++#define MAC_IPG_IFG_MIFG_MASK 0xff /* Frame gap below such IFP is dropped */
++#define MAC_IPG_IFG_IPGR1_SHIFT 16 /* 64bit Carrier-Sense window */
++#define MAC_IPG_IFG_IPGR1_MASK 0x7f
++#define MAC_IPG_IFG_IPGR2_SHIFT 24 /* 96-bit IPG window */
++#define MAC_IPG_IFG_IPGR2_MASK 0x7f
++
++/* MAC STATION ADDRESS */
++#define REG_MAC_STA_ADDR 0x1488
++
++/* Hash table for multicast address */
++#define REG_RX_HASH_TABLE 0x1490
++
++/* MAC Half-Duplex Control Register */
++#define REG_MAC_HALF_DUPLX_CTRL 0x1498
++#define MAC_HALF_DUPLX_CTRL_LCOL_SHIFT 0 /* Collision Window */
++#define MAC_HALF_DUPLX_CTRL_LCOL_MASK 0x3ff
++#define MAC_HALF_DUPLX_CTRL_RETRY_SHIFT 12
++#define MAC_HALF_DUPLX_CTRL_RETRY_MASK 0xf
++#define MAC_HALF_DUPLX_CTRL_EXC_DEF_EN 0x10000
++#define MAC_HALF_DUPLX_CTRL_NO_BACK_C 0x20000
++#define MAC_HALF_DUPLX_CTRL_NO_BACK_P 0x40000 /* No back-off on backpressure,
++ * immediately start the
++ * transmission after back pressure */
++#define MAC_HALF_DUPLX_CTRL_ABEBE 0x80000 /* 1: Alternative Binary Exponential Back-off Enabled */
++#define MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT 20 /* Maximum binary exponential number */
++#define MAC_HALF_DUPLX_CTRL_ABEBT_MASK 0xf
++#define MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT 24 /* IPG to start JAM for collision based flow control in half-duplex */
++#define MAC_HALF_DUPLX_CTRL_JAMIPG_MASK 0xf /* mode. In unit of 8-bit time */
++
++/* Maximum Frame Length Control Register */
++#define REG_MTU 0x149c
++
++/* Wake-On-Lan control register */
++#define REG_WOL_CTRL 0x14a0
++#define WOL_PATTERN_EN 0x00000001
++#define WOL_PATTERN_PME_EN 0x00000002
++#define WOL_MAGIC_EN 0x00000004
++#define WOL_MAGIC_PME_EN 0x00000008
++#define WOL_LINK_CHG_EN 0x00000010
++#define WOL_LINK_CHG_PME_EN 0x00000020
++#define WOL_PATTERN_ST 0x00000100
++#define WOL_MAGIC_ST 0x00000200
++#define WOL_LINKCHG_ST 0x00000400
++#define WOL_CLK_SWITCH_EN 0x00008000
++#define WOL_PT0_EN 0x00010000
++#define WOL_PT1_EN 0x00020000
++#define WOL_PT2_EN 0x00040000
++#define WOL_PT3_EN 0x00080000
++#define WOL_PT4_EN 0x00100000
++#define WOL_PT5_EN 0x00200000
++#define WOL_PT6_EN 0x00400000
++
++/* WOL Length ( 2 DWORD ) */
++#define REG_WOL_PATTERN_LEN 0x14a4
++#define WOL_PT_LEN_MASK 0x7f
++#define WOL_PT0_LEN_SHIFT 0
++#define WOL_PT1_LEN_SHIFT 8
++#define WOL_PT2_LEN_SHIFT 16
++#define WOL_PT3_LEN_SHIFT 24
++#define WOL_PT4_LEN_SHIFT 0
++#define WOL_PT5_LEN_SHIFT 8
++#define WOL_PT6_LEN_SHIFT 16
++
++/* Internal SRAM Partition Register */
++#define RFDX_HEAD_ADDR_MASK 0x03FF
++#define RFDX_HARD_ADDR_SHIFT 0
++#define RFDX_TAIL_ADDR_MASK 0x03FF
++#define RFDX_TAIL_ADDR_SHIFT 16
++
++#define REG_SRAM_RFD0_INFO 0x1500
++#define REG_SRAM_RFD1_INFO 0x1504
++#define REG_SRAM_RFD2_INFO 0x1508
++#define REG_SRAM_RFD3_INFO 0x150C
++
++#define REG_RFD_NIC_LEN 0x1510 /* In 8-bytes */
++#define RFD_NIC_LEN_MASK 0x03FF
++
++#define REG_SRAM_TRD_ADDR 0x1518
++#define TPD_HEAD_ADDR_MASK 0x03FF
++#define TPD_HEAD_ADDR_SHIFT 0
++#define TPD_TAIL_ADDR_MASK 0x03FF
++#define TPD_TAIL_ADDR_SHIFT 16
++
++#define REG_SRAM_TRD_LEN 0x151C /* In 8-bytes */
++#define TPD_NIC_LEN_MASK 0x03FF
++
++#define REG_SRAM_RXF_ADDR 0x1520
++#define REG_SRAM_RXF_LEN 0x1524
++#define REG_SRAM_TXF_ADDR 0x1528
++#define REG_SRAM_TXF_LEN 0x152C
++#define REG_SRAM_TCPH_ADDR 0x1530
++#define REG_SRAM_PKTH_ADDR 0x1532
++
++/*
++ * Load Ptr Register
++ * Software sets this bit after the initialization of the head and tail */
++#define REG_LOAD_PTR 0x1534
++
++/*
++ * addresses of all descriptors, as well as the following descriptor
++ * control register, which triggers each function block to load the head
++ * pointer to prepare for the operation. This bit is then self-cleared
++ * after one cycle.
++ */
++#define REG_RX_BASE_ADDR_HI 0x1540
++#define REG_TX_BASE_ADDR_HI 0x1544
++#define REG_SMB_BASE_ADDR_HI 0x1548
++#define REG_SMB_BASE_ADDR_LO 0x154C
++#define REG_RFD0_HEAD_ADDR_LO 0x1550
++#define REG_RFD1_HEAD_ADDR_LO 0x1554
++#define REG_RFD2_HEAD_ADDR_LO 0x1558
++#define REG_RFD3_HEAD_ADDR_LO 0x155C
++#define REG_RFD_RING_SIZE 0x1560
++#define RFD_RING_SIZE_MASK 0x0FFF
++#define REG_RX_BUF_SIZE 0x1564
++#define RX_BUF_SIZE_MASK 0xFFFF
++#define REG_RRD0_HEAD_ADDR_LO 0x1568
++#define REG_RRD1_HEAD_ADDR_LO 0x156C
++#define REG_RRD2_HEAD_ADDR_LO 0x1570
++#define REG_RRD3_HEAD_ADDR_LO 0x1574
++#define REG_RRD_RING_SIZE 0x1578
++#define RRD_RING_SIZE_MASK 0x0FFF
++#define REG_HTPD_HEAD_ADDR_LO 0x157C
++#define REG_NTPD_HEAD_ADDR_LO 0x1580
++#define REG_TPD_RING_SIZE 0x1584
++#define TPD_RING_SIZE_MASK 0xFFFF
++#define REG_CMB_BASE_ADDR_LO 0x1588
++
++/* RSS about */
++#define REG_RSS_KEY0 0x14B0
++#define REG_RSS_KEY1 0x14B4
++#define REG_RSS_KEY2 0x14B8
++#define REG_RSS_KEY3 0x14BC
++#define REG_RSS_KEY4 0x14C0
++#define REG_RSS_KEY5 0x14C4
++#define REG_RSS_KEY6 0x14C8
++#define REG_RSS_KEY7 0x14CC
++#define REG_RSS_KEY8 0x14D0
++#define REG_RSS_KEY9 0x14D4
++#define REG_IDT_TABLE0 0x14E0
++#define REG_IDT_TABLE1 0x14E4
++#define REG_IDT_TABLE2 0x14E8
++#define REG_IDT_TABLE3 0x14EC
++#define REG_IDT_TABLE4 0x14F0
++#define REG_IDT_TABLE5 0x14F4
++#define REG_IDT_TABLE6 0x14F8
++#define REG_IDT_TABLE7 0x14FC
++#define REG_IDT_TABLE REG_IDT_TABLE0
++#define REG_RSS_HASH_VALUE 0x15B0
++#define REG_RSS_HASH_FLAG 0x15B4
++#define REG_BASE_CPU_NUMBER 0x15B8
++
++/* TXQ Control Register */
++#define REG_TXQ_CTRL 0x1590
++#define TXQ_NUM_TPD_BURST_MASK 0xF
++#define TXQ_NUM_TPD_BURST_SHIFT 0
++#define TXQ_CTRL_IP_OPTION_EN 0x10
++#define TXQ_CTRL_EN 0x20
++#define TXQ_CTRL_ENH_MODE 0x40
++#define TXQ_CTRL_LS_8023_EN 0x80
++#define TXQ_TXF_BURST_NUM_SHIFT 16
++#define TXQ_TXF_BURST_NUM_MASK 0xFFFF
++
++/* Jumbo packet Threshold for task offload */
++#define REG_TX_TSO_OFFLOAD_THRESH 0x1594 /* In 8-bytes */
++#define TX_TSO_OFFLOAD_THRESH_MASK 0x07FF
++
++#define REG_TXF_WATER_MARK 0x1598 /* In 8-bytes */
++#define TXF_WATER_MARK_MASK 0x0FFF
++#define TXF_LOW_WATER_MARK_SHIFT 0
++#define TXF_HIGH_WATER_MARK_SHIFT 16
++#define TXQ_CTRL_BURST_MODE_EN 0x80000000
++
++#define REG_THRUPUT_MON_CTRL 0x159C
++#define THRUPUT_MON_RATE_MASK 0x3
++#define THRUPUT_MON_RATE_SHIFT 0
++#define THRUPUT_MON_EN 0x80
++
++/* RXQ Control Register */
++#define REG_RXQ_CTRL 0x15A0
++#define ASPM_THRUPUT_LIMIT_MASK 0x3
++#define ASPM_THRUPUT_LIMIT_SHIFT 0
++#define ASPM_THRUPUT_LIMIT_NO 0x00
++#define ASPM_THRUPUT_LIMIT_1M 0x01
++#define ASPM_THRUPUT_LIMIT_10M 0x02
++#define ASPM_THRUPUT_LIMIT_100M 0x04
++#define RXQ1_CTRL_EN 0x10
++#define RXQ2_CTRL_EN 0x20
++#define RXQ3_CTRL_EN 0x40
++#define IPV6_CHKSUM_CTRL_EN 0x80
++#define RSS_HASH_BITS_MASK 0x00FF
++#define RSS_HASH_BITS_SHIFT 8
++#define RSS_HASH_IPV4 0x10000
++#define RSS_HASH_IPV4_TCP 0x20000
++#define RSS_HASH_IPV6 0x40000
++#define RSS_HASH_IPV6_TCP 0x80000
++#define RXQ_RFD_BURST_NUM_MASK 0x003F
++#define RXQ_RFD_BURST_NUM_SHIFT 20
++#define RSS_MODE_MASK 0x0003
++#define RSS_MODE_SHIFT 26
++#define RSS_NIP_QUEUE_SEL_MASK 0x1
++#define RSS_NIP_QUEUE_SEL_SHIFT 28
++#define RRS_HASH_CTRL_EN 0x20000000
++#define RX_CUT_THRU_EN 0x40000000
++#define RXQ_CTRL_EN 0x80000000
++
++#define REG_RFD_FREE_THRESH 0x15A4
++#define RFD_FREE_THRESH_MASK 0x003F
++#define RFD_FREE_HI_THRESH_SHIFT 0
++#define RFD_FREE_LO_THRESH_SHIFT 6
++
++/* RXF flow control register */
++#define REG_RXQ_RXF_PAUSE_THRESH 0x15A8
++#define RXQ_RXF_PAUSE_TH_HI_SHIFT 0
++#define RXQ_RXF_PAUSE_TH_HI_MASK 0x0FFF
++#define RXQ_RXF_PAUSE_TH_LO_SHIFT 16
++#define RXQ_RXF_PAUSE_TH_LO_MASK 0x0FFF
++
++#define REG_RXD_DMA_CTRL 0x15AC
++#define RXD_DMA_THRESH_MASK 0x0FFF /* In 8-bytes */
++#define RXD_DMA_THRESH_SHIFT 0
++#define RXD_DMA_DOWN_TIMER_MASK 0xFFFF
++#define RXD_DMA_DOWN_TIMER_SHIFT 16
++
++/* DMA Engine Control Register */
++#define REG_DMA_CTRL 0x15C0
++#define DMA_CTRL_DMAR_IN_ORDER 0x1
++#define DMA_CTRL_DMAR_ENH_ORDER 0x2
++#define DMA_CTRL_DMAR_OUT_ORDER 0x4
++#define DMA_CTRL_RCB_VALUE 0x8
++#define DMA_CTRL_DMAR_BURST_LEN_MASK 0x0007
++#define DMA_CTRL_DMAR_BURST_LEN_SHIFT 4
++#define DMA_CTRL_DMAW_BURST_LEN_MASK 0x0007
++#define DMA_CTRL_DMAW_BURST_LEN_SHIFT 7
++#define DMA_CTRL_DMAR_REQ_PRI 0x400
++#define DMA_CTRL_DMAR_DLY_CNT_MASK 0x001F
++#define DMA_CTRL_DMAR_DLY_CNT_SHIFT 11
++#define DMA_CTRL_DMAW_DLY_CNT_MASK 0x000F
++#define DMA_CTRL_DMAW_DLY_CNT_SHIFT 16
++#define DMA_CTRL_CMB_EN 0x100000
++#define DMA_CTRL_SMB_EN 0x200000
++#define DMA_CTRL_CMB_NOW 0x400000
++#define MAC_CTRL_SMB_DIS 0x1000000
++#define DMA_CTRL_SMB_NOW 0x80000000
++
++/* CMB/SMB Control Register */
++#define REG_SMB_STAT_TIMER 0x15C4 /* 2us resolution */
++#define SMB_STAT_TIMER_MASK 0xFFFFFF
++#define REG_CMB_TPD_THRESH 0x15C8
++#define CMB_TPD_THRESH_MASK 0xFFFF
++#define REG_CMB_TX_TIMER 0x15CC /* 2us resolution */
++#define CMB_TX_TIMER_MASK 0xFFFF
++
++/* Mail box */
++#define MB_RFDX_PROD_IDX_MASK 0xFFFF
++#define REG_MB_RFD0_PROD_IDX 0x15E0
++#define REG_MB_RFD1_PROD_IDX 0x15E4
++#define REG_MB_RFD2_PROD_IDX 0x15E8
++#define REG_MB_RFD3_PROD_IDX 0x15EC
++
++#define MB_PRIO_PROD_IDX_MASK 0xFFFF
++#define REG_MB_PRIO_PROD_IDX 0x15F0
++#define MB_HTPD_PROD_IDX_SHIFT 0
++#define MB_NTPD_PROD_IDX_SHIFT 16
++
++#define MB_PRIO_CONS_IDX_MASK 0xFFFF
++#define REG_MB_PRIO_CONS_IDX 0x15F4
++#define MB_HTPD_CONS_IDX_SHIFT 0
++#define MB_NTPD_CONS_IDX_SHIFT 16
++
++#define REG_MB_RFD01_CONS_IDX 0x15F8
++#define MB_RFD0_CONS_IDX_MASK 0x0000FFFF
++#define MB_RFD1_CONS_IDX_MASK 0xFFFF0000
++#define REG_MB_RFD23_CONS_IDX 0x15FC
++#define MB_RFD2_CONS_IDX_MASK 0x0000FFFF
++#define MB_RFD3_CONS_IDX_MASK 0xFFFF0000
++
++/* Interrupt Status Register */
++#define REG_ISR 0x1600
++#define ISR_SMB 0x00000001
++#define ISR_TIMER 0x00000002
++/*
++ * Software manual interrupt, for debug. Set when SW_MAN_INT_EN is set
++ * in Table 51 Selene Master Control Register (Offset 0x1400).
++ */
++#define ISR_MANUAL 0x00000004
++#define ISR_HW_RXF_OV 0x00000008 /* RXF overflow interrupt */
++#define ISR_RFD0_UR 0x00000010 /* RFD0 under run */
++#define ISR_RFD1_UR 0x00000020
++#define ISR_RFD2_UR 0x00000040
++#define ISR_RFD3_UR 0x00000080
++#define ISR_TXF_UR 0x00000100
++#define ISR_DMAR_TO_RST 0x00000200
++#define ISR_DMAW_TO_RST 0x00000400
++#define ISR_TX_CREDIT 0x00000800
++#define ISR_GPHY 0x00001000
++/* GPHY low power state interrupt */
++#define ISR_GPHY_LPW 0x00002000
++#define ISR_TXQ_TO_RST 0x00004000
++#define ISR_TX_PKT 0x00008000
++#define ISR_RX_PKT_0 0x00010000
++#define ISR_RX_PKT_1 0x00020000
++#define ISR_RX_PKT_2 0x00040000
++#define ISR_RX_PKT_3 0x00080000
++#define ISR_MAC_RX 0x00100000
++#define ISR_MAC_TX 0x00200000
++#define ISR_UR_DETECTED 0x00400000
++#define ISR_FERR_DETECTED 0x00800000
++#define ISR_NFERR_DETECTED 0x01000000
++#define ISR_CERR_DETECTED 0x02000000
++#define ISR_PHY_LINKDOWN 0x04000000
++#define ISR_DIS_INT 0x80000000
++
++/* Interrupt Mask Register */
++#define REG_IMR 0x1604
++
++#define IMR_NORMAL_MASK (\
++ ISR_MANUAL |\
++ ISR_HW_RXF_OV |\
++ ISR_RFD0_UR |\
++ ISR_TXF_UR |\
++ ISR_DMAR_TO_RST |\
++ ISR_TXQ_TO_RST |\
++ ISR_DMAW_TO_RST |\
++ ISR_GPHY |\
++ ISR_TX_PKT |\
++ ISR_RX_PKT_0 |\
++ ISR_GPHY_LPW |\
++ ISR_PHY_LINKDOWN)
++
++#define ISR_RX_PKT (\
++ ISR_RX_PKT_0 |\
++ ISR_RX_PKT_1 |\
++ ISR_RX_PKT_2 |\
++ ISR_RX_PKT_3)
++
++#define ISR_OVER (\
++ ISR_RFD0_UR |\
++ ISR_RFD1_UR |\
++ ISR_RFD2_UR |\
++ ISR_RFD3_UR |\
++ ISR_HW_RXF_OV |\
++ ISR_TXF_UR)
++
++#define ISR_ERROR (\
++ ISR_DMAR_TO_RST |\
++ ISR_TXQ_TO_RST |\
++ ISR_DMAW_TO_RST |\
++ ISR_PHY_LINKDOWN)
++
++#define REG_INT_RETRIG_TIMER 0x1608
++#define INT_RETRIG_TIMER_MASK 0xFFFF
++
++#define REG_HDS_CTRL 0x160C
++#define HDS_CTRL_EN 0x0001
++#define HDS_CTRL_BACKFILLSIZE_SHIFT 8
++#define HDS_CTRL_BACKFILLSIZE_MASK 0x0FFF
++#define HDS_CTRL_MAX_HDRSIZE_SHIFT 20
++#define HDS_CTRL_MAC_HDRSIZE_MASK 0x0FFF
++
++#define REG_MAC_RX_STATUS_BIN 0x1700
++#define REG_MAC_RX_STATUS_END 0x175c
++#define REG_MAC_TX_STATUS_BIN 0x1760
++#define REG_MAC_TX_STATUS_END 0x17c0
++
++/* DEBUG ADDR */
++#define REG_DEBUG_DATA0 0x1900
++#define REG_DEBUG_DATA1 0x1904
++
++/* PHY Control Register */
++#define MII_BMCR 0x00
++#define BMCR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */
++#define BMCR_COLL_TEST_ENABLE 0x0080 /* Collision test enable */
++#define BMCR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
++#define BMCR_RESTART_AUTO_NEG 0x0200 /* Restart auto negotiation */
++#define BMCR_ISOLATE 0x0400 /* Isolate PHY from MII */
++#define BMCR_POWER_DOWN 0x0800 /* Power down */
++#define BMCR_AUTO_NEG_EN 0x1000 /* Auto Neg Enable */
++#define BMCR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */
++#define BMCR_LOOPBACK 0x4000 /* 0 = normal, 1 = loopback */
++#define BMCR_RESET 0x8000 /* 0 = normal, 1 = PHY reset */
++#define BMCR_SPEED_MASK 0x2040
++#define BMCR_SPEED_1000 0x0040
++#define BMCR_SPEED_100 0x2000
++#define BMCR_SPEED_10 0x0000
++
++/* PHY Status Register */
++#define MII_BMSR 0x01
++#define BMMSR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */
++#define BMSR_JABBER_DETECT 0x0002 /* Jabber Detected */
++#define BMSR_LINK_STATUS 0x0004 /* Link Status 1 = link */
++#define BMSR_AUTONEG_CAPS 0x0008 /* Auto Neg Capable */
++#define BMSR_REMOTE_FAULT 0x0010 /* Remote Fault Detect */
++#define BMSR_AUTONEG_COMPLETE 0x0020 /* Auto Neg Complete */
++#define BMSR_PREAMBLE_SUPPRESS 0x0040 /* Preamble may be suppressed */
++#define BMSR_EXTENDED_STATUS 0x0100 /* Ext. status info in Reg 0x0F */
++#define BMSR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */
++#define BMSR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */
++#define BMSR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */
++#define BMSR_10T_FD_CAPS 0x1000 /* 10T Full Duplex Capable */
++#define BMSR_100X_HD_CAPS 0x2000 /* 100X Half Duplex Capable */
++#define BMMII_SR_100X_FD_CAPS 0x4000 /* 100X Full Duplex Capable */
++#define BMMII_SR_100T4_CAPS 0x8000 /* 100T4 Capable */
++
++#define MII_PHYSID1 0x02
++#define MII_PHYSID2 0x03
++
++/* Autoneg Advertisement Register */
++#define MII_ADVERTISE 0x04
++#define ADVERTISE_SPEED_MASK 0x01E0
++#define ADVERTISE_DEFAULT_CAP 0x0DE0
++
++/* 1000BASE-T Control Register */
++#define MII_GIGA_CR 0x09
++#define GIGA_CR_1000T_REPEATER_DTE 0x0400 /* 1=Repeater/switch device port 0=DTE device */
++
++#define GIGA_CR_1000T_MS_VALUE 0x0800 /* 1=Configure PHY as Master 0=Configure PHY as Slave */
++#define GIGA_CR_1000T_MS_ENABLE 0x1000 /* 1=Master/Slave manual config value 0=Automatic Master/Slave config */
++#define GIGA_CR_1000T_TEST_MODE_NORMAL 0x0000 /* Normal Operation */
++#define GIGA_CR_1000T_TEST_MODE_1 0x2000 /* Transmit Waveform test */
++#define GIGA_CR_1000T_TEST_MODE_2 0x4000 /* Master Transmit Jitter test */
++#define GIGA_CR_1000T_TEST_MODE_3 0x6000 /* Slave Transmit Jitter test */
++#define GIGA_CR_1000T_TEST_MODE_4 0x8000 /* Transmitter Distortion test */
++#define GIGA_CR_1000T_SPEED_MASK 0x0300
++#define GIGA_CR_1000T_DEFAULT_CAP 0x0300
++
++/* PHY Specific Status Register */
++#define MII_GIGA_PSSR 0x11
++#define GIGA_PSSR_SPD_DPLX_RESOLVED 0x0800 /* 1=Speed & Duplex resolved */
++#define GIGA_PSSR_DPLX 0x2000 /* 1=Duplex 0=Half Duplex */
++#define GIGA_PSSR_SPEED 0xC000 /* Speed, bits 14:15 */
++#define GIGA_PSSR_10MBS 0x0000 /* 00=10Mbs */
++#define GIGA_PSSR_100MBS 0x4000 /* 01=100Mbs */
++#define GIGA_PSSR_1000MBS 0x8000 /* 10=1000Mbs */
++
++/* PHY Interrupt Enable Register */
++#define MII_IER 0x12
++#define IER_LINK_UP 0x0400
++#define IER_LINK_DOWN 0x0800
++
++/* PHY Interrupt Status Register */
++#define MII_ISR 0x13
++#define ISR_LINK_UP 0x0400
++#define ISR_LINK_DOWN 0x0800
++
++/* Cable-Detect-Test Control Register */
++#define MII_CDTC 0x16
++#define CDTC_EN_OFF 0 /* sc */
++#define CDTC_EN_BITS 1
++#define CDTC_PAIR_OFF 8
++#define CDTC_PAIR_BIT 2
++
++/* Cable-Detect-Test Status Register */
++#define MII_CDTS 0x1C
++#define CDTS_STATUS_OFF 8
++#define CDTS_STATUS_BITS 2
++#define CDTS_STATUS_NORMAL 0
++#define CDTS_STATUS_SHORT 1
++#define CDTS_STATUS_OPEN 2
++#define CDTS_STATUS_INVALID 3
++
++#define MII_DBG_ADDR 0x1D
++#define MII_DBG_DATA 0x1E
++
++#define MII_ANA_CTRL_0 0x0
++#define ANA_RESTART_CAL 0x0001
++#define ANA_MANUL_SWICH_ON_SHIFT 0x1
++#define ANA_MANUL_SWICH_ON_MASK 0xF
++#define ANA_MAN_ENABLE 0x0020
++#define ANA_SEL_HSP 0x0040
++#define ANA_EN_HB 0x0080
++#define ANA_EN_HBIAS 0x0100
++#define ANA_OEN_125M 0x0200
++#define ANA_EN_LCKDT 0x0400
++#define ANA_LCKDT_PHY 0x0800
++#define ANA_AFE_MODE 0x1000
++#define ANA_VCO_SLOW 0x2000
++#define ANA_VCO_FAST 0x4000
++#define ANA_SEL_CLK125M_DSP 0x8000
++
++#define MII_ANA_CTRL_4 0x4
++#define ANA_IECHO_ADJ_MASK 0xF
++#define ANA_IECHO_ADJ_3_SHIFT 0
++#define ANA_IECHO_ADJ_2_SHIFT 4
++#define ANA_IECHO_ADJ_1_SHIFT 8
++#define ANA_IECHO_ADJ_0_SHIFT 12
++
++#define MII_ANA_CTRL_5 0x5
++#define ANA_SERDES_CDR_BW_SHIFT 0
++#define ANA_SERDES_CDR_BW_MASK 0x3
++#define ANA_MS_PAD_DBG 0x0004
++#define ANA_SPEEDUP_DBG 0x0008
++#define ANA_SERDES_TH_LOS_SHIFT 4
++#define ANA_SERDES_TH_LOS_MASK 0x3
++#define ANA_SERDES_EN_DEEM 0x0040
++#define ANA_SERDES_TXELECIDLE 0x0080
++#define ANA_SERDES_BEACON 0x0100
++#define ANA_SERDES_HALFTXDR 0x0200
++#define ANA_SERDES_SEL_HSP 0x0400
++#define ANA_SERDES_EN_PLL 0x0800
++#define ANA_SERDES_EN 0x1000
++#define ANA_SERDES_EN_LCKDT 0x2000
++
++#define MII_ANA_CTRL_11 0xB
++#define ANA_PS_HIB_EN 0x8000
++
++#define MII_ANA_CTRL_18 0x12
++#define ANA_TEST_MODE_10BT_01SHIFT 0
++#define ANA_TEST_MODE_10BT_01MASK 0x3
++#define ANA_LOOP_SEL_10BT 0x0004
++#define ANA_RGMII_MODE_SW 0x0008
++#define ANA_EN_LONGECABLE 0x0010
++#define ANA_TEST_MODE_10BT_2 0x0020
++#define ANA_EN_10BT_IDLE 0x0400
++#define ANA_EN_MASK_TB 0x0800
++#define ANA_TRIGGER_SEL_TIMER_SHIFT 12
++#define ANA_TRIGGER_SEL_TIMER_MASK 0x3
++#define ANA_INTERVAL_SEL_TIMER_SHIFT 14
++#define ANA_INTERVAL_SEL_TIMER_MASK 0x3
++
++#define MII_ANA_CTRL_41 0x29
++#define ANA_TOP_PS_EN 0x8000
++
++#define MII_ANA_CTRL_54 0x36
++#define ANA_LONG_CABLE_TH_100_SHIFT 0
++#define ANA_LONG_CABLE_TH_100_MASK 0x3F
++#define ANA_DESERVED 0x0040
++#define ANA_EN_LIT_CH 0x0080
++#define ANA_SHORT_CABLE_TH_100_SHIFT 8
++#define ANA_SHORT_CABLE_TH_100_MASK 0x3F
++#define ANA_BP_BAD_LINK_ACCUM 0x4000
++#define ANA_BP_SMALL_BW 0x8000
++
++#endif /*_ATL1C_HW_H_*/
+diff --git a/drivers/net/atl1c/atl1c_main.c b/drivers/net/atl1c/atl1c_main.c
+new file mode 100644
+index 0000000..2f4be59
+--- /dev/null
++++ b/drivers/net/atl1c/atl1c_main.c
+@@ -0,0 +1,2781 @@
++/*
++ * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
++ *
++ * Derived from Intel e1000 driver
++ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; either version 2 of the License, or (at your option)
++ * any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program; if not, write to the Free Software Foundation, Inc., 59
++ * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ */
++
++#include "atl1c.h"
++
++#define ATL1C_DRV_VERSION "1.0.0.1-NAPI"
++char atl1c_driver_name[] = "atl1c";
++char atl1c_driver_version[] = ATL1C_DRV_VERSION;
++#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
++#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
++/*
++ * atl1c_pci_tbl - PCI Device ID Table
++ *
++ * Wildcard entries (PCI_ANY_ID) should come last
++ * Last entry must be all 0s
++ *
++ * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
++ * Class, Class Mask, private data (not used) }
++ */
++static struct pci_device_id atl1c_pci_tbl[] = {
++ {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
++ {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
++ /* required last entry */
++ { 0 }
++};
++MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
++
++MODULE_AUTHOR("Jie Yang <jie.yang at atheros.com>");
++MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
++MODULE_LICENSE("GPL");
++MODULE_VERSION(ATL1C_DRV_VERSION);
++
++static int atl1c_stop_mac(struct atl1c_hw *hw);
++static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
++static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
++static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
++static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
++static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
++static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
++ int *work_done, int work_to_do);
++
++static const u16 atl1c_pay_load_size[] = {
++ 128, 256, 512, 1024, 2048, 4096,
++};
++
++static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
++{
++ REG_MB_RFD0_PROD_IDX,
++ REG_MB_RFD1_PROD_IDX,
++ REG_MB_RFD2_PROD_IDX,
++ REG_MB_RFD3_PROD_IDX
++};
++
++static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
++{
++ REG_RFD0_HEAD_ADDR_LO,
++ REG_RFD1_HEAD_ADDR_LO,
++ REG_RFD2_HEAD_ADDR_LO,
++ REG_RFD3_HEAD_ADDR_LO
++};
++
++static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
++{
++ REG_RRD0_HEAD_ADDR_LO,
++ REG_RRD1_HEAD_ADDR_LO,
++ REG_RRD2_HEAD_ADDR_LO,
++ REG_RRD3_HEAD_ADDR_LO
++};
++
++static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
++ NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
++
++/*
++ * atl1c_init_pcie - init PCIE module
++ */
++static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
++{
++ u32 data;
++ u32 pci_cmd;
++ struct pci_dev *pdev = hw->adapter->pdev;
++
++ AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
++ pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
++ pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
++ PCI_COMMAND_IO);
++ AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
++
++ /*
++ * Clear any PowerSaveing Settings
++ */
++ pci_enable_wake(pdev, PCI_D3hot, 0);
++ pci_enable_wake(pdev, PCI_D3cold, 0);
++
++ /*
++ * Mask some pcie error bits
++ */
++ AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
++ data &= ~PCIE_UC_SERVRITY_DLP;
++ data &= ~PCIE_UC_SERVRITY_FCP;
++ AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
++
++ if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
++ atl1c_disable_l0s_l1(hw);
++ if (flag & ATL1C_PCIE_PHY_RESET)
++ AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
++ else
++ AT_WRITE_REG(hw, REG_GPHY_CTRL,
++ GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
++
++ msleep(1);
++}
++
++/*
++ * atl1c_irq_enable - Enable default interrupt generation settings
++ * @adapter: board private structure
++ */
++static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
++{
++ if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
++ AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
++ AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
++ AT_WRITE_FLUSH(&adapter->hw);
++ }
++}
++
++/*
++ * atl1c_irq_disable - Mask off interrupt generation on the NIC
++ * @adapter: board private structure
++ */
++static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
++{
++ atomic_inc(&adapter->irq_sem);
++ AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
++ AT_WRITE_FLUSH(&adapter->hw);
++ synchronize_irq(adapter->pdev->irq);
++}
++
++/*
++ * atl1c_irq_reset - reset interrupt confiure on the NIC
++ * @adapter: board private structure
++ */
++static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
++{
++ atomic_set(&adapter->irq_sem, 1);
++ atl1c_irq_enable(adapter);
++}
++
++/*
++ * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
++ * of the idle status register until the device is actually idle
++ */
++static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
++{
++ int timeout;
++ u32 data;
++
++ for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
++ AT_READ_REG(hw, REG_IDLE_STATUS, &data);
++ if ((data & IDLE_STATUS_MASK) == 0)
++ return 0;
++ msleep(1);
++ }
++ return data;
++}
++
++/*
++ * atl1c_phy_config - Timer Call-back
++ * @data: pointer to netdev cast into an unsigned long
++ */
++static void atl1c_phy_config(unsigned long data)
++{
++ struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
++ struct atl1c_hw *hw = &adapter->hw;
++ unsigned long flags;
++
++ spin_lock_irqsave(&adapter->mdio_lock, flags);
++ atl1c_restart_autoneg(hw);
++ spin_unlock_irqrestore(&adapter->mdio_lock, flags);
++}
++
++void atl1c_reinit_locked(struct atl1c_adapter *adapter)
++{
++ WARN_ON(in_interrupt());
++ atl1c_down(adapter);
++ atl1c_up(adapter);
++ clear_bit(__AT_RESETTING, &adapter->flags);
++}
++
++static void atl1c_check_link_status(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++ struct net_device *netdev = adapter->netdev;
++ struct pci_dev *pdev = adapter->pdev;
++ int err;
++ unsigned long flags;
++ u16 speed, duplex, phy_data;
++
++ spin_lock_irqsave(&adapter->mdio_lock, flags);
++ /* MII_BMSR must read twise */
++ atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
++ atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
++ spin_unlock_irqrestore(&adapter->mdio_lock, flags);
++
++ if ((phy_data & BMSR_LSTATUS) == 0) {
++ /* link down */
++ if (netif_carrier_ok(netdev)) {
++ hw->hibernate = true;
++ if (atl1c_stop_mac(hw) != 0)
++ if (netif_msg_hw(adapter))
++ dev_warn(&pdev->dev,
++ "stop mac failed\n");
++ atl1c_set_aspm(hw, false);
++ }
++ netif_carrier_off(netdev);
++ } else {
++ /* Link Up */
++ hw->hibernate = false;
++ spin_lock_irqsave(&adapter->mdio_lock, flags);
++ err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
++ spin_unlock_irqrestore(&adapter->mdio_lock, flags);
++ if (unlikely(err))
++ return;
++ /* link result is our setting */
++ if (adapter->link_speed != speed ||
++ adapter->link_duplex != duplex) {
++ adapter->link_speed = speed;
++ adapter->link_duplex = duplex;
++ atl1c_set_aspm(hw, true);
++ atl1c_enable_tx_ctrl(hw);
++ atl1c_enable_rx_ctrl(hw);
++ atl1c_setup_mac_ctrl(adapter);
++ if (netif_msg_link(adapter))
++ dev_info(&pdev->dev,
++ "%s: %s NIC Link is Up<%d Mbps %s>\n",
++ atl1c_driver_name, netdev->name,
++ adapter->link_speed,
++ adapter->link_duplex == FULL_DUPLEX ?
++ "Full Duplex" : "Half Duplex");
++ }
++ if (!netif_carrier_ok(netdev))
++ netif_carrier_on(netdev);
++ }
++}
++
++static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
++{
++ struct net_device *netdev = adapter->netdev;
++ struct pci_dev *pdev = adapter->pdev;
++ u16 phy_data;
++ u16 link_up;
++
++ spin_lock(&adapter->mdio_lock);
++ atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
++ atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
++ spin_unlock(&adapter->mdio_lock);
++ link_up = phy_data & BMSR_LSTATUS;
++ /* notify upper layer link down ASAP */
++ if (!link_up) {
++ if (netif_carrier_ok(netdev)) {
++ /* old link state: Up */
++ netif_carrier_off(netdev);
++ if (netif_msg_link(adapter))
++ dev_info(&pdev->dev,
++ "%s: %s NIC Link is Down\n",
++ atl1c_driver_name, netdev->name);
++ adapter->link_speed = SPEED_0;
++ }
++ }
++
++ adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE;
++ schedule_work(&adapter->common_task);
++}
++
++static void atl1c_common_task(struct work_struct *work)
++{
++ struct atl1c_adapter *adapter;
++ struct net_device *netdev;
++
++ adapter = container_of(work, struct atl1c_adapter, common_task);
++ netdev = adapter->netdev;
++
++ if (adapter->work_event & ATL1C_WORK_EVENT_RESET) {
++ netif_device_detach(netdev);
++ atl1c_down(adapter);
++ atl1c_up(adapter);
++ netif_device_attach(netdev);
++ return;
++ }
++
++ if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE)
++ atl1c_check_link_status(adapter);
++
++ return;
++}
++
++
++static void atl1c_del_timer(struct atl1c_adapter *adapter)
++{
++ del_timer_sync(&adapter->phy_config_timer);
++}
++
++
++/*
++ * atl1c_tx_timeout - Respond to a Tx Hang
++ * @netdev: network interface device structure
++ */
++static void atl1c_tx_timeout(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ /* Do the reset outside of interrupt context */
++ adapter->work_event |= ATL1C_WORK_EVENT_RESET;
++ schedule_work(&adapter->common_task);
++}
++
++/*
++ * atl1c_set_multi - Multicast and Promiscuous mode set
++ * @netdev: network interface device structure
++ *
++ * The set_multi entry point is called whenever the multicast address
++ * list or the network interface flags are updated. This routine is
++ * responsible for configuring the hardware for proper multicast,
++ * promiscuous mode, and all-multi behavior.
++ */
++static void atl1c_set_multi(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct atl1c_hw *hw = &adapter->hw;
++ struct dev_mc_list *mc_ptr;
++ u32 mac_ctrl_data;
++ u32 hash_value;
++
++ /* Check for Promiscuous and All Multicast modes */
++ AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
++
++ if (netdev->flags & IFF_PROMISC) {
++ mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
++ } else if (netdev->flags & IFF_ALLMULTI) {
++ mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
++ mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
++ } else {
++ mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
++ }
++
++ AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
++
++ /* clear the old settings from the multicast hash table */
++ AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
++ AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
++
++ /* comoute mc addresses' hash value ,and put it into hash table */
++ for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
++ hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr);
++ atl1c_hash_set(hw, hash_value);
++ }
++}
++
++static void atl1c_vlan_rx_register(struct net_device *netdev,
++ struct vlan_group *grp)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct pci_dev *pdev = adapter->pdev;
++ u32 mac_ctrl_data = 0;
++
++ if (netif_msg_pktdata(adapter))
++ dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
++
++ atl1c_irq_disable(adapter);
++
++ adapter->vlgrp = grp;
++ AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
++
++ if (grp) {
++ /* enable VLAN tag insert/strip */
++ mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
++ } else {
++ /* disable VLAN tag insert/strip */
++ mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
++ }
++
++ AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
++ atl1c_irq_enable(adapter);
++}
++
++static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
++{
++ struct pci_dev *pdev = adapter->pdev;
++
++ if (netif_msg_pktdata(adapter))
++ dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
++ atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
++}
++/*
++ * atl1c_set_mac - Change the Ethernet Address of the NIC
++ * @netdev: network interface device structure
++ * @p: pointer to an address structure
++ *
++ * Returns 0 on success, negative on failure
++ */
++static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct sockaddr *addr = p;
++
++ if (!is_valid_ether_addr(addr->sa_data))
++ return -EADDRNOTAVAIL;
++
++ if (netif_running(netdev))
++ return -EBUSY;
++
++ memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
++ memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
++
++ atl1c_hw_set_mac_addr(&adapter->hw);
++
++ return 0;
++}
++
++static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
++ struct net_device *dev)
++{
++ int mtu = dev->mtu;
++
++ adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
++ roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
++}
++/*
++ * atl1c_change_mtu - Change the Maximum Transfer Unit
++ * @netdev: network interface device structure
++ * @new_mtu: new value for maximum frame size
++ *
++ * Returns 0 on success, negative on failure
++ */
++static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ int old_mtu = netdev->mtu;
++ int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
++
++ if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
++ (max_frame > MAX_JUMBO_FRAME_SIZE)) {
++ if (netif_msg_link(adapter))
++ dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
++ return -EINVAL;
++ }
++ /* set MTU */
++ if (old_mtu != new_mtu && netif_running(netdev)) {
++ while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
++ msleep(1);
++ netdev->mtu = new_mtu;
++ adapter->hw.max_frame_size = new_mtu;
++ atl1c_set_rxbufsize(adapter, netdev);
++ atl1c_down(adapter);
++ atl1c_up(adapter);
++ clear_bit(__AT_RESETTING, &adapter->flags);
++ if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
++ u32 phy_data;
++
++ AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
++ phy_data |= 0x10000000;
++ AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
++ }
++
++ }
++ return 0;
++}
++
++/*
++ * caller should hold mdio_lock
++ */
++static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ u16 result;
++
++ atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
++ return result;
++}
++
++static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
++ int reg_num, int val)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
++}
++
++/*
++ * atl1c_mii_ioctl -
++ * @netdev:
++ * @ifreq:
++ * @cmd:
++ */
++static int atl1c_mii_ioctl(struct net_device *netdev,
++ struct ifreq *ifr, int cmd)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct pci_dev *pdev = adapter->pdev;
++ struct mii_ioctl_data *data = if_mii(ifr);
++ unsigned long flags;
++ int retval = 0;
++
++ if (!netif_running(netdev))
++ return -EINVAL;
++
++ spin_lock_irqsave(&adapter->mdio_lock, flags);
++ switch (cmd) {
++ case SIOCGMIIPHY:
++ data->phy_id = 0;
++ break;
++
++ case SIOCGMIIREG:
++ if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
++ &data->val_out)) {
++ retval = -EIO;
++ goto out;
++ }
++ break;
++
++ case SIOCSMIIREG:
++ if (data->reg_num & ~(0x1F)) {
++ retval = -EFAULT;
++ goto out;
++ }
++
++ dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
++ data->reg_num, data->val_in);
++ if (atl1c_write_phy_reg(&adapter->hw,
++ data->reg_num, data->val_in)) {
++ retval = -EIO;
++ goto out;
++ }
++ break;
++
++ default:
++ retval = -EOPNOTSUPP;
++ break;
++ }
++out:
++ spin_unlock_irqrestore(&adapter->mdio_lock, flags);
++ return retval;
++}
++
++/*
++ * atl1c_ioctl -
++ * @netdev:
++ * @ifreq:
++ * @cmd:
++ */
++static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
++{
++ switch (cmd) {
++ case SIOCGMIIPHY:
++ case SIOCGMIIREG:
++ case SIOCSMIIREG:
++ return atl1c_mii_ioctl(netdev, ifr, cmd);
++ default:
++ return -EOPNOTSUPP;
++ }
++}
++
++/*
++ * atl1c_alloc_queues - Allocate memory for all rings
++ * @adapter: board private structure to initialize
++ *
++ */
++static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
++{
++ return 0;
++}
++
++static void atl1c_set_mac_type(struct atl1c_hw *hw)
++{
++ switch (hw->device_id) {
++ case PCI_DEVICE_ID_ATTANSIC_L2C:
++ hw->nic_type = athr_l2c;
++ break;
++
++ case PCI_DEVICE_ID_ATTANSIC_L1C:
++ hw->nic_type = athr_l1c;
++ break;
++
++ default:
++ break;
++ }
++}
++
++static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
++{
++ u32 phy_status_data;
++ u32 link_ctrl_data;
++
++ atl1c_set_mac_type(hw);
++ AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
++ AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
++
++ hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
++ ATL1C_INTR_MODRT_ENABLE |
++ ATL1C_RX_IPV6_CHKSUM |
++ ATL1C_TXQ_MODE_ENHANCE;
++ if (link_ctrl_data & LINK_CTRL_L0S_EN)
++ hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
++ if (link_ctrl_data & LINK_CTRL_L1_EN)
++ hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
++
++ if (hw->nic_type == athr_l1c) {
++ hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
++ hw->ctrl_flags |= ATL1C_LINK_CAP_1000M;
++ }
++ return 0;
++}
++/*
++ * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
++ * @adapter: board private structure to initialize
++ *
++ * atl1c_sw_init initializes the Adapter private data structure.
++ * Fields are initialized based on PCI device information and
++ * OS network device settings (MTU size).
++ */
++static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++ struct pci_dev *pdev = adapter->pdev;
++
++ adapter->wol = 0;
++ adapter->link_speed = SPEED_0;
++ adapter->link_duplex = FULL_DUPLEX;
++ adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
++ adapter->tpd_ring[0].count = 1024;
++ adapter->rfd_ring[0].count = 512;
++
++ hw->vendor_id = pdev->vendor;
++ hw->device_id = pdev->device;
++ hw->subsystem_vendor_id = pdev->subsystem_vendor;
++ hw->subsystem_id = pdev->subsystem_device;
++
++ /* before link up, we assume hibernate is true */
++ hw->hibernate = true;
++ hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
++ if (atl1c_setup_mac_funcs(hw) != 0) {
++ dev_err(&pdev->dev, "set mac function pointers failed\n");
++ return -1;
++ }
++ hw->intr_mask = IMR_NORMAL_MASK;
++ hw->phy_configured = false;
++ hw->preamble_len = 7;
++ hw->max_frame_size = adapter->netdev->mtu;
++ if (adapter->num_rx_queues < 2) {
++ hw->rss_type = atl1c_rss_disable;
++ hw->rss_mode = atl1c_rss_mode_disable;
++ } else {
++ hw->rss_type = atl1c_rss_ipv4;
++ hw->rss_mode = atl1c_rss_mul_que_mul_int;
++ hw->rss_hash_bits = 16;
++ }
++ hw->autoneg_advertised = ADVERTISED_Autoneg;
++ hw->indirect_tab = 0xE4E4E4E4;
++ hw->base_cpu = 0;
++
++ hw->ict = 50000; /* 100ms */
++ hw->smb_timer = 200000; /* 400ms */
++ hw->cmb_tpd = 4;
++ hw->cmb_tx_timer = 1; /* 2 us */
++ hw->rx_imt = 200;
++ hw->tx_imt = 1000;
++
++ hw->tpd_burst = 5;
++ hw->rfd_burst = 8;
++ hw->dma_order = atl1c_dma_ord_out;
++ hw->dmar_block = atl1c_dma_req_1024;
++ hw->dmaw_block = atl1c_dma_req_1024;
++ hw->dmar_dly_cnt = 15;
++ hw->dmaw_dly_cnt = 4;
++
++ if (atl1c_alloc_queues(adapter)) {
++ dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
++ return -ENOMEM;
++ }
++ /* TODO */
++ atl1c_set_rxbufsize(adapter, adapter->netdev);
++ atomic_set(&adapter->irq_sem, 1);
++ spin_lock_init(&adapter->mdio_lock);
++ spin_lock_init(&adapter->tx_lock);
++ set_bit(__AT_DOWN, &adapter->flags);
++
++ return 0;
++}
++
++static inline void atl1c_clean_buffer(struct pci_dev *pdev,
++ struct atl1c_buffer *buffer_info, int in_irq)
++{
++ u16 pci_driection;
++ if (buffer_info->flags & ATL1C_BUFFER_FREE)
++ return;
++ if (buffer_info->dma) {
++ if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
++ pci_driection = PCI_DMA_FROMDEVICE;
++ else
++ pci_driection = PCI_DMA_TODEVICE;
++
++ if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
++ pci_unmap_single(pdev, buffer_info->dma,
++ buffer_info->length, pci_driection);
++ else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
++ pci_unmap_page(pdev, buffer_info->dma,
++ buffer_info->length, pci_driection);
++ }
++ if (buffer_info->skb) {
++ if (in_irq)
++ dev_kfree_skb_irq(buffer_info->skb);
++ else
++ dev_kfree_skb(buffer_info->skb);
++ }
++ buffer_info->dma = 0;
++ buffer_info->skb = NULL;
++ ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
++}
++/*
++ * atl1c_clean_tx_ring - Free Tx-skb
++ * @adapter: board private structure
++ */
++static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
++ enum atl1c_trans_queue type)
++{
++ struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
++ struct atl1c_buffer *buffer_info;
++ struct pci_dev *pdev = adapter->pdev;
++ u16 index, ring_count;
++
++ ring_count = tpd_ring->count;
++ for (index = 0; index < ring_count; index++) {
++ buffer_info = &tpd_ring->buffer_info[index];
++ atl1c_clean_buffer(pdev, buffer_info, 0);
++ }
++
++ /* Zero out Tx-buffers */
++ memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
++ ring_count);
++ atomic_set(&tpd_ring->next_to_clean, 0);
++ tpd_ring->next_to_use = 0;
++}
++
++/*
++ * atl1c_clean_rx_ring - Free rx-reservation skbs
++ * @adapter: board private structure
++ */
++static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
++{
++ struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
++ struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
++ struct atl1c_buffer *buffer_info;
++ struct pci_dev *pdev = adapter->pdev;
++ int i, j;
++
++ for (i = 0; i < adapter->num_rx_queues; i++) {
++ for (j = 0; j < rfd_ring[i].count; j++) {
++ buffer_info = &rfd_ring[i].buffer_info[j];
++ atl1c_clean_buffer(pdev, buffer_info, 0);
++ }
++ /* zero out the descriptor ring */
++ memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
++ rfd_ring[i].next_to_clean = 0;
++ rfd_ring[i].next_to_use = 0;
++ rrd_ring[i].next_to_use = 0;
++ rrd_ring[i].next_to_clean = 0;
++ }
++}
++
++/*
++ * Read / Write Ptr Initialize:
++ */
++static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
++{
++ struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
++ struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
++ struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
++ struct atl1c_buffer *buffer_info;
++ int i, j;
++
++ for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
++ tpd_ring[i].next_to_use = 0;
++ atomic_set(&tpd_ring[i].next_to_clean, 0);
++ buffer_info = tpd_ring[i].buffer_info;
++ for (j = 0; j < tpd_ring->count; j++)
++ ATL1C_SET_BUFFER_STATE(&buffer_info[i],
++ ATL1C_BUFFER_FREE);
++ }
++ for (i = 0; i < adapter->num_rx_queues; i++) {
++ rfd_ring[i].next_to_use = 0;
++ rfd_ring[i].next_to_clean = 0;
++ rrd_ring[i].next_to_use = 0;
++ rrd_ring[i].next_to_clean = 0;
++ for (j = 0; j < rfd_ring[i].count; j++) {
++ buffer_info = &rfd_ring[i].buffer_info[j];
++ ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
++ }
++ }
++}
++
++/*
++ * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
++ * @adapter: board private structure
++ *
++ * Free all transmit software resources
++ */
++static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
++{
++ struct pci_dev *pdev = adapter->pdev;
++
++ pci_free_consistent(pdev, adapter->ring_header.size,
++ adapter->ring_header.desc,
++ adapter->ring_header.dma);
++ adapter->ring_header.desc = NULL;
++
++ /* Note: just free tdp_ring.buffer_info,
++ * it contain rfd_ring.buffer_info, do not double free */
++ if (adapter->tpd_ring[0].buffer_info) {
++ kfree(adapter->tpd_ring[0].buffer_info);
++ adapter->tpd_ring[0].buffer_info = NULL;
++ }
++}
++
++/*
++ * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
++ * @adapter: board private structure
++ *
++ * Return 0 on success, negative on failure
++ */
++static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
++{
++ struct pci_dev *pdev = adapter->pdev;
++ struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
++ struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
++ struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
++ struct atl1c_ring_header *ring_header = &adapter->ring_header;
++ int num_rx_queues = adapter->num_rx_queues;
++ int size;
++ int i;
++ int count = 0;
++ int rx_desc_count = 0;
++ u32 offset = 0;
++
++ rrd_ring[0].count = rfd_ring[0].count;
++ for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
++ tpd_ring[i].count = tpd_ring[0].count;
++
++ for (i = 1; i < adapter->num_rx_queues; i++)
++ rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
++
++ /* 2 tpd queue, one high priority queue,
++ * another normal priority queue */
++ size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
++ rfd_ring->count * num_rx_queues);
++ tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
++ if (unlikely(!tpd_ring->buffer_info)) {
++ dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
++ size);
++ goto err_nomem;
++ }
++ for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
++ tpd_ring[i].buffer_info =
++ (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
++ count += tpd_ring[i].count;
++ }
++
++ for (i = 0; i < num_rx_queues; i++) {
++ rfd_ring[i].buffer_info =
++ (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
++ count += rfd_ring[i].count;
++ rx_desc_count += rfd_ring[i].count;
++ }
++ /*
++ * real ring DMA buffer
++ * each ring/block may need up to 8 bytes for alignment, hence the
++ * additional bytes tacked onto the end.
++ */
++ ring_header->size = size =
++ sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
++ sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
++ sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
++ sizeof(struct atl1c_hw_stats) +
++ 8 * 4 + 8 * 2 * num_rx_queues;
++
++ ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
++ &ring_header->dma);
++ if (unlikely(!ring_header->desc)) {
++ dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
++ goto err_nomem;
++ }
++ memset(ring_header->desc, 0, ring_header->size);
++ /* init TPD ring */
++
++ tpd_ring[0].dma = roundup(ring_header->dma, 8);
++ offset = tpd_ring[0].dma - ring_header->dma;
++ for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
++ tpd_ring[i].dma = ring_header->dma + offset;
++ tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
++ tpd_ring[i].size =
++ sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
++ offset += roundup(tpd_ring[i].size, 8);
++ }
++ /* init RFD ring */
++ for (i = 0; i < num_rx_queues; i++) {
++ rfd_ring[i].dma = ring_header->dma + offset;
++ rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
++ rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
++ rfd_ring[i].count;
++ offset += roundup(rfd_ring[i].size, 8);
++ }
++
++ /* init RRD ring */
++ for (i = 0; i < num_rx_queues; i++) {
++ rrd_ring[i].dma = ring_header->dma + offset;
++ rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
++ rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
++ rrd_ring[i].count;
++ offset += roundup(rrd_ring[i].size, 8);
++ }
++
++ adapter->smb.dma = ring_header->dma + offset;
++ adapter->smb.smb = (u8 *)ring_header->desc + offset;
++ return 0;
++
++err_nomem:
++ kfree(tpd_ring->buffer_info);
++ return -ENOMEM;
++}
++
++static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++ struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
++ adapter->rfd_ring;
++ struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
++ adapter->rrd_ring;
++ struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
++ adapter->tpd_ring;
++ struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
++ struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
++ int i;
++
++ /* TPD */
++ AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
++ (u32)((tpd_ring[atl1c_trans_normal].dma &
++ AT_DMA_HI_ADDR_MASK) >> 32));
++ /* just enable normal priority TX queue */
++ AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
++ (u32)(tpd_ring[atl1c_trans_normal].dma &
++ AT_DMA_LO_ADDR_MASK));
++ AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
++ (u32)(tpd_ring[atl1c_trans_high].dma &
++ AT_DMA_LO_ADDR_MASK));
++ AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
++ (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
++
++
++ /* RFD */
++ AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
++ (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
++ for (i = 0; i < adapter->num_rx_queues; i++)
++ AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
++ (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
++
++ AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
++ rfd_ring[0].count & RFD_RING_SIZE_MASK);
++ AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
++ adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
++
++ /* RRD */
++ for (i = 0; i < adapter->num_rx_queues; i++)
++ AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
++ (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
++ AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
++ (rrd_ring[0].count & RRD_RING_SIZE_MASK));
++
++ /* CMB */
++ AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
++
++ /* SMB */
++ AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
++ (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
++ AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
++ (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
++ /* Load all of base address above */
++ AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
++}
++
++static void atl1c_configure_tx(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++ u32 dev_ctrl_data;
++ u32 max_pay_load;
++ u16 tx_offload_thresh;
++ u32 txq_ctrl_data;
++ u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
++
++ extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
++ tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
++ AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
++ (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
++ AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
++ max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
++ DEVICE_CTRL_MAX_PAYLOAD_MASK;
++ hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
++ max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
++ DEVICE_CTRL_MAX_RREQ_SZ_MASK;
++ hw->dmar_block = min(max_pay_load, hw->dmar_block);
++
++ txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
++ TXQ_NUM_TPD_BURST_SHIFT;
++ if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
++ txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
++ txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
++ TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
++
++ AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
++}
++
++static void atl1c_configure_rx(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++ u32 rxq_ctrl_data;
++
++ rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
++ RXQ_RFD_BURST_NUM_SHIFT;
++
++ if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
++ rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
++ if (hw->rss_type == atl1c_rss_ipv4)
++ rxq_ctrl_data |= RSS_HASH_IPV4;
++ if (hw->rss_type == atl1c_rss_ipv4_tcp)
++ rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
++ if (hw->rss_type == atl1c_rss_ipv6)
++ rxq_ctrl_data |= RSS_HASH_IPV6;
++ if (hw->rss_type == atl1c_rss_ipv6_tcp)
++ rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
++ if (hw->rss_type != atl1c_rss_disable)
++ rxq_ctrl_data |= RRS_HASH_CTRL_EN;
++
++ rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
++ RSS_MODE_SHIFT;
++ rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
++ RSS_HASH_BITS_SHIFT;
++ if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
++ rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
++ ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
++
++ AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
++}
++
++static void atl1c_configure_rss(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++
++ AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
++ AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
++}
++
++static void atl1c_configure_dma(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++ u32 dma_ctrl_data;
++
++ dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
++ if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
++ dma_ctrl_data |= DMA_CTRL_CMB_EN;
++ if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
++ dma_ctrl_data |= DMA_CTRL_SMB_EN;
++ else
++ dma_ctrl_data |= MAC_CTRL_SMB_DIS;
++
++ switch (hw->dma_order) {
++ case atl1c_dma_ord_in:
++ dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
++ break;
++ case atl1c_dma_ord_enh:
++ dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
++ break;
++ case atl1c_dma_ord_out:
++ dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
++ break;
++ default:
++ break;
++ }
++
++ dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
++ << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
++ dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
++ << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
++ dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
++ << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
++ dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
++ << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
++
++ AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
++}
++
++/*
++ * Stop the mac, transmit and receive units
++ * hw - Struct containing variables accessed by shared code
++ * return : 0 or idle status (if error)
++ */
++static int atl1c_stop_mac(struct atl1c_hw *hw)
++{
++ u32 data;
++
++ AT_READ_REG(hw, REG_RXQ_CTRL, &data);
++ data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
++ RXQ3_CTRL_EN | RXQ_CTRL_EN);
++ AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
++
++ AT_READ_REG(hw, REG_TXQ_CTRL, &data);
++ data &= ~TXQ_CTRL_EN;
++ AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
++
++ atl1c_wait_until_idle(hw);
++
++ AT_READ_REG(hw, REG_MAC_CTRL, &data);
++ data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
++ AT_WRITE_REG(hw, REG_MAC_CTRL, data);
++
++ return (int)atl1c_wait_until_idle(hw);
++}
++
++static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
++{
++ u32 data;
++
++ AT_READ_REG(hw, REG_RXQ_CTRL, &data);
++ switch (hw->adapter->num_rx_queues) {
++ case 4:
++ data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
++ break;
++ case 3:
++ data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
++ break;
++ case 2:
++ data |= RXQ1_CTRL_EN;
++ break;
++ default:
++ break;
++ }
++ data |= RXQ_CTRL_EN;
++ AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
++}
++
++static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
++{
++ u32 data;
++
++ AT_READ_REG(hw, REG_TXQ_CTRL, &data);
++ data |= TXQ_CTRL_EN;
++ AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
++}
++
++/*
++ * Reset the transmit and receive units; mask and clear all interrupts.
++ * hw - Struct containing variables accessed by shared code
++ * return : 0 or idle status (if error)
++ */
++static int atl1c_reset_mac(struct atl1c_hw *hw)
++{
++ struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
++ struct pci_dev *pdev = adapter->pdev;
++ int ret;
++
++ AT_WRITE_REG(hw, REG_IMR, 0);
++ AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
++
++ ret = atl1c_stop_mac(hw);
++ if (ret)
++ return ret;
++ /*
++ * Issue Soft Reset to the MAC. This will reset the chip's
++ * transmit, receive, DMA. It will not effect
++ * the current PCI configuration. The global reset bit is self-
++ * clearing, and should clear within a microsecond.
++ */
++ AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
++ AT_WRITE_FLUSH(hw);
++ msleep(10);
++ /* Wait at least 10ms for All module to be Idle */
++
++ if (atl1c_wait_until_idle(hw)) {
++ dev_err(&pdev->dev,
++ "MAC state machine can't be idle since"
++ " disabled for 10ms second\n");
++ return -1;
++ }
++ return 0;
++}
++
++static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
++{
++ u32 pm_ctrl_data;
++
++ AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
++ pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
++ PM_CTRL_L1_ENTRY_TIMER_SHIFT);
++ pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
++ pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
++ pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
++ pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
++ pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
++
++ pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
++ pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
++ pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
++ AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
++}
++
++/*
++ * Set ASPM state.
++ * Enable/disable L0s/L1 depend on link state.
++ */
++static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
++{
++ u32 pm_ctrl_data;
++
++ AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
++
++ pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
++ pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
++ PM_CTRL_L1_ENTRY_TIMER_SHIFT);
++
++ pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
++
++ if (linkup) {
++ pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
++ pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
++
++ pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
++ pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
++ } else {
++ pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
++ pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
++ pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
++ pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
++
++ pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
++
++ if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
++ pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
++ else
++ pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
++ }
++
++ AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
++}
++
++static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++ struct net_device *netdev = adapter->netdev;
++ u32 mac_ctrl_data;
++
++ mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
++ mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
++
++ if (adapter->link_duplex == FULL_DUPLEX) {
++ hw->mac_duplex = true;
++ mac_ctrl_data |= MAC_CTRL_DUPLX;
++ }
++
++ if (adapter->link_speed == SPEED_1000)
++ hw->mac_speed = atl1c_mac_speed_1000;
++ else
++ hw->mac_speed = atl1c_mac_speed_10_100;
++
++ mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
++ MAC_CTRL_SPEED_SHIFT;
++
++ mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
++ mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
++ MAC_CTRL_PRMLEN_SHIFT);
++
++ if (adapter->vlgrp)
++ mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
++
++ mac_ctrl_data |= MAC_CTRL_BC_EN;
++ if (netdev->flags & IFF_PROMISC)
++ mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
++ if (netdev->flags & IFF_ALLMULTI)
++ mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
++
++ mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
++ AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
++}
++
++/*
++ * atl1c_configure - Configure Transmit&Receive Unit after Reset
++ * @adapter: board private structure
++ *
++ * Configure the Tx /Rx unit of the MAC after a reset.
++ */
++static int atl1c_configure(struct atl1c_adapter *adapter)
++{
++ struct atl1c_hw *hw = &adapter->hw;
++ u32 master_ctrl_data = 0;
++ u32 intr_modrt_data;
++
++ /* clear interrupt status */
++ AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
++ /* Clear any WOL status */
++ AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
++ /* set Interrupt Clear Timer
++ * HW will enable self to assert interrupt event to system after
++ * waiting x-time for software to notify it accept interrupt.
++ */
++ AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
++ hw->ict & INT_RETRIG_TIMER_MASK);
++
++ atl1c_configure_des_ring(adapter);
++
++ if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
++ intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
++ IRQ_MODRT_TX_TIMER_SHIFT;
++ intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
++ IRQ_MODRT_RX_TIMER_SHIFT;
++ AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
++ master_ctrl_data |=
++ MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
++ }
++
++ if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
++ master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
++
++ AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
++
++ if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
++ AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
++ hw->cmb_tpd & CMB_TPD_THRESH_MASK);
++ AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
++ hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
++ }
++
++ if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
++ AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
++ hw->smb_timer & SMB_STAT_TIMER_MASK);
++ /* set MTU */
++ AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
++ VLAN_HLEN + ETH_FCS_LEN);
++ /* HDS, disable */
++ AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
++
++ atl1c_configure_tx(adapter);
++ atl1c_configure_rx(adapter);
++ atl1c_configure_rss(adapter);
++ atl1c_configure_dma(adapter);
++
++ return 0;
++}
++
++static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
++{
++ u16 hw_reg_addr = 0;
++ unsigned long *stats_item = NULL;
++ u32 data;
++
++ /* update rx status */
++ hw_reg_addr = REG_MAC_RX_STATUS_BIN;
++ stats_item = &adapter->hw_stats.rx_ok;
++ while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
++ AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
++ *stats_item += data;
++ stats_item++;
++ hw_reg_addr += 4;
++ }
++/* update tx status */
++ hw_reg_addr = REG_MAC_TX_STATUS_BIN;
++ stats_item = &adapter->hw_stats.tx_ok;
++ while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
++ AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
++ *stats_item += data;
++ stats_item++;
++ hw_reg_addr += 4;
++ }
++}
++
++/*
++ * atl1c_get_stats - Get System Network Statistics
++ * @netdev: network interface device structure
++ *
++ * Returns the address of the device statistics structure.
++ * The statistics are actually updated from the timer callback.
++ */
++static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
++ struct net_device_stats *net_stats = &adapter->net_stats;
++
++ atl1c_update_hw_stats(adapter);
++ net_stats->rx_packets = hw_stats->rx_ok;
++ net_stats->tx_packets = hw_stats->tx_ok;
++ net_stats->rx_bytes = hw_stats->rx_byte_cnt;
++ net_stats->tx_bytes = hw_stats->tx_byte_cnt;
++ net_stats->multicast = hw_stats->rx_mcast;
++ net_stats->collisions = hw_stats->tx_1_col +
++ hw_stats->tx_2_col * 2 +
++ hw_stats->tx_late_col + hw_stats->tx_abort_col;
++ net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
++ hw_stats->rx_len_err + hw_stats->rx_sz_ov +
++ hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
++ net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
++ net_stats->rx_length_errors = hw_stats->rx_len_err;
++ net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
++ net_stats->rx_frame_errors = hw_stats->rx_align_err;
++ net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
++
++ net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
++
++ net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
++ hw_stats->tx_underrun + hw_stats->tx_trunc;
++ net_stats->tx_fifo_errors = hw_stats->tx_underrun;
++ net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
++ net_stats->tx_window_errors = hw_stats->tx_late_col;
++
++ return &adapter->net_stats;
++}
++
++static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
++{
++ u16 phy_data;
++
++ spin_lock(&adapter->mdio_lock);
++ atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
++ spin_unlock(&adapter->mdio_lock);
++}
++
++static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
++ enum atl1c_trans_queue type)
++{
++ struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
++ &adapter->tpd_ring[type];
++ struct atl1c_buffer *buffer_info;
++ struct pci_dev *pdev = adapter->pdev;
++ u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
++ u16 hw_next_to_clean;
++ u16 shift;
++ u32 data;
++
++ if (type == atl1c_trans_high)
++ shift = MB_HTPD_CONS_IDX_SHIFT;
++ else
++ shift = MB_NTPD_CONS_IDX_SHIFT;
++
++ AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
++ hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
++
++ while (next_to_clean != hw_next_to_clean) {
++ buffer_info = &tpd_ring->buffer_info[next_to_clean];
++ atl1c_clean_buffer(pdev, buffer_info, 1);
++ if (++next_to_clean == tpd_ring->count)
++ next_to_clean = 0;
++ atomic_set(&tpd_ring->next_to_clean, next_to_clean);
++ }
++
++ if (netif_queue_stopped(adapter->netdev) &&
++ netif_carrier_ok(adapter->netdev)) {
++ netif_wake_queue(adapter->netdev);
++ }
++
++ return true;
++}
++
++/*
++ * atl1c_intr - Interrupt Handler
++ * @irq: interrupt number
++ * @data: pointer to a network interface device structure
++ * @pt_regs: CPU registers structure
++ */
++static irqreturn_t atl1c_intr(int irq, void *data)
++{
++ struct net_device *netdev = data;
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct pci_dev *pdev = adapter->pdev;
++ struct atl1c_hw *hw = &adapter->hw;
++ int max_ints = AT_MAX_INT_WORK;
++ int handled = IRQ_NONE;
++ u32 status;
++ u32 reg_data;
++
++ do {
++ AT_READ_REG(hw, REG_ISR, ®_data);
++ status = reg_data & hw->intr_mask;
++
++ if (status == 0 || (status & ISR_DIS_INT) != 0) {
++ if (max_ints != AT_MAX_INT_WORK)
++ handled = IRQ_HANDLED;
++ break;
++ }
++ /* link event */
++ if (status & ISR_GPHY)
++ atl1c_clear_phy_int(adapter);
++ /* Ack ISR */
++ AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
++ if (status & ISR_RX_PKT) {
++ if (likely(napi_schedule_prep(&adapter->napi))) {
++ hw->intr_mask &= ~ISR_RX_PKT;
++ AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
++ __napi_schedule(&adapter->napi);
++ }
++ }
++ if (status & ISR_TX_PKT)
++ atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
++
++ handled = IRQ_HANDLED;
++ /* check if PCIE PHY Link down */
++ if (status & ISR_ERROR) {
++ if (netif_msg_hw(adapter))
++ dev_err(&pdev->dev,
++ "atl1c hardware error (status = 0x%x)\n",
++ status & ISR_ERROR);
++ /* reset MAC */
++ hw->intr_mask &= ~ISR_ERROR;
++ AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
++ adapter->work_event |= ATL1C_WORK_EVENT_RESET;
++ schedule_work(&adapter->common_task);
++ break;
++ }
++
++ if (status & ISR_OVER)
++ if (netif_msg_intr(adapter))
++ dev_warn(&pdev->dev,
++ "TX/RX overflow (status = 0x%x)\n",
++ status & ISR_OVER);
++
++ /* link event */
++ if (status & (ISR_GPHY | ISR_MANUAL)) {
++ adapter->net_stats.tx_carrier_errors++;
++ atl1c_link_chg_event(adapter);
++ break;
++ }
++
++ } while (--max_ints > 0);
++ /* re-enable Interrupt*/
++ AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
++ return handled;
++}
++
++static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
++ struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
++{
++ /*
++ * The pid field in RRS in not correct sometimes, so we
++ * cannot figure out if the packet is fragmented or not,
++ * so we tell the KERNEL CHECKSUM_NONE
++ */
++ skb->ip_summed = CHECKSUM_NONE;
++}
++
++static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
++{
++ struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
++ struct pci_dev *pdev = adapter->pdev;
++ struct atl1c_buffer *buffer_info, *next_info;
++ struct sk_buff *skb;
++ void *vir_addr = NULL;
++ u16 num_alloc = 0;
++ u16 rfd_next_to_use, next_next;
++ struct atl1c_rx_free_desc *rfd_desc;
++
++ next_next = rfd_next_to_use = rfd_ring->next_to_use;
++ if (++next_next == rfd_ring->count)
++ next_next = 0;
++ buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
++ next_info = &rfd_ring->buffer_info[next_next];
++
++ while (next_info->flags & ATL1C_BUFFER_FREE) {
++ rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
++
++ skb = dev_alloc_skb(adapter->rx_buffer_len);
++ if (unlikely(!skb)) {
++ if (netif_msg_rx_err(adapter))
++ dev_warn(&pdev->dev, "alloc rx buffer failed\n");
++ break;
++ }
++
++ /*
++ * Make buffer alignment 2 beyond a 16 byte boundary
++ * this will result in a 16 byte aligned IP header after
++ * the 14 byte MAC header is removed
++ */
++ vir_addr = skb->data;
++ ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
++ buffer_info->skb = skb;
++ buffer_info->length = adapter->rx_buffer_len;
++ buffer_info->dma = pci_map_single(pdev, vir_addr,
++ buffer_info->length,
++ PCI_DMA_FROMDEVICE);
++ ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
++ ATL1C_PCIMAP_FROMDEVICE);
++ rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
++ rfd_next_to_use = next_next;
++ if (++next_next == rfd_ring->count)
++ next_next = 0;
++ buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
++ next_info = &rfd_ring->buffer_info[next_next];
++ num_alloc++;
++ }
++
++ if (num_alloc) {
++ /* TODO: update mailbox here */
++ wmb();
++ rfd_ring->next_to_use = rfd_next_to_use;
++ AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
++ rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
++ }
++
++ return num_alloc;
++}
++
++static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
++ struct atl1c_recv_ret_status *rrs, u16 num)
++{
++ u16 i;
++ /* the relationship between rrd and rfd is one map one */
++ for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
++ rrd_ring->next_to_clean)) {
++ rrs->word3 &= ~RRS_RXD_UPDATED;
++ if (++rrd_ring->next_to_clean == rrd_ring->count)
++ rrd_ring->next_to_clean = 0;
++ }
++}
++
++static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
++ struct atl1c_recv_ret_status *rrs, u16 num)
++{
++ u16 i;
++ u16 rfd_index;
++ struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
++
++ rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
++ RRS_RX_RFD_INDEX_MASK;
++ for (i = 0; i < num; i++) {
++ buffer_info[rfd_index].skb = NULL;
++ ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
++ ATL1C_BUFFER_FREE);
++ if (++rfd_index == rfd_ring->count)
++ rfd_index = 0;
++ }
++ rfd_ring->next_to_clean = rfd_index;
++}
++
++static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
++ int *work_done, int work_to_do)
++{
++ u16 rfd_num, rfd_index;
++ u16 count = 0;
++ u16 length;
++ struct pci_dev *pdev = adapter->pdev;
++ struct net_device *netdev = adapter->netdev;
++ struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
++ struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
++ struct sk_buff *skb;
++ struct atl1c_recv_ret_status *rrs;
++ struct atl1c_buffer *buffer_info;
++
++ while (1) {
++ if (*work_done >= work_to_do)
++ break;
++ rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
++ if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
++ rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
++ RRS_RX_RFD_CNT_MASK;
++ if (unlikely(rfd_num != 1))
++ /* TODO support mul rfd*/
++ if (netif_msg_rx_err(adapter))
++ dev_warn(&pdev->dev,
++ "Multi rfd not support yet!\n");
++ goto rrs_checked;
++ } else {
++ break;
++ }
++rrs_checked:
++ atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
++ if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
++ atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
++ if (netif_msg_rx_err(adapter))
++ dev_warn(&pdev->dev,
++ "wrong packet! rrs word3 is %x\n",
++ rrs->word3);
++ continue;
++ }
++
++ length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
++ RRS_PKT_SIZE_MASK);
++ /* Good Receive */
++ if (likely(rfd_num == 1)) {
++ rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
++ RRS_RX_RFD_INDEX_MASK;
++ buffer_info = &rfd_ring->buffer_info[rfd_index];
++ pci_unmap_single(pdev, buffer_info->dma,
++ buffer_info->length, PCI_DMA_FROMDEVICE);
++ skb = buffer_info->skb;
++ } else {
++ /* TODO */
++ if (netif_msg_rx_err(adapter))
++ dev_warn(&pdev->dev,
++ "Multi rfd not support yet!\n");
++ break;
++ }
++ atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
++ skb_put(skb, length - ETH_FCS_LEN);
++ skb->protocol = eth_type_trans(skb, netdev);
++ skb->dev = netdev;
++ atl1c_rx_checksum(adapter, skb, rrs);
++ if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
++ u16 vlan;
++
++ AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
++ vlan = le16_to_cpu(vlan);
++ vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
++ } else
++ netif_receive_skb(skb);
++
++ (*work_done)++;
++ count++;
++ }
++ if (count)
++ atl1c_alloc_rx_buffer(adapter, que);
++}
++
++/*
++ * atl1c_clean - NAPI Rx polling callback
++ * @adapter: board private structure
++ */
++static int atl1c_clean(struct napi_struct *napi, int budget)
++{
++ struct atl1c_adapter *adapter =
++ container_of(napi, struct atl1c_adapter, napi);
++ int work_done = 0;
++
++ /* Keep link state information with original netdev */
++ if (!netif_carrier_ok(adapter->netdev))
++ goto quit_polling;
++ /* just enable one RXQ */
++ atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
++
++ if (work_done < budget) {
++quit_polling:
++ napi_complete(napi);
++ adapter->hw.intr_mask |= ISR_RX_PKT;
++ AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
++ }
++ return work_done;
++}
++
++#ifdef CONFIG_NET_POLL_CONTROLLER
++
++/*
++ * Polling 'interrupt' - used by things like netconsole to send skbs
++ * without having to re-enable interrupts. It's not called while
++ * the interrupt routine is executing.
++ */
++static void atl1c_netpoll(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ disable_irq(adapter->pdev->irq);
++ atl1c_intr(adapter->pdev->irq, netdev);
++ enable_irq(adapter->pdev->irq);
++}
++#endif
++
++static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
++{
++ struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
++ u16 next_to_use = 0;
++ u16 next_to_clean = 0;
++
++ next_to_clean = atomic_read(&tpd_ring->next_to_clean);
++ next_to_use = tpd_ring->next_to_use;
++
++ return (u16)(next_to_clean > next_to_use) ?
++ (next_to_clean - next_to_use - 1) :
++ (tpd_ring->count + next_to_clean - next_to_use - 1);
++}
++
++/*
++ * get next usable tpd
++ * Note: should call atl1c_tdp_avail to make sure
++ * there is enough tpd to use
++ */
++static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
++ enum atl1c_trans_queue type)
++{
++ struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
++ struct atl1c_tpd_desc *tpd_desc;
++ u16 next_to_use = 0;
++
++ next_to_use = tpd_ring->next_to_use;
++ if (++tpd_ring->next_to_use == tpd_ring->count)
++ tpd_ring->next_to_use = 0;
++ tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
++ memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
++ return tpd_desc;
++}
++
++static struct atl1c_buffer *
++atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
++{
++ struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
++
++ return &tpd_ring->buffer_info[tpd -
++ (struct atl1c_tpd_desc *)tpd_ring->desc];
++}
++
++/* Calculate the transmit packet descript needed*/
++static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
++{
++ u16 tpd_req;
++ u16 proto_hdr_len = 0;
++
++ tpd_req = skb_shinfo(skb)->nr_frags + 1;
++
++ if (skb_is_gso(skb)) {
++ proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
++ if (proto_hdr_len < skb_headlen(skb))
++ tpd_req++;
++ if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
++ tpd_req++;
++ }
++ return tpd_req;
++}
++
++static int atl1c_tso_csum(struct atl1c_adapter *adapter,
++ struct sk_buff *skb,
++ struct atl1c_tpd_desc **tpd,
++ enum atl1c_trans_queue type)
++{
++ struct pci_dev *pdev = adapter->pdev;
++ u8 hdr_len;
++ u32 real_len;
++ unsigned short offload_type;
++ int err;
++
++ if (skb_is_gso(skb)) {
++ if (skb_header_cloned(skb)) {
++ err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
++ if (unlikely(err))
++ return -1;
++ }
++ offload_type = skb_shinfo(skb)->gso_type;
++
++ if (offload_type & SKB_GSO_TCPV4) {
++ real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
++ + ntohs(ip_hdr(skb)->tot_len));
++
++ if (real_len < skb->len)
++ pskb_trim(skb, real_len);
++
++ hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
++ if (unlikely(skb->len == hdr_len)) {
++ /* only xsum need */
++ if (netif_msg_tx_queued(adapter))
++ dev_warn(&pdev->dev,
++ "IPV4 tso with zero data??\n");
++ goto check_sum;
++ } else {
++ ip_hdr(skb)->check = 0;
++ tcp_hdr(skb)->check = ~csum_tcpudp_magic(
++ ip_hdr(skb)->saddr,
++ ip_hdr(skb)->daddr,
++ 0, IPPROTO_TCP, 0);
++ (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
++ }
++ }
++
++ if (offload_type & SKB_GSO_TCPV6) {
++ struct atl1c_tpd_ext_desc *etpd =
++ *(struct atl1c_tpd_ext_desc **)(tpd);
++
++ memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
++ *tpd = atl1c_get_tpd(adapter, type);
++ ipv6_hdr(skb)->payload_len = 0;
++ /* check payload == 0 byte ? */
++ hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
++ if (unlikely(skb->len == hdr_len)) {
++ /* only xsum need */
++ if (netif_msg_tx_queued(adapter))
++ dev_warn(&pdev->dev,
++ "IPV6 tso with zero data??\n");
++ goto check_sum;
++ } else
++ tcp_hdr(skb)->check = ~csum_ipv6_magic(
++ &ipv6_hdr(skb)->saddr,
++ &ipv6_hdr(skb)->daddr,
++ 0, IPPROTO_TCP, 0);
++ etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
++ etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
++ etpd->pkt_len = cpu_to_le32(skb->len);
++ (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
++ }
++
++ (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
++ (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
++ TPD_TCPHDR_OFFSET_SHIFT;
++ (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
++ TPD_MSS_SHIFT;
++ return 0;
++ }
++
++check_sum:
++ if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
++ u8 css, cso;
++ cso = skb_transport_offset(skb);
++
++ if (unlikely(cso & 0x1)) {
++ if (netif_msg_tx_err(adapter))
++ dev_err(&adapter->pdev->dev,
++ "payload offset should not an event number\n");
++ return -1;
++ } else {
++ css = cso + skb->csum_offset;
++
++ (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
++ TPD_PLOADOFFSET_SHIFT;
++ (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
++ TPD_CCSUM_OFFSET_SHIFT;
++ (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
++ }
++ }
++ return 0;
++}
++
++static void atl1c_tx_map(struct atl1c_adapter *adapter,
++ struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
++ enum atl1c_trans_queue type)
++{
++ struct atl1c_tpd_desc *use_tpd = NULL;
++ struct atl1c_buffer *buffer_info = NULL;
++ u16 buf_len = skb_headlen(skb);
++ u16 map_len = 0;
++ u16 mapped_len = 0;
++ u16 hdr_len = 0;
++ u16 nr_frags;
++ u16 f;
++ int tso;
++
++ nr_frags = skb_shinfo(skb)->nr_frags;
++ tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
++ if (tso) {
++ /* TSO */
++ map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
++ use_tpd = tpd;
++
++ buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
++ buffer_info->length = map_len;
++ buffer_info->dma = pci_map_single(adapter->pdev,
++ skb->data, hdr_len, PCI_DMA_TODEVICE);
++ ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
++ ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
++ ATL1C_PCIMAP_TODEVICE);
++ mapped_len += map_len;
++ use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
++ use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
++ }
++
++ if (mapped_len < buf_len) {
++ /* mapped_len == 0, means we should use the first tpd,
++ which is given by caller */
++ if (mapped_len == 0)
++ use_tpd = tpd;
++ else {
++ use_tpd = atl1c_get_tpd(adapter, type);
++ memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
++ }
++ buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
++ buffer_info->length = buf_len - mapped_len;
++ buffer_info->dma =
++ pci_map_single(adapter->pdev, skb->data + mapped_len,
++ buffer_info->length, PCI_DMA_TODEVICE);
++ ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
++ ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
++ ATL1C_PCIMAP_TODEVICE);
++ use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
++ use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
++ }
++
++ for (f = 0; f < nr_frags; f++) {
++ struct skb_frag_struct *frag;
++
++ frag = &skb_shinfo(skb)->frags[f];
++
++ use_tpd = atl1c_get_tpd(adapter, type);
++ memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
++
++ buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
++ buffer_info->length = frag->size;
++ buffer_info->dma =
++ pci_map_page(adapter->pdev, frag->page,
++ frag->page_offset,
++ buffer_info->length,
++ PCI_DMA_TODEVICE);
++ ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
++ ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
++ ATL1C_PCIMAP_TODEVICE);
++ use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
++ use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
++ }
++
++ /* The last tpd */
++ use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
++ /* The last buffer info contain the skb address,
++ so it will be free after unmap */
++ buffer_info->skb = skb;
++}
++
++static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
++ struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
++{
++ struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
++ u32 prod_data;
++
++ AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
++ switch (type) {
++ case atl1c_trans_high:
++ prod_data &= 0xFFFF0000;
++ prod_data |= tpd_ring->next_to_use & 0xFFFF;
++ break;
++ case atl1c_trans_normal:
++ prod_data &= 0x0000FFFF;
++ prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
++ break;
++ default:
++ break;
++ }
++ wmb();
++ AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
++}
++
++static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
++ struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ unsigned long flags;
++ u16 tpd_req = 1;
++ struct atl1c_tpd_desc *tpd;
++ enum atl1c_trans_queue type = atl1c_trans_normal;
++
++ if (test_bit(__AT_DOWN, &adapter->flags)) {
++ dev_kfree_skb_any(skb);
++ return NETDEV_TX_OK;
++ }
++
++ tpd_req = atl1c_cal_tpd_req(skb);
++ if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
++ if (netif_msg_pktdata(adapter))
++ dev_info(&adapter->pdev->dev, "tx locked\n");
++ return NETDEV_TX_LOCKED;
++ }
++ if (skb->mark == 0x01)
++ type = atl1c_trans_high;
++ else
++ type = atl1c_trans_normal;
++
++ if (atl1c_tpd_avail(adapter, type) < tpd_req) {
++ /* no enough descriptor, just stop queue */
++ netif_stop_queue(netdev);
++ spin_unlock_irqrestore(&adapter->tx_lock, flags);
++ return NETDEV_TX_BUSY;
++ }
++
++ tpd = atl1c_get_tpd(adapter, type);
++
++ /* do TSO and check sum */
++ if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
++ spin_unlock_irqrestore(&adapter->tx_lock, flags);
++ dev_kfree_skb_any(skb);
++ return NETDEV_TX_OK;
++ }
++
++ if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
++ u16 vlan = vlan_tx_tag_get(skb);
++ __le16 tag;
++
++ vlan = cpu_to_le16(vlan);
++ AT_VLAN_TO_TAG(vlan, tag);
++ tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
++ tpd->vlan_tag = tag;
++ }
++
++ if (skb_network_offset(skb) != ETH_HLEN)
++ tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
++
++ atl1c_tx_map(adapter, skb, tpd, type);
++ atl1c_tx_queue(adapter, skb, tpd, type);
++
++ spin_unlock_irqrestore(&adapter->tx_lock, flags);
++ return NETDEV_TX_OK;
++}
++
++static void atl1c_free_irq(struct atl1c_adapter *adapter)
++{
++ struct net_device *netdev = adapter->netdev;
++
++ free_irq(adapter->pdev->irq, netdev);
++
++ if (adapter->have_msi)
++ pci_disable_msi(adapter->pdev);
++}
++
++static int atl1c_request_irq(struct atl1c_adapter *adapter)
++{
++ struct pci_dev *pdev = adapter->pdev;
++ struct net_device *netdev = adapter->netdev;
++ int flags = 0;
++ int err = 0;
++
++ adapter->have_msi = true;
++ err = pci_enable_msi(adapter->pdev);
++ if (err) {
++ if (netif_msg_ifup(adapter))
++ dev_err(&pdev->dev,
++ "Unable to allocate MSI interrupt Error: %d\n",
++ err);
++ adapter->have_msi = false;
++ } else
++ netdev->irq = pdev->irq;
++
++ if (!adapter->have_msi)
++ flags |= IRQF_SHARED;
++ err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
++ netdev->name, netdev);
++ if (err) {
++ if (netif_msg_ifup(adapter))
++ dev_err(&pdev->dev,
++ "Unable to allocate interrupt Error: %d\n",
++ err);
++ if (adapter->have_msi)
++ pci_disable_msi(adapter->pdev);
++ return err;
++ }
++ if (netif_msg_ifup(adapter))
++ dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
++ return err;
++}
++
++int atl1c_up(struct atl1c_adapter *adapter)
++{
++ struct net_device *netdev = adapter->netdev;
++ int num;
++ int err;
++ int i;
++
++ netif_carrier_off(netdev);
++ atl1c_init_ring_ptrs(adapter);
++ atl1c_set_multi(netdev);
++ atl1c_restore_vlan(adapter);
++
++ for (i = 0; i < adapter->num_rx_queues; i++) {
++ num = atl1c_alloc_rx_buffer(adapter, i);
++ if (unlikely(num == 0)) {
++ err = -ENOMEM;
++ goto err_alloc_rx;
++ }
++ }
++
++ if (atl1c_configure(adapter)) {
++ err = -EIO;
++ goto err_up;
++ }
++
++ err = atl1c_request_irq(adapter);
++ if (unlikely(err))
++ goto err_up;
++
++ clear_bit(__AT_DOWN, &adapter->flags);
++ napi_enable(&adapter->napi);
++ atl1c_irq_enable(adapter);
++ atl1c_check_link_status(adapter);
++ netif_start_queue(netdev);
++ return err;
++
++err_up:
++err_alloc_rx:
++ atl1c_clean_rx_ring(adapter);
++ return err;
++}
++
++void atl1c_down(struct atl1c_adapter *adapter)
++{
++ struct net_device *netdev = adapter->netdev;
++
++ atl1c_del_timer(adapter);
++ adapter->work_event = 0; /* clear all event */
++ /* signal that we're down so the interrupt handler does not
++ * reschedule our watchdog timer */
++ set_bit(__AT_DOWN, &adapter->flags);
++ netif_carrier_off(netdev);
++ napi_disable(&adapter->napi);
++ atl1c_irq_disable(adapter);
++ atl1c_free_irq(adapter);
++ AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
++ /* reset MAC to disable all RX/TX */
++ atl1c_reset_mac(&adapter->hw);
++ msleep(1);
++
++ adapter->link_speed = SPEED_0;
++ adapter->link_duplex = -1;
++ atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
++ atl1c_clean_tx_ring(adapter, atl1c_trans_high);
++ atl1c_clean_rx_ring(adapter);
++}
++
++/*
++ * atl1c_open - Called when a network interface is made active
++ * @netdev: network interface device structure
++ *
++ * Returns 0 on success, negative value on failure
++ *
++ * The open entry point is called when a network interface is made
++ * active by the system (IFF_UP). At this point all resources needed
++ * for transmit and receive operations are allocated, the interrupt
++ * handler is registered with the OS, the watchdog timer is started,
++ * and the stack is notified that the interface is ready.
++ */
++static int atl1c_open(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ int err;
++
++ /* disallow open during test */
++ if (test_bit(__AT_TESTING, &adapter->flags))
++ return -EBUSY;
++
++ /* allocate rx/tx dma buffer & descriptors */
++ err = atl1c_setup_ring_resources(adapter);
++ if (unlikely(err))
++ return err;
++
++ err = atl1c_up(adapter);
++ if (unlikely(err))
++ goto err_up;
++
++ if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
++ u32 phy_data;
++
++ AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
++ phy_data |= MDIO_AP_EN;
++ AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
++ }
++ return 0;
++
++err_up:
++ atl1c_free_irq(adapter);
++ atl1c_free_ring_resources(adapter);
++ atl1c_reset_mac(&adapter->hw);
++ return err;
++}
++
++/*
++ * atl1c_close - Disables a network interface
++ * @netdev: network interface device structure
++ *
++ * Returns 0, this is not allowed to fail
++ *
++ * The close entry point is called when an interface is de-activated
++ * by the OS. The hardware is still under the drivers control, but
++ * needs to be disabled. A global MAC reset is issued to stop the
++ * hardware, and all transmit and receive resources are freed.
++ */
++static int atl1c_close(struct net_device *netdev)
++{
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
++ atl1c_down(adapter);
++ atl1c_free_ring_resources(adapter);
++ return 0;
++}
++
++static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
++{
++ struct net_device *netdev = pci_get_drvdata(pdev);
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++ struct atl1c_hw *hw = &adapter->hw;
++ u32 ctrl;
++ u32 mac_ctrl_data;
++ u32 master_ctrl_data;
++ u32 wol_ctrl_data = 0;
++ u16 mii_bmsr_data;
++ u16 save_autoneg_advertised;
++ u16 mii_intr_status_data;
++ u32 wufc = adapter->wol;
++ u32 i;
++ int retval = 0;
++
++ if (netif_running(netdev)) {
++ WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
++ atl1c_down(adapter);
++ }
++ netif_device_detach(netdev);
++ atl1c_disable_l0s_l1(hw);
++ retval = pci_save_state(pdev);
++ if (retval)
++ return retval;
++ if (wufc) {
++ AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
++ master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
++
++ /* get link status */
++ atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
++ atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
++ save_autoneg_advertised = hw->autoneg_advertised;
++ hw->autoneg_advertised = ADVERTISED_10baseT_Half;
++ if (atl1c_restart_autoneg(hw) != 0)
++ if (netif_msg_link(adapter))
++ dev_warn(&pdev->dev, "phy autoneg failed\n");
++ hw->phy_configured = false; /* re-init PHY when resume */
++ hw->autoneg_advertised = save_autoneg_advertised;
++ /* turn on magic packet wol */
++ if (wufc & AT_WUFC_MAG)
++ wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
++
++ if (wufc & AT_WUFC_LNKC) {
++ for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
++ msleep(100);
++ atl1c_read_phy_reg(hw, MII_BMSR,
++ (u16 *)&mii_bmsr_data);
++ if (mii_bmsr_data & BMSR_LSTATUS)
++ break;
++ }
++ if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
++ if (netif_msg_link(adapter))
++ dev_warn(&pdev->dev,
++ "%s: Link may change"
++ "when suspend\n",
++ atl1c_driver_name);
++ wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
++ /* only link up can wake up */
++ if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
++ if (netif_msg_link(adapter))
++ dev_err(&pdev->dev,
++ "%s: read write phy "
++ "register failed.\n",
++ atl1c_driver_name);
++ goto wol_dis;
++ }
++ }
++ /* clear phy interrupt */
++ atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
++ /* Config MAC Ctrl register */
++ mac_ctrl_data = MAC_CTRL_RX_EN;
++ /* set to 10/100M halt duplex */
++ mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
++ mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
++ MAC_CTRL_PRMLEN_MASK) <<
++ MAC_CTRL_PRMLEN_SHIFT);
++
++ if (adapter->vlgrp)
++ mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
++
++ /* magic packet maybe Broadcast&multicast&Unicast frame */
++ if (wufc & AT_WUFC_MAG)
++ mac_ctrl_data |= MAC_CTRL_BC_EN;
++
++ if (netif_msg_hw(adapter))
++ dev_dbg(&pdev->dev,
++ "%s: suspend MAC=0x%x\n",
++ atl1c_driver_name, mac_ctrl_data);
++ AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
++ AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
++ AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
++
++ /* pcie patch */
++ AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
++ ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
++ AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
++
++ pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
++ goto suspend_exit;
++ }
++wol_dis:
++
++ /* WOL disabled */
++ AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
++
++ /* pcie patch */
++ AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
++ ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
++ AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
++
++ atl1c_phy_disable(hw);
++ hw->phy_configured = false; /* re-init PHY when resume */
++
++ pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
++suspend_exit:
++
++ pci_disable_device(pdev);
++ pci_set_power_state(pdev, pci_choose_state(pdev, state));
++
++ return 0;
++}
++
++static int atl1c_resume(struct pci_dev *pdev)
++{
++ struct net_device *netdev = pci_get_drvdata(pdev);
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ pci_set_power_state(pdev, PCI_D0);
++ pci_restore_state(pdev);
++ pci_enable_wake(pdev, PCI_D3hot, 0);
++ pci_enable_wake(pdev, PCI_D3cold, 0);
++
++ AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
++
++ atl1c_phy_reset(&adapter->hw);
++ atl1c_reset_mac(&adapter->hw);
++ netif_device_attach(netdev);
++ if (netif_running(netdev))
++ atl1c_up(adapter);
++
++ return 0;
++}
++
++static void atl1c_shutdown(struct pci_dev *pdev)
++{
++ atl1c_suspend(pdev, PMSG_SUSPEND);
++}
++
++static const struct net_device_ops atl1c_netdev_ops = {
++ .ndo_open = atl1c_open,
++ .ndo_stop = atl1c_close,
++ .ndo_validate_addr = eth_validate_addr,
++ .ndo_start_xmit = atl1c_xmit_frame,
++ .ndo_set_mac_address = atl1c_set_mac_addr,
++ .ndo_set_multicast_list = atl1c_set_multi,
++ .ndo_change_mtu = atl1c_change_mtu,
++ .ndo_do_ioctl = atl1c_ioctl,
++ .ndo_tx_timeout = atl1c_tx_timeout,
++ .ndo_get_stats = atl1c_get_stats,
++ .ndo_vlan_rx_register = atl1c_vlan_rx_register,
++#ifdef CONFIG_NET_POLL_CONTROLLER
++ .ndo_poll_controller = atl1c_netpoll,
++#endif
++};
++
++static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
++{
++ SET_NETDEV_DEV(netdev, &pdev->dev);
++ pci_set_drvdata(pdev, netdev);
++
++ netdev->irq = pdev->irq;
++ netdev->netdev_ops = &atl1c_netdev_ops;
++ netdev->watchdog_timeo = AT_TX_WATCHDOG;
++ atl1c_set_ethtool_ops(netdev);
++
++ /* TODO: add when ready */
++ netdev->features = NETIF_F_SG |
++ NETIF_F_HW_CSUM |
++ NETIF_F_HW_VLAN_TX |
++ NETIF_F_HW_VLAN_RX |
++ NETIF_F_TSO |
++ NETIF_F_TSO6;
++ return 0;
++}
++
++/*
++ * atl1c_probe - Device Initialization Routine
++ * @pdev: PCI device information struct
++ * @ent: entry in atl1c_pci_tbl
++ *
++ * Returns 0 on success, negative on failure
++ *
++ * atl1c_probe initializes an adapter identified by a pci_dev structure.
++ * The OS initialization, configuring of the adapter private structure,
++ * and a hardware reset occur.
++ */
++static int __devinit atl1c_probe(struct pci_dev *pdev,
++ const struct pci_device_id *ent)
++{
++ struct net_device *netdev;
++ struct atl1c_adapter *adapter;
++ static int cards_found;
++
++ int err = 0;
++
++ /* enable device (incl. PCI PM wakeup and hotplug setup) */
++ err = pci_enable_device_mem(pdev);
++ if (err) {
++ dev_err(&pdev->dev, "cannot enable PCI device\n");
++ return err;
++ }
++
++ /*
++ * The atl1c chip can DMA to 64-bit addresses, but it uses a single
++ * shared register for the high 32 bits, so only a single, aligned,
++ * 4 GB physical address range can be used at a time.
++ *
++ * Supporting 64-bit DMA on this hardware is more trouble than it's
++ * worth. It is far easier to limit to 32-bit DMA than update
++ * various kernel subsystems to support the mechanics required by a
++ * fixed-high-32-bit system.
++ */
++ if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
++ (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
++ dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
++ goto err_dma;
++ }
++
++ err = pci_request_regions(pdev, atl1c_driver_name);
++ if (err) {
++ dev_err(&pdev->dev, "cannot obtain PCI resources\n");
++ goto err_pci_reg;
++ }
++
++ pci_set_master(pdev);
++
++ netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
++ if (netdev == NULL) {
++ err = -ENOMEM;
++ dev_err(&pdev->dev, "etherdev alloc failed\n");
++ goto err_alloc_etherdev;
++ }
++
++ err = atl1c_init_netdev(netdev, pdev);
++ if (err) {
++ dev_err(&pdev->dev, "init netdevice failed\n");
++ goto err_init_netdev;
++ }
++ adapter = netdev_priv(netdev);
++ adapter->bd_number = cards_found;
++ adapter->netdev = netdev;
++ adapter->pdev = pdev;
++ adapter->hw.adapter = adapter;
++ adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
++ adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
++ if (!adapter->hw.hw_addr) {
++ err = -EIO;
++ dev_err(&pdev->dev, "cannot map device registers\n");
++ goto err_ioremap;
++ }
++ netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
++
++ /* init mii data */
++ adapter->mii.dev = netdev;
++ adapter->mii.mdio_read = atl1c_mdio_read;
++ adapter->mii.mdio_write = atl1c_mdio_write;
++ adapter->mii.phy_id_mask = 0x1f;
++ adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
++ netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
++ setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
++ (unsigned long)adapter);
++ /* setup the private structure */
++ err = atl1c_sw_init(adapter);
++ if (err) {
++ dev_err(&pdev->dev, "net device private data init failed\n");
++ goto err_sw_init;
++ }
++ atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
++ ATL1C_PCIE_PHY_RESET);
++
++ /* Init GPHY as early as possible due to power saving issue */
++ atl1c_phy_reset(&adapter->hw);
++
++ err = atl1c_reset_mac(&adapter->hw);
++ if (err) {
++ err = -EIO;
++ goto err_reset;
++ }
++
++ device_init_wakeup(&pdev->dev, 1);
++ /* reset the controller to
++ * put the device in a known good starting state */
++ err = atl1c_phy_init(&adapter->hw);
++ if (err) {
++ err = -EIO;
++ goto err_reset;
++ }
++ if (atl1c_read_mac_addr(&adapter->hw) != 0) {
++ err = -EIO;
++ dev_err(&pdev->dev, "get mac address failed\n");
++ goto err_eeprom;
++ }
++ memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
++ memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
++ if (netif_msg_probe(adapter))
++ dev_dbg(&pdev->dev,
++ "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
++ adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
++ adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
++ adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
++
++ atl1c_hw_set_mac_addr(&adapter->hw);
++ INIT_WORK(&adapter->common_task, atl1c_common_task);
++ adapter->work_event = 0;
++ err = register_netdev(netdev);
++ if (err) {
++ dev_err(&pdev->dev, "register netdevice failed\n");
++ goto err_register;
++ }
++
++ if (netif_msg_probe(adapter))
++ dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
++ cards_found++;
++ return 0;
++
++err_reset:
++err_register:
++err_sw_init:
++err_eeprom:
++ iounmap(adapter->hw.hw_addr);
++err_init_netdev:
++err_ioremap:
++ free_netdev(netdev);
++err_alloc_etherdev:
++ pci_release_regions(pdev);
++err_pci_reg:
++err_dma:
++ pci_disable_device(pdev);
++ return err;
++}
++
++/*
++ * atl1c_remove - Device Removal Routine
++ * @pdev: PCI device information struct
++ *
++ * atl1c_remove is called by the PCI subsystem to alert the driver
++ * that it should release a PCI device. The could be caused by a
++ * Hot-Plug event, or because the driver is going to be removed from
++ * memory.
++ */
++static void __devexit atl1c_remove(struct pci_dev *pdev)
++{
++ struct net_device *netdev = pci_get_drvdata(pdev);
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ unregister_netdev(netdev);
++ atl1c_phy_disable(&adapter->hw);
++
++ iounmap(adapter->hw.hw_addr);
++
++ pci_release_regions(pdev);
++ pci_disable_device(pdev);
++ free_netdev(netdev);
++}
++
++/*
++ * atl1c_io_error_detected - called when PCI error is detected
++ * @pdev: Pointer to PCI device
++ * @state: The current pci connection state
++ *
++ * This function is called after a PCI bus error affecting
++ * this device has been detected.
++ */
++static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
++ pci_channel_state_t state)
++{
++ struct net_device *netdev = pci_get_drvdata(pdev);
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ netif_device_detach(netdev);
++
++ if (state == pci_channel_io_perm_failure)
++ return PCI_ERS_RESULT_DISCONNECT;
++
++ if (netif_running(netdev))
++ atl1c_down(adapter);
++
++ pci_disable_device(pdev);
++
++ /* Request a slot slot reset. */
++ return PCI_ERS_RESULT_NEED_RESET;
++}
++
++/*
++ * atl1c_io_slot_reset - called after the pci bus has been reset.
++ * @pdev: Pointer to PCI device
++ *
++ * Restart the card from scratch, as if from a cold-boot. Implementation
++ * resembles the first-half of the e1000_resume routine.
++ */
++static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
++{
++ struct net_device *netdev = pci_get_drvdata(pdev);
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ if (pci_enable_device(pdev)) {
++ if (netif_msg_hw(adapter))
++ dev_err(&pdev->dev,
++ "Cannot re-enable PCI device after reset\n");
++ return PCI_ERS_RESULT_DISCONNECT;
++ }
++ pci_set_master(pdev);
++
++ pci_enable_wake(pdev, PCI_D3hot, 0);
++ pci_enable_wake(pdev, PCI_D3cold, 0);
++
++ atl1c_reset_mac(&adapter->hw);
++
++ return PCI_ERS_RESULT_RECOVERED;
++}
++
++/*
++ * atl1c_io_resume - called when traffic can start flowing again.
++ * @pdev: Pointer to PCI device
++ *
++ * This callback is called when the error recovery driver tells us that
++ * its OK to resume normal operation. Implementation resembles the
++ * second-half of the atl1c_resume routine.
++ */
++static void atl1c_io_resume(struct pci_dev *pdev)
++{
++ struct net_device *netdev = pci_get_drvdata(pdev);
++ struct atl1c_adapter *adapter = netdev_priv(netdev);
++
++ if (netif_running(netdev)) {
++ if (atl1c_up(adapter)) {
++ if (netif_msg_hw(adapter))
++ dev_err(&pdev->dev,
++ "Cannot bring device back up after reset\n");
++ return;
++ }
++ }
++
++ netif_device_attach(netdev);
++}
++
++static struct pci_error_handlers atl1c_err_handler = {
++ .error_detected = atl1c_io_error_detected,
++ .slot_reset = atl1c_io_slot_reset,
++ .resume = atl1c_io_resume,
++};
++
++static struct pci_driver atl1c_driver = {
++ .name = atl1c_driver_name,
++ .id_table = atl1c_pci_tbl,
++ .probe = atl1c_probe,
++ .remove = __devexit_p(atl1c_remove),
++ /* Power Managment Hooks */
++ .suspend = atl1c_suspend,
++ .resume = atl1c_resume,
++ .shutdown = atl1c_shutdown,
++ .err_handler = &atl1c_err_handler
++};
++
++/*
++ * atl1c_init_module - Driver Registration Routine
++ *
++ * atl1c_init_module is the first routine called when the driver is
++ * loaded. All it does is register with the PCI subsystem.
++ */
++static int __init atl1c_init_module(void)
++{
++ return pci_register_driver(&atl1c_driver);
++}
++
++/*
++ * atl1c_exit_module - Driver Exit Cleanup Routine
++ *
++ * atl1c_exit_module is called just before the driver is removed
++ * from memory.
++ */
++static void __exit atl1c_exit_module(void)
++{
++ pci_unregister_driver(&atl1c_driver);
++}
++
++module_init(atl1c_init_module);
++module_exit(atl1c_exit_module);
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-backport.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-backport.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-backport.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-backport.patch)
@@ -0,0 +1,75 @@
+From: Ben Hutchings <ben at decadent.org.uk>
+Subject: [PATCH] Backport atl1c to 2.6.26
+
+--- a/drivers/net/atl1c/atl1c_main.c
++++ b/drivers/net/atl1c/atl1c_main.c
+@@ -1740,6 +1740,7 @@
+ } else
+ netif_receive_skb(skb);
+
++ netdev->last_rx = jiffies;
+ (*work_done)++;
+ count++;
+ }
+@@ -2055,8 +2055,7 @@
+ AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
+ }
+
++static int atl1c_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
+-static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
+- struct net_device *netdev)
+ {
+ struct atl1c_adapter *adapter = netdev_priv(netdev);
+ unsigned long flags;
+@@ -2113,6 +2113,7 @@
+ atl1c_tx_map(adapter, skb, tpd, type);
+ atl1c_tx_queue(adapter, skb, tpd, type);
+
++ netdev->trans_start = jiffies;
+ spin_unlock_irqrestore(&adapter->tx_lock, flags);
+ return NETDEV_TX_OK;
+ }
+@@ -2439,30 +2439,25 @@
+ atl1c_suspend(pdev, PMSG_SUSPEND);
+ }
+
+-static const struct net_device_ops atl1c_netdev_ops = {
+- .ndo_open = atl1c_open,
+- .ndo_stop = atl1c_close,
+- .ndo_validate_addr = eth_validate_addr,
+- .ndo_start_xmit = atl1c_xmit_frame,
+- .ndo_set_mac_address = atl1c_set_mac_addr,
+- .ndo_set_multicast_list = atl1c_set_multi,
+- .ndo_change_mtu = atl1c_change_mtu,
+- .ndo_do_ioctl = atl1c_ioctl,
+- .ndo_tx_timeout = atl1c_tx_timeout,
+- .ndo_get_stats = atl1c_get_stats,
+- .ndo_vlan_rx_register = atl1c_vlan_rx_register,
+-#ifdef CONFIG_NET_POLL_CONTROLLER
+- .ndo_poll_controller = atl1c_netpoll,
+-#endif
+-};
+-
+ static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
+ {
+ SET_NETDEV_DEV(netdev, &pdev->dev);
+ pci_set_drvdata(pdev, netdev);
+
+ netdev->irq = pdev->irq;
+- netdev->netdev_ops = &atl1c_netdev_ops;
++ netdev->open = atl1c_open;
++ netdev->stop = atl1c_close;
++ netdev->hard_start_xmit = atl1c_xmit_frame;
++ netdev->set_mac_address = atl1c_set_mac_addr;
++ netdev->set_multicast_list = atl1c_set_multi;
++ netdev->change_mtu = atl1c_change_mtu;
++ netdev->do_ioctl = atl1c_ioctl;
++ netdev->tx_timeout = atl1c_tx_timeout;
++ netdev->get_stats = atl1c_get_stats;
++ netdev->vlan_rx_register = atl1c_vlan_rx_register;
++#ifdef CONFIG_NET_POLL_CONTROLLER
++ netdev->poll_controller = atl1c_netpoll;
++#endif
+ netdev->watchdog_timeo = AT_TX_WATCHDOG;
+ atl1c_set_ethtool_ops(netdev);
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-kbuild.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-kbuild.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/atl1c-kbuild.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/atl1c-kbuild.patch)
@@ -0,0 +1,33 @@
+From: Ben Hutchings <ben at decadent.org.uk>
+Subject: [PATCH] Add atl1c to kbuild in 2.6.26
+
+--- a/drivers/net/Kconfig
++++ b/drivers/net/Kconfig
+@@ -2356,6 +2356,17 @@
+ To compile this driver as a module, choose M here. The module
+ will be called atl1e.
+
++config ATL1C
++ tristate "Atheros L1C Gigabit Ethernet support (EXPERIMENTAL)"
++ depends on PCI && EXPERIMENTAL
++ select CRC32
++ select MII
++ help
++ This driver supports the Atheros L1C gigabit ethernet adapter.
++
++ To compile this driver as a module, choose M here. The module
++ will be called atl1c.
++
+ endif # NETDEV_1000
+
+ #
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -16,6 +16,7 @@
+ obj-$(CONFIG_BONDING) += bonding/
+ obj-$(CONFIG_ATL1) += atlx/
+ obj-$(CONFIG_ATL1E) += atl1e/
++obj-$(CONFIG_ATL1C) += atl1c/
+ obj-$(CONFIG_GIANFAR) += gianfar_driver.o
+ obj-$(CONFIG_TEHUTI) += tehuti.o
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716.patch)
@@ -0,0 +1,48 @@
+From 7bb0a04fcd610e5db59690332b2a46b6068c8bc3 Mon Sep 17 00:00:00 2001
+From: Michael Chan <mchan at broadcom.com>
+Date: Mon, 14 Jul 2008 22:37:47 -0700
+Subject: [PATCH] bnx2: Add PCI ID for 5716.
+
+Signed-off-by: Michael Chan <mchan at broadcom.com>
+Signed-off-by: Benjamin Li <Benli at broadcom.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/bnx2.c | 6 +++++-
+ 1 files changed, 5 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
+index e9cfb02..989d4b6 100644
+--- a/drivers/net/bnx2.c
++++ b/drivers/net/bnx2.c
+@@ -87,6 +87,7 @@ typedef enum {
+ BCM5708S,
+ BCM5709,
+ BCM5709S,
++ BCM5716,
+ } board_t;
+
+ /* indexed by board_t, above */
+@@ -102,9 +103,10 @@ static struct {
+ { "Broadcom NetXtreme II BCM5708 1000Base-SX" },
+ { "Broadcom NetXtreme II BCM5709 1000Base-T" },
+ { "Broadcom NetXtreme II BCM5709 1000Base-SX" },
++ { "Broadcom NetXtreme II BCM5716 1000Base-T" },
+ };
+
+-static struct pci_device_id bnx2_pci_tbl[] = {
++static DEFINE_PCI_DEVICE_TABLE(bnx2_pci_tbl) = {
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706,
+ PCI_VENDOR_ID_HP, 0x3101, 0, 0, NC370T },
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706,
+@@ -123,6 +125,8 @@ static struct pci_device_id bnx2_pci_tbl[] = {
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5709 },
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5709S,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5709S },
++ { PCI_VENDOR_ID_BROADCOM, 0x163b,
++ PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5716 },
+ { 0, }
+ };
+
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716S.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716S.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716S.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/bnx2-Add-PCI-ID-for-5716S.patch)
@@ -0,0 +1,45 @@
+From 1caacecb7cb2b72e798f06a32b5061075cf397fa Mon Sep 17 00:00:00 2001
+From: Michael Chan <mchan at broadcom.com>
+Date: Wed, 12 Nov 2008 16:01:12 -0800
+Subject: [PATCH] bnx2: Add PCI ID for 5716S.
+
+Signed-off-by: Michael Chan <mchan at broadcom.com>
+Signed-off-by: Matt Carlson <mcarlson at broadcom.com>
+Signed-off-by: Benjamin Li <benli at broadcom.com>
+Signed-off-by: David S. Miller <davem at davemloft.net>
+---
+ drivers/net/bnx2.c | 4 ++++
+ 1 files changed, 4 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
+index 51b163a..49ebb50 100644
+--- a/drivers/net/bnx2.c
++++ b/drivers/net/bnx2.c
+@@ -89,6 +89,7 @@ typedef enum {
+ BCM5709,
+ BCM5709S,
+ BCM5716,
++ BCM5716S,
+ } board_t;
+
+ /* indexed by board_t, above */
+@@ -105,6 +106,7 @@ static struct {
+ { "Broadcom NetXtreme II BCM5709 1000Base-T" },
+ { "Broadcom NetXtreme II BCM5709 1000Base-SX" },
+ { "Broadcom NetXtreme II BCM5716 1000Base-T" },
++ { "Broadcom NetXtreme II BCM5716 1000Base-SX" },
+ };
+
+ static DEFINE_PCI_DEVICE_TABLE(bnx2_pci_tbl) = {
+@@ -128,6 +130,8 @@ static DEFINE_PCI_DEVICE_TABLE(bnx2_pci_tbl) = {
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5709S },
+ { PCI_VENDOR_ID_BROADCOM, 0x163b,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5716 },
++ { PCI_VENDOR_ID_BROADCOM, 0x163c,
++ PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5716 },
+ { 0, }
+ };
+
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/megaraid_sas-add-new-controllers-0x78-0x79.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/megaraid_sas-add-new-controllers-0x78-0x79.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/megaraid_sas-add-new-controllers-0x78-0x79.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/megaraid_sas-add-new-controllers-0x78-0x79.patch)
@@ -0,0 +1,192 @@
+From 6610a6b354d6c3377a1e79cd1d760ffe4358245c Mon Sep 17 00:00:00 2001
+From: Yang, Bo <Bo.Yang at lsi.com>
+Date: Sun, 10 Aug 2008 12:42:38 -0700
+Subject: [PATCH] [SCSI] megaraid_sas: add new controllers (0x78 0x79)
+
+Add the new controllers (0x78 0x79) support to the driver. Those
+controllers are LSI's next generation (gen2) SAS controllers.
+
+[akpm at linux-foundation.org: coding-style fixes]
+[akpm at linux-foundation.org: parenthesise a macro]
+Signed-off-by: Bo Yang <bo.yang at lsi.com>
+Signed-off-by: Andrew Morton <akpm at linux-foundation.org>
+Signed-off-by: James Bottomley <James.Bottomley at HansenPartnership.com>
+---
+ drivers/scsi/megaraid/megaraid_sas.c | 110 +++++++++++++++++++++++++++++++++-
+ drivers/scsi/megaraid/megaraid_sas.h | 4 +
+ 2 files changed, 112 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
+index e880cd4..870dc1c 100644
+--- a/drivers/scsi/megaraid/megaraid_sas.c
++++ b/drivers/scsi/megaraid/megaraid_sas.c
+@@ -10,7 +10,7 @@
+ * 2 of the License, or (at your option) any later version.
+ *
+ * FILE : megaraid_sas.c
+- * Version : v00.00.03.20-rc1
++ * Version : v00.00.04.01-rc1
+ *
+ * Authors:
+ * (email-id : megaraidlinux at lsi.com)
+@@ -71,6 +71,10 @@ static struct pci_device_id megasas_pci_table[] = {
+ /* ppc IOP */
+ {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
+ /* ppc IOP */
++ {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
++ /* gen2*/
++ {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
++ /* gen2*/
+ {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
+ /* xscale IOP, vega */
+ {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
+@@ -324,6 +328,99 @@ static struct megasas_instance_template megasas_instance_template_ppc = {
+ };
+
+ /**
++* The following functions are defined for gen2 (deviceid : 0x78 0x79)
++* controllers
++*/
++
++/**
++ * megasas_enable_intr_gen2 - Enables interrupts
++ * @regs: MFI register set
++ */
++static inline void
++megasas_enable_intr_gen2(struct megasas_register_set __iomem *regs)
++{
++ writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
++
++ /* write ~0x00000005 (4 & 1) to the intr mask*/
++ writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
++
++ /* Dummy readl to force pci flush */
++ readl(®s->outbound_intr_mask);
++}
++
++/**
++ * megasas_disable_intr_gen2 - Disables interrupt
++ * @regs: MFI register set
++ */
++static inline void
++megasas_disable_intr_gen2(struct megasas_register_set __iomem *regs)
++{
++ u32 mask = 0xFFFFFFFF;
++ writel(mask, ®s->outbound_intr_mask);
++ /* Dummy readl to force pci flush */
++ readl(®s->outbound_intr_mask);
++}
++
++/**
++ * megasas_read_fw_status_reg_gen2 - returns the current FW status value
++ * @regs: MFI register set
++ */
++static u32
++megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
++{
++ return readl(&(regs)->outbound_scratch_pad);
++}
++
++/**
++ * megasas_clear_interrupt_gen2 - Check & clear interrupt
++ * @regs: MFI register set
++ */
++static int
++megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
++{
++ u32 status;
++ /*
++ * Check if it is our interrupt
++ */
++ status = readl(®s->outbound_intr_status);
++
++ if (!(status & MFI_GEN2_ENABLE_INTERRUPT_MASK))
++ return 1;
++
++ /*
++ * Clear the interrupt by writing back the same value
++ */
++ writel(status, ®s->outbound_doorbell_clear);
++
++ /* Dummy readl to force pci flush */
++ readl(®s->outbound_intr_status);
++
++ return 0;
++}
++/**
++ * megasas_fire_cmd_gen2 - Sends command to the FW
++ * @frame_phys_addr : Physical address of cmd
++ * @frame_count : Number of frames for the command
++ * @regs : MFI register set
++ */
++static inline void
++megasas_fire_cmd_gen2(dma_addr_t frame_phys_addr, u32 frame_count,
++ struct megasas_register_set __iomem *regs)
++{
++ writel((frame_phys_addr | (frame_count<<1))|1,
++ &(regs)->inbound_queue_port);
++}
++
++static struct megasas_instance_template megasas_instance_template_gen2 = {
++
++ .fire_cmd = megasas_fire_cmd_gen2,
++ .enable_intr = megasas_enable_intr_gen2,
++ .disable_intr = megasas_disable_intr_gen2,
++ .clear_intr = megasas_clear_intr_gen2,
++ .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
++};
++
++/**
+ * This is the end of set of functions & definitions
+ * specific to ppc (deviceid : 0x60) controllers
+ */
+@@ -1982,7 +2079,12 @@ static int megasas_init_mfi(struct megasas_instance *instance)
+ /*
+ * Map the message registers
+ */
+- instance->base_addr = pci_resource_start(instance->pdev, 0);
++ if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
++ (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0079GEN2)) {
++ instance->base_addr = pci_resource_start(instance->pdev, 1);
++ } else {
++ instance->base_addr = pci_resource_start(instance->pdev, 0);
++ }
+
+ if (pci_request_regions(instance->pdev, "megasas: LSI")) {
+ printk(KERN_DEBUG "megasas: IO memory region busy!\n");
+@@ -2004,6 +2106,10 @@ static int megasas_init_mfi(struct megasas_instance *instance)
+ case PCI_DEVICE_ID_LSI_SAS1078DE:
+ instance->instancet = &megasas_instance_template_ppc;
+ break;
++ case PCI_DEVICE_ID_LSI_SAS1078GEN2:
++ case PCI_DEVICE_ID_LSI_SAS0079GEN2:
++ instance->instancet = &megasas_instance_template_gen2;
++ break;
+ case PCI_DEVICE_ID_LSI_SAS1064R:
+ case PCI_DEVICE_ID_DELL_PERC5:
+ default:
+diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h
+index b0c41e6..7072ff2 100644
+--- a/drivers/scsi/megaraid/megaraid_sas.h
++++ b/drivers/scsi/megaraid/megaraid_sas.h
+@@ -28,6 +28,8 @@
+ #define PCI_DEVICE_ID_LSI_SAS1078R 0x0060
+ #define PCI_DEVICE_ID_LSI_SAS1078DE 0x007C
+ #define PCI_DEVICE_ID_LSI_VERDE_ZCR 0x0413
++#define PCI_DEVICE_ID_LSI_SAS1078GEN2 0x0078
++#define PCI_DEVICE_ID_LSI_SAS0079GEN2 0x0079
+
+ /*
+ * =====================================
+@@ -580,6 +582,8 @@ struct megasas_ctrl_info {
+ #define MEGASAS_COMPLETION_TIMER_INTERVAL (HZ/10)
+
+ #define MFI_REPLY_1078_MESSAGE_INTERRUPT 0x80000000
++#define MFI_REPLY_GEN2_MESSAGE_INTERRUPT 0x00000001
++#define MFI_GEN2_ENABLE_INTERRUPT_MASK (0x00000001 | 0x00000004)
+
+ /*
+ * register set for both 1068 and 1078 controllers
+--
+1.6.6
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0080-Endless-loop-in-__sk_stream_wait_memory.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0080-Endless-loop-in-__sk_stream_wait_memory.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0080-Endless-loop-in-__sk_stream_wait_memory.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0080-Endless-loop-in-__sk_stream_wait_memory.patch)
@@ -0,0 +1,112 @@
+From 405d7028fa6af97c62302143d1369114e13cd47a Mon Sep 17 00:00:00 2001
+From: Denis V. Lunev <den at openvz.org>
+Date: Mon, 30 Jun 2008 11:05:14 +0400
+Subject: [PATCH] Endless loop in __sk_stream_wait_memory.
+
+[UBC]: Endless loop in __sk_stream_wait_memory.
+
+The loop in __sk_stream_wait_memory when tcp_sendmsg asks to wait for
+TCPSNDBUF space is endless when the timeout is not specified. The only way
+out is to queue a signal for that process.
+
+Lets return a status flag from ub_sock_snd_queue_add that UB space is
+available. This is enough to make a correct decision to leave the cycle.
+
+Signed-off-by: Denis V. Lunev <den at parallels.com>
+Signed-off-by: Pavel Emelyanov <xemul at sw.ru>
+Signed-off-by: Pavel Emelyanov <xemul at openvz.org>
+---
+ include/bc/net.h | 10 +++++-----
+ kernel/bc/net.c | 7 ++++---
+ net/core/stream.c | 4 ++--
+ 3 files changed, 11 insertions(+), 10 deletions(-)
+
+diff --git a/include/bc/net.h b/include/bc/net.h
+index cf323fb..31e532c 100644
+--- a/include/bc/net.h
++++ b/include/bc/net.h
+@@ -50,7 +50,7 @@ UB_DECLARE_VOID_FUNC(ub_sock_uncharge(struct sock *sk))
+ /* management of queue for send space */
+ UB_DECLARE_FUNC(long, ub_sock_wait_for_space(struct sock *sk, long timeo,
+ unsigned long size))
+-UB_DECLARE_VOID_FUNC(ub_sock_snd_queue_add(struct sock *sk, int resource,
++UB_DECLARE_FUNC(int, ub_sock_snd_queue_add(struct sock *sk, int resource,
+ unsigned long size))
+ UB_DECLARE_VOID_FUNC(ub_sock_sndqueuedel(struct sock *sk))
+
+@@ -103,14 +103,14 @@ static inline void ub_sock_retwres_tcp(struct sock *sk, unsigned long size,
+ ub_sock_ret_wreserv(sk, UB_TCPSNDBUF, size, ressize);
+ }
+
+-static inline void ub_sock_sndqueueadd_other(struct sock *sk, unsigned long sz)
++static inline int ub_sock_sndqueueadd_other(struct sock *sk, unsigned long sz)
+ {
+- ub_sock_snd_queue_add(sk, UB_OTHERSOCKBUF, sz);
++ return ub_sock_snd_queue_add(sk, UB_OTHERSOCKBUF, sz);
+ }
+
+-static inline void ub_sock_sndqueueadd_tcp(struct sock *sk, unsigned long sz)
++static inline int ub_sock_sndqueueadd_tcp(struct sock *sk, unsigned long sz)
+ {
+- ub_sock_snd_queue_add(sk, UB_TCPSNDBUF, sz);
++ return ub_sock_snd_queue_add(sk, UB_TCPSNDBUF, sz);
+ }
+
+ static inline int ub_tcpsndbuf_charge(struct sock *sk,
+diff --git a/kernel/bc/net.c b/kernel/bc/net.c
+index 53bbd8f..e1ffc63 100644
+--- a/kernel/bc/net.c
++++ b/kernel/bc/net.c
+@@ -226,7 +226,7 @@ static void ub_tcp_snd_wakeup(struct user_beancounter *ub)
+ }
+ }
+
+-void ub_sock_snd_queue_add(struct sock *sk, int res, unsigned long size)
++int ub_sock_snd_queue_add(struct sock *sk, int res, unsigned long size)
+ {
+ unsigned long flags;
+ struct sock_beancounter *skbc;
+@@ -234,7 +234,7 @@ void ub_sock_snd_queue_add(struct sock *sk, int res, unsigned long size)
+ unsigned long added_reserv;
+
+ if (!sock_has_ubc(sk))
+- return;
++ return 0;
+
+ skbc = sock_bc(sk);
+ ub = top_beancounter(skbc->ub);
+@@ -253,7 +253,7 @@ void ub_sock_snd_queue_add(struct sock *sk, int res, unsigned long size)
+ spin_unlock_irqrestore(&ub->ub_lock, flags);
+ if (added_reserv)
+ charge_beancounter_notop(skbc->ub, res, added_reserv);
+- return;
++ return 0;
+ }
+
+ ub_debug(UBD_NET_SLEEP, "Adding sk to queue\n");
+@@ -278,6 +278,7 @@ void ub_sock_snd_queue_add(struct sock *sk, int res, unsigned long size)
+ }
+ out:
+ spin_unlock_irqrestore(&ub->ub_lock, flags);
++ return -ENOMEM;
+ }
+
+ EXPORT_SYMBOL(ub_sock_snd_queue_add);
+diff --git a/net/core/stream.c b/net/core/stream.c
+index 5c39418..cd7c99b 100644
+--- a/net/core/stream.c
++++ b/net/core/stream.c
+@@ -139,8 +139,8 @@ int __sk_stream_wait_memory(struct sock *sk, long *timeo_p,
+ if (amount == 0) {
+ if (sk_stream_memory_free(sk) && !vm_wait)
+ break;
+- } else
+- ub_sock_sndqueueadd_tcp(sk, amount);
++ } else if (!ub_sock_sndqueueadd_tcp(sk, amount))
++ break;
+
+ set_bit(SOCK_NOSPACE, &sk->sk_socket->flags);
+ sk->sk_write_pending++;
+--
+1.6.3.3
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0087-cpt-dump-inode-content-for-shm_file_operations.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0087-cpt-dump-inode-content-for-shm_file_operations.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0087-cpt-dump-inode-content-for-shm_file_operations.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0087-cpt-dump-inode-content-for-shm_file_operations.patch)
@@ -0,0 +1,56 @@
+From 1f7db8ea4a3e4be07047223a0c53fb501346aea7 Mon Sep 17 00:00:00 2001
+From: Vitaily Gusev <vgusev at openvz.org>
+Date: Mon, 12 Oct 2009 18:53:30 +0400
+Subject: [PATCH 87/90] cpt: dump inode content for shm_file_operations
+
+If file->f_op == shm_file_operations then cpt code doesn't
+dump inode content, and dump only for f_op == shmem_file_operations.
+
+Bug http://bugzilla.openvz.org/show_bug.cgi?id=1342
+
+Signed-off-by: Vitaliy Gusev <vgusev at openvz.org>
+Signed-off-by: Pavel Emelyanov <xemul at openvz.org>
+---
+ kernel/cpt/cpt_files.c | 22 +++++++++++++---------
+ 1 files changed, 13 insertions(+), 9 deletions(-)
+
+diff --git a/kernel/cpt/cpt_files.c b/kernel/cpt/cpt_files.c
+index dd05814..866ca53 100644
+--- a/kernel/cpt/cpt_files.c
++++ b/kernel/cpt/cpt_files.c
+@@ -620,19 +620,23 @@ static int dump_content_regular(struct file *file, struct cpt_context *ctx)
+ return -EINVAL;
+
+ do_read = file->f_op->read;
+- if (file->f_op == &shm_file_operations) {
+- struct shm_file_data *sfd = file->private_data;
+
+- cpt_dump_content_sysvshm(sfd->file, ctx);
++ if (file->f_op == &shm_file_operations ||
++ file->f_op == &shmem_file_operations) {
++ struct file *shm_file = file;
+
+- return 0;
+- }
+- if (file->f_op == &shmem_file_operations) {
+- do_read = file->f_dentry->d_inode->i_fop->read;
+- cpt_dump_content_sysvshm(file, ctx);
++ /* shmget uses shm ops */
++ if (file->f_op == &shm_file_operations) {
++ struct shm_file_data *sfd = file->private_data;
++ shm_file = sfd->file;
++ }
++
++ cpt_dump_content_sysvshm(shm_file, ctx);
++
++ do_read = shm_file->f_dentry->d_inode->i_fop->read;
+ if (!do_read) {
+ wprintk_ctx("TMPFS is not configured?\n");
+- return dump_content_shm(file, ctx);
++ return dump_content_shm(shm_file, ctx);
+ }
+ }
+
+--
+1.6.5.7
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0088-cfq-unlink-queues-at-bc-destroy.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0088-cfq-unlink-queues-at-bc-destroy.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0088-cfq-unlink-queues-at-bc-destroy.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0088-cfq-unlink-queues-at-bc-destroy.patch)
@@ -0,0 +1,93 @@
+From 1a6d795abc130bd356b10abbd91ef63ef23f01c4 Mon Sep 17 00:00:00 2001
+From: Konstantin Khlebnikov <khlebnikov at openvz.org>
+Date: Thu, 24 Dec 2009 20:58:15 +0300
+Subject: [PATCH 88/90] cfq: unlink queues at bc destroy
+
+Unlink cfq-queues from cfq-io-contexts at cfq-bc-data destroy and
+always revalidate cached cfq-queues from cfq-io-context.
+
+Should fix pdflush oops in cfq_set_request after container stop.
+
+http://bugzilla.openvz.org/show_bug.cgi?id=1240
+
+Signed-off-by: Konstantin Khlebnikov <khlebnikov at openvz.org>
+Signed-off-by: Pavel Emelyanov <xemul at openvz.org>
+---
+ block/cfq-iosched.c | 20 +++++---------------
+ kernel/bc/io_prio.c | 11 +++++++++++
+ 2 files changed, 16 insertions(+), 15 deletions(-)
+
+diff --git a/block/cfq-iosched.c b/block/cfq-iosched.c
+index b25b442..3a9992a 100644
+--- a/block/cfq-iosched.c
++++ b/block/cfq-iosched.c
+@@ -2014,32 +2014,22 @@ cfq_set_request(struct request_queue *q, struct request *rq, gfp_t gfp_mask)
+ struct cfq_queue *cfqq;
+ unsigned long flags;
+ struct ub_iopriv *iopriv;
+- struct cfq_bc_data *cfq_bc = NULL;
+
+ might_sleep_if(gfp_mask & __GFP_WAIT);
+
+ cic = cfq_get_io_context(cfqd, gfp_mask);
+ iopriv = cfqq_ub_iopriv(cfqd, is_sync);
+- if (!is_sync)
+- cfq_bc = bc_findcreate_cfq_bc(iopriv, cfqd, gfp_mask);
+
+ spin_lock_irqsave(q->queue_lock, flags);
+
+- if (!cic || (!is_sync && cfq_bc == NULL))
++ if (!cic)
+ goto queue_fail;
+
+ cfqq = cic_to_cfqq(cic, is_sync);
+- if (!cfqq) {
+- cfqq = cfq_get_queue(cfqd, is_sync, cic->ioc, gfp_mask);
+-
+- if (!cfqq)
+- goto queue_fail;
+-
+- cic_set_cfqq(cic, cfqq, is_sync);
+- }
+-
+- if (!is_sync && cfqq->cfq_bc != cfq_bc) {
+- cfq_put_queue(cfqq);
++ if (!cfqq || cfqq->cfq_bc->ub_iopriv != iopriv) {
++ if (cfqq)
++ cfq_put_queue(cfqq);
++ cic_set_cfqq(cic, NULL, is_sync);
+ cfqq = cfq_get_queue(cfqd, is_sync, cic->ioc, gfp_mask);
+ cic_set_cfqq(cic, cfqq, is_sync);
+ if (!cfqq)
+diff --git a/kernel/bc/io_prio.c b/kernel/bc/io_prio.c
+index 5bb22e5..4a1ee2e 100644
+--- a/kernel/bc/io_prio.c
++++ b/kernel/bc/io_prio.c
+@@ -88,6 +88,7 @@ static void inline bc_cfq_bc_check_empty(struct cfq_bc_data *cfq_bc)
+
+ static void bc_release_cfq_bc(struct cfq_bc_data *cfq_bc)
+ {
++ struct cfq_io_context *cic;
+ struct cfq_data *cfqd;
+ elevator_t *eq;
+ int i;
+@@ -109,6 +110,16 @@ static void bc_release_cfq_bc(struct cfq_bc_data *cfq_bc)
+ eq->ops->put_queue(cfq_bc->async_idle_cfqq);
+ cfq_bc->async_idle_cfqq = NULL;
+ }
++ list_for_each_entry(cic, &cfqd->cic_list, queue_list) {
++ if (cic->cfqq[0] && cic->cfqq[0]->cfq_bc == cfq_bc) {
++ eq->ops->put_queue(cic->cfqq[0]);
++ cic->cfqq[0] = NULL;
++ }
++ if (cic->cfqq[1] && cic->cfqq[1]->cfq_bc == cfq_bc) {
++ eq->ops->put_queue(cic->cfqq[1]);
++ cic->cfqq[1] = NULL;
++ }
++ }
+ /*
+ * Note: this cfq_bc is already not in active list,
+ * but can be still pointed from cfqd as active.
+--
+1.6.5.7
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0089-inotify-unblock-umounting.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0089-inotify-unblock-umounting.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/openvz/0089-inotify-unblock-umounting.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/openvz/0089-inotify-unblock-umounting.patch)
@@ -0,0 +1,125 @@
+From ddbec374c4beae6643db9297c2968f6dfaf43635 Mon Sep 17 00:00:00 2001
+From: Konstantin Khlebnikov <khlebnikov at openvz.org>
+Date: Fri, 25 Dec 2009 21:39:51 +0300
+Subject: [PATCH 89/90] inotify: unblock umounting
+
+Replace getting vfsmount with pinning and unmounts watch
+at vfsmount umount time.
+
+Signed-off-by: Konstantin Khlebnikov <khlebnikov at openvz.org>
+Signed-off-by: Pavel Emelyanov <xemul at openvz.org>
+---
+ fs/inotify.c | 22 ++++++++++++++++++++--
+ fs/namespace.c | 2 ++
+ include/linux/inotify.h | 5 +++++
+ 3 files changed, 27 insertions(+), 2 deletions(-)
+
+diff --git a/fs/inotify.c b/fs/inotify.c
+index b2671b6..007734f 100644
+--- a/fs/inotify.c
++++ b/fs/inotify.c
+@@ -106,6 +106,7 @@ void put_inotify_watch(struct inotify_watch *watch)
+ struct inotify_handle *ih = watch->ih;
+
+ iput(watch->inode);
++ mnt_unpin(watch->path.mnt);
+ path_put(&watch->path);
+ watch->path.dentry = NULL;
+ watch->path.mnt = NULL;
+@@ -340,7 +341,7 @@ EXPORT_SYMBOL_GPL(inotify_get_cookie);
+ * of inodes, and with iprune_mutex held, keeping shrink_icache_memory() at bay.
+ * We temporarily drop inode_lock, however, and CAN block.
+ */
+-void inotify_unmount_inodes(struct list_head *list)
++void inotify_unmount_inodes_mnt(struct list_head *list, struct vfsmount *mnt)
+ {
+ struct inode *inode, *next_i, *need_iput = NULL;
+
+@@ -398,6 +399,10 @@ void inotify_unmount_inodes(struct list_head *list)
+ watches = &inode->inotify_watches;
+ list_for_each_entry_safe(watch, next_w, watches, i_list) {
+ struct inotify_handle *ih= watch->ih;
++
++ if (mnt && mnt != watch->path.mnt)
++ continue;
++
+ get_inotify_watch(watch);
+ mutex_lock(&ih->mutex);
+ ih->in_ops->handle_event(watch, watch->wd, IN_UNMOUNT, 0,
+@@ -412,8 +417,20 @@ void inotify_unmount_inodes(struct list_head *list)
+ spin_lock(&inode_lock);
+ }
+ }
++
++void inotify_unmount_inodes(struct list_head *list)
++{
++ inotify_unmount_inodes_mnt(list, NULL);
++}
+ EXPORT_SYMBOL_GPL(inotify_unmount_inodes);
+
++void inotify_unmount_mnt(struct vfsmount *mnt)
++{
++ spin_lock(&inode_lock);
++ inotify_unmount_inodes_mnt(&mnt->mnt_sb->s_inodes, mnt);
++ spin_unlock(&inode_lock);
++}
++
+ /**
+ * inotify_inode_is_dead - an inode has been deleted, cleanup any watches
+ * @inode: inode that is about to be removed
+@@ -641,7 +658,8 @@ s32 __inotify_add_watch(struct inotify_handle *ih, struct inotify_watch *watch,
+ * official. We hold a reference to nameidata, which makes this safe.
+ */
+ if (path) {
+- path_get(path);
++ mnt_pin(path->mnt);
++ dget(path->dentry);
+ watch->path = *path;
+ }
+ watch->inode = igrab(inode);
+diff --git a/fs/namespace.c b/fs/namespace.c
+index 6873efd..57308ab 100644
+--- a/fs/namespace.c
++++ b/fs/namespace.c
+@@ -27,6 +27,7 @@
+ #include <linux/ramfs.h>
+ #include <linux/log2.h>
+ #include <linux/idr.h>
++#include <linux/inotify.h>
+ #include <asm/uaccess.h>
+ #include <asm/unistd.h>
+ #include "pnode.h"
+@@ -655,6 +656,7 @@ repeat:
+ spin_unlock(&vfsmount_lock);
+ acct_auto_close_mnt(mnt);
+ security_sb_umount_close(mnt);
++ inotify_unmount_mnt(mnt);
+ goto repeat;
+ }
+ }
+diff --git a/include/linux/inotify.h b/include/linux/inotify.h
+index a935bb3..a2a3cae 100644
+--- a/include/linux/inotify.h
++++ b/include/linux/inotify.h
+@@ -108,6 +108,7 @@ extern void inotify_inode_queue_event(struct inode *, __u32, __u32,
+ extern void inotify_dentry_parent_queue_event(struct dentry *, __u32, __u32,
+ const char *);
+ extern void inotify_unmount_inodes(struct list_head *);
++extern void inotify_unmount_mnt(struct vfsmount *);
+ extern void inotify_inode_is_dead(struct inode *);
+ extern u32 inotify_get_cookie(void);
+
+@@ -221,6 +222,10 @@ static inline void inotify_unmount_inodes(struct list_head *list)
+ {
+ }
+
++static inline void inotify_unmount_mnt(struct vfsmount *)
++{
++}
++
+ static inline void inotify_inode_is_dead(struct inode *inode)
+ {
+ }
+--
+1.6.5.7
+
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/xen/add-x86-hyper-vendor-defines.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/xen/add-x86-hyper-vendor-defines.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/xen/add-x86-hyper-vendor-defines.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/xen/add-x86-hyper-vendor-defines.patch)
@@ -0,0 +1,12 @@
+--- build_i386_xen_686/include/asm-x86/mach-xen/asm/processor.h~ 2010-03-08 10:34:56.000000000 -0700
++++ build_i386_xen_686/include/asm-x86/mach-xen/asm/processor.h 2010-03-08 21:05:42.000000000 -0700
+@@ -123,6 +123,9 @@ struct cpuinfo_x86 {
+
+ #define X86_VENDOR_UNKNOWN 0xff
+
++#define X86_HYPER_VENDOR_NONE 0
++#define X86_HYPER_VENDOR_VMWARE 1
++
+ /*
+ * capabilities of CPUs
+ */
Copied: dists/lenny-security/linux-2.6/debian/patches/features/all/xen/xen-fix-msi-hypercall.patch (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/xen/xen-fix-msi-hypercall.patch)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/features/all/xen/xen-fix-msi-hypercall.patch Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/features/all/xen/xen-fix-msi-hypercall.patch)
@@ -0,0 +1,165 @@
+diff -u -r build_i386_xen_686/drivers/pci/msi-xen.c build_i386_xen_686-fix/drivers/pci/msi-xen.c
+--- build_i386_xen_686/drivers/pci/msi-xen.c 2010-02-25 12:23:43.000000000 +0000
++++ build_i386_xen_686-fix/drivers/pci/msi-xen.c 2010-02-25 13:08:16.000000000 +0000
+@@ -238,11 +238,27 @@
+ return 0;
+ }
+
++static u64 find_table_base(struct pci_dev *dev, int pos)
++{
++ u8 bar;
++ u32 reg;
++ unsigned long flags;
++
++ pci_read_config_dword(dev, msix_table_offset_reg(pos), ®);
++ bar = reg & PCI_MSIX_FLAGS_BIRMASK;
++
++ flags = pci_resource_flags(dev, bar);
++ if (flags & (IORESOURCE_DISABLED | IORESOURCE_UNSET | IORESOURCE_BUSY))
++ return 0;
++
++ return pci_resource_start(dev, bar);
++}
++
+ /*
+ * Protected by msi_lock
+ */
+ static int msi_map_pirq_to_vector(struct pci_dev *dev, int pirq,
+- int entry_nr, int msi)
++ int entry_nr, u64 table_base)
+ {
+ struct physdev_map_pirq map_irq;
+ int rc;
+@@ -254,10 +270,10 @@
+ map_irq.type = MAP_PIRQ_TYPE_MSI;
+ map_irq.index = -1;
+ map_irq.pirq = pirq;
+- map_irq.msi_info.bus = dev->bus->number;
+- map_irq.msi_info.devfn = dev->devfn;
+- map_irq.msi_info.entry_nr = entry_nr;
+- map_irq.msi_info.msi = msi;
++ map_irq.bus = dev->bus->number;
++ map_irq.devfn = dev->devfn;
++ map_irq.entry_nr = entry_nr;
++ map_irq.table_base = table_base;
+
+ if ((rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq)))
+ printk(KERN_WARNING "map irq failed\n");
+@@ -268,9 +284,9 @@
+ return map_irq.pirq;
+ }
+
+-static int msi_map_vector(struct pci_dev *dev, int entry_nr, int msi)
++static int msi_map_vector(struct pci_dev *dev, int entry_nr, u64 table_base)
+ {
+- return msi_map_pirq_to_vector(dev, -1, entry_nr, msi);
++ return msi_map_pirq_to_vector(dev, -1, entry_nr, table_base);
+ }
+
+ static void pci_intx_for_msi(struct pci_dev *dev, int enable)
+@@ -286,7 +302,7 @@
+ if (!dev->msi_enabled)
+ return;
+
+- pirq = msi_map_pirq_to_vector(dev, dev->irq, 0, 1);
++ pirq = msi_map_pirq_to_vector(dev, dev->irq, 0, 0);
+ if (pirq < 0)
+ return;
+
+@@ -296,19 +312,29 @@
+
+ static void __pci_restore_msix_state(struct pci_dev *dev)
+ {
++ int pos;
+ unsigned long flags;
++ u64 table_base;
+ struct msi_dev_list *msi_dev_entry;
+ struct msi_pirq_entry *pirq_entry, *tmp;
+
++ pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
++ if (pos <= 0)
++ return;
++
+ if (!dev->msix_enabled)
+ return;
+
+ msi_dev_entry = get_msi_dev_pirq_list(dev);
++ table_base = find_table_base(dev, pos);
++ if (!table_base)
++ return;
+
+ spin_lock_irqsave(&msi_dev_entry->pirq_list_lock, flags);
+ list_for_each_entry_safe(pirq_entry, tmp,
+- &msi_dev_entry->pirq_list_head, list)
+- msi_map_pirq_to_vector(dev, pirq_entry->pirq, pirq_entry->entry_nr, 0);
++ &msi_dev_entry->pirq_list_head, list)
++ msi_map_pirq_to_vector(dev, pirq_entry->pirq,
++ pirq_entry->entry_nr, table_base);
+ spin_unlock_irqrestore(&msi_dev_entry->pirq_list_lock, flags);
+
+ pci_intx_for_msi(dev, 0);
+@@ -338,10 +364,10 @@
+
+ msi_set_enable(dev, 0); /* Ensure msi is disabled as I set it up */
+
+- pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
++ pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
+ pci_read_config_word(dev, msi_control_reg(pos), &control);
+
+- pirq = msi_map_vector(dev, 0, 1);
++ pirq = msi_map_vector(dev, 0, 0);
+ if (pirq < 0)
+ return -EBUSY;
+
+@@ -367,7 +393,8 @@
+ static int msix_capability_init(struct pci_dev *dev,
+ struct msix_entry *entries, int nvec)
+ {
+- int pirq, i, j, mapped;
++ u64 table_base;
++ int pirq, i, j, mapped, pos;
+ struct msi_dev_list *msi_dev_entry = get_msi_dev_pirq_list(dev);
+ struct msi_pirq_entry *pirq_entry;
+
+@@ -376,6 +403,11 @@
+
+ msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */
+
++ pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
++ table_base = find_table_base(dev, pos);
++ if (!table_base)
++ return -ENODEV;
++
+ /* MSI-X Table Initialization */
+ for (i = 0; i < nvec; i++) {
+ mapped = 0;
+@@ -392,7 +424,7 @@
+ }
+ if (mapped)
+ continue;
+- pirq = msi_map_vector(dev, entries[i].entry, 0);
++ pirq = msi_map_vector(dev, entries[i].entry, table_base);
+ if (pirq < 0)
+ break;
+ attach_pirq_entry(pirq, entries[i].entry, msi_dev_entry);
+diff -u -r build_i386_xen_686/include/xen/interface/physdev.h build_i386_xen_686-fix/include/xen/interface/physdev.h
+--- build_i386_xen_686/include/xen/interface/physdev.h 2010-02-25 12:23:43.000000000 +0000
++++ build_i386_xen_686-fix/include/xen/interface/physdev.h 2010-02-25 12:38:42.000000000 +0000
+@@ -136,10 +136,13 @@
+ /* IN or OUT */
+ int pirq;
+ /* IN */
+- struct {
+- int bus, devfn, entry_nr;
+- int msi; /* 0 - MSIX 1 - MSI */
+- } msi_info;
++ int bus;
++ /* IN */
++ int devfn;
++ /* IN */
++ int entry_nr;
++ /* IN */
++ uint64_t table_base;
+ };
+ typedef struct physdev_map_pirq physdev_map_pirq_t;
+ DEFINE_XEN_GUEST_HANDLE(physdev_map_pirq_t);
Copied: dists/lenny-security/linux-2.6/debian/patches/series/22 (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/series/22)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/series/22 Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/series/22)
@@ -0,0 +1,32 @@
++ bugfix/all/via-velocity-move-residual-free-rx-descriptors-count.patch
++ bugfix/all/via-velocity-give-rx-descriptors-later.patch
++ features/all/atl1c-add.patch
++ features/all/atl1c-backport.patch
++ features/all/atl1c-kbuild.patch
++ bugfix/all/dmfe-tulip-Let-dmfe-handle-DM910x-except-SPARC-onboard.patch
++ bugfix/all/x86-Increase-MIN_GAP-to-include-randomized-stack.patch
++ features/all/bnx2-Add-PCI-ID-for-5716.patch
++ features/all/bnx2-Add-PCI-ID-for-5716S.patch
++ bugfix/all/bnx2-Allow-phy-reset-to-be-skipped-during-chip-reset.patch
++ bugfix/all/bnx2-Prevent-ethtool-s-from-crashing-when-device-is-down.patch
++ bugfix/all/bnx2-Fix-panic-in-bnx2_poll_work.patch
++ bugfix/all/fix-braindamage-in-audit_tree.c-untag_chunk.patch
++ bugfix/all/fix-more-leaks-in-audit_tree.c-tag_chunk.patch
++ bugfix/all/ALSA-cs4232-fix-crash-during-chip-PNP-detection.patch
++ bugfix/all/matroxfb-fix-problems-with-display-stability.patch
++ bugfix/all/megaraid_sas-add-readl-to-force-PCI-posting-flush.patch
++ bugfix/all/megaraid_sas-add-the-shutdown-DCMD-cmd.patch
++ features/all/megaraid_sas-add-new-controllers-0x78-0x79.patch
++ bugfix/all/saa7134-fix-deadlock.patch
++ features/all/add-be2net.patch
++ bugfix/x86/fix-vmi-clocksource.patch
++ bugfix/all/yealink-reliably-kill-urbs.patch
++ bugfix/all/ipv6-fix-pending-dad.patch
++ features/all/ata-piix-add-intel-pci-ids.patch
++ bugfix/all/qla2xxx-disable-broken-msi.patch
++ bugfix/x86/add-a-synthetic-TS_RELIABLE-feature-bit.patch
++ bugfix/x86/add-X86_FEATURE_HYPERVISOR-feature-bit.patch
++ bugfix/x86/vmware-look-for-DMI-string-in-product-serial-key.patch
++ bugfix/x86/hypervisor-detection-and-get-tsc_freq-from-hypervisor.patch
++ bugfix/x86/add-a-synthetic-TSC_RELIABLE-feature-bit.patch
++ bugfix/x86/skip-verification-by-the-watchdog-for-TSC-clocksource.patch
Copied: dists/lenny-security/linux-2.6/debian/patches/series/22-extra (from r15629, releases/linux-2.6/2.6.26-22/debian/patches/series/22-extra)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/series/22-extra Fri May 7 16:45:16 2010 (r15638, copy of r15629, releases/linux-2.6/2.6.26-22/debian/patches/series/22-extra)
@@ -0,0 +1,6 @@
++ features/all/openvz/0087-cpt-dump-inode-content-for-shm_file_operations.patch featureset=openvz
++ features/all/openvz/0088-cfq-unlink-queues-at-bc-destroy.patch featureset=openvz
++ features/all/openvz/0089-inotify-unblock-umounting.patch featureset=openvz
++ features/all/xen/xen-fix-msi-hypercall.patch featureset=xen
++ features/all/openvz/0080-Endless-loop-in-__sk_stream_wait_memory.patch featureset=openvz
++ features/all/xen/add-x86-hyper-vendor-defines.patch featureset=xen
Copied: dists/lenny-security/linux-2.6/debian/patches/series/22lenny1 (from r15626, dists/lenny-security/linux-2.6/debian/patches/series/21lenny5)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/lenny-security/linux-2.6/debian/patches/series/22lenny1 Fri May 7 16:45:16 2010 (r15638, copy of r15626, dists/lenny-security/linux-2.6/debian/patches/series/21lenny5)
@@ -0,0 +1,14 @@
++ bugfix/all/usbfs-only-copy-received-data.patch
++ bugfix/all/gfs2-skip-check-for-mandatory-locks-when-unlocking.patch
++ bugfix/x86/kvm-x86-disable-paravirt-mmu-reporting.patch
++ bugfix/all/r8169-Fix-receive-buffer-length.patch
++ bugfix/all/r8169-offical-fix-for-cve-2009-4537-overlength-frame-dmas.patch
++ bugfix/all/r8169-clean-up-my-printk-uglyness.patch
++ bugfix/all/bluetooth-fix-potential-bad-memory-access-with-sysfs-files.patch
++ bugfix/all/dvb-core-fix-dos-in-ule-decapsulation.patch
++ bugfix/all/nfs-fix-an-oops-when-truncating-a-file.patch
++ bugfix/all/fix-LOOKUP_FOLLOW-on-automount-symlinks.patch
++ bugfix/all/tty-release_one_tty-forgets-to-put-pids.patch
++ bugfix/all/tipc-fix-oops-on-send-prior-to-entering-networked-mode.patch
++ bugfix/all/sctp-fix-skb_over_panic-resulting-from-multiple-invalid-parameter-errors.patch
++ bugfix/sparc/fix-sun4u-execute-bit-check-in-TSB-I-ITLB-load.patch
Modified: dists/lenny-security/linux-2.6/debian/templates/temp.image.plain/postinst
==============================================================================
--- dists/lenny-security/linux-2.6/debian/templates/temp.image.plain/postinst Fri May 7 15:48:22 2010 (r15637)
+++ dists/lenny-security/linux-2.6/debian/templates/temp.image.plain/postinst Fri May 7 16:45:16 2010 (r15638)
@@ -140,8 +140,8 @@
$clobber_modules = "Yes" if /clobber_modules\s*=\s*(yes|true|1)\s*$/ig;
$do_boot_enable = "Yes" if /do_boot_enable\s*=\s*(yes|true|1)\s*$/ig;
$do_bootfloppy = "Yes" if /do_bootfloppy\s*=\s*(yes|true|1)\s*$/ig;
- $do_bootloader = "Yes" if /do_bootloader\s*=\s*(yes|true|1)\s*$/ig;
- $explicit_do_loader = "YES" if /do_bootloader\s*=\s*(yes|true|1)\s*$/ig;
+ $do_bootloader = "Yes" if /do_bootloader\s*=\s*(yes|true|1)\s*$/i;
+ $explicit_do_loader = "YES" if /do_bootloader\s*=\s*(yes|true|1)\s*$/i;
$relative_links = "Yes" if /relative_links\s*=\s*(yes|true|1)\s*$/ig;
$do_initrd = "Yes" if /do_initrd\s*=\s*(yes|true|1)\s*$/ig;
$warn_initrd = "Yes" if /warn_initrd\s*=\s*(yes|true|1)\s*$/ig;
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