[kernel] r22102 - in dists/sid/linux/debian: . patches patches/bugfix/arm
Ian James Campbell
ijc at moszumanska.debian.org
Wed Dec 3 10:53:07 UTC 2014
Author: ijc
Date: Wed Dec 3 10:53:06 2014
New Revision: 22102
Log:
[armhf] Fixup cache maintenance during boot time relocation.
Fixes boot on various platforms.
Added:
dists/sid/linux/debian/patches/bugfix/arm/decompressor-ensure-I-side-picks-up-reloc.patch
Modified:
dists/sid/linux/debian/changelog
dists/sid/linux/debian/patches/series
Modified: dists/sid/linux/debian/changelog
==============================================================================
--- dists/sid/linux/debian/changelog Wed Dec 3 05:58:41 2014 (r22101)
+++ dists/sid/linux/debian/changelog Wed Dec 3 10:53:06 2014 (r22102)
@@ -132,6 +132,8 @@
* [device-tree] Reserve memreserve regions even if they partially overlap
with an existing reservation. Fixes boot on Midway.
* [arm64] Enable reboot on the Xgene platform.
+ * [armhf] Fixup cache maintenance during boot time relocation. Fixes boot on
+ various platforms.
-- Ben Hutchings <ben at decadent.org.uk> Sun, 09 Nov 2014 10:13:09 +0000
Added: dists/sid/linux/debian/patches/bugfix/arm/decompressor-ensure-I-side-picks-up-reloc.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux/debian/patches/bugfix/arm/decompressor-ensure-I-side-picks-up-reloc.patch Wed Dec 3 10:53:06 2014 (r22102)
@@ -0,0 +1,112 @@
+From 238962ac71910d6c20162ea5230685fead1836a4 Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon at arm.com>
+Date: Tue, 4 Nov 2014 11:40:46 +0100
+Subject: [PATCH] ARM: 8191/1: decompressor: ensure I-side picks up relocated
+ code
+Origin: https://git.kernel.org/linus/238962ac71910d6c20162ea5230685fead1836a4
+
+To speed up decompression, the decompressor sets up a flat, cacheable
+mapping of memory. However, when there is insufficient space to hold
+the page tables for this mapping, we don't bother to enable the caches
+and subsequently skip all the cache maintenance hooks.
+
+Skipping the cache maintenance before jumping to the relocated code
+allows the processor to predict the branch and populate the I-cache
+with stale data before the relocation loop has completed (since a
+bootloader may have SCTLR.I set, which permits normal, cacheable
+instruction fetches regardless of SCTLR.M).
+
+This patch moves the cache maintenance check into the maintenance
+routines themselves, allowing the v6/v7 versions to invalidate the
+I-cache regardless of the MMU state.
+
+Cc: <stable at vger.kernel.org>
+Reported-by: Marc Carino <marc.ceeeee at gmail.com>
+Tested-by: Julien Grall <julien.grall at linaro.org>
+Signed-off-by: Will Deacon <will.deacon at arm.com>
+Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
+---
+ arch/arm/boot/compressed/head.S | 20 ++++++++++++++++----
+ 1 file changed, 16 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
+index 413fd94..68be901 100644
+--- a/arch/arm/boot/compressed/head.S
++++ b/arch/arm/boot/compressed/head.S
+@@ -397,8 +397,7 @@ dtb_check_done:
+ add sp, sp, r6
+ #endif
+
+- tst r4, #1
+- bleq cache_clean_flush
++ bl cache_clean_flush
+
+ adr r0, BSYM(restart)
+ add r0, r0, r6
+@@ -1047,6 +1046,8 @@ cache_clean_flush:
+ b call_cache_fn
+
+ __armv4_mpu_cache_flush:
++ tst r4, #1
++ movne pc, lr
+ mov r2, #1
+ mov r3, #0
+ mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
+@@ -1064,6 +1065,8 @@ __armv4_mpu_cache_flush:
+ mov pc, lr
+
+ __fa526_cache_flush:
++ tst r4, #1
++ movne pc, lr
+ mov r1, #0
+ mcr p15, 0, r1, c7, c14, 0 @ clean and invalidate D cache
+ mcr p15, 0, r1, c7, c5, 0 @ flush I cache
+@@ -1072,13 +1075,16 @@ __fa526_cache_flush:
+
+ __armv6_mmu_cache_flush:
+ mov r1, #0
+- mcr p15, 0, r1, c7, c14, 0 @ clean+invalidate D
++ tst r4, #1
++ mcreq p15, 0, r1, c7, c14, 0 @ clean+invalidate D
+ mcr p15, 0, r1, c7, c5, 0 @ invalidate I+BTB
+- mcr p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
++ mcreq p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
+ mcr p15, 0, r1, c7, c10, 4 @ drain WB
+ mov pc, lr
+
+ __armv7_mmu_cache_flush:
++ tst r4, #1
++ bne iflush
+ mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1
+ tst r10, #0xf << 16 @ hierarchical cache (ARMv7)
+ mov r10, #0
+@@ -1139,6 +1145,8 @@ iflush:
+ mov pc, lr
+
+ __armv5tej_mmu_cache_flush:
++ tst r4, #1
++ movne pc, lr
+ 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache
+ bne 1b
+ mcr p15, 0, r0, c7, c5, 0 @ flush I cache
+@@ -1146,6 +1154,8 @@ __armv5tej_mmu_cache_flush:
+ mov pc, lr
+
+ __armv4_mmu_cache_flush:
++ tst r4, #1
++ movne pc, lr
+ mov r2, #64*1024 @ default: 32K dcache size (*2)
+ mov r11, #32 @ default: 32 byte line size
+ mrc p15, 0, r3, c0, c0, 1 @ read cache type
+@@ -1179,6 +1189,8 @@ no_cache_id:
+
+ __armv3_mmu_cache_flush:
+ __armv3_mpu_cache_flush:
++ tst r4, #1
++ movne pc, lr
+ mov r1, #0
+ mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3
+ mov pc, lr
+--
+2.1.3
+
Modified: dists/sid/linux/debian/patches/series
==============================================================================
--- dists/sid/linux/debian/patches/series Wed Dec 3 05:58:41 2014 (r22101)
+++ dists/sid/linux/debian/patches/series Wed Dec 3 10:53:06 2014 (r22102)
@@ -60,6 +60,7 @@
bugfix/parisc/parisc-reduce-sigrtmin-from-37-to-32-to-behave-like-.patch
bugfix/arm64/arm64-add-missing-dts-entry-for-X-Gene-platform.patch
bugfix/arm64/arm64-removed-using-of-the-mask-attribute-in-the-dts.patch
+bugfix/arm/decompressor-ensure-I-side-picks-up-reloc.patch
# Arch features
features/mips/MIPS-Support-hard-limit-of-cpu-count-nr_cpu_ids.patch
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