[linux] 02/02: drm, agp: Update to 3.4.110
debian-kernel at lists.debian.org
debian-kernel at lists.debian.org
Mon Nov 23 23:46:31 UTC 2015
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benh pushed a commit to branch wheezy
in repository linux.
commit 255ef3cb62f7aa6ec8e0c99c8d87617f772786e3
Author: Ben Hutchings <ben at decadent.org.uk>
Date: Mon Nov 23 16:41:51 2015 +0000
drm, agp: Update to 3.4.110
---
debian/changelog | 9 ++
debian/patches/features/all/drm/drm-3.4.patch | 187 +++++++++-----------------
2 files changed, 70 insertions(+), 126 deletions(-)
diff --git a/debian/changelog b/debian/changelog
index 59156d6..d913653 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,15 @@
linux (3.2.73-2) UNRELEASED; urgency=medium
* splice: sendfile() at once fails for big files (Closes: #785189)
+ * drm, agp: Update to 3.4.110:
+ - drm/radeon: take the mode_config mutex when dealing with hpds (v2)
+ - [x86] agp/intel: Fix typo in needs_ilk_vtd_wa()
+ - [x86] Revert "drm/i915: Don't skip request retirement if the active list
+ is empty" (regression in 3.4.109) (Closes: #805880)
+ - Revert "drm/radeon: Use drm_calloc_ab for CS relocs"
+ (regression in 3.4.109)
+ - drm/radeon: partially revert "fix VM_CONTEXT*_PAGE_TABLE_END_ADDR
+ handling" (regression in 3.4.109)
-- Ben Hutchings <ben at decadent.org.uk> Sun, 22 Nov 2015 23:43:42 +0000
diff --git a/debian/patches/features/all/drm/drm-3.4.patch b/debian/patches/features/all/drm/drm-3.4.patch
index 2c2d2d96..89d57ea 100644
--- a/debian/patches/features/all/drm/drm-3.4.patch
+++ b/debian/patches/features/all/drm/drm-3.4.patch
@@ -93,7 +93,7 @@ index 58b49d1..4293c48 100644
ID(PCI_DEVICE_ID_INTEL_82443BX_0),
ID(PCI_DEVICE_ID_INTEL_82443GX_0),
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
-index 59d4697..7f025fb 100644
+index 59d4697..4e985cd 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -76,7 +76,6 @@ static struct _intel_private {
@@ -142,7 +142,7 @@ index 59d4697..7f025fb 100644
i, 0);
}
readl(intel_private.gtt+i-1);
-@@ -1190,12 +1190,11 @@ static inline int needs_idle_maps(void)
+@@ -1190,7 +1190,6 @@ static inline int needs_idle_maps(void)
{
#ifdef CONFIG_INTEL_IOMMU
const unsigned short gpu_devid = intel_private.pcidev->device;
@@ -150,12 +150,6 @@ index 59d4697..7f025fb 100644
/* Query intel_iommu to see if we need the workaround. Presumably that
* was loaded first.
- */
-- if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG ||
-+ if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB ||
- gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) &&
- intel_iommu_gfx_mapped)
- return 1;
diff --git a/drivers/char/agp/sis-agp.c b/drivers/char/agp/sis-agp.c
index 29aacd8..08704ae 100644
--- a/drivers/char/agp/sis-agp.c
@@ -44516,7 +44510,7 @@ index 61274bf..a8f00d0 100644
#define __i915_read(x, y) \
u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 315a49e..e1c744d 100644
+index 315a49e..b1f1d10 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -58,6 +58,7 @@ static void i915_gem_free_object_tail(struct drm_i915_gem_object *obj);
@@ -45063,7 +45057,7 @@ index 315a49e..e1c744d 100644
if (!dev_priv->mm.suspended) {
if (i915_enable_hangcheck) {
-@@ -1837,15 +1773,12 @@ void i915_gem_reset(struct drm_device *dev)
+@@ -1837,7 +1773,7 @@ void i915_gem_reset(struct drm_device *dev)
/**
* This function clears the request list as sequence numbers are passed.
*/
@@ -45072,15 +45066,7 @@ index 315a49e..e1c744d 100644
i915_gem_retire_requests_ring(struct intel_ring_buffer *ring)
{
uint32_t seqno;
- int i;
-
-- if (list_empty(&ring->request_list))
-- return;
--
- WARN_ON(i915_verify_lists(ring->dev));
-
- seqno = ring->get_seqno(ring);
-@@ -1865,6 +1798,12 @@ i915_gem_retire_requests_ring(struct intel_ring_buffer *ring)
+@@ -1865,6 +1801,12 @@ i915_gem_retire_requests_ring(struct intel_ring_buffer *ring)
break;
trace_i915_gem_request_retire(ring, request->seqno);
@@ -45093,7 +45079,7 @@ index 315a49e..e1c744d 100644
list_del(&request->list);
i915_gem_request_remove_from_client(request);
-@@ -1977,7 +1916,8 @@ i915_gem_retire_work_handler(struct work_struct *work)
+@@ -1977,7 +1919,8 @@ i915_gem_retire_work_handler(struct work_struct *work)
*/
int
i915_wait_request(struct intel_ring_buffer *ring,
@@ -45103,7 +45089,7 @@ index 315a49e..e1c744d 100644
{
drm_i915_private_t *dev_priv = ring->dev->dev_private;
u32 ier;
-@@ -2040,9 +1980,9 @@ i915_wait_request(struct intel_ring_buffer *ring,
+@@ -2040,9 +1983,9 @@ i915_wait_request(struct intel_ring_buffer *ring,
|| atomic_read(&dev_priv->mm.wedged));
ring->irq_put(ring);
@@ -45116,7 +45102,7 @@ index 315a49e..e1c744d 100644
ret = -EBUSY;
ring->waiting_seqno = 0;
-@@ -2051,17 +1991,12 @@ i915_wait_request(struct intel_ring_buffer *ring,
+@@ -2051,17 +1994,12 @@ i915_wait_request(struct intel_ring_buffer *ring,
if (atomic_read(&dev_priv->mm.wedged))
ret = -EAGAIN;
@@ -45135,7 +45121,7 @@ index 315a49e..e1c744d 100644
i915_gem_retire_requests_ring(ring);
return ret;
-@@ -2085,7 +2020,8 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj)
+@@ -2085,7 +2023,8 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj)
* it.
*/
if (obj->active) {
@@ -45145,7 +45131,7 @@ index 315a49e..e1c744d 100644
if (ret)
return ret;
}
-@@ -2123,6 +2059,7 @@ static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj)
+@@ -2123,6 +2062,7 @@ static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj)
int
i915_gem_object_unbind(struct drm_i915_gem_object *obj)
{
@@ -45153,7 +45139,7 @@ index 315a49e..e1c744d 100644
int ret = 0;
if (obj->gtt_space == NULL)
-@@ -2167,6 +2104,11 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
+@@ -2167,6 +2107,11 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
trace_i915_gem_object_unbind(obj);
i915_gem_gtt_unbind_object(obj);
@@ -45165,7 +45151,7 @@ index 315a49e..e1c744d 100644
i915_gem_object_put_pages_gtt(obj);
list_del_init(&obj->gtt_list);
-@@ -2206,7 +2148,7 @@ i915_gem_flush_ring(struct intel_ring_buffer *ring,
+@@ -2206,7 +2151,7 @@ i915_gem_flush_ring(struct intel_ring_buffer *ring,
return 0;
}
@@ -45174,7 +45160,7 @@ index 315a49e..e1c744d 100644
{
int ret;
-@@ -2220,18 +2162,18 @@ static int i915_ring_idle(struct intel_ring_buffer *ring)
+@@ -2220,18 +2165,18 @@ static int i915_ring_idle(struct intel_ring_buffer *ring)
return ret;
}
@@ -45197,7 +45183,7 @@ index 315a49e..e1c744d 100644
if (ret)
return ret;
}
-@@ -2448,7 +2390,8 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj,
+@@ -2448,7 +2393,8 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj,
if (!ring_passed_seqno(obj->last_fenced_ring,
obj->last_fenced_seqno)) {
ret = i915_wait_request(obj->last_fenced_ring,
@@ -45207,7 +45193,7 @@ index 315a49e..e1c744d 100644
if (ret)
return ret;
}
-@@ -2480,6 +2423,8 @@ i915_gem_object_put_fence(struct drm_i915_gem_object *obj)
+@@ -2480,6 +2426,8 @@ i915_gem_object_put_fence(struct drm_i915_gem_object *obj)
if (obj->fence_reg != I915_FENCE_REG_NONE) {
struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
@@ -45216,7 +45202,7 @@ index 315a49e..e1c744d 100644
i915_gem_clear_fence_reg(obj->base.dev,
&dev_priv->fence_regs[obj->fence_reg]);
-@@ -2504,7 +2449,7 @@ i915_find_fence_reg(struct drm_device *dev,
+@@ -2504,7 +2452,7 @@ i915_find_fence_reg(struct drm_device *dev,
if (!reg->obj)
return reg;
@@ -45225,7 +45211,7 @@ index 315a49e..e1c744d 100644
avail = reg;
}
-@@ -2514,7 +2459,7 @@ i915_find_fence_reg(struct drm_device *dev,
+@@ -2514,7 +2462,7 @@ i915_find_fence_reg(struct drm_device *dev,
/* None available, try to steal one or wait for a user to finish */
avail = first = NULL;
list_for_each_entry(reg, &dev_priv->mm.fence_list, lru_list) {
@@ -45234,7 +45220,7 @@ index 315a49e..e1c744d 100644
continue;
if (first == NULL)
-@@ -2594,7 +2539,8 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
+@@ -2594,7 +2542,8 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
if (!ring_passed_seqno(obj->last_fenced_ring,
reg->setup_seqno)) {
ret = i915_wait_request(obj->last_fenced_ring,
@@ -45244,7 +45230,7 @@ index 315a49e..e1c744d 100644
if (ret)
return ret;
}
-@@ -2613,7 +2559,7 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
+@@ -2613,7 +2562,7 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
reg = i915_find_fence_reg(dev, pipelined);
if (reg == NULL)
@@ -45253,7 +45239,7 @@ index 315a49e..e1c744d 100644
ret = i915_gem_object_flush_fence(obj, pipelined);
if (ret)
-@@ -2724,6 +2670,7 @@ i915_gem_clear_fence_reg(struct drm_device *dev,
+@@ -2724,6 +2673,7 @@ i915_gem_clear_fence_reg(struct drm_device *dev,
list_del_init(®->lru_list);
reg->obj = NULL;
reg->setup_seqno = 0;
@@ -45261,7 +45247,7 @@ index 315a49e..e1c744d 100644
}
/**
-@@ -3010,6 +2957,8 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
+@@ -3010,6 +2960,8 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
enum i915_cache_level cache_level)
{
@@ -45270,7 +45256,7 @@ index 315a49e..e1c744d 100644
int ret;
if (obj->cache_level == cache_level)
-@@ -3038,6 +2987,9 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
+@@ -3038,6 +2990,9 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
}
i915_gem_gtt_rebind_object(obj, cache_level);
@@ -45280,7 +45266,7 @@ index 315a49e..e1c744d 100644
}
if (cache_level == I915_CACHE_NONE) {
-@@ -3376,8 +3328,8 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)
+@@ -3376,8 +3331,8 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)
if (ret == 0 && atomic_read(&dev_priv->mm.wedged))
ret = -EIO;
@@ -45291,7 +45277,7 @@ index 315a49e..e1c744d 100644
atomic_read(&dev_priv->mm.wedged), 3000)) {
ret = -EBUSY;
}
-@@ -3688,8 +3640,8 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
+@@ -3688,8 +3643,8 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
obj->base.write_domain = I915_GEM_DOMAIN_CPU;
obj->base.read_domains = I915_GEM_DOMAIN_CPU;
@@ -45302,7 +45288,7 @@ index 315a49e..e1c744d 100644
* cache) for about a 10% performance improvement
* compared to uncached. Graphics requests other than
* display scanout are coherent with the CPU in
-@@ -3779,7 +3731,7 @@ i915_gem_idle(struct drm_device *dev)
+@@ -3779,7 +3734,7 @@ i915_gem_idle(struct drm_device *dev)
return 0;
}
@@ -45311,7 +45297,7 @@ index 315a49e..e1c744d 100644
if (ret) {
mutex_unlock(&dev->struct_mutex);
return ret;
-@@ -3814,12 +3766,91 @@ i915_gem_idle(struct drm_device *dev)
+@@ -3814,12 +3769,91 @@ i915_gem_idle(struct drm_device *dev)
return 0;
}
@@ -45404,7 +45390,7 @@ index 315a49e..e1c744d 100644
ret = intel_init_render_ring_buffer(dev);
if (ret)
return ret;
-@@ -3838,6 +3869,8 @@ i915_gem_init_ringbuffer(struct drm_device *dev)
+@@ -3838,6 +3872,8 @@ i915_gem_init_ringbuffer(struct drm_device *dev)
dev_priv->next_seqno = 1;
@@ -45413,7 +45399,7 @@ index 315a49e..e1c744d 100644
return 0;
cleanup_bsd_ring:
-@@ -3875,7 +3908,7 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
+@@ -3875,7 +3911,7 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
mutex_lock(&dev->struct_mutex);
dev_priv->mm.suspended = 0;
@@ -45422,7 +45408,7 @@ index 315a49e..e1c744d 100644
if (ret != 0) {
mutex_unlock(&dev->struct_mutex);
return ret;
-@@ -4270,7 +4303,7 @@ rescan:
+@@ -4270,7 +4306,7 @@ rescan:
* This has a dramatic impact to reduce the number of
* OOM-killer events whilst running the GPU aggressively.
*/
@@ -56736,10 +56722,25 @@ index 2f6daae..c1dc20f 100644
FIRE_RING (chan);
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
-index bd0b1fc..2f46bbf 100644
+index fc64ad0..2f46bbf 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
-@@ -427,9 +427,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list,
+@@ -172,12 +172,11 @@ nouveau_gem_info(struct drm_file *file_priv, struct drm_gem_object *gem,
+ struct nouveau_bo *nvbo = nouveau_gem_object(gem);
+ struct nouveau_vma *vma;
+
+- if (is_power_of_2(nvbo->valid_domains))
+- rep->domain = nvbo->valid_domains;
+- else if (nvbo->bo.mem.mem_type == TTM_PL_TT)
++ if (nvbo->bo.mem.mem_type == TTM_PL_TT)
+ rep->domain = NOUVEAU_GEM_DOMAIN_GART;
+ else
+ rep->domain = NOUVEAU_GEM_DOMAIN_VRAM;
++
+ rep->offset = nvbo->bo.offset;
+ if (fpriv->vm) {
+ vma = nouveau_bo_vma_find(nvbo, fpriv->vm);
+@@ -428,9 +427,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list,
return ret;
}
@@ -56749,7 +56750,7 @@ index bd0b1fc..2f46bbf 100644
if (unlikely(ret)) {
if (ret != -ERESTARTSYS)
NV_ERROR(dev, "fail ttm_validate\n");
-@@ -679,19 +677,13 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
+@@ -680,19 +677,13 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
return PTR_ERR(bo);
}
@@ -72977,7 +72978,7 @@ index 7b4eeb7..19a0114 100644
#include <linux/kernel.h>
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
-index 5d78973..db4df97 100644
+index 5d78973..c5fe79e 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -50,6 +50,39 @@ static const u32 crtc_offsets[6] =
@@ -73029,15 +73030,6 @@ index 5d78973..db4df97 100644
{
u32 tmp = RREG32(MC_SHARED_CHMAP);
-@@ -1046,7 +1079,7 @@ int evergreen_pcie_gart_enable(struct radeon_device *rdev)
- WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
- WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
- WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
-- WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
-+ WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
- WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
- WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
- RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
@@ -1136,11 +1169,24 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav
crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & EVERGREEN_CRTC_MASTER_EN;
if (crtc_enabled) {
@@ -76209,7 +76201,7 @@ index e022776b..e534e5d 100644
+
#endif
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
-index 47f3bd2..52aabf2 100644
+index 47f3bd2..52aabf24 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -81,6 +81,11 @@
@@ -76786,7 +76778,7 @@ index 47f3bd2..52aabf2 100644
#define CAYMAN_DB_DEPTH_INFO 0x2803C
#define CAYMAN_PA_SC_AA_CONFIG 0x28BE0
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
-index 77e6fb1..1f45179 100644
+index 77e6fb1..461262e 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -42,6 +42,8 @@ extern void evergreen_irq_suspend(struct radeon_device *rdev);
@@ -77034,15 +77026,7 @@ index 77e6fb1..1f45179 100644
SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU);
/* Setup L2 cache */
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE |
-@@ -970,16 +1075,33 @@ int cayman_pcie_gart_enable(struct radeon_device *rdev)
- L2_CACHE_BIGK_FRAGMENT_SIZE(6));
- /* setup context0 */
- WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
-- WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
-+ WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
- WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
- WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
- (u32)(rdev->dummy_page.addr >> 12));
+@@ -977,9 +1082,26 @@ int cayman_pcie_gart_enable(struct radeon_device *rdev)
WREG32(VM_CONTEXT0_CNTL2, 0);
WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
@@ -79236,7 +79220,7 @@ index f36a5c9..57be784 100644
if (r) {
/* Somethings want wront with the accel init stop accel */
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
-index e5299a0..d441aed 100644
+index e5299a0..9c7062d 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -49,6 +49,7 @@
@@ -79247,15 +79231,6 @@ index e5299a0..d441aed 100644
/* Firmware Names */
MODULE_FIRMWARE("radeon/R600_pfp.bin");
-@@ -929,7 +930,7 @@ int r600_pcie_gart_enable(struct radeon_device *rdev)
- WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
- WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
- WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
-- WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
-+ WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
- WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
- WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
- RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
@@ -1134,7 +1135,7 @@ static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc
}
if (rdev->flags & RADEON_IS_AGP) {
@@ -86174,18 +86149,9 @@ index 72ae826..0ebb7d4 100644
dev_priv->flags |= RADEON_IS_AGP;
else if (pci_is_pcie(dev->pdev))
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
-index 0ddc08c..d66d2cd 100644
+index 0ddc08c..f3ee360 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
-@@ -49,7 +49,7 @@ int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
- if (p->relocs_ptr == NULL) {
- return -ENOMEM;
- }
-- p->relocs = kcalloc(p->nrelocs, sizeof(struct radeon_cs_reloc), GFP_KERNEL);
-+ p->relocs = drm_calloc_large(p->nrelocs, sizeof(struct radeon_bo_list));
- if (p->relocs == NULL) {
- return -ENOMEM;
- }
@@ -58,7 +58,7 @@ int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
duplicate = false;
@@ -86409,15 +86375,6 @@ index 0ddc08c..d66d2cd 100644
return 0;
}
-@@ -216,7 +324,7 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
- }
- }
- kfree(parser->track);
-- kfree(parser->relocs);
-+ drm_free_large(parser->relocs);
- kfree(parser->relocs_ptr);
- for (i = 0; i < parser->nchunks; i++) {
- kfree(parser->chunks[i].kdata);
@@ -228,14 +336,186 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
radeon_ib_free(parser->rdev, &parser->ib);
}
@@ -88862,23 +88819,10 @@ index 894b5f0..19d68c5 100644
snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
"Radeon aux bus %s", name);
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
-index 42f5a2b..645dcbf 100644
+index 42f5a2b..77c456d 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
-@@ -51,12 +51,10 @@ static void radeon_hotplug_work_func(struct work_struct *work)
- struct drm_mode_config *mode_config = &dev->mode_config;
- struct drm_connector *connector;
-
-- mutex_lock(&mode_config->mutex);
- if (mode_config->num_connector) {
- list_for_each_entry(connector, &mode_config->connector_list, head)
- radeon_connector_hotplug(connector);
- }
-- mutex_unlock(&mode_config->mutex);
- /* Just fire off a uevent and let userspace tell us what to do */
- drm_helper_hpd_irq_event(dev);
- }
-@@ -67,7 +65,8 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
+@@ -67,7 +67,8 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
unsigned i;
/* Disable *all* interrupts */
@@ -88888,7 +88832,7 @@ index 42f5a2b..645dcbf 100644
rdev->irq.gui_idle = false;
for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
rdev->irq.hpd[i] = false;
-@@ -83,9 +82,11 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
+@@ -83,9 +84,11 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
{
struct radeon_device *rdev = dev->dev_private;
@@ -88901,7 +88845,7 @@ index 42f5a2b..645dcbf 100644
radeon_irq_set(rdev);
return 0;
}
-@@ -99,7 +100,8 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
+@@ -99,7 +102,8 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
return;
}
/* Disable *all* interrupts */
@@ -88911,7 +88855,7 @@ index 42f5a2b..645dcbf 100644
rdev->irq.gui_idle = false;
for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
rdev->irq.hpd[i] = false;
-@@ -218,26 +220,26 @@ void radeon_irq_kms_fini(struct radeon_device *rdev)
+@@ -218,26 +222,26 @@ void radeon_irq_kms_fini(struct radeon_device *rdev)
flush_work_sync(&rdev->hotplug_work);
}
@@ -92257,18 +92201,9 @@ index 9103638..0532bbe 100644
if (r) {
/* Somethings want wront with the accel init stop accel */
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
-index 3e72074..3358730 100644
+index 3e72074..1ec1255 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
-@@ -158,7 +158,7 @@ int rv770_pcie_gart_enable(struct radeon_device *rdev)
- WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
- WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
- WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
-- WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
-+ WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
- WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
- WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
- RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
@@ -359,7 +359,7 @@ static int rv770_cp_load_microcode(struct radeon_device *rdev)
void r700_cp_fini(struct radeon_device *rdev)
{
@@ -92455,7 +92390,7 @@ index 3e72074..3358730 100644
radeon_bo_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
new file mode 100644
-index 0000000..3b6e641
+index 0000000..6609a23
--- /dev/null
+++ b/drivers/gpu/drm/radeon/si.c
@@ -0,0 +1,4157 @@
@@ -94998,7 +94933,7 @@ index 0000000..3b6e641
+ L2_CACHE_BIGK_FRAGMENT_SIZE(0));
+ /* setup context0 */
+ WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
-+ WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
++ WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
+ WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
+ WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
+ (u32)(rdev->dummy_page.addr >> 12));
--
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