[Pcsclite-git-commit] [CCID] 05/06: Add Feitian iR301 (ProductID 0x0619)

Ludovic Rousseau rousseau at moszumanska.debian.org
Sat Oct 3 03:49:24 UTC 2015


This is an automated email from the git hooks/post-receive script.

rousseau pushed a commit to branch master
in repository CCID.

commit 8f9ef7bdfaccc5cde4688d165aef5fb809d80ee1
Author: Ludovic Rousseau <ludovic.rousseau at free.fr>
Date:   Sat Oct 3 05:42:17 2015 +0200

    Add Feitian iR301 (ProductID 0x0619)
---
 readers/Feitian_iR301-U_30PIN.txt | 60 +++++++++++++++++++++++++++++++++++++++
 readers/supported_readers.txt     |  1 +
 2 files changed, 61 insertions(+)

diff --git a/readers/Feitian_iR301-U_30PIN.txt b/readers/Feitian_iR301-U_30PIN.txt
new file mode 100644
index 0000000..5388416
--- /dev/null
+++ b/readers/Feitian_iR301-U_30PIN.txt
@@ -0,0 +1,60 @@
+ idVendor: 0x096E
+  iManufacturer: FEITIAN
+ idProduct: 0x0619
+  iProduct: iR301
+ bcdDevice: 1.11 (firmware release?)
+ bLength: 9
+ bDescriptorType: 4
+ bInterfaceNumber: 0
+ bAlternateSetting: 0
+ bNumEndpoints: 3
+  bulk-IN, bulk-OUT and Interrupt-IN
+ bInterfaceClass: 0x0B [Chip Card Interface Device Class (CCID)]
+ bInterfaceSubClass: 0
+ bInterfaceProtocol: 0
+  bulk transfer, optional interrupt-IN (CCID)
+ Can't get iInterface string
+ CCID Class Descriptor
+  bLength: 0x36
+  bDescriptorType: 0x21
+  bcdCCID: 1.00
+  bMaxSlotIndex: 0x00
+  bVoltageSupport: 0x07
+   5.0V
+   3.0V
+   1.8V
+  dwProtocols: 0x0000 0x0003
+   T=0
+   T=1
+  dwDefaultClock: 3.700 MHz
+  dwMaximumClock: 3.700 MHz
+  bNumClockSupported: 0 (will use whatever is returned)
+   IFD does not support GET CLOCK FREQUENCIES request: Operation timed out
+  dwDataRate: 9946 bps
+  dwMaxDataRate: 318280 bps
+  bNumDataRatesSupported: 53
+   IFD does not support GET_DATA_RATES request: Operation timed out
+  dwMaxIFSD: 272
+  dwSynchProtocols: 0x00000007
+   2-wire protocol
+   3-wire protocol
+   I2C protocol
+  dwMechanical: 0x00000000
+   No special characteristics
+  dwFeatures: 0x000404BE
+   ....02 Automatic parameter configuration based on ATR data
+   ....04 Automatic activation of ICC on inserting
+   ....08 Automatic ICC voltage selection
+   ....10 Automatic ICC clock frequency change according to parameters
+   ....20 Automatic baud rate change according to frequency and Fi, Di params
+   ....80 Automatic PPS made by the CCID
+   ..04.. Automatic IFSD exchange as first exchange (T=1)
+   04.... Short and Extended APDU level exchange
+  dwMaxCCIDMessageLength: 272 bytes
+  bClassGetResponse: 0xFF
+   echoes the APDU class
+  bClassEnvelope: 0xFF
+   echoes the APDU class
+  wLcdLayout: 0x0000
+  bPINSupport: 0x00
+  bMaxCCIDBusySlots: 1
diff --git a/readers/supported_readers.txt b/readers/supported_readers.txt
index 8f4ae08..2e37a3e 100644
--- a/readers/supported_readers.txt
+++ b/readers/supported_readers.txt
@@ -240,6 +240,7 @@
 # Feitian
 0x096E:0x0608:Feitian 502-CL
 0x096E:0x060D:Feitian R502
+0x096E:0x0619:Feitian iR301
 0x096E:0x061A:Feitian bR301
 0x096E:0x061C:Feitian iR301
 0x096E:0x0624:Feitian bR301 BLE

-- 
Alioth's /usr/local/bin/git-commit-notice on /srv/git.debian.org/git/pcsclite/CCID.git



More information about the Pcsclite-cvs-commit mailing list