[Pcsclite-git-commit] [CCID] 01/03: Add Feitian bR500

[Ludovic Rousseau]

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rousseau pushed a commit to branch master
in repository CCID.

commit 2c72558784abb88c7dc00369e8032b5b9377d7a7
Author: Ludovic Rousseau <ludovic.rousseau at free.fr>
Date:   Sun Jul 31 15:18:19 2016 +0200

    Add Feitian bR500
---
 readers/Feitian_bR500.txt     | 76 +++++++++++++++++++++++++++++++++++++++++++
 readers/supported_readers.txt |  1 +
 2 files changed, 77 insertions(+)

diff --git a/readers/Feitian_bR500.txt b/readers/Feitian_bR500.txt
new file mode 100644
index 0000000..4a79114
--- /dev/null
+++ b/readers/Feitian_bR500.txt
@@ -0,0 +1,76 @@
+ idVendor: 0x096E
+  iManufacturer: Feitian
+ idProduct: 0x0623
+  iProduct: bR500
+ bcdDevice: 1.12 (firmware release?)
+ bLength: 9
+ bDescriptorType: 4
+ bInterfaceNumber: 0
+ bAlternateSetting: 0
+ bNumEndpoints: 3
+  bulk-IN, bulk-OUT and Interrupt-IN
+ bInterfaceClass: 0x0B [Chip Card Interface Device Class (CCID)]
+ bInterfaceSubClass: 0
+ bInterfaceProtocol: 0
+  bulk transfer, optional interrupt-IN (CCID)
+ Can't get iInterface string
+ CCID Class Descriptor
+  bLength: 0x36
+  bDescriptorType: 0x21
+  bcdCCID: 1.10
+  bMaxSlotIndex: 0x00
+  bVoltageSupport: 0x07
+   5.0V
+   3.0V
+   1.8V
+  dwProtocols: 0x0000 0x0003
+   T=0
+   T=1
+  dwDefaultClock: 3.700 MHz
+  dwMaximumClock: 3.700 MHz
+  bNumClockSupported: 0 (will use whatever is returned)
+   IFD does not support GET CLOCK FREQUENCIES request: No such file or directory
+  dwDataRate: 9946 bps
+  dwMaxDataRate: 318280 bps
+  bNumDataRatesSupported: 17
+   Support 8064 bps
+   Support 10752 bps
+   Support 11718 bps
+   Support 15625 bps
+   Support 16129 bps
+   Support 19354 bps
+   Support 23437 bps
+   Support 24193 bps
+   Support 31250 bps
+   Support 32258 bps
+   Support 46875 bps
+   Support 48387 bps
+   Support 62500 bps
+   Support 93750 bps
+   Support 96774 bps
+   Support 125000 bps
+   Support 187500 bps
+  dwMaxIFSD: 516
+  dwSynchProtocols: 0x00000007
+   2-wire protocol
+   3-wire protocol
+   I2C protocol
+  dwMechanical: 0x00000000
+   No special characteristics
+  dwFeatures: 0x000404BE
+   ....02 Automatic parameter configuration based on ATR data
+   ....04 Automatic activation of ICC on inserting
+   ....08 Automatic ICC voltage selection
+   ....10 Automatic ICC clock frequency change according to parameters
+   ....20 Automatic baud rate change according to frequency and Fi, Di params
+   ....80 Automatic PPS made by the CCID
+   ..04.. Automatic IFSD exchange as first exchange (T=1)
+   04.... Short and Extended APDU level exchange
+  dwMaxCCIDMessageLength: 516 bytes
+  bClassGetResponse: 0xFF
+   echoes the APDU class
+  bClassEnvelope: 0xFF
+   echoes the APDU class
+  wLcdLayout: 0x0000
+  bPINSupport: 0x00
+  bMaxCCIDBusySlots: 1
diff --git a/readers/supported_readers.txt b/readers/supported_readers.txt
index 1d35f91..b927b5a 100644
--- a/readers/supported_readers.txt
+++ b/readers/supported_readers.txt
@@ -267,6 +267,7 @@
 # Feitian
 0x096E:0x0608:Feitian 502-CL
 0x096E:0x060D:Feitian R502
+0x096E:0x0623:Feitian bR500
 0x096E:0x0624:Feitian bR301
 0x096E:0x0807:Feitian ePass2003
 0x096E:0x080F:Feitian eJAVA Token

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