[Pkg-clamav-commits] [SCM] Debian repository for ClamAV branch, debian/unstable, updated. debian/0.95+dfsg-1-6617-g1f6e4d4
aCaB
acab at clamav.net
Tue Nov 30 16:46:06 UTC 2010
The following commit has been merged in the debian/unstable branch:
commit 1f6e4d42c4856d07d05302722d12afcf7bfad24e
Author: aCaB <acab at clamav.net>
Date: Tue Nov 30 17:40:40 2010 +0100
drop stale .inc files
diff --git a/libclamav/c++/PPCGenAsmWriter.inc b/libclamav/c++/PPCGenAsmWriter.inc
deleted file mode 100644
index fa1d206..0000000
--- a/libclamav/c++/PPCGenAsmWriter.inc
+++ /dev/null
@@ -1,1531 +0,0 @@
-//===- TableGen'erated file -------------------------------------*- C++ -*-===//
-//
-// Assembly Writer Source Fragment
-//
-// Automatically generated file, do not edit!
-//
-//===----------------------------------------------------------------------===//
-
-/// printInstruction - This method is automatically generated by tablegen
-/// from the instruction set description.
-void PPCAsmPrinter::printInstruction(const MachineInstr *MI) {
- static const unsigned OpInfo[] = {
- 0U, // PHI
- 0U, // INLINEASM
- 0U, // DBG_LABEL
- 0U, // EH_LABEL
- 0U, // GC_LABEL
- 0U, // KILL
- 0U, // EXTRACT_SUBREG
- 0U, // INSERT_SUBREG
- 0U, // IMPLICIT_DEF
- 0U, // SUBREG_TO_REG
- 0U, // COPY_TO_REGCLASS
- 1U, // DBG_VALUE
- 268435467U, // ADD4
- 268435467U, // ADD8
- 268435472U, // ADDC
- 268435472U, // ADDC8
- 268435478U, // ADDE
- 268435478U, // ADDE8
- 268439580U, // ADDI
- 268439580U, // ADDI8
- 268439586U, // ADDIC
- 268439586U, // ADDIC8
- 268439593U, // ADDICo
- 268443697U, // ADDIS
- 268443697U, // ADDIS8
- 268468280U, // ADDME
- 268468280U, // ADDME8
- 268468287U, // ADDZE
- 268468287U, // ADDZE8
- 541065286U, // ADJCALLSTACKDOWN
- 545259590U, // ADJCALLSTACKUP
- 268435527U, // AND
- 268435527U, // AND8
- 268435532U, // ANDC
- 268435532U, // ANDC8
- 268447826U, // ANDISo
- 268447826U, // ANDISo8
- 268447834U, // ANDIo
- 268447834U, // ANDIo8
- 549453894U, // ATOMIC_CMP_SWAP_I16
- 553648198U, // ATOMIC_CMP_SWAP_I32
- 557842502U, // ATOMIC_CMP_SWAP_I64
- 562036806U, // ATOMIC_CMP_SWAP_I8
- 566231110U, // ATOMIC_LOAD_ADD_I16
- 570425414U, // ATOMIC_LOAD_ADD_I32
- 574619718U, // ATOMIC_LOAD_ADD_I64
- 578814022U, // ATOMIC_LOAD_ADD_I8
- 583008326U, // ATOMIC_LOAD_AND_I16
- 587202630U, // ATOMIC_LOAD_AND_I32
- 591396934U, // ATOMIC_LOAD_AND_I64
- 595591238U, // ATOMIC_LOAD_AND_I8
- 599785542U, // ATOMIC_LOAD_NAND_I16
- 603979846U, // ATOMIC_LOAD_NAND_I32
- 608174150U, // ATOMIC_LOAD_NAND_I64
- 612368454U, // ATOMIC_LOAD_NAND_I8
- 616562758U, // ATOMIC_LOAD_OR_I16
- 620757062U, // ATOMIC_LOAD_OR_I32
- 624951366U, // ATOMIC_LOAD_OR_I64
- 629145670U, // ATOMIC_LOAD_OR_I8
- 633339974U, // ATOMIC_LOAD_SUB_I16
- 637534278U, // ATOMIC_LOAD_SUB_I32
- 641728582U, // ATOMIC_LOAD_SUB_I64
- 645922886U, // ATOMIC_LOAD_SUB_I8
- 650117190U, // ATOMIC_LOAD_XOR_I16
- 654311494U, // ATOMIC_LOAD_XOR_I32
- 658505798U, // ATOMIC_LOAD_XOR_I64
- 662700102U, // ATOMIC_LOAD_XOR_I8
- 666894406U, // ATOMIC_SWAP_I16
- 671088710U, // ATOMIC_SWAP_I32
- 675283014U, // ATOMIC_SWAP_I64
- 679477318U, // ATOMIC_SWAP_I8
- 805306465U, // B
- 1220804708U, // BCC
- 102U, // BCTR
- 107U, // BCTRL8_Darwin
- 107U, // BCTRL8_ELF
- 107U, // BCTRL_Darwin
- 107U, // BCTRL_SVR4
- 1493172337U, // BL8_Darwin
- 1493172337U, // BL8_ELF
- 1761607797U, // BLA8_Darwin
- 1761607797U, // BLA8_ELF
- 1761607797U, // BLA_Darwin
- 1761607797U, // BLA_SVR4
- 1228931172U, // BLR
- 1493172337U, // BL_Darwin
- 1493172337U, // BL_SVR4
- 268435578U, // CMPD
- 268439680U, // CMPDI
- 268435591U, // CMPLD
- 268447886U, // CMPLDI
- 268435606U, // CMPLW
- 268447901U, // CMPLWI
- 268435621U, // CMPW
- 268439723U, // CMPWI
- 268468402U, // CNTLZD
- 268468410U, // CNTLZW
- 268435650U, // CREQV
- 268435657U, // CROR
- 268959938U, // CRSET
- 1879048399U, // DCBA
- 1879048405U, // DCBF
- 1879048411U, // DCBI
- 1879048417U, // DCBST
- 1879048424U, // DCBT
- 1879048430U, // DCBTST
- 1879048438U, // DCBZ
- 1879048444U, // DCBZL
- 268435715U, // DIVD
- 268435721U, // DIVDU
- 268435728U, // DIVW
- 268435734U, // DIVWU
- 2147483933U, // DSS
- 290U, // DSSALL
- 2415919401U, // DST
- 2415919401U, // DST64
- 2415919406U, // DSTST
- 2415919406U, // DSTST64
- 2415919413U, // DSTSTT
- 2415919413U, // DSTSTT64
- 2415919421U, // DSTT
- 2415919421U, // DSTT64
- 696254534U, // DYNALLOC
- 700448838U, // DYNALLOC8
- 268435779U, // EQV
- 268435779U, // EQV8
- 268468552U, // EXTSB
- 268468552U, // EXTSB8
- 268468559U, // EXTSH
- 268468559U, // EXTSH8
- 268468566U, // EXTSW
- 268468566U, // EXTSW_32
- 268468566U, // EXTSW_32_64
- 268468573U, // FABSD
- 268468573U, // FABSS
- 268435811U, // FADD
- 268435817U, // FADDS
- 268435811U, // FADDrtz
- 268468592U, // FCFID
- 268435831U, // FCMPUD
- 268435831U, // FCMPUS
- 268468606U, // FCTIDZ
- 268468614U, // FCTIWZ
- 268435854U, // FDIV
- 268435860U, // FDIVS
- 268435867U, // FMADD
- 268435874U, // FMADDS
- 268468650U, // FMR
- 268468650U, // FMRSD
- 268435887U, // FMSUB
- 268435894U, // FMSUBS
- 268435902U, // FMUL
- 268435908U, // FMULS
- 268468683U, // FNABSD
- 268468683U, // FNABSS
- 268468690U, // FNEGD
- 268468690U, // FNEGS
- 268435928U, // FNMADD
- 268435936U, // FNMADDS
- 268435945U, // FNMSUB
- 268435953U, // FNMSUBS
- 268468730U, // FRSP
- 268435968U, // FSELD
- 268435968U, // FSELS
- 268468742U, // FSQRT
- 268468749U, // FSQRTS
- 268435989U, // FSUB
- 268435995U, // FSUBS
- 269287970U, // LA
- 269484582U, // LBZ
- 269484582U, // LBZ8
- 269746731U, // LBZU
- 269746731U, // LBZU8
- 270008881U, // LBZX
- 270008881U, // LBZX8
- 270271031U, // LD
- 270008891U, // LDARX
- 270533186U, // LDU
- 270008903U, // LDX
- 436208204U, // LDinto_toc
- 270795319U, // LDtoc
- 597U, // LDtoc_restore
- 269484641U, // LFD
- 269746785U, // LFDU
- 270008934U, // LFDX
- 269484652U, // LFS
- 269746796U, // LFSU
- 270008945U, // LFSX
- 269484663U, // LHA
- 269484663U, // LHA8
- 269746812U, // LHAU
- 269320828U, // LHAU8
- 270008962U, // LHAX
- 270008962U, // LHAX8
- 270008968U, // LHBRX
- 269484687U, // LHZ
- 269484687U, // LHZ8
- 269746836U, // LHZU
- 269746836U, // LHZU8
- 270008986U, // LHZX
- 270008986U, // LHZX8
- 271057568U, // LI
- 271057568U, // LI8
- 271319716U, // LIS
- 271319716U, // LIS8
- 270009001U, // LVEBX
- 270009008U, // LVEHX
- 270009015U, // LVEWX
- 270009022U, // LVSL
- 270009028U, // LVSR
- 270009034U, // LVX
- 270009039U, // LVXL
- 270271189U, // LWA
- 270009050U, // LWARX
- 270009057U, // LWAX
- 270009063U, // LWBRX
- 269484782U, // LWZ
- 269484782U, // LWZ8
- 269746931U, // LWZU
- 269746931U, // LWZU8
- 270009081U, // LWZX
- 270009081U, // LWZX8
- 268468991U, // MCRF
- 419431173U, // MFCR
- 419431179U, // MFCTR
- 419431179U, // MFCTR8
- 419431186U, // MFFS
- 419431192U, // MFLR
- 419431192U, // MFLR8
- 271581957U, // MFOCRF
- 440402718U, // MFVRSAVE
- 419431205U, // MFVSCR
- 2684355373U, // MTCRF
- 419431220U, // MTCTR
- 419431220U, // MTCTR8
- 2952790843U, // MTFSB0
- 2952790851U, // MTFSB1
- 3397387083U, // MTFSF
- 419431250U, // MTLR
- 419431250U, // MTLR8
- 419431256U, // MTVRSAVE
- 419431268U, // MTVSCR
- 268436332U, // MULHD
- 268436339U, // MULHDU
- 268436347U, // MULHW
- 268436354U, // MULHWU
- 268436362U, // MULLD
- 268440465U, // MULLI
- 268436376U, // MULLW
- 3489661041U, // MovePCtoLR
- 3489661041U, // MovePCtoLR8
- 268436383U, // NAND
- 268436383U, // NAND8
- 268469157U, // NEG
- 268469157U, // NEG8
- 938U, // NOP
- 268436398U, // NOR
- 268436398U, // NOR8
- 268436403U, // OR
- 268436403U, // OR4To8
- 268436403U, // OR8
- 268436403U, // OR8To4
- 268436407U, // ORC
- 268436407U, // ORC8
- 268448700U, // ORI
- 268448700U, // ORI8
- 268448705U, // ORIS
- 268448705U, // ORIS8
- 268436423U, // RLDCL
- 268452814U, // RLDICL
- 268452822U, // RLDICR
- 271975390U, // RLDIMI
- 272008166U, // RLWIMI
- 268456942U, // RLWINM
- 268456950U, // RLWINMo
- 268436479U, // RLWNM
- 717226054U, // SELECT_CC_F4
- 717226054U, // SELECT_CC_F8
- 717226054U, // SELECT_CC_I4
- 717226054U, // SELECT_CC_I8
- 717226054U, // SELECT_CC_VRRC
- 268436486U, // SLD
- 268436491U, // SLW
- 721420358U, // SPILL_CR
- 268436496U, // SRAD
- 268452886U, // SRADI
- 268436509U, // SRAW
- 268456995U, // SRAWI
- 268436522U, // SRD
- 268436527U, // SRW
- 269485108U, // STB
- 269485108U, // STB8
- 3409970233U, // STBU
- 3409970233U, // STBU8
- 270009407U, // STBX
- 270009407U, // STBX8
- 270271557U, // STD
- 270009418U, // STDCX
- 3414164562U, // STDU
- 270009432U, // STDUX
- 270009439U, // STDX
- 270009439U, // STDX_32
- 270271557U, // STD_32
- 269485157U, // STFD
- 3409970283U, // STFDU
- 270009458U, // STFDX
- 270009465U, // STFIWX
- 269485185U, // STFS
- 3409970311U, // STFSU
- 270009486U, // STFSX
- 269485205U, // STH
- 269485205U, // STH8
- 270009498U, // STHBRX
- 3409970338U, // STHU
- 3409970338U, // STHU8
- 270009512U, // STHX
- 270009512U, // STHX8
- 270009518U, // STVEBX
- 270009526U, // STVEHX
- 270009534U, // STVEWX
- 270009542U, // STVX
- 270009548U, // STVXL
- 269485267U, // STW
- 269485267U, // STW8
- 270009560U, // STWBRX
- 270009568U, // STWCX
- 3409970408U, // STWU
- 268436718U, // STWUX
- 270009589U, // STWX
- 270009589U, // STWX8
- 268436731U, // SUBF
- 268436731U, // SUBF8
- 268436737U, // SUBFC
- 268436737U, // SUBFC8
- 268436744U, // SUBFE
- 268436744U, // SUBFE8
- 268440847U, // SUBFIC
- 268440847U, // SUBFIC8
- 268469527U, // SUBFME
- 268469527U, // SUBFME8
- 268469535U, // SUBFZE
- 268469535U, // SUBFZE8
- 1319U, // SYNC
- 1493172321U, // TAILB
- 1493172321U, // TAILB8
- 1761609004U, // TAILBA
- 1761609004U, // TAILBA8
- 102U, // TAILBCTR
- 102U, // TAILBCTR8
- 1757447472U, // TCRETURNai
- 1757447485U, // TCRETURNai8
- 1489012043U, // TCRETURNdi
- 1489012056U, // TCRETURNdi8
- 415270246U, // TCRETURNri
- 415270259U, // TCRETURNri8
- 1409U, // TRAP
- 268469638U, // UPDATE_VRSAVE
- 268436885U, // VADDCUW
- 268436894U, // VADDFP
- 268436902U, // VADDSBS
- 268436911U, // VADDSHS
- 268436920U, // VADDSWS
- 268436929U, // VADDUBM
- 268436938U, // VADDUBS
- 268436947U, // VADDUHM
- 268436956U, // VADDUHS
- 268436965U, // VADDUWM
- 268436974U, // VADDUWS
- 268436983U, // VAND
- 268436989U, // VANDC
- 268436996U, // VAVGSB
- 268437004U, // VAVGSH
- 268437012U, // VAVGSW
- 268437020U, // VAVGUB
- 268437028U, // VAVGUH
- 268437036U, // VAVGUW
- 272041524U, // VCFSX
- 272041531U, // VCFUX
- 268437058U, // VCMPBFP
- 268437067U, // VCMPBFPo
- 268437077U, // VCMPEQFP
- 268437087U, // VCMPEQFPo
- 268437098U, // VCMPEQUB
- 268437108U, // VCMPEQUBo
- 268437119U, // VCMPEQUH
- 268437129U, // VCMPEQUHo
- 268437140U, // VCMPEQUW
- 268437150U, // VCMPEQUWo
- 268437161U, // VCMPGEFP
- 268437171U, // VCMPGEFPo
- 268437182U, // VCMPGTFP
- 268437192U, // VCMPGTFPo
- 268437203U, // VCMPGTSB
- 268437213U, // VCMPGTSBo
- 268437224U, // VCMPGTSH
- 268437234U, // VCMPGTSHo
- 268437245U, // VCMPGTSW
- 268437255U, // VCMPGTSWo
- 268437266U, // VCMPGTUB
- 268437276U, // VCMPGTUBo
- 268437287U, // VCMPGTUH
- 268437297U, // VCMPGTUHo
- 268437308U, // VCMPGTUW
- 268437318U, // VCMPGTUWo
- 272041809U, // VCTSXS
- 272041817U, // VCTUXS
- 268470113U, // VEXPTEFP
- 268470123U, // VLOGEFP
- 268437364U, // VMADDFP
- 268437373U, // VMAXFP
- 268437381U, // VMAXSB
- 268437389U, // VMAXSH
- 268437397U, // VMAXSW
- 268437405U, // VMAXUB
- 268437413U, // VMAXUH
- 268437421U, // VMAXUW
- 268437429U, // VMHADDSHS
- 268437440U, // VMHRADDSHS
- 268437452U, // VMINFP
- 268437460U, // VMINSB
- 268437468U, // VMINSH
- 268437476U, // VMINSW
- 268437484U, // VMINUB
- 268437492U, // VMINUH
- 268437500U, // VMINUW
- 268437508U, // VMLADDUHM
- 268437519U, // VMRGHB
- 268437527U, // VMRGHH
- 268437535U, // VMRGHW
- 268437543U, // VMRGLB
- 268437551U, // VMRGLH
- 268437559U, // VMRGLW
- 268437567U, // VMSUMMBM
- 268437577U, // VMSUMSHM
- 268437587U, // VMSUMSHS
- 268437597U, // VMSUMUBM
- 268437607U, // VMSUMUHM
- 268437617U, // VMSUMUHS
- 268437627U, // VMULESB
- 268437636U, // VMULESH
- 268437645U, // VMULEUB
- 268437654U, // VMULEUH
- 268437663U, // VMULOSB
- 268437672U, // VMULOSH
- 268437681U, // VMULOUB
- 268437690U, // VMULOUH
- 268437699U, // VNMSUBFP
- 268437709U, // VNOR
- 268437715U, // VOR
- 268437720U, // VPERM
- 268437727U, // VPKPX
- 268437734U, // VPKSHSS
- 268437743U, // VPKSHUS
- 268437752U, // VPKSWSS
- 268437761U, // VPKSWUS
- 268437770U, // VPKUHUM
- 268437779U, // VPKUHUS
- 268437788U, // VPKUWUM
- 268437797U, // VPKUWUS
- 268470574U, // VREFP
- 268470581U, // VRFIM
- 268470588U, // VRFIN
- 268470595U, // VRFIP
- 268470602U, // VRFIZ
- 268437841U, // VRLB
- 268437847U, // VRLH
- 268437853U, // VRLW
- 268470627U, // VRSQRTEFP
- 268437870U, // VSEL
- 268437876U, // VSL
- 268437881U, // VSLB
- 268437887U, // VSLDOI
- 268437895U, // VSLH
- 268437901U, // VSLO
- 268437907U, // VSLW
- 272042393U, // VSPLTB
- 272042401U, // VSPLTH
- 272107945U, // VSPLTISB
- 272107955U, // VSPLTISH
- 272107965U, // VSPLTISW
- 272042439U, // VSPLTW
- 268437967U, // VSR
- 268437972U, // VSRAB
- 268437979U, // VSRAH
- 268437986U, // VSRAW
- 268437993U, // VSRB
- 268437999U, // VSRH
- 268438005U, // VSRO
- 268438011U, // VSRW
- 268438017U, // VSUBCUW
- 268438026U, // VSUBFP
- 268438034U, // VSUBSBS
- 268438043U, // VSUBSHS
- 268438052U, // VSUBSWS
- 268438061U, // VSUBUBM
- 268438070U, // VSUBUBS
- 268438079U, // VSUBUHM
- 268438088U, // VSUBUHS
- 268438097U, // VSUBUWM
- 268438106U, // VSUBUWS
- 268438115U, // VSUM2SWS
- 268438125U, // VSUM4SBS
- 268438135U, // VSUM4SHS
- 268438145U, // VSUM4UBS
- 268438155U, // VSUMSWS
- 268470932U, // VUPKHPX
- 268470941U, // VUPKHSB
- 268470950U, // VUPKHSH
- 268470959U, // VUPKLPX
- 268470968U, // VUPKLSB
- 268470977U, // VUPKLSH
- 268438218U, // VXOR
- 268962506U, // V_SET0
- 268438224U, // XOR
- 268438224U, // XOR8
- 268450517U, // XORI
- 268450517U, // XORI8
- 268450523U, // XORIS
- 268450523U, // XORIS8
- 0U
- };
-
- const char *AsmStrs =
- "DBG_VALUE\000add \000addc \000adde \000addi \000addic \000addic. \000ad"
- "dis \000addme \000addze \000\000and \000andc \000andis. \000andi. \000b"
- " \000b\000bctr\000bctrl\000bl \000bla \000cmpd \000cmpdi \000cmpld \000"
- "cmpldi \000cmplw \000cmplwi \000cmpw \000cmpwi \000cntlzd \000cntlzw \000"
- "creqv \000cror \000dcba \000dcbf \000dcbi \000dcbst \000dcbt \000dcbtst"
- " \000dcbz \000dcbzl \000divd \000divdu \000divw \000divwu \000dss \000d"
- "ssall\000dst \000dstst \000dststt \000dstt \000eqv \000extsb \000extsh "
- "\000extsw \000fabs \000fadd \000fadds \000fcfid \000fcmpu \000fctidz \000"
- "fctiwz \000fdiv \000fdivs \000fmadd \000fmadds \000fmr \000fmsub \000fm"
- "subs \000fmul \000fmuls \000fnabs \000fneg \000fnmadd \000fnmadds \000f"
- "nmsub \000fnmsubs \000frsp \000fsel \000fsqrt \000fsqrts \000fsub \000f"
- "subs \000la \000lbz \000lbzu \000lbzx \000ld \000ldarx \000ldu \000ldx "
- "\000ld 2, 8(\000ld 2, 40(1)\000lfd \000lfdx \000lfs \000lfsx \000lha \000"
- "lhau \000lhax \000lhbrx \000lhz \000lhzu \000lhzx \000li \000lis \000lv"
- "ebx \000lvehx \000lvewx \000lvsl \000lvsr \000lvx \000lvxl \000lwa \000"
- "lwarx \000lwax \000lwbrx \000lwz \000lwzu \000lwzx \000mcrf \000mfcr \000"
- "mfctr \000mffs \000mflr \000mfspr \000mfvscr \000mtcrf \000mtctr \000mt"
- "fsb0 \000mtfsb1 \000mtfsf \000mtlr \000mtspr 256, \000mtvscr \000mulhd "
- "\000mulhdu \000mulhw \000mulhwu \000mulld \000mulli \000mullw \000nand "
- "\000neg \000nop\000nor \000or \000orc \000ori \000oris \000rldcl \000rl"
- "dicl \000rldicr \000rldimi \000rlwimi \000rlwinm \000rlwinm. \000rlwnm "
- "\000sld \000slw \000srad \000sradi \000sraw \000srawi \000srd \000srw \000"
- "stb \000stbu \000stbx \000std \000stdcx. \000stdu \000stdux \000stdx \000"
- "stfd \000stfdu \000stfdx \000stfiwx \000stfs \000stfsu \000stfsx \000st"
- "h \000sthbrx \000sthu \000sthx \000stvebx \000stvehx \000stvewx \000stv"
- "x \000stvxl \000stw \000stwbrx \000stwcx. \000stwu \000stwux \000stwx \000"
- "subf \000subfc \000subfe \000subfic \000subfme \000subfze \000sync\000b"
- "a \000#TC_RETURNa \000#TC_RETURNa8 \000#TC_RETURNd \000#TC_RETURNd8 \000"
- "#TC_RETURNr \000#TC_RETURNr8 \000trap\000UPDATE_VRSAVE \000vaddcuw \000"
- "vaddfp \000vaddsbs \000vaddshs \000vaddsws \000vaddubm \000vaddubs \000"
- "vadduhm \000vadduhs \000vadduwm \000vadduws \000vand \000vandc \000vavg"
- "sb \000vavgsh \000vavgsw \000vavgub \000vavguh \000vavguw \000vcfsx \000"
- "vcfux \000vcmpbfp \000vcmpbfp. \000vcmpeqfp \000vcmpeqfp. \000vcmpequb "
- "\000vcmpequb. \000vcmpequh \000vcmpequh. \000vcmpequw \000vcmpequw. \000"
- "vcmpgefp \000vcmpgefp. \000vcmpgtfp \000vcmpgtfp. \000vcmpgtsb \000vcmp"
- "gtsb. \000vcmpgtsh \000vcmpgtsh. \000vcmpgtsw \000vcmpgtsw. \000vcmpgtu"
- "b \000vcmpgtub. \000vcmpgtuh \000vcmpgtuh. \000vcmpgtuw \000vcmpgtuw. \000"
- "vctsxs \000vctuxs \000vexptefp \000vlogefp \000vmaddfp \000vmaxfp \000v"
- "maxsb \000vmaxsh \000vmaxsw \000vmaxub \000vmaxuh \000vmaxuw \000vmhadd"
- "shs \000vmhraddshs \000vminfp \000vminsb \000vminsh \000vminsw \000vmin"
- "ub \000vminuh \000vminuw \000vmladduhm \000vmrghb \000vmrghh \000vmrghw"
- " \000vmrglb \000vmrglh \000vmrglw \000vmsummbm \000vmsumshm \000vmsumsh"
- "s \000vmsumubm \000vmsumuhm \000vmsumuhs \000vmulesb \000vmulesh \000vm"
- "uleub \000vmuleuh \000vmulosb \000vmulosh \000vmuloub \000vmulouh \000v"
- "nmsubfp \000vnor \000vor \000vperm \000vpkpx \000vpkshss \000vpkshus \000"
- "vpkswss \000vpkswus \000vpkuhum \000vpkuhus \000vpkuwum \000vpkuwus \000"
- "vrefp \000vrfim \000vrfin \000vrfip \000vrfiz \000vrlb \000vrlh \000vrl"
- "w \000vrsqrtefp \000vsel \000vsl \000vslb \000vsldoi \000vslh \000vslo "
- "\000vslw \000vspltb \000vsplth \000vspltisb \000vspltish \000vspltisw \000"
- "vspltw \000vsr \000vsrab \000vsrah \000vsraw \000vsrb \000vsrh \000vsro"
- " \000vsrw \000vsubcuw \000vsubfp \000vsubsbs \000vsubshs \000vsubsws \000"
- "vsububm \000vsububs \000vsubuhm \000vsubuhs \000vsubuwm \000vsubuws \000"
- "vsum2sws \000vsum4sbs \000vsum4shs \000vsum4ubs \000vsumsws \000vupkhpx"
- " \000vupkhsb \000vupkhsh \000vupklpx \000vupklsb \000vupklsh \000vxor \000"
- "xor \000xori \000xoris \000";
-
- O << "\t";
-
- // Emit the opcode for the instruction.
- unsigned Bits = OpInfo[MI->getOpcode()];
- assert(Bits != 0 && "Cannot print this instruction.");
- O << AsmStrs+(Bits & 4095)-1;
-
-
- // Fragment 0 encoded into 4 bits for 14 unique commands.
- switch ((Bits >> 28) & 15) {
- default: // unreachable.
- case 0:
- // DBG_VALUE, BCTR, BCTRL8_Darwin, BCTRL8_ELF, BCTRL_Darwin, BCTRL_SVR4, ...
- return;
- break;
- case 1:
- // ADD4, ADD8, ADDC, ADDC8, ADDE, ADDE8, ADDI, ADDI8, ADDIC, ADDIC8, ADDI...
- printOperand(MI, 0);
- break;
- case 2:
- // ADJCALLSTACKDOWN, ADJCALLSTACKUP, ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP...
- PrintSpecial(MI, "comment");
- break;
- case 3:
- // B
- printBranchOperand(MI, 0);
- return;
- break;
- case 4:
- // BCC, BLR
- printPredicateOperand(MI, 0, "cc");
- break;
- case 5:
- // BL8_Darwin, BL8_ELF, BL_Darwin, BL_SVR4, TAILB, TAILB8, TCRETURNdi, TC...
- printCallOperand(MI, 0);
- break;
- case 6:
- // BLA8_Darwin, BLA8_ELF, BLA_Darwin, BLA_SVR4, TAILBA, TAILBA8, TCRETURN...
- printAbsAddrOperand(MI, 0);
- break;
- case 7:
- // DCBA, DCBF, DCBI, DCBST, DCBT, DCBTST, DCBZ, DCBZL
- printMemRegReg(MI, 0);
- return;
- break;
- case 8:
- // DSS
- printU5ImmOperand(MI, 1);
- return;
- break;
- case 9:
- // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64
- printOperand(MI, 2);
- O << ", ";
- printOperand(MI, 3);
- O << ", ";
- printU5ImmOperand(MI, 1);
- return;
- break;
- case 10:
- // MTCRF
- printcrbitm(MI, 0);
- O << ", ";
- printOperand(MI, 1);
- return;
- break;
- case 11:
- // MTFSB0, MTFSB1
- printU5ImmOperand(MI, 0);
- return;
- break;
- case 12:
- // MTFSF, STBU, STBU8, STDU, STFDU, STFSU, STHU, STHU8, STWU
- printOperand(MI, 1);
- O << ", ";
- break;
- case 13:
- // MovePCtoLR, MovePCtoLR8
- printPICLabel(MI, 0);
- return;
- break;
- }
-
-
- // Fragment 1 encoded into 6 bits for 47 unique commands.
- switch ((Bits >> 22) & 63) {
- default: // unreachable.
- case 0:
- // ADD4, ADD8, ADDC, ADDC8, ADDE, ADDE8, ADDI, ADDI8, ADDIC, ADDIC8, ADDI...
- O << ", ";
- break;
- case 1:
- // ADJCALLSTACKDOWN
- O << " ADJCALLSTACKDOWN";
- return;
- break;
- case 2:
- // ADJCALLSTACKUP
- O << " ADJCALLSTACKUP";
- return;
- break;
- case 3:
- // ATOMIC_CMP_SWAP_I16
- O << " ATOMIC_CMP_SWAP_I16 PSEUDO!";
- return;
- break;
- case 4:
- // ATOMIC_CMP_SWAP_I32
- O << " ATOMIC_CMP_SWAP_I32 PSEUDO!";
- return;
- break;
- case 5:
- // ATOMIC_CMP_SWAP_I64
- O << " ATOMIC_CMP_SWAP_I64 PSEUDO!";
- return;
- break;
- case 6:
- // ATOMIC_CMP_SWAP_I8
- O << " ATOMIC_CMP_SWAP_I8 PSEUDO!";
- return;
- break;
- case 7:
- // ATOMIC_LOAD_ADD_I16
- O << " ATOMIC_LOAD_ADD_I16 PSEUDO!";
- return;
- break;
- case 8:
- // ATOMIC_LOAD_ADD_I32
- O << " ATOMIC_LOAD_ADD_I32 PSEUDO!";
- return;
- break;
- case 9:
- // ATOMIC_LOAD_ADD_I64
- O << " ATOMIC_LOAD_ADD_I64 PSEUDO!";
- return;
- break;
- case 10:
- // ATOMIC_LOAD_ADD_I8
- O << " ATOMIC_LOAD_ADD_I8 PSEUDO!";
- return;
- break;
- case 11:
- // ATOMIC_LOAD_AND_I16
- O << " ATOMIC_LOAD_AND_I16 PSEUDO!";
- return;
- break;
- case 12:
- // ATOMIC_LOAD_AND_I32
- O << " ATOMIC_LOAD_AND_I32 PSEUDO!";
- return;
- break;
- case 13:
- // ATOMIC_LOAD_AND_I64
- O << " ATOMIC_LOAD_AND_I64 PSEUDO!";
- return;
- break;
- case 14:
- // ATOMIC_LOAD_AND_I8
- O << " ATOMIC_LOAD_AND_I8 PSEUDO!";
- return;
- break;
- case 15:
- // ATOMIC_LOAD_NAND_I16
- O << " ATOMIC_LOAD_NAND_I16 PSEUDO!";
- return;
- break;
- case 16:
- // ATOMIC_LOAD_NAND_I32
- O << " ATOMIC_LOAD_NAND_I32 PSEUDO!";
- return;
- break;
- case 17:
- // ATOMIC_LOAD_NAND_I64
- O << " ATOMIC_LOAD_NAND_I64 PSEUDO!";
- return;
- break;
- case 18:
- // ATOMIC_LOAD_NAND_I8
- O << " ATOMIC_LOAD_NAND_I8 PSEUDO!";
- return;
- break;
- case 19:
- // ATOMIC_LOAD_OR_I16
- O << " ATOMIC_LOAD_OR_I16 PSEUDO!";
- return;
- break;
- case 20:
- // ATOMIC_LOAD_OR_I32
- O << " ATOMIC_LOAD_OR_I32 PSEUDO!";
- return;
- break;
- case 21:
- // ATOMIC_LOAD_OR_I64
- O << " ATOMIC_LOAD_OR_I64 PSEUDO!";
- return;
- break;
- case 22:
- // ATOMIC_LOAD_OR_I8
- O << " ATOMIC_LOAD_OR_I8 PSEUDO!";
- return;
- break;
- case 23:
- // ATOMIC_LOAD_SUB_I16
- O << " ATOMIC_LOAD_SUB_I16 PSEUDO!";
- return;
- break;
- case 24:
- // ATOMIC_LOAD_SUB_I32
- O << " ATOMIC_LOAD_SUB_I32 PSEUDO!";
- return;
- break;
- case 25:
- // ATOMIC_LOAD_SUB_I64
- O << " ATOMIC_LOAD_SUB_I64 PSEUDO!";
- return;
- break;
- case 26:
- // ATOMIC_LOAD_SUB_I8
- O << " ATOMIC_LOAD_SUB_I8 PSEUDO!";
- return;
- break;
- case 27:
- // ATOMIC_LOAD_XOR_I16
- O << " ATOMIC_LOAD_XOR_I16 PSEUDO!";
- return;
- break;
- case 28:
- // ATOMIC_LOAD_XOR_I32
- O << " ATOMIC_LOAD_XOR_I32 PSEUDO!";
- return;
- break;
- case 29:
- // ATOMIC_LOAD_XOR_I64
- O << " ATOMIC_LOAD_XOR_I64 PSEUDO!";
- return;
- break;
- case 30:
- // ATOMIC_LOAD_XOR_I8
- O << " ATOMIC_LOAD_XOR_I8 PSEUDO!";
- return;
- break;
- case 31:
- // ATOMIC_SWAP_I16
- O << " ATOMIC_SWAP_I16 PSEUDO!";
- return;
- break;
- case 32:
- // ATOMIC_SWAP_I32
- O << " ATOMIC_SWAP_I32 PSEUDO!";
- return;
- break;
- case 33:
- // ATOMIC_SWAP_I64
- O << " ATOMIC_SWAP_I64 PSEUDO!";
- return;
- break;
- case 34:
- // ATOMIC_SWAP_I8
- O << " ATOMIC_SWAP_I8 PSEUDO!";
- return;
- break;
- case 35:
- // BCC, TCRETURNai, TCRETURNai8, TCRETURNdi, TCRETURNdi8, TCRETURNri, TCR...
- O << ' ';
- break;
- case 36:
- // BL8_Darwin, BL8_ELF, BLA8_Darwin, BLA8_ELF, BLA_Darwin, BLA_SVR4, BL_D...
- return;
- break;
- case 37:
- // BLR
- O << "lr ";
- printPredicateOperand(MI, 0, "reg");
- return;
- break;
- case 38:
- // DYNALLOC
- O << " DYNALLOC ";
- printOperand(MI, 0);
- O << ", ";
- printOperand(MI, 1);
- O << ", ";
- printMemRegImm(MI, 2);
- return;
- break;
- case 39:
- // DYNALLOC8
- O << " DYNALLOC8 ";
- printOperand(MI, 0);
- O << ", ";
- printOperand(MI, 1);
- O << ", ";
- printMemRegImm(MI, 2);
- return;
- break;
- case 40:
- // LDinto_toc
- O << ')';
- return;
- break;
- case 41:
- // MFVRSAVE
- O << ", 256";
- return;
- break;
- case 42:
- // MTFSF
- printOperand(MI, 2);
- return;
- break;
- case 43:
- // SELECT_CC_F4, SELECT_CC_F8, SELECT_CC_I4, SELECT_CC_I8, SELECT_CC_VRRC
- O << " SELECT_CC PSEUDO!";
- return;
- break;
- case 44:
- // SPILL_CR
- O << " SPILL_CR ";
- printOperand(MI, 0);
- O << ' ';
- printMemRegImm(MI, 1);
- return;
- break;
- case 45:
- // STBU, STBU8, STFDU, STFSU, STHU, STHU8, STWU
- printSymbolLo(MI, 2);
- O << '(';
- printOperand(MI, 3);
- O << ')';
- return;
- break;
- case 46:
- // STDU
- printS16X4ImmOperand(MI, 2);
- O << '(';
- printOperand(MI, 3);
- O << ')';
- return;
- break;
- }
-
-
- // Fragment 2 encoded into 4 bits for 15 unique commands.
- switch ((Bits >> 18) & 15) {
- default: // unreachable.
- case 0:
- // ADD4, ADD8, ADDC, ADDC8, ADDE, ADDE8, ADDI, ADDI8, ADDIC, ADDIC8, ADDI...
- printOperand(MI, 1);
- break;
- case 1:
- // BCC
- printPredicateOperand(MI, 0, "reg");
- O << ", ";
- printBranchOperand(MI, 2);
- return;
- break;
- case 2:
- // CRSET, V_SET0
- printOperand(MI, 0);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 3:
- // LA, LHAU8
- printSymbolLo(MI, 2);
- O << '(';
- break;
- case 4:
- // LBZ, LBZ8, LFD, LFS, LHA, LHA8, LHZ, LHZ8, LWZ, LWZ8, STB, STB8, STFD,...
- printMemRegImm(MI, 1);
- return;
- break;
- case 5:
- // LBZU, LBZU8, LFDU, LFSU, LHAU, LHZU, LHZU8, LWZU, LWZU8
- printMemRegImm(MI, 2);
- return;
- break;
- case 6:
- // LBZX, LBZX8, LDARX, LDX, LFDX, LFSX, LHAX, LHAX8, LHBRX, LHZX, LHZX8, ...
- printMemRegReg(MI, 1);
- return;
- break;
- case 7:
- // LD, LWA, STD, STD_32
- printMemRegImmShifted(MI, 1);
- return;
- break;
- case 8:
- // LDU
- printMemRegImmShifted(MI, 2);
- return;
- break;
- case 9:
- // LDtoc
- printTOCEntryLabel(MI, 1);
- O << '(';
- printOperand(MI, 2);
- O << ')';
- return;
- break;
- case 10:
- // LI, LI8
- printSymbolLo(MI, 1);
- return;
- break;
- case 11:
- // LIS, LIS8
- printSymbolHi(MI, 1);
- return;
- break;
- case 12:
- // MFOCRF
- printcrbitm(MI, 1);
- return;
- break;
- case 13:
- // RLDIMI, RLWIMI, VCFSX, VCFUX, VCTSXS, VCTUXS, VSPLTB, VSPLTH, VSPLTW
- printOperand(MI, 2);
- O << ", ";
- break;
- case 14:
- // VSPLTISB, VSPLTISH, VSPLTISW
- printS5ImmOperand(MI, 1);
- return;
- break;
- }
-
-
- // Fragment 3 encoded into 3 bits for 7 unique commands.
- switch ((Bits >> 15) & 7) {
- default: // unreachable.
- case 0:
- // ADD4, ADD8, ADDC, ADDC8, ADDE, ADDE8, ADDI, ADDI8, ADDIC, ADDIC8, ADDI...
- O << ", ";
- break;
- case 1:
- // ADDME, ADDME8, ADDZE, ADDZE8, CNTLZD, CNTLZW, EXTSB, EXTSB8, EXTSH, EX...
- return;
- break;
- case 2:
- // LA
- printOperand(MI, 1);
- O << ')';
- return;
- break;
- case 3:
- // LHAU8
- printOperand(MI, 3);
- O << ')';
- return;
- break;
- case 4:
- // RLDIMI
- printU6ImmOperand(MI, 3);
- O << ", ";
- printU6ImmOperand(MI, 4);
- return;
- break;
- case 5:
- // RLWIMI
- printU5ImmOperand(MI, 3);
- O << ", ";
- printU5ImmOperand(MI, 4);
- O << ", ";
- printU5ImmOperand(MI, 5);
- return;
- break;
- case 6:
- // VCFSX, VCFUX, VCTSXS, VCTUXS, VSPLTB, VSPLTH, VSPLTW
- printU5ImmOperand(MI, 1);
- return;
- break;
- }
-
-
- // Fragment 4 encoded into 3 bits for 6 unique commands.
- switch ((Bits >> 12) & 7) {
- default: // unreachable.
- case 0:
- // ADD4, ADD8, ADDC, ADDC8, ADDE, ADDE8, AND, AND8, ANDC, ANDC8, CMPD, CM...
- printOperand(MI, 2);
- break;
- case 1:
- // ADDI, ADDI8, ADDIC, ADDIC8, ADDICo, CMPDI, CMPWI, MULLI, SUBFIC, SUBFI...
- printS16ImmOperand(MI, 2);
- return;
- break;
- case 2:
- // ADDIS, ADDIS8
- printSymbolHi(MI, 2);
- return;
- break;
- case 3:
- // ANDISo, ANDISo8, ANDIo, ANDIo8, CMPLDI, CMPLWI, ORI, ORI8, ORIS, ORIS8...
- printU16ImmOperand(MI, 2);
- return;
- break;
- case 4:
- // RLDICL, RLDICR, SRADI
- printU6ImmOperand(MI, 2);
- break;
- case 5:
- // RLWINM, RLWINMo, SRAWI
- printU5ImmOperand(MI, 2);
- break;
- }
-
- switch (MI->getOpcode()) {
- case PPC::ADD4:
- case PPC::ADD8:
- case PPC::ADDC:
- case PPC::ADDC8:
- case PPC::ADDE:
- case PPC::ADDE8:
- case PPC::AND:
- case PPC::AND8:
- case PPC::ANDC:
- case PPC::ANDC8:
- case PPC::CMPD:
- case PPC::CMPLD:
- case PPC::CMPLW:
- case PPC::CMPW:
- case PPC::CREQV:
- case PPC::CROR:
- case PPC::DIVD:
- case PPC::DIVDU:
- case PPC::DIVW:
- case PPC::DIVWU:
- case PPC::EQV:
- case PPC::EQV8:
- case PPC::FADD:
- case PPC::FADDS:
- case PPC::FADDrtz:
- case PPC::FCMPUD:
- case PPC::FCMPUS:
- case PPC::FDIV:
- case PPC::FDIVS:
- case PPC::FMUL:
- case PPC::FMULS:
- case PPC::FSUB:
- case PPC::FSUBS:
- case PPC::MULHD:
- case PPC::MULHDU:
- case PPC::MULHW:
- case PPC::MULHWU:
- case PPC::MULLD:
- case PPC::MULLW:
- case PPC::NAND:
- case PPC::NAND8:
- case PPC::NOR:
- case PPC::NOR8:
- case PPC::OR:
- case PPC::OR4To8:
- case PPC::OR8:
- case PPC::OR8To4:
- case PPC::ORC:
- case PPC::ORC8:
- case PPC::SLD:
- case PPC::SLW:
- case PPC::SRAD:
- case PPC::SRADI:
- case PPC::SRAW:
- case PPC::SRAWI:
- case PPC::SRD:
- case PPC::SRW:
- case PPC::STWUX:
- case PPC::SUBF:
- case PPC::SUBF8:
- case PPC::SUBFC:
- case PPC::SUBFC8:
- case PPC::SUBFE:
- case PPC::SUBFE8:
- case PPC::VADDCUW:
- case PPC::VADDFP:
- case PPC::VADDSBS:
- case PPC::VADDSHS:
- case PPC::VADDSWS:
- case PPC::VADDUBM:
- case PPC::VADDUBS:
- case PPC::VADDUHM:
- case PPC::VADDUHS:
- case PPC::VADDUWM:
- case PPC::VADDUWS:
- case PPC::VAND:
- case PPC::VANDC:
- case PPC::VAVGSB:
- case PPC::VAVGSH:
- case PPC::VAVGSW:
- case PPC::VAVGUB:
- case PPC::VAVGUH:
- case PPC::VAVGUW:
- case PPC::VCMPBFP:
- case PPC::VCMPBFPo:
- case PPC::VCMPEQFP:
- case PPC::VCMPEQFPo:
- case PPC::VCMPEQUB:
- case PPC::VCMPEQUBo:
- case PPC::VCMPEQUH:
- case PPC::VCMPEQUHo:
- case PPC::VCMPEQUW:
- case PPC::VCMPEQUWo:
- case PPC::VCMPGEFP:
- case PPC::VCMPGEFPo:
- case PPC::VCMPGTFP:
- case PPC::VCMPGTFPo:
- case PPC::VCMPGTSB:
- case PPC::VCMPGTSBo:
- case PPC::VCMPGTSH:
- case PPC::VCMPGTSHo:
- case PPC::VCMPGTSW:
- case PPC::VCMPGTSWo:
- case PPC::VCMPGTUB:
- case PPC::VCMPGTUBo:
- case PPC::VCMPGTUH:
- case PPC::VCMPGTUHo:
- case PPC::VCMPGTUW:
- case PPC::VCMPGTUWo:
- case PPC::VMAXFP:
- case PPC::VMAXSB:
- case PPC::VMAXSH:
- case PPC::VMAXSW:
- case PPC::VMAXUB:
- case PPC::VMAXUH:
- case PPC::VMAXUW:
- case PPC::VMINFP:
- case PPC::VMINSB:
- case PPC::VMINSH:
- case PPC::VMINSW:
- case PPC::VMINUB:
- case PPC::VMINUH:
- case PPC::VMINUW:
- case PPC::VMRGHB:
- case PPC::VMRGHH:
- case PPC::VMRGHW:
- case PPC::VMRGLB:
- case PPC::VMRGLH:
- case PPC::VMRGLW:
- case PPC::VMULESB:
- case PPC::VMULESH:
- case PPC::VMULEUB:
- case PPC::VMULEUH:
- case PPC::VMULOSB:
- case PPC::VMULOSH:
- case PPC::VMULOUB:
- case PPC::VMULOUH:
- case PPC::VNOR:
- case PPC::VOR:
- case PPC::VPKPX:
- case PPC::VPKSHSS:
- case PPC::VPKSHUS:
- case PPC::VPKSWSS:
- case PPC::VPKSWUS:
- case PPC::VPKUHUM:
- case PPC::VPKUHUS:
- case PPC::VPKUWUM:
- case PPC::VPKUWUS:
- case PPC::VRLB:
- case PPC::VRLH:
- case PPC::VRLW:
- case PPC::VSL:
- case PPC::VSLB:
- case PPC::VSLH:
- case PPC::VSLO:
- case PPC::VSLW:
- case PPC::VSR:
- case PPC::VSRAB:
- case PPC::VSRAH:
- case PPC::VSRAW:
- case PPC::VSRB:
- case PPC::VSRH:
- case PPC::VSRO:
- case PPC::VSRW:
- case PPC::VSUBCUW:
- case PPC::VSUBFP:
- case PPC::VSUBSBS:
- case PPC::VSUBSHS:
- case PPC::VSUBSWS:
- case PPC::VSUBUBM:
- case PPC::VSUBUBS:
- case PPC::VSUBUHM:
- case PPC::VSUBUHS:
- case PPC::VSUBUWM:
- case PPC::VSUBUWS:
- case PPC::VSUM2SWS:
- case PPC::VSUM4SBS:
- case PPC::VSUM4SHS:
- case PPC::VSUM4UBS:
- case PPC::VSUMSWS:
- case PPC::VXOR:
- case PPC::XOR:
- case PPC::XOR8:
- return;
- break;
- case PPC::FMADD:
- case PPC::FMADDS:
- case PPC::FMSUB:
- case PPC::FMSUBS:
- case PPC::FNMADD:
- case PPC::FNMADDS:
- case PPC::FNMSUB:
- case PPC::FNMSUBS:
- case PPC::FSELD:
- case PPC::FSELS:
- case PPC::RLDCL:
- case PPC::RLDICL:
- case PPC::RLDICR:
- case PPC::VMADDFP:
- case PPC::VMHADDSHS:
- case PPC::VMHRADDSHS:
- case PPC::VMLADDUHM:
- case PPC::VMSUMMBM:
- case PPC::VMSUMSHM:
- case PPC::VMSUMSHS:
- case PPC::VMSUMUBM:
- case PPC::VMSUMUHM:
- case PPC::VMSUMUHS:
- case PPC::VNMSUBFP:
- case PPC::VPERM:
- case PPC::VSEL:
- case PPC::VSLDOI:
- O << ", ";
- switch (MI->getOpcode()) {
- case PPC::FMADD:
- case PPC::FMADDS:
- case PPC::FMSUB:
- case PPC::FMSUBS:
- case PPC::FNMADD:
- case PPC::FNMADDS:
- case PPC::FNMSUB:
- case PPC::FNMSUBS:
- case PPC::FSELD:
- case PPC::FSELS:
- case PPC::VMADDFP:
- case PPC::VMHADDSHS:
- case PPC::VMHRADDSHS:
- case PPC::VMLADDUHM:
- case PPC::VMSUMMBM:
- case PPC::VMSUMSHM:
- case PPC::VMSUMSHS:
- case PPC::VMSUMUBM:
- case PPC::VMSUMUHM:
- case PPC::VMSUMUHS:
- case PPC::VNMSUBFP:
- case PPC::VPERM:
- case PPC::VSEL: printOperand(MI, 3); break;
- case PPC::RLDCL:
- case PPC::RLDICL:
- case PPC::RLDICR: printU6ImmOperand(MI, 3); break;
- case PPC::VSLDOI: printU5ImmOperand(MI, 3); break;
- }
- return;
- break;
- case PPC::RLWINM:
- case PPC::RLWINMo:
- case PPC::RLWNM:
- O << ", ";
- printU5ImmOperand(MI, 3);
- O << ", ";
- printU5ImmOperand(MI, 4);
- return;
- break;
- }
- return;
-}
-
-
-/// getRegisterName - This method is automatically generated by tblgen
-/// from the register set description. This returns the assembler name
-/// for the specified register.
-const char *PPCAsmPrinter::getRegisterName(unsigned RegNo) {
- assert(RegNo && RegNo < 176 && "Invalid register number!");
-
- static const unsigned RegAsmOffset[] = {
- 0, 3, 7, 9, 11, 13, 15, 19, 21, 23, 25, 27, 31, 34,
- 36, 38, 41, 45, 48, 51, 54, 57, 61, 64, 67, 70, 73, 77,
- 80, 83, 86, 89, 93, 96, 99, 102, 105, 109, 112, 115, 118, 121,
- 121, 125, 128, 131, 135, 139, 143, 147, 151, 155, 159, 163, 167, 171,
- 174, 178, 182, 186, 190, 194, 198, 202, 206, 210, 214, 217, 221, 225,
- 228, 231, 234, 237, 240, 243, 243, 246, 249, 252, 256, 260, 264, 268,
- 272, 276, 280, 284, 288, 292, 295, 299, 303, 307, 311, 315, 319, 323,
- 327, 331, 335, 338, 342, 346, 349, 352, 355, 358, 361, 364, 382, 385,
- 388, 392, 396, 400, 404, 408, 412, 416, 420, 424, 428, 431, 435, 439,
- 443, 447, 451, 455, 459, 463, 467, 471, 474, 478, 482, 485, 488, 491,
- 494, 497, 500, 246, 249, 252, 256, 260, 264, 268, 272, 276, 280, 284,
- 288, 292, 295, 299, 303, 307, 311, 315, 319, 323, 327, 331, 335, 338,
- 342, 346, 349, 352, 355, 358, 361, 0
- };
-
- const char *AsmStrs =
- "ca\000cr0\0002\0001\0000\0003\000cr1\0006\0005\0004\0007\000cr2\00010\000"
- "9\0008\00011\000cr3\00014\00013\00012\00015\000cr4\00018\00017\00016\000"
- "19\000cr5\00022\00021\00020\00023\000cr6\00026\00025\00024\00027\000cr7"
- "\00030\00029\00028\00031\000ctr\000f0\000f1\000f10\000f11\000f12\000f13"
- "\000f14\000f15\000f16\000f17\000f18\000f19\000f2\000f20\000f21\000f22\000"
- "f23\000f24\000f25\000f26\000f27\000f28\000f29\000f3\000f30\000f31\000f4"
- "\000f5\000f6\000f7\000f8\000f9\000lr\000r0\000r1\000r10\000r11\000r12\000"
- "r13\000r14\000r15\000r16\000r17\000r18\000r19\000r2\000r20\000r21\000r2"
- "2\000r23\000r24\000r25\000r26\000r27\000r28\000r29\000r3\000r30\000r31\000"
- "r4\000r5\000r6\000r7\000r8\000r9\000**ROUNDING MODE**\000v0\000v1\000v1"
- "0\000v11\000v12\000v13\000v14\000v15\000v16\000v17\000v18\000v19\000v2\000"
- "v20\000v21\000v22\000v23\000v24\000v25\000v26\000v27\000v28\000v29\000v"
- "3\000v30\000v31\000v4\000v5\000v6\000v7\000v8\000v9\000VRsave\000";
- return AsmStrs+RegAsmOffset[RegNo-1];
-}
-
-
-#ifdef GET_INSTRUCTION_NAME
-#undef GET_INSTRUCTION_NAME
-
-/// getInstructionName: This method is automatically generated by tblgen
-/// from the instruction set description. This returns the enum name of the
-/// specified instruction.
-const char *PPCAsmPrinter::getInstructionName(unsigned Opcode) {
- assert(Opcode < 519 && "Invalid instruction number!");
-
- static const unsigned InstAsmOffset[] = {
- 0, 4, 14, 24, 33, 42, 47, 62, 76, 89, 103, 120, 130, 135,
- 140, 145, 151, 156, 162, 167, 173, 179, 186, 193, 199, 206, 212, 219,
- 225, 232, 249, 264, 268, 273, 278, 284, 291, 299, 305, 312, 332, 352,
- 372, 391, 411, 431, 451, 470, 490, 510, 530, 549, 570, 591, 612, 632,
- 651, 670, 689, 707, 727, 747, 767, 786, 806, 826, 846, 865, 881, 897,
- 913, 928, 930, 934, 939, 953, 964, 977, 988, 999, 1007, 1019, 1028, 1039,
- 1048, 1052, 1062, 1070, 1075, 1081, 1087, 1094, 1100, 1107, 1112, 1118, 1125, 1132,
- 1138, 1143, 1149, 1154, 1159, 1164, 1170, 1175, 1182, 1187, 1193, 1198, 1204, 1209,
- 1215, 1219, 1226, 1230, 1236, 1242, 1250, 1257, 1266, 1271, 1278, 1287, 1297, 1301,
- 1306, 1312, 1319, 1325, 1332, 1338, 1347, 1359, 1365, 1371, 1376, 1382, 1390, 1396,
- 1403, 1410, 1417, 1424, 1429, 1435, 1441, 1448, 1452, 1458, 1464, 1471, 1476, 1482,
- 1489, 1496, 1502, 1508, 1515, 1523, 1530, 1538, 1543, 1549, 1555, 1561, 1568, 1573,
- 1579, 1582, 1586, 1591, 1596, 1602, 1607, 1613, 1616, 1622, 1626, 1630, 1641, 1647,
- 1661, 1665, 1670, 1675, 1679, 1684, 1689, 1693, 1698, 1703, 1709, 1714, 1720, 1726,
- 1730, 1735, 1740, 1746, 1751, 1757, 1760, 1764, 1768, 1773, 1779, 1785, 1791, 1796,
- 1801, 1805, 1810, 1814, 1820, 1825, 1831, 1835, 1840, 1845, 1851, 1856, 1862, 1867,
- 1872, 1878, 1885, 1890, 1895, 1901, 1908, 1917, 1924, 1930, 1936, 1943, 1950, 1957,
- 1963, 1968, 1974, 1983, 1990, 1996, 2003, 2009, 2016, 2022, 2028, 2034, 2045, 2057,
- 2062, 2068, 2072, 2077, 2081, 2085, 2090, 2093, 2100, 2104, 2111, 2115, 2120, 2124,
- 2129, 2134, 2140, 2146, 2153, 2160, 2167, 2174, 2181, 2189, 2195, 2208, 2221, 2234,
- 2247, 2262, 2266, 2270, 2279, 2284, 2290, 2295, 2301, 2305, 2309, 2313, 2318, 2323,
- 2329, 2334, 2340, 2344, 2350, 2355, 2361, 2366, 2374, 2381, 2386, 2392, 2398, 2405,
- 2410, 2416, 2422, 2426, 2431, 2438, 2443, 2449, 2454, 2460, 2467, 2474, 2481, 2486,
- 2492, 2496, 2501, 2508, 2514, 2519, 2525, 2530, 2536, 2541, 2547, 2553, 2560, 2566,
- 2573, 2580, 2588, 2595, 2603, 2610, 2618, 2623, 2629, 2636, 2643, 2651, 2660, 2670,
- 2681, 2693, 2704, 2716, 2727, 2739, 2744, 2758, 2766, 2773, 2781, 2789, 2797, 2805,
- 2813, 2821, 2829, 2837, 2845, 2850, 2856, 2863, 2870, 2877, 2884, 2891, 2898, 2904,
- 2910, 2918, 2927, 2936, 2946, 2955, 2965, 2974, 2984, 2993, 3003, 3012, 3022, 3031,
- 3041, 3050, 3060, 3069, 3079, 3088, 3098, 3107, 3117, 3126, 3136, 3145, 3155, 3162,
- 3169, 3178, 3186, 3194, 3201, 3208, 3215, 3222, 3229, 3236, 3243, 3253, 3264, 3271,
- 3278, 3285, 3292, 3299, 3306, 3313, 3323, 3330, 3337, 3344, 3351, 3358, 3365, 3374,
- 3383, 3392, 3401, 3410, 3419, 3427, 3435, 3443, 3451, 3459, 3467, 3475, 3483, 3492,
- 3497, 3501, 3507, 3513, 3521, 3529, 3537, 3545, 3553, 3561, 3569, 3577, 3583, 3589,
- 3595, 3601, 3607, 3612, 3617, 3622, 3632, 3637, 3641, 3646, 3653, 3658, 3663, 3668,
- 3675, 3682, 3691, 3700, 3709, 3716, 3720, 3726, 3732, 3738, 3743, 3748, 3753, 3758,
- 3766, 3773, 3781, 3789, 3797, 3805, 3813, 3821, 3829, 3837, 3845, 3854, 3863, 3872,
- 3881, 3889, 3897, 3905, 3913, 3921, 3929, 3937, 3942, 3949, 3953, 3958, 3963, 3969,
- 3975, 0
- };
-
- const char *Strs =
- "PHI\000INLINEASM\000DBG_LABEL\000EH_LABEL\000GC_LABEL\000KILL\000EXTRAC"
- "T_SUBREG\000INSERT_SUBREG\000IMPLICIT_DEF\000SUBREG_TO_REG\000COPY_TO_R"
- "EGCLASS\000DBG_VALUE\000ADD4\000ADD8\000ADDC\000ADDC8\000ADDE\000ADDE8\000"
- "ADDI\000ADDI8\000ADDIC\000ADDIC8\000ADDICo\000ADDIS\000ADDIS8\000ADDME\000"
- "ADDME8\000ADDZE\000ADDZE8\000ADJCALLSTACKDOWN\000ADJCALLSTACKUP\000AND\000"
- "AND8\000ANDC\000ANDC8\000ANDISo\000ANDISo8\000ANDIo\000ANDIo8\000ATOMIC"
- "_CMP_SWAP_I16\000ATOMIC_CMP_SWAP_I32\000ATOMIC_CMP_SWAP_I64\000ATOMIC_C"
- "MP_SWAP_I8\000ATOMIC_LOAD_ADD_I16\000ATOMIC_LOAD_ADD_I32\000ATOMIC_LOAD"
- "_ADD_I64\000ATOMIC_LOAD_ADD_I8\000ATOMIC_LOAD_AND_I16\000ATOMIC_LOAD_AN"
- "D_I32\000ATOMIC_LOAD_AND_I64\000ATOMIC_LOAD_AND_I8\000ATOMIC_LOAD_NAND_"
- "I16\000ATOMIC_LOAD_NAND_I32\000ATOMIC_LOAD_NAND_I64\000ATOMIC_LOAD_NAND"
- "_I8\000ATOMIC_LOAD_OR_I16\000ATOMIC_LOAD_OR_I32\000ATOMIC_LOAD_OR_I64\000"
- "ATOMIC_LOAD_OR_I8\000ATOMIC_LOAD_SUB_I16\000ATOMIC_LOAD_SUB_I32\000ATOM"
- "IC_LOAD_SUB_I64\000ATOMIC_LOAD_SUB_I8\000ATOMIC_LOAD_XOR_I16\000ATOMIC_"
- "LOAD_XOR_I32\000ATOMIC_LOAD_XOR_I64\000ATOMIC_LOAD_XOR_I8\000ATOMIC_SWA"
- "P_I16\000ATOMIC_SWAP_I32\000ATOMIC_SWAP_I64\000ATOMIC_SWAP_I8\000B\000B"
- "CC\000BCTR\000BCTRL8_Darwin\000BCTRL8_ELF\000BCTRL_Darwin\000BCTRL_SVR4"
- "\000BL8_Darwin\000BL8_ELF\000BLA8_Darwin\000BLA8_ELF\000BLA_Darwin\000B"
- "LA_SVR4\000BLR\000BL_Darwin\000BL_SVR4\000CMPD\000CMPDI\000CMPLD\000CMP"
- "LDI\000CMPLW\000CMPLWI\000CMPW\000CMPWI\000CNTLZD\000CNTLZW\000CREQV\000"
- "CROR\000CRSET\000DCBA\000DCBF\000DCBI\000DCBST\000DCBT\000DCBTST\000DCB"
- "Z\000DCBZL\000DIVD\000DIVDU\000DIVW\000DIVWU\000DSS\000DSSALL\000DST\000"
- "DST64\000DSTST\000DSTST64\000DSTSTT\000DSTSTT64\000DSTT\000DSTT64\000DY"
- "NALLOC\000DYNALLOC8\000EQV\000EQV8\000EXTSB\000EXTSB8\000EXTSH\000EXTSH"
- "8\000EXTSW\000EXTSW_32\000EXTSW_32_64\000FABSD\000FABSS\000FADD\000FADD"
- "S\000FADDrtz\000FCFID\000FCMPUD\000FCMPUS\000FCTIDZ\000FCTIWZ\000FDIV\000"
- "FDIVS\000FMADD\000FMADDS\000FMR\000FMRSD\000FMSUB\000FMSUBS\000FMUL\000"
- "FMULS\000FNABSD\000FNABSS\000FNEGD\000FNEGS\000FNMADD\000FNMADDS\000FNM"
- "SUB\000FNMSUBS\000FRSP\000FSELD\000FSELS\000FSQRT\000FSQRTS\000FSUB\000"
- "FSUBS\000LA\000LBZ\000LBZ8\000LBZU\000LBZU8\000LBZX\000LBZX8\000LD\000L"
- "DARX\000LDU\000LDX\000LDinto_toc\000LDtoc\000LDtoc_restore\000LFD\000LF"
- "DU\000LFDX\000LFS\000LFSU\000LFSX\000LHA\000LHA8\000LHAU\000LHAU8\000LH"
- "AX\000LHAX8\000LHBRX\000LHZ\000LHZ8\000LHZU\000LHZU8\000LHZX\000LHZX8\000"
- "LI\000LI8\000LIS\000LIS8\000LVEBX\000LVEHX\000LVEWX\000LVSL\000LVSR\000"
- "LVX\000LVXL\000LWA\000LWARX\000LWAX\000LWBRX\000LWZ\000LWZ8\000LWZU\000"
- "LWZU8\000LWZX\000LWZX8\000MCRF\000MFCR\000MFCTR\000MFCTR8\000MFFS\000MF"
- "LR\000MFLR8\000MFOCRF\000MFVRSAVE\000MFVSCR\000MTCRF\000MTCTR\000MTCTR8"
- "\000MTFSB0\000MTFSB1\000MTFSF\000MTLR\000MTLR8\000MTVRSAVE\000MTVSCR\000"
- "MULHD\000MULHDU\000MULHW\000MULHWU\000MULLD\000MULLI\000MULLW\000MovePC"
- "toLR\000MovePCtoLR8\000NAND\000NAND8\000NEG\000NEG8\000NOP\000NOR\000NO"
- "R8\000OR\000OR4To8\000OR8\000OR8To4\000ORC\000ORC8\000ORI\000ORI8\000OR"
- "IS\000ORIS8\000RLDCL\000RLDICL\000RLDICR\000RLDIMI\000RLWIMI\000RLWINM\000"
- "RLWINMo\000RLWNM\000SELECT_CC_F4\000SELECT_CC_F8\000SELECT_CC_I4\000SEL"
- "ECT_CC_I8\000SELECT_CC_VRRC\000SLD\000SLW\000SPILL_CR\000SRAD\000SRADI\000"
- "SRAW\000SRAWI\000SRD\000SRW\000STB\000STB8\000STBU\000STBU8\000STBX\000"
- "STBX8\000STD\000STDCX\000STDU\000STDUX\000STDX\000STDX_32\000STD_32\000"
- "STFD\000STFDU\000STFDX\000STFIWX\000STFS\000STFSU\000STFSX\000STH\000ST"
- "H8\000STHBRX\000STHU\000STHU8\000STHX\000STHX8\000STVEBX\000STVEHX\000S"
- "TVEWX\000STVX\000STVXL\000STW\000STW8\000STWBRX\000STWCX\000STWU\000STW"
- "UX\000STWX\000STWX8\000SUBF\000SUBF8\000SUBFC\000SUBFC8\000SUBFE\000SUB"
- "FE8\000SUBFIC\000SUBFIC8\000SUBFME\000SUBFME8\000SUBFZE\000SUBFZE8\000S"
- "YNC\000TAILB\000TAILB8\000TAILBA\000TAILBA8\000TAILBCTR\000TAILBCTR8\000"
- "TCRETURNai\000TCRETURNai8\000TCRETURNdi\000TCRETURNdi8\000TCRETURNri\000"
- "TCRETURNri8\000TRAP\000UPDATE_VRSAVE\000VADDCUW\000VADDFP\000VADDSBS\000"
- "VADDSHS\000VADDSWS\000VADDUBM\000VADDUBS\000VADDUHM\000VADDUHS\000VADDU"
- "WM\000VADDUWS\000VAND\000VANDC\000VAVGSB\000VAVGSH\000VAVGSW\000VAVGUB\000"
- "VAVGUH\000VAVGUW\000VCFSX\000VCFUX\000VCMPBFP\000VCMPBFPo\000VCMPEQFP\000"
- "VCMPEQFPo\000VCMPEQUB\000VCMPEQUBo\000VCMPEQUH\000VCMPEQUHo\000VCMPEQUW"
- "\000VCMPEQUWo\000VCMPGEFP\000VCMPGEFPo\000VCMPGTFP\000VCMPGTFPo\000VCMP"
- "GTSB\000VCMPGTSBo\000VCMPGTSH\000VCMPGTSHo\000VCMPGTSW\000VCMPGTSWo\000"
- "VCMPGTUB\000VCMPGTUBo\000VCMPGTUH\000VCMPGTUHo\000VCMPGTUW\000VCMPGTUWo"
- "\000VCTSXS\000VCTUXS\000VEXPTEFP\000VLOGEFP\000VMADDFP\000VMAXFP\000VMA"
- "XSB\000VMAXSH\000VMAXSW\000VMAXUB\000VMAXUH\000VMAXUW\000VMHADDSHS\000V"
- "MHRADDSHS\000VMINFP\000VMINSB\000VMINSH\000VMINSW\000VMINUB\000VMINUH\000"
- "VMINUW\000VMLADDUHM\000VMRGHB\000VMRGHH\000VMRGHW\000VMRGLB\000VMRGLH\000"
- "VMRGLW\000VMSUMMBM\000VMSUMSHM\000VMSUMSHS\000VMSUMUBM\000VMSUMUHM\000V"
- "MSUMUHS\000VMULESB\000VMULESH\000VMULEUB\000VMULEUH\000VMULOSB\000VMULO"
- "SH\000VMULOUB\000VMULOUH\000VNMSUBFP\000VNOR\000VOR\000VPERM\000VPKPX\000"
- "VPKSHSS\000VPKSHUS\000VPKSWSS\000VPKSWUS\000VPKUHUM\000VPKUHUS\000VPKUW"
- "UM\000VPKUWUS\000VREFP\000VRFIM\000VRFIN\000VRFIP\000VRFIZ\000VRLB\000V"
- "RLH\000VRLW\000VRSQRTEFP\000VSEL\000VSL\000VSLB\000VSLDOI\000VSLH\000VS"
- "LO\000VSLW\000VSPLTB\000VSPLTH\000VSPLTISB\000VSPLTISH\000VSPLTISW\000V"
- "SPLTW\000VSR\000VSRAB\000VSRAH\000VSRAW\000VSRB\000VSRH\000VSRO\000VSRW"
- "\000VSUBCUW\000VSUBFP\000VSUBSBS\000VSUBSHS\000VSUBSWS\000VSUBUBM\000VS"
- "UBUBS\000VSUBUHM\000VSUBUHS\000VSUBUWM\000VSUBUWS\000VSUM2SWS\000VSUM4S"
- "BS\000VSUM4SHS\000VSUM4UBS\000VSUMSWS\000VUPKHPX\000VUPKHSB\000VUPKHSH\000"
- "VUPKLPX\000VUPKLSB\000VUPKLSH\000VXOR\000V_SET0\000XOR\000XOR8\000XORI\000"
- "XORI8\000XORIS\000XORIS8\000";
- return Strs+InstAsmOffset[Opcode];
-}
-
-#endif
diff --git a/libclamav/c++/X86GenAsmMatcher.inc b/libclamav/c++/X86GenAsmMatcher.inc
deleted file mode 100644
index 792085a..0000000
--- a/libclamav/c++/X86GenAsmMatcher.inc
+++ /dev/null
@@ -1,8373 +0,0 @@
-//===- TableGen'erated file -------------------------------------*- C++ -*-===//
-//
-// Assembly Matcher Source Fragment
-//
-// Automatically generated file, do not edit!
-//
-//===----------------------------------------------------------------------===//
-
-static unsigned MatchRegisterName(StringRef Name) {
- switch (Name.size()) {
- default: break;
- case 2: // 25 strings to match.
- switch (Name[0]) {
- default: break;
- case 'a': // 3 strings to match.
- switch (Name[1]) {
- default: break;
- case 'h': // 1 strings to match.
- return 1; // "ah"
- case 'l': // 1 strings to match.
- return 2; // "al"
- case 'x': // 1 strings to match.
- return 3; // "ax"
- }
- break;
- case 'b': // 4 strings to match.
- switch (Name[1]) {
- default: break;
- case 'h': // 1 strings to match.
- return 4; // "bh"
- case 'l': // 1 strings to match.
- return 5; // "bl"
- case 'p': // 1 strings to match.
- return 6; // "bp"
- case 'x': // 1 strings to match.
- return 8; // "bx"
- }
- break;
- case 'c': // 4 strings to match.
- switch (Name[1]) {
- default: break;
- case 'h': // 1 strings to match.
- return 9; // "ch"
- case 'l': // 1 strings to match.
- return 10; // "cl"
- case 's': // 1 strings to match.
- return 11; // "cs"
- case 'x': // 1 strings to match.
- return 12; // "cx"
- }
- break;
- case 'd': // 5 strings to match.
- switch (Name[1]) {
- default: break;
- case 'h': // 1 strings to match.
- return 13; // "dh"
- case 'i': // 1 strings to match.
- return 14; // "di"
- case 'l': // 1 strings to match.
- return 16; // "dl"
- case 's': // 1 strings to match.
- return 25; // "ds"
- case 'x': // 1 strings to match.
- return 26; // "dx"
- }
- break;
- case 'e': // 1 strings to match.
- if (Name[1] != 's')
- break;
- return 43; // "es"
- case 'f': // 1 strings to match.
- if (Name[1] != 's')
- break;
- return 53; // "fs"
- case 'g': // 1 strings to match.
- if (Name[1] != 's')
- break;
- return 54; // "gs"
- case 'i': // 1 strings to match.
- if (Name[1] != 'p')
- break;
- return 55; // "ip"
- case 'r': // 2 strings to match.
- switch (Name[1]) {
- default: break;
- case '8': // 1 strings to match.
- return 88; // "r8"
- case '9': // 1 strings to match.
- return 92; // "r9"
- }
- break;
- case 's': // 3 strings to match.
- switch (Name[1]) {
- default: break;
- case 'i': // 1 strings to match.
- return 114; // "si"
- case 'p': // 1 strings to match.
- return 116; // "sp"
- case 's': // 1 strings to match.
- return 118; // "ss"
- }
- break;
- }
- break;
- case 3: // 57 strings to match.
- switch (Name[0]) {
- default: break;
- case 'b': // 1 strings to match.
- if (Name.substr(1,2) != "pl")
- break;
- return 7; // "bpl"
- case 'd': // 9 strings to match.
- switch (Name[1]) {
- default: break;
- case 'i': // 1 strings to match.
- if (Name[2] != 'l')
- break;
- return 15; // "dil"
- case 'r': // 8 strings to match.
- switch (Name[2]) {
- default: break;
- case '0': // 1 strings to match.
- return 17; // "dr0"
- case '1': // 1 strings to match.
- return 18; // "dr1"
- case '2': // 1 strings to match.
- return 19; // "dr2"
- case '3': // 1 strings to match.
- return 20; // "dr3"
- case '4': // 1 strings to match.
- return 21; // "dr4"
- case '5': // 1 strings to match.
- return 22; // "dr5"
- case '6': // 1 strings to match.
- return 23; // "dr6"
- case '7': // 1 strings to match.
- return 24; // "dr7"
- }
- break;
- }
- break;
- case 'e': // 9 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name[2] != 'x')
- break;
- return 27; // "eax"
- case 'b': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'p': // 1 strings to match.
- return 28; // "ebp"
- case 'x': // 1 strings to match.
- return 29; // "ebx"
- }
- break;
- case 'c': // 1 strings to match.
- if (Name[2] != 'x')
- break;
- return 38; // "ecx"
- case 'd': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'i': // 1 strings to match.
- return 39; // "edi"
- case 'x': // 1 strings to match.
- return 40; // "edx"
- }
- break;
- case 'i': // 1 strings to match.
- if (Name[2] != 'p')
- break;
- return 42; // "eip"
- case 's': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'i': // 1 strings to match.
- return 44; // "esi"
- case 'p': // 1 strings to match.
- return 45; // "esp"
- }
- break;
- }
- break;
- case 'f': // 7 strings to match.
- if (Name[1] != 'p')
- break;
- switch (Name[2]) {
- default: break;
- case '0': // 1 strings to match.
- return 46; // "fp0"
- case '1': // 1 strings to match.
- return 47; // "fp1"
- case '2': // 1 strings to match.
- return 48; // "fp2"
- case '3': // 1 strings to match.
- return 49; // "fp3"
- case '4': // 1 strings to match.
- return 50; // "fp4"
- case '5': // 1 strings to match.
- return 51; // "fp5"
- case '6': // 1 strings to match.
- return 52; // "fp6"
- }
- break;
- case 'm': // 8 strings to match.
- if (Name[1] != 'm')
- break;
- switch (Name[2]) {
- default: break;
- case '0': // 1 strings to match.
- return 56; // "mm0"
- case '1': // 1 strings to match.
- return 57; // "mm1"
- case '2': // 1 strings to match.
- return 58; // "mm2"
- case '3': // 1 strings to match.
- return 59; // "mm3"
- case '4': // 1 strings to match.
- return 60; // "mm4"
- case '5': // 1 strings to match.
- return 61; // "mm5"
- case '6': // 1 strings to match.
- return 62; // "mm6"
- case '7': // 1 strings to match.
- return 63; // "mm7"
- }
- break;
- case 'r': // 21 strings to match.
- switch (Name[1]) {
- default: break;
- case '1': // 6 strings to match.
- switch (Name[2]) {
- default: break;
- case '0': // 1 strings to match.
- return 64; // "r10"
- case '1': // 1 strings to match.
- return 68; // "r11"
- case '2': // 1 strings to match.
- return 72; // "r12"
- case '3': // 1 strings to match.
- return 76; // "r13"
- case '4': // 1 strings to match.
- return 80; // "r14"
- case '5': // 1 strings to match.
- return 84; // "r15"
- }
- break;
- case '8': // 3 strings to match.
- switch (Name[2]) {
- default: break;
- case 'b': // 1 strings to match.
- return 89; // "r8b"
- case 'd': // 1 strings to match.
- return 90; // "r8d"
- case 'w': // 1 strings to match.
- return 91; // "r8w"
- }
- break;
- case '9': // 3 strings to match.
- switch (Name[2]) {
- default: break;
- case 'b': // 1 strings to match.
- return 93; // "r9b"
- case 'd': // 1 strings to match.
- return 94; // "r9d"
- case 'w': // 1 strings to match.
- return 95; // "r9w"
- }
- break;
- case 'a': // 1 strings to match.
- if (Name[2] != 'x')
- break;
- return 96; // "rax"
- case 'b': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'p': // 1 strings to match.
- return 97; // "rbp"
- case 'x': // 1 strings to match.
- return 98; // "rbx"
- }
- break;
- case 'c': // 1 strings to match.
- if (Name[2] != 'x')
- break;
- return 108; // "rcx"
- case 'd': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'i': // 1 strings to match.
- return 109; // "rdi"
- case 'x': // 1 strings to match.
- return 110; // "rdx"
- }
- break;
- case 'i': // 1 strings to match.
- if (Name[2] != 'p')
- break;
- return 111; // "rip"
- case 's': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'i': // 1 strings to match.
- return 112; // "rsi"
- case 'p': // 1 strings to match.
- return 113; // "rsp"
- }
- break;
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[1]) {
- default: break;
- case 'i': // 1 strings to match.
- if (Name[2] != 'l')
- break;
- return 115; // "sil"
- case 'p': // 1 strings to match.
- if (Name[2] != 'l')
- break;
- return 117; // "spl"
- }
- break;
- }
- break;
- case 4: // 55 strings to match.
- switch (Name[0]) {
- default: break;
- case 'e': // 8 strings to match.
- if (Name.substr(1,2) != "cr")
- break;
- switch (Name[3]) {
- default: break;
- case '0': // 1 strings to match.
- return 30; // "ecr0"
- case '1': // 1 strings to match.
- return 31; // "ecr1"
- case '2': // 1 strings to match.
- return 32; // "ecr2"
- case '3': // 1 strings to match.
- return 33; // "ecr3"
- case '4': // 1 strings to match.
- return 34; // "ecr4"
- case '5': // 1 strings to match.
- return 35; // "ecr5"
- case '6': // 1 strings to match.
- return 36; // "ecr6"
- case '7': // 1 strings to match.
- return 37; // "ecr7"
- }
- break;
- case 'r': // 27 strings to match.
- switch (Name[1]) {
- default: break;
- case '1': // 18 strings to match.
- switch (Name[2]) {
- default: break;
- case '0': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return 65; // "r10b"
- case 'd': // 1 strings to match.
- return 66; // "r10d"
- case 'w': // 1 strings to match.
- return 67; // "r10w"
- }
- break;
- case '1': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return 69; // "r11b"
- case 'd': // 1 strings to match.
- return 70; // "r11d"
- case 'w': // 1 strings to match.
- return 71; // "r11w"
- }
- break;
- case '2': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return 73; // "r12b"
- case 'd': // 1 strings to match.
- return 74; // "r12d"
- case 'w': // 1 strings to match.
- return 75; // "r12w"
- }
- break;
- case '3': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return 77; // "r13b"
- case 'd': // 1 strings to match.
- return 78; // "r13d"
- case 'w': // 1 strings to match.
- return 79; // "r13w"
- }
- break;
- case '4': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return 81; // "r14b"
- case 'd': // 1 strings to match.
- return 82; // "r14d"
- case 'w': // 1 strings to match.
- return 83; // "r14w"
- }
- break;
- case '5': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return 85; // "r15b"
- case 'd': // 1 strings to match.
- return 86; // "r15d"
- case 'w': // 1 strings to match.
- return 87; // "r15w"
- }
- break;
- }
- break;
- case 'c': // 9 strings to match.
- if (Name[2] != 'r')
- break;
- switch (Name[3]) {
- default: break;
- case '0': // 1 strings to match.
- return 99; // "rcr0"
- case '1': // 1 strings to match.
- return 100; // "rcr1"
- case '2': // 1 strings to match.
- return 101; // "rcr2"
- case '3': // 1 strings to match.
- return 102; // "rcr3"
- case '4': // 1 strings to match.
- return 103; // "rcr4"
- case '5': // 1 strings to match.
- return 104; // "rcr5"
- case '6': // 1 strings to match.
- return 105; // "rcr6"
- case '7': // 1 strings to match.
- return 106; // "rcr7"
- case '8': // 1 strings to match.
- return 107; // "rcr8"
- }
- break;
- }
- break;
- case 'x': // 10 strings to match.
- if (Name.substr(1,2) != "mm")
- break;
- switch (Name[3]) {
- default: break;
- case '0': // 1 strings to match.
- return 127; // "xmm0"
- case '1': // 1 strings to match.
- return 128; // "xmm1"
- case '2': // 1 strings to match.
- return 135; // "xmm2"
- case '3': // 1 strings to match.
- return 136; // "xmm3"
- case '4': // 1 strings to match.
- return 137; // "xmm4"
- case '5': // 1 strings to match.
- return 138; // "xmm5"
- case '6': // 1 strings to match.
- return 139; // "xmm6"
- case '7': // 1 strings to match.
- return 140; // "xmm7"
- case '8': // 1 strings to match.
- return 141; // "xmm8"
- case '9': // 1 strings to match.
- return 142; // "xmm9"
- }
- break;
- case 'y': // 10 strings to match.
- if (Name.substr(1,2) != "mm")
- break;
- switch (Name[3]) {
- default: break;
- case '0': // 1 strings to match.
- return 143; // "ymm0"
- case '1': // 1 strings to match.
- return 144; // "ymm1"
- case '2': // 1 strings to match.
- return 151; // "ymm2"
- case '3': // 1 strings to match.
- return 152; // "ymm3"
- case '4': // 1 strings to match.
- return 153; // "ymm4"
- case '5': // 1 strings to match.
- return 154; // "ymm5"
- case '6': // 1 strings to match.
- return 155; // "ymm6"
- case '7': // 1 strings to match.
- return 156; // "ymm7"
- case '8': // 1 strings to match.
- return 157; // "ymm8"
- case '9': // 1 strings to match.
- return 158; // "ymm9"
- }
- break;
- }
- break;
- case 5: // 21 strings to match.
- switch (Name[0]) {
- default: break;
- case 'f': // 1 strings to match.
- if (Name.substr(1,4) != "lags")
- break;
- return 41; // "flags"
- case 's': // 8 strings to match.
- if (Name.substr(1,2) != "t(")
- break;
- switch (Name[3]) {
- default: break;
- case '0': // 1 strings to match.
- if (Name[4] != ')')
- break;
- return 119; // "st(0)"
- case '1': // 1 strings to match.
- if (Name[4] != ')')
- break;
- return 120; // "st(1)"
- case '2': // 1 strings to match.
- if (Name[4] != ')')
- break;
- return 121; // "st(2)"
- case '3': // 1 strings to match.
- if (Name[4] != ')')
- break;
- return 122; // "st(3)"
- case '4': // 1 strings to match.
- if (Name[4] != ')')
- break;
- return 123; // "st(4)"
- case '5': // 1 strings to match.
- if (Name[4] != ')')
- break;
- return 124; // "st(5)"
- case '6': // 1 strings to match.
- if (Name[4] != ')')
- break;
- return 125; // "st(6)"
- case '7': // 1 strings to match.
- if (Name[4] != ')')
- break;
- return 126; // "st(7)"
- }
- break;
- case 'x': // 6 strings to match.
- if (Name.substr(1,3) != "mm1")
- break;
- switch (Name[4]) {
- default: break;
- case '0': // 1 strings to match.
- return 129; // "xmm10"
- case '1': // 1 strings to match.
- return 130; // "xmm11"
- case '2': // 1 strings to match.
- return 131; // "xmm12"
- case '3': // 1 strings to match.
- return 132; // "xmm13"
- case '4': // 1 strings to match.
- return 133; // "xmm14"
- case '5': // 1 strings to match.
- return 134; // "xmm15"
- }
- break;
- case 'y': // 6 strings to match.
- if (Name.substr(1,3) != "mm1")
- break;
- switch (Name[4]) {
- default: break;
- case '0': // 1 strings to match.
- return 145; // "ymm10"
- case '1': // 1 strings to match.
- return 146; // "ymm11"
- case '2': // 1 strings to match.
- return 147; // "ymm12"
- case '3': // 1 strings to match.
- return 148; // "ymm13"
- case '4': // 1 strings to match.
- return 149; // "ymm14"
- case '5': // 1 strings to match.
- return 150; // "ymm15"
- }
- break;
- }
- break;
- }
- return 0;
-}
-
-#ifndef REGISTERS_ONLY
-
-// Unified function for converting operants to MCInst instances.
-
-enum ConversionKind {
- Convert,
- Convert__Reg1_1__Tie0,
- Convert__Imm1_1,
- Convert__AbsMem1_1,
- Convert__Mem5_1,
- Convert__Reg1_1,
- Convert__Reg1_2__Tie0__Reg1_1,
- Convert__Mem5_2__Reg1_1,
- Convert__Reg1_2__Tie0__Imm1_1,
- Convert__Mem5_2__Imm1_1,
- Convert__Reg1_2__Tie0__Mem5_1,
- Convert__Reg1_2__Tie0__ImmSExt81_1,
- Convert__Mem5_2__ImmSExt81_1,
- Convert__Reg1_2__Reg1_1,
- Convert__Reg1_2__Mem5_1,
- Convert__Reg1_2__ImmSExt81_1,
- Convert__Reg1_2,
- Convert__Mem5_2,
- Convert__Reg1_2__Imm1_1,
- Convert__Imm1_1__Imm1_2,
- Convert__ImmSExt81_1,
- Convert__Reg1_2__NoSegMem4_1,
- Convert__Reg1_2__Mem4_1,
- Convert__AbsMem1_2,
- Convert__ImmSExt81_2,
- Convert__Reg1_2__Tie0,
- Convert__Reg1_1__Tie0__Reg1_2,
- Convert__Reg1_1__Tie0__Mem5_2,
- Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1,
- Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1,
- Convert__Reg1_3__Tie0__Reg1_2,
- Convert__Reg1_3__Tie0__Mem5_2,
- Convert__Reg1_3__Reg1_2__ImmSExt81_1,
- Convert__Mem5_3__Reg1_2__ImmSExt81_1,
- Convert__Reg1_3__Mem5_2__ImmSExt81_1,
- Convert__Reg1_3__Reg1_2__Imm1_1,
- Convert__Reg1_3__Mem5_2__Imm1_1,
- Convert__Reg1_3__Tie0__Reg1_2__Imm1_1,
- Convert__Reg1_3__Tie0__Mem5_2__Imm1_1,
- Convert__Mem5_3__Reg1_2,
- Convert__Mem5_3__Reg1_2__Imm1_1,
- Convert__Reg1_4__Tie0__Reg1_3__Imm1_1,
- Convert__Reg1_4__Tie0__Mem5_3__Imm1_1,
- NumConversionVariants
-};
-
-static bool ConvertToMCInst(ConversionKind Kind, MCInst &Inst, unsigned Opcode,
- const SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
- Inst.setOpcode(Opcode);
- switch (Kind) {
- default:
- case Convert:
- break;
- case Convert__Reg1_1__Tie0:
- ((X86Operand*)Operands[1])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- break;
- case Convert__Imm1_1:
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__AbsMem1_1:
- ((X86Operand*)Operands[1])->addAbsMemOperands(Inst, 1);
- break;
- case Convert__Mem5_1:
- ((X86Operand*)Operands[1])->addMemOperands(Inst, 5);
- break;
- case Convert__Reg1_1:
- ((X86Operand*)Operands[1])->addRegOperands(Inst, 1);
- break;
- case Convert__Reg1_2__Tie0__Reg1_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[1])->addRegOperands(Inst, 1);
- break;
- case Convert__Mem5_2__Reg1_1:
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[1])->addRegOperands(Inst, 1);
- break;
- case Convert__Reg1_2__Tie0__Imm1_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Mem5_2__Imm1_1:
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Reg1_2__Tie0__Mem5_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[1])->addMemOperands(Inst, 5);
- break;
- case Convert__Reg1_2__Tie0__ImmSExt81_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Mem5_2__ImmSExt81_1:
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Reg1_2__Reg1_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addRegOperands(Inst, 1);
- break;
- case Convert__Reg1_2__Mem5_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addMemOperands(Inst, 5);
- break;
- case Convert__Reg1_2__ImmSExt81_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Reg1_2:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- break;
- case Convert__Mem5_2:
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- break;
- case Convert__Reg1_2__Imm1_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Imm1_1__Imm1_2:
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- ((X86Operand*)Operands[2])->addImmOperands(Inst, 1);
- break;
- case Convert__ImmSExt81_1:
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Reg1_2__NoSegMem4_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addNoSegMemOperands(Inst, 4);
- break;
- case Convert__Reg1_2__Mem4_1:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addMemOperands(Inst, 4);
- break;
- case Convert__AbsMem1_2:
- ((X86Operand*)Operands[2])->addAbsMemOperands(Inst, 1);
- break;
- case Convert__ImmSExt81_2:
- ((X86Operand*)Operands[2])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Reg1_2__Tie0:
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- break;
- case Convert__Reg1_1__Tie0__Reg1_2:
- ((X86Operand*)Operands[1])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- break;
- case Convert__Reg1_1__Tie0__Mem5_2:
- ((X86Operand*)Operands[1])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- break;
- case Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Reg1_3__Tie0__Reg1_2:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- break;
- case Convert__Reg1_3__Tie0__Mem5_2:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- break;
- case Convert__Reg1_3__Reg1_2__ImmSExt81_1:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Mem5_3__Reg1_2__ImmSExt81_1:
- ((X86Operand*)Operands[3])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Reg1_3__Mem5_2__ImmSExt81_1:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[1])->addImmSExt8Operands(Inst, 1);
- break;
- case Convert__Reg1_3__Reg1_2__Imm1_1:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Reg1_3__Mem5_2__Imm1_1:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Reg1_3__Tie0__Reg1_2__Imm1_1:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Reg1_3__Tie0__Mem5_2__Imm1_1:
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[2])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Mem5_3__Reg1_2:
- ((X86Operand*)Operands[3])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- break;
- case Convert__Mem5_3__Reg1_2__Imm1_1:
- ((X86Operand*)Operands[3])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[2])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Reg1_4__Tie0__Reg1_3__Imm1_1:
- ((X86Operand*)Operands[4])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[3])->addRegOperands(Inst, 1);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- case Convert__Reg1_4__Tie0__Mem5_3__Imm1_1:
- ((X86Operand*)Operands[4])->addRegOperands(Inst, 1);
- Inst.addOperand(Inst.getOperand(0));
- ((X86Operand*)Operands[3])->addMemOperands(Inst, 5);
- ((X86Operand*)Operands[1])->addImmOperands(Inst, 1);
- break;
- }
- return false;
-}
-
-namespace {
-
-/// MatchClassKind - The kinds of classes which participate in
-/// instruction matching.
-enum MatchClassKind {
- InvalidMatchClass = 0,
- MCK__STAR_, // '*'
- MCK_1, // '1'
- MCK_3, // '3'
- MCK_adcb, // 'adcb'
- MCK_adcl, // 'adcl'
- MCK_adcq, // 'adcq'
- MCK_adcw, // 'adcw'
- MCK_addb, // 'addb'
- MCK_addl, // 'addl'
- MCK_addpd, // 'addpd'
- MCK_addps, // 'addps'
- MCK_addq, // 'addq'
- MCK_addsd, // 'addsd'
- MCK_addss, // 'addss'
- MCK_addsubpd, // 'addsubpd'
- MCK_addsubps, // 'addsubps'
- MCK_addw, // 'addw'
- MCK_andb, // 'andb'
- MCK_andl, // 'andl'
- MCK_andnpd, // 'andnpd'
- MCK_andnps, // 'andnps'
- MCK_andpd, // 'andpd'
- MCK_andps, // 'andps'
- MCK_andq, // 'andq'
- MCK_andw, // 'andw'
- MCK_blendpd, // 'blendpd'
- MCK_blendps, // 'blendps'
- MCK_blendvpd, // 'blendvpd'
- MCK_blendvps, // 'blendvps'
- MCK_bsfl, // 'bsfl'
- MCK_bsfq, // 'bsfq'
- MCK_bsfw, // 'bsfw'
- MCK_bsrl, // 'bsrl'
- MCK_bsrq, // 'bsrq'
- MCK_bsrw, // 'bsrw'
- MCK_bswapl, // 'bswapl'
- MCK_bswapq, // 'bswapq'
- MCK_btcl, // 'btcl'
- MCK_btcq, // 'btcq'
- MCK_btcw, // 'btcw'
- MCK_btl, // 'btl'
- MCK_btq, // 'btq'
- MCK_btrl, // 'btrl'
- MCK_btrq, // 'btrq'
- MCK_btrw, // 'btrw'
- MCK_btsl, // 'btsl'
- MCK_btsq, // 'btsq'
- MCK_btsw, // 'btsw'
- MCK_btw, // 'btw'
- MCK_call, // 'call'
- MCK_callq, // 'callq'
- MCK_cbtw, // 'cbtw'
- MCK_clc, // 'clc'
- MCK_cld, // 'cld'
- MCK_clflush, // 'clflush'
- MCK_cli, // 'cli'
- MCK_cltd, // 'cltd'
- MCK_cltq, // 'cltq'
- MCK_clts, // 'clts'
- MCK_cmc, // 'cmc'
- MCK_cmovael, // 'cmovael'
- MCK_cmovaeq, // 'cmovaeq'
- MCK_cmovaew, // 'cmovaew'
- MCK_cmoval, // 'cmoval'
- MCK_cmovaq, // 'cmovaq'
- MCK_cmovaw, // 'cmovaw'
- MCK_cmovbel, // 'cmovbel'
- MCK_cmovbeq, // 'cmovbeq'
- MCK_cmovbew, // 'cmovbew'
- MCK_cmovbl, // 'cmovbl'
- MCK_cmovbq, // 'cmovbq'
- MCK_cmovbw, // 'cmovbw'
- MCK_cmovel, // 'cmovel'
- MCK_cmoveq, // 'cmoveq'
- MCK_cmovew, // 'cmovew'
- MCK_cmovgel, // 'cmovgel'
- MCK_cmovgeq, // 'cmovgeq'
- MCK_cmovgew, // 'cmovgew'
- MCK_cmovgl, // 'cmovgl'
- MCK_cmovgq, // 'cmovgq'
- MCK_cmovgw, // 'cmovgw'
- MCK_cmovlel, // 'cmovlel'
- MCK_cmovleq, // 'cmovleq'
- MCK_cmovlew, // 'cmovlew'
- MCK_cmovll, // 'cmovll'
- MCK_cmovlq, // 'cmovlq'
- MCK_cmovlw, // 'cmovlw'
- MCK_cmovnel, // 'cmovnel'
- MCK_cmovneq, // 'cmovneq'
- MCK_cmovnew, // 'cmovnew'
- MCK_cmovnol, // 'cmovnol'
- MCK_cmovnoq, // 'cmovnoq'
- MCK_cmovnow, // 'cmovnow'
- MCK_cmovnpl, // 'cmovnpl'
- MCK_cmovnpq, // 'cmovnpq'
- MCK_cmovnpw, // 'cmovnpw'
- MCK_cmovnsl, // 'cmovnsl'
- MCK_cmovnsq, // 'cmovnsq'
- MCK_cmovnsw, // 'cmovnsw'
- MCK_cmovol, // 'cmovol'
- MCK_cmovoq, // 'cmovoq'
- MCK_cmovow, // 'cmovow'
- MCK_cmovpl, // 'cmovpl'
- MCK_cmovpq, // 'cmovpq'
- MCK_cmovpw, // 'cmovpw'
- MCK_cmovsl, // 'cmovsl'
- MCK_cmovsq, // 'cmovsq'
- MCK_cmovsw, // 'cmovsw'
- MCK_cmp, // 'cmp'
- MCK_cmpb, // 'cmpb'
- MCK_cmpl, // 'cmpl'
- MCK_cmpq, // 'cmpq'
- MCK_cmpsb, // 'cmpsb'
- MCK_cmpsl, // 'cmpsl'
- MCK_cmpsq, // 'cmpsq'
- MCK_cmpsw, // 'cmpsw'
- MCK_cmpw, // 'cmpw'
- MCK_cmpxchg16b, // 'cmpxchg16b'
- MCK_cmpxchg8b, // 'cmpxchg8b'
- MCK_cmpxchgb, // 'cmpxchgb'
- MCK_cmpxchgl, // 'cmpxchgl'
- MCK_cmpxchgq, // 'cmpxchgq'
- MCK_cmpxchgw, // 'cmpxchgw'
- MCK_comisd, // 'comisd'
- MCK_comiss, // 'comiss'
- MCK_cpuid, // 'cpuid'
- MCK_cqto, // 'cqto'
- MCK_crc32, // 'crc32'
- MCK_cs, // 'cs'
- MCK_cvtdq2pd, // 'cvtdq2pd'
- MCK_cvtdq2ps, // 'cvtdq2ps'
- MCK_cvtpd2dq, // 'cvtpd2dq'
- MCK_cvtpd2pi, // 'cvtpd2pi'
- MCK_cvtpd2ps, // 'cvtpd2ps'
- MCK_cvtpi2pd, // 'cvtpi2pd'
- MCK_cvtpi2ps, // 'cvtpi2ps'
- MCK_cvtps2dq, // 'cvtps2dq'
- MCK_cvtps2pd, // 'cvtps2pd'
- MCK_cvtps2pi, // 'cvtps2pi'
- MCK_cvtsd2siq, // 'cvtsd2siq'
- MCK_cvtsd2ss, // 'cvtsd2ss'
- MCK_cvtsi2sd, // 'cvtsi2sd'
- MCK_cvtsi2sdq, // 'cvtsi2sdq'
- MCK_cvtsi2ss, // 'cvtsi2ss'
- MCK_cvtsi2ssq, // 'cvtsi2ssq'
- MCK_cvtss2sd, // 'cvtss2sd'
- MCK_cvtss2sil, // 'cvtss2sil'
- MCK_cvtss2siq, // 'cvtss2siq'
- MCK_cvttpd2pi, // 'cvttpd2pi'
- MCK_cvttps2dq, // 'cvttps2dq'
- MCK_cvttps2pi, // 'cvttps2pi'
- MCK_cvttsd2si, // 'cvttsd2si'
- MCK_cvttsd2siq, // 'cvttsd2siq'
- MCK_cvttss2si, // 'cvttss2si'
- MCK_cvttss2siq, // 'cvttss2siq'
- MCK_cwtd, // 'cwtd'
- MCK_cwtl, // 'cwtl'
- MCK_decb, // 'decb'
- MCK_decl, // 'decl'
- MCK_decq, // 'decq'
- MCK_decw, // 'decw'
- MCK_divb, // 'divb'
- MCK_divl, // 'divl'
- MCK_divpd, // 'divpd'
- MCK_divps, // 'divps'
- MCK_divq, // 'divq'
- MCK_divsd, // 'divsd'
- MCK_divss, // 'divss'
- MCK_divw, // 'divw'
- MCK_dppd, // 'dppd'
- MCK_dpps, // 'dpps'
- MCK_ds, // 'ds'
- MCK_emms, // 'emms'
- MCK_enter, // 'enter'
- MCK_es, // 'es'
- MCK_extractps, // 'extractps'
- MCK_f2xm1, // 'f2xm1'
- MCK_fabs, // 'fabs'
- MCK_fadd, // 'fadd'
- MCK_faddl, // 'faddl'
- MCK_faddp, // 'faddp'
- MCK_fadds, // 'fadds'
- MCK_fbld, // 'fbld'
- MCK_fbstp, // 'fbstp'
- MCK_fchs, // 'fchs'
- MCK_fcmovb, // 'fcmovb'
- MCK_fcmovbe, // 'fcmovbe'
- MCK_fcmove, // 'fcmove'
- MCK_fcmovnb, // 'fcmovnb'
- MCK_fcmovnbe, // 'fcmovnbe'
- MCK_fcmovne, // 'fcmovne'
- MCK_fcmovnu, // 'fcmovnu'
- MCK_fcmovu, // 'fcmovu'
- MCK_fcom, // 'fcom'
- MCK_fcomi, // 'fcomi'
- MCK_fcomip, // 'fcomip'
- MCK_fcoml, // 'fcoml'
- MCK_fcomll, // 'fcomll'
- MCK_fcomp, // 'fcomp'
- MCK_fcompl, // 'fcompl'
- MCK_fcompll, // 'fcompll'
- MCK_fcompp, // 'fcompp'
- MCK_fcos, // 'fcos'
- MCK_fdecstp, // 'fdecstp'
- MCK_fdiv, // 'fdiv'
- MCK_fdivl, // 'fdivl'
- MCK_fdivp, // 'fdivp'
- MCK_fdivr, // 'fdivr'
- MCK_fdivrl, // 'fdivrl'
- MCK_fdivrp, // 'fdivrp'
- MCK_fdivrs, // 'fdivrs'
- MCK_fdivs, // 'fdivs'
- MCK_femms, // 'femms'
- MCK_ffree, // 'ffree'
- MCK_fiaddl, // 'fiaddl'
- MCK_fiadds, // 'fiadds'
- MCK_ficoml, // 'ficoml'
- MCK_ficompl, // 'ficompl'
- MCK_ficompw, // 'ficompw'
- MCK_ficomw, // 'ficomw'
- MCK_fidivl, // 'fidivl'
- MCK_fidivrl, // 'fidivrl'
- MCK_fidivrs, // 'fidivrs'
- MCK_fidivs, // 'fidivs'
- MCK_fildl, // 'fildl'
- MCK_fildll, // 'fildll'
- MCK_filds, // 'filds'
- MCK_fimull, // 'fimull'
- MCK_fimuls, // 'fimuls'
- MCK_fincstp, // 'fincstp'
- MCK_fistl, // 'fistl'
- MCK_fistpl, // 'fistpl'
- MCK_fistpll, // 'fistpll'
- MCK_fistps, // 'fistps'
- MCK_fists, // 'fists'
- MCK_fisttpl, // 'fisttpl'
- MCK_fisttpll, // 'fisttpll'
- MCK_fisttps, // 'fisttps'
- MCK_fisubl, // 'fisubl'
- MCK_fisubrl, // 'fisubrl'
- MCK_fisubrs, // 'fisubrs'
- MCK_fisubs, // 'fisubs'
- MCK_fld, // 'fld'
- MCK_fld1, // 'fld1'
- MCK_fldcw, // 'fldcw'
- MCK_fldenv, // 'fldenv'
- MCK_fldl, // 'fldl'
- MCK_fldl2e, // 'fldl2e'
- MCK_fldl2t, // 'fldl2t'
- MCK_fldlg2, // 'fldlg2'
- MCK_fldln2, // 'fldln2'
- MCK_fldpi, // 'fldpi'
- MCK_flds, // 'flds'
- MCK_fldt, // 'fldt'
- MCK_fldz, // 'fldz'
- MCK_fmul, // 'fmul'
- MCK_fmull, // 'fmull'
- MCK_fmulp, // 'fmulp'
- MCK_fmuls, // 'fmuls'
- MCK_fnclex, // 'fnclex'
- MCK_fninit, // 'fninit'
- MCK_fnop, // 'fnop'
- MCK_fnsave, // 'fnsave'
- MCK_fnstcw, // 'fnstcw'
- MCK_fnstenv, // 'fnstenv'
- MCK_fnstsw, // 'fnstsw'
- MCK_fpatan, // 'fpatan'
- MCK_fprem, // 'fprem'
- MCK_fprem1, // 'fprem1'
- MCK_fptan, // 'fptan'
- MCK_frndint, // 'frndint'
- MCK_frstor, // 'frstor'
- MCK_fs, // 'fs'
- MCK_fscale, // 'fscale'
- MCK_fsin, // 'fsin'
- MCK_fsincos, // 'fsincos'
- MCK_fsqrt, // 'fsqrt'
- MCK_fst, // 'fst'
- MCK_fstl, // 'fstl'
- MCK_fstp, // 'fstp'
- MCK_fstpl, // 'fstpl'
- MCK_fstps, // 'fstps'
- MCK_fstpt, // 'fstpt'
- MCK_fsts, // 'fsts'
- MCK_fsub, // 'fsub'
- MCK_fsubl, // 'fsubl'
- MCK_fsubp, // 'fsubp'
- MCK_fsubr, // 'fsubr'
- MCK_fsubrl, // 'fsubrl'
- MCK_fsubrp, // 'fsubrp'
- MCK_fsubrs, // 'fsubrs'
- MCK_fsubs, // 'fsubs'
- MCK_ftst, // 'ftst'
- MCK_fucom, // 'fucom'
- MCK_fucomi, // 'fucomi'
- MCK_fucomip, // 'fucomip'
- MCK_fucomp, // 'fucomp'
- MCK_fucompp, // 'fucompp'
- MCK_fxam, // 'fxam'
- MCK_fxch, // 'fxch'
- MCK_fxrstor, // 'fxrstor'
- MCK_fxsave, // 'fxsave'
- MCK_fxtract, // 'fxtract'
- MCK_fyl2x, // 'fyl2x'
- MCK_fyl2xp1, // 'fyl2xp1'
- MCK_gs, // 'gs'
- MCK_haddpd, // 'haddpd'
- MCK_haddps, // 'haddps'
- MCK_hlt, // 'hlt'
- MCK_hsubpd, // 'hsubpd'
- MCK_hsubps, // 'hsubps'
- MCK_idivb, // 'idivb'
- MCK_idivl, // 'idivl'
- MCK_idivq, // 'idivq'
- MCK_idivw, // 'idivw'
- MCK_imulb, // 'imulb'
- MCK_imull, // 'imull'
- MCK_imulq, // 'imulq'
- MCK_imulw, // 'imulw'
- MCK_inb, // 'inb'
- MCK_incb, // 'incb'
- MCK_incl, // 'incl'
- MCK_incq, // 'incq'
- MCK_incw, // 'incw'
- MCK_inl, // 'inl'
- MCK_insb, // 'insb'
- MCK_insertps, // 'insertps'
- MCK_insl, // 'insl'
- MCK_insw, // 'insw'
- MCK_int, // 'int'
- MCK_invd, // 'invd'
- MCK_invept, // 'invept'
- MCK_invlpg, // 'invlpg'
- MCK_invvpid, // 'invvpid'
- MCK_inw, // 'inw'
- MCK_iretl, // 'iretl'
- MCK_iretq, // 'iretq'
- MCK_iretw, // 'iretw'
- MCK_ja, // 'ja'
- MCK_jae, // 'jae'
- MCK_jb, // 'jb'
- MCK_jbe, // 'jbe'
- MCK_jcxz, // 'jcxz'
- MCK_je, // 'je'
- MCK_jg, // 'jg'
- MCK_jge, // 'jge'
- MCK_jl, // 'jl'
- MCK_jle, // 'jle'
- MCK_jmp, // 'jmp'
- MCK_jmpl, // 'jmpl'
- MCK_jmpq, // 'jmpq'
- MCK_jne, // 'jne'
- MCK_jno, // 'jno'
- MCK_jnp, // 'jnp'
- MCK_jns, // 'jns'
- MCK_jo, // 'jo'
- MCK_jp, // 'jp'
- MCK_js, // 'js'
- MCK_lahf, // 'lahf'
- MCK_larl, // 'larl'
- MCK_larq, // 'larq'
- MCK_larw, // 'larw'
- MCK_lcalll, // 'lcalll'
- MCK_lcallq, // 'lcallq'
- MCK_lcallw, // 'lcallw'
- MCK_lddqu, // 'lddqu'
- MCK_ldmxcsr, // 'ldmxcsr'
- MCK_ldsl, // 'ldsl'
- MCK_ldsw, // 'ldsw'
- MCK_leal, // 'leal'
- MCK_leaq, // 'leaq'
- MCK_leave, // 'leave'
- MCK_leaw, // 'leaw'
- MCK_lesl, // 'lesl'
- MCK_lesw, // 'lesw'
- MCK_lfence, // 'lfence'
- MCK_lfsl, // 'lfsl'
- MCK_lfsq, // 'lfsq'
- MCK_lfsw, // 'lfsw'
- MCK_lgdt, // 'lgdt'
- MCK_lgsl, // 'lgsl'
- MCK_lgsq, // 'lgsq'
- MCK_lgsw, // 'lgsw'
- MCK_lidt, // 'lidt'
- MCK_ljmpl, // 'ljmpl'
- MCK_ljmpq, // 'ljmpq'
- MCK_ljmpw, // 'ljmpw'
- MCK_lldtw, // 'lldtw'
- MCK_lmsww, // 'lmsww'
- MCK_lock, // 'lock'
- MCK_lodsb, // 'lodsb'
- MCK_lodsl, // 'lodsl'
- MCK_lodsq, // 'lodsq'
- MCK_lodsw, // 'lodsw'
- MCK_loop, // 'loop'
- MCK_loope, // 'loope'
- MCK_loopne, // 'loopne'
- MCK_lret, // 'lret'
- MCK_lsll, // 'lsll'
- MCK_lslq, // 'lslq'
- MCK_lslw, // 'lslw'
- MCK_lssl, // 'lssl'
- MCK_lssq, // 'lssq'
- MCK_lssw, // 'lssw'
- MCK_ltrw, // 'ltrw'
- MCK_maskmovdqu, // 'maskmovdqu'
- MCK_maskmovq, // 'maskmovq'
- MCK_maxpd, // 'maxpd'
- MCK_maxps, // 'maxps'
- MCK_maxsd, // 'maxsd'
- MCK_maxss, // 'maxss'
- MCK_mfence, // 'mfence'
- MCK_minpd, // 'minpd'
- MCK_minps, // 'minps'
- MCK_minsd, // 'minsd'
- MCK_minss, // 'minss'
- MCK_monitor, // 'monitor'
- MCK_movabsq, // 'movabsq'
- MCK_movapd, // 'movapd'
- MCK_movaps, // 'movaps'
- MCK_movb, // 'movb'
- MCK_movd, // 'movd'
- MCK_movddup, // 'movddup'
- MCK_movdq2q, // 'movdq2q'
- MCK_movdqa, // 'movdqa'
- MCK_movdqu, // 'movdqu'
- MCK_movhlps, // 'movhlps'
- MCK_movhpd, // 'movhpd'
- MCK_movhps, // 'movhps'
- MCK_movl, // 'movl'
- MCK_movlhps, // 'movlhps'
- MCK_movlpd, // 'movlpd'
- MCK_movlps, // 'movlps'
- MCK_movmskpd, // 'movmskpd'
- MCK_movmskps, // 'movmskps'
- MCK_movntdq, // 'movntdq'
- MCK_movntdqa, // 'movntdqa'
- MCK_movnti, // 'movnti'
- MCK_movntpd, // 'movntpd'
- MCK_movntps, // 'movntps'
- MCK_movntq, // 'movntq'
- MCK_movq, // 'movq'
- MCK_movq2dq, // 'movq2dq'
- MCK_movsb, // 'movsb'
- MCK_movsbl, // 'movsbl'
- MCK_movsbq, // 'movsbq'
- MCK_movsbw, // 'movsbw'
- MCK_movsd, // 'movsd'
- MCK_movshdup, // 'movshdup'
- MCK_movsl, // 'movsl'
- MCK_movsldup, // 'movsldup'
- MCK_movslq, // 'movslq'
- MCK_movss, // 'movss'
- MCK_movsw, // 'movsw'
- MCK_movswl, // 'movswl'
- MCK_movswq, // 'movswq'
- MCK_movupd, // 'movupd'
- MCK_movups, // 'movups'
- MCK_movw, // 'movw'
- MCK_movzbl, // 'movzbl'
- MCK_movzbq, // 'movzbq'
- MCK_movzbw, // 'movzbw'
- MCK_movzwl, // 'movzwl'
- MCK_movzwq, // 'movzwq'
- MCK_mpsadbw, // 'mpsadbw'
- MCK_mulb, // 'mulb'
- MCK_mull, // 'mull'
- MCK_mulpd, // 'mulpd'
- MCK_mulps, // 'mulps'
- MCK_mulq, // 'mulq'
- MCK_mulsd, // 'mulsd'
- MCK_mulss, // 'mulss'
- MCK_mulw, // 'mulw'
- MCK_mwait, // 'mwait'
- MCK_negb, // 'negb'
- MCK_negl, // 'negl'
- MCK_negq, // 'negq'
- MCK_negw, // 'negw'
- MCK_nop, // 'nop'
- MCK_nopl, // 'nopl'
- MCK_nopw, // 'nopw'
- MCK_notb, // 'notb'
- MCK_notl, // 'notl'
- MCK_notq, // 'notq'
- MCK_notw, // 'notw'
- MCK_orb, // 'orb'
- MCK_orl, // 'orl'
- MCK_orpd, // 'orpd'
- MCK_orps, // 'orps'
- MCK_orq, // 'orq'
- MCK_orw, // 'orw'
- MCK_outb, // 'outb'
- MCK_outl, // 'outl'
- MCK_outsb, // 'outsb'
- MCK_outsl, // 'outsl'
- MCK_outsw, // 'outsw'
- MCK_outw, // 'outw'
- MCK_pabsb, // 'pabsb'
- MCK_pabsd, // 'pabsd'
- MCK_pabsw, // 'pabsw'
- MCK_packssdw, // 'packssdw'
- MCK_packsswb, // 'packsswb'
- MCK_packusdw, // 'packusdw'
- MCK_packuswb, // 'packuswb'
- MCK_paddb, // 'paddb'
- MCK_paddd, // 'paddd'
- MCK_paddq, // 'paddq'
- MCK_paddsb, // 'paddsb'
- MCK_paddsw, // 'paddsw'
- MCK_paddusb, // 'paddusb'
- MCK_paddusw, // 'paddusw'
- MCK_paddw, // 'paddw'
- MCK_palignr, // 'palignr'
- MCK_pand, // 'pand'
- MCK_pandn, // 'pandn'
- MCK_pavgb, // 'pavgb'
- MCK_pavgw, // 'pavgw'
- MCK_pblendvb, // 'pblendvb'
- MCK_pblendw, // 'pblendw'
- MCK_pcmpeqb, // 'pcmpeqb'
- MCK_pcmpeqd, // 'pcmpeqd'
- MCK_pcmpeqq, // 'pcmpeqq'
- MCK_pcmpeqw, // 'pcmpeqw'
- MCK_pcmpestri, // 'pcmpestri'
- MCK_pcmpestrm, // 'pcmpestrm'
- MCK_pcmpgtb, // 'pcmpgtb'
- MCK_pcmpgtd, // 'pcmpgtd'
- MCK_pcmpgtq, // 'pcmpgtq'
- MCK_pcmpgtw, // 'pcmpgtw'
- MCK_pcmpistri, // 'pcmpistri'
- MCK_pcmpistrm, // 'pcmpistrm'
- MCK_pd, // 'pd'
- MCK_pextrb, // 'pextrb'
- MCK_pextrd, // 'pextrd'
- MCK_pextrq, // 'pextrq'
- MCK_pextrw, // 'pextrw'
- MCK_phaddd, // 'phaddd'
- MCK_phaddsw, // 'phaddsw'
- MCK_phaddw, // 'phaddw'
- MCK_phminposuw, // 'phminposuw'
- MCK_phsubd, // 'phsubd'
- MCK_phsubsw, // 'phsubsw'
- MCK_phsubw, // 'phsubw'
- MCK_pinsrb, // 'pinsrb'
- MCK_pinsrd, // 'pinsrd'
- MCK_pinsrq, // 'pinsrq'
- MCK_pinsrw, // 'pinsrw'
- MCK_pmaddubsw, // 'pmaddubsw'
- MCK_pmaddwd, // 'pmaddwd'
- MCK_pmaxsb, // 'pmaxsb'
- MCK_pmaxsd, // 'pmaxsd'
- MCK_pmaxsw, // 'pmaxsw'
- MCK_pmaxub, // 'pmaxub'
- MCK_pmaxud, // 'pmaxud'
- MCK_pmaxuw, // 'pmaxuw'
- MCK_pminsb, // 'pminsb'
- MCK_pminsd, // 'pminsd'
- MCK_pminsw, // 'pminsw'
- MCK_pminub, // 'pminub'
- MCK_pminud, // 'pminud'
- MCK_pminuw, // 'pminuw'
- MCK_pmovmskb, // 'pmovmskb'
- MCK_pmovsxbd, // 'pmovsxbd'
- MCK_pmovsxbq, // 'pmovsxbq'
- MCK_pmovsxbw, // 'pmovsxbw'
- MCK_pmovsxdq, // 'pmovsxdq'
- MCK_pmovsxwd, // 'pmovsxwd'
- MCK_pmovsxwq, // 'pmovsxwq'
- MCK_pmovzxbd, // 'pmovzxbd'
- MCK_pmovzxbq, // 'pmovzxbq'
- MCK_pmovzxbw, // 'pmovzxbw'
- MCK_pmovzxdq, // 'pmovzxdq'
- MCK_pmovzxwd, // 'pmovzxwd'
- MCK_pmovzxwq, // 'pmovzxwq'
- MCK_pmuldq, // 'pmuldq'
- MCK_pmulhrsw, // 'pmulhrsw'
- MCK_pmulhuw, // 'pmulhuw'
- MCK_pmulhw, // 'pmulhw'
- MCK_pmulld, // 'pmulld'
- MCK_pmullw, // 'pmullw'
- MCK_pmuludq, // 'pmuludq'
- MCK_popcntl, // 'popcntl'
- MCK_popcntq, // 'popcntq'
- MCK_popcntw, // 'popcntw'
- MCK_popfl, // 'popfl'
- MCK_popfq, // 'popfq'
- MCK_popfw, // 'popfw'
- MCK_popl, // 'popl'
- MCK_popq, // 'popq'
- MCK_popw, // 'popw'
- MCK_por, // 'por'
- MCK_prefetchnta, // 'prefetchnta'
- MCK_prefetcht0, // 'prefetcht0'
- MCK_prefetcht1, // 'prefetcht1'
- MCK_prefetcht2, // 'prefetcht2'
- MCK_ps, // 'ps'
- MCK_psadbw, // 'psadbw'
- MCK_pshufb, // 'pshufb'
- MCK_pshufd, // 'pshufd'
- MCK_pshufhw, // 'pshufhw'
- MCK_pshuflw, // 'pshuflw'
- MCK_pshufw, // 'pshufw'
- MCK_psignb, // 'psignb'
- MCK_psignd, // 'psignd'
- MCK_psignw, // 'psignw'
- MCK_pslld, // 'pslld'
- MCK_pslldq, // 'pslldq'
- MCK_psllq, // 'psllq'
- MCK_psllw, // 'psllw'
- MCK_psrad, // 'psrad'
- MCK_psraw, // 'psraw'
- MCK_psrld, // 'psrld'
- MCK_psrldq, // 'psrldq'
- MCK_psrlq, // 'psrlq'
- MCK_psrlw, // 'psrlw'
- MCK_psubb, // 'psubb'
- MCK_psubd, // 'psubd'
- MCK_psubq, // 'psubq'
- MCK_psubsb, // 'psubsb'
- MCK_psubsw, // 'psubsw'
- MCK_psubusb, // 'psubusb'
- MCK_psubusw, // 'psubusw'
- MCK_psubw, // 'psubw'
- MCK_ptest, // 'ptest'
- MCK_punpckhbw, // 'punpckhbw'
- MCK_punpckhdq, // 'punpckhdq'
- MCK_punpckhqdq, // 'punpckhqdq'
- MCK_punpckhwd, // 'punpckhwd'
- MCK_punpcklbw, // 'punpcklbw'
- MCK_punpckldq, // 'punpckldq'
- MCK_punpcklqdq, // 'punpcklqdq'
- MCK_punpcklwd, // 'punpcklwd'
- MCK_pushfl, // 'pushfl'
- MCK_pushfq, // 'pushfq'
- MCK_pushfw, // 'pushfw'
- MCK_pushl, // 'pushl'
- MCK_pushq, // 'pushq'
- MCK_pushw, // 'pushw'
- MCK_pxor, // 'pxor'
- MCK_rclb, // 'rclb'
- MCK_rcll, // 'rcll'
- MCK_rclq, // 'rclq'
- MCK_rclw, // 'rclw'
- MCK_rcpps, // 'rcpps'
- MCK_rcpss, // 'rcpss'
- MCK_rcrb, // 'rcrb'
- MCK_rcrl, // 'rcrl'
- MCK_rcrq, // 'rcrq'
- MCK_rcrw, // 'rcrw'
- MCK_rdmsr, // 'rdmsr'
- MCK_rdpmc, // 'rdpmc'
- MCK_rdtsc, // 'rdtsc'
- MCK_rdtscp, // 'rdtscp'
- MCK_rep, // 'rep'
- MCK_rep_59_movsq, // 'rep;movsq'
- MCK_rep_59_stosq, // 'rep;stosq'
- MCK_repne, // 'repne'
- MCK_ret, // 'ret'
- MCK_rolb, // 'rolb'
- MCK_roll, // 'roll'
- MCK_rolq, // 'rolq'
- MCK_rolw, // 'rolw'
- MCK_rorb, // 'rorb'
- MCK_rorl, // 'rorl'
- MCK_rorq, // 'rorq'
- MCK_rorw, // 'rorw'
- MCK_rsm, // 'rsm'
- MCK_rsqrtps, // 'rsqrtps'
- MCK_rsqrtss, // 'rsqrtss'
- MCK_sahf, // 'sahf'
- MCK_sarb, // 'sarb'
- MCK_sarl, // 'sarl'
- MCK_sarq, // 'sarq'
- MCK_sarw, // 'sarw'
- MCK_sbbb, // 'sbbb'
- MCK_sbbl, // 'sbbl'
- MCK_sbbq, // 'sbbq'
- MCK_sbbw, // 'sbbw'
- MCK_scasb, // 'scasb'
- MCK_scasl, // 'scasl'
- MCK_scasq, // 'scasq'
- MCK_scasw, // 'scasw'
- MCK_sd, // 'sd'
- MCK_seta, // 'seta'
- MCK_setae, // 'setae'
- MCK_setb, // 'setb'
- MCK_setbe, // 'setbe'
- MCK_sete, // 'sete'
- MCK_setg, // 'setg'
- MCK_setge, // 'setge'
- MCK_setl, // 'setl'
- MCK_setle, // 'setle'
- MCK_setne, // 'setne'
- MCK_setno, // 'setno'
- MCK_setnp, // 'setnp'
- MCK_setns, // 'setns'
- MCK_seto, // 'seto'
- MCK_setp, // 'setp'
- MCK_sets, // 'sets'
- MCK_sfence, // 'sfence'
- MCK_sgdt, // 'sgdt'
- MCK_shlb, // 'shlb'
- MCK_shldl, // 'shldl'
- MCK_shldq, // 'shldq'
- MCK_shldw, // 'shldw'
- MCK_shll, // 'shll'
- MCK_shlq, // 'shlq'
- MCK_shlw, // 'shlw'
- MCK_shrb, // 'shrb'
- MCK_shrdl, // 'shrdl'
- MCK_shrdq, // 'shrdq'
- MCK_shrdw, // 'shrdw'
- MCK_shrl, // 'shrl'
- MCK_shrq, // 'shrq'
- MCK_shrw, // 'shrw'
- MCK_shufpd, // 'shufpd'
- MCK_shufps, // 'shufps'
- MCK_sidt, // 'sidt'
- MCK_sldtq, // 'sldtq'
- MCK_sldtw, // 'sldtw'
- MCK_smswl, // 'smswl'
- MCK_smswq, // 'smswq'
- MCK_smsww, // 'smsww'
- MCK_sqrtpd, // 'sqrtpd'
- MCK_sqrtps, // 'sqrtps'
- MCK_sqrtsd, // 'sqrtsd'
- MCK_sqrtss, // 'sqrtss'
- MCK_ss, // 'ss'
- MCK_stc, // 'stc'
- MCK_std, // 'std'
- MCK_sti, // 'sti'
- MCK_stmxcsr, // 'stmxcsr'
- MCK_stosb, // 'stosb'
- MCK_stosl, // 'stosl'
- MCK_stosw, // 'stosw'
- MCK_strw, // 'strw'
- MCK_subb, // 'subb'
- MCK_subl, // 'subl'
- MCK_subpd, // 'subpd'
- MCK_subps, // 'subps'
- MCK_subq, // 'subq'
- MCK_subsd, // 'subsd'
- MCK_subss, // 'subss'
- MCK_subw, // 'subw'
- MCK_swapgs, // 'swapgs'
- MCK_syscall, // 'syscall'
- MCK_sysenter, // 'sysenter'
- MCK_sysexit, // 'sysexit'
- MCK_sysret, // 'sysret'
- MCK_testb, // 'testb'
- MCK_testl, // 'testl'
- MCK_testq, // 'testq'
- MCK_testw, // 'testw'
- MCK_ucomisd, // 'ucomisd'
- MCK_ucomiss, // 'ucomiss'
- MCK_ud2, // 'ud2'
- MCK_unpckhpd, // 'unpckhpd'
- MCK_unpckhps, // 'unpckhps'
- MCK_unpcklpd, // 'unpcklpd'
- MCK_unpcklps, // 'unpcklps'
- MCK_verr, // 'verr'
- MCK_verw, // 'verw'
- MCK_vmcall, // 'vmcall'
- MCK_vmclear, // 'vmclear'
- MCK_vmlaunch, // 'vmlaunch'
- MCK_vmptrld, // 'vmptrld'
- MCK_vmptrst, // 'vmptrst'
- MCK_vmreadl, // 'vmreadl'
- MCK_vmreadq, // 'vmreadq'
- MCK_vmresume, // 'vmresume'
- MCK_vmwritel, // 'vmwritel'
- MCK_vmwriteq, // 'vmwriteq'
- MCK_vmxoff, // 'vmxoff'
- MCK_vmxon, // 'vmxon'
- MCK_wait, // 'wait'
- MCK_wbinvd, // 'wbinvd'
- MCK_wrmsr, // 'wrmsr'
- MCK_xaddb, // 'xaddb'
- MCK_xaddl, // 'xaddl'
- MCK_xaddq, // 'xaddq'
- MCK_xaddw, // 'xaddw'
- MCK_xchgb, // 'xchgb'
- MCK_xchgl, // 'xchgl'
- MCK_xchgq, // 'xchgq'
- MCK_xchgw, // 'xchgw'
- MCK_xlatb, // 'xlatb'
- MCK_xorb, // 'xorb'
- MCK_xorl, // 'xorl'
- MCK_xorpd, // 'xorpd'
- MCK_xorps, // 'xorps'
- MCK_xorq, // 'xorq'
- MCK_xorw, // 'xorw'
- MCK_AL, // register class 'AL'
- MCK_CL, // register class 'CL'
- MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L'
- MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H'
- MCK_GR8_NOREX, // register class 'GR8_NOREX'
- MCK_GR8, // register class 'GR8'
- MCK_AX, // register class 'AX'
- MCK_DX, // register class 'DX'
- MCK_GR16_ABCD, // register class 'GR16_ABCD'
- MCK_GR16_NOREX, // register class 'GR16_NOREX'
- MCK_GR16, // register class 'GR16'
- MCK_EAX, // register class 'EAX'
- MCK_GR32_AD, // register class 'GR32_AD'
- MCK_GR32_ABCD, // register class 'GR32_ABCD'
- MCK_Reg14, // derived register class
- MCK_GR32_NOREX, // register class 'GR32_NOREX'
- MCK_GR32_NOSP, // register class 'GR32_NOSP'
- MCK_GR32, // register class 'GR32'
- MCK_RAX, // register class 'RAX'
- MCK_GR64_ABCD, // register class 'GR64_ABCD'
- MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP'
- MCK_GR64_NOREX, // register class 'GR64_NOREX'
- MCK_GR64_NOSP, // register class 'GR64_NOSP'
- MCK_GR64, // register class 'GR64'
- MCK_VR64, // register class 'VR64'
- MCK_RFP32, // register class 'RFP32,RFP64,RFP80'
- MCK_XMM0, // register class 'XMM0'
- MCK_FR32, // register class 'FR32,FR64,VR128'
- MCK_VR256, // register class 'VR256'
- MCK_ST0, // register class 'ST0'
- MCK_RST, // register class 'RST'
- MCK_CCR, // register class 'CCR'
- MCK_FS, // register class 'FS'
- MCK_GS, // register class 'GS'
- MCK_SEGMENT_REG, // register class 'SEGMENT_REG'
- MCK_DEBUG_REG, // register class 'DEBUG_REG'
- MCK_CONTROL_REG_32, // register class 'CONTROL_REG_32'
- MCK_CONTROL_REG_64, // register class 'CONTROL_REG_64'
- MCK_ImmSExt8, // user defined class 'ImmSExt8AsmOperand'
- MCK_Imm, // user defined class 'ImmAsmOperand'
- MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand'
- MCK_NoSegMem, // user defined class 'X86NoSegMemAsmOperand'
- MCK_Mem, // user defined class 'X86MemAsmOperand'
- NumMatchClassKinds
-};
-
-}
-
-static MatchClassKind MatchTokenString(StringRef Name) {
- switch (Name.size()) {
- default: break;
- case 1: // 3 strings to match.
- switch (Name[0]) {
- default: break;
- case '*': // 1 strings to match.
- return MCK__STAR_; // "*"
- case '1': // 1 strings to match.
- return MCK_1; // "1"
- case '3': // 1 strings to match.
- return MCK_3; // "3"
- }
- break;
- case 2: // 17 strings to match.
- switch (Name[0]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name[1] != 's')
- break;
- return MCK_cs; // "cs"
- case 'd': // 1 strings to match.
- if (Name[1] != 's')
- break;
- return MCK_ds; // "ds"
- case 'e': // 1 strings to match.
- if (Name[1] != 's')
- break;
- return MCK_es; // "es"
- case 'f': // 1 strings to match.
- if (Name[1] != 's')
- break;
- return MCK_fs; // "fs"
- case 'g': // 1 strings to match.
- if (Name[1] != 's')
- break;
- return MCK_gs; // "gs"
- case 'j': // 8 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 1 strings to match.
- return MCK_ja; // "ja"
- case 'b': // 1 strings to match.
- return MCK_jb; // "jb"
- case 'e': // 1 strings to match.
- return MCK_je; // "je"
- case 'g': // 1 strings to match.
- return MCK_jg; // "jg"
- case 'l': // 1 strings to match.
- return MCK_jl; // "jl"
- case 'o': // 1 strings to match.
- return MCK_jo; // "jo"
- case 'p': // 1 strings to match.
- return MCK_jp; // "jp"
- case 's': // 1 strings to match.
- return MCK_js; // "js"
- }
- break;
- case 'p': // 2 strings to match.
- switch (Name[1]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_pd; // "pd"
- case 's': // 1 strings to match.
- return MCK_ps; // "ps"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[1]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_sd; // "sd"
- case 's': // 1 strings to match.
- return MCK_ss; // "ss"
- }
- break;
- }
- break;
- case 3: // 37 strings to match.
- switch (Name[0]) {
- default: break;
- case 'b': // 3 strings to match.
- if (Name[1] != 't')
- break;
- switch (Name[2]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_btl; // "btl"
- case 'q': // 1 strings to match.
- return MCK_btq; // "btq"
- case 'w': // 1 strings to match.
- return MCK_btw; // "btw"
- }
- break;
- case 'c': // 5 strings to match.
- switch (Name[1]) {
- default: break;
- case 'l': // 3 strings to match.
- switch (Name[2]) {
- default: break;
- case 'c': // 1 strings to match.
- return MCK_clc; // "clc"
- case 'd': // 1 strings to match.
- return MCK_cld; // "cld"
- case 'i': // 1 strings to match.
- return MCK_cli; // "cli"
- }
- break;
- case 'm': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'c': // 1 strings to match.
- return MCK_cmc; // "cmc"
- case 'p': // 1 strings to match.
- return MCK_cmp; // "cmp"
- }
- break;
- }
- break;
- case 'f': // 2 strings to match.
- switch (Name[1]) {
- default: break;
- case 'l': // 1 strings to match.
- if (Name[2] != 'd')
- break;
- return MCK_fld; // "fld"
- case 's': // 1 strings to match.
- if (Name[2] != 't')
- break;
- return MCK_fst; // "fst"
- }
- break;
- case 'h': // 1 strings to match.
- if (Name.substr(1,2) != "lt")
- break;
- return MCK_hlt; // "hlt"
- case 'i': // 4 strings to match.
- if (Name[1] != 'n')
- break;
- switch (Name[2]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_inb; // "inb"
- case 'l': // 1 strings to match.
- return MCK_inl; // "inl"
- case 't': // 1 strings to match.
- return MCK_int; // "int"
- case 'w': // 1 strings to match.
- return MCK_inw; // "inw"
- }
- break;
- case 'j': // 9 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name[2] != 'e')
- break;
- return MCK_jae; // "jae"
- case 'b': // 1 strings to match.
- if (Name[2] != 'e')
- break;
- return MCK_jbe; // "jbe"
- case 'g': // 1 strings to match.
- if (Name[2] != 'e')
- break;
- return MCK_jge; // "jge"
- case 'l': // 1 strings to match.
- if (Name[2] != 'e')
- break;
- return MCK_jle; // "jle"
- case 'm': // 1 strings to match.
- if (Name[2] != 'p')
- break;
- return MCK_jmp; // "jmp"
- case 'n': // 4 strings to match.
- switch (Name[2]) {
- default: break;
- case 'e': // 1 strings to match.
- return MCK_jne; // "jne"
- case 'o': // 1 strings to match.
- return MCK_jno; // "jno"
- case 'p': // 1 strings to match.
- return MCK_jnp; // "jnp"
- case 's': // 1 strings to match.
- return MCK_jns; // "jns"
- }
- break;
- }
- break;
- case 'n': // 1 strings to match.
- if (Name.substr(1,2) != "op")
- break;
- return MCK_nop; // "nop"
- case 'o': // 4 strings to match.
- if (Name[1] != 'r')
- break;
- switch (Name[2]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_orb; // "orb"
- case 'l': // 1 strings to match.
- return MCK_orl; // "orl"
- case 'q': // 1 strings to match.
- return MCK_orq; // "orq"
- case 'w': // 1 strings to match.
- return MCK_orw; // "orw"
- }
- break;
- case 'p': // 1 strings to match.
- if (Name.substr(1,2) != "or")
- break;
- return MCK_por; // "por"
- case 'r': // 3 strings to match.
- switch (Name[1]) {
- default: break;
- case 'e': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'p': // 1 strings to match.
- return MCK_rep; // "rep"
- case 't': // 1 strings to match.
- return MCK_ret; // "ret"
- }
- break;
- case 's': // 1 strings to match.
- if (Name[2] != 'm')
- break;
- return MCK_rsm; // "rsm"
- }
- break;
- case 's': // 3 strings to match.
- if (Name[1] != 't')
- break;
- switch (Name[2]) {
- default: break;
- case 'c': // 1 strings to match.
- return MCK_stc; // "stc"
- case 'd': // 1 strings to match.
- return MCK_std; // "std"
- case 'i': // 1 strings to match.
- return MCK_sti; // "sti"
- }
- break;
- case 'u': // 1 strings to match.
- if (Name.substr(1,2) != "d2")
- break;
- return MCK_ud2; // "ud2"
- }
- break;
- case 4: // 196 strings to match.
- switch (Name[0]) {
- default: break;
- case 'a': // 12 strings to match.
- switch (Name[1]) {
- default: break;
- case 'd': // 8 strings to match.
- switch (Name[2]) {
- default: break;
- case 'c': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_adcb; // "adcb"
- case 'l': // 1 strings to match.
- return MCK_adcl; // "adcl"
- case 'q': // 1 strings to match.
- return MCK_adcq; // "adcq"
- case 'w': // 1 strings to match.
- return MCK_adcw; // "adcw"
- }
- break;
- case 'd': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_addb; // "addb"
- case 'l': // 1 strings to match.
- return MCK_addl; // "addl"
- case 'q': // 1 strings to match.
- return MCK_addq; // "addq"
- case 'w': // 1 strings to match.
- return MCK_addw; // "addw"
- }
- break;
- }
- break;
- case 'n': // 4 strings to match.
- if (Name[2] != 'd')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_andb; // "andb"
- case 'l': // 1 strings to match.
- return MCK_andl; // "andl"
- case 'q': // 1 strings to match.
- return MCK_andq; // "andq"
- case 'w': // 1 strings to match.
- return MCK_andw; // "andw"
- }
- break;
- }
- break;
- case 'b': // 15 strings to match.
- switch (Name[1]) {
- default: break;
- case 's': // 6 strings to match.
- switch (Name[2]) {
- default: break;
- case 'f': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_bsfl; // "bsfl"
- case 'q': // 1 strings to match.
- return MCK_bsfq; // "bsfq"
- case 'w': // 1 strings to match.
- return MCK_bsfw; // "bsfw"
- }
- break;
- case 'r': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_bsrl; // "bsrl"
- case 'q': // 1 strings to match.
- return MCK_bsrq; // "bsrq"
- case 'w': // 1 strings to match.
- return MCK_bsrw; // "bsrw"
- }
- break;
- }
- break;
- case 't': // 9 strings to match.
- switch (Name[2]) {
- default: break;
- case 'c': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_btcl; // "btcl"
- case 'q': // 1 strings to match.
- return MCK_btcq; // "btcq"
- case 'w': // 1 strings to match.
- return MCK_btcw; // "btcw"
- }
- break;
- case 'r': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_btrl; // "btrl"
- case 'q': // 1 strings to match.
- return MCK_btrq; // "btrq"
- case 'w': // 1 strings to match.
- return MCK_btrw; // "btrw"
- }
- break;
- case 's': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_btsl; // "btsl"
- case 'q': // 1 strings to match.
- return MCK_btsq; // "btsq"
- case 'w': // 1 strings to match.
- return MCK_btsw; // "btsw"
- }
- break;
- }
- break;
- }
- break;
- case 'c': // 12 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(2,2) != "ll")
- break;
- return MCK_call; // "call"
- case 'b': // 1 strings to match.
- if (Name.substr(2,2) != "tw")
- break;
- return MCK_cbtw; // "cbtw"
- case 'l': // 3 strings to match.
- if (Name[2] != 't')
- break;
- switch (Name[3]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_cltd; // "cltd"
- case 'q': // 1 strings to match.
- return MCK_cltq; // "cltq"
- case 's': // 1 strings to match.
- return MCK_clts; // "clts"
- }
- break;
- case 'm': // 4 strings to match.
- if (Name[2] != 'p')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_cmpb; // "cmpb"
- case 'l': // 1 strings to match.
- return MCK_cmpl; // "cmpl"
- case 'q': // 1 strings to match.
- return MCK_cmpq; // "cmpq"
- case 'w': // 1 strings to match.
- return MCK_cmpw; // "cmpw"
- }
- break;
- case 'q': // 1 strings to match.
- if (Name.substr(2,2) != "to")
- break;
- return MCK_cqto; // "cqto"
- case 'w': // 2 strings to match.
- if (Name[2] != 't')
- break;
- switch (Name[3]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_cwtd; // "cwtd"
- case 'l': // 1 strings to match.
- return MCK_cwtl; // "cwtl"
- }
- break;
- }
- break;
- case 'd': // 10 strings to match.
- switch (Name[1]) {
- default: break;
- case 'e': // 4 strings to match.
- if (Name[2] != 'c')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_decb; // "decb"
- case 'l': // 1 strings to match.
- return MCK_decl; // "decl"
- case 'q': // 1 strings to match.
- return MCK_decq; // "decq"
- case 'w': // 1 strings to match.
- return MCK_decw; // "decw"
- }
- break;
- case 'i': // 4 strings to match.
- if (Name[2] != 'v')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_divb; // "divb"
- case 'l': // 1 strings to match.
- return MCK_divl; // "divl"
- case 'q': // 1 strings to match.
- return MCK_divq; // "divq"
- case 'w': // 1 strings to match.
- return MCK_divw; // "divw"
- }
- break;
- case 'p': // 2 strings to match.
- if (Name[2] != 'p')
- break;
- switch (Name[3]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_dppd; // "dppd"
- case 's': // 1 strings to match.
- return MCK_dpps; // "dpps"
- }
- break;
- }
- break;
- case 'e': // 1 strings to match.
- if (Name.substr(1,3) != "mms")
- break;
- return MCK_emms; // "emms"
- case 'f': // 22 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'b': // 1 strings to match.
- if (Name[3] != 's')
- break;
- return MCK_fabs; // "fabs"
- case 'd': // 1 strings to match.
- if (Name[3] != 'd')
- break;
- return MCK_fadd; // "fadd"
- }
- break;
- case 'b': // 1 strings to match.
- if (Name.substr(2,2) != "ld")
- break;
- return MCK_fbld; // "fbld"
- case 'c': // 3 strings to match.
- switch (Name[2]) {
- default: break;
- case 'h': // 1 strings to match.
- if (Name[3] != 's')
- break;
- return MCK_fchs; // "fchs"
- case 'o': // 2 strings to match.
- switch (Name[3]) {
- default: break;
- case 'm': // 1 strings to match.
- return MCK_fcom; // "fcom"
- case 's': // 1 strings to match.
- return MCK_fcos; // "fcos"
- }
- break;
- }
- break;
- case 'd': // 1 strings to match.
- if (Name.substr(2,2) != "iv")
- break;
- return MCK_fdiv; // "fdiv"
- case 'l': // 5 strings to match.
- if (Name[2] != 'd')
- break;
- switch (Name[3]) {
- default: break;
- case '1': // 1 strings to match.
- return MCK_fld1; // "fld1"
- case 'l': // 1 strings to match.
- return MCK_fldl; // "fldl"
- case 's': // 1 strings to match.
- return MCK_flds; // "flds"
- case 't': // 1 strings to match.
- return MCK_fldt; // "fldt"
- case 'z': // 1 strings to match.
- return MCK_fldz; // "fldz"
- }
- break;
- case 'm': // 1 strings to match.
- if (Name.substr(2,2) != "ul")
- break;
- return MCK_fmul; // "fmul"
- case 'n': // 1 strings to match.
- if (Name.substr(2,2) != "op")
- break;
- return MCK_fnop; // "fnop"
- case 's': // 5 strings to match.
- switch (Name[2]) {
- default: break;
- case 'i': // 1 strings to match.
- if (Name[3] != 'n')
- break;
- return MCK_fsin; // "fsin"
- case 't': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fstl; // "fstl"
- case 'p': // 1 strings to match.
- return MCK_fstp; // "fstp"
- case 's': // 1 strings to match.
- return MCK_fsts; // "fsts"
- }
- break;
- case 'u': // 1 strings to match.
- if (Name[3] != 'b')
- break;
- return MCK_fsub; // "fsub"
- }
- break;
- case 't': // 1 strings to match.
- if (Name.substr(2,2) != "st")
- break;
- return MCK_ftst; // "ftst"
- case 'x': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name[3] != 'm')
- break;
- return MCK_fxam; // "fxam"
- case 'c': // 1 strings to match.
- if (Name[3] != 'h')
- break;
- return MCK_fxch; // "fxch"
- }
- break;
- }
- break;
- case 'i': // 8 strings to match.
- if (Name[1] != 'n')
- break;
- switch (Name[2]) {
- default: break;
- case 'c': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_incb; // "incb"
- case 'l': // 1 strings to match.
- return MCK_incl; // "incl"
- case 'q': // 1 strings to match.
- return MCK_incq; // "incq"
- case 'w': // 1 strings to match.
- return MCK_incw; // "incw"
- }
- break;
- case 's': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_insb; // "insb"
- case 'l': // 1 strings to match.
- return MCK_insl; // "insl"
- case 'w': // 1 strings to match.
- return MCK_insw; // "insw"
- }
- break;
- case 'v': // 1 strings to match.
- if (Name[3] != 'd')
- break;
- return MCK_invd; // "invd"
- }
- break;
- case 'j': // 3 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name.substr(2,2) != "xz")
- break;
- return MCK_jcxz; // "jcxz"
- case 'm': // 2 strings to match.
- if (Name[2] != 'p')
- break;
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_jmpl; // "jmpl"
- case 'q': // 1 strings to match.
- return MCK_jmpq; // "jmpq"
- }
- break;
- }
- break;
- case 'l': // 29 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 4 strings to match.
- switch (Name[2]) {
- default: break;
- case 'h': // 1 strings to match.
- if (Name[3] != 'f')
- break;
- return MCK_lahf; // "lahf"
- case 'r': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_larl; // "larl"
- case 'q': // 1 strings to match.
- return MCK_larq; // "larq"
- case 'w': // 1 strings to match.
- return MCK_larw; // "larw"
- }
- break;
- }
- break;
- case 'd': // 2 strings to match.
- if (Name[2] != 's')
- break;
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_ldsl; // "ldsl"
- case 'w': // 1 strings to match.
- return MCK_ldsw; // "ldsw"
- }
- break;
- case 'e': // 5 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_leal; // "leal"
- case 'q': // 1 strings to match.
- return MCK_leaq; // "leaq"
- case 'w': // 1 strings to match.
- return MCK_leaw; // "leaw"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_lesl; // "lesl"
- case 'w': // 1 strings to match.
- return MCK_lesw; // "lesw"
- }
- break;
- }
- break;
- case 'f': // 3 strings to match.
- if (Name[2] != 's')
- break;
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_lfsl; // "lfsl"
- case 'q': // 1 strings to match.
- return MCK_lfsq; // "lfsq"
- case 'w': // 1 strings to match.
- return MCK_lfsw; // "lfsw"
- }
- break;
- case 'g': // 4 strings to match.
- switch (Name[2]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[3] != 't')
- break;
- return MCK_lgdt; // "lgdt"
- case 's': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_lgsl; // "lgsl"
- case 'q': // 1 strings to match.
- return MCK_lgsq; // "lgsq"
- case 'w': // 1 strings to match.
- return MCK_lgsw; // "lgsw"
- }
- break;
- }
- break;
- case 'i': // 1 strings to match.
- if (Name.substr(2,2) != "dt")
- break;
- return MCK_lidt; // "lidt"
- case 'o': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name[3] != 'k')
- break;
- return MCK_lock; // "lock"
- case 'o': // 1 strings to match.
- if (Name[3] != 'p')
- break;
- return MCK_loop; // "loop"
- }
- break;
- case 'r': // 1 strings to match.
- if (Name.substr(2,2) != "et")
- break;
- return MCK_lret; // "lret"
- case 's': // 6 strings to match.
- switch (Name[2]) {
- default: break;
- case 'l': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_lsll; // "lsll"
- case 'q': // 1 strings to match.
- return MCK_lslq; // "lslq"
- case 'w': // 1 strings to match.
- return MCK_lslw; // "lslw"
- }
- break;
- case 's': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_lssl; // "lssl"
- case 'q': // 1 strings to match.
- return MCK_lssq; // "lssq"
- case 'w': // 1 strings to match.
- return MCK_lssw; // "lssw"
- }
- break;
- }
- break;
- case 't': // 1 strings to match.
- if (Name.substr(2,2) != "rw")
- break;
- return MCK_ltrw; // "ltrw"
- }
- break;
- case 'm': // 9 strings to match.
- switch (Name[1]) {
- default: break;
- case 'o': // 5 strings to match.
- if (Name[2] != 'v')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_movb; // "movb"
- case 'd': // 1 strings to match.
- return MCK_movd; // "movd"
- case 'l': // 1 strings to match.
- return MCK_movl; // "movl"
- case 'q': // 1 strings to match.
- return MCK_movq; // "movq"
- case 'w': // 1 strings to match.
- return MCK_movw; // "movw"
- }
- break;
- case 'u': // 4 strings to match.
- if (Name[2] != 'l')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_mulb; // "mulb"
- case 'l': // 1 strings to match.
- return MCK_mull; // "mull"
- case 'q': // 1 strings to match.
- return MCK_mulq; // "mulq"
- case 'w': // 1 strings to match.
- return MCK_mulw; // "mulw"
- }
- break;
- }
- break;
- case 'n': // 10 strings to match.
- switch (Name[1]) {
- default: break;
- case 'e': // 4 strings to match.
- if (Name[2] != 'g')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_negb; // "negb"
- case 'l': // 1 strings to match.
- return MCK_negl; // "negl"
- case 'q': // 1 strings to match.
- return MCK_negq; // "negq"
- case 'w': // 1 strings to match.
- return MCK_negw; // "negw"
- }
- break;
- case 'o': // 6 strings to match.
- switch (Name[2]) {
- default: break;
- case 'p': // 2 strings to match.
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_nopl; // "nopl"
- case 'w': // 1 strings to match.
- return MCK_nopw; // "nopw"
- }
- break;
- case 't': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_notb; // "notb"
- case 'l': // 1 strings to match.
- return MCK_notl; // "notl"
- case 'q': // 1 strings to match.
- return MCK_notq; // "notq"
- case 'w': // 1 strings to match.
- return MCK_notw; // "notw"
- }
- break;
- }
- break;
- }
- break;
- case 'o': // 5 strings to match.
- switch (Name[1]) {
- default: break;
- case 'r': // 2 strings to match.
- if (Name[2] != 'p')
- break;
- switch (Name[3]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_orpd; // "orpd"
- case 's': // 1 strings to match.
- return MCK_orps; // "orps"
- }
- break;
- case 'u': // 3 strings to match.
- if (Name[2] != 't')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_outb; // "outb"
- case 'l': // 1 strings to match.
- return MCK_outl; // "outl"
- case 'w': // 1 strings to match.
- return MCK_outw; // "outw"
- }
- break;
- }
- break;
- case 'p': // 5 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(2,2) != "nd")
- break;
- return MCK_pand; // "pand"
- case 'o': // 3 strings to match.
- if (Name[2] != 'p')
- break;
- switch (Name[3]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_popl; // "popl"
- case 'q': // 1 strings to match.
- return MCK_popq; // "popq"
- case 'w': // 1 strings to match.
- return MCK_popw; // "popw"
- }
- break;
- case 'x': // 1 strings to match.
- if (Name.substr(2,2) != "or")
- break;
- return MCK_pxor; // "pxor"
- }
- break;
- case 'r': // 16 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 8 strings to match.
- switch (Name[2]) {
- default: break;
- case 'l': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_rclb; // "rclb"
- case 'l': // 1 strings to match.
- return MCK_rcll; // "rcll"
- case 'q': // 1 strings to match.
- return MCK_rclq; // "rclq"
- case 'w': // 1 strings to match.
- return MCK_rclw; // "rclw"
- }
- break;
- case 'r': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_rcrb; // "rcrb"
- case 'l': // 1 strings to match.
- return MCK_rcrl; // "rcrl"
- case 'q': // 1 strings to match.
- return MCK_rcrq; // "rcrq"
- case 'w': // 1 strings to match.
- return MCK_rcrw; // "rcrw"
- }
- break;
- }
- break;
- case 'o': // 8 strings to match.
- switch (Name[2]) {
- default: break;
- case 'l': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_rolb; // "rolb"
- case 'l': // 1 strings to match.
- return MCK_roll; // "roll"
- case 'q': // 1 strings to match.
- return MCK_rolq; // "rolq"
- case 'w': // 1 strings to match.
- return MCK_rolw; // "rolw"
- }
- break;
- case 'r': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_rorb; // "rorb"
- case 'l': // 1 strings to match.
- return MCK_rorl; // "rorl"
- case 'q': // 1 strings to match.
- return MCK_rorq; // "rorq"
- case 'w': // 1 strings to match.
- return MCK_rorw; // "rorw"
- }
- break;
- }
- break;
- }
- break;
- case 's': // 32 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 5 strings to match.
- switch (Name[2]) {
- default: break;
- case 'h': // 1 strings to match.
- if (Name[3] != 'f')
- break;
- return MCK_sahf; // "sahf"
- case 'r': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_sarb; // "sarb"
- case 'l': // 1 strings to match.
- return MCK_sarl; // "sarl"
- case 'q': // 1 strings to match.
- return MCK_sarq; // "sarq"
- case 'w': // 1 strings to match.
- return MCK_sarw; // "sarw"
- }
- break;
- }
- break;
- case 'b': // 4 strings to match.
- if (Name[2] != 'b')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_sbbb; // "sbbb"
- case 'l': // 1 strings to match.
- return MCK_sbbl; // "sbbl"
- case 'q': // 1 strings to match.
- return MCK_sbbq; // "sbbq"
- case 'w': // 1 strings to match.
- return MCK_sbbw; // "sbbw"
- }
- break;
- case 'e': // 8 strings to match.
- if (Name[2] != 't')
- break;
- switch (Name[3]) {
- default: break;
- case 'a': // 1 strings to match.
- return MCK_seta; // "seta"
- case 'b': // 1 strings to match.
- return MCK_setb; // "setb"
- case 'e': // 1 strings to match.
- return MCK_sete; // "sete"
- case 'g': // 1 strings to match.
- return MCK_setg; // "setg"
- case 'l': // 1 strings to match.
- return MCK_setl; // "setl"
- case 'o': // 1 strings to match.
- return MCK_seto; // "seto"
- case 'p': // 1 strings to match.
- return MCK_setp; // "setp"
- case 's': // 1 strings to match.
- return MCK_sets; // "sets"
- }
- break;
- case 'g': // 1 strings to match.
- if (Name.substr(2,2) != "dt")
- break;
- return MCK_sgdt; // "sgdt"
- case 'h': // 8 strings to match.
- switch (Name[2]) {
- default: break;
- case 'l': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_shlb; // "shlb"
- case 'l': // 1 strings to match.
- return MCK_shll; // "shll"
- case 'q': // 1 strings to match.
- return MCK_shlq; // "shlq"
- case 'w': // 1 strings to match.
- return MCK_shlw; // "shlw"
- }
- break;
- case 'r': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_shrb; // "shrb"
- case 'l': // 1 strings to match.
- return MCK_shrl; // "shrl"
- case 'q': // 1 strings to match.
- return MCK_shrq; // "shrq"
- case 'w': // 1 strings to match.
- return MCK_shrw; // "shrw"
- }
- break;
- }
- break;
- case 'i': // 1 strings to match.
- if (Name.substr(2,2) != "dt")
- break;
- return MCK_sidt; // "sidt"
- case 't': // 1 strings to match.
- if (Name.substr(2,2) != "rw")
- break;
- return MCK_strw; // "strw"
- case 'u': // 4 strings to match.
- if (Name[2] != 'b')
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_subb; // "subb"
- case 'l': // 1 strings to match.
- return MCK_subl; // "subl"
- case 'q': // 1 strings to match.
- return MCK_subq; // "subq"
- case 'w': // 1 strings to match.
- return MCK_subw; // "subw"
- }
- break;
- }
- break;
- case 'v': // 2 strings to match.
- if (Name.substr(1,2) != "er")
- break;
- switch (Name[3]) {
- default: break;
- case 'r': // 1 strings to match.
- return MCK_verr; // "verr"
- case 'w': // 1 strings to match.
- return MCK_verw; // "verw"
- }
- break;
- case 'w': // 1 strings to match.
- if (Name.substr(1,3) != "ait")
- break;
- return MCK_wait; // "wait"
- case 'x': // 4 strings to match.
- if (Name.substr(1,2) != "or")
- break;
- switch (Name[3]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_xorb; // "xorb"
- case 'l': // 1 strings to match.
- return MCK_xorl; // "xorl"
- case 'q': // 1 strings to match.
- return MCK_xorq; // "xorq"
- case 'w': // 1 strings to match.
- return MCK_xorw; // "xorw"
- }
- break;
- }
- break;
- case 5: // 179 strings to match.
- switch (Name[0]) {
- default: break;
- case 'a': // 6 strings to match.
- switch (Name[1]) {
- default: break;
- case 'd': // 4 strings to match.
- if (Name[2] != 'd')
- break;
- switch (Name[3]) {
- default: break;
- case 'p': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_addpd; // "addpd"
- case 's': // 1 strings to match.
- return MCK_addps; // "addps"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_addsd; // "addsd"
- case 's': // 1 strings to match.
- return MCK_addss; // "addss"
- }
- break;
- }
- break;
- case 'n': // 2 strings to match.
- if (Name.substr(2,2) != "dp")
- break;
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_andpd; // "andpd"
- case 's': // 1 strings to match.
- return MCK_andps; // "andps"
- }
- break;
- }
- break;
- case 'c': // 7 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(2,3) != "llq")
- break;
- return MCK_callq; // "callq"
- case 'm': // 4 strings to match.
- if (Name.substr(2,2) != "ps")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_cmpsb; // "cmpsb"
- case 'l': // 1 strings to match.
- return MCK_cmpsl; // "cmpsl"
- case 'q': // 1 strings to match.
- return MCK_cmpsq; // "cmpsq"
- case 'w': // 1 strings to match.
- return MCK_cmpsw; // "cmpsw"
- }
- break;
- case 'p': // 1 strings to match.
- if (Name.substr(2,3) != "uid")
- break;
- return MCK_cpuid; // "cpuid"
- case 'r': // 1 strings to match.
- if (Name.substr(2,3) != "c32")
- break;
- return MCK_crc32; // "crc32"
- }
- break;
- case 'd': // 4 strings to match.
- if (Name.substr(1,2) != "iv")
- break;
- switch (Name[3]) {
- default: break;
- case 'p': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_divpd; // "divpd"
- case 's': // 1 strings to match.
- return MCK_divps; // "divps"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_divsd; // "divsd"
- case 's': // 1 strings to match.
- return MCK_divss; // "divss"
- }
- break;
- }
- break;
- case 'e': // 1 strings to match.
- if (Name.substr(1,4) != "nter")
- break;
- return MCK_enter; // "enter"
- case 'f': // 35 strings to match.
- switch (Name[1]) {
- default: break;
- case '2': // 1 strings to match.
- if (Name.substr(2,3) != "xm1")
- break;
- return MCK_f2xm1; // "f2xm1"
- case 'a': // 3 strings to match.
- if (Name.substr(2,2) != "dd")
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_faddl; // "faddl"
- case 'p': // 1 strings to match.
- return MCK_faddp; // "faddp"
- case 's': // 1 strings to match.
- return MCK_fadds; // "fadds"
- }
- break;
- case 'b': // 1 strings to match.
- if (Name.substr(2,3) != "stp")
- break;
- return MCK_fbstp; // "fbstp"
- case 'c': // 3 strings to match.
- if (Name.substr(2,2) != "om")
- break;
- switch (Name[4]) {
- default: break;
- case 'i': // 1 strings to match.
- return MCK_fcomi; // "fcomi"
- case 'l': // 1 strings to match.
- return MCK_fcoml; // "fcoml"
- case 'p': // 1 strings to match.
- return MCK_fcomp; // "fcomp"
- }
- break;
- case 'd': // 4 strings to match.
- if (Name.substr(2,2) != "iv")
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fdivl; // "fdivl"
- case 'p': // 1 strings to match.
- return MCK_fdivp; // "fdivp"
- case 'r': // 1 strings to match.
- return MCK_fdivr; // "fdivr"
- case 's': // 1 strings to match.
- return MCK_fdivs; // "fdivs"
- }
- break;
- case 'e': // 1 strings to match.
- if (Name.substr(2,3) != "mms")
- break;
- return MCK_femms; // "femms"
- case 'f': // 1 strings to match.
- if (Name.substr(2,3) != "ree")
- break;
- return MCK_ffree; // "ffree"
- case 'i': // 4 strings to match.
- switch (Name[2]) {
- default: break;
- case 'l': // 2 strings to match.
- if (Name[3] != 'd')
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fildl; // "fildl"
- case 's': // 1 strings to match.
- return MCK_filds; // "filds"
- }
- break;
- case 's': // 2 strings to match.
- if (Name[3] != 't')
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fistl; // "fistl"
- case 's': // 1 strings to match.
- return MCK_fists; // "fists"
- }
- break;
- }
- break;
- case 'l': // 2 strings to match.
- if (Name[2] != 'd')
- break;
- switch (Name[3]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name[4] != 'w')
- break;
- return MCK_fldcw; // "fldcw"
- case 'p': // 1 strings to match.
- if (Name[4] != 'i')
- break;
- return MCK_fldpi; // "fldpi"
- }
- break;
- case 'm': // 3 strings to match.
- if (Name.substr(2,2) != "ul")
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fmull; // "fmull"
- case 'p': // 1 strings to match.
- return MCK_fmulp; // "fmulp"
- case 's': // 1 strings to match.
- return MCK_fmuls; // "fmuls"
- }
- break;
- case 'p': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'r': // 1 strings to match.
- if (Name.substr(3,2) != "em")
- break;
- return MCK_fprem; // "fprem"
- case 't': // 1 strings to match.
- if (Name.substr(3,2) != "an")
- break;
- return MCK_fptan; // "fptan"
- }
- break;
- case 's': // 8 strings to match.
- switch (Name[2]) {
- default: break;
- case 'q': // 1 strings to match.
- if (Name.substr(3,2) != "rt")
- break;
- return MCK_fsqrt; // "fsqrt"
- case 't': // 3 strings to match.
- if (Name[3] != 'p')
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fstpl; // "fstpl"
- case 's': // 1 strings to match.
- return MCK_fstps; // "fstps"
- case 't': // 1 strings to match.
- return MCK_fstpt; // "fstpt"
- }
- break;
- case 'u': // 4 strings to match.
- if (Name[3] != 'b')
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fsubl; // "fsubl"
- case 'p': // 1 strings to match.
- return MCK_fsubp; // "fsubp"
- case 'r': // 1 strings to match.
- return MCK_fsubr; // "fsubr"
- case 's': // 1 strings to match.
- return MCK_fsubs; // "fsubs"
- }
- break;
- }
- break;
- case 'u': // 1 strings to match.
- if (Name.substr(2,3) != "com")
- break;
- return MCK_fucom; // "fucom"
- case 'y': // 1 strings to match.
- if (Name.substr(2,3) != "l2x")
- break;
- return MCK_fyl2x; // "fyl2x"
- }
- break;
- case 'i': // 11 strings to match.
- switch (Name[1]) {
- default: break;
- case 'd': // 4 strings to match.
- if (Name.substr(2,2) != "iv")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_idivb; // "idivb"
- case 'l': // 1 strings to match.
- return MCK_idivl; // "idivl"
- case 'q': // 1 strings to match.
- return MCK_idivq; // "idivq"
- case 'w': // 1 strings to match.
- return MCK_idivw; // "idivw"
- }
- break;
- case 'm': // 4 strings to match.
- if (Name.substr(2,2) != "ul")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_imulb; // "imulb"
- case 'l': // 1 strings to match.
- return MCK_imull; // "imull"
- case 'q': // 1 strings to match.
- return MCK_imulq; // "imulq"
- case 'w': // 1 strings to match.
- return MCK_imulw; // "imulw"
- }
- break;
- case 'r': // 3 strings to match.
- if (Name.substr(2,2) != "et")
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_iretl; // "iretl"
- case 'q': // 1 strings to match.
- return MCK_iretq; // "iretq"
- case 'w': // 1 strings to match.
- return MCK_iretw; // "iretw"
- }
- break;
- }
- break;
- case 'l': // 12 strings to match.
- switch (Name[1]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name.substr(2,3) != "dqu")
- break;
- return MCK_lddqu; // "lddqu"
- case 'e': // 1 strings to match.
- if (Name.substr(2,3) != "ave")
- break;
- return MCK_leave; // "leave"
- case 'j': // 3 strings to match.
- if (Name.substr(2,2) != "mp")
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_ljmpl; // "ljmpl"
- case 'q': // 1 strings to match.
- return MCK_ljmpq; // "ljmpq"
- case 'w': // 1 strings to match.
- return MCK_ljmpw; // "ljmpw"
- }
- break;
- case 'l': // 1 strings to match.
- if (Name.substr(2,3) != "dtw")
- break;
- return MCK_lldtw; // "lldtw"
- case 'm': // 1 strings to match.
- if (Name.substr(2,3) != "sww")
- break;
- return MCK_lmsww; // "lmsww"
- case 'o': // 5 strings to match.
- switch (Name[2]) {
- default: break;
- case 'd': // 4 strings to match.
- if (Name[3] != 's')
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_lodsb; // "lodsb"
- case 'l': // 1 strings to match.
- return MCK_lodsl; // "lodsl"
- case 'q': // 1 strings to match.
- return MCK_lodsq; // "lodsq"
- case 'w': // 1 strings to match.
- return MCK_lodsw; // "lodsw"
- }
- break;
- case 'o': // 1 strings to match.
- if (Name.substr(3,2) != "pe")
- break;
- return MCK_loope; // "loope"
- }
- break;
- }
- break;
- case 'm': // 18 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 4 strings to match.
- if (Name[2] != 'x')
- break;
- switch (Name[3]) {
- default: break;
- case 'p': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_maxpd; // "maxpd"
- case 's': // 1 strings to match.
- return MCK_maxps; // "maxps"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_maxsd; // "maxsd"
- case 's': // 1 strings to match.
- return MCK_maxss; // "maxss"
- }
- break;
- }
- break;
- case 'i': // 4 strings to match.
- if (Name[2] != 'n')
- break;
- switch (Name[3]) {
- default: break;
- case 'p': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_minpd; // "minpd"
- case 's': // 1 strings to match.
- return MCK_minps; // "minps"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_minsd; // "minsd"
- case 's': // 1 strings to match.
- return MCK_minss; // "minss"
- }
- break;
- }
- break;
- case 'o': // 5 strings to match.
- if (Name.substr(2,2) != "vs")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_movsb; // "movsb"
- case 'd': // 1 strings to match.
- return MCK_movsd; // "movsd"
- case 'l': // 1 strings to match.
- return MCK_movsl; // "movsl"
- case 's': // 1 strings to match.
- return MCK_movss; // "movss"
- case 'w': // 1 strings to match.
- return MCK_movsw; // "movsw"
- }
- break;
- case 'u': // 4 strings to match.
- if (Name[2] != 'l')
- break;
- switch (Name[3]) {
- default: break;
- case 'p': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_mulpd; // "mulpd"
- case 's': // 1 strings to match.
- return MCK_mulps; // "mulps"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_mulsd; // "mulsd"
- case 's': // 1 strings to match.
- return MCK_mulss; // "mulss"
- }
- break;
- }
- break;
- case 'w': // 1 strings to match.
- if (Name.substr(2,3) != "ait")
- break;
- return MCK_mwait; // "mwait"
- }
- break;
- case 'o': // 3 strings to match.
- if (Name.substr(1,3) != "uts")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_outsb; // "outsb"
- case 'l': // 1 strings to match.
- return MCK_outsl; // "outsl"
- case 'w': // 1 strings to match.
- return MCK_outsw; // "outsw"
- }
- break;
- case 'p': // 29 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 10 strings to match.
- switch (Name[2]) {
- default: break;
- case 'b': // 3 strings to match.
- if (Name[3] != 's')
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pabsb; // "pabsb"
- case 'd': // 1 strings to match.
- return MCK_pabsd; // "pabsd"
- case 'w': // 1 strings to match.
- return MCK_pabsw; // "pabsw"
- }
- break;
- case 'd': // 4 strings to match.
- if (Name[3] != 'd')
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_paddb; // "paddb"
- case 'd': // 1 strings to match.
- return MCK_paddd; // "paddd"
- case 'q': // 1 strings to match.
- return MCK_paddq; // "paddq"
- case 'w': // 1 strings to match.
- return MCK_paddw; // "paddw"
- }
- break;
- case 'n': // 1 strings to match.
- if (Name.substr(3,2) != "dn")
- break;
- return MCK_pandn; // "pandn"
- case 'v': // 2 strings to match.
- if (Name[3] != 'g')
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pavgb; // "pavgb"
- case 'w': // 1 strings to match.
- return MCK_pavgw; // "pavgw"
- }
- break;
- }
- break;
- case 'o': // 3 strings to match.
- if (Name.substr(2,2) != "pf")
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_popfl; // "popfl"
- case 'q': // 1 strings to match.
- return MCK_popfq; // "popfq"
- case 'w': // 1 strings to match.
- return MCK_popfw; // "popfw"
- }
- break;
- case 's': // 12 strings to match.
- switch (Name[2]) {
- default: break;
- case 'l': // 3 strings to match.
- if (Name[3] != 'l')
- break;
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_pslld; // "pslld"
- case 'q': // 1 strings to match.
- return MCK_psllq; // "psllq"
- case 'w': // 1 strings to match.
- return MCK_psllw; // "psllw"
- }
- break;
- case 'r': // 5 strings to match.
- switch (Name[3]) {
- default: break;
- case 'a': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_psrad; // "psrad"
- case 'w': // 1 strings to match.
- return MCK_psraw; // "psraw"
- }
- break;
- case 'l': // 3 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_psrld; // "psrld"
- case 'q': // 1 strings to match.
- return MCK_psrlq; // "psrlq"
- case 'w': // 1 strings to match.
- return MCK_psrlw; // "psrlw"
- }
- break;
- }
- break;
- case 'u': // 4 strings to match.
- if (Name[3] != 'b')
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_psubb; // "psubb"
- case 'd': // 1 strings to match.
- return MCK_psubd; // "psubd"
- case 'q': // 1 strings to match.
- return MCK_psubq; // "psubq"
- case 'w': // 1 strings to match.
- return MCK_psubw; // "psubw"
- }
- break;
- }
- break;
- case 't': // 1 strings to match.
- if (Name.substr(2,3) != "est")
- break;
- return MCK_ptest; // "ptest"
- case 'u': // 3 strings to match.
- if (Name.substr(2,2) != "sh")
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_pushl; // "pushl"
- case 'q': // 1 strings to match.
- return MCK_pushq; // "pushq"
- case 'w': // 1 strings to match.
- return MCK_pushw; // "pushw"
- }
- break;
- }
- break;
- case 'r': // 6 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 2 strings to match.
- if (Name[2] != 'p')
- break;
- switch (Name[3]) {
- default: break;
- case 'p': // 1 strings to match.
- if (Name[4] != 's')
- break;
- return MCK_rcpps; // "rcpps"
- case 's': // 1 strings to match.
- if (Name[4] != 's')
- break;
- return MCK_rcpss; // "rcpss"
- }
- break;
- case 'd': // 3 strings to match.
- switch (Name[2]) {
- default: break;
- case 'm': // 1 strings to match.
- if (Name.substr(3,2) != "sr")
- break;
- return MCK_rdmsr; // "rdmsr"
- case 'p': // 1 strings to match.
- if (Name.substr(3,2) != "mc")
- break;
- return MCK_rdpmc; // "rdpmc"
- case 't': // 1 strings to match.
- if (Name.substr(3,2) != "sc")
- break;
- return MCK_rdtsc; // "rdtsc"
- }
- break;
- case 'e': // 1 strings to match.
- if (Name.substr(2,3) != "pne")
- break;
- return MCK_repne; // "repne"
- }
- break;
- case 's': // 30 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 4 strings to match.
- if (Name.substr(2,2) != "as")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_scasb; // "scasb"
- case 'l': // 1 strings to match.
- return MCK_scasl; // "scasl"
- case 'q': // 1 strings to match.
- return MCK_scasq; // "scasq"
- case 'w': // 1 strings to match.
- return MCK_scasw; // "scasw"
- }
- break;
- case 'e': // 8 strings to match.
- if (Name[2] != 't')
- break;
- switch (Name[3]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name[4] != 'e')
- break;
- return MCK_setae; // "setae"
- case 'b': // 1 strings to match.
- if (Name[4] != 'e')
- break;
- return MCK_setbe; // "setbe"
- case 'g': // 1 strings to match.
- if (Name[4] != 'e')
- break;
- return MCK_setge; // "setge"
- case 'l': // 1 strings to match.
- if (Name[4] != 'e')
- break;
- return MCK_setle; // "setle"
- case 'n': // 4 strings to match.
- switch (Name[4]) {
- default: break;
- case 'e': // 1 strings to match.
- return MCK_setne; // "setne"
- case 'o': // 1 strings to match.
- return MCK_setno; // "setno"
- case 'p': // 1 strings to match.
- return MCK_setnp; // "setnp"
- case 's': // 1 strings to match.
- return MCK_setns; // "setns"
- }
- break;
- }
- break;
- case 'h': // 6 strings to match.
- switch (Name[2]) {
- default: break;
- case 'l': // 3 strings to match.
- if (Name[3] != 'd')
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_shldl; // "shldl"
- case 'q': // 1 strings to match.
- return MCK_shldq; // "shldq"
- case 'w': // 1 strings to match.
- return MCK_shldw; // "shldw"
- }
- break;
- case 'r': // 3 strings to match.
- if (Name[3] != 'd')
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_shrdl; // "shrdl"
- case 'q': // 1 strings to match.
- return MCK_shrdq; // "shrdq"
- case 'w': // 1 strings to match.
- return MCK_shrdw; // "shrdw"
- }
- break;
- }
- break;
- case 'l': // 2 strings to match.
- if (Name.substr(2,2) != "dt")
- break;
- switch (Name[4]) {
- default: break;
- case 'q': // 1 strings to match.
- return MCK_sldtq; // "sldtq"
- case 'w': // 1 strings to match.
- return MCK_sldtw; // "sldtw"
- }
- break;
- case 'm': // 3 strings to match.
- if (Name.substr(2,2) != "sw")
- break;
- switch (Name[4]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_smswl; // "smswl"
- case 'q': // 1 strings to match.
- return MCK_smswq; // "smswq"
- case 'w': // 1 strings to match.
- return MCK_smsww; // "smsww"
- }
- break;
- case 't': // 3 strings to match.
- if (Name.substr(2,2) != "os")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_stosb; // "stosb"
- case 'l': // 1 strings to match.
- return MCK_stosl; // "stosl"
- case 'w': // 1 strings to match.
- return MCK_stosw; // "stosw"
- }
- break;
- case 'u': // 4 strings to match.
- if (Name[2] != 'b')
- break;
- switch (Name[3]) {
- default: break;
- case 'p': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_subpd; // "subpd"
- case 's': // 1 strings to match.
- return MCK_subps; // "subps"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_subsd; // "subsd"
- case 's': // 1 strings to match.
- return MCK_subss; // "subss"
- }
- break;
- }
- break;
- }
- break;
- case 't': // 4 strings to match.
- if (Name.substr(1,3) != "est")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_testb; // "testb"
- case 'l': // 1 strings to match.
- return MCK_testl; // "testl"
- case 'q': // 1 strings to match.
- return MCK_testq; // "testq"
- case 'w': // 1 strings to match.
- return MCK_testw; // "testw"
- }
- break;
- case 'v': // 1 strings to match.
- if (Name.substr(1,4) != "mxon")
- break;
- return MCK_vmxon; // "vmxon"
- case 'w': // 1 strings to match.
- if (Name.substr(1,4) != "rmsr")
- break;
- return MCK_wrmsr; // "wrmsr"
- case 'x': // 11 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 4 strings to match.
- if (Name.substr(2,2) != "dd")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_xaddb; // "xaddb"
- case 'l': // 1 strings to match.
- return MCK_xaddl; // "xaddl"
- case 'q': // 1 strings to match.
- return MCK_xaddq; // "xaddq"
- case 'w': // 1 strings to match.
- return MCK_xaddw; // "xaddw"
- }
- break;
- case 'c': // 4 strings to match.
- if (Name.substr(2,2) != "hg")
- break;
- switch (Name[4]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_xchgb; // "xchgb"
- case 'l': // 1 strings to match.
- return MCK_xchgl; // "xchgl"
- case 'q': // 1 strings to match.
- return MCK_xchgq; // "xchgq"
- case 'w': // 1 strings to match.
- return MCK_xchgw; // "xchgw"
- }
- break;
- case 'l': // 1 strings to match.
- if (Name.substr(2,3) != "atb")
- break;
- return MCK_xlatb; // "xlatb"
- case 'o': // 2 strings to match.
- if (Name.substr(2,2) != "rp")
- break;
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_xorpd; // "xorpd"
- case 's': // 1 strings to match.
- return MCK_xorps; // "xorps"
- }
- break;
- }
- break;
- }
- break;
- case 6: // 165 strings to match.
- switch (Name[0]) {
- default: break;
- case 'a': // 2 strings to match.
- if (Name.substr(1,4) != "ndnp")
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_andnpd; // "andnpd"
- case 's': // 1 strings to match.
- return MCK_andnps; // "andnps"
- }
- break;
- case 'b': // 2 strings to match.
- if (Name.substr(1,4) != "swap")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_bswapl; // "bswapl"
- case 'q': // 1 strings to match.
- return MCK_bswapq; // "bswapq"
- }
- break;
- case 'c': // 26 strings to match.
- switch (Name[1]) {
- default: break;
- case 'm': // 24 strings to match.
- if (Name.substr(2,2) != "ov")
- break;
- switch (Name[4]) {
- default: break;
- case 'a': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmoval; // "cmoval"
- case 'q': // 1 strings to match.
- return MCK_cmovaq; // "cmovaq"
- case 'w': // 1 strings to match.
- return MCK_cmovaw; // "cmovaw"
- }
- break;
- case 'b': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovbl; // "cmovbl"
- case 'q': // 1 strings to match.
- return MCK_cmovbq; // "cmovbq"
- case 'w': // 1 strings to match.
- return MCK_cmovbw; // "cmovbw"
- }
- break;
- case 'e': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovel; // "cmovel"
- case 'q': // 1 strings to match.
- return MCK_cmoveq; // "cmoveq"
- case 'w': // 1 strings to match.
- return MCK_cmovew; // "cmovew"
- }
- break;
- case 'g': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovgl; // "cmovgl"
- case 'q': // 1 strings to match.
- return MCK_cmovgq; // "cmovgq"
- case 'w': // 1 strings to match.
- return MCK_cmovgw; // "cmovgw"
- }
- break;
- case 'l': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovll; // "cmovll"
- case 'q': // 1 strings to match.
- return MCK_cmovlq; // "cmovlq"
- case 'w': // 1 strings to match.
- return MCK_cmovlw; // "cmovlw"
- }
- break;
- case 'o': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovol; // "cmovol"
- case 'q': // 1 strings to match.
- return MCK_cmovoq; // "cmovoq"
- case 'w': // 1 strings to match.
- return MCK_cmovow; // "cmovow"
- }
- break;
- case 'p': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovpl; // "cmovpl"
- case 'q': // 1 strings to match.
- return MCK_cmovpq; // "cmovpq"
- case 'w': // 1 strings to match.
- return MCK_cmovpw; // "cmovpw"
- }
- break;
- case 's': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovsl; // "cmovsl"
- case 'q': // 1 strings to match.
- return MCK_cmovsq; // "cmovsq"
- case 'w': // 1 strings to match.
- return MCK_cmovsw; // "cmovsw"
- }
- break;
- }
- break;
- case 'o': // 2 strings to match.
- if (Name.substr(2,3) != "mis")
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_comisd; // "comisd"
- case 's': // 1 strings to match.
- return MCK_comiss; // "comiss"
- }
- break;
- }
- break;
- case 'f': // 43 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 7 strings to match.
- switch (Name[2]) {
- default: break;
- case 'm': // 3 strings to match.
- if (Name.substr(3,2) != "ov")
- break;
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_fcmovb; // "fcmovb"
- case 'e': // 1 strings to match.
- return MCK_fcmove; // "fcmove"
- case 'u': // 1 strings to match.
- return MCK_fcmovu; // "fcmovu"
- }
- break;
- case 'o': // 4 strings to match.
- if (Name[3] != 'm')
- break;
- switch (Name[4]) {
- default: break;
- case 'i': // 1 strings to match.
- if (Name[5] != 'p')
- break;
- return MCK_fcomip; // "fcomip"
- case 'l': // 1 strings to match.
- if (Name[5] != 'l')
- break;
- return MCK_fcomll; // "fcomll"
- case 'p': // 2 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fcompl; // "fcompl"
- case 'p': // 1 strings to match.
- return MCK_fcompp; // "fcompp"
- }
- break;
- }
- break;
- }
- break;
- case 'd': // 3 strings to match.
- if (Name.substr(2,3) != "ivr")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fdivrl; // "fdivrl"
- case 'p': // 1 strings to match.
- return MCK_fdivrp; // "fdivrp"
- case 's': // 1 strings to match.
- return MCK_fdivrs; // "fdivrs"
- }
- break;
- case 'i': // 13 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 2 strings to match.
- if (Name.substr(3,2) != "dd")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fiaddl; // "fiaddl"
- case 's': // 1 strings to match.
- return MCK_fiadds; // "fiadds"
- }
- break;
- case 'c': // 2 strings to match.
- if (Name.substr(3,2) != "om")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_ficoml; // "ficoml"
- case 'w': // 1 strings to match.
- return MCK_ficomw; // "ficomw"
- }
- break;
- case 'd': // 2 strings to match.
- if (Name.substr(3,2) != "iv")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fidivl; // "fidivl"
- case 's': // 1 strings to match.
- return MCK_fidivs; // "fidivs"
- }
- break;
- case 'l': // 1 strings to match.
- if (Name.substr(3,3) != "dll")
- break;
- return MCK_fildll; // "fildll"
- case 'm': // 2 strings to match.
- if (Name.substr(3,2) != "ul")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fimull; // "fimull"
- case 's': // 1 strings to match.
- return MCK_fimuls; // "fimuls"
- }
- break;
- case 's': // 4 strings to match.
- switch (Name[3]) {
- default: break;
- case 't': // 2 strings to match.
- if (Name[4] != 'p')
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fistpl; // "fistpl"
- case 's': // 1 strings to match.
- return MCK_fistps; // "fistps"
- }
- break;
- case 'u': // 2 strings to match.
- if (Name[4] != 'b')
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fisubl; // "fisubl"
- case 's': // 1 strings to match.
- return MCK_fisubs; // "fisubs"
- }
- break;
- }
- break;
- }
- break;
- case 'l': // 5 strings to match.
- if (Name[2] != 'd')
- break;
- switch (Name[3]) {
- default: break;
- case 'e': // 1 strings to match.
- if (Name.substr(4,2) != "nv")
- break;
- return MCK_fldenv; // "fldenv"
- case 'l': // 4 strings to match.
- switch (Name[4]) {
- default: break;
- case '2': // 2 strings to match.
- switch (Name[5]) {
- default: break;
- case 'e': // 1 strings to match.
- return MCK_fldl2e; // "fldl2e"
- case 't': // 1 strings to match.
- return MCK_fldl2t; // "fldl2t"
- }
- break;
- case 'g': // 1 strings to match.
- if (Name[5] != '2')
- break;
- return MCK_fldlg2; // "fldlg2"
- case 'n': // 1 strings to match.
- if (Name[5] != '2')
- break;
- return MCK_fldln2; // "fldln2"
- }
- break;
- }
- break;
- case 'n': // 5 strings to match.
- switch (Name[2]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name.substr(3,3) != "lex")
- break;
- return MCK_fnclex; // "fnclex"
- case 'i': // 1 strings to match.
- if (Name.substr(3,3) != "nit")
- break;
- return MCK_fninit; // "fninit"
- case 's': // 3 strings to match.
- switch (Name[3]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(4,2) != "ve")
- break;
- return MCK_fnsave; // "fnsave"
- case 't': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name[5] != 'w')
- break;
- return MCK_fnstcw; // "fnstcw"
- case 's': // 1 strings to match.
- if (Name[5] != 'w')
- break;
- return MCK_fnstsw; // "fnstsw"
- }
- break;
- }
- break;
- }
- break;
- case 'p': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(3,3) != "tan")
- break;
- return MCK_fpatan; // "fpatan"
- case 'r': // 1 strings to match.
- if (Name.substr(3,3) != "em1")
- break;
- return MCK_fprem1; // "fprem1"
- }
- break;
- case 'r': // 1 strings to match.
- if (Name.substr(2,4) != "stor")
- break;
- return MCK_frstor; // "frstor"
- case 's': // 4 strings to match.
- switch (Name[2]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name.substr(3,3) != "ale")
- break;
- return MCK_fscale; // "fscale"
- case 'u': // 3 strings to match.
- if (Name.substr(3,2) != "br")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fsubrl; // "fsubrl"
- case 'p': // 1 strings to match.
- return MCK_fsubrp; // "fsubrp"
- case 's': // 1 strings to match.
- return MCK_fsubrs; // "fsubrs"
- }
- break;
- }
- break;
- case 'u': // 2 strings to match.
- if (Name.substr(2,3) != "com")
- break;
- switch (Name[5]) {
- default: break;
- case 'i': // 1 strings to match.
- return MCK_fucomi; // "fucomi"
- case 'p': // 1 strings to match.
- return MCK_fucomp; // "fucomp"
- }
- break;
- case 'x': // 1 strings to match.
- if (Name.substr(2,4) != "save")
- break;
- return MCK_fxsave; // "fxsave"
- }
- break;
- case 'h': // 4 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 2 strings to match.
- if (Name.substr(2,3) != "ddp")
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_haddpd; // "haddpd"
- case 's': // 1 strings to match.
- return MCK_haddps; // "haddps"
- }
- break;
- case 's': // 2 strings to match.
- if (Name.substr(2,3) != "ubp")
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_hsubpd; // "hsubpd"
- case 's': // 1 strings to match.
- return MCK_hsubps; // "hsubps"
- }
- break;
- }
- break;
- case 'i': // 2 strings to match.
- if (Name.substr(1,2) != "nv")
- break;
- switch (Name[3]) {
- default: break;
- case 'e': // 1 strings to match.
- if (Name.substr(4,2) != "pt")
- break;
- return MCK_invept; // "invept"
- case 'l': // 1 strings to match.
- if (Name.substr(4,2) != "pg")
- break;
- return MCK_invlpg; // "invlpg"
- }
- break;
- case 'l': // 5 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 3 strings to match.
- if (Name.substr(2,3) != "all")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_lcalll; // "lcalll"
- case 'q': // 1 strings to match.
- return MCK_lcallq; // "lcallq"
- case 'w': // 1 strings to match.
- return MCK_lcallw; // "lcallw"
- }
- break;
- case 'f': // 1 strings to match.
- if (Name.substr(2,4) != "ence")
- break;
- return MCK_lfence; // "lfence"
- case 'o': // 1 strings to match.
- if (Name.substr(2,4) != "opne")
- break;
- return MCK_loopne; // "loopne"
- }
- break;
- case 'm': // 24 strings to match.
- switch (Name[1]) {
- default: break;
- case 'f': // 1 strings to match.
- if (Name.substr(2,4) != "ence")
- break;
- return MCK_mfence; // "mfence"
- case 'o': // 23 strings to match.
- if (Name[2] != 'v')
- break;
- switch (Name[3]) {
- default: break;
- case 'a': // 2 strings to match.
- if (Name[4] != 'p')
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_movapd; // "movapd"
- case 's': // 1 strings to match.
- return MCK_movaps; // "movaps"
- }
- break;
- case 'd': // 2 strings to match.
- if (Name[4] != 'q')
- break;
- switch (Name[5]) {
- default: break;
- case 'a': // 1 strings to match.
- return MCK_movdqa; // "movdqa"
- case 'u': // 1 strings to match.
- return MCK_movdqu; // "movdqu"
- }
- break;
- case 'h': // 2 strings to match.
- if (Name[4] != 'p')
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_movhpd; // "movhpd"
- case 's': // 1 strings to match.
- return MCK_movhps; // "movhps"
- }
- break;
- case 'l': // 2 strings to match.
- if (Name[4] != 'p')
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_movlpd; // "movlpd"
- case 's': // 1 strings to match.
- return MCK_movlps; // "movlps"
- }
- break;
- case 'n': // 2 strings to match.
- if (Name[4] != 't')
- break;
- switch (Name[5]) {
- default: break;
- case 'i': // 1 strings to match.
- return MCK_movnti; // "movnti"
- case 'q': // 1 strings to match.
- return MCK_movntq; // "movntq"
- }
- break;
- case 's': // 6 strings to match.
- switch (Name[4]) {
- default: break;
- case 'b': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_movsbl; // "movsbl"
- case 'q': // 1 strings to match.
- return MCK_movsbq; // "movsbq"
- case 'w': // 1 strings to match.
- return MCK_movsbw; // "movsbw"
- }
- break;
- case 'l': // 1 strings to match.
- if (Name[5] != 'q')
- break;
- return MCK_movslq; // "movslq"
- case 'w': // 2 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_movswl; // "movswl"
- case 'q': // 1 strings to match.
- return MCK_movswq; // "movswq"
- }
- break;
- }
- break;
- case 'u': // 2 strings to match.
- if (Name[4] != 'p')
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_movupd; // "movupd"
- case 's': // 1 strings to match.
- return MCK_movups; // "movups"
- }
- break;
- case 'z': // 5 strings to match.
- switch (Name[4]) {
- default: break;
- case 'b': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_movzbl; // "movzbl"
- case 'q': // 1 strings to match.
- return MCK_movzbq; // "movzbq"
- case 'w': // 1 strings to match.
- return MCK_movzbw; // "movzbw"
- }
- break;
- case 'w': // 2 strings to match.
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_movzwl; // "movzwl"
- case 'q': // 1 strings to match.
- return MCK_movzwq; // "movzwq"
- }
- break;
- }
- break;
- }
- break;
- }
- break;
- case 'p': // 44 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 2 strings to match.
- if (Name.substr(2,3) != "dds")
- break;
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_paddsb; // "paddsb"
- case 'w': // 1 strings to match.
- return MCK_paddsw; // "paddsw"
- }
- break;
- case 'e': // 4 strings to match.
- if (Name.substr(2,3) != "xtr")
- break;
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pextrb; // "pextrb"
- case 'd': // 1 strings to match.
- return MCK_pextrd; // "pextrd"
- case 'q': // 1 strings to match.
- return MCK_pextrq; // "pextrq"
- case 'w': // 1 strings to match.
- return MCK_pextrw; // "pextrw"
- }
- break;
- case 'h': // 4 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 2 strings to match.
- if (Name.substr(3,2) != "dd")
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_phaddd; // "phaddd"
- case 'w': // 1 strings to match.
- return MCK_phaddw; // "phaddw"
- }
- break;
- case 's': // 2 strings to match.
- if (Name.substr(3,2) != "ub")
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_phsubd; // "phsubd"
- case 'w': // 1 strings to match.
- return MCK_phsubw; // "phsubw"
- }
- break;
- }
- break;
- case 'i': // 4 strings to match.
- if (Name.substr(2,3) != "nsr")
- break;
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pinsrb; // "pinsrb"
- case 'd': // 1 strings to match.
- return MCK_pinsrd; // "pinsrd"
- case 'q': // 1 strings to match.
- return MCK_pinsrq; // "pinsrq"
- case 'w': // 1 strings to match.
- return MCK_pinsrw; // "pinsrw"
- }
- break;
- case 'm': // 16 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 6 strings to match.
- if (Name[3] != 'x')
- break;
- switch (Name[4]) {
- default: break;
- case 's': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pmaxsb; // "pmaxsb"
- case 'd': // 1 strings to match.
- return MCK_pmaxsd; // "pmaxsd"
- case 'w': // 1 strings to match.
- return MCK_pmaxsw; // "pmaxsw"
- }
- break;
- case 'u': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pmaxub; // "pmaxub"
- case 'd': // 1 strings to match.
- return MCK_pmaxud; // "pmaxud"
- case 'w': // 1 strings to match.
- return MCK_pmaxuw; // "pmaxuw"
- }
- break;
- }
- break;
- case 'i': // 6 strings to match.
- if (Name[3] != 'n')
- break;
- switch (Name[4]) {
- default: break;
- case 's': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pminsb; // "pminsb"
- case 'd': // 1 strings to match.
- return MCK_pminsd; // "pminsd"
- case 'w': // 1 strings to match.
- return MCK_pminsw; // "pminsw"
- }
- break;
- case 'u': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pminub; // "pminub"
- case 'd': // 1 strings to match.
- return MCK_pminud; // "pminud"
- case 'w': // 1 strings to match.
- return MCK_pminuw; // "pminuw"
- }
- break;
- }
- break;
- case 'u': // 4 strings to match.
- if (Name[3] != 'l')
- break;
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[5] != 'q')
- break;
- return MCK_pmuldq; // "pmuldq"
- case 'h': // 1 strings to match.
- if (Name[5] != 'w')
- break;
- return MCK_pmulhw; // "pmulhw"
- case 'l': // 2 strings to match.
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_pmulld; // "pmulld"
- case 'w': // 1 strings to match.
- return MCK_pmullw; // "pmullw"
- }
- break;
- }
- break;
- }
- break;
- case 's': // 11 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(3,3) != "dbw")
- break;
- return MCK_psadbw; // "psadbw"
- case 'h': // 3 strings to match.
- if (Name.substr(3,2) != "uf")
- break;
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pshufb; // "pshufb"
- case 'd': // 1 strings to match.
- return MCK_pshufd; // "pshufd"
- case 'w': // 1 strings to match.
- return MCK_pshufw; // "pshufw"
- }
- break;
- case 'i': // 3 strings to match.
- if (Name.substr(3,2) != "gn")
- break;
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_psignb; // "psignb"
- case 'd': // 1 strings to match.
- return MCK_psignd; // "psignd"
- case 'w': // 1 strings to match.
- return MCK_psignw; // "psignw"
- }
- break;
- case 'l': // 1 strings to match.
- if (Name.substr(3,3) != "ldq")
- break;
- return MCK_pslldq; // "pslldq"
- case 'r': // 1 strings to match.
- if (Name.substr(3,3) != "ldq")
- break;
- return MCK_psrldq; // "psrldq"
- case 'u': // 2 strings to match.
- if (Name.substr(3,2) != "bs")
- break;
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_psubsb; // "psubsb"
- case 'w': // 1 strings to match.
- return MCK_psubsw; // "psubsw"
- }
- break;
- }
- break;
- case 'u': // 3 strings to match.
- if (Name.substr(2,3) != "shf")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_pushfl; // "pushfl"
- case 'q': // 1 strings to match.
- return MCK_pushfq; // "pushfq"
- case 'w': // 1 strings to match.
- return MCK_pushfw; // "pushfw"
- }
- break;
- }
- break;
- case 'r': // 1 strings to match.
- if (Name.substr(1,5) != "dtscp")
- break;
- return MCK_rdtscp; // "rdtscp"
- case 's': // 9 strings to match.
- switch (Name[1]) {
- default: break;
- case 'f': // 1 strings to match.
- if (Name.substr(2,4) != "ence")
- break;
- return MCK_sfence; // "sfence"
- case 'h': // 2 strings to match.
- if (Name.substr(2,3) != "ufp")
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_shufpd; // "shufpd"
- case 's': // 1 strings to match.
- return MCK_shufps; // "shufps"
- }
- break;
- case 'q': // 4 strings to match.
- if (Name.substr(2,2) != "rt")
- break;
- switch (Name[4]) {
- default: break;
- case 'p': // 2 strings to match.
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_sqrtpd; // "sqrtpd"
- case 's': // 1 strings to match.
- return MCK_sqrtps; // "sqrtps"
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_sqrtsd; // "sqrtsd"
- case 's': // 1 strings to match.
- return MCK_sqrtss; // "sqrtss"
- }
- break;
- }
- break;
- case 'w': // 1 strings to match.
- if (Name.substr(2,4) != "apgs")
- break;
- return MCK_swapgs; // "swapgs"
- case 'y': // 1 strings to match.
- if (Name.substr(2,4) != "sret")
- break;
- return MCK_sysret; // "sysret"
- }
- break;
- case 'v': // 2 strings to match.
- if (Name[1] != 'm')
- break;
- switch (Name[2]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name.substr(3,3) != "all")
- break;
- return MCK_vmcall; // "vmcall"
- case 'x': // 1 strings to match.
- if (Name.substr(3,3) != "off")
- break;
- return MCK_vmxoff; // "vmxoff"
- }
- break;
- case 'w': // 1 strings to match.
- if (Name.substr(1,5) != "binvd")
- break;
- return MCK_wbinvd; // "wbinvd"
- }
- break;
- case 7: // 100 strings to match.
- switch (Name[0]) {
- default: break;
- case 'b': // 2 strings to match.
- if (Name.substr(1,5) != "lendp")
- break;
- switch (Name[6]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_blendpd; // "blendpd"
- case 's': // 1 strings to match.
- return MCK_blendps; // "blendps"
- }
- break;
- case 'c': // 25 strings to match.
- switch (Name[1]) {
- default: break;
- case 'l': // 1 strings to match.
- if (Name.substr(2,5) != "flush")
- break;
- return MCK_clflush; // "clflush"
- case 'm': // 24 strings to match.
- if (Name.substr(2,2) != "ov")
- break;
- switch (Name[4]) {
- default: break;
- case 'a': // 3 strings to match.
- if (Name[5] != 'e')
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovael; // "cmovael"
- case 'q': // 1 strings to match.
- return MCK_cmovaeq; // "cmovaeq"
- case 'w': // 1 strings to match.
- return MCK_cmovaew; // "cmovaew"
- }
- break;
- case 'b': // 3 strings to match.
- if (Name[5] != 'e')
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovbel; // "cmovbel"
- case 'q': // 1 strings to match.
- return MCK_cmovbeq; // "cmovbeq"
- case 'w': // 1 strings to match.
- return MCK_cmovbew; // "cmovbew"
- }
- break;
- case 'g': // 3 strings to match.
- if (Name[5] != 'e')
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovgel; // "cmovgel"
- case 'q': // 1 strings to match.
- return MCK_cmovgeq; // "cmovgeq"
- case 'w': // 1 strings to match.
- return MCK_cmovgew; // "cmovgew"
- }
- break;
- case 'l': // 3 strings to match.
- if (Name[5] != 'e')
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovlel; // "cmovlel"
- case 'q': // 1 strings to match.
- return MCK_cmovleq; // "cmovleq"
- case 'w': // 1 strings to match.
- return MCK_cmovlew; // "cmovlew"
- }
- break;
- case 'n': // 12 strings to match.
- switch (Name[5]) {
- default: break;
- case 'e': // 3 strings to match.
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovnel; // "cmovnel"
- case 'q': // 1 strings to match.
- return MCK_cmovneq; // "cmovneq"
- case 'w': // 1 strings to match.
- return MCK_cmovnew; // "cmovnew"
- }
- break;
- case 'o': // 3 strings to match.
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovnol; // "cmovnol"
- case 'q': // 1 strings to match.
- return MCK_cmovnoq; // "cmovnoq"
- case 'w': // 1 strings to match.
- return MCK_cmovnow; // "cmovnow"
- }
- break;
- case 'p': // 3 strings to match.
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovnpl; // "cmovnpl"
- case 'q': // 1 strings to match.
- return MCK_cmovnpq; // "cmovnpq"
- case 'w': // 1 strings to match.
- return MCK_cmovnpw; // "cmovnpw"
- }
- break;
- case 's': // 3 strings to match.
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cmovnsl; // "cmovnsl"
- case 'q': // 1 strings to match.
- return MCK_cmovnsq; // "cmovnsq"
- case 'w': // 1 strings to match.
- return MCK_cmovnsw; // "cmovnsw"
- }
- break;
- }
- break;
- }
- break;
- }
- break;
- case 'f': // 24 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 5 strings to match.
- switch (Name[2]) {
- default: break;
- case 'm': // 4 strings to match.
- if (Name.substr(3,2) != "ov")
- break;
- switch (Name[5]) {
- default: break;
- case 'b': // 1 strings to match.
- if (Name[6] != 'e')
- break;
- return MCK_fcmovbe; // "fcmovbe"
- case 'n': // 3 strings to match.
- switch (Name[6]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_fcmovnb; // "fcmovnb"
- case 'e': // 1 strings to match.
- return MCK_fcmovne; // "fcmovne"
- case 'u': // 1 strings to match.
- return MCK_fcmovnu; // "fcmovnu"
- }
- break;
- }
- break;
- case 'o': // 1 strings to match.
- if (Name.substr(3,4) != "mpll")
- break;
- return MCK_fcompll; // "fcompll"
- }
- break;
- case 'd': // 1 strings to match.
- if (Name.substr(2,5) != "ecstp")
- break;
- return MCK_fdecstp; // "fdecstp"
- case 'i': // 10 strings to match.
- switch (Name[2]) {
- default: break;
- case 'c': // 2 strings to match.
- if (Name.substr(3,3) != "omp")
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_ficompl; // "ficompl"
- case 'w': // 1 strings to match.
- return MCK_ficompw; // "ficompw"
- }
- break;
- case 'd': // 2 strings to match.
- if (Name.substr(3,3) != "ivr")
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fidivrl; // "fidivrl"
- case 's': // 1 strings to match.
- return MCK_fidivrs; // "fidivrs"
- }
- break;
- case 'n': // 1 strings to match.
- if (Name.substr(3,4) != "cstp")
- break;
- return MCK_fincstp; // "fincstp"
- case 's': // 5 strings to match.
- switch (Name[3]) {
- default: break;
- case 't': // 3 strings to match.
- switch (Name[4]) {
- default: break;
- case 'p': // 1 strings to match.
- if (Name.substr(5,2) != "ll")
- break;
- return MCK_fistpll; // "fistpll"
- case 't': // 2 strings to match.
- if (Name[5] != 'p')
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fisttpl; // "fisttpl"
- case 's': // 1 strings to match.
- return MCK_fisttps; // "fisttps"
- }
- break;
- }
- break;
- case 'u': // 2 strings to match.
- if (Name.substr(4,2) != "br")
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_fisubrl; // "fisubrl"
- case 's': // 1 strings to match.
- return MCK_fisubrs; // "fisubrs"
- }
- break;
- }
- break;
- }
- break;
- case 'n': // 1 strings to match.
- if (Name.substr(2,5) != "stenv")
- break;
- return MCK_fnstenv; // "fnstenv"
- case 'r': // 1 strings to match.
- if (Name.substr(2,5) != "ndint")
- break;
- return MCK_frndint; // "frndint"
- case 's': // 1 strings to match.
- if (Name.substr(2,5) != "incos")
- break;
- return MCK_fsincos; // "fsincos"
- case 'u': // 2 strings to match.
- if (Name.substr(2,3) != "com")
- break;
- switch (Name[5]) {
- default: break;
- case 'i': // 1 strings to match.
- if (Name[6] != 'p')
- break;
- return MCK_fucomip; // "fucomip"
- case 'p': // 1 strings to match.
- if (Name[6] != 'p')
- break;
- return MCK_fucompp; // "fucompp"
- }
- break;
- case 'x': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'r': // 1 strings to match.
- if (Name.substr(3,4) != "stor")
- break;
- return MCK_fxrstor; // "fxrstor"
- case 't': // 1 strings to match.
- if (Name.substr(3,4) != "ract")
- break;
- return MCK_fxtract; // "fxtract"
- }
- break;
- case 'y': // 1 strings to match.
- if (Name.substr(2,5) != "l2xp1")
- break;
- return MCK_fyl2xp1; // "fyl2xp1"
- }
- break;
- case 'i': // 1 strings to match.
- if (Name.substr(1,6) != "nvvpid")
- break;
- return MCK_invvpid; // "invvpid"
- case 'l': // 1 strings to match.
- if (Name.substr(1,6) != "dmxcsr")
- break;
- return MCK_ldmxcsr; // "ldmxcsr"
- case 'm': // 11 strings to match.
- switch (Name[1]) {
- default: break;
- case 'o': // 10 strings to match.
- switch (Name[2]) {
- default: break;
- case 'n': // 1 strings to match.
- if (Name.substr(3,4) != "itor")
- break;
- return MCK_monitor; // "monitor"
- case 'v': // 9 strings to match.
- switch (Name[3]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(4,3) != "bsq")
- break;
- return MCK_movabsq; // "movabsq"
- case 'd': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name.substr(5,2) != "up")
- break;
- return MCK_movddup; // "movddup"
- case 'q': // 1 strings to match.
- if (Name.substr(5,2) != "2q")
- break;
- return MCK_movdq2q; // "movdq2q"
- }
- break;
- case 'h': // 1 strings to match.
- if (Name.substr(4,3) != "lps")
- break;
- return MCK_movhlps; // "movhlps"
- case 'l': // 1 strings to match.
- if (Name.substr(4,3) != "hps")
- break;
- return MCK_movlhps; // "movlhps"
- case 'n': // 3 strings to match.
- if (Name[4] != 't')
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[6] != 'q')
- break;
- return MCK_movntdq; // "movntdq"
- case 'p': // 2 strings to match.
- switch (Name[6]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_movntpd; // "movntpd"
- case 's': // 1 strings to match.
- return MCK_movntps; // "movntps"
- }
- break;
- }
- break;
- case 'q': // 1 strings to match.
- if (Name.substr(4,3) != "2dq")
- break;
- return MCK_movq2dq; // "movq2dq"
- }
- break;
- }
- break;
- case 'p': // 1 strings to match.
- if (Name.substr(2,5) != "sadbw")
- break;
- return MCK_mpsadbw; // "mpsadbw"
- }
- break;
- case 'p': // 24 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 3 strings to match.
- switch (Name[2]) {
- default: break;
- case 'd': // 2 strings to match.
- if (Name.substr(3,3) != "dus")
- break;
- switch (Name[6]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_paddusb; // "paddusb"
- case 'w': // 1 strings to match.
- return MCK_paddusw; // "paddusw"
- }
- break;
- case 'l': // 1 strings to match.
- if (Name.substr(3,4) != "ignr")
- break;
- return MCK_palignr; // "palignr"
- }
- break;
- case 'b': // 1 strings to match.
- if (Name.substr(2,5) != "lendw")
- break;
- return MCK_pblendw; // "pblendw"
- case 'c': // 8 strings to match.
- if (Name.substr(2,2) != "mp")
- break;
- switch (Name[4]) {
- default: break;
- case 'e': // 4 strings to match.
- if (Name[5] != 'q')
- break;
- switch (Name[6]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pcmpeqb; // "pcmpeqb"
- case 'd': // 1 strings to match.
- return MCK_pcmpeqd; // "pcmpeqd"
- case 'q': // 1 strings to match.
- return MCK_pcmpeqq; // "pcmpeqq"
- case 'w': // 1 strings to match.
- return MCK_pcmpeqw; // "pcmpeqw"
- }
- break;
- case 'g': // 4 strings to match.
- if (Name[5] != 't')
- break;
- switch (Name[6]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_pcmpgtb; // "pcmpgtb"
- case 'd': // 1 strings to match.
- return MCK_pcmpgtd; // "pcmpgtd"
- case 'q': // 1 strings to match.
- return MCK_pcmpgtq; // "pcmpgtq"
- case 'w': // 1 strings to match.
- return MCK_pcmpgtw; // "pcmpgtw"
- }
- break;
- }
- break;
- case 'h': // 2 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(3,4) != "ddsw")
- break;
- return MCK_phaddsw; // "phaddsw"
- case 's': // 1 strings to match.
- if (Name.substr(3,4) != "ubsw")
- break;
- return MCK_phsubsw; // "phsubsw"
- }
- break;
- case 'm': // 3 strings to match.
- switch (Name[2]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(3,4) != "ddwd")
- break;
- return MCK_pmaddwd; // "pmaddwd"
- case 'u': // 2 strings to match.
- if (Name[3] != 'l')
- break;
- switch (Name[4]) {
- default: break;
- case 'h': // 1 strings to match.
- if (Name.substr(5,2) != "uw")
- break;
- return MCK_pmulhuw; // "pmulhuw"
- case 'u': // 1 strings to match.
- if (Name.substr(5,2) != "dq")
- break;
- return MCK_pmuludq; // "pmuludq"
- }
- break;
- }
- break;
- case 'o': // 3 strings to match.
- if (Name.substr(2,4) != "pcnt")
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_popcntl; // "popcntl"
- case 'q': // 1 strings to match.
- return MCK_popcntq; // "popcntq"
- case 'w': // 1 strings to match.
- return MCK_popcntw; // "popcntw"
- }
- break;
- case 's': // 4 strings to match.
- switch (Name[2]) {
- default: break;
- case 'h': // 2 strings to match.
- if (Name.substr(3,2) != "uf")
- break;
- switch (Name[5]) {
- default: break;
- case 'h': // 1 strings to match.
- if (Name[6] != 'w')
- break;
- return MCK_pshufhw; // "pshufhw"
- case 'l': // 1 strings to match.
- if (Name[6] != 'w')
- break;
- return MCK_pshuflw; // "pshuflw"
- }
- break;
- case 'u': // 2 strings to match.
- if (Name.substr(3,3) != "bus")
- break;
- switch (Name[6]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_psubusb; // "psubusb"
- case 'w': // 1 strings to match.
- return MCK_psubusw; // "psubusw"
- }
- break;
- }
- break;
- }
- break;
- case 'r': // 2 strings to match.
- if (Name.substr(1,4) != "sqrt")
- break;
- switch (Name[5]) {
- default: break;
- case 'p': // 1 strings to match.
- if (Name[6] != 's')
- break;
- return MCK_rsqrtps; // "rsqrtps"
- case 's': // 1 strings to match.
- if (Name[6] != 's')
- break;
- return MCK_rsqrtss; // "rsqrtss"
- }
- break;
- case 's': // 3 strings to match.
- switch (Name[1]) {
- default: break;
- case 't': // 1 strings to match.
- if (Name.substr(2,5) != "mxcsr")
- break;
- return MCK_stmxcsr; // "stmxcsr"
- case 'y': // 2 strings to match.
- if (Name[2] != 's')
- break;
- switch (Name[3]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name.substr(4,3) != "all")
- break;
- return MCK_syscall; // "syscall"
- case 'e': // 1 strings to match.
- if (Name.substr(4,3) != "xit")
- break;
- return MCK_sysexit; // "sysexit"
- }
- break;
- }
- break;
- case 'u': // 2 strings to match.
- if (Name.substr(1,5) != "comis")
- break;
- switch (Name[6]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_ucomisd; // "ucomisd"
- case 's': // 1 strings to match.
- return MCK_ucomiss; // "ucomiss"
- }
- break;
- case 'v': // 5 strings to match.
- if (Name[1] != 'm')
- break;
- switch (Name[2]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name.substr(3,4) != "lear")
- break;
- return MCK_vmclear; // "vmclear"
- case 'p': // 2 strings to match.
- if (Name.substr(3,2) != "tr")
- break;
- switch (Name[5]) {
- default: break;
- case 'l': // 1 strings to match.
- if (Name[6] != 'd')
- break;
- return MCK_vmptrld; // "vmptrld"
- case 's': // 1 strings to match.
- if (Name[6] != 't')
- break;
- return MCK_vmptrst; // "vmptrst"
- }
- break;
- case 'r': // 2 strings to match.
- if (Name.substr(3,3) != "ead")
- break;
- switch (Name[6]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_vmreadl; // "vmreadl"
- case 'q': // 1 strings to match.
- return MCK_vmreadq; // "vmreadq"
- }
- break;
- }
- break;
- }
- break;
- case 8: // 59 strings to match.
- switch (Name[0]) {
- default: break;
- case 'a': // 2 strings to match.
- if (Name.substr(1,6) != "ddsubp")
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_addsubpd; // "addsubpd"
- case 's': // 1 strings to match.
- return MCK_addsubps; // "addsubps"
- }
- break;
- case 'b': // 2 strings to match.
- if (Name.substr(1,6) != "lendvp")
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_blendvpd; // "blendvpd"
- case 's': // 1 strings to match.
- return MCK_blendvps; // "blendvps"
- }
- break;
- case 'c': // 18 strings to match.
- switch (Name[1]) {
- default: break;
- case 'm': // 4 strings to match.
- if (Name.substr(2,5) != "pxchg")
- break;
- switch (Name[7]) {
- default: break;
- case 'b': // 1 strings to match.
- return MCK_cmpxchgb; // "cmpxchgb"
- case 'l': // 1 strings to match.
- return MCK_cmpxchgl; // "cmpxchgl"
- case 'q': // 1 strings to match.
- return MCK_cmpxchgq; // "cmpxchgq"
- case 'w': // 1 strings to match.
- return MCK_cmpxchgw; // "cmpxchgw"
- }
- break;
- case 'v': // 14 strings to match.
- if (Name[2] != 't')
- break;
- switch (Name[3]) {
- default: break;
- case 'd': // 2 strings to match.
- if (Name.substr(4,3) != "q2p")
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_cvtdq2pd; // "cvtdq2pd"
- case 's': // 1 strings to match.
- return MCK_cvtdq2ps; // "cvtdq2ps"
- }
- break;
- case 'p': // 8 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 3 strings to match.
- if (Name[5] != '2')
- break;
- switch (Name[6]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[7] != 'q')
- break;
- return MCK_cvtpd2dq; // "cvtpd2dq"
- case 'p': // 2 strings to match.
- switch (Name[7]) {
- default: break;
- case 'i': // 1 strings to match.
- return MCK_cvtpd2pi; // "cvtpd2pi"
- case 's': // 1 strings to match.
- return MCK_cvtpd2ps; // "cvtpd2ps"
- }
- break;
- }
- break;
- case 'i': // 2 strings to match.
- if (Name.substr(5,2) != "2p")
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_cvtpi2pd; // "cvtpi2pd"
- case 's': // 1 strings to match.
- return MCK_cvtpi2ps; // "cvtpi2ps"
- }
- break;
- case 's': // 3 strings to match.
- if (Name[5] != '2')
- break;
- switch (Name[6]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[7] != 'q')
- break;
- return MCK_cvtps2dq; // "cvtps2dq"
- case 'p': // 2 strings to match.
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_cvtps2pd; // "cvtps2pd"
- case 'i': // 1 strings to match.
- return MCK_cvtps2pi; // "cvtps2pi"
- }
- break;
- }
- break;
- }
- break;
- case 's': // 4 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name.substr(5,3) != "2ss")
- break;
- return MCK_cvtsd2ss; // "cvtsd2ss"
- case 'i': // 2 strings to match.
- if (Name.substr(5,2) != "2s")
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_cvtsi2sd; // "cvtsi2sd"
- case 's': // 1 strings to match.
- return MCK_cvtsi2ss; // "cvtsi2ss"
- }
- break;
- case 's': // 1 strings to match.
- if (Name.substr(5,3) != "2sd")
- break;
- return MCK_cvtss2sd; // "cvtss2sd"
- }
- break;
- }
- break;
- }
- break;
- case 'f': // 2 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 1 strings to match.
- if (Name.substr(2,6) != "movnbe")
- break;
- return MCK_fcmovnbe; // "fcmovnbe"
- case 'i': // 1 strings to match.
- if (Name.substr(2,6) != "sttpll")
- break;
- return MCK_fisttpll; // "fisttpll"
- }
- break;
- case 'i': // 1 strings to match.
- if (Name.substr(1,7) != "nsertps")
- break;
- return MCK_insertps; // "insertps"
- case 'm': // 6 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 1 strings to match.
- if (Name.substr(2,6) != "skmovq")
- break;
- return MCK_maskmovq; // "maskmovq"
- case 'o': // 5 strings to match.
- if (Name[2] != 'v')
- break;
- switch (Name[3]) {
- default: break;
- case 'm': // 2 strings to match.
- if (Name.substr(4,3) != "skp")
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_movmskpd; // "movmskpd"
- case 's': // 1 strings to match.
- return MCK_movmskps; // "movmskps"
- }
- break;
- case 'n': // 1 strings to match.
- if (Name.substr(4,4) != "tdqa")
- break;
- return MCK_movntdqa; // "movntdqa"
- case 's': // 2 strings to match.
- switch (Name[4]) {
- default: break;
- case 'h': // 1 strings to match.
- if (Name.substr(5,3) != "dup")
- break;
- return MCK_movshdup; // "movshdup"
- case 'l': // 1 strings to match.
- if (Name.substr(5,3) != "dup")
- break;
- return MCK_movsldup; // "movsldup"
- }
- break;
- }
- break;
- }
- break;
- case 'p': // 19 strings to match.
- switch (Name[1]) {
- default: break;
- case 'a': // 4 strings to match.
- if (Name.substr(2,2) != "ck")
- break;
- switch (Name[4]) {
- default: break;
- case 's': // 2 strings to match.
- if (Name[5] != 's')
- break;
- switch (Name[6]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[7] != 'w')
- break;
- return MCK_packssdw; // "packssdw"
- case 'w': // 1 strings to match.
- if (Name[7] != 'b')
- break;
- return MCK_packsswb; // "packsswb"
- }
- break;
- case 'u': // 2 strings to match.
- if (Name[5] != 's')
- break;
- switch (Name[6]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[7] != 'w')
- break;
- return MCK_packusdw; // "packusdw"
- case 'w': // 1 strings to match.
- if (Name[7] != 'b')
- break;
- return MCK_packuswb; // "packuswb"
- }
- break;
- }
- break;
- case 'b': // 1 strings to match.
- if (Name.substr(2,6) != "lendvb")
- break;
- return MCK_pblendvb; // "pblendvb"
- case 'm': // 14 strings to match.
- switch (Name[2]) {
- default: break;
- case 'o': // 13 strings to match.
- if (Name[3] != 'v')
- break;
- switch (Name[4]) {
- default: break;
- case 'm': // 1 strings to match.
- if (Name.substr(5,3) != "skb")
- break;
- return MCK_pmovmskb; // "pmovmskb"
- case 's': // 6 strings to match.
- if (Name[5] != 'x')
- break;
- switch (Name[6]) {
- default: break;
- case 'b': // 3 strings to match.
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_pmovsxbd; // "pmovsxbd"
- case 'q': // 1 strings to match.
- return MCK_pmovsxbq; // "pmovsxbq"
- case 'w': // 1 strings to match.
- return MCK_pmovsxbw; // "pmovsxbw"
- }
- break;
- case 'd': // 1 strings to match.
- if (Name[7] != 'q')
- break;
- return MCK_pmovsxdq; // "pmovsxdq"
- case 'w': // 2 strings to match.
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_pmovsxwd; // "pmovsxwd"
- case 'q': // 1 strings to match.
- return MCK_pmovsxwq; // "pmovsxwq"
- }
- break;
- }
- break;
- case 'z': // 6 strings to match.
- if (Name[5] != 'x')
- break;
- switch (Name[6]) {
- default: break;
- case 'b': // 3 strings to match.
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_pmovzxbd; // "pmovzxbd"
- case 'q': // 1 strings to match.
- return MCK_pmovzxbq; // "pmovzxbq"
- case 'w': // 1 strings to match.
- return MCK_pmovzxbw; // "pmovzxbw"
- }
- break;
- case 'd': // 1 strings to match.
- if (Name[7] != 'q')
- break;
- return MCK_pmovzxdq; // "pmovzxdq"
- case 'w': // 2 strings to match.
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_pmovzxwd; // "pmovzxwd"
- case 'q': // 1 strings to match.
- return MCK_pmovzxwq; // "pmovzxwq"
- }
- break;
- }
- break;
- }
- break;
- case 'u': // 1 strings to match.
- if (Name.substr(3,5) != "lhrsw")
- break;
- return MCK_pmulhrsw; // "pmulhrsw"
- }
- break;
- }
- break;
- case 's': // 1 strings to match.
- if (Name.substr(1,7) != "ysenter")
- break;
- return MCK_sysenter; // "sysenter"
- case 'u': // 4 strings to match.
- if (Name.substr(1,4) != "npck")
- break;
- switch (Name[5]) {
- default: break;
- case 'h': // 2 strings to match.
- if (Name[6] != 'p')
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_unpckhpd; // "unpckhpd"
- case 's': // 1 strings to match.
- return MCK_unpckhps; // "unpckhps"
- }
- break;
- case 'l': // 2 strings to match.
- if (Name[6] != 'p')
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- return MCK_unpcklpd; // "unpcklpd"
- case 's': // 1 strings to match.
- return MCK_unpcklps; // "unpcklps"
- }
- break;
- }
- break;
- case 'v': // 4 strings to match.
- if (Name[1] != 'm')
- break;
- switch (Name[2]) {
- default: break;
- case 'l': // 1 strings to match.
- if (Name.substr(3,5) != "aunch")
- break;
- return MCK_vmlaunch; // "vmlaunch"
- case 'r': // 1 strings to match.
- if (Name.substr(3,5) != "esume")
- break;
- return MCK_vmresume; // "vmresume"
- case 'w': // 2 strings to match.
- if (Name.substr(3,4) != "rite")
- break;
- switch (Name[7]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_vmwritel; // "vmwritel"
- case 'q': // 1 strings to match.
- return MCK_vmwriteq; // "vmwriteq"
- }
- break;
- }
- break;
- }
- break;
- case 9: // 25 strings to match.
- switch (Name[0]) {
- default: break;
- case 'c': // 11 strings to match.
- switch (Name[1]) {
- default: break;
- case 'm': // 1 strings to match.
- if (Name.substr(2,7) != "pxchg8b")
- break;
- return MCK_cmpxchg8b; // "cmpxchg8b"
- case 'v': // 10 strings to match.
- if (Name[2] != 't')
- break;
- switch (Name[3]) {
- default: break;
- case 's': // 5 strings to match.
- switch (Name[4]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name.substr(5,4) != "2siq")
- break;
- return MCK_cvtsd2siq; // "cvtsd2siq"
- case 'i': // 2 strings to match.
- if (Name.substr(5,2) != "2s")
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[8] != 'q')
- break;
- return MCK_cvtsi2sdq; // "cvtsi2sdq"
- case 's': // 1 strings to match.
- if (Name[8] != 'q')
- break;
- return MCK_cvtsi2ssq; // "cvtsi2ssq"
- }
- break;
- case 's': // 2 strings to match.
- if (Name.substr(5,3) != "2si")
- break;
- switch (Name[8]) {
- default: break;
- case 'l': // 1 strings to match.
- return MCK_cvtss2sil; // "cvtss2sil"
- case 'q': // 1 strings to match.
- return MCK_cvtss2siq; // "cvtss2siq"
- }
- break;
- }
- break;
- case 't': // 5 strings to match.
- switch (Name[4]) {
- default: break;
- case 'p': // 3 strings to match.
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name.substr(6,3) != "2pi")
- break;
- return MCK_cvttpd2pi; // "cvttpd2pi"
- case 's': // 2 strings to match.
- if (Name[6] != '2')
- break;
- switch (Name[7]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name[8] != 'q')
- break;
- return MCK_cvttps2dq; // "cvttps2dq"
- case 'p': // 1 strings to match.
- if (Name[8] != 'i')
- break;
- return MCK_cvttps2pi; // "cvttps2pi"
- }
- break;
- }
- break;
- case 's': // 2 strings to match.
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name.substr(6,3) != "2si")
- break;
- return MCK_cvttsd2si; // "cvttsd2si"
- case 's': // 1 strings to match.
- if (Name.substr(6,3) != "2si")
- break;
- return MCK_cvttss2si; // "cvttss2si"
- }
- break;
- }
- break;
- }
- break;
- }
- break;
- case 'e': // 1 strings to match.
- if (Name.substr(1,8) != "xtractps")
- break;
- return MCK_extractps; // "extractps"
- case 'p': // 11 strings to match.
- switch (Name[1]) {
- default: break;
- case 'c': // 4 strings to match.
- if (Name.substr(2,2) != "mp")
- break;
- switch (Name[4]) {
- default: break;
- case 'e': // 2 strings to match.
- if (Name.substr(5,3) != "str")
- break;
- switch (Name[8]) {
- default: break;
- case 'i': // 1 strings to match.
- return MCK_pcmpestri; // "pcmpestri"
- case 'm': // 1 strings to match.
- return MCK_pcmpestrm; // "pcmpestrm"
- }
- break;
- case 'i': // 2 strings to match.
- if (Name.substr(5,3) != "str")
- break;
- switch (Name[8]) {
- default: break;
- case 'i': // 1 strings to match.
- return MCK_pcmpistri; // "pcmpistri"
- case 'm': // 1 strings to match.
- return MCK_pcmpistrm; // "pcmpistrm"
- }
- break;
- }
- break;
- case 'm': // 1 strings to match.
- if (Name.substr(2,7) != "addubsw")
- break;
- return MCK_pmaddubsw; // "pmaddubsw"
- case 'u': // 6 strings to match.
- if (Name.substr(2,4) != "npck")
- break;
- switch (Name[6]) {
- default: break;
- case 'h': // 3 strings to match.
- switch (Name[7]) {
- default: break;
- case 'b': // 1 strings to match.
- if (Name[8] != 'w')
- break;
- return MCK_punpckhbw; // "punpckhbw"
- case 'd': // 1 strings to match.
- if (Name[8] != 'q')
- break;
- return MCK_punpckhdq; // "punpckhdq"
- case 'w': // 1 strings to match.
- if (Name[8] != 'd')
- break;
- return MCK_punpckhwd; // "punpckhwd"
- }
- break;
- case 'l': // 3 strings to match.
- switch (Name[7]) {
- default: break;
- case 'b': // 1 strings to match.
- if (Name[8] != 'w')
- break;
- return MCK_punpcklbw; // "punpcklbw"
- case 'd': // 1 strings to match.
- if (Name[8] != 'q')
- break;
- return MCK_punpckldq; // "punpckldq"
- case 'w': // 1 strings to match.
- if (Name[8] != 'd')
- break;
- return MCK_punpcklwd; // "punpcklwd"
- }
- break;
- }
- break;
- }
- break;
- case 'r': // 2 strings to match.
- if (Name.substr(1,3) != "ep;")
- break;
- switch (Name[4]) {
- default: break;
- case 'm': // 1 strings to match.
- if (Name.substr(5,4) != "ovsq")
- break;
- return MCK_rep_59_movsq; // "rep;movsq"
- case 's': // 1 strings to match.
- if (Name.substr(5,4) != "tosq")
- break;
- return MCK_rep_59_stosq; // "rep;stosq"
- }
- break;
- }
- break;
- case 10: // 10 strings to match.
- switch (Name[0]) {
- default: break;
- case 'c': // 3 strings to match.
- switch (Name[1]) {
- default: break;
- case 'm': // 1 strings to match.
- if (Name.substr(2,8) != "pxchg16b")
- break;
- return MCK_cmpxchg16b; // "cmpxchg16b"
- case 'v': // 2 strings to match.
- if (Name.substr(2,3) != "tts")
- break;
- switch (Name[5]) {
- default: break;
- case 'd': // 1 strings to match.
- if (Name.substr(6,4) != "2siq")
- break;
- return MCK_cvttsd2siq; // "cvttsd2siq"
- case 's': // 1 strings to match.
- if (Name.substr(6,4) != "2siq")
- break;
- return MCK_cvttss2siq; // "cvttss2siq"
- }
- break;
- }
- break;
- case 'm': // 1 strings to match.
- if (Name.substr(1,9) != "askmovdqu")
- break;
- return MCK_maskmovdqu; // "maskmovdqu"
- case 'p': // 6 strings to match.
- switch (Name[1]) {
- default: break;
- case 'h': // 1 strings to match.
- if (Name.substr(2,8) != "minposuw")
- break;
- return MCK_phminposuw; // "phminposuw"
- case 'r': // 3 strings to match.
- if (Name.substr(2,7) != "efetcht")
- break;
- switch (Name[9]) {
- default: break;
- case '0': // 1 strings to match.
- return MCK_prefetcht0; // "prefetcht0"
- case '1': // 1 strings to match.
- return MCK_prefetcht1; // "prefetcht1"
- case '2': // 1 strings to match.
- return MCK_prefetcht2; // "prefetcht2"
- }
- break;
- case 'u': // 2 strings to match.
- if (Name.substr(2,4) != "npck")
- break;
- switch (Name[6]) {
- default: break;
- case 'h': // 1 strings to match.
- if (Name.substr(7,3) != "qdq")
- break;
- return MCK_punpckhqdq; // "punpckhqdq"
- case 'l': // 1 strings to match.
- if (Name.substr(7,3) != "qdq")
- break;
- return MCK_punpcklqdq; // "punpcklqdq"
- }
- break;
- }
- break;
- }
- break;
- case 11: // 1 strings to match.
- if (Name.substr(0,11) != "prefetchnta")
- break;
- return MCK_prefetchnta; // "prefetchnta"
- }
- return InvalidMatchClass;
-}
-
-static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {
- X86Operand &Operand = *(X86Operand*)GOp;
- if (Operand.isToken())
- return MatchTokenString(Operand.getToken());
-
- if (Operand.isReg()) {
- switch (Operand.getReg()) {
- default: return InvalidMatchClass;
- case X86::AL: return MCK_AL;
- case X86::DL: return MCK_GR8_ABCD_L;
- case X86::CL: return MCK_CL;
- case X86::BL: return MCK_GR8_ABCD_L;
- case X86::SIL: return MCK_GR8;
- case X86::DIL: return MCK_GR8;
- case X86::BPL: return MCK_GR8;
- case X86::SPL: return MCK_GR8;
- case X86::R8B: return MCK_GR8;
- case X86::R9B: return MCK_GR8;
- case X86::R10B: return MCK_GR8;
- case X86::R11B: return MCK_GR8;
- case X86::R12B: return MCK_GR8;
- case X86::R13B: return MCK_GR8;
- case X86::R14B: return MCK_GR8;
- case X86::R15B: return MCK_GR8;
- case X86::AH: return MCK_GR8_ABCD_H;
- case X86::DH: return MCK_GR8_ABCD_H;
- case X86::CH: return MCK_GR8_ABCD_H;
- case X86::BH: return MCK_GR8_ABCD_H;
- case X86::AX: return MCK_AX;
- case X86::DX: return MCK_DX;
- case X86::CX: return MCK_GR16_ABCD;
- case X86::BX: return MCK_GR16_ABCD;
- case X86::SI: return MCK_GR16_NOREX;
- case X86::DI: return MCK_GR16_NOREX;
- case X86::BP: return MCK_GR16_NOREX;
- case X86::SP: return MCK_GR16_NOREX;
- case X86::R8W: return MCK_GR16;
- case X86::R9W: return MCK_GR16;
- case X86::R10W: return MCK_GR16;
- case X86::R11W: return MCK_GR16;
- case X86::R12W: return MCK_GR16;
- case X86::R13W: return MCK_GR16;
- case X86::R14W: return MCK_GR16;
- case X86::R15W: return MCK_GR16;
- case X86::EAX: return MCK_EAX;
- case X86::EDX: return MCK_GR32_AD;
- case X86::ECX: return MCK_GR32_ABCD;
- case X86::EBX: return MCK_GR32_ABCD;
- case X86::ESI: return MCK_Reg14;
- case X86::EDI: return MCK_Reg14;
- case X86::EBP: return MCK_Reg14;
- case X86::ESP: return MCK_GR32_NOREX;
- case X86::R8D: return MCK_GR32_NOSP;
- case X86::R9D: return MCK_GR32_NOSP;
- case X86::R10D: return MCK_GR32_NOSP;
- case X86::R11D: return MCK_GR32_NOSP;
- case X86::R12D: return MCK_GR32_NOSP;
- case X86::R13D: return MCK_GR32_NOSP;
- case X86::R14D: return MCK_GR32_NOSP;
- case X86::R15D: return MCK_GR32_NOSP;
- case X86::RAX: return MCK_RAX;
- case X86::RDX: return MCK_GR64_ABCD;
- case X86::RCX: return MCK_GR64_ABCD;
- case X86::RBX: return MCK_GR64_ABCD;
- case X86::RSI: return MCK_GR64_NOREX_NOSP;
- case X86::RDI: return MCK_GR64_NOREX_NOSP;
- case X86::RBP: return MCK_GR64_NOREX_NOSP;
- case X86::RSP: return MCK_GR64_NOREX;
- case X86::R8: return MCK_GR64_NOSP;
- case X86::R9: return MCK_GR64_NOSP;
- case X86::R10: return MCK_GR64_NOSP;
- case X86::R11: return MCK_GR64_NOSP;
- case X86::R12: return MCK_GR64_NOSP;
- case X86::R13: return MCK_GR64_NOSP;
- case X86::R14: return MCK_GR64_NOSP;
- case X86::R15: return MCK_GR64_NOSP;
- case X86::RIP: return MCK_GR64_NOREX;
- case X86::MM0: return MCK_VR64;
- case X86::MM1: return MCK_VR64;
- case X86::MM2: return MCK_VR64;
- case X86::MM3: return MCK_VR64;
- case X86::MM4: return MCK_VR64;
- case X86::MM5: return MCK_VR64;
- case X86::MM6: return MCK_VR64;
- case X86::MM7: return MCK_VR64;
- case X86::FP0: return MCK_RFP32;
- case X86::FP1: return MCK_RFP32;
- case X86::FP2: return MCK_RFP32;
- case X86::FP3: return MCK_RFP32;
- case X86::FP4: return MCK_RFP32;
- case X86::FP5: return MCK_RFP32;
- case X86::FP6: return MCK_RFP32;
- case X86::XMM0: return MCK_XMM0;
- case X86::XMM1: return MCK_FR32;
- case X86::XMM2: return MCK_FR32;
- case X86::XMM3: return MCK_FR32;
- case X86::XMM4: return MCK_FR32;
- case X86::XMM5: return MCK_FR32;
- case X86::XMM6: return MCK_FR32;
- case X86::XMM7: return MCK_FR32;
- case X86::XMM8: return MCK_FR32;
- case X86::XMM9: return MCK_FR32;
- case X86::XMM10: return MCK_FR32;
- case X86::XMM11: return MCK_FR32;
- case X86::XMM12: return MCK_FR32;
- case X86::XMM13: return MCK_FR32;
- case X86::XMM14: return MCK_FR32;
- case X86::XMM15: return MCK_FR32;
- case X86::YMM0: return MCK_VR256;
- case X86::YMM1: return MCK_VR256;
- case X86::YMM2: return MCK_VR256;
- case X86::YMM3: return MCK_VR256;
- case X86::YMM4: return MCK_VR256;
- case X86::YMM5: return MCK_VR256;
- case X86::YMM6: return MCK_VR256;
- case X86::YMM7: return MCK_VR256;
- case X86::YMM8: return MCK_VR256;
- case X86::YMM9: return MCK_VR256;
- case X86::YMM10: return MCK_VR256;
- case X86::YMM11: return MCK_VR256;
- case X86::YMM12: return MCK_VR256;
- case X86::YMM13: return MCK_VR256;
- case X86::YMM14: return MCK_VR256;
- case X86::YMM15: return MCK_VR256;
- case X86::ST0: return MCK_ST0;
- case X86::ST1: return MCK_RST;
- case X86::ST2: return MCK_RST;
- case X86::ST3: return MCK_RST;
- case X86::ST4: return MCK_RST;
- case X86::ST5: return MCK_RST;
- case X86::ST6: return MCK_RST;
- case X86::ST7: return MCK_RST;
- case X86::EFLAGS: return MCK_CCR;
- case X86::CS: return MCK_SEGMENT_REG;
- case X86::DS: return MCK_SEGMENT_REG;
- case X86::SS: return MCK_SEGMENT_REG;
- case X86::ES: return MCK_SEGMENT_REG;
- case X86::FS: return MCK_FS;
- case X86::GS: return MCK_GS;
- case X86::DR0: return MCK_DEBUG_REG;
- case X86::DR1: return MCK_DEBUG_REG;
- case X86::DR2: return MCK_DEBUG_REG;
- case X86::DR3: return MCK_DEBUG_REG;
- case X86::DR4: return MCK_DEBUG_REG;
- case X86::DR5: return MCK_DEBUG_REG;
- case X86::DR6: return MCK_DEBUG_REG;
- case X86::DR7: return MCK_DEBUG_REG;
- case X86::ECR0: return MCK_CONTROL_REG_32;
- case X86::ECR1: return MCK_CONTROL_REG_32;
- case X86::ECR2: return MCK_CONTROL_REG_32;
- case X86::ECR3: return MCK_CONTROL_REG_32;
- case X86::ECR4: return MCK_CONTROL_REG_32;
- case X86::ECR5: return MCK_CONTROL_REG_32;
- case X86::ECR6: return MCK_CONTROL_REG_32;
- case X86::ECR7: return MCK_CONTROL_REG_32;
- case X86::RCR0: return MCK_CONTROL_REG_64;
- case X86::RCR1: return MCK_CONTROL_REG_64;
- case X86::RCR2: return MCK_CONTROL_REG_64;
- case X86::RCR3: return MCK_CONTROL_REG_64;
- case X86::RCR4: return MCK_CONTROL_REG_64;
- case X86::RCR5: return MCK_CONTROL_REG_64;
- case X86::RCR6: return MCK_CONTROL_REG_64;
- case X86::RCR7: return MCK_CONTROL_REG_64;
- case X86::RCR8: return MCK_CONTROL_REG_64;
- }
- }
-
- // 'ImmSExt8' class, subclass of 'Imm'
- if (Operand.isImmSExt8()) {
- assert(Operand.isImm() && "Invalid class relationship!");
- return MCK_ImmSExt8;
- }
-
- // 'Imm' class
- if (Operand.isImm()) {
- return MCK_Imm;
- }
-
- // 'AbsMem' class, subclass of 'Mem'
- if (Operand.isAbsMem()) {
- assert(Operand.isMem() && "Invalid class relationship!");
- return MCK_AbsMem;
- }
-
- // 'NoSegMem' class, subclass of 'Mem'
- if (Operand.isNoSegMem()) {
- assert(Operand.isMem() && "Invalid class relationship!");
- return MCK_NoSegMem;
- }
-
- // 'Mem' class
- if (Operand.isMem()) {
- return MCK_Mem;
- }
-
- return InvalidMatchClass;
-}
-
-/// IsSubclass - Compute whether \arg A is a subclass of \arg B.
-static bool IsSubclass(MatchClassKind A, MatchClassKind B) {
- if (A == B)
- return true;
-
- switch (A) {
- default:
- return false;
-
- case MCK_AL:
- switch (B) {
- default: return false;
- case MCK_GR8_ABCD_L: return true;
- case MCK_GR8_NOREX: return true;
- case MCK_GR8: return true;
- }
-
- case MCK_CL:
- switch (B) {
- default: return false;
- case MCK_GR8_ABCD_L: return true;
- case MCK_GR8_NOREX: return true;
- case MCK_GR8: return true;
- }
-
- case MCK_GR8_ABCD_L:
- switch (B) {
- default: return false;
- case MCK_GR8_NOREX: return true;
- case MCK_GR8: return true;
- }
-
- case MCK_GR8_ABCD_H:
- switch (B) {
- default: return false;
- case MCK_GR8_NOREX: return true;
- case MCK_GR8: return true;
- }
-
- case MCK_GR8_NOREX:
- return B == MCK_GR8;
-
- case MCK_AX:
- switch (B) {
- default: return false;
- case MCK_GR16_ABCD: return true;
- case MCK_GR16_NOREX: return true;
- case MCK_GR16: return true;
- }
-
- case MCK_DX:
- switch (B) {
- default: return false;
- case MCK_GR16_ABCD: return true;
- case MCK_GR16_NOREX: return true;
- case MCK_GR16: return true;
- }
-
- case MCK_GR16_ABCD:
- switch (B) {
- default: return false;
- case MCK_GR16_NOREX: return true;
- case MCK_GR16: return true;
- }
-
- case MCK_GR16_NOREX:
- return B == MCK_GR16;
-
- case MCK_EAX:
- switch (B) {
- default: return false;
- case MCK_GR32_AD: return true;
- case MCK_GR32_ABCD: return true;
- case MCK_Reg14: return true;
- case MCK_GR32_NOREX: return true;
- case MCK_GR32_NOSP: return true;
- case MCK_GR32: return true;
- }
-
- case MCK_GR32_AD:
- switch (B) {
- default: return false;
- case MCK_GR32_ABCD: return true;
- case MCK_Reg14: return true;
- case MCK_GR32_NOREX: return true;
- case MCK_GR32_NOSP: return true;
- case MCK_GR32: return true;
- }
-
- case MCK_GR32_ABCD:
- switch (B) {
- default: return false;
- case MCK_Reg14: return true;
- case MCK_GR32_NOREX: return true;
- case MCK_GR32_NOSP: return true;
- case MCK_GR32: return true;
- }
-
- case MCK_Reg14:
- switch (B) {
- default: return false;
- case MCK_GR32_NOREX: return true;
- case MCK_GR32_NOSP: return true;
- case MCK_GR32: return true;
- }
-
- case MCK_GR32_NOREX:
- return B == MCK_GR32;
-
- case MCK_GR32_NOSP:
- return B == MCK_GR32;
-
- case MCK_RAX:
- switch (B) {
- default: return false;
- case MCK_GR64_ABCD: return true;
- case MCK_GR64_NOREX_NOSP: return true;
- case MCK_GR64_NOREX: return true;
- case MCK_GR64_NOSP: return true;
- case MCK_GR64: return true;
- }
-
- case MCK_GR64_ABCD:
- switch (B) {
- default: return false;
- case MCK_GR64_NOREX_NOSP: return true;
- case MCK_GR64_NOREX: return true;
- case MCK_GR64_NOSP: return true;
- case MCK_GR64: return true;
- }
-
- case MCK_GR64_NOREX_NOSP:
- switch (B) {
- default: return false;
- case MCK_GR64_NOREX: return true;
- case MCK_GR64_NOSP: return true;
- case MCK_GR64: return true;
- }
-
- case MCK_GR64_NOREX:
- return B == MCK_GR64;
-
- case MCK_GR64_NOSP:
- return B == MCK_GR64;
-
- case MCK_XMM0:
- return B == MCK_FR32;
-
- case MCK_ST0:
- return B == MCK_RST;
-
- case MCK_FS:
- return B == MCK_SEGMENT_REG;
-
- case MCK_GS:
- return B == MCK_SEGMENT_REG;
-
- case MCK_ImmSExt8:
- return B == MCK_Imm;
-
- case MCK_AbsMem:
- return B == MCK_Mem;
-
- case MCK_NoSegMem:
- return B == MCK_Mem;
- }
-}
-
-bool X86ATTAsmParser::
-MatchInstruction(const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
- MCInst &Inst) {
- static const struct MatchEntry {
- unsigned Opcode;
- ConversionKind ConvertFn;
- MatchClassKind Classes[5];
- } MatchTable[2037] = {
- { X86::CBW, Convert, { MCK_cbtw } },
- { X86::CLC, Convert, { MCK_clc } },
- { X86::CLD, Convert, { MCK_cld } },
- { X86::CLI, Convert, { MCK_cli } },
- { X86::CDQ, Convert, { MCK_cltd } },
- { X86::CDQE, Convert, { MCK_cltq } },
- { X86::CLTS, Convert, { MCK_clts } },
- { X86::CMC, Convert, { MCK_cmc } },
- { X86::CMPS8, Convert, { MCK_cmpsb } },
- { X86::CMPS32, Convert, { MCK_cmpsl } },
- { X86::CMPS64, Convert, { MCK_cmpsq } },
- { X86::CMPS16, Convert, { MCK_cmpsw } },
- { X86::CPUID, Convert, { MCK_cpuid } },
- { X86::CQO, Convert, { MCK_cqto } },
- { X86::CS_PREFIX, Convert, { MCK_cs } },
- { X86::CWD, Convert, { MCK_cwtd } },
- { X86::CWDE, Convert, { MCK_cwtl } },
- { X86::DS_PREFIX, Convert, { MCK_ds } },
- { X86::MMX_EMMS, Convert, { MCK_emms } },
- { X86::ES_PREFIX, Convert, { MCK_es } },
- { X86::F2XM1, Convert, { MCK_f2xm1 } },
- { X86::ABS_F, Convert, { MCK_fabs } },
- { X86::CHS_F, Convert, { MCK_fchs } },
- { X86::FCOMPP, Convert, { MCK_fcompp } },
- { X86::COS_F, Convert, { MCK_fcos } },
- { X86::FDECSTP, Convert, { MCK_fdecstp } },
- { X86::MMX_FEMMS, Convert, { MCK_femms } },
- { X86::FINCSTP, Convert, { MCK_fincstp } },
- { X86::LD_F1, Convert, { MCK_fld1 } },
- { X86::FLDL2E, Convert, { MCK_fldl2e } },
- { X86::FLDL2T, Convert, { MCK_fldl2t } },
- { X86::FLDLG2, Convert, { MCK_fldlg2 } },
- { X86::FLDLN2, Convert, { MCK_fldln2 } },
- { X86::FLDPI, Convert, { MCK_fldpi } },
- { X86::LD_F0, Convert, { MCK_fldz } },
- { X86::FNCLEX, Convert, { MCK_fnclex } },
- { X86::FNINIT, Convert, { MCK_fninit } },
- { X86::FNOP, Convert, { MCK_fnop } },
- { X86::FPATAN, Convert, { MCK_fpatan } },
- { X86::FPREM, Convert, { MCK_fprem } },
- { X86::FPREM1, Convert, { MCK_fprem1 } },
- { X86::FPTAN, Convert, { MCK_fptan } },
- { X86::FRNDINT, Convert, { MCK_frndint } },
- { X86::FS_PREFIX, Convert, { MCK_fs } },
- { X86::FSCALE, Convert, { MCK_fscale } },
- { X86::SIN_F, Convert, { MCK_fsin } },
- { X86::FSINCOS, Convert, { MCK_fsincos } },
- { X86::SQRT_F, Convert, { MCK_fsqrt } },
- { X86::TST_F, Convert, { MCK_ftst } },
- { X86::UCOM_FPPr, Convert, { MCK_fucompp } },
- { X86::FXAM, Convert, { MCK_fxam } },
- { X86::FXTRACT, Convert, { MCK_fxtract } },
- { X86::FYL2X, Convert, { MCK_fyl2x } },
- { X86::FYL2XP1, Convert, { MCK_fyl2xp1 } },
- { X86::GS_PREFIX, Convert, { MCK_gs } },
- { X86::HLT, Convert, { MCK_hlt } },
- { X86::IN8, Convert, { MCK_insb } },
- { X86::IN32, Convert, { MCK_insl } },
- { X86::IN16, Convert, { MCK_insw } },
- { X86::INVD, Convert, { MCK_invd } },
- { X86::INVEPT, Convert, { MCK_invept } },
- { X86::INVVPID, Convert, { MCK_invvpid } },
- { X86::IRET32, Convert, { MCK_iretl } },
- { X86::IRET64, Convert, { MCK_iretq } },
- { X86::IRET16, Convert, { MCK_iretw } },
- { X86::LAHF, Convert, { MCK_lahf } },
- { X86::LEAVE, Convert, { MCK_leave } },
- { X86::LEAVE64, Convert, { MCK_leave } },
- { X86::LFENCE, Convert, { MCK_lfence } },
- { X86::LOCK_PREFIX, Convert, { MCK_lock } },
- { X86::LODSB, Convert, { MCK_lodsb } },
- { X86::LODSD, Convert, { MCK_lodsl } },
- { X86::LODSQ, Convert, { MCK_lodsq } },
- { X86::LODSW, Convert, { MCK_lodsw } },
- { X86::LRET, Convert, { MCK_lret } },
- { X86::MFENCE, Convert, { MCK_mfence } },
- { X86::MONITOR, Convert, { MCK_monitor } },
- { X86::MOVSB, Convert, { MCK_movsb } },
- { X86::MOVSD, Convert, { MCK_movsl } },
- { X86::MOVSW, Convert, { MCK_movsw } },
- { X86::MWAIT, Convert, { MCK_mwait } },
- { X86::NOOP, Convert, { MCK_nop } },
- { X86::OUTSB, Convert, { MCK_outsb } },
- { X86::OUTSD, Convert, { MCK_outsl } },
- { X86::OUTSW, Convert, { MCK_outsw } },
- { X86::POPFD, Convert, { MCK_popfl } },
- { X86::POPFQ, Convert, { MCK_popfq } },
- { X86::POPF, Convert, { MCK_popfw } },
- { X86::PUSHFD, Convert, { MCK_pushfl } },
- { X86::PUSHFQ64, Convert, { MCK_pushfq } },
- { X86::PUSHF, Convert, { MCK_pushfw } },
- { X86::RDMSR, Convert, { MCK_rdmsr } },
- { X86::RDPMC, Convert, { MCK_rdpmc } },
- { X86::RDTSC, Convert, { MCK_rdtsc } },
- { X86::RDTSCP, Convert, { MCK_rdtscp } },
- { X86::REP_PREFIX, Convert, { MCK_rep } },
- { X86::REP_MOVSQ, Convert, { MCK_rep_59_movsq } },
- { X86::REP_STOSQ, Convert, { MCK_rep_59_stosq } },
- { X86::REPNE_PREFIX, Convert, { MCK_repne } },
- { X86::RET, Convert, { MCK_ret } },
- { X86::RSM, Convert, { MCK_rsm } },
- { X86::SAHF, Convert, { MCK_sahf } },
- { X86::SCAS8, Convert, { MCK_scasb } },
- { X86::SCAS32, Convert, { MCK_scasl } },
- { X86::SCAS64, Convert, { MCK_scasq } },
- { X86::SCAS16, Convert, { MCK_scasw } },
- { X86::SFENCE, Convert, { MCK_sfence } },
- { X86::SS_PREFIX, Convert, { MCK_ss } },
- { X86::STC, Convert, { MCK_stc } },
- { X86::STD, Convert, { MCK_std } },
- { X86::STI, Convert, { MCK_sti } },
- { X86::STOSB, Convert, { MCK_stosb } },
- { X86::STOSD, Convert, { MCK_stosl } },
- { X86::STOSW, Convert, { MCK_stosw } },
- { X86::SWAPGS, Convert, { MCK_swapgs } },
- { X86::SYSCALL, Convert, { MCK_syscall } },
- { X86::SYSENTER, Convert, { MCK_sysenter } },
- { X86::SYSEXIT, Convert, { MCK_sysexit } },
- { X86::SYSEXIT64, Convert, { MCK_sysexit } },
- { X86::SYSRET, Convert, { MCK_sysret } },
- { X86::TRAP, Convert, { MCK_ud2 } },
- { X86::VMCALL, Convert, { MCK_vmcall } },
- { X86::VMLAUNCH, Convert, { MCK_vmlaunch } },
- { X86::VMRESUME, Convert, { MCK_vmresume } },
- { X86::VMXOFF, Convert, { MCK_vmxoff } },
- { X86::WAIT, Convert, { MCK_wait } },
- { X86::WBINVD, Convert, { MCK_wbinvd } },
- { X86::WRMSR, Convert, { MCK_wrmsr } },
- { X86::XLAT, Convert, { MCK_xlatb } },
- { X86::BSWAP32r, Convert__Reg1_1__Tie0, { MCK_bswapl, MCK_GR32 } },
- { X86::BSWAP64r, Convert__Reg1_1__Tie0, { MCK_bswapq, MCK_GR64 } },
- { X86::WINCALL64pcrel32, Convert__Imm1_1, { MCK_call, MCK_Imm } },
- { X86::CALLpcrel32, Convert__AbsMem1_1, { MCK_call, MCK_AbsMem } },
- { X86::CALL64pcrel32, Convert__Imm1_1, { MCK_callq, MCK_Imm } },
- { X86::CLFLUSH, Convert__Mem5_1, { MCK_clflush, MCK_Mem } },
- { X86::CMPXCHG16B, Convert__Mem5_1, { MCK_cmpxchg16b, MCK_Mem } },
- { X86::CMPXCHG8B, Convert__Mem5_1, { MCK_cmpxchg8b, MCK_Mem } },
- { X86::DEC8r, Convert__Reg1_1__Tie0, { MCK_decb, MCK_GR8 } },
- { X86::DEC8m, Convert__Mem5_1, { MCK_decb, MCK_Mem } },
- { X86::DEC32r, Convert__Reg1_1__Tie0, { MCK_decl, MCK_GR32 } },
- { X86::DEC64_32r, Convert__Reg1_1__Tie0, { MCK_decl, MCK_GR32 } },
- { X86::DEC32m, Convert__Mem5_1, { MCK_decl, MCK_Mem } },
- { X86::DEC64_32m, Convert__Mem5_1, { MCK_decl, MCK_Mem } },
- { X86::DEC64r, Convert__Reg1_1__Tie0, { MCK_decq, MCK_GR64 } },
- { X86::DEC64m, Convert__Mem5_1, { MCK_decq, MCK_Mem } },
- { X86::DEC16r, Convert__Reg1_1__Tie0, { MCK_decw, MCK_GR16 } },
- { X86::DEC64_16r, Convert__Reg1_1__Tie0, { MCK_decw, MCK_GR16 } },
- { X86::DEC16m, Convert__Mem5_1, { MCK_decw, MCK_Mem } },
- { X86::DEC64_16m, Convert__Mem5_1, { MCK_decw, MCK_Mem } },
- { X86::DIV8r, Convert__Reg1_1, { MCK_divb, MCK_GR8 } },
- { X86::DIV8m, Convert__Mem5_1, { MCK_divb, MCK_Mem } },
- { X86::DIV32r, Convert__Reg1_1, { MCK_divl, MCK_GR32 } },
- { X86::DIV32m, Convert__Mem5_1, { MCK_divl, MCK_Mem } },
- { X86::DIV64r, Convert__Reg1_1, { MCK_divq, MCK_GR64 } },
- { X86::DIV64m, Convert__Mem5_1, { MCK_divq, MCK_Mem } },
- { X86::DIV16r, Convert__Reg1_1, { MCK_divw, MCK_GR16 } },
- { X86::DIV16m, Convert__Mem5_1, { MCK_divw, MCK_Mem } },
- { X86::ADD_FST0r, Convert__Reg1_1, { MCK_fadd, MCK_RST } },
- { X86::ADD_F64m, Convert__Mem5_1, { MCK_faddl, MCK_Mem } },
- { X86::ADD_FPrST0, Convert__Reg1_1, { MCK_faddp, MCK_RST } },
- { X86::ADD_F32m, Convert__Mem5_1, { MCK_fadds, MCK_Mem } },
- { X86::FBLDm, Convert__Mem5_1, { MCK_fbld, MCK_Mem } },
- { X86::FBSTPm, Convert__Mem5_1, { MCK_fbstp, MCK_Mem } },
- { X86::COM_FST0r, Convert__Reg1_1, { MCK_fcom, MCK_RST } },
- { X86::FCOM32m, Convert__Mem5_1, { MCK_fcoml, MCK_Mem } },
- { X86::FCOM64m, Convert__Mem5_1, { MCK_fcomll, MCK_Mem } },
- { X86::COMP_FST0r, Convert__Reg1_1, { MCK_fcomp, MCK_RST } },
- { X86::FCOMP32m, Convert__Mem5_1, { MCK_fcompl, MCK_Mem } },
- { X86::FCOMP64m, Convert__Mem5_1, { MCK_fcompll, MCK_Mem } },
- { X86::DIV_FST0r, Convert__Reg1_1, { MCK_fdiv, MCK_RST } },
- { X86::DIV_F64m, Convert__Mem5_1, { MCK_fdivl, MCK_Mem } },
- { X86::DIVR_FPrST0, Convert__Reg1_1, { MCK_fdivp, MCK_RST } },
- { X86::DIVR_FST0r, Convert__Reg1_1, { MCK_fdivr, MCK_RST } },
- { X86::DIVR_F64m, Convert__Mem5_1, { MCK_fdivrl, MCK_Mem } },
- { X86::DIV_FPrST0, Convert__Reg1_1, { MCK_fdivrp, MCK_RST } },
- { X86::DIVR_F32m, Convert__Mem5_1, { MCK_fdivrs, MCK_Mem } },
- { X86::DIV_F32m, Convert__Mem5_1, { MCK_fdivs, MCK_Mem } },
- { X86::FFREE, Convert__Reg1_1, { MCK_ffree, MCK_RST } },
- { X86::ADD_FI32m, Convert__Mem5_1, { MCK_fiaddl, MCK_Mem } },
- { X86::ADD_FI16m, Convert__Mem5_1, { MCK_fiadds, MCK_Mem } },
- { X86::FICOM32m, Convert__Mem5_1, { MCK_ficoml, MCK_Mem } },
- { X86::FICOMP32m, Convert__Mem5_1, { MCK_ficompl, MCK_Mem } },
- { X86::FICOMP16m, Convert__Mem5_1, { MCK_ficompw, MCK_Mem } },
- { X86::FICOM16m, Convert__Mem5_1, { MCK_ficomw, MCK_Mem } },
- { X86::DIV_FI32m, Convert__Mem5_1, { MCK_fidivl, MCK_Mem } },
- { X86::DIVR_FI32m, Convert__Mem5_1, { MCK_fidivrl, MCK_Mem } },
- { X86::DIVR_FI16m, Convert__Mem5_1, { MCK_fidivrs, MCK_Mem } },
- { X86::DIV_FI16m, Convert__Mem5_1, { MCK_fidivs, MCK_Mem } },
- { X86::ILD_F32m, Convert__Mem5_1, { MCK_fildl, MCK_Mem } },
- { X86::ILD_F64m, Convert__Mem5_1, { MCK_fildll, MCK_Mem } },
- { X86::ILD_F16m, Convert__Mem5_1, { MCK_filds, MCK_Mem } },
- { X86::MUL_FI32m, Convert__Mem5_1, { MCK_fimull, MCK_Mem } },
- { X86::MUL_FI16m, Convert__Mem5_1, { MCK_fimuls, MCK_Mem } },
- { X86::IST_F32m, Convert__Mem5_1, { MCK_fistl, MCK_Mem } },
- { X86::IST_FP32m, Convert__Mem5_1, { MCK_fistpl, MCK_Mem } },
- { X86::IST_FP64m, Convert__Mem5_1, { MCK_fistpll, MCK_Mem } },
- { X86::IST_FP16m, Convert__Mem5_1, { MCK_fistps, MCK_Mem } },
- { X86::IST_F16m, Convert__Mem5_1, { MCK_fists, MCK_Mem } },
- { X86::ISTT_FP32m, Convert__Mem5_1, { MCK_fisttpl, MCK_Mem } },
- { X86::ISTT_FP64m, Convert__Mem5_1, { MCK_fisttpll, MCK_Mem } },
- { X86::ISTT_FP16m, Convert__Mem5_1, { MCK_fisttps, MCK_Mem } },
- { X86::SUB_FI32m, Convert__Mem5_1, { MCK_fisubl, MCK_Mem } },
- { X86::SUBR_FI32m, Convert__Mem5_1, { MCK_fisubrl, MCK_Mem } },
- { X86::SUBR_FI16m, Convert__Mem5_1, { MCK_fisubrs, MCK_Mem } },
- { X86::SUB_FI16m, Convert__Mem5_1, { MCK_fisubs, MCK_Mem } },
- { X86::LD_Frr, Convert__Reg1_1, { MCK_fld, MCK_RST } },
- { X86::FLDCW16m, Convert__Mem5_1, { MCK_fldcw, MCK_Mem } },
- { X86::FLDENVm, Convert__Mem5_1, { MCK_fldenv, MCK_Mem } },
- { X86::LD_F64m, Convert__Mem5_1, { MCK_fldl, MCK_Mem } },
- { X86::LD_F32m, Convert__Mem5_1, { MCK_flds, MCK_Mem } },
- { X86::LD_F80m, Convert__Mem5_1, { MCK_fldt, MCK_Mem } },
- { X86::MUL_FST0r, Convert__Reg1_1, { MCK_fmul, MCK_RST } },
- { X86::MUL_F64m, Convert__Mem5_1, { MCK_fmull, MCK_Mem } },
- { X86::MUL_FPrST0, Convert__Reg1_1, { MCK_fmulp, MCK_RST } },
- { X86::MUL_F32m, Convert__Mem5_1, { MCK_fmuls, MCK_Mem } },
- { X86::FSAVEm, Convert__Mem5_1, { MCK_fnsave, MCK_Mem } },
- { X86::FNSTCW16m, Convert__Mem5_1, { MCK_fnstcw, MCK_Mem } },
- { X86::FSTENVm, Convert__Mem5_1, { MCK_fnstenv, MCK_Mem } },
- { X86::FNSTSW8r, Convert, { MCK_fnstsw, MCK_AX } },
- { X86::FNSTSWm, Convert__Mem5_1, { MCK_fnstsw, MCK_Mem } },
- { X86::FRSTORm, Convert__Mem5_1, { MCK_frstor, MCK_Mem } },
- { X86::ST_Frr, Convert__Reg1_1, { MCK_fst, MCK_RST } },
- { X86::ST_F64m, Convert__Mem5_1, { MCK_fstl, MCK_Mem } },
- { X86::ST_FPrr, Convert__Reg1_1, { MCK_fstp, MCK_RST } },
- { X86::ST_FP64m, Convert__Mem5_1, { MCK_fstpl, MCK_Mem } },
- { X86::ST_FP32m, Convert__Mem5_1, { MCK_fstps, MCK_Mem } },
- { X86::ST_FP80m, Convert__Mem5_1, { MCK_fstpt, MCK_Mem } },
- { X86::ST_F32m, Convert__Mem5_1, { MCK_fsts, MCK_Mem } },
- { X86::SUB_FST0r, Convert__Reg1_1, { MCK_fsub, MCK_RST } },
- { X86::SUB_F64m, Convert__Mem5_1, { MCK_fsubl, MCK_Mem } },
- { X86::SUBR_FPrST0, Convert__Reg1_1, { MCK_fsubp, MCK_RST } },
- { X86::SUBR_FST0r, Convert__Reg1_1, { MCK_fsubr, MCK_RST } },
- { X86::SUBR_F64m, Convert__Mem5_1, { MCK_fsubrl, MCK_Mem } },
- { X86::SUB_FPrST0, Convert__Reg1_1, { MCK_fsubrp, MCK_RST } },
- { X86::SUBR_F32m, Convert__Mem5_1, { MCK_fsubrs, MCK_Mem } },
- { X86::SUB_F32m, Convert__Mem5_1, { MCK_fsubs, MCK_Mem } },
- { X86::UCOM_Fr, Convert__Reg1_1, { MCK_fucom, MCK_RST } },
- { X86::UCOM_FPr, Convert__Reg1_1, { MCK_fucomp, MCK_RST } },
- { X86::XCH_F, Convert__Reg1_1, { MCK_fxch, MCK_RST } },
- { X86::FXRSTOR, Convert__Mem5_1, { MCK_fxrstor, MCK_Mem } },
- { X86::FXSAVE, Convert__Mem5_1, { MCK_fxsave, MCK_Mem } },
- { X86::IDIV8r, Convert__Reg1_1, { MCK_idivb, MCK_GR8 } },
- { X86::IDIV8m, Convert__Mem5_1, { MCK_idivb, MCK_Mem } },
- { X86::IDIV32r, Convert__Reg1_1, { MCK_idivl, MCK_GR32 } },
- { X86::IDIV32m, Convert__Mem5_1, { MCK_idivl, MCK_Mem } },
- { X86::IDIV64r, Convert__Reg1_1, { MCK_idivq, MCK_GR64 } },
- { X86::IDIV64m, Convert__Mem5_1, { MCK_idivq, MCK_Mem } },
- { X86::IDIV16r, Convert__Reg1_1, { MCK_idivw, MCK_GR16 } },
- { X86::IDIV16m, Convert__Mem5_1, { MCK_idivw, MCK_Mem } },
- { X86::IMUL8r, Convert__Reg1_1, { MCK_imulb, MCK_GR8 } },
- { X86::IMUL8m, Convert__Mem5_1, { MCK_imulb, MCK_Mem } },
- { X86::IMUL32r, Convert__Reg1_1, { MCK_imull, MCK_GR32 } },
- { X86::IMUL32m, Convert__Mem5_1, { MCK_imull, MCK_Mem } },
- { X86::IMUL64r, Convert__Reg1_1, { MCK_imulq, MCK_GR64 } },
- { X86::IMUL64m, Convert__Mem5_1, { MCK_imulq, MCK_Mem } },
- { X86::IMUL16r, Convert__Reg1_1, { MCK_imulw, MCK_GR16 } },
- { X86::IMUL16m, Convert__Mem5_1, { MCK_imulw, MCK_Mem } },
- { X86::INC8r, Convert__Reg1_1__Tie0, { MCK_incb, MCK_GR8 } },
- { X86::INC8m, Convert__Mem5_1, { MCK_incb, MCK_Mem } },
- { X86::INC32r, Convert__Reg1_1__Tie0, { MCK_incl, MCK_GR32 } },
- { X86::INC64_32r, Convert__Reg1_1__Tie0, { MCK_incl, MCK_GR32 } },
- { X86::INC32m, Convert__Mem5_1, { MCK_incl, MCK_Mem } },
- { X86::INC64_32m, Convert__Mem5_1, { MCK_incl, MCK_Mem } },
- { X86::INC64r, Convert__Reg1_1__Tie0, { MCK_incq, MCK_GR64 } },
- { X86::INC64m, Convert__Mem5_1, { MCK_incq, MCK_Mem } },
- { X86::INC16r, Convert__Reg1_1__Tie0, { MCK_incw, MCK_GR16 } },
- { X86::INC64_16r, Convert__Reg1_1__Tie0, { MCK_incw, MCK_GR16 } },
- { X86::INC16m, Convert__Mem5_1, { MCK_incw, MCK_Mem } },
- { X86::INC64_16m, Convert__Mem5_1, { MCK_incw, MCK_Mem } },
- { X86::INT3, Convert, { MCK_int, MCK_3 } },
- { X86::INT, Convert__Imm1_1, { MCK_int, MCK_Imm } },
- { X86::INVLPG, Convert__Mem5_1, { MCK_invlpg, MCK_Mem } },
- { X86::JA_1, Convert__AbsMem1_1, { MCK_ja, MCK_AbsMem } },
- { X86::JA_4, Convert__AbsMem1_1, { MCK_ja, MCK_AbsMem } },
- { X86::JAE_1, Convert__AbsMem1_1, { MCK_jae, MCK_AbsMem } },
- { X86::JAE_4, Convert__AbsMem1_1, { MCK_jae, MCK_AbsMem } },
- { X86::JB_1, Convert__AbsMem1_1, { MCK_jb, MCK_AbsMem } },
- { X86::JB_4, Convert__AbsMem1_1, { MCK_jb, MCK_AbsMem } },
- { X86::JBE_1, Convert__AbsMem1_1, { MCK_jbe, MCK_AbsMem } },
- { X86::JBE_4, Convert__AbsMem1_1, { MCK_jbe, MCK_AbsMem } },
- { X86::JCXZ8, Convert__AbsMem1_1, { MCK_jcxz, MCK_AbsMem } },
- { X86::JE_1, Convert__AbsMem1_1, { MCK_je, MCK_AbsMem } },
- { X86::JE_4, Convert__AbsMem1_1, { MCK_je, MCK_AbsMem } },
- { X86::JG_1, Convert__AbsMem1_1, { MCK_jg, MCK_AbsMem } },
- { X86::JG_4, Convert__AbsMem1_1, { MCK_jg, MCK_AbsMem } },
- { X86::JGE_1, Convert__AbsMem1_1, { MCK_jge, MCK_AbsMem } },
- { X86::JGE_4, Convert__AbsMem1_1, { MCK_jge, MCK_AbsMem } },
- { X86::JL_1, Convert__AbsMem1_1, { MCK_jl, MCK_AbsMem } },
- { X86::JL_4, Convert__AbsMem1_1, { MCK_jl, MCK_AbsMem } },
- { X86::JLE_1, Convert__AbsMem1_1, { MCK_jle, MCK_AbsMem } },
- { X86::JLE_4, Convert__AbsMem1_1, { MCK_jle, MCK_AbsMem } },
- { X86::JMP_1, Convert__AbsMem1_1, { MCK_jmp, MCK_AbsMem } },
- { X86::JMP_4, Convert__AbsMem1_1, { MCK_jmp, MCK_AbsMem } },
- { X86::TAILJMPd, Convert__AbsMem1_1, { MCK_jmp, MCK_AbsMem } },
- { X86::JMP64pcrel32, Convert__AbsMem1_1, { MCK_jmpq, MCK_AbsMem } },
- { X86::JNE_1, Convert__AbsMem1_1, { MCK_jne, MCK_AbsMem } },
- { X86::JNE_4, Convert__AbsMem1_1, { MCK_jne, MCK_AbsMem } },
- { X86::JNO_1, Convert__AbsMem1_1, { MCK_jno, MCK_AbsMem } },
- { X86::JNO_4, Convert__AbsMem1_1, { MCK_jno, MCK_AbsMem } },
- { X86::JNP_1, Convert__AbsMem1_1, { MCK_jnp, MCK_AbsMem } },
- { X86::JNP_4, Convert__AbsMem1_1, { MCK_jnp, MCK_AbsMem } },
- { X86::JNS_1, Convert__AbsMem1_1, { MCK_jns, MCK_AbsMem } },
- { X86::JNS_4, Convert__AbsMem1_1, { MCK_jns, MCK_AbsMem } },
- { X86::JO_1, Convert__AbsMem1_1, { MCK_jo, MCK_AbsMem } },
- { X86::JO_4, Convert__AbsMem1_1, { MCK_jo, MCK_AbsMem } },
- { X86::JP_1, Convert__AbsMem1_1, { MCK_jp, MCK_AbsMem } },
- { X86::JP_4, Convert__AbsMem1_1, { MCK_jp, MCK_AbsMem } },
- { X86::JS_1, Convert__AbsMem1_1, { MCK_js, MCK_AbsMem } },
- { X86::JS_4, Convert__AbsMem1_1, { MCK_js, MCK_AbsMem } },
- { X86::LDMXCSR, Convert__Mem5_1, { MCK_ldmxcsr, MCK_Mem } },
- { X86::LGDTm, Convert__Mem5_1, { MCK_lgdt, MCK_Mem } },
- { X86::LIDTm, Convert__Mem5_1, { MCK_lidt, MCK_Mem } },
- { X86::LLDT16r, Convert__Reg1_1, { MCK_lldtw, MCK_GR16 } },
- { X86::LLDT16m, Convert__Mem5_1, { MCK_lldtw, MCK_Mem } },
- { X86::LMSW16r, Convert__Reg1_1, { MCK_lmsww, MCK_GR16 } },
- { X86::LMSW16m, Convert__Mem5_1, { MCK_lmsww, MCK_Mem } },
- { X86::LOOP, Convert__AbsMem1_1, { MCK_loop, MCK_AbsMem } },
- { X86::LOOPE, Convert__AbsMem1_1, { MCK_loope, MCK_AbsMem } },
- { X86::LOOPNE, Convert__AbsMem1_1, { MCK_loopne, MCK_AbsMem } },
- { X86::LRETI, Convert__Imm1_1, { MCK_lret, MCK_Imm } },
- { X86::LTRr, Convert__Reg1_1, { MCK_ltrw, MCK_GR16 } },
- { X86::LTRm, Convert__Mem5_1, { MCK_ltrw, MCK_Mem } },
- { X86::MUL8r, Convert__Reg1_1, { MCK_mulb, MCK_GR8 } },
- { X86::MUL8m, Convert__Mem5_1, { MCK_mulb, MCK_Mem } },
- { X86::MUL32r, Convert__Reg1_1, { MCK_mull, MCK_GR32 } },
- { X86::MUL32m, Convert__Mem5_1, { MCK_mull, MCK_Mem } },
- { X86::MUL64r, Convert__Reg1_1, { MCK_mulq, MCK_GR64 } },
- { X86::MUL64m, Convert__Mem5_1, { MCK_mulq, MCK_Mem } },
- { X86::MUL16r, Convert__Reg1_1, { MCK_mulw, MCK_GR16 } },
- { X86::MUL16m, Convert__Mem5_1, { MCK_mulw, MCK_Mem } },
- { X86::NEG8r, Convert__Reg1_1__Tie0, { MCK_negb, MCK_GR8 } },
- { X86::NEG8m, Convert__Mem5_1, { MCK_negb, MCK_Mem } },
- { X86::NEG32r, Convert__Reg1_1__Tie0, { MCK_negl, MCK_GR32 } },
- { X86::NEG32m, Convert__Mem5_1, { MCK_negl, MCK_Mem } },
- { X86::NEG64r, Convert__Reg1_1__Tie0, { MCK_negq, MCK_GR64 } },
- { X86::NEG64m, Convert__Mem5_1, { MCK_negq, MCK_Mem } },
- { X86::NEG16r, Convert__Reg1_1__Tie0, { MCK_negw, MCK_GR16 } },
- { X86::NEG16m, Convert__Mem5_1, { MCK_negw, MCK_Mem } },
- { X86::NOOPL, Convert__Mem5_1, { MCK_nopl, MCK_Mem } },
- { X86::NOOPW, Convert__Mem5_1, { MCK_nopw, MCK_Mem } },
- { X86::NOT8r, Convert__Reg1_1__Tie0, { MCK_notb, MCK_GR8 } },
- { X86::NOT8m, Convert__Mem5_1, { MCK_notb, MCK_Mem } },
- { X86::NOT32r, Convert__Reg1_1__Tie0, { MCK_notl, MCK_GR32 } },
- { X86::NOT32m, Convert__Mem5_1, { MCK_notl, MCK_Mem } },
- { X86::NOT64r, Convert__Reg1_1__Tie0, { MCK_notq, MCK_GR64 } },
- { X86::NOT64m, Convert__Mem5_1, { MCK_notq, MCK_Mem } },
- { X86::NOT16r, Convert__Reg1_1__Tie0, { MCK_notw, MCK_GR16 } },
- { X86::NOT16m, Convert__Mem5_1, { MCK_notw, MCK_Mem } },
- { X86::POP32r, Convert__Reg1_1, { MCK_popl, MCK_GR32 } },
- { X86::POP32rmr, Convert__Reg1_1, { MCK_popl, MCK_GR32 } },
- { X86::POPFS32, Convert, { MCK_popl, MCK_FS } },
- { X86::POPGS32, Convert, { MCK_popl, MCK_GS } },
- { X86::POP32rmm, Convert__Mem5_1, { MCK_popl, MCK_Mem } },
- { X86::POP64r, Convert__Reg1_1, { MCK_popq, MCK_GR64 } },
- { X86::POP64rmr, Convert__Reg1_1, { MCK_popq, MCK_GR64 } },
- { X86::POPFS64, Convert, { MCK_popq, MCK_FS } },
- { X86::POPGS64, Convert, { MCK_popq, MCK_GS } },
- { X86::POP64rmm, Convert__Mem5_1, { MCK_popq, MCK_Mem } },
- { X86::POP16r, Convert__Reg1_1, { MCK_popw, MCK_GR16 } },
- { X86::POP16rmr, Convert__Reg1_1, { MCK_popw, MCK_GR16 } },
- { X86::POPFS16, Convert, { MCK_popw, MCK_FS } },
- { X86::POPGS16, Convert, { MCK_popw, MCK_GS } },
- { X86::POP16rmm, Convert__Mem5_1, { MCK_popw, MCK_Mem } },
- { X86::PREFETCHNTA, Convert__Mem5_1, { MCK_prefetchnta, MCK_Mem } },
- { X86::PREFETCHT0, Convert__Mem5_1, { MCK_prefetcht0, MCK_Mem } },
- { X86::PREFETCHT1, Convert__Mem5_1, { MCK_prefetcht1, MCK_Mem } },
- { X86::PREFETCHT2, Convert__Mem5_1, { MCK_prefetcht2, MCK_Mem } },
- { X86::PUSH32r, Convert__Reg1_1, { MCK_pushl, MCK_GR32 } },
- { X86::PUSH32rmr, Convert__Reg1_1, { MCK_pushl, MCK_GR32 } },
- { X86::PUSHFS32, Convert, { MCK_pushl, MCK_FS } },
- { X86::PUSHGS32, Convert, { MCK_pushl, MCK_GS } },
- { X86::PUSH32i16, Convert__Imm1_1, { MCK_pushl, MCK_Imm } },
- { X86::PUSH32i32, Convert__Imm1_1, { MCK_pushl, MCK_Imm } },
- { X86::PUSH32i8, Convert__Imm1_1, { MCK_pushl, MCK_Imm } },
- { X86::PUSH32rmm, Convert__Mem5_1, { MCK_pushl, MCK_Mem } },
- { X86::PUSH64r, Convert__Reg1_1, { MCK_pushq, MCK_GR64 } },
- { X86::PUSH64rmr, Convert__Reg1_1, { MCK_pushq, MCK_GR64 } },
- { X86::PUSHFS64, Convert, { MCK_pushq, MCK_FS } },
- { X86::PUSHGS64, Convert, { MCK_pushq, MCK_GS } },
- { X86::PUSH64i16, Convert__Imm1_1, { MCK_pushq, MCK_Imm } },
- { X86::PUSH64i32, Convert__Imm1_1, { MCK_pushq, MCK_Imm } },
- { X86::PUSH64i8, Convert__Imm1_1, { MCK_pushq, MCK_Imm } },
- { X86::PUSH64rmm, Convert__Mem5_1, { MCK_pushq, MCK_Mem } },
- { X86::PUSH16r, Convert__Reg1_1, { MCK_pushw, MCK_GR16 } },
- { X86::PUSH16rmr, Convert__Reg1_1, { MCK_pushw, MCK_GR16 } },
- { X86::PUSHFS16, Convert, { MCK_pushw, MCK_FS } },
- { X86::PUSHGS16, Convert, { MCK_pushw, MCK_GS } },
- { X86::PUSH16rmm, Convert__Mem5_1, { MCK_pushw, MCK_Mem } },
- { X86::RETI, Convert__Imm1_1, { MCK_ret, MCK_Imm } },
- { X86::ROL8r1, Convert__Reg1_1__Tie0, { MCK_rolb, MCK_GR8 } },
- { X86::ROL8m1, Convert__Mem5_1, { MCK_rolb, MCK_Mem } },
- { X86::ROL32r1, Convert__Reg1_1__Tie0, { MCK_roll, MCK_GR32 } },
- { X86::ROL32m1, Convert__Mem5_1, { MCK_roll, MCK_Mem } },
- { X86::ROL64r1, Convert__Reg1_1__Tie0, { MCK_rolq, MCK_GR64 } },
- { X86::ROL64m1, Convert__Mem5_1, { MCK_rolq, MCK_Mem } },
- { X86::ROL16r1, Convert__Reg1_1__Tie0, { MCK_rolw, MCK_GR16 } },
- { X86::ROL16m1, Convert__Mem5_1, { MCK_rolw, MCK_Mem } },
- { X86::ROR8r1, Convert__Reg1_1__Tie0, { MCK_rorb, MCK_GR8 } },
- { X86::ROR8m1, Convert__Mem5_1, { MCK_rorb, MCK_Mem } },
- { X86::ROR32r1, Convert__Reg1_1__Tie0, { MCK_rorl, MCK_GR32 } },
- { X86::ROR32m1, Convert__Mem5_1, { MCK_rorl, MCK_Mem } },
- { X86::ROR64r1, Convert__Reg1_1__Tie0, { MCK_rorq, MCK_GR64 } },
- { X86::ROR64m1, Convert__Mem5_1, { MCK_rorq, MCK_Mem } },
- { X86::ROR16r1, Convert__Reg1_1__Tie0, { MCK_rorw, MCK_GR16 } },
- { X86::ROR16m1, Convert__Mem5_1, { MCK_rorw, MCK_Mem } },
- { X86::SAR8r1, Convert__Reg1_1__Tie0, { MCK_sarb, MCK_GR8 } },
- { X86::SAR8m1, Convert__Mem5_1, { MCK_sarb, MCK_Mem } },
- { X86::SAR32r1, Convert__Reg1_1__Tie0, { MCK_sarl, MCK_GR32 } },
- { X86::SAR32m1, Convert__Mem5_1, { MCK_sarl, MCK_Mem } },
- { X86::SAR64r1, Convert__Reg1_1__Tie0, { MCK_sarq, MCK_GR64 } },
- { X86::SAR64m1, Convert__Mem5_1, { MCK_sarq, MCK_Mem } },
- { X86::SAR16r1, Convert__Reg1_1__Tie0, { MCK_sarw, MCK_GR16 } },
- { X86::SAR16m1, Convert__Mem5_1, { MCK_sarw, MCK_Mem } },
- { X86::SETAr, Convert__Reg1_1, { MCK_seta, MCK_GR8 } },
- { X86::SETAm, Convert__Mem5_1, { MCK_seta, MCK_Mem } },
- { X86::SETAEr, Convert__Reg1_1, { MCK_setae, MCK_GR8 } },
- { X86::SETAEm, Convert__Mem5_1, { MCK_setae, MCK_Mem } },
- { X86::SETBr, Convert__Reg1_1, { MCK_setb, MCK_GR8 } },
- { X86::SETBm, Convert__Mem5_1, { MCK_setb, MCK_Mem } },
- { X86::SETBEr, Convert__Reg1_1, { MCK_setbe, MCK_GR8 } },
- { X86::SETBEm, Convert__Mem5_1, { MCK_setbe, MCK_Mem } },
- { X86::SETEr, Convert__Reg1_1, { MCK_sete, MCK_GR8 } },
- { X86::SETEm, Convert__Mem5_1, { MCK_sete, MCK_Mem } },
- { X86::SETGr, Convert__Reg1_1, { MCK_setg, MCK_GR8 } },
- { X86::SETGm, Convert__Mem5_1, { MCK_setg, MCK_Mem } },
- { X86::SETGEr, Convert__Reg1_1, { MCK_setge, MCK_GR8 } },
- { X86::SETGEm, Convert__Mem5_1, { MCK_setge, MCK_Mem } },
- { X86::SETLr, Convert__Reg1_1, { MCK_setl, MCK_GR8 } },
- { X86::SETLm, Convert__Mem5_1, { MCK_setl, MCK_Mem } },
- { X86::SETLEr, Convert__Reg1_1, { MCK_setle, MCK_GR8 } },
- { X86::SETLEm, Convert__Mem5_1, { MCK_setle, MCK_Mem } },
- { X86::SETNEr, Convert__Reg1_1, { MCK_setne, MCK_GR8 } },
- { X86::SETNEm, Convert__Mem5_1, { MCK_setne, MCK_Mem } },
- { X86::SETNOr, Convert__Reg1_1, { MCK_setno, MCK_GR8 } },
- { X86::SETNOm, Convert__Mem5_1, { MCK_setno, MCK_Mem } },
- { X86::SETNPr, Convert__Reg1_1, { MCK_setnp, MCK_GR8 } },
- { X86::SETNPm, Convert__Mem5_1, { MCK_setnp, MCK_Mem } },
- { X86::SETNSr, Convert__Reg1_1, { MCK_setns, MCK_GR8 } },
- { X86::SETNSm, Convert__Mem5_1, { MCK_setns, MCK_Mem } },
- { X86::SETOr, Convert__Reg1_1, { MCK_seto, MCK_GR8 } },
- { X86::SETOm, Convert__Mem5_1, { MCK_seto, MCK_Mem } },
- { X86::SETPr, Convert__Reg1_1, { MCK_setp, MCK_GR8 } },
- { X86::SETPm, Convert__Mem5_1, { MCK_setp, MCK_Mem } },
- { X86::SETSr, Convert__Reg1_1, { MCK_sets, MCK_GR8 } },
- { X86::SETSm, Convert__Mem5_1, { MCK_sets, MCK_Mem } },
- { X86::SGDTm, Convert__Mem5_1, { MCK_sgdt, MCK_Mem } },
- { X86::SHL8r1, Convert__Reg1_1__Tie0, { MCK_shlb, MCK_GR8 } },
- { X86::SHL8m1, Convert__Mem5_1, { MCK_shlb, MCK_Mem } },
- { X86::SHL32r1, Convert__Reg1_1__Tie0, { MCK_shll, MCK_GR32 } },
- { X86::SHL32m1, Convert__Mem5_1, { MCK_shll, MCK_Mem } },
- { X86::SHL64r1, Convert__Reg1_1__Tie0, { MCK_shlq, MCK_GR64 } },
- { X86::SHL64m1, Convert__Mem5_1, { MCK_shlq, MCK_Mem } },
- { X86::SHL16r1, Convert__Reg1_1__Tie0, { MCK_shlw, MCK_GR16 } },
- { X86::SHL16m1, Convert__Mem5_1, { MCK_shlw, MCK_Mem } },
- { X86::SHR8r1, Convert__Reg1_1__Tie0, { MCK_shrb, MCK_GR8 } },
- { X86::SHR8m1, Convert__Mem5_1, { MCK_shrb, MCK_Mem } },
- { X86::SHR32r1, Convert__Reg1_1__Tie0, { MCK_shrl, MCK_GR32 } },
- { X86::SHR32m1, Convert__Mem5_1, { MCK_shrl, MCK_Mem } },
- { X86::SHR64r1, Convert__Reg1_1__Tie0, { MCK_shrq, MCK_GR64 } },
- { X86::SHR64m1, Convert__Mem5_1, { MCK_shrq, MCK_Mem } },
- { X86::SHR16r1, Convert__Reg1_1__Tie0, { MCK_shrw, MCK_GR16 } },
- { X86::SHR16m1, Convert__Mem5_1, { MCK_shrw, MCK_Mem } },
- { X86::SIDTm, Convert__Mem5_1, { MCK_sidt, MCK_Mem } },
- { X86::SLDT64r, Convert__Reg1_1, { MCK_sldtq, MCK_GR64 } },
- { X86::SLDT64m, Convert__Mem5_1, { MCK_sldtq, MCK_Mem } },
- { X86::SLDT16r, Convert__Reg1_1, { MCK_sldtw, MCK_GR16 } },
- { X86::SLDT16m, Convert__Mem5_1, { MCK_sldtw, MCK_Mem } },
- { X86::SMSW32r, Convert__Reg1_1, { MCK_smswl, MCK_GR32 } },
- { X86::SMSW64r, Convert__Reg1_1, { MCK_smswq, MCK_GR64 } },
- { X86::SMSW16r, Convert__Reg1_1, { MCK_smsww, MCK_GR16 } },
- { X86::SMSW16m, Convert__Mem5_1, { MCK_smsww, MCK_Mem } },
- { X86::STMXCSR, Convert__Mem5_1, { MCK_stmxcsr, MCK_Mem } },
- { X86::STRr, Convert__Reg1_1, { MCK_strw, MCK_GR16 } },
- { X86::STRm, Convert__Mem5_1, { MCK_strw, MCK_Mem } },
- { X86::VERRr, Convert__Reg1_1, { MCK_verr, MCK_GR16 } },
- { X86::VERRm, Convert__Mem5_1, { MCK_verr, MCK_Mem } },
- { X86::VERWr, Convert__Reg1_1, { MCK_verw, MCK_GR16 } },
- { X86::VERWm, Convert__Mem5_1, { MCK_verw, MCK_Mem } },
- { X86::VMCLEARm, Convert__Mem5_1, { MCK_vmclear, MCK_Mem } },
- { X86::VMPTRLDm, Convert__Mem5_1, { MCK_vmptrld, MCK_Mem } },
- { X86::VMPTRSTm, Convert__Mem5_1, { MCK_vmptrst, MCK_Mem } },
- { X86::VMXON, Convert__Mem5_1, { MCK_vmxon, MCK_Mem } },
- { X86::ADC8rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_adcb, MCK_GR8, MCK_GR8 } },
- { X86::ADC8rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_adcb, MCK_GR8, MCK_GR8 } },
- { X86::ADC8mr, Convert__Mem5_2__Reg1_1, { MCK_adcb, MCK_GR8, MCK_Mem } },
- { X86::ADC8i8, Convert__Imm1_1, { MCK_adcb, MCK_Imm, MCK_AL } },
- { X86::ADC8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_adcb, MCK_Imm, MCK_GR8 } },
- { X86::ADC8mi, Convert__Mem5_2__Imm1_1, { MCK_adcb, MCK_Imm, MCK_Mem } },
- { X86::ADC8rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_adcb, MCK_Mem, MCK_GR8 } },
- { X86::ADC32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_adcl, MCK_GR32, MCK_GR32 } },
- { X86::ADC32rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_adcl, MCK_GR32, MCK_GR32 } },
- { X86::ADC32mr, Convert__Mem5_2__Reg1_1, { MCK_adcl, MCK_GR32, MCK_Mem } },
- { X86::ADC32ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_adcl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::ADC32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_adcl, MCK_ImmSExt8, MCK_Mem } },
- { X86::ADC32i32, Convert__Imm1_1, { MCK_adcl, MCK_Imm, MCK_EAX } },
- { X86::ADC32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_adcl, MCK_Imm, MCK_GR32 } },
- { X86::ADC32mi, Convert__Mem5_2__Imm1_1, { MCK_adcl, MCK_Imm, MCK_Mem } },
- { X86::ADC32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_adcl, MCK_Mem, MCK_GR32 } },
- { X86::ADC64rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_adcq, MCK_GR64, MCK_GR32 } },
- { X86::ADC64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_adcq, MCK_GR64, MCK_GR64 } },
- { X86::ADC64mr, Convert__Mem5_2__Reg1_1, { MCK_adcq, MCK_GR64, MCK_Mem } },
- { X86::ADC64ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_adcq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::ADC64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_adcq, MCK_ImmSExt8, MCK_Mem } },
- { X86::ADC64i32, Convert__Imm1_1, { MCK_adcq, MCK_Imm, MCK_RAX } },
- { X86::ADC64ri32, Convert__Reg1_2__Tie0__Imm1_1, { MCK_adcq, MCK_Imm, MCK_GR64 } },
- { X86::ADC64mi32, Convert__Mem5_2__Imm1_1, { MCK_adcq, MCK_Imm, MCK_Mem } },
- { X86::ADC64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_adcq, MCK_Mem, MCK_GR64 } },
- { X86::ADC16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_adcw, MCK_GR16, MCK_GR16 } },
- { X86::ADC16rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_adcw, MCK_GR16, MCK_GR16 } },
- { X86::ADC16mr, Convert__Mem5_2__Reg1_1, { MCK_adcw, MCK_GR16, MCK_Mem } },
- { X86::ADC16ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_adcw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::ADC16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_adcw, MCK_ImmSExt8, MCK_Mem } },
- { X86::ADC16i16, Convert__Imm1_1, { MCK_adcw, MCK_Imm, MCK_AX } },
- { X86::ADC16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_adcw, MCK_Imm, MCK_GR16 } },
- { X86::ADC16mi, Convert__Mem5_2__Imm1_1, { MCK_adcw, MCK_Imm, MCK_Mem } },
- { X86::ADC16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_adcw, MCK_Mem, MCK_GR16 } },
- { X86::ADD8mrmrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addb, MCK_GR8, MCK_GR8 } },
- { X86::ADD8rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addb, MCK_GR8, MCK_GR8 } },
- { X86::ADD8mr, Convert__Mem5_2__Reg1_1, { MCK_addb, MCK_GR8, MCK_Mem } },
- { X86::ADD8i8, Convert__Imm1_1, { MCK_addb, MCK_Imm, MCK_AL } },
- { X86::ADD8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_addb, MCK_Imm, MCK_GR8 } },
- { X86::ADD8mi, Convert__Mem5_2__Imm1_1, { MCK_addb, MCK_Imm, MCK_Mem } },
- { X86::ADD8rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addb, MCK_Mem, MCK_GR8 } },
- { X86::ADD32mrmrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addl, MCK_GR16, MCK_GR16 } },
- { X86::ADD32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addl, MCK_GR32, MCK_GR32 } },
- { X86::ADD32mr, Convert__Mem5_2__Reg1_1, { MCK_addl, MCK_GR32, MCK_Mem } },
- { X86::ADD64mrmrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addl, MCK_GR64, MCK_GR64 } },
- { X86::ADD32ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_addl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::ADD32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_addl, MCK_ImmSExt8, MCK_Mem } },
- { X86::ADD32i32, Convert__Imm1_1, { MCK_addl, MCK_Imm, MCK_EAX } },
- { X86::ADD32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_addl, MCK_Imm, MCK_GR32 } },
- { X86::ADD32mi, Convert__Mem5_2__Imm1_1, { MCK_addl, MCK_Imm, MCK_Mem } },
- { X86::ADD32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addl, MCK_Mem, MCK_GR32 } },
- { X86::ADDPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addpd, MCK_FR32, MCK_FR32 } },
- { X86::ADDPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addpd, MCK_Mem, MCK_FR32 } },
- { X86::ADDPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addps, MCK_FR32, MCK_FR32 } },
- { X86::ADDPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addps, MCK_Mem, MCK_FR32 } },
- { X86::ADD64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addq, MCK_GR64, MCK_GR64 } },
- { X86::ADD64mr, Convert__Mem5_2__Reg1_1, { MCK_addq, MCK_GR64, MCK_Mem } },
- { X86::ADD64ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_addq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::ADD64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_addq, MCK_ImmSExt8, MCK_Mem } },
- { X86::ADD64i32, Convert__Imm1_1, { MCK_addq, MCK_Imm, MCK_RAX } },
- { X86::ADD64ri32, Convert__Reg1_2__Tie0__Imm1_1, { MCK_addq, MCK_Imm, MCK_GR64 } },
- { X86::ADD64mi32, Convert__Mem5_2__Imm1_1, { MCK_addq, MCK_Imm, MCK_Mem } },
- { X86::ADD64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addq, MCK_Mem, MCK_GR64 } },
- { X86::ADDSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addsd, MCK_FR32, MCK_FR32 } },
- { X86::ADDSDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addsd, MCK_Mem, MCK_FR32 } },
- { X86::ADDSSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addss, MCK_FR32, MCK_FR32 } },
- { X86::ADDSSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addss, MCK_Mem, MCK_FR32 } },
- { X86::ADDSUBPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addsubpd, MCK_FR32, MCK_FR32 } },
- { X86::ADDSUBPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addsubpd, MCK_Mem, MCK_FR32 } },
- { X86::ADDSUBPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addsubps, MCK_FR32, MCK_FR32 } },
- { X86::ADDSUBPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addsubps, MCK_Mem, MCK_FR32 } },
- { X86::ADD16mrmrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addw, MCK_GR16, MCK_GR16 } },
- { X86::ADD16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_addw, MCK_GR16, MCK_GR16 } },
- { X86::ADD16mr, Convert__Mem5_2__Reg1_1, { MCK_addw, MCK_GR16, MCK_Mem } },
- { X86::ADD16ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_addw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::ADD16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_addw, MCK_ImmSExt8, MCK_Mem } },
- { X86::ADD16i16, Convert__Imm1_1, { MCK_addw, MCK_Imm, MCK_AX } },
- { X86::ADD16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_addw, MCK_Imm, MCK_GR16 } },
- { X86::ADD16mi, Convert__Mem5_2__Imm1_1, { MCK_addw, MCK_Imm, MCK_Mem } },
- { X86::ADD16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_addw, MCK_Mem, MCK_GR16 } },
- { X86::AND8rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andb, MCK_GR8, MCK_GR8 } },
- { X86::AND8rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andb, MCK_GR8, MCK_GR8 } },
- { X86::AND8mr, Convert__Mem5_2__Reg1_1, { MCK_andb, MCK_GR8, MCK_Mem } },
- { X86::AND8i8, Convert__Imm1_1, { MCK_andb, MCK_Imm, MCK_AL } },
- { X86::AND8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_andb, MCK_Imm, MCK_GR8 } },
- { X86::AND8mi, Convert__Mem5_2__Imm1_1, { MCK_andb, MCK_Imm, MCK_Mem } },
- { X86::AND8rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andb, MCK_Mem, MCK_GR8 } },
- { X86::AND32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andl, MCK_GR32, MCK_GR32 } },
- { X86::AND32rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andl, MCK_GR32, MCK_GR32 } },
- { X86::AND32mr, Convert__Mem5_2__Reg1_1, { MCK_andl, MCK_GR32, MCK_Mem } },
- { X86::AND32ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_andl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::AND32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_andl, MCK_ImmSExt8, MCK_Mem } },
- { X86::AND32i32, Convert__Imm1_1, { MCK_andl, MCK_Imm, MCK_EAX } },
- { X86::AND32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_andl, MCK_Imm, MCK_GR32 } },
- { X86::AND32mi, Convert__Mem5_2__Imm1_1, { MCK_andl, MCK_Imm, MCK_Mem } },
- { X86::AND32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andl, MCK_Mem, MCK_GR32 } },
- { X86::ANDNPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andnpd, MCK_FR32, MCK_FR32 } },
- { X86::FsANDNPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andnpd, MCK_FR32, MCK_FR32 } },
- { X86::ANDNPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andnpd, MCK_Mem, MCK_FR32 } },
- { X86::FsANDNPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andnpd, MCK_Mem, MCK_FR32 } },
- { X86::ANDNPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andnps, MCK_FR32, MCK_FR32 } },
- { X86::FsANDNPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andnps, MCK_FR32, MCK_FR32 } },
- { X86::ANDNPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andnps, MCK_Mem, MCK_FR32 } },
- { X86::FsANDNPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andnps, MCK_Mem, MCK_FR32 } },
- { X86::ANDPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andpd, MCK_FR32, MCK_FR32 } },
- { X86::FsANDPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andpd, MCK_FR32, MCK_FR32 } },
- { X86::ANDPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andpd, MCK_Mem, MCK_FR32 } },
- { X86::FsANDPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andpd, MCK_Mem, MCK_FR32 } },
- { X86::ANDPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andps, MCK_FR32, MCK_FR32 } },
- { X86::FsANDPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andps, MCK_FR32, MCK_FR32 } },
- { X86::ANDPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andps, MCK_Mem, MCK_FR32 } },
- { X86::FsANDPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andps, MCK_Mem, MCK_FR32 } },
- { X86::AND64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andq, MCK_GR64, MCK_GR64 } },
- { X86::AND64rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andq, MCK_GR64, MCK_GR64 } },
- { X86::AND64mr, Convert__Mem5_2__Reg1_1, { MCK_andq, MCK_GR64, MCK_Mem } },
- { X86::AND64ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_andq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::AND64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_andq, MCK_ImmSExt8, MCK_Mem } },
- { X86::AND64i32, Convert__Imm1_1, { MCK_andq, MCK_Imm, MCK_RAX } },
- { X86::AND64ri32, Convert__Reg1_2__Tie0__Imm1_1, { MCK_andq, MCK_Imm, MCK_GR64 } },
- { X86::AND64mi32, Convert__Mem5_2__Imm1_1, { MCK_andq, MCK_Imm, MCK_Mem } },
- { X86::AND64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andq, MCK_Mem, MCK_GR64 } },
- { X86::AND16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andw, MCK_GR16, MCK_GR16 } },
- { X86::AND16rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_andw, MCK_GR16, MCK_GR16 } },
- { X86::AND16mr, Convert__Mem5_2__Reg1_1, { MCK_andw, MCK_GR16, MCK_Mem } },
- { X86::AND16ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_andw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::AND16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_andw, MCK_ImmSExt8, MCK_Mem } },
- { X86::AND16i16, Convert__Imm1_1, { MCK_andw, MCK_Imm, MCK_AX } },
- { X86::AND16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_andw, MCK_Imm, MCK_GR16 } },
- { X86::AND16mi, Convert__Mem5_2__Imm1_1, { MCK_andw, MCK_Imm, MCK_Mem } },
- { X86::AND16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_andw, MCK_Mem, MCK_GR16 } },
- { X86::BSF32rr, Convert__Reg1_2__Reg1_1, { MCK_bsfl, MCK_GR32, MCK_GR32 } },
- { X86::BSF32rm, Convert__Reg1_2__Mem5_1, { MCK_bsfl, MCK_Mem, MCK_GR32 } },
- { X86::BSF64rr, Convert__Reg1_2__Reg1_1, { MCK_bsfq, MCK_GR64, MCK_GR64 } },
- { X86::BSF64rm, Convert__Reg1_2__Mem5_1, { MCK_bsfq, MCK_Mem, MCK_GR64 } },
- { X86::BSF16rr, Convert__Reg1_2__Reg1_1, { MCK_bsfw, MCK_GR16, MCK_GR16 } },
- { X86::BSF16rm, Convert__Reg1_2__Mem5_1, { MCK_bsfw, MCK_Mem, MCK_GR16 } },
- { X86::BSR32rr, Convert__Reg1_2__Reg1_1, { MCK_bsrl, MCK_GR32, MCK_GR32 } },
- { X86::BSR32rm, Convert__Reg1_2__Mem5_1, { MCK_bsrl, MCK_Mem, MCK_GR32 } },
- { X86::BSR64rr, Convert__Reg1_2__Reg1_1, { MCK_bsrq, MCK_GR64, MCK_GR64 } },
- { X86::BSR64rm, Convert__Reg1_2__Mem5_1, { MCK_bsrq, MCK_Mem, MCK_GR64 } },
- { X86::BSR16rr, Convert__Reg1_2__Reg1_1, { MCK_bsrw, MCK_GR16, MCK_GR16 } },
- { X86::BSR16rm, Convert__Reg1_2__Mem5_1, { MCK_bsrw, MCK_Mem, MCK_GR16 } },
- { X86::BTC32rr, Convert__Reg1_2__Reg1_1, { MCK_btcl, MCK_GR32, MCK_GR32 } },
- { X86::BTC32mr, Convert__Mem5_2__Reg1_1, { MCK_btcl, MCK_GR32, MCK_Mem } },
- { X86::BTC32ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btcl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::BTC32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btcl, MCK_ImmSExt8, MCK_Mem } },
- { X86::BTC64rr, Convert__Reg1_2__Reg1_1, { MCK_btcq, MCK_GR64, MCK_GR64 } },
- { X86::BTC64mr, Convert__Mem5_2__Reg1_1, { MCK_btcq, MCK_GR64, MCK_Mem } },
- { X86::BTC64ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btcq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::BTC64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btcq, MCK_ImmSExt8, MCK_Mem } },
- { X86::BTC16rr, Convert__Reg1_2__Reg1_1, { MCK_btcw, MCK_GR16, MCK_GR16 } },
- { X86::BTC16mr, Convert__Mem5_2__Reg1_1, { MCK_btcw, MCK_GR16, MCK_Mem } },
- { X86::BTC16ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btcw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::BTC16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btcw, MCK_ImmSExt8, MCK_Mem } },
- { X86::BT32rr, Convert__Reg1_2__Reg1_1, { MCK_btl, MCK_GR32, MCK_GR32 } },
- { X86::BT32mr, Convert__Mem5_2__Reg1_1, { MCK_btl, MCK_GR32, MCK_Mem } },
- { X86::BT32ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::BT32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btl, MCK_ImmSExt8, MCK_Mem } },
- { X86::BT64rr, Convert__Reg1_2__Reg1_1, { MCK_btq, MCK_GR64, MCK_GR64 } },
- { X86::BT64mr, Convert__Mem5_2__Reg1_1, { MCK_btq, MCK_GR64, MCK_Mem } },
- { X86::BT64ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::BT64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btq, MCK_ImmSExt8, MCK_Mem } },
- { X86::BTR32rr, Convert__Reg1_2__Reg1_1, { MCK_btrl, MCK_GR32, MCK_GR32 } },
- { X86::BTR32mr, Convert__Mem5_2__Reg1_1, { MCK_btrl, MCK_GR32, MCK_Mem } },
- { X86::BTR32ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btrl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::BTR32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btrl, MCK_ImmSExt8, MCK_Mem } },
- { X86::BTR64rr, Convert__Reg1_2__Reg1_1, { MCK_btrq, MCK_GR64, MCK_GR64 } },
- { X86::BTR64mr, Convert__Mem5_2__Reg1_1, { MCK_btrq, MCK_GR64, MCK_Mem } },
- { X86::BTR64ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btrq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::BTR64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btrq, MCK_ImmSExt8, MCK_Mem } },
- { X86::BTR16rr, Convert__Reg1_2__Reg1_1, { MCK_btrw, MCK_GR16, MCK_GR16 } },
- { X86::BTR16mr, Convert__Mem5_2__Reg1_1, { MCK_btrw, MCK_GR16, MCK_Mem } },
- { X86::BTR16ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btrw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::BTR16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btrw, MCK_ImmSExt8, MCK_Mem } },
- { X86::BTS32rr, Convert__Reg1_2__Reg1_1, { MCK_btsl, MCK_GR32, MCK_GR32 } },
- { X86::BTS32mr, Convert__Mem5_2__Reg1_1, { MCK_btsl, MCK_GR32, MCK_Mem } },
- { X86::BTS32ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btsl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::BTS32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btsl, MCK_ImmSExt8, MCK_Mem } },
- { X86::BTS64rr, Convert__Reg1_2__Reg1_1, { MCK_btsq, MCK_GR64, MCK_GR64 } },
- { X86::BTS64mr, Convert__Mem5_2__Reg1_1, { MCK_btsq, MCK_GR64, MCK_Mem } },
- { X86::BTS64ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btsq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::BTS64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btsq, MCK_ImmSExt8, MCK_Mem } },
- { X86::BTS16rr, Convert__Reg1_2__Reg1_1, { MCK_btsw, MCK_GR16, MCK_GR16 } },
- { X86::BTS16mr, Convert__Mem5_2__Reg1_1, { MCK_btsw, MCK_GR16, MCK_Mem } },
- { X86::BTS16ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btsw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::BTS16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btsw, MCK_ImmSExt8, MCK_Mem } },
- { X86::BT16rr, Convert__Reg1_2__Reg1_1, { MCK_btw, MCK_GR16, MCK_GR16 } },
- { X86::BT16mr, Convert__Mem5_2__Reg1_1, { MCK_btw, MCK_GR16, MCK_Mem } },
- { X86::BT16ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_btw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::BT16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_btw, MCK_ImmSExt8, MCK_Mem } },
- { X86::CALL32r, Convert__Reg1_2, { MCK_call, MCK__STAR_, MCK_GR32 } },
- { X86::WINCALL64r, Convert__Reg1_2, { MCK_call, MCK__STAR_, MCK_GR64 } },
- { X86::CALL32m, Convert__Mem5_2, { MCK_call, MCK__STAR_, MCK_Mem } },
- { X86::WINCALL64m, Convert__Mem5_2, { MCK_call, MCK__STAR_, MCK_Mem } },
- { X86::CALL64r, Convert__Reg1_2, { MCK_callq, MCK__STAR_, MCK_GR64 } },
- { X86::CALL64m, Convert__Mem5_2, { MCK_callq, MCK__STAR_, MCK_Mem } },
- { X86::CMOVAE32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovael, MCK_GR32, MCK_GR32 } },
- { X86::CMOVAE32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovael, MCK_Mem, MCK_GR32 } },
- { X86::CMOVAE64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovaeq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVAE64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovaeq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVAE16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovaew, MCK_GR16, MCK_GR16 } },
- { X86::CMOVAE16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovaew, MCK_Mem, MCK_GR16 } },
- { X86::CMOVA32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmoval, MCK_GR32, MCK_GR32 } },
- { X86::CMOVA32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmoval, MCK_Mem, MCK_GR32 } },
- { X86::CMOVA64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovaq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVA64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovaq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVA16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovaw, MCK_GR16, MCK_GR16 } },
- { X86::CMOVA16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovaw, MCK_Mem, MCK_GR16 } },
- { X86::CMOVBE32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovbel, MCK_GR32, MCK_GR32 } },
- { X86::CMOVBE32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovbel, MCK_Mem, MCK_GR32 } },
- { X86::CMOVBE64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovbeq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVBE64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovbeq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVBE16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovbew, MCK_GR16, MCK_GR16 } },
- { X86::CMOVBE16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovbew, MCK_Mem, MCK_GR16 } },
- { X86::CMOVB32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovbl, MCK_GR32, MCK_GR32 } },
- { X86::CMOVB32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovbl, MCK_Mem, MCK_GR32 } },
- { X86::CMOVB64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovbq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVB64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovbq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVB16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovbw, MCK_GR16, MCK_GR16 } },
- { X86::CMOVB16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovbw, MCK_Mem, MCK_GR16 } },
- { X86::CMOVE32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovel, MCK_GR32, MCK_GR32 } },
- { X86::CMOVE32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovel, MCK_Mem, MCK_GR32 } },
- { X86::CMOVE64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmoveq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVE64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmoveq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVE16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovew, MCK_GR16, MCK_GR16 } },
- { X86::CMOVE16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovew, MCK_Mem, MCK_GR16 } },
- { X86::CMOVGE32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovgel, MCK_GR32, MCK_GR32 } },
- { X86::CMOVGE32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovgel, MCK_Mem, MCK_GR32 } },
- { X86::CMOVGE64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovgeq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVGE64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovgeq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVGE16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovgew, MCK_GR16, MCK_GR16 } },
- { X86::CMOVGE16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovgew, MCK_Mem, MCK_GR16 } },
- { X86::CMOVG32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovgl, MCK_GR32, MCK_GR32 } },
- { X86::CMOVG32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovgl, MCK_Mem, MCK_GR32 } },
- { X86::CMOVG64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovgq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVG64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovgq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVG16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovgw, MCK_GR16, MCK_GR16 } },
- { X86::CMOVG16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovgw, MCK_Mem, MCK_GR16 } },
- { X86::CMOVLE32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovlel, MCK_GR32, MCK_GR32 } },
- { X86::CMOVLE32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovlel, MCK_Mem, MCK_GR32 } },
- { X86::CMOVLE64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovleq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVLE64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovleq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVLE16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovlew, MCK_GR16, MCK_GR16 } },
- { X86::CMOVLE16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovlew, MCK_Mem, MCK_GR16 } },
- { X86::CMOVL32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovll, MCK_GR32, MCK_GR32 } },
- { X86::CMOVL32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovll, MCK_Mem, MCK_GR32 } },
- { X86::CMOVL64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovlq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVL64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovlq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVL16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovlw, MCK_GR16, MCK_GR16 } },
- { X86::CMOVL16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovlw, MCK_Mem, MCK_GR16 } },
- { X86::CMOVNE32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnel, MCK_GR32, MCK_GR32 } },
- { X86::CMOVNE32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnel, MCK_Mem, MCK_GR32 } },
- { X86::CMOVNE64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovneq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVNE64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovneq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVNE16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnew, MCK_GR16, MCK_GR16 } },
- { X86::CMOVNE16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnew, MCK_Mem, MCK_GR16 } },
- { X86::CMOVNO32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnol, MCK_GR32, MCK_GR32 } },
- { X86::CMOVNO32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnol, MCK_Mem, MCK_GR32 } },
- { X86::CMOVNO64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnoq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVNO64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnoq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVNO16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnow, MCK_GR16, MCK_GR16 } },
- { X86::CMOVNO16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnow, MCK_Mem, MCK_GR16 } },
- { X86::CMOVNP32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnpl, MCK_GR32, MCK_GR32 } },
- { X86::CMOVNP32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnpl, MCK_Mem, MCK_GR32 } },
- { X86::CMOVNP64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnpq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVNP64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnpq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVNP16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnpw, MCK_GR16, MCK_GR16 } },
- { X86::CMOVNP16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnpw, MCK_Mem, MCK_GR16 } },
- { X86::CMOVNS32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnsl, MCK_GR32, MCK_GR32 } },
- { X86::CMOVNS32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnsl, MCK_Mem, MCK_GR32 } },
- { X86::CMOVNS64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnsq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVNS64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnsq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVNS16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovnsw, MCK_GR16, MCK_GR16 } },
- { X86::CMOVNS16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovnsw, MCK_Mem, MCK_GR16 } },
- { X86::CMOVO32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovol, MCK_GR32, MCK_GR32 } },
- { X86::CMOVO32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovol, MCK_Mem, MCK_GR32 } },
- { X86::CMOVO64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovoq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVO64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovoq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVO16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovow, MCK_GR16, MCK_GR16 } },
- { X86::CMOVO16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovow, MCK_Mem, MCK_GR16 } },
- { X86::CMOVP32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovpl, MCK_GR32, MCK_GR32 } },
- { X86::CMOVP32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovpl, MCK_Mem, MCK_GR32 } },
- { X86::CMOVP64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovpq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVP64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovpq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVP16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovpw, MCK_GR16, MCK_GR16 } },
- { X86::CMOVP16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovpw, MCK_Mem, MCK_GR16 } },
- { X86::CMOVS32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovsl, MCK_GR32, MCK_GR32 } },
- { X86::CMOVS32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovsl, MCK_Mem, MCK_GR32 } },
- { X86::CMOVS64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovsq, MCK_GR64, MCK_GR64 } },
- { X86::CMOVS64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovsq, MCK_Mem, MCK_GR64 } },
- { X86::CMOVS16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_cmovsw, MCK_GR16, MCK_GR16 } },
- { X86::CMOVS16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_cmovsw, MCK_Mem, MCK_GR16 } },
- { X86::CMP8mrmrr, Convert__Reg1_2__Reg1_1, { MCK_cmpb, MCK_GR8, MCK_GR8 } },
- { X86::CMP8rr, Convert__Reg1_2__Reg1_1, { MCK_cmpb, MCK_GR8, MCK_GR8 } },
- { X86::CMP8mr, Convert__Mem5_2__Reg1_1, { MCK_cmpb, MCK_GR8, MCK_Mem } },
- { X86::CMP8i8, Convert__Imm1_1, { MCK_cmpb, MCK_Imm, MCK_AL } },
- { X86::CMP8ri, Convert__Reg1_2__Imm1_1, { MCK_cmpb, MCK_Imm, MCK_GR8 } },
- { X86::CMP8mi, Convert__Mem5_2__Imm1_1, { MCK_cmpb, MCK_Imm, MCK_Mem } },
- { X86::CMP8rm, Convert__Reg1_2__Mem5_1, { MCK_cmpb, MCK_Mem, MCK_GR8 } },
- { X86::CMP32mrmrr, Convert__Reg1_2__Reg1_1, { MCK_cmpl, MCK_GR32, MCK_GR32 } },
- { X86::CMP32rr, Convert__Reg1_2__Reg1_1, { MCK_cmpl, MCK_GR32, MCK_GR32 } },
- { X86::CMP32mr, Convert__Mem5_2__Reg1_1, { MCK_cmpl, MCK_GR32, MCK_Mem } },
- { X86::CMP32ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_cmpl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::CMP32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_cmpl, MCK_ImmSExt8, MCK_Mem } },
- { X86::CMP32i32, Convert__Imm1_1, { MCK_cmpl, MCK_Imm, MCK_EAX } },
- { X86::CMP32ri, Convert__Reg1_2__Imm1_1, { MCK_cmpl, MCK_Imm, MCK_GR32 } },
- { X86::CMP32mi, Convert__Mem5_2__Imm1_1, { MCK_cmpl, MCK_Imm, MCK_Mem } },
- { X86::CMP32rm, Convert__Reg1_2__Mem5_1, { MCK_cmpl, MCK_Mem, MCK_GR32 } },
- { X86::CMP64mrmrr, Convert__Reg1_2__Reg1_1, { MCK_cmpq, MCK_GR64, MCK_GR64 } },
- { X86::CMP64rr, Convert__Reg1_2__Reg1_1, { MCK_cmpq, MCK_GR64, MCK_GR64 } },
- { X86::CMP64mr, Convert__Mem5_2__Reg1_1, { MCK_cmpq, MCK_GR64, MCK_Mem } },
- { X86::CMP64ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_cmpq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::CMP64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_cmpq, MCK_ImmSExt8, MCK_Mem } },
- { X86::CMP64i32, Convert__Imm1_1, { MCK_cmpq, MCK_Imm, MCK_RAX } },
- { X86::CMP64ri32, Convert__Reg1_2__Imm1_1, { MCK_cmpq, MCK_Imm, MCK_GR64 } },
- { X86::CMP64mi32, Convert__Mem5_2__Imm1_1, { MCK_cmpq, MCK_Imm, MCK_Mem } },
- { X86::CMP64rm, Convert__Reg1_2__Mem5_1, { MCK_cmpq, MCK_Mem, MCK_GR64 } },
- { X86::CMP16mrmrr, Convert__Reg1_2__Reg1_1, { MCK_cmpw, MCK_GR16, MCK_GR16 } },
- { X86::CMP16rr, Convert__Reg1_2__Reg1_1, { MCK_cmpw, MCK_GR16, MCK_GR16 } },
- { X86::CMP16mr, Convert__Mem5_2__Reg1_1, { MCK_cmpw, MCK_GR16, MCK_Mem } },
- { X86::CMP16ri8, Convert__Reg1_2__ImmSExt81_1, { MCK_cmpw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::CMP16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_cmpw, MCK_ImmSExt8, MCK_Mem } },
- { X86::CMP16i16, Convert__Imm1_1, { MCK_cmpw, MCK_Imm, MCK_AX } },
- { X86::CMP16ri, Convert__Reg1_2__Imm1_1, { MCK_cmpw, MCK_Imm, MCK_GR16 } },
- { X86::CMP16mi, Convert__Mem5_2__Imm1_1, { MCK_cmpw, MCK_Imm, MCK_Mem } },
- { X86::CMP16rm, Convert__Reg1_2__Mem5_1, { MCK_cmpw, MCK_Mem, MCK_GR16 } },
- { X86::CMPXCHG8rr, Convert__Reg1_2__Reg1_1, { MCK_cmpxchgb, MCK_GR8, MCK_GR8 } },
- { X86::CMPXCHG8rm, Convert__Mem5_2__Reg1_1, { MCK_cmpxchgb, MCK_GR8, MCK_Mem } },
- { X86::CMPXCHG32rr, Convert__Reg1_2__Reg1_1, { MCK_cmpxchgl, MCK_GR32, MCK_GR32 } },
- { X86::CMPXCHG32rm, Convert__Mem5_2__Reg1_1, { MCK_cmpxchgl, MCK_GR32, MCK_Mem } },
- { X86::CMPXCHG64rr, Convert__Reg1_2__Reg1_1, { MCK_cmpxchgq, MCK_GR64, MCK_GR64 } },
- { X86::CMPXCHG64rm, Convert__Mem5_2__Reg1_1, { MCK_cmpxchgq, MCK_GR64, MCK_Mem } },
- { X86::CMPXCHG16rr, Convert__Reg1_2__Reg1_1, { MCK_cmpxchgw, MCK_GR16, MCK_GR16 } },
- { X86::CMPXCHG16rm, Convert__Mem5_2__Reg1_1, { MCK_cmpxchgw, MCK_GR16, MCK_Mem } },
- { X86::COMISDrr, Convert__Reg1_2__Reg1_1, { MCK_comisd, MCK_FR32, MCK_FR32 } },
- { X86::COMISDrm, Convert__Reg1_2__Mem5_1, { MCK_comisd, MCK_Mem, MCK_FR32 } },
- { X86::COMISSrr, Convert__Reg1_2__Reg1_1, { MCK_comiss, MCK_FR32, MCK_FR32 } },
- { X86::COMISSrm, Convert__Reg1_2__Mem5_1, { MCK_comiss, MCK_Mem, MCK_FR32 } },
- { X86::CRC32r8, Convert__Reg1_2__Tie0__Reg1_1, { MCK_crc32, MCK_GR8, MCK_GR32 } },
- { X86::CRC32r16, Convert__Reg1_2__Tie0__Reg1_1, { MCK_crc32, MCK_GR16, MCK_GR32 } },
- { X86::CRC32r32, Convert__Reg1_2__Tie0__Reg1_1, { MCK_crc32, MCK_GR32, MCK_GR32 } },
- { X86::CRC64r64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_crc32, MCK_GR64, MCK_GR64 } },
- { X86::CRC32m16, Convert__Reg1_2__Tie0__Mem5_1, { MCK_crc32, MCK_Mem, MCK_GR32 } },
- { X86::CRC32m32, Convert__Reg1_2__Tie0__Mem5_1, { MCK_crc32, MCK_Mem, MCK_GR32 } },
- { X86::CRC32m8, Convert__Reg1_2__Tie0__Mem5_1, { MCK_crc32, MCK_Mem, MCK_GR32 } },
- { X86::CRC64m64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_crc32, MCK_Mem, MCK_GR64 } },
- { X86::CVTDQ2PDrr, Convert__Reg1_2__Reg1_1, { MCK_cvtdq2pd, MCK_FR32, MCK_FR32 } },
- { X86::CVTDQ2PDrm, Convert__Reg1_2__Mem5_1, { MCK_cvtdq2pd, MCK_Mem, MCK_FR32 } },
- { X86::CVTDQ2PSrr, Convert__Reg1_2__Reg1_1, { MCK_cvtdq2ps, MCK_FR32, MCK_FR32 } },
- { X86::CVTDQ2PSrm, Convert__Reg1_2__Mem5_1, { MCK_cvtdq2ps, MCK_Mem, MCK_FR32 } },
- { X86::CVTPD2DQrr, Convert__Reg1_2__Reg1_1, { MCK_cvtpd2dq, MCK_FR32, MCK_FR32 } },
- { X86::CVTPD2DQrm, Convert__Reg1_2__Mem5_1, { MCK_cvtpd2dq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_CVTPD2PIrr, Convert__Reg1_2__Reg1_1, { MCK_cvtpd2pi, MCK_FR32, MCK_VR64 } },
- { X86::MMX_CVTPD2PIrm, Convert__Reg1_2__Mem5_1, { MCK_cvtpd2pi, MCK_Mem, MCK_VR64 } },
- { X86::CVTPD2PSrr, Convert__Reg1_2__Reg1_1, { MCK_cvtpd2ps, MCK_FR32, MCK_FR32 } },
- { X86::CVTPD2PSrm, Convert__Reg1_2__Mem5_1, { MCK_cvtpd2ps, MCK_Mem, MCK_FR32 } },
- { X86::MMX_CVTPI2PDrr, Convert__Reg1_2__Reg1_1, { MCK_cvtpi2pd, MCK_VR64, MCK_FR32 } },
- { X86::MMX_CVTPI2PDrm, Convert__Reg1_2__Mem5_1, { MCK_cvtpi2pd, MCK_Mem, MCK_FR32 } },
- { X86::MMX_CVTPI2PSrr, Convert__Reg1_2__Reg1_1, { MCK_cvtpi2ps, MCK_VR64, MCK_FR32 } },
- { X86::MMX_CVTPI2PSrm, Convert__Reg1_2__Mem5_1, { MCK_cvtpi2ps, MCK_Mem, MCK_FR32 } },
- { X86::CVTPS2DQrr, Convert__Reg1_2__Reg1_1, { MCK_cvtps2dq, MCK_FR32, MCK_FR32 } },
- { X86::CVTPS2DQrm, Convert__Reg1_2__Mem5_1, { MCK_cvtps2dq, MCK_Mem, MCK_FR32 } },
- { X86::CVTPS2PDrr, Convert__Reg1_2__Reg1_1, { MCK_cvtps2pd, MCK_FR32, MCK_FR32 } },
- { X86::CVTPS2PDrm, Convert__Reg1_2__Mem5_1, { MCK_cvtps2pd, MCK_Mem, MCK_FR32 } },
- { X86::MMX_CVTPS2PIrr, Convert__Reg1_2__Reg1_1, { MCK_cvtps2pi, MCK_FR32, MCK_VR64 } },
- { X86::MMX_CVTPS2PIrm, Convert__Reg1_2__Mem5_1, { MCK_cvtps2pi, MCK_Mem, MCK_VR64 } },
- { X86::CVTSD2SI64rr, Convert__Reg1_2__Reg1_1, { MCK_cvtsd2siq, MCK_FR32, MCK_GR64 } },
- { X86::CVTSD2SI64rm, Convert__Reg1_2__Mem5_1, { MCK_cvtsd2siq, MCK_Mem, MCK_GR64 } },
- { X86::CVTSD2SSrr, Convert__Reg1_2__Reg1_1, { MCK_cvtsd2ss, MCK_FR32, MCK_FR32 } },
- { X86::CVTSD2SSrm, Convert__Reg1_2__Mem5_1, { MCK_cvtsd2ss, MCK_Mem, MCK_FR32 } },
- { X86::CVTSI2SDrr, Convert__Reg1_2__Reg1_1, { MCK_cvtsi2sd, MCK_GR32, MCK_FR32 } },
- { X86::CVTSI2SDrm, Convert__Reg1_2__Mem5_1, { MCK_cvtsi2sd, MCK_Mem, MCK_FR32 } },
- { X86::CVTSI2SD64rr, Convert__Reg1_2__Reg1_1, { MCK_cvtsi2sdq, MCK_GR64, MCK_FR32 } },
- { X86::CVTSI2SD64rm, Convert__Reg1_2__Mem5_1, { MCK_cvtsi2sdq, MCK_Mem, MCK_FR32 } },
- { X86::CVTSI2SSrr, Convert__Reg1_2__Reg1_1, { MCK_cvtsi2ss, MCK_GR32, MCK_FR32 } },
- { X86::CVTSI2SSrm, Convert__Reg1_2__Mem5_1, { MCK_cvtsi2ss, MCK_Mem, MCK_FR32 } },
- { X86::CVTSI2SS64rr, Convert__Reg1_2__Reg1_1, { MCK_cvtsi2ssq, MCK_GR64, MCK_FR32 } },
- { X86::CVTSI2SS64rm, Convert__Reg1_2__Mem5_1, { MCK_cvtsi2ssq, MCK_Mem, MCK_FR32 } },
- { X86::CVTSS2SDrr, Convert__Reg1_2__Reg1_1, { MCK_cvtss2sd, MCK_FR32, MCK_FR32 } },
- { X86::CVTSS2SDrm, Convert__Reg1_2__Mem5_1, { MCK_cvtss2sd, MCK_Mem, MCK_FR32 } },
- { X86::CVTSS2SIrr, Convert__Reg1_2__Reg1_1, { MCK_cvtss2sil, MCK_FR32, MCK_GR32 } },
- { X86::CVTSS2SIrm, Convert__Reg1_2__Mem5_1, { MCK_cvtss2sil, MCK_Mem, MCK_GR32 } },
- { X86::CVTSS2SI64rr, Convert__Reg1_2__Reg1_1, { MCK_cvtss2siq, MCK_FR32, MCK_GR64 } },
- { X86::CVTSS2SI64rm, Convert__Reg1_2__Mem5_1, { MCK_cvtss2siq, MCK_Mem, MCK_GR64 } },
- { X86::MMX_CVTTPD2PIrr, Convert__Reg1_2__Reg1_1, { MCK_cvttpd2pi, MCK_FR32, MCK_VR64 } },
- { X86::MMX_CVTTPD2PIrm, Convert__Reg1_2__Mem5_1, { MCK_cvttpd2pi, MCK_Mem, MCK_VR64 } },
- { X86::CVTTPS2DQrr, Convert__Reg1_2__Reg1_1, { MCK_cvttps2dq, MCK_FR32, MCK_FR32 } },
- { X86::CVTTPS2DQrm, Convert__Reg1_2__Mem5_1, { MCK_cvttps2dq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_CVTTPS2PIrr, Convert__Reg1_2__Reg1_1, { MCK_cvttps2pi, MCK_FR32, MCK_VR64 } },
- { X86::MMX_CVTTPS2PIrm, Convert__Reg1_2__Mem5_1, { MCK_cvttps2pi, MCK_Mem, MCK_VR64 } },
- { X86::CVTTSD2SIrr, Convert__Reg1_2__Reg1_1, { MCK_cvttsd2si, MCK_FR32, MCK_GR32 } },
- { X86::CVTTSD2SIrm, Convert__Reg1_2__Mem5_1, { MCK_cvttsd2si, MCK_Mem, MCK_GR32 } },
- { X86::CVTTSD2SI64rr, Convert__Reg1_2__Reg1_1, { MCK_cvttsd2siq, MCK_FR32, MCK_GR64 } },
- { X86::CVTTSD2SI64rm, Convert__Reg1_2__Mem5_1, { MCK_cvttsd2siq, MCK_Mem, MCK_GR64 } },
- { X86::CVTTSS2SIrr, Convert__Reg1_2__Reg1_1, { MCK_cvttss2si, MCK_FR32, MCK_GR32 } },
- { X86::CVTTSS2SIrm, Convert__Reg1_2__Mem5_1, { MCK_cvttss2si, MCK_Mem, MCK_GR32 } },
- { X86::CVTTSS2SI64rr, Convert__Reg1_2__Reg1_1, { MCK_cvttss2siq, MCK_FR32, MCK_GR64 } },
- { X86::CVTTSS2SI64rm, Convert__Reg1_2__Mem5_1, { MCK_cvttss2siq, MCK_Mem, MCK_GR64 } },
- { X86::DIVPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_divpd, MCK_FR32, MCK_FR32 } },
- { X86::DIVPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_divpd, MCK_Mem, MCK_FR32 } },
- { X86::DIVPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_divps, MCK_FR32, MCK_FR32 } },
- { X86::DIVPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_divps, MCK_Mem, MCK_FR32 } },
- { X86::DIVSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_divsd, MCK_FR32, MCK_FR32 } },
- { X86::DIVSDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_divsd, MCK_Mem, MCK_FR32 } },
- { X86::DIVSSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_divss, MCK_FR32, MCK_FR32 } },
- { X86::DIVSSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_divss, MCK_Mem, MCK_FR32 } },
- { X86::ENTER, Convert__Imm1_1__Imm1_2, { MCK_enter, MCK_Imm, MCK_Imm } },
- { X86::ADD_FrST0, Convert__Reg1_2, { MCK_fadd, MCK_ST0, MCK_RST } },
- { X86::CMOVB_F, Convert__Reg1_1, { MCK_fcmovb, MCK_RST, MCK_ST0 } },
- { X86::CMOVBE_F, Convert__Reg1_1, { MCK_fcmovbe, MCK_RST, MCK_ST0 } },
- { X86::CMOVE_F, Convert__Reg1_1, { MCK_fcmove, MCK_RST, MCK_ST0 } },
- { X86::CMOVNB_F, Convert__Reg1_1, { MCK_fcmovnb, MCK_RST, MCK_ST0 } },
- { X86::CMOVNBE_F, Convert__Reg1_1, { MCK_fcmovnbe, MCK_RST, MCK_ST0 } },
- { X86::CMOVNE_F, Convert__Reg1_1, { MCK_fcmovne, MCK_RST, MCK_ST0 } },
- { X86::CMOVNP_F, Convert__Reg1_1, { MCK_fcmovnu, MCK_RST, MCK_ST0 } },
- { X86::CMOVP_F, Convert__Reg1_1, { MCK_fcmovu, MCK_RST, MCK_ST0 } },
- { X86::COM_FIr, Convert__Reg1_1, { MCK_fcomi, MCK_RST, MCK_ST0 } },
- { X86::COM_FIPr, Convert__Reg1_1, { MCK_fcomip, MCK_RST, MCK_ST0 } },
- { X86::DIVR_FrST0, Convert__Reg1_2, { MCK_fdiv, MCK_ST0, MCK_RST } },
- { X86::DIV_FrST0, Convert__Reg1_2, { MCK_fdivr, MCK_ST0, MCK_RST } },
- { X86::MUL_FrST0, Convert__Reg1_2, { MCK_fmul, MCK_ST0, MCK_RST } },
- { X86::SUBR_FrST0, Convert__Reg1_2, { MCK_fsub, MCK_ST0, MCK_RST } },
- { X86::SUB_FrST0, Convert__Reg1_2, { MCK_fsubr, MCK_ST0, MCK_RST } },
- { X86::UCOM_FIr, Convert__Reg1_1, { MCK_fucomi, MCK_RST, MCK_ST0 } },
- { X86::UCOM_FIPr, Convert__Reg1_1, { MCK_fucomip, MCK_RST, MCK_ST0 } },
- { X86::HADDPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_haddpd, MCK_FR32, MCK_FR32 } },
- { X86::HADDPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_haddpd, MCK_Mem, MCK_FR32 } },
- { X86::HADDPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_haddps, MCK_FR32, MCK_FR32 } },
- { X86::HADDPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_haddps, MCK_Mem, MCK_FR32 } },
- { X86::HSUBPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_hsubpd, MCK_FR32, MCK_FR32 } },
- { X86::HSUBPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_hsubpd, MCK_Mem, MCK_FR32 } },
- { X86::HSUBPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_hsubps, MCK_FR32, MCK_FR32 } },
- { X86::HSUBPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_hsubps, MCK_Mem, MCK_FR32 } },
- { X86::IMUL32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_imull, MCK_GR32, MCK_GR32 } },
- { X86::IMUL32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_imull, MCK_Mem, MCK_GR32 } },
- { X86::IMUL64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_imulq, MCK_GR64, MCK_GR64 } },
- { X86::IMUL64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_imulq, MCK_Mem, MCK_GR64 } },
- { X86::IMUL16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_imulw, MCK_GR16, MCK_GR16 } },
- { X86::IMUL16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_imulw, MCK_Mem, MCK_GR16 } },
- { X86::IN8rr, Convert, { MCK_inb, MCK_DX, MCK_AL } },
- { X86::IN8ri, Convert__ImmSExt81_1, { MCK_inb, MCK_ImmSExt8, MCK_AL } },
- { X86::IN32rr, Convert, { MCK_inl, MCK_DX, MCK_EAX } },
- { X86::IN32ri, Convert__ImmSExt81_1, { MCK_inl, MCK_ImmSExt8, MCK_EAX } },
- { X86::IN16rr, Convert, { MCK_inw, MCK_DX, MCK_AX } },
- { X86::IN16ri, Convert__ImmSExt81_1, { MCK_inw, MCK_ImmSExt8, MCK_AX } },
- { X86::TAILJMPm, Convert__Mem5_2, { MCK_jmp, MCK__STAR_, MCK_Mem } },
- { X86::JMP32r, Convert__Reg1_2, { MCK_jmpl, MCK__STAR_, MCK_GR32 } },
- { X86::TAILJMPr, Convert__Reg1_2, { MCK_jmpl, MCK__STAR_, MCK_GR32 } },
- { X86::JMP32m, Convert__Mem5_2, { MCK_jmpl, MCK__STAR_, MCK_Mem } },
- { X86::JMP64r, Convert__Reg1_2, { MCK_jmpq, MCK__STAR_, MCK_GR64 } },
- { X86::TAILJMPr64, Convert__Reg1_2, { MCK_jmpq, MCK__STAR_, MCK_GR64 } },
- { X86::JMP64m, Convert__Mem5_2, { MCK_jmpq, MCK__STAR_, MCK_Mem } },
- { X86::LAR32rr, Convert__Reg1_2__Reg1_1, { MCK_larl, MCK_GR32, MCK_GR32 } },
- { X86::LAR32rm, Convert__Reg1_2__Mem5_1, { MCK_larl, MCK_Mem, MCK_GR32 } },
- { X86::LAR64rr, Convert__Reg1_2__Reg1_1, { MCK_larq, MCK_GR32, MCK_GR64 } },
- { X86::LAR64rm, Convert__Reg1_2__Mem5_1, { MCK_larq, MCK_Mem, MCK_GR64 } },
- { X86::LAR16rr, Convert__Reg1_2__Reg1_1, { MCK_larw, MCK_GR16, MCK_GR16 } },
- { X86::LAR16rm, Convert__Reg1_2__Mem5_1, { MCK_larw, MCK_Mem, MCK_GR16 } },
- { X86::FARCALL32m, Convert__Mem5_2, { MCK_lcalll, MCK__STAR_, MCK_Mem } },
- { X86::FARCALL32i, Convert__Imm1_1__Imm1_2, { MCK_lcalll, MCK_Imm, MCK_Imm } },
- { X86::FARCALL64, Convert__Mem5_2, { MCK_lcallq, MCK__STAR_, MCK_Mem } },
- { X86::FARCALL16m, Convert__Mem5_2, { MCK_lcallw, MCK__STAR_, MCK_Mem } },
- { X86::FARCALL16i, Convert__Imm1_1__Imm1_2, { MCK_lcallw, MCK_Imm, MCK_Imm } },
- { X86::LDDQUrm, Convert__Reg1_2__Mem5_1, { MCK_lddqu, MCK_Mem, MCK_FR32 } },
- { X86::LDS32rm, Convert__Reg1_2__Mem5_1, { MCK_ldsl, MCK_Mem, MCK_GR32 } },
- { X86::LDS16rm, Convert__Reg1_2__Mem5_1, { MCK_ldsw, MCK_Mem, MCK_GR16 } },
- { X86::LEA32r, Convert__Reg1_2__NoSegMem4_1, { MCK_leal, MCK_NoSegMem, MCK_GR32 } },
- { X86::LEA64_32r, Convert__Reg1_2__Mem4_1, { MCK_leal, MCK_Mem, MCK_GR32 } },
- { X86::LEA64r, Convert__Reg1_2__Mem4_1, { MCK_leaq, MCK_Mem, MCK_GR64 } },
- { X86::LEA16r, Convert__Reg1_2__NoSegMem4_1, { MCK_leaw, MCK_NoSegMem, MCK_GR16 } },
- { X86::LES32rm, Convert__Reg1_2__Mem5_1, { MCK_lesl, MCK_Mem, MCK_GR32 } },
- { X86::LES16rm, Convert__Reg1_2__Mem5_1, { MCK_lesw, MCK_Mem, MCK_GR16 } },
- { X86::LFS32rm, Convert__Reg1_2__Mem5_1, { MCK_lfsl, MCK_Mem, MCK_GR32 } },
- { X86::LFS64rm, Convert__Reg1_2__Mem5_1, { MCK_lfsq, MCK_Mem, MCK_GR64 } },
- { X86::LFS16rm, Convert__Reg1_2__Mem5_1, { MCK_lfsw, MCK_Mem, MCK_GR16 } },
- { X86::LGS32rm, Convert__Reg1_2__Mem5_1, { MCK_lgsl, MCK_Mem, MCK_GR32 } },
- { X86::LGS64rm, Convert__Reg1_2__Mem5_1, { MCK_lgsq, MCK_Mem, MCK_GR64 } },
- { X86::LGS16rm, Convert__Reg1_2__Mem5_1, { MCK_lgsw, MCK_Mem, MCK_GR16 } },
- { X86::FARJMP32m, Convert__Mem5_2, { MCK_ljmpl, MCK__STAR_, MCK_Mem } },
- { X86::FARJMP32i, Convert__Imm1_1__Imm1_2, { MCK_ljmpl, MCK_Imm, MCK_Imm } },
- { X86::FARJMP64, Convert__Mem5_2, { MCK_ljmpq, MCK__STAR_, MCK_Mem } },
- { X86::FARJMP16m, Convert__Mem5_2, { MCK_ljmpw, MCK__STAR_, MCK_Mem } },
- { X86::FARJMP16i, Convert__Imm1_1__Imm1_2, { MCK_ljmpw, MCK_Imm, MCK_Imm } },
- { X86::LSL32rr, Convert__Reg1_2__Reg1_1, { MCK_lsll, MCK_GR32, MCK_GR32 } },
- { X86::LSL32rm, Convert__Reg1_2__Mem5_1, { MCK_lsll, MCK_Mem, MCK_GR32 } },
- { X86::LSL64rr, Convert__Reg1_2__Reg1_1, { MCK_lslq, MCK_GR64, MCK_GR64 } },
- { X86::LSL64rm, Convert__Reg1_2__Mem5_1, { MCK_lslq, MCK_Mem, MCK_GR64 } },
- { X86::LSL16rr, Convert__Reg1_2__Reg1_1, { MCK_lslw, MCK_GR16, MCK_GR16 } },
- { X86::LSL16rm, Convert__Reg1_2__Mem5_1, { MCK_lslw, MCK_Mem, MCK_GR16 } },
- { X86::LSS32rm, Convert__Reg1_2__Mem5_1, { MCK_lssl, MCK_Mem, MCK_GR32 } },
- { X86::LSS64rm, Convert__Reg1_2__Mem5_1, { MCK_lssq, MCK_Mem, MCK_GR64 } },
- { X86::LSS16rm, Convert__Reg1_2__Mem5_1, { MCK_lssw, MCK_Mem, MCK_GR16 } },
- { X86::MASKMOVDQU, Convert__Reg1_2__Reg1_1, { MCK_maskmovdqu, MCK_FR32, MCK_FR32 } },
- { X86::MASKMOVDQU64, Convert__Reg1_2__Reg1_1, { MCK_maskmovdqu, MCK_FR32, MCK_FR32 } },
- { X86::MMX_MASKMOVQ, Convert__Reg1_2__Reg1_1, { MCK_maskmovq, MCK_VR64, MCK_VR64 } },
- { X86::MMX_MASKMOVQ64, Convert__Reg1_2__Reg1_1, { MCK_maskmovq, MCK_VR64, MCK_VR64 } },
- { X86::MAXPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_maxpd, MCK_FR32, MCK_FR32 } },
- { X86::MAXPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_maxpd, MCK_Mem, MCK_FR32 } },
- { X86::MAXPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_maxps, MCK_FR32, MCK_FR32 } },
- { X86::MAXPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_maxps, MCK_Mem, MCK_FR32 } },
- { X86::MAXSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_maxsd, MCK_FR32, MCK_FR32 } },
- { X86::MAXSDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_maxsd, MCK_Mem, MCK_FR32 } },
- { X86::MAXSSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_maxss, MCK_FR32, MCK_FR32 } },
- { X86::MAXSSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_maxss, MCK_Mem, MCK_FR32 } },
- { X86::MINPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_minpd, MCK_FR32, MCK_FR32 } },
- { X86::MINPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_minpd, MCK_Mem, MCK_FR32 } },
- { X86::MINPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_minps, MCK_FR32, MCK_FR32 } },
- { X86::MINPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_minps, MCK_Mem, MCK_FR32 } },
- { X86::MINSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_minsd, MCK_FR32, MCK_FR32 } },
- { X86::MINSDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_minsd, MCK_Mem, MCK_FR32 } },
- { X86::MINSSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_minss, MCK_FR32, MCK_FR32 } },
- { X86::MINSSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_minss, MCK_Mem, MCK_FR32 } },
- { X86::MOV64ri, Convert__Reg1_2__Imm1_1, { MCK_movabsq, MCK_Imm, MCK_GR64 } },
- { X86::FsMOVAPDrr, Convert__Reg1_2__Reg1_1, { MCK_movapd, MCK_FR32, MCK_FR32 } },
- { X86::MOVAPDrr, Convert__Reg1_2__Reg1_1, { MCK_movapd, MCK_FR32, MCK_FR32 } },
- { X86::MOVAPDmr, Convert__Mem5_2__Reg1_1, { MCK_movapd, MCK_FR32, MCK_Mem } },
- { X86::FsMOVAPDrm, Convert__Reg1_2__Mem5_1, { MCK_movapd, MCK_Mem, MCK_FR32 } },
- { X86::MOVAPDrm, Convert__Reg1_2__Mem5_1, { MCK_movapd, MCK_Mem, MCK_FR32 } },
- { X86::FsMOVAPSrr, Convert__Reg1_2__Reg1_1, { MCK_movaps, MCK_FR32, MCK_FR32 } },
- { X86::MOVAPSrr, Convert__Reg1_2__Reg1_1, { MCK_movaps, MCK_FR32, MCK_FR32 } },
- { X86::MOVAPSmr, Convert__Mem5_2__Reg1_1, { MCK_movaps, MCK_FR32, MCK_Mem } },
- { X86::FsMOVAPSrm, Convert__Reg1_2__Mem5_1, { MCK_movaps, MCK_Mem, MCK_FR32 } },
- { X86::MOVAPSrm, Convert__Reg1_2__Mem5_1, { MCK_movaps, MCK_Mem, MCK_FR32 } },
- { X86::MOV8ao8, Convert__AbsMem1_2, { MCK_movb, MCK_AL, MCK_AbsMem } },
- { X86::MOV8rr_NOREX, Convert__Reg1_2__Reg1_1, { MCK_movb, MCK_GR8_NOREX, MCK_GR8_NOREX } },
- { X86::MOV8mr_NOREX, Convert__Mem5_2__Reg1_1, { MCK_movb, MCK_GR8_NOREX, MCK_Mem } },
- { X86::MOV8rr, Convert__Reg1_2__Reg1_1, { MCK_movb, MCK_GR8, MCK_GR8 } },
- { X86::MOV8rr_REV, Convert__Reg1_2__Reg1_1, { MCK_movb, MCK_GR8, MCK_GR8 } },
- { X86::MOV8mr, Convert__Mem5_2__Reg1_1, { MCK_movb, MCK_GR8, MCK_Mem } },
- { X86::MOV8ri, Convert__Reg1_2__Imm1_1, { MCK_movb, MCK_Imm, MCK_GR8 } },
- { X86::MOV8mi, Convert__Mem5_2__Imm1_1, { MCK_movb, MCK_Imm, MCK_Mem } },
- { X86::MOV8o8a, Convert__AbsMem1_1, { MCK_movb, MCK_AbsMem, MCK_AL } },
- { X86::MOV8rm_NOREX, Convert__Reg1_2__Mem5_1, { MCK_movb, MCK_Mem, MCK_GR8_NOREX } },
- { X86::MOV8rm, Convert__Reg1_2__Mem5_1, { MCK_movb, MCK_Mem, MCK_GR8 } },
- { X86::MMX_MOVD64rr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR32, MCK_VR64 } },
- { X86::MMX_MOVZDI2PDIrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR32, MCK_VR64 } },
- { X86::MOVDI2PDIrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR32, MCK_FR32 } },
- { X86::MOVDI2SSrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR32, MCK_FR32 } },
- { X86::MOVZDI2PDIrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR32, MCK_FR32 } },
- { X86::MMX_MOVD64rrv164, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR64, MCK_VR64 } },
- { X86::MMX_MOVD64to64rr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR64, MCK_VR64 } },
- { X86::MOV64toPQIrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR64, MCK_FR32 } },
- { X86::MOV64toSDrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR64, MCK_FR32 } },
- { X86::MOVZQI2PQIrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_GR64, MCK_FR32 } },
- { X86::MMX_MOVD64grr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_VR64, MCK_GR32 } },
- { X86::MMX_MOVD64from64rr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_VR64, MCK_GR64 } },
- { X86::MMX_MOVD64mr, Convert__Mem5_2__Reg1_1, { MCK_movd, MCK_VR64, MCK_Mem } },
- { X86::MOVPDI2DIrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_FR32, MCK_GR32 } },
- { X86::MOVSS2DIrr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_FR32, MCK_GR32 } },
- { X86::MOVPQIto64rr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_FR32, MCK_GR64 } },
- { X86::MOVSDto64rr, Convert__Reg1_2__Reg1_1, { MCK_movd, MCK_FR32, MCK_GR64 } },
- { X86::MOVPDI2DImr, Convert__Mem5_2__Reg1_1, { MCK_movd, MCK_FR32, MCK_Mem } },
- { X86::MOVSS2DImr, Convert__Mem5_2__Reg1_1, { MCK_movd, MCK_FR32, MCK_Mem } },
- { X86::MMX_MOVD64rm, Convert__Reg1_2__Mem5_1, { MCK_movd, MCK_Mem, MCK_VR64 } },
- { X86::MMX_MOVZDI2PDIrm, Convert__Reg1_2__Mem5_1, { MCK_movd, MCK_Mem, MCK_VR64 } },
- { X86::MOVDI2PDIrm, Convert__Reg1_2__Mem5_1, { MCK_movd, MCK_Mem, MCK_FR32 } },
- { X86::MOVDI2SSrm, Convert__Reg1_2__Mem5_1, { MCK_movd, MCK_Mem, MCK_FR32 } },
- { X86::MOVZDI2PDIrm, Convert__Reg1_2__Mem5_1, { MCK_movd, MCK_Mem, MCK_FR32 } },
- { X86::MOVDDUPrr, Convert__Reg1_2__Reg1_1, { MCK_movddup, MCK_FR32, MCK_FR32 } },
- { X86::MOVDDUPrm, Convert__Reg1_2__Mem5_1, { MCK_movddup, MCK_Mem, MCK_FR32 } },
- { X86::MMX_MOVDQ2Qrr, Convert__Reg1_2__Reg1_1, { MCK_movdq2q, MCK_FR32, MCK_VR64 } },
- { X86::MOVDQArr, Convert__Reg1_2__Reg1_1, { MCK_movdqa, MCK_FR32, MCK_FR32 } },
- { X86::MOVDQAmr, Convert__Mem5_2__Reg1_1, { MCK_movdqa, MCK_FR32, MCK_Mem } },
- { X86::MOVDQArm, Convert__Reg1_2__Mem5_1, { MCK_movdqa, MCK_Mem, MCK_FR32 } },
- { X86::MOVDQUmr, Convert__Mem5_2__Reg1_1, { MCK_movdqu, MCK_FR32, MCK_Mem } },
- { X86::MOVDQUrm, Convert__Reg1_2__Mem5_1, { MCK_movdqu, MCK_Mem, MCK_FR32 } },
- { X86::MOVHLPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_movhlps, MCK_FR32, MCK_FR32 } },
- { X86::MOVHPDmr, Convert__Mem5_2__Reg1_1, { MCK_movhpd, MCK_FR32, MCK_Mem } },
- { X86::MOVHPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_movhpd, MCK_Mem, MCK_FR32 } },
- { X86::MOVHPSmr, Convert__Mem5_2__Reg1_1, { MCK_movhps, MCK_FR32, MCK_Mem } },
- { X86::MOVHPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_movhps, MCK_Mem, MCK_FR32 } },
- { X86::MOV32ao32, Convert__AbsMem1_2, { MCK_movl, MCK_EAX, MCK_AbsMem } },
- { X86::MOV32rr, Convert__Reg1_2__Reg1_1, { MCK_movl, MCK_GR32, MCK_GR32 } },
- { X86::MOV32rr_REV, Convert__Reg1_2__Reg1_1, { MCK_movl, MCK_GR32, MCK_GR32 } },
- { X86::MOV32dr, Convert__Reg1_2__Reg1_1, { MCK_movl, MCK_GR32, MCK_DEBUG_REG } },
- { X86::MOV32mr, Convert__Mem5_2__Reg1_1, { MCK_movl, MCK_GR32, MCK_Mem } },
- { X86::MOV32rd, Convert__Reg1_2__Reg1_1, { MCK_movl, MCK_DEBUG_REG, MCK_GR32 } },
- { X86::MOV32ri, Convert__Reg1_2__Imm1_1, { MCK_movl, MCK_Imm, MCK_GR32 } },
- { X86::MOV32mi, Convert__Mem5_2__Imm1_1, { MCK_movl, MCK_Imm, MCK_Mem } },
- { X86::MOV32o32a, Convert__AbsMem1_1, { MCK_movl, MCK_AbsMem, MCK_EAX } },
- { X86::MOV32rm, Convert__Reg1_2__Mem5_1, { MCK_movl, MCK_Mem, MCK_GR32 } },
- { X86::MOVLHPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_movlhps, MCK_FR32, MCK_FR32 } },
- { X86::MOVLPDmr, Convert__Mem5_2__Reg1_1, { MCK_movlpd, MCK_FR32, MCK_Mem } },
- { X86::MOVLPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_movlpd, MCK_Mem, MCK_FR32 } },
- { X86::MOVLPSmr, Convert__Mem5_2__Reg1_1, { MCK_movlps, MCK_FR32, MCK_Mem } },
- { X86::MOVLPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_movlps, MCK_Mem, MCK_FR32 } },
- { X86::MOVMSKPDrr, Convert__Reg1_2__Reg1_1, { MCK_movmskpd, MCK_FR32, MCK_GR32 } },
- { X86::MOVMSKPSrr, Convert__Reg1_2__Reg1_1, { MCK_movmskps, MCK_FR32, MCK_GR32 } },
- { X86::MOVNTDQ_64mr, Convert__Mem5_2__Reg1_1, { MCK_movntdq, MCK_FR32, MCK_Mem } },
- { X86::MOVNTDQmr, Convert__Mem5_2__Reg1_1, { MCK_movntdq, MCK_FR32, MCK_Mem } },
- { X86::MOVNTDQArm, Convert__Reg1_2__Mem5_1, { MCK_movntdqa, MCK_Mem, MCK_FR32 } },
- { X86::MOVNTImr, Convert__Mem5_2__Reg1_1, { MCK_movnti, MCK_GR32, MCK_Mem } },
- { X86::MOVNTI_64mr, Convert__Mem5_2__Reg1_1, { MCK_movnti, MCK_GR64, MCK_Mem } },
- { X86::MOVNTPDmr, Convert__Mem5_2__Reg1_1, { MCK_movntpd, MCK_FR32, MCK_Mem } },
- { X86::MOVNTPSmr, Convert__Mem5_2__Reg1_1, { MCK_movntps, MCK_FR32, MCK_Mem } },
- { X86::MMX_MOVNTQmr, Convert__Mem5_2__Reg1_1, { MCK_movntq, MCK_VR64, MCK_Mem } },
- { X86::MOV32cr, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_GR32, MCK_CONTROL_REG_32 } },
- { X86::MOV64ao64, Convert__AbsMem1_2, { MCK_movq, MCK_RAX, MCK_AbsMem } },
- { X86::MOV64ao8, Convert__AbsMem1_2, { MCK_movq, MCK_RAX, MCK_AbsMem } },
- { X86::MOV64rr, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_GR64, MCK_GR64 } },
- { X86::MOV64rr_REV, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_GR64, MCK_GR64 } },
- { X86::MOV64sr, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_GR64, MCK_SEGMENT_REG } },
- { X86::MOV64dr, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_GR64, MCK_DEBUG_REG } },
- { X86::MOV64cr, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_GR64, MCK_CONTROL_REG_64 } },
- { X86::MOV64mr, Convert__Mem5_2__Reg1_1, { MCK_movq, MCK_GR64, MCK_Mem } },
- { X86::MMX_MOVQ64rr, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_VR64, MCK_VR64 } },
- { X86::MMX_MOVQ64gmr, Convert__Mem5_2__Reg1_1, { MCK_movq, MCK_VR64, MCK_Mem } },
- { X86::MMX_MOVQ64mr, Convert__Mem5_2__Reg1_1, { MCK_movq, MCK_VR64, MCK_Mem } },
- { X86::MOVQxrxr, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_FR32, MCK_FR32 } },
- { X86::MOVZPQILo2PQIrr, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_FR32, MCK_FR32 } },
- { X86::MOVLQ128mr, Convert__Mem5_2__Reg1_1, { MCK_movq, MCK_FR32, MCK_Mem } },
- { X86::MOVPQI2QImr, Convert__Mem5_2__Reg1_1, { MCK_movq, MCK_FR32, MCK_Mem } },
- { X86::MOVSDto64mr, Convert__Mem5_2__Reg1_1, { MCK_movq, MCK_FR32, MCK_Mem } },
- { X86::MOV64rs, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_SEGMENT_REG, MCK_GR64 } },
- { X86::MOV64ms, Convert__Mem5_2__Reg1_1, { MCK_movq, MCK_SEGMENT_REG, MCK_Mem } },
- { X86::MOV64rd, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_DEBUG_REG, MCK_GR64 } },
- { X86::MOV32rc, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_CONTROL_REG_32, MCK_GR32 } },
- { X86::MOV64rc, Convert__Reg1_2__Reg1_1, { MCK_movq, MCK_CONTROL_REG_64, MCK_GR64 } },
- { X86::MOV64ri32, Convert__Reg1_2__Imm1_1, { MCK_movq, MCK_Imm, MCK_GR64 } },
- { X86::MOV64mi32, Convert__Mem5_2__Imm1_1, { MCK_movq, MCK_Imm, MCK_Mem } },
- { X86::MOV64o64a, Convert__AbsMem1_1, { MCK_movq, MCK_AbsMem, MCK_RAX } },
- { X86::MOV64o8a, Convert__AbsMem1_1, { MCK_movq, MCK_AbsMem, MCK_RAX } },
- { X86::MOV64rm, Convert__Reg1_2__Mem5_1, { MCK_movq, MCK_Mem, MCK_GR64 } },
- { X86::MMX_MOVQ64rm, Convert__Reg1_2__Mem5_1, { MCK_movq, MCK_Mem, MCK_VR64 } },
- { X86::MOV64toSDrm, Convert__Reg1_2__Mem5_1, { MCK_movq, MCK_Mem, MCK_FR32 } },
- { X86::MOVQI2PQIrm, Convert__Reg1_2__Mem5_1, { MCK_movq, MCK_Mem, MCK_FR32 } },
- { X86::MOVZPQILo2PQIrm, Convert__Reg1_2__Mem5_1, { MCK_movq, MCK_Mem, MCK_FR32 } },
- { X86::MOVZQI2PQIrm, Convert__Reg1_2__Mem5_1, { MCK_movq, MCK_Mem, MCK_FR32 } },
- { X86::MOV64sm, Convert__Reg1_2__Mem5_1, { MCK_movq, MCK_Mem, MCK_SEGMENT_REG } },
- { X86::MMX_MOVQ2DQrr, Convert__Reg1_2__Reg1_1, { MCK_movq2dq, MCK_VR64, MCK_FR32 } },
- { X86::MMX_MOVQ2FR64rr, Convert__Reg1_2__Reg1_1, { MCK_movq2dq, MCK_VR64, MCK_FR32 } },
- { X86::MOVSX32rr8, Convert__Reg1_2__Reg1_1, { MCK_movsbl, MCK_GR8, MCK_GR32 } },
- { X86::MOVSX32rm8, Convert__Reg1_2__Mem5_1, { MCK_movsbl, MCK_Mem, MCK_GR32 } },
- { X86::MOVSX64rr8, Convert__Reg1_2__Reg1_1, { MCK_movsbq, MCK_GR8, MCK_GR64 } },
- { X86::MOVSX64rm8, Convert__Reg1_2__Mem5_1, { MCK_movsbq, MCK_Mem, MCK_GR64 } },
- { X86::MOVSX16rr8W, Convert__Reg1_2__Reg1_1, { MCK_movsbw, MCK_GR8, MCK_GR16 } },
- { X86::MOVSX16rm8W, Convert__Reg1_2__Mem5_1, { MCK_movsbw, MCK_Mem, MCK_GR16 } },
- { X86::MOVSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_movsd, MCK_FR32, MCK_FR32 } },
- { X86::MOVSDmr, Convert__Mem5_2__Reg1_1, { MCK_movsd, MCK_FR32, MCK_Mem } },
- { X86::MOVSDrm, Convert__Reg1_2__Mem5_1, { MCK_movsd, MCK_Mem, MCK_FR32 } },
- { X86::MOVSHDUPrr, Convert__Reg1_2__Reg1_1, { MCK_movshdup, MCK_FR32, MCK_FR32 } },
- { X86::MOVSHDUPrm, Convert__Reg1_2__Mem5_1, { MCK_movshdup, MCK_Mem, MCK_FR32 } },
- { X86::MOVSLDUPrr, Convert__Reg1_2__Reg1_1, { MCK_movsldup, MCK_FR32, MCK_FR32 } },
- { X86::MOVSLDUPrm, Convert__Reg1_2__Mem5_1, { MCK_movsldup, MCK_Mem, MCK_FR32 } },
- { X86::MOVSX64rr32, Convert__Reg1_2__Reg1_1, { MCK_movslq, MCK_GR32, MCK_GR64 } },
- { X86::MOVSX64rm32, Convert__Reg1_2__Mem5_1, { MCK_movslq, MCK_Mem, MCK_GR64 } },
- { X86::MOVSSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_movss, MCK_FR32, MCK_FR32 } },
- { X86::MOVSSmr, Convert__Mem5_2__Reg1_1, { MCK_movss, MCK_FR32, MCK_Mem } },
- { X86::MOVSSrm, Convert__Reg1_2__Mem5_1, { MCK_movss, MCK_Mem, MCK_FR32 } },
- { X86::MOVSX32rr16, Convert__Reg1_2__Reg1_1, { MCK_movswl, MCK_GR16, MCK_GR32 } },
- { X86::MOVSX32rm16, Convert__Reg1_2__Mem5_1, { MCK_movswl, MCK_Mem, MCK_GR32 } },
- { X86::MOVSX64rr16, Convert__Reg1_2__Reg1_1, { MCK_movswq, MCK_GR16, MCK_GR64 } },
- { X86::MOVSX64rm16, Convert__Reg1_2__Mem5_1, { MCK_movswq, MCK_Mem, MCK_GR64 } },
- { X86::MOVUPDrr, Convert__Reg1_2__Reg1_1, { MCK_movupd, MCK_FR32, MCK_FR32 } },
- { X86::MOVUPDmr, Convert__Mem5_2__Reg1_1, { MCK_movupd, MCK_FR32, MCK_Mem } },
- { X86::MOVUPDrm, Convert__Reg1_2__Mem5_1, { MCK_movupd, MCK_Mem, MCK_FR32 } },
- { X86::MOVUPSrr, Convert__Reg1_2__Reg1_1, { MCK_movups, MCK_FR32, MCK_FR32 } },
- { X86::MOVUPSmr, Convert__Mem5_2__Reg1_1, { MCK_movups, MCK_FR32, MCK_Mem } },
- { X86::MOVUPSrm, Convert__Reg1_2__Mem5_1, { MCK_movups, MCK_Mem, MCK_FR32 } },
- { X86::MOV16ao16, Convert__AbsMem1_2, { MCK_movw, MCK_AX, MCK_AbsMem } },
- { X86::MOV16rr, Convert__Reg1_2__Reg1_1, { MCK_movw, MCK_GR16, MCK_GR16 } },
- { X86::MOV16rr_REV, Convert__Reg1_2__Reg1_1, { MCK_movw, MCK_GR16, MCK_GR16 } },
- { X86::MOV16sr, Convert__Reg1_2__Reg1_1, { MCK_movw, MCK_GR16, MCK_SEGMENT_REG } },
- { X86::MOV16mr, Convert__Mem5_2__Reg1_1, { MCK_movw, MCK_GR16, MCK_Mem } },
- { X86::MOV16rs, Convert__Reg1_2__Reg1_1, { MCK_movw, MCK_SEGMENT_REG, MCK_GR16 } },
- { X86::MOV16ms, Convert__Mem5_2__Reg1_1, { MCK_movw, MCK_SEGMENT_REG, MCK_Mem } },
- { X86::MOV16ri, Convert__Reg1_2__Imm1_1, { MCK_movw, MCK_Imm, MCK_GR16 } },
- { X86::MOV16mi, Convert__Mem5_2__Imm1_1, { MCK_movw, MCK_Imm, MCK_Mem } },
- { X86::MOV16o16a, Convert__AbsMem1_1, { MCK_movw, MCK_AbsMem, MCK_AX } },
- { X86::MOV16rm, Convert__Reg1_2__Mem5_1, { MCK_movw, MCK_Mem, MCK_GR16 } },
- { X86::MOV16sm, Convert__Reg1_2__Mem5_1, { MCK_movw, MCK_Mem, MCK_SEGMENT_REG } },
- { X86::MOVZX32_NOREXrr8, Convert__Reg1_2__Reg1_1, { MCK_movzbl, MCK_GR8, MCK_GR32_NOREX } },
- { X86::MOVZX32rr8, Convert__Reg1_2__Reg1_1, { MCK_movzbl, MCK_GR8, MCK_GR32 } },
- { X86::MOVZX32_NOREXrm8, Convert__Reg1_2__Mem5_1, { MCK_movzbl, MCK_Mem, MCK_GR32_NOREX } },
- { X86::MOVZX32rm8, Convert__Reg1_2__Mem5_1, { MCK_movzbl, MCK_Mem, MCK_GR32 } },
- { X86::MOVZX64rr8_Q, Convert__Reg1_2__Reg1_1, { MCK_movzbq, MCK_GR8, MCK_GR64 } },
- { X86::MOVZX64rm8_Q, Convert__Reg1_2__Mem5_1, { MCK_movzbq, MCK_Mem, MCK_GR64 } },
- { X86::MOVZX16rr8W, Convert__Reg1_2__Reg1_1, { MCK_movzbw, MCK_GR8, MCK_GR16 } },
- { X86::MOVZX16rm8W, Convert__Reg1_2__Mem5_1, { MCK_movzbw, MCK_Mem, MCK_GR16 } },
- { X86::MOVZX32rr16, Convert__Reg1_2__Reg1_1, { MCK_movzwl, MCK_GR16, MCK_GR32 } },
- { X86::MOVZX32rm16, Convert__Reg1_2__Mem5_1, { MCK_movzwl, MCK_Mem, MCK_GR32 } },
- { X86::MOVZX64rr16_Q, Convert__Reg1_2__Reg1_1, { MCK_movzwq, MCK_GR16, MCK_GR64 } },
- { X86::MOVZX64rm16_Q, Convert__Reg1_2__Mem5_1, { MCK_movzwq, MCK_Mem, MCK_GR64 } },
- { X86::MULPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_mulpd, MCK_FR32, MCK_FR32 } },
- { X86::MULPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_mulpd, MCK_Mem, MCK_FR32 } },
- { X86::MULPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_mulps, MCK_FR32, MCK_FR32 } },
- { X86::MULPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_mulps, MCK_Mem, MCK_FR32 } },
- { X86::MULSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_mulsd, MCK_FR32, MCK_FR32 } },
- { X86::MULSDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_mulsd, MCK_Mem, MCK_FR32 } },
- { X86::MULSSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_mulss, MCK_FR32, MCK_FR32 } },
- { X86::MULSSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_mulss, MCK_Mem, MCK_FR32 } },
- { X86::OR8rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orb, MCK_GR8, MCK_GR8 } },
- { X86::OR8rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orb, MCK_GR8, MCK_GR8 } },
- { X86::OR8mr, Convert__Mem5_2__Reg1_1, { MCK_orb, MCK_GR8, MCK_Mem } },
- { X86::OR8i8, Convert__Imm1_1, { MCK_orb, MCK_Imm, MCK_AL } },
- { X86::OR8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_orb, MCK_Imm, MCK_GR8 } },
- { X86::OR8mi, Convert__Mem5_2__Imm1_1, { MCK_orb, MCK_Imm, MCK_Mem } },
- { X86::OR8rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_orb, MCK_Mem, MCK_GR8 } },
- { X86::OR32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orl, MCK_GR32, MCK_GR32 } },
- { X86::OR32rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orl, MCK_GR32, MCK_GR32 } },
- { X86::OR32mr, Convert__Mem5_2__Reg1_1, { MCK_orl, MCK_GR32, MCK_Mem } },
- { X86::OR32ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_orl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::OR32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_orl, MCK_ImmSExt8, MCK_Mem } },
- { X86::OR32i32, Convert__Imm1_1, { MCK_orl, MCK_Imm, MCK_EAX } },
- { X86::OR32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_orl, MCK_Imm, MCK_GR32 } },
- { X86::OR32mi, Convert__Mem5_2__Imm1_1, { MCK_orl, MCK_Imm, MCK_Mem } },
- { X86::OR32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_orl, MCK_Mem, MCK_GR32 } },
- { X86::FsORPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orpd, MCK_FR32, MCK_FR32 } },
- { X86::ORPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orpd, MCK_FR32, MCK_FR32 } },
- { X86::FsORPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_orpd, MCK_Mem, MCK_FR32 } },
- { X86::ORPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_orpd, MCK_Mem, MCK_FR32 } },
- { X86::FsORPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orps, MCK_FR32, MCK_FR32 } },
- { X86::ORPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orps, MCK_FR32, MCK_FR32 } },
- { X86::FsORPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_orps, MCK_Mem, MCK_FR32 } },
- { X86::ORPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_orps, MCK_Mem, MCK_FR32 } },
- { X86::OR64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orq, MCK_GR64, MCK_GR64 } },
- { X86::OR64rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orq, MCK_GR64, MCK_GR64 } },
- { X86::OR64mr, Convert__Mem5_2__Reg1_1, { MCK_orq, MCK_GR64, MCK_Mem } },
- { X86::OR64ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_orq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::OR64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_orq, MCK_ImmSExt8, MCK_Mem } },
- { X86::OR64i32, Convert__Imm1_1, { MCK_orq, MCK_Imm, MCK_RAX } },
- { X86::OR64ri32, Convert__Reg1_2__Tie0__Imm1_1, { MCK_orq, MCK_Imm, MCK_GR64 } },
- { X86::OR64mi32, Convert__Mem5_2__Imm1_1, { MCK_orq, MCK_Imm, MCK_Mem } },
- { X86::OR64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_orq, MCK_Mem, MCK_GR64 } },
- { X86::OR16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orw, MCK_GR16, MCK_GR16 } },
- { X86::OR16rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_orw, MCK_GR16, MCK_GR16 } },
- { X86::OR16mr, Convert__Mem5_2__Reg1_1, { MCK_orw, MCK_GR16, MCK_Mem } },
- { X86::OR16ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_orw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::OR16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_orw, MCK_ImmSExt8, MCK_Mem } },
- { X86::OR16i16, Convert__Imm1_1, { MCK_orw, MCK_Imm, MCK_AX } },
- { X86::OR16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_orw, MCK_Imm, MCK_GR16 } },
- { X86::OR16mi, Convert__Mem5_2__Imm1_1, { MCK_orw, MCK_Imm, MCK_Mem } },
- { X86::OR16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_orw, MCK_Mem, MCK_GR16 } },
- { X86::OUT8rr, Convert, { MCK_outb, MCK_AL, MCK_DX } },
- { X86::OUT8ir, Convert__ImmSExt81_2, { MCK_outb, MCK_AL, MCK_ImmSExt8 } },
- { X86::OUT32rr, Convert, { MCK_outl, MCK_EAX, MCK_DX } },
- { X86::OUT32ir, Convert__ImmSExt81_2, { MCK_outl, MCK_EAX, MCK_ImmSExt8 } },
- { X86::OUT16rr, Convert, { MCK_outw, MCK_AX, MCK_DX } },
- { X86::OUT16ir, Convert__ImmSExt81_2, { MCK_outw, MCK_AX, MCK_ImmSExt8 } },
- { X86::PABSBrr64, Convert__Reg1_2__Reg1_1, { MCK_pabsb, MCK_VR64, MCK_VR64 } },
- { X86::PABSBrr128, Convert__Reg1_2__Reg1_1, { MCK_pabsb, MCK_FR32, MCK_FR32 } },
- { X86::PABSBrm64, Convert__Reg1_2__Mem5_1, { MCK_pabsb, MCK_Mem, MCK_VR64 } },
- { X86::PABSBrm128, Convert__Reg1_2__Mem5_1, { MCK_pabsb, MCK_Mem, MCK_FR32 } },
- { X86::PABSDrr64, Convert__Reg1_2__Reg1_1, { MCK_pabsd, MCK_VR64, MCK_VR64 } },
- { X86::PABSDrr128, Convert__Reg1_2__Reg1_1, { MCK_pabsd, MCK_FR32, MCK_FR32 } },
- { X86::PABSDrm64, Convert__Reg1_2__Mem5_1, { MCK_pabsd, MCK_Mem, MCK_VR64 } },
- { X86::PABSDrm128, Convert__Reg1_2__Mem5_1, { MCK_pabsd, MCK_Mem, MCK_FR32 } },
- { X86::PABSWrr64, Convert__Reg1_2__Reg1_1, { MCK_pabsw, MCK_VR64, MCK_VR64 } },
- { X86::PABSWrr128, Convert__Reg1_2__Reg1_1, { MCK_pabsw, MCK_FR32, MCK_FR32 } },
- { X86::PABSWrm64, Convert__Reg1_2__Mem5_1, { MCK_pabsw, MCK_Mem, MCK_VR64 } },
- { X86::PABSWrm128, Convert__Reg1_2__Mem5_1, { MCK_pabsw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PACKSSDWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_packssdw, MCK_VR64, MCK_VR64 } },
- { X86::PACKSSDWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_packssdw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PACKSSDWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_packssdw, MCK_Mem, MCK_VR64 } },
- { X86::PACKSSDWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_packssdw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PACKSSWBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_packsswb, MCK_VR64, MCK_VR64 } },
- { X86::PACKSSWBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_packsswb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PACKSSWBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_packsswb, MCK_Mem, MCK_VR64 } },
- { X86::PACKSSWBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_packsswb, MCK_Mem, MCK_FR32 } },
- { X86::PACKUSDWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_packusdw, MCK_FR32, MCK_FR32 } },
- { X86::PACKUSDWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_packusdw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PACKUSWBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_packuswb, MCK_VR64, MCK_VR64 } },
- { X86::PACKUSWBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_packuswb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PACKUSWBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_packuswb, MCK_Mem, MCK_VR64 } },
- { X86::PACKUSWBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_packuswb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PADDBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddb, MCK_VR64, MCK_VR64 } },
- { X86::PADDBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PADDBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddb, MCK_Mem, MCK_VR64 } },
- { X86::PADDBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PADDDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddd, MCK_VR64, MCK_VR64 } },
- { X86::PADDDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddd, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PADDDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddd, MCK_Mem, MCK_VR64 } },
- { X86::PADDDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddd, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PADDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddq, MCK_VR64, MCK_VR64 } },
- { X86::PADDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddq, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PADDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddq, MCK_Mem, MCK_VR64 } },
- { X86::PADDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PADDSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddsb, MCK_VR64, MCK_VR64 } },
- { X86::PADDSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddsb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PADDSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddsb, MCK_Mem, MCK_VR64 } },
- { X86::PADDSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddsb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PADDSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddsw, MCK_VR64, MCK_VR64 } },
- { X86::PADDSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddsw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PADDSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddsw, MCK_Mem, MCK_VR64 } },
- { X86::PADDSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddsw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PADDUSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddusb, MCK_VR64, MCK_VR64 } },
- { X86::PADDUSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddusb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PADDUSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddusb, MCK_Mem, MCK_VR64 } },
- { X86::PADDUSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddusb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PADDUSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddusw, MCK_VR64, MCK_VR64 } },
- { X86::PADDUSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddusw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PADDUSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddusw, MCK_Mem, MCK_VR64 } },
- { X86::PADDUSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddusw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PADDWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddw, MCK_VR64, MCK_VR64 } },
- { X86::PADDWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_paddw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PADDWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddw, MCK_Mem, MCK_VR64 } },
- { X86::PADDWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_paddw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PANDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pand, MCK_VR64, MCK_VR64 } },
- { X86::PANDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pand, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PANDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pand, MCK_Mem, MCK_VR64 } },
- { X86::PANDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pand, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PANDNrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pandn, MCK_VR64, MCK_VR64 } },
- { X86::PANDNrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pandn, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PANDNrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pandn, MCK_Mem, MCK_VR64 } },
- { X86::PANDNrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pandn, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PAVGBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pavgb, MCK_VR64, MCK_VR64 } },
- { X86::PAVGBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pavgb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PAVGBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pavgb, MCK_Mem, MCK_VR64 } },
- { X86::PAVGBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pavgb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PAVGWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pavgw, MCK_VR64, MCK_VR64 } },
- { X86::PAVGWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pavgw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PAVGWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pavgw, MCK_Mem, MCK_VR64 } },
- { X86::PAVGWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pavgw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PCMPEQBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpeqb, MCK_VR64, MCK_VR64 } },
- { X86::PCMPEQBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpeqb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PCMPEQBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpeqb, MCK_Mem, MCK_VR64 } },
- { X86::PCMPEQBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpeqb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PCMPEQDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpeqd, MCK_VR64, MCK_VR64 } },
- { X86::PCMPEQDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpeqd, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PCMPEQDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpeqd, MCK_Mem, MCK_VR64 } },
- { X86::PCMPEQDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpeqd, MCK_Mem, MCK_FR32 } },
- { X86::PCMPEQQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpeqq, MCK_FR32, MCK_FR32 } },
- { X86::PCMPEQQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpeqq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PCMPEQWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpeqw, MCK_VR64, MCK_VR64 } },
- { X86::PCMPEQWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpeqw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PCMPEQWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpeqw, MCK_Mem, MCK_VR64 } },
- { X86::PCMPEQWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpeqw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PCMPGTBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpgtb, MCK_VR64, MCK_VR64 } },
- { X86::PCMPGTBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpgtb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PCMPGTBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpgtb, MCK_Mem, MCK_VR64 } },
- { X86::PCMPGTBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpgtb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PCMPGTDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpgtd, MCK_VR64, MCK_VR64 } },
- { X86::PCMPGTDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpgtd, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PCMPGTDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpgtd, MCK_Mem, MCK_VR64 } },
- { X86::PCMPGTDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpgtd, MCK_Mem, MCK_FR32 } },
- { X86::PCMPGTQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpgtq, MCK_FR32, MCK_FR32 } },
- { X86::PCMPGTQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpgtq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PCMPGTWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpgtw, MCK_VR64, MCK_VR64 } },
- { X86::PCMPGTWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pcmpgtw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PCMPGTWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpgtw, MCK_Mem, MCK_VR64 } },
- { X86::PCMPGTWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pcmpgtw, MCK_Mem, MCK_FR32 } },
- { X86::PHADDDrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phaddd, MCK_VR64, MCK_VR64 } },
- { X86::PHADDDrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phaddd, MCK_FR32, MCK_FR32 } },
- { X86::PHADDDrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phaddd, MCK_Mem, MCK_VR64 } },
- { X86::PHADDDrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phaddd, MCK_Mem, MCK_FR32 } },
- { X86::PHADDSWrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phaddsw, MCK_VR64, MCK_VR64 } },
- { X86::PHADDSWrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phaddsw, MCK_FR32, MCK_FR32 } },
- { X86::PHADDSWrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phaddsw, MCK_Mem, MCK_VR64 } },
- { X86::PHADDSWrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phaddsw, MCK_Mem, MCK_FR32 } },
- { X86::PHADDWrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phaddw, MCK_VR64, MCK_VR64 } },
- { X86::PHADDWrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phaddw, MCK_FR32, MCK_FR32 } },
- { X86::PHADDWrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phaddw, MCK_Mem, MCK_VR64 } },
- { X86::PHADDWrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phaddw, MCK_Mem, MCK_FR32 } },
- { X86::PHMINPOSUWrr128, Convert__Reg1_2__Reg1_1, { MCK_phminposuw, MCK_FR32, MCK_FR32 } },
- { X86::PHMINPOSUWrm128, Convert__Reg1_2__Mem5_1, { MCK_phminposuw, MCK_Mem, MCK_FR32 } },
- { X86::PHSUBDrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phsubd, MCK_VR64, MCK_VR64 } },
- { X86::PHSUBDrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phsubd, MCK_FR32, MCK_FR32 } },
- { X86::PHSUBDrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phsubd, MCK_Mem, MCK_VR64 } },
- { X86::PHSUBDrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phsubd, MCK_Mem, MCK_FR32 } },
- { X86::PHSUBSWrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phsubsw, MCK_VR64, MCK_VR64 } },
- { X86::PHSUBSWrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phsubsw, MCK_FR32, MCK_FR32 } },
- { X86::PHSUBSWrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phsubsw, MCK_Mem, MCK_VR64 } },
- { X86::PHSUBSWrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phsubsw, MCK_Mem, MCK_FR32 } },
- { X86::PHSUBWrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phsubw, MCK_VR64, MCK_VR64 } },
- { X86::PHSUBWrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_phsubw, MCK_FR32, MCK_FR32 } },
- { X86::PHSUBWrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phsubw, MCK_Mem, MCK_VR64 } },
- { X86::PHSUBWrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_phsubw, MCK_Mem, MCK_FR32 } },
- { X86::PMADDUBSWrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaddubsw, MCK_VR64, MCK_VR64 } },
- { X86::PMADDUBSWrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaddubsw, MCK_FR32, MCK_FR32 } },
- { X86::PMADDUBSWrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaddubsw, MCK_Mem, MCK_VR64 } },
- { X86::PMADDUBSWrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaddubsw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMADDWDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaddwd, MCK_VR64, MCK_VR64 } },
- { X86::PMADDWDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaddwd, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMADDWDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaddwd, MCK_Mem, MCK_VR64 } },
- { X86::PMADDWDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaddwd, MCK_Mem, MCK_FR32 } },
- { X86::PMAXSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaxsb, MCK_FR32, MCK_FR32 } },
- { X86::PMAXSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaxsb, MCK_Mem, MCK_FR32 } },
- { X86::PMAXSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaxsd, MCK_FR32, MCK_FR32 } },
- { X86::PMAXSDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaxsd, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMAXSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaxsw, MCK_VR64, MCK_VR64 } },
- { X86::PMAXSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaxsw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMAXSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaxsw, MCK_Mem, MCK_VR64 } },
- { X86::PMAXSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaxsw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMAXUBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaxub, MCK_VR64, MCK_VR64 } },
- { X86::PMAXUBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaxub, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMAXUBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaxub, MCK_Mem, MCK_VR64 } },
- { X86::PMAXUBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaxub, MCK_Mem, MCK_FR32 } },
- { X86::PMAXUDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaxud, MCK_FR32, MCK_FR32 } },
- { X86::PMAXUDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaxud, MCK_Mem, MCK_FR32 } },
- { X86::PMAXUWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmaxuw, MCK_FR32, MCK_FR32 } },
- { X86::PMAXUWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmaxuw, MCK_Mem, MCK_FR32 } },
- { X86::PMINSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pminsb, MCK_FR32, MCK_FR32 } },
- { X86::PMINSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pminsb, MCK_Mem, MCK_FR32 } },
- { X86::PMINSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pminsd, MCK_FR32, MCK_FR32 } },
- { X86::PMINSDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pminsd, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMINSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pminsw, MCK_VR64, MCK_VR64 } },
- { X86::PMINSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pminsw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMINSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pminsw, MCK_Mem, MCK_VR64 } },
- { X86::PMINSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pminsw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMINUBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pminub, MCK_VR64, MCK_VR64 } },
- { X86::PMINUBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pminub, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMINUBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pminub, MCK_Mem, MCK_VR64 } },
- { X86::PMINUBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pminub, MCK_Mem, MCK_FR32 } },
- { X86::PMINUDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pminud, MCK_FR32, MCK_FR32 } },
- { X86::PMINUDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pminud, MCK_Mem, MCK_FR32 } },
- { X86::PMINUWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pminuw, MCK_FR32, MCK_FR32 } },
- { X86::PMINUWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pminuw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMOVMSKBrr, Convert__Reg1_2__Reg1_1, { MCK_pmovmskb, MCK_VR64, MCK_GR32 } },
- { X86::PMOVMSKBrr, Convert__Reg1_2__Reg1_1, { MCK_pmovmskb, MCK_FR32, MCK_GR32 } },
- { X86::PMOVSXBDrr, Convert__Reg1_2__Reg1_1, { MCK_pmovsxbd, MCK_FR32, MCK_FR32 } },
- { X86::PMOVSXBDrm, Convert__Reg1_2__Mem5_1, { MCK_pmovsxbd, MCK_Mem, MCK_FR32 } },
- { X86::PMOVSXBQrr, Convert__Reg1_2__Reg1_1, { MCK_pmovsxbq, MCK_FR32, MCK_FR32 } },
- { X86::PMOVSXBQrm, Convert__Reg1_2__Mem5_1, { MCK_pmovsxbq, MCK_Mem, MCK_FR32 } },
- { X86::PMOVSXBWrr, Convert__Reg1_2__Reg1_1, { MCK_pmovsxbw, MCK_FR32, MCK_FR32 } },
- { X86::PMOVSXBWrm, Convert__Reg1_2__Mem5_1, { MCK_pmovsxbw, MCK_Mem, MCK_FR32 } },
- { X86::PMOVSXDQrr, Convert__Reg1_2__Reg1_1, { MCK_pmovsxdq, MCK_FR32, MCK_FR32 } },
- { X86::PMOVSXDQrm, Convert__Reg1_2__Mem5_1, { MCK_pmovsxdq, MCK_Mem, MCK_FR32 } },
- { X86::PMOVSXWDrr, Convert__Reg1_2__Reg1_1, { MCK_pmovsxwd, MCK_FR32, MCK_FR32 } },
- { X86::PMOVSXWDrm, Convert__Reg1_2__Mem5_1, { MCK_pmovsxwd, MCK_Mem, MCK_FR32 } },
- { X86::PMOVSXWQrr, Convert__Reg1_2__Reg1_1, { MCK_pmovsxwq, MCK_FR32, MCK_FR32 } },
- { X86::PMOVSXWQrm, Convert__Reg1_2__Mem5_1, { MCK_pmovsxwq, MCK_Mem, MCK_FR32 } },
- { X86::PMOVZXBDrr, Convert__Reg1_2__Reg1_1, { MCK_pmovzxbd, MCK_FR32, MCK_FR32 } },
- { X86::PMOVZXBDrm, Convert__Reg1_2__Mem5_1, { MCK_pmovzxbd, MCK_Mem, MCK_FR32 } },
- { X86::PMOVZXBQrr, Convert__Reg1_2__Reg1_1, { MCK_pmovzxbq, MCK_FR32, MCK_FR32 } },
- { X86::PMOVZXBQrm, Convert__Reg1_2__Mem5_1, { MCK_pmovzxbq, MCK_Mem, MCK_FR32 } },
- { X86::PMOVZXBWrr, Convert__Reg1_2__Reg1_1, { MCK_pmovzxbw, MCK_FR32, MCK_FR32 } },
- { X86::PMOVZXBWrm, Convert__Reg1_2__Mem5_1, { MCK_pmovzxbw, MCK_Mem, MCK_FR32 } },
- { X86::PMOVZXDQrr, Convert__Reg1_2__Reg1_1, { MCK_pmovzxdq, MCK_FR32, MCK_FR32 } },
- { X86::PMOVZXDQrm, Convert__Reg1_2__Mem5_1, { MCK_pmovzxdq, MCK_Mem, MCK_FR32 } },
- { X86::PMOVZXWDrr, Convert__Reg1_2__Reg1_1, { MCK_pmovzxwd, MCK_FR32, MCK_FR32 } },
- { X86::PMOVZXWDrm, Convert__Reg1_2__Mem5_1, { MCK_pmovzxwd, MCK_Mem, MCK_FR32 } },
- { X86::PMOVZXWQrr, Convert__Reg1_2__Reg1_1, { MCK_pmovzxwq, MCK_FR32, MCK_FR32 } },
- { X86::PMOVZXWQrm, Convert__Reg1_2__Mem5_1, { MCK_pmovzxwq, MCK_Mem, MCK_FR32 } },
- { X86::PMULDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmuldq, MCK_FR32, MCK_FR32 } },
- { X86::PMULDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmuldq, MCK_Mem, MCK_FR32 } },
- { X86::PMULHRSWrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmulhrsw, MCK_VR64, MCK_VR64 } },
- { X86::PMULHRSWrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmulhrsw, MCK_FR32, MCK_FR32 } },
- { X86::PMULHRSWrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmulhrsw, MCK_Mem, MCK_VR64 } },
- { X86::PMULHRSWrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmulhrsw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMULHUWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmulhuw, MCK_VR64, MCK_VR64 } },
- { X86::PMULHUWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmulhuw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMULHUWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmulhuw, MCK_Mem, MCK_VR64 } },
- { X86::PMULHUWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmulhuw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMULHWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmulhw, MCK_VR64, MCK_VR64 } },
- { X86::PMULHWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmulhw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMULHWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmulhw, MCK_Mem, MCK_VR64 } },
- { X86::PMULHWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmulhw, MCK_Mem, MCK_FR32 } },
- { X86::PMULLDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmulld, MCK_FR32, MCK_FR32 } },
- { X86::PMULLDrr_int, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmulld, MCK_FR32, MCK_FR32 } },
- { X86::PMULLDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmulld, MCK_Mem, MCK_FR32 } },
- { X86::PMULLDrm_int, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmulld, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMULLWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmullw, MCK_VR64, MCK_VR64 } },
- { X86::PMULLWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmullw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMULLWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmullw, MCK_Mem, MCK_VR64 } },
- { X86::PMULLWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmullw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PMULUDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmuludq, MCK_VR64, MCK_VR64 } },
- { X86::PMULUDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pmuludq, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PMULUDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmuludq, MCK_Mem, MCK_VR64 } },
- { X86::PMULUDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pmuludq, MCK_Mem, MCK_FR32 } },
- { X86::POPCNT32rr, Convert__Reg1_2__Reg1_1, { MCK_popcntl, MCK_GR32, MCK_GR32 } },
- { X86::POPCNT32rm, Convert__Reg1_2__Mem5_1, { MCK_popcntl, MCK_Mem, MCK_GR32 } },
- { X86::POPCNT64rr, Convert__Reg1_2__Reg1_1, { MCK_popcntq, MCK_GR64, MCK_GR64 } },
- { X86::POPCNT64rm, Convert__Reg1_2__Mem5_1, { MCK_popcntq, MCK_Mem, MCK_GR64 } },
- { X86::POPCNT16rr, Convert__Reg1_2__Reg1_1, { MCK_popcntw, MCK_GR16, MCK_GR16 } },
- { X86::POPCNT16rm, Convert__Reg1_2__Mem5_1, { MCK_popcntw, MCK_Mem, MCK_GR16 } },
- { X86::MMX_PORrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_por, MCK_VR64, MCK_VR64 } },
- { X86::PORrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_por, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PORrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_por, MCK_Mem, MCK_VR64 } },
- { X86::PORrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_por, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSADBWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psadbw, MCK_VR64, MCK_VR64 } },
- { X86::PSADBWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psadbw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSADBWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psadbw, MCK_Mem, MCK_VR64 } },
- { X86::PSADBWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psadbw, MCK_Mem, MCK_FR32 } },
- { X86::PSHUFBrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pshufb, MCK_VR64, MCK_VR64 } },
- { X86::PSHUFBrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pshufb, MCK_FR32, MCK_FR32 } },
- { X86::PSHUFBrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pshufb, MCK_Mem, MCK_VR64 } },
- { X86::PSHUFBrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pshufb, MCK_Mem, MCK_FR32 } },
- { X86::PSIGNBrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psignb, MCK_VR64, MCK_VR64 } },
- { X86::PSIGNBrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psignb, MCK_FR32, MCK_FR32 } },
- { X86::PSIGNBrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psignb, MCK_Mem, MCK_VR64 } },
- { X86::PSIGNBrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psignb, MCK_Mem, MCK_FR32 } },
- { X86::PSIGNDrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psignd, MCK_VR64, MCK_VR64 } },
- { X86::PSIGNDrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psignd, MCK_FR32, MCK_FR32 } },
- { X86::PSIGNDrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psignd, MCK_Mem, MCK_VR64 } },
- { X86::PSIGNDrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psignd, MCK_Mem, MCK_FR32 } },
- { X86::PSIGNWrr64, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psignw, MCK_VR64, MCK_VR64 } },
- { X86::PSIGNWrr128, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psignw, MCK_FR32, MCK_FR32 } },
- { X86::PSIGNWrm64, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psignw, MCK_Mem, MCK_VR64 } },
- { X86::PSIGNWrm128, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psignw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSLLDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pslld, MCK_VR64, MCK_VR64 } },
- { X86::PSLLDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pslld, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSLLDri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_pslld, MCK_ImmSExt8, MCK_VR64 } },
- { X86::PSLLDri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_pslld, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSLLDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pslld, MCK_Mem, MCK_VR64 } },
- { X86::PSLLDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pslld, MCK_Mem, MCK_FR32 } },
- { X86::PSLLDQri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_pslldq, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSLLQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psllq, MCK_VR64, MCK_VR64 } },
- { X86::PSLLQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psllq, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSLLQri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psllq, MCK_ImmSExt8, MCK_VR64 } },
- { X86::PSLLQri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psllq, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSLLQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psllq, MCK_Mem, MCK_VR64 } },
- { X86::PSLLQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psllq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSLLWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psllw, MCK_VR64, MCK_VR64 } },
- { X86::PSLLWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psllw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSLLWri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psllw, MCK_ImmSExt8, MCK_VR64 } },
- { X86::PSLLWri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psllw, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSLLWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psllw, MCK_Mem, MCK_VR64 } },
- { X86::PSLLWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psllw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSRADrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psrad, MCK_VR64, MCK_VR64 } },
- { X86::PSRADrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psrad, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSRADri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrad, MCK_ImmSExt8, MCK_VR64 } },
- { X86::PSRADri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrad, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSRADrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psrad, MCK_Mem, MCK_VR64 } },
- { X86::PSRADrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psrad, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSRAWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psraw, MCK_VR64, MCK_VR64 } },
- { X86::PSRAWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psraw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSRAWri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psraw, MCK_ImmSExt8, MCK_VR64 } },
- { X86::PSRAWri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psraw, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSRAWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psraw, MCK_Mem, MCK_VR64 } },
- { X86::PSRAWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psraw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSRLDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psrld, MCK_VR64, MCK_VR64 } },
- { X86::PSRLDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psrld, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSRLDri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrld, MCK_ImmSExt8, MCK_VR64 } },
- { X86::PSRLDri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrld, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSRLDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psrld, MCK_Mem, MCK_VR64 } },
- { X86::PSRLDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psrld, MCK_Mem, MCK_FR32 } },
- { X86::PSRLDQri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrldq, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSRLQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psrlq, MCK_VR64, MCK_VR64 } },
- { X86::PSRLQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psrlq, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSRLQri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrlq, MCK_ImmSExt8, MCK_VR64 } },
- { X86::PSRLQri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrlq, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSRLQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psrlq, MCK_Mem, MCK_VR64 } },
- { X86::PSRLQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psrlq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSRLWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psrlw, MCK_VR64, MCK_VR64 } },
- { X86::PSRLWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psrlw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSRLWri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrlw, MCK_ImmSExt8, MCK_VR64 } },
- { X86::PSRLWri, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_psrlw, MCK_ImmSExt8, MCK_FR32 } },
- { X86::MMX_PSRLWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psrlw, MCK_Mem, MCK_VR64 } },
- { X86::PSRLWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psrlw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSUBBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubb, MCK_VR64, MCK_VR64 } },
- { X86::PSUBBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSUBBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubb, MCK_Mem, MCK_VR64 } },
- { X86::PSUBBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSUBDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubd, MCK_VR64, MCK_VR64 } },
- { X86::PSUBDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubd, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSUBDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubd, MCK_Mem, MCK_VR64 } },
- { X86::PSUBDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubd, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSUBQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubq, MCK_VR64, MCK_VR64 } },
- { X86::PSUBQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubq, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSUBQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubq, MCK_Mem, MCK_VR64 } },
- { X86::PSUBQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSUBSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubsb, MCK_VR64, MCK_VR64 } },
- { X86::PSUBSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubsb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSUBSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubsb, MCK_Mem, MCK_VR64 } },
- { X86::PSUBSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubsb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSUBSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubsw, MCK_VR64, MCK_VR64 } },
- { X86::PSUBSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubsw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSUBSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubsw, MCK_Mem, MCK_VR64 } },
- { X86::PSUBSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubsw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSUBUSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubusb, MCK_VR64, MCK_VR64 } },
- { X86::PSUBUSBrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubusb, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSUBUSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubusb, MCK_Mem, MCK_VR64 } },
- { X86::PSUBUSBrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubusb, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSUBUSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubusw, MCK_VR64, MCK_VR64 } },
- { X86::PSUBUSWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubusw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSUBUSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubusw, MCK_Mem, MCK_VR64 } },
- { X86::PSUBUSWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubusw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSUBWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubw, MCK_VR64, MCK_VR64 } },
- { X86::PSUBWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_psubw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PSUBWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubw, MCK_Mem, MCK_VR64 } },
- { X86::PSUBWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_psubw, MCK_Mem, MCK_FR32 } },
- { X86::PTESTrr, Convert__Reg1_2__Reg1_1, { MCK_ptest, MCK_FR32, MCK_FR32 } },
- { X86::PTESTrm, Convert__Reg1_2__Mem5_1, { MCK_ptest, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PUNPCKHBWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckhbw, MCK_VR64, MCK_VR64 } },
- { X86::PUNPCKHBWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckhbw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PUNPCKHBWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckhbw, MCK_Mem, MCK_VR64 } },
- { X86::PUNPCKHBWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckhbw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PUNPCKHDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckhdq, MCK_VR64, MCK_VR64 } },
- { X86::PUNPCKHDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckhdq, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PUNPCKHDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckhdq, MCK_Mem, MCK_VR64 } },
- { X86::PUNPCKHDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckhdq, MCK_Mem, MCK_FR32 } },
- { X86::PUNPCKHQDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckhqdq, MCK_FR32, MCK_FR32 } },
- { X86::PUNPCKHQDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckhqdq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PUNPCKHWDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckhwd, MCK_VR64, MCK_VR64 } },
- { X86::PUNPCKHWDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckhwd, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PUNPCKHWDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckhwd, MCK_Mem, MCK_VR64 } },
- { X86::PUNPCKHWDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckhwd, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PUNPCKLBWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpcklbw, MCK_VR64, MCK_VR64 } },
- { X86::PUNPCKLBWrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpcklbw, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PUNPCKLBWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpcklbw, MCK_Mem, MCK_VR64 } },
- { X86::PUNPCKLBWrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpcklbw, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PUNPCKLDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckldq, MCK_VR64, MCK_VR64 } },
- { X86::PUNPCKLDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpckldq, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PUNPCKLDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckldq, MCK_Mem, MCK_VR64 } },
- { X86::PUNPCKLDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpckldq, MCK_Mem, MCK_FR32 } },
- { X86::PUNPCKLQDQrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpcklqdq, MCK_FR32, MCK_FR32 } },
- { X86::PUNPCKLQDQrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpcklqdq, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PUNPCKLWDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpcklwd, MCK_VR64, MCK_VR64 } },
- { X86::PUNPCKLWDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_punpcklwd, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PUNPCKLWDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpcklwd, MCK_Mem, MCK_VR64 } },
- { X86::PUNPCKLWDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_punpcklwd, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PXORrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pxor, MCK_VR64, MCK_VR64 } },
- { X86::PXORrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_pxor, MCK_FR32, MCK_FR32 } },
- { X86::MMX_PXORrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pxor, MCK_Mem, MCK_VR64 } },
- { X86::PXORrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_pxor, MCK_Mem, MCK_FR32 } },
- { X86::RCL8r1, Convert__Reg1_2__Tie0, { MCK_rclb, MCK_1, MCK_GR8 } },
- { X86::RCL8m1, Convert__Mem5_2, { MCK_rclb, MCK_1, MCK_Mem } },
- { X86::RCL8rCL, Convert__Reg1_2__Tie0, { MCK_rclb, MCK_CL, MCK_GR8 } },
- { X86::RCL8mCL, Convert__Mem5_2, { MCK_rclb, MCK_CL, MCK_Mem } },
- { X86::RCL8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rclb, MCK_Imm, MCK_GR8 } },
- { X86::RCL8mi, Convert__Mem5_2__Imm1_1, { MCK_rclb, MCK_Imm, MCK_Mem } },
- { X86::RCL32r1, Convert__Reg1_2__Tie0, { MCK_rcll, MCK_1, MCK_GR32 } },
- { X86::RCL32m1, Convert__Mem5_2, { MCK_rcll, MCK_1, MCK_Mem } },
- { X86::RCL32rCL, Convert__Reg1_2__Tie0, { MCK_rcll, MCK_CL, MCK_GR32 } },
- { X86::RCL32mCL, Convert__Mem5_2, { MCK_rcll, MCK_CL, MCK_Mem } },
- { X86::RCL32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rcll, MCK_Imm, MCK_GR32 } },
- { X86::RCL32mi, Convert__Mem5_2__Imm1_1, { MCK_rcll, MCK_Imm, MCK_Mem } },
- { X86::RCL64r1, Convert__Reg1_2__Tie0, { MCK_rclq, MCK_1, MCK_GR64 } },
- { X86::RCL64m1, Convert__Mem5_2, { MCK_rclq, MCK_1, MCK_Mem } },
- { X86::RCL64rCL, Convert__Reg1_2__Tie0, { MCK_rclq, MCK_CL, MCK_GR64 } },
- { X86::RCL64mCL, Convert__Mem5_2, { MCK_rclq, MCK_CL, MCK_Mem } },
- { X86::RCL64ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rclq, MCK_Imm, MCK_GR64 } },
- { X86::RCL64mi, Convert__Mem5_2__Imm1_1, { MCK_rclq, MCK_Imm, MCK_Mem } },
- { X86::RCL16r1, Convert__Reg1_2__Tie0, { MCK_rclw, MCK_1, MCK_GR16 } },
- { X86::RCL16m1, Convert__Mem5_2, { MCK_rclw, MCK_1, MCK_Mem } },
- { X86::RCL16rCL, Convert__Reg1_2__Tie0, { MCK_rclw, MCK_CL, MCK_GR16 } },
- { X86::RCL16mCL, Convert__Mem5_2, { MCK_rclw, MCK_CL, MCK_Mem } },
- { X86::RCL16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rclw, MCK_Imm, MCK_GR16 } },
- { X86::RCL16mi, Convert__Mem5_2__Imm1_1, { MCK_rclw, MCK_Imm, MCK_Mem } },
- { X86::RCPPSr, Convert__Reg1_2__Reg1_1, { MCK_rcpps, MCK_FR32, MCK_FR32 } },
- { X86::RCPPSm, Convert__Reg1_2__Mem5_1, { MCK_rcpps, MCK_Mem, MCK_FR32 } },
- { X86::RCPSSr, Convert__Reg1_2__Reg1_1, { MCK_rcpss, MCK_FR32, MCK_FR32 } },
- { X86::RCPSSm, Convert__Reg1_2__Mem5_1, { MCK_rcpss, MCK_Mem, MCK_FR32 } },
- { X86::RCR8r1, Convert__Reg1_2__Tie0, { MCK_rcrb, MCK_1, MCK_GR8 } },
- { X86::RCR8m1, Convert__Mem5_2, { MCK_rcrb, MCK_1, MCK_Mem } },
- { X86::RCR8rCL, Convert__Reg1_2__Tie0, { MCK_rcrb, MCK_CL, MCK_GR8 } },
- { X86::RCR8mCL, Convert__Mem5_2, { MCK_rcrb, MCK_CL, MCK_Mem } },
- { X86::RCR8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rcrb, MCK_Imm, MCK_GR8 } },
- { X86::RCR8mi, Convert__Mem5_2__Imm1_1, { MCK_rcrb, MCK_Imm, MCK_Mem } },
- { X86::RCR32r1, Convert__Reg1_2__Tie0, { MCK_rcrl, MCK_1, MCK_GR32 } },
- { X86::RCR32m1, Convert__Mem5_2, { MCK_rcrl, MCK_1, MCK_Mem } },
- { X86::RCR32rCL, Convert__Reg1_2__Tie0, { MCK_rcrl, MCK_CL, MCK_GR32 } },
- { X86::RCR32mCL, Convert__Mem5_2, { MCK_rcrl, MCK_CL, MCK_Mem } },
- { X86::RCR32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rcrl, MCK_Imm, MCK_GR32 } },
- { X86::RCR32mi, Convert__Mem5_2__Imm1_1, { MCK_rcrl, MCK_Imm, MCK_Mem } },
- { X86::RCR64r1, Convert__Reg1_2__Tie0, { MCK_rcrq, MCK_1, MCK_GR64 } },
- { X86::RCR64m1, Convert__Mem5_2, { MCK_rcrq, MCK_1, MCK_Mem } },
- { X86::RCR64rCL, Convert__Reg1_2__Tie0, { MCK_rcrq, MCK_CL, MCK_GR64 } },
- { X86::RCR64mCL, Convert__Mem5_2, { MCK_rcrq, MCK_CL, MCK_Mem } },
- { X86::RCR64ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rcrq, MCK_Imm, MCK_GR64 } },
- { X86::RCR64mi, Convert__Mem5_2__Imm1_1, { MCK_rcrq, MCK_Imm, MCK_Mem } },
- { X86::RCR16r1, Convert__Reg1_2__Tie0, { MCK_rcrw, MCK_1, MCK_GR16 } },
- { X86::RCR16m1, Convert__Mem5_2, { MCK_rcrw, MCK_1, MCK_Mem } },
- { X86::RCR16rCL, Convert__Reg1_2__Tie0, { MCK_rcrw, MCK_CL, MCK_GR16 } },
- { X86::RCR16mCL, Convert__Mem5_2, { MCK_rcrw, MCK_CL, MCK_Mem } },
- { X86::RCR16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rcrw, MCK_Imm, MCK_GR16 } },
- { X86::RCR16mi, Convert__Mem5_2__Imm1_1, { MCK_rcrw, MCK_Imm, MCK_Mem } },
- { X86::ROL8rCL, Convert__Reg1_2__Tie0, { MCK_rolb, MCK_CL, MCK_GR8 } },
- { X86::ROL8mCL, Convert__Mem5_2, { MCK_rolb, MCK_CL, MCK_Mem } },
- { X86::ROL8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rolb, MCK_Imm, MCK_GR8 } },
- { X86::ROL8mi, Convert__Mem5_2__Imm1_1, { MCK_rolb, MCK_Imm, MCK_Mem } },
- { X86::ROL32rCL, Convert__Reg1_2__Tie0, { MCK_roll, MCK_CL, MCK_GR32 } },
- { X86::ROL32mCL, Convert__Mem5_2, { MCK_roll, MCK_CL, MCK_Mem } },
- { X86::ROL32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_roll, MCK_Imm, MCK_GR32 } },
- { X86::ROL32mi, Convert__Mem5_2__Imm1_1, { MCK_roll, MCK_Imm, MCK_Mem } },
- { X86::ROL64rCL, Convert__Reg1_2__Tie0, { MCK_rolq, MCK_CL, MCK_GR64 } },
- { X86::ROL64mCL, Convert__Mem5_2, { MCK_rolq, MCK_CL, MCK_Mem } },
- { X86::ROL64ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rolq, MCK_Imm, MCK_GR64 } },
- { X86::ROL64mi, Convert__Mem5_2__Imm1_1, { MCK_rolq, MCK_Imm, MCK_Mem } },
- { X86::ROL16rCL, Convert__Reg1_2__Tie0, { MCK_rolw, MCK_CL, MCK_GR16 } },
- { X86::ROL16mCL, Convert__Mem5_2, { MCK_rolw, MCK_CL, MCK_Mem } },
- { X86::ROL16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rolw, MCK_Imm, MCK_GR16 } },
- { X86::ROL16mi, Convert__Mem5_2__Imm1_1, { MCK_rolw, MCK_Imm, MCK_Mem } },
- { X86::ROR8rCL, Convert__Reg1_2__Tie0, { MCK_rorb, MCK_CL, MCK_GR8 } },
- { X86::ROR8mCL, Convert__Mem5_2, { MCK_rorb, MCK_CL, MCK_Mem } },
- { X86::ROR8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rorb, MCK_Imm, MCK_GR8 } },
- { X86::ROR8mi, Convert__Mem5_2__Imm1_1, { MCK_rorb, MCK_Imm, MCK_Mem } },
- { X86::ROR32rCL, Convert__Reg1_2__Tie0, { MCK_rorl, MCK_CL, MCK_GR32 } },
- { X86::ROR32mCL, Convert__Mem5_2, { MCK_rorl, MCK_CL, MCK_Mem } },
- { X86::ROR32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rorl, MCK_Imm, MCK_GR32 } },
- { X86::ROR32mi, Convert__Mem5_2__Imm1_1, { MCK_rorl, MCK_Imm, MCK_Mem } },
- { X86::ROR64rCL, Convert__Reg1_2__Tie0, { MCK_rorq, MCK_CL, MCK_GR64 } },
- { X86::ROR64mCL, Convert__Mem5_2, { MCK_rorq, MCK_CL, MCK_Mem } },
- { X86::ROR64ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rorq, MCK_Imm, MCK_GR64 } },
- { X86::ROR64mi, Convert__Mem5_2__Imm1_1, { MCK_rorq, MCK_Imm, MCK_Mem } },
- { X86::ROR16rCL, Convert__Reg1_2__Tie0, { MCK_rorw, MCK_CL, MCK_GR16 } },
- { X86::ROR16mCL, Convert__Mem5_2, { MCK_rorw, MCK_CL, MCK_Mem } },
- { X86::ROR16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_rorw, MCK_Imm, MCK_GR16 } },
- { X86::ROR16mi, Convert__Mem5_2__Imm1_1, { MCK_rorw, MCK_Imm, MCK_Mem } },
- { X86::RSQRTPSr, Convert__Reg1_2__Reg1_1, { MCK_rsqrtps, MCK_FR32, MCK_FR32 } },
- { X86::RSQRTPSm, Convert__Reg1_2__Mem5_1, { MCK_rsqrtps, MCK_Mem, MCK_FR32 } },
- { X86::RSQRTSSr, Convert__Reg1_2__Reg1_1, { MCK_rsqrtss, MCK_FR32, MCK_FR32 } },
- { X86::RSQRTSSm, Convert__Reg1_2__Mem5_1, { MCK_rsqrtss, MCK_Mem, MCK_FR32 } },
- { X86::SAR8rCL, Convert__Reg1_2__Tie0, { MCK_sarb, MCK_CL, MCK_GR8 } },
- { X86::SAR8mCL, Convert__Mem5_2, { MCK_sarb, MCK_CL, MCK_Mem } },
- { X86::SAR8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_sarb, MCK_Imm, MCK_GR8 } },
- { X86::SAR8mi, Convert__Mem5_2__Imm1_1, { MCK_sarb, MCK_Imm, MCK_Mem } },
- { X86::SAR32rCL, Convert__Reg1_2__Tie0, { MCK_sarl, MCK_CL, MCK_GR32 } },
- { X86::SAR32mCL, Convert__Mem5_2, { MCK_sarl, MCK_CL, MCK_Mem } },
- { X86::SAR32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_sarl, MCK_Imm, MCK_GR32 } },
- { X86::SAR32mi, Convert__Mem5_2__Imm1_1, { MCK_sarl, MCK_Imm, MCK_Mem } },
- { X86::SAR64rCL, Convert__Reg1_2__Tie0, { MCK_sarq, MCK_CL, MCK_GR64 } },
- { X86::SAR64mCL, Convert__Mem5_2, { MCK_sarq, MCK_CL, MCK_Mem } },
- { X86::SAR64ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_sarq, MCK_Imm, MCK_GR64 } },
- { X86::SAR64mi, Convert__Mem5_2__Imm1_1, { MCK_sarq, MCK_Imm, MCK_Mem } },
- { X86::SAR16rCL, Convert__Reg1_2__Tie0, { MCK_sarw, MCK_CL, MCK_GR16 } },
- { X86::SAR16mCL, Convert__Mem5_2, { MCK_sarw, MCK_CL, MCK_Mem } },
- { X86::SAR16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_sarw, MCK_Imm, MCK_GR16 } },
- { X86::SAR16mi, Convert__Mem5_2__Imm1_1, { MCK_sarw, MCK_Imm, MCK_Mem } },
- { X86::SBB8rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_sbbb, MCK_GR8, MCK_GR8 } },
- { X86::SBB8rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_sbbb, MCK_GR8, MCK_GR8 } },
- { X86::SBB8mr, Convert__Mem5_2__Reg1_1, { MCK_sbbb, MCK_GR8, MCK_Mem } },
- { X86::SBB8i8, Convert__Imm1_1, { MCK_sbbb, MCK_Imm, MCK_AL } },
- { X86::SBB8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_sbbb, MCK_Imm, MCK_GR8 } },
- { X86::SBB8mi, Convert__Mem5_2__Imm1_1, { MCK_sbbb, MCK_Imm, MCK_Mem } },
- { X86::SBB8rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_sbbb, MCK_Mem, MCK_GR8 } },
- { X86::SBB32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_sbbl, MCK_GR32, MCK_GR32 } },
- { X86::SBB32rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_sbbl, MCK_GR32, MCK_GR32 } },
- { X86::SBB32mr, Convert__Mem5_2__Reg1_1, { MCK_sbbl, MCK_GR32, MCK_Mem } },
- { X86::SBB32ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_sbbl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::SBB32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_sbbl, MCK_ImmSExt8, MCK_Mem } },
- { X86::SBB32i32, Convert__Imm1_1, { MCK_sbbl, MCK_Imm, MCK_EAX } },
- { X86::SBB32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_sbbl, MCK_Imm, MCK_GR32 } },
- { X86::SBB32mi, Convert__Mem5_2__Imm1_1, { MCK_sbbl, MCK_Imm, MCK_Mem } },
- { X86::SBB32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_sbbl, MCK_Mem, MCK_GR32 } },
- { X86::SBB64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_sbbq, MCK_GR64, MCK_GR64 } },
- { X86::SBB64rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_sbbq, MCK_GR64, MCK_GR64 } },
- { X86::SBB64mr, Convert__Mem5_2__Reg1_1, { MCK_sbbq, MCK_GR64, MCK_Mem } },
- { X86::SBB64ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_sbbq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::SBB64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_sbbq, MCK_ImmSExt8, MCK_Mem } },
- { X86::SBB64i32, Convert__Imm1_1, { MCK_sbbq, MCK_Imm, MCK_RAX } },
- { X86::SBB64ri32, Convert__Reg1_2__Tie0__Imm1_1, { MCK_sbbq, MCK_Imm, MCK_GR64 } },
- { X86::SBB64mi32, Convert__Mem5_2__Imm1_1, { MCK_sbbq, MCK_Imm, MCK_Mem } },
- { X86::SBB64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_sbbq, MCK_Mem, MCK_GR64 } },
- { X86::SBB16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_sbbw, MCK_GR16, MCK_GR16 } },
- { X86::SBB16rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_sbbw, MCK_GR16, MCK_GR16 } },
- { X86::SBB16mr, Convert__Mem5_2__Reg1_1, { MCK_sbbw, MCK_GR16, MCK_Mem } },
- { X86::SBB16ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_sbbw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::SBB16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_sbbw, MCK_ImmSExt8, MCK_Mem } },
- { X86::SBB16i16, Convert__Imm1_1, { MCK_sbbw, MCK_Imm, MCK_AX } },
- { X86::SBB16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_sbbw, MCK_Imm, MCK_GR16 } },
- { X86::SBB16mi, Convert__Mem5_2__Imm1_1, { MCK_sbbw, MCK_Imm, MCK_Mem } },
- { X86::SBB16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_sbbw, MCK_Mem, MCK_GR16 } },
- { X86::SHL8rCL, Convert__Reg1_2__Tie0, { MCK_shlb, MCK_CL, MCK_GR8 } },
- { X86::SHL8mCL, Convert__Mem5_2, { MCK_shlb, MCK_CL, MCK_Mem } },
- { X86::SHL8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_shlb, MCK_Imm, MCK_GR8 } },
- { X86::SHL8mi, Convert__Mem5_2__Imm1_1, { MCK_shlb, MCK_Imm, MCK_Mem } },
- { X86::SHL32rCL, Convert__Reg1_2__Tie0, { MCK_shll, MCK_CL, MCK_GR32 } },
- { X86::SHL32mCL, Convert__Mem5_2, { MCK_shll, MCK_CL, MCK_Mem } },
- { X86::SHL32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_shll, MCK_Imm, MCK_GR32 } },
- { X86::SHL32mi, Convert__Mem5_2__Imm1_1, { MCK_shll, MCK_Imm, MCK_Mem } },
- { X86::SHL64rCL, Convert__Reg1_2__Tie0, { MCK_shlq, MCK_CL, MCK_GR64 } },
- { X86::SHL64mCL, Convert__Mem5_2, { MCK_shlq, MCK_CL, MCK_Mem } },
- { X86::SHL64ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_shlq, MCK_Imm, MCK_GR64 } },
- { X86::SHL64mi, Convert__Mem5_2__Imm1_1, { MCK_shlq, MCK_Imm, MCK_Mem } },
- { X86::SHL16rCL, Convert__Reg1_2__Tie0, { MCK_shlw, MCK_CL, MCK_GR16 } },
- { X86::SHL16mCL, Convert__Mem5_2, { MCK_shlw, MCK_CL, MCK_Mem } },
- { X86::SHL16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_shlw, MCK_Imm, MCK_GR16 } },
- { X86::SHL16mi, Convert__Mem5_2__Imm1_1, { MCK_shlw, MCK_Imm, MCK_Mem } },
- { X86::SHR8rCL, Convert__Reg1_2__Tie0, { MCK_shrb, MCK_CL, MCK_GR8 } },
- { X86::SHR8mCL, Convert__Mem5_2, { MCK_shrb, MCK_CL, MCK_Mem } },
- { X86::SHR8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_shrb, MCK_Imm, MCK_GR8 } },
- { X86::SHR8mi, Convert__Mem5_2__Imm1_1, { MCK_shrb, MCK_Imm, MCK_Mem } },
- { X86::SHR32rCL, Convert__Reg1_2__Tie0, { MCK_shrl, MCK_CL, MCK_GR32 } },
- { X86::SHR32mCL, Convert__Mem5_2, { MCK_shrl, MCK_CL, MCK_Mem } },
- { X86::SHR32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_shrl, MCK_Imm, MCK_GR32 } },
- { X86::SHR32mi, Convert__Mem5_2__Imm1_1, { MCK_shrl, MCK_Imm, MCK_Mem } },
- { X86::SHR64rCL, Convert__Reg1_2__Tie0, { MCK_shrq, MCK_CL, MCK_GR64 } },
- { X86::SHR64mCL, Convert__Mem5_2, { MCK_shrq, MCK_CL, MCK_Mem } },
- { X86::SHR64ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_shrq, MCK_Imm, MCK_GR64 } },
- { X86::SHR64mi, Convert__Mem5_2__Imm1_1, { MCK_shrq, MCK_Imm, MCK_Mem } },
- { X86::SHR16rCL, Convert__Reg1_2__Tie0, { MCK_shrw, MCK_CL, MCK_GR16 } },
- { X86::SHR16mCL, Convert__Mem5_2, { MCK_shrw, MCK_CL, MCK_Mem } },
- { X86::SHR16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_shrw, MCK_Imm, MCK_GR16 } },
- { X86::SHR16mi, Convert__Mem5_2__Imm1_1, { MCK_shrw, MCK_Imm, MCK_Mem } },
- { X86::SQRTPDr, Convert__Reg1_2__Reg1_1, { MCK_sqrtpd, MCK_FR32, MCK_FR32 } },
- { X86::SQRTPDm, Convert__Reg1_2__Mem5_1, { MCK_sqrtpd, MCK_Mem, MCK_FR32 } },
- { X86::SQRTPSr, Convert__Reg1_2__Reg1_1, { MCK_sqrtps, MCK_FR32, MCK_FR32 } },
- { X86::SQRTPSm, Convert__Reg1_2__Mem5_1, { MCK_sqrtps, MCK_Mem, MCK_FR32 } },
- { X86::SQRTSDr, Convert__Reg1_2__Reg1_1, { MCK_sqrtsd, MCK_FR32, MCK_FR32 } },
- { X86::SQRTSDm, Convert__Reg1_2__Mem5_1, { MCK_sqrtsd, MCK_Mem, MCK_FR32 } },
- { X86::SQRTSSr, Convert__Reg1_2__Reg1_1, { MCK_sqrtss, MCK_FR32, MCK_FR32 } },
- { X86::SQRTSSm, Convert__Reg1_2__Mem5_1, { MCK_sqrtss, MCK_Mem, MCK_FR32 } },
- { X86::SUB8rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subb, MCK_GR8, MCK_GR8 } },
- { X86::SUB8rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subb, MCK_GR8, MCK_GR8 } },
- { X86::SUB8mr, Convert__Mem5_2__Reg1_1, { MCK_subb, MCK_GR8, MCK_Mem } },
- { X86::SUB8i8, Convert__Imm1_1, { MCK_subb, MCK_Imm, MCK_AL } },
- { X86::SUB8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_subb, MCK_Imm, MCK_GR8 } },
- { X86::SUB8mi, Convert__Mem5_2__Imm1_1, { MCK_subb, MCK_Imm, MCK_Mem } },
- { X86::SUB8rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_subb, MCK_Mem, MCK_GR8 } },
- { X86::SUB32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subl, MCK_GR32, MCK_GR32 } },
- { X86::SUB32rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subl, MCK_GR32, MCK_GR32 } },
- { X86::SUB32mr, Convert__Mem5_2__Reg1_1, { MCK_subl, MCK_GR32, MCK_Mem } },
- { X86::SUB32ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_subl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::SUB32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_subl, MCK_ImmSExt8, MCK_Mem } },
- { X86::SUB32i32, Convert__Imm1_1, { MCK_subl, MCK_Imm, MCK_EAX } },
- { X86::SUB32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_subl, MCK_Imm, MCK_GR32 } },
- { X86::SUB32mi, Convert__Mem5_2__Imm1_1, { MCK_subl, MCK_Imm, MCK_Mem } },
- { X86::SUB32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_subl, MCK_Mem, MCK_GR32 } },
- { X86::SUBPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subpd, MCK_FR32, MCK_FR32 } },
- { X86::SUBPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_subpd, MCK_Mem, MCK_FR32 } },
- { X86::SUBPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subps, MCK_FR32, MCK_FR32 } },
- { X86::SUBPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_subps, MCK_Mem, MCK_FR32 } },
- { X86::SUB64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subq, MCK_GR64, MCK_GR64 } },
- { X86::SUB64rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subq, MCK_GR64, MCK_GR64 } },
- { X86::SUB64mr, Convert__Mem5_2__Reg1_1, { MCK_subq, MCK_GR64, MCK_Mem } },
- { X86::SUB64ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_subq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::SUB64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_subq, MCK_ImmSExt8, MCK_Mem } },
- { X86::SUB64i32, Convert__Imm1_1, { MCK_subq, MCK_Imm, MCK_RAX } },
- { X86::SUB64ri32, Convert__Reg1_2__Tie0__Imm1_1, { MCK_subq, MCK_Imm, MCK_GR64 } },
- { X86::SUB64mi32, Convert__Mem5_2__Imm1_1, { MCK_subq, MCK_Imm, MCK_Mem } },
- { X86::SUB64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_subq, MCK_Mem, MCK_GR64 } },
- { X86::SUBSDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subsd, MCK_FR32, MCK_FR32 } },
- { X86::SUBSDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_subsd, MCK_Mem, MCK_FR32 } },
- { X86::SUBSSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subss, MCK_FR32, MCK_FR32 } },
- { X86::SUBSSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_subss, MCK_Mem, MCK_FR32 } },
- { X86::SUB16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subw, MCK_GR16, MCK_GR16 } },
- { X86::SUB16rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_subw, MCK_GR16, MCK_GR16 } },
- { X86::SUB16mr, Convert__Mem5_2__Reg1_1, { MCK_subw, MCK_GR16, MCK_Mem } },
- { X86::SUB16ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_subw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::SUB16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_subw, MCK_ImmSExt8, MCK_Mem } },
- { X86::SUB16i16, Convert__Imm1_1, { MCK_subw, MCK_Imm, MCK_AX } },
- { X86::SUB16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_subw, MCK_Imm, MCK_GR16 } },
- { X86::SUB16mi, Convert__Mem5_2__Imm1_1, { MCK_subw, MCK_Imm, MCK_Mem } },
- { X86::SUB16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_subw, MCK_Mem, MCK_GR16 } },
- { X86::TEST8rr, Convert__Reg1_2__Reg1_1, { MCK_testb, MCK_GR8, MCK_GR8 } },
- { X86::TEST8i8, Convert__Imm1_1, { MCK_testb, MCK_Imm, MCK_AL } },
- { X86::TEST8ri, Convert__Reg1_2__Imm1_1, { MCK_testb, MCK_Imm, MCK_GR8 } },
- { X86::TEST8mi, Convert__Mem5_2__Imm1_1, { MCK_testb, MCK_Imm, MCK_Mem } },
- { X86::TEST8rm, Convert__Reg1_2__Mem5_1, { MCK_testb, MCK_Mem, MCK_GR8 } },
- { X86::TEST32rr, Convert__Reg1_2__Reg1_1, { MCK_testl, MCK_GR32, MCK_GR32 } },
- { X86::TEST32i32, Convert__Imm1_1, { MCK_testl, MCK_Imm, MCK_EAX } },
- { X86::TEST32ri, Convert__Reg1_2__Imm1_1, { MCK_testl, MCK_Imm, MCK_GR32 } },
- { X86::TEST32mi, Convert__Mem5_2__Imm1_1, { MCK_testl, MCK_Imm, MCK_Mem } },
- { X86::TEST32rm, Convert__Reg1_2__Mem5_1, { MCK_testl, MCK_Mem, MCK_GR32 } },
- { X86::TEST64rr, Convert__Reg1_2__Reg1_1, { MCK_testq, MCK_GR64, MCK_GR64 } },
- { X86::TEST64i32, Convert__Imm1_1, { MCK_testq, MCK_Imm, MCK_RAX } },
- { X86::TEST64ri32, Convert__Reg1_2__Imm1_1, { MCK_testq, MCK_Imm, MCK_GR64 } },
- { X86::TEST64mi32, Convert__Mem5_2__Imm1_1, { MCK_testq, MCK_Imm, MCK_Mem } },
- { X86::TEST64rm, Convert__Reg1_2__Mem5_1, { MCK_testq, MCK_Mem, MCK_GR64 } },
- { X86::TEST16rr, Convert__Reg1_2__Reg1_1, { MCK_testw, MCK_GR16, MCK_GR16 } },
- { X86::TEST16i16, Convert__Imm1_1, { MCK_testw, MCK_Imm, MCK_AX } },
- { X86::TEST16ri, Convert__Reg1_2__Imm1_1, { MCK_testw, MCK_Imm, MCK_GR16 } },
- { X86::TEST16mi, Convert__Mem5_2__Imm1_1, { MCK_testw, MCK_Imm, MCK_Mem } },
- { X86::TEST16rm, Convert__Reg1_2__Mem5_1, { MCK_testw, MCK_Mem, MCK_GR16 } },
- { X86::UCOMISDrr, Convert__Reg1_2__Reg1_1, { MCK_ucomisd, MCK_FR32, MCK_FR32 } },
- { X86::UCOMISDrm, Convert__Reg1_2__Mem5_1, { MCK_ucomisd, MCK_Mem, MCK_FR32 } },
- { X86::UCOMISSrr, Convert__Reg1_2__Reg1_1, { MCK_ucomiss, MCK_FR32, MCK_FR32 } },
- { X86::UCOMISSrm, Convert__Reg1_2__Mem5_1, { MCK_ucomiss, MCK_Mem, MCK_FR32 } },
- { X86::UNPCKHPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_unpckhpd, MCK_FR32, MCK_FR32 } },
- { X86::UNPCKHPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_unpckhpd, MCK_Mem, MCK_FR32 } },
- { X86::UNPCKHPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_unpckhps, MCK_FR32, MCK_FR32 } },
- { X86::UNPCKHPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_unpckhps, MCK_Mem, MCK_FR32 } },
- { X86::UNPCKLPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_unpcklpd, MCK_FR32, MCK_FR32 } },
- { X86::UNPCKLPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_unpcklpd, MCK_Mem, MCK_FR32 } },
- { X86::UNPCKLPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_unpcklps, MCK_FR32, MCK_FR32 } },
- { X86::UNPCKLPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_unpcklps, MCK_Mem, MCK_FR32 } },
- { X86::VMREAD32rr, Convert__Reg1_2__Reg1_1, { MCK_vmreadl, MCK_GR32, MCK_GR32 } },
- { X86::VMREAD32rm, Convert__Mem5_2__Reg1_1, { MCK_vmreadl, MCK_GR32, MCK_Mem } },
- { X86::VMREAD64rr, Convert__Reg1_2__Reg1_1, { MCK_vmreadq, MCK_GR64, MCK_GR64 } },
- { X86::VMREAD64rm, Convert__Mem5_2__Reg1_1, { MCK_vmreadq, MCK_GR64, MCK_Mem } },
- { X86::VMWRITE32rr, Convert__Reg1_2__Reg1_1, { MCK_vmwritel, MCK_GR32, MCK_GR32 } },
- { X86::VMWRITE32rm, Convert__Reg1_2__Mem5_1, { MCK_vmwritel, MCK_Mem, MCK_GR32 } },
- { X86::VMWRITE64rr, Convert__Reg1_2__Reg1_1, { MCK_vmwriteq, MCK_GR64, MCK_GR64 } },
- { X86::VMWRITE64rm, Convert__Reg1_2__Mem5_1, { MCK_vmwriteq, MCK_Mem, MCK_GR64 } },
- { X86::XADD8rr, Convert__Reg1_2__Reg1_1, { MCK_xaddb, MCK_GR8, MCK_GR8 } },
- { X86::XADD8rm, Convert__Mem5_2__Reg1_1, { MCK_xaddb, MCK_GR8, MCK_Mem } },
- { X86::XADD32rr, Convert__Reg1_2__Reg1_1, { MCK_xaddl, MCK_GR32, MCK_GR32 } },
- { X86::XADD32rm, Convert__Mem5_2__Reg1_1, { MCK_xaddl, MCK_GR32, MCK_Mem } },
- { X86::XADD64rr, Convert__Reg1_2__Reg1_1, { MCK_xaddq, MCK_GR64, MCK_GR64 } },
- { X86::XADD64rm, Convert__Mem5_2__Reg1_1, { MCK_xaddq, MCK_GR64, MCK_Mem } },
- { X86::XADD16rr, Convert__Reg1_2__Reg1_1, { MCK_xaddw, MCK_GR16, MCK_GR16 } },
- { X86::XADD16rm, Convert__Mem5_2__Reg1_1, { MCK_xaddw, MCK_GR16, MCK_Mem } },
- { X86::XCHG8rr, Convert__Reg1_1__Tie0__Reg1_2, { MCK_xchgb, MCK_GR8, MCK_GR8 } },
- { X86::XCHG8rm, Convert__Reg1_1__Tie0__Mem5_2, { MCK_xchgb, MCK_GR8, MCK_Mem } },
- { X86::XCHG32ar, Convert__Reg1_1, { MCK_xchgl, MCK_GR32, MCK_EAX } },
- { X86::XCHG32rr, Convert__Reg1_1__Tie0__Reg1_2, { MCK_xchgl, MCK_GR32, MCK_GR32 } },
- { X86::XCHG32rm, Convert__Reg1_1__Tie0__Mem5_2, { MCK_xchgl, MCK_GR32, MCK_Mem } },
- { X86::XCHG64ar, Convert__Reg1_1, { MCK_xchgq, MCK_GR64, MCK_RAX } },
- { X86::XCHG64rr, Convert__Reg1_1__Tie0__Reg1_2, { MCK_xchgq, MCK_GR64, MCK_GR64 } },
- { X86::XCHG64rm, Convert__Reg1_1__Tie0__Mem5_2, { MCK_xchgq, MCK_GR64, MCK_Mem } },
- { X86::XCHG16ar, Convert__Reg1_1, { MCK_xchgw, MCK_GR16, MCK_AX } },
- { X86::XCHG16rr, Convert__Reg1_1__Tie0__Reg1_2, { MCK_xchgw, MCK_GR16, MCK_GR16 } },
- { X86::XCHG16rm, Convert__Reg1_1__Tie0__Mem5_2, { MCK_xchgw, MCK_GR16, MCK_Mem } },
- { X86::XOR8rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorb, MCK_GR8, MCK_GR8 } },
- { X86::XOR8rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorb, MCK_GR8, MCK_GR8 } },
- { X86::XOR8mr, Convert__Mem5_2__Reg1_1, { MCK_xorb, MCK_GR8, MCK_Mem } },
- { X86::XOR8i8, Convert__Imm1_1, { MCK_xorb, MCK_Imm, MCK_AL } },
- { X86::XOR8ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_xorb, MCK_Imm, MCK_GR8 } },
- { X86::XOR8mi, Convert__Mem5_2__Imm1_1, { MCK_xorb, MCK_Imm, MCK_Mem } },
- { X86::XOR8rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_xorb, MCK_Mem, MCK_GR8 } },
- { X86::XOR32rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorl, MCK_GR32, MCK_GR32 } },
- { X86::XOR32rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorl, MCK_GR32, MCK_GR32 } },
- { X86::XOR32mr, Convert__Mem5_2__Reg1_1, { MCK_xorl, MCK_GR32, MCK_Mem } },
- { X86::XOR32ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_xorl, MCK_ImmSExt8, MCK_GR32 } },
- { X86::XOR32mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_xorl, MCK_ImmSExt8, MCK_Mem } },
- { X86::XOR32i32, Convert__Imm1_1, { MCK_xorl, MCK_Imm, MCK_EAX } },
- { X86::XOR32ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_xorl, MCK_Imm, MCK_GR32 } },
- { X86::XOR32mi, Convert__Mem5_2__Imm1_1, { MCK_xorl, MCK_Imm, MCK_Mem } },
- { X86::XOR32rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_xorl, MCK_Mem, MCK_GR32 } },
- { X86::FsXORPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorpd, MCK_FR32, MCK_FR32 } },
- { X86::XORPDrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorpd, MCK_FR32, MCK_FR32 } },
- { X86::FsXORPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_xorpd, MCK_Mem, MCK_FR32 } },
- { X86::XORPDrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_xorpd, MCK_Mem, MCK_FR32 } },
- { X86::FsXORPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorps, MCK_FR32, MCK_FR32 } },
- { X86::XORPSrr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorps, MCK_FR32, MCK_FR32 } },
- { X86::FsXORPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_xorps, MCK_Mem, MCK_FR32 } },
- { X86::XORPSrm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_xorps, MCK_Mem, MCK_FR32 } },
- { X86::XOR64rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorq, MCK_GR64, MCK_GR64 } },
- { X86::XOR64rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorq, MCK_GR64, MCK_GR64 } },
- { X86::XOR64mr, Convert__Mem5_2__Reg1_1, { MCK_xorq, MCK_GR64, MCK_Mem } },
- { X86::XOR64ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_xorq, MCK_ImmSExt8, MCK_GR64 } },
- { X86::XOR64mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_xorq, MCK_ImmSExt8, MCK_Mem } },
- { X86::XOR64i32, Convert__Imm1_1, { MCK_xorq, MCK_Imm, MCK_RAX } },
- { X86::XOR64ri32, Convert__Reg1_2__Tie0__Imm1_1, { MCK_xorq, MCK_Imm, MCK_GR64 } },
- { X86::XOR64mi32, Convert__Mem5_2__Imm1_1, { MCK_xorq, MCK_Imm, MCK_Mem } },
- { X86::XOR64rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_xorq, MCK_Mem, MCK_GR64 } },
- { X86::XOR16rr, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorw, MCK_GR16, MCK_GR16 } },
- { X86::XOR16rr_REV, Convert__Reg1_2__Tie0__Reg1_1, { MCK_xorw, MCK_GR16, MCK_GR16 } },
- { X86::XOR16mr, Convert__Mem5_2__Reg1_1, { MCK_xorw, MCK_GR16, MCK_Mem } },
- { X86::XOR16ri8, Convert__Reg1_2__Tie0__ImmSExt81_1, { MCK_xorw, MCK_ImmSExt8, MCK_GR16 } },
- { X86::XOR16mi8, Convert__Mem5_2__ImmSExt81_1, { MCK_xorw, MCK_ImmSExt8, MCK_Mem } },
- { X86::XOR16i16, Convert__Imm1_1, { MCK_xorw, MCK_Imm, MCK_AX } },
- { X86::XOR16ri, Convert__Reg1_2__Tie0__Imm1_1, { MCK_xorw, MCK_Imm, MCK_GR16 } },
- { X86::XOR16mi, Convert__Mem5_2__Imm1_1, { MCK_xorw, MCK_Imm, MCK_Mem } },
- { X86::XOR16rm, Convert__Reg1_2__Tie0__Mem5_1, { MCK_xorw, MCK_Mem, MCK_GR16 } },
- { X86::BLENDPDrri, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_blendpd, MCK_ImmSExt8, MCK_FR32, MCK_FR32 } },
- { X86::BLENDPDrmi, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_blendpd, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::BLENDPSrri, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_blendps, MCK_ImmSExt8, MCK_FR32, MCK_FR32 } },
- { X86::BLENDPSrmi, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_blendps, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::BLENDVPDrr0, Convert__Reg1_3__Tie0__Reg1_2, { MCK_blendvpd, MCK_XMM0, MCK_FR32, MCK_FR32 } },
- { X86::BLENDVPDrm0, Convert__Reg1_3__Tie0__Mem5_2, { MCK_blendvpd, MCK_XMM0, MCK_Mem, MCK_FR32 } },
- { X86::BLENDVPSrr0, Convert__Reg1_3__Tie0__Reg1_2, { MCK_blendvps, MCK_XMM0, MCK_FR32, MCK_FR32 } },
- { X86::BLENDVPSrm0, Convert__Reg1_3__Tie0__Mem5_2, { MCK_blendvps, MCK_XMM0, MCK_Mem, MCK_FR32 } },
- { X86::DPPDrri, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_dppd, MCK_ImmSExt8, MCK_FR32, MCK_FR32 } },
- { X86::DPPDrmi, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_dppd, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::DPPSrri, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_dpps, MCK_ImmSExt8, MCK_FR32, MCK_FR32 } },
- { X86::DPPSrmi, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_dpps, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::EXTRACTPSrr, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_extractps, MCK_ImmSExt8, MCK_FR32, MCK_GR32 } },
- { X86::EXTRACTPSmr, Convert__Mem5_3__Reg1_2__ImmSExt81_1, { MCK_extractps, MCK_ImmSExt8, MCK_FR32, MCK_Mem } },
- { X86::IMUL32rri8, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_imull, MCK_ImmSExt8, MCK_GR32, MCK_GR32 } },
- { X86::IMUL32rmi8, Convert__Reg1_3__Mem5_2__ImmSExt81_1, { MCK_imull, MCK_ImmSExt8, MCK_Mem, MCK_GR32 } },
- { X86::IMUL32rri, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_imull, MCK_Imm, MCK_GR32, MCK_GR32 } },
- { X86::IMUL32rmi, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_imull, MCK_Imm, MCK_Mem, MCK_GR32 } },
- { X86::IMUL64rri8, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_imulq, MCK_ImmSExt8, MCK_GR64, MCK_GR64 } },
- { X86::IMUL64rmi8, Convert__Reg1_3__Mem5_2__ImmSExt81_1, { MCK_imulq, MCK_ImmSExt8, MCK_Mem, MCK_GR64 } },
- { X86::IMUL64rri32, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_imulq, MCK_Imm, MCK_GR64, MCK_GR64 } },
- { X86::IMUL64rmi32, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_imulq, MCK_Imm, MCK_Mem, MCK_GR64 } },
- { X86::IMUL16rri8, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_imulw, MCK_ImmSExt8, MCK_GR16, MCK_GR16 } },
- { X86::IMUL16rmi8, Convert__Reg1_3__Mem5_2__ImmSExt81_1, { MCK_imulw, MCK_ImmSExt8, MCK_Mem, MCK_GR16 } },
- { X86::IMUL16rri, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_imulw, MCK_Imm, MCK_GR16, MCK_GR16 } },
- { X86::IMUL16rmi, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_imulw, MCK_Imm, MCK_Mem, MCK_GR16 } },
- { X86::INSERTPSrr, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_insertps, MCK_ImmSExt8, MCK_FR32, MCK_FR32 } },
- { X86::INSERTPSrm, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_insertps, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::MPSADBWrri, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_mpsadbw, MCK_ImmSExt8, MCK_FR32, MCK_FR32 } },
- { X86::MPSADBWrmi, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_mpsadbw, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::PALIGNR64rr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_palignr, MCK_Imm, MCK_VR64, MCK_VR64 } },
- { X86::PALIGNR128rr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_palignr, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PALIGNR64rm, Convert__Reg1_3__Tie0__Mem5_2__Imm1_1, { MCK_palignr, MCK_Imm, MCK_Mem, MCK_VR64 } },
- { X86::PALIGNR128rm, Convert__Reg1_3__Tie0__Mem5_2__Imm1_1, { MCK_palignr, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PBLENDVBrr0, Convert__Reg1_3__Tie0__Reg1_2, { MCK_pblendvb, MCK_XMM0, MCK_FR32, MCK_FR32 } },
- { X86::PBLENDVBrm0, Convert__Reg1_3__Tie0__Mem5_2, { MCK_pblendvb, MCK_XMM0, MCK_Mem, MCK_FR32 } },
- { X86::PBLENDWrri, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_pblendw, MCK_ImmSExt8, MCK_FR32, MCK_FR32 } },
- { X86::PBLENDWrmi, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_pblendw, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::PCMPESTRIArr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPESTRICrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPESTRIOrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPESTRISrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPESTRIZrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPESTRIrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPESTRIArm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPESTRICrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPESTRIOrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPESTRISrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPESTRIZrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPESTRIrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpestri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPESTRM128rr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpestrm, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPESTRM128rm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpestrm, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPISTRIArr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPISTRICrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPISTRIOrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPISTRISrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPISTRIZrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPISTRIrr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPISTRIArm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPISTRICrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPISTRIOrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPISTRISrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPISTRIZrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPISTRIrm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpistri, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PCMPISTRM128rr, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pcmpistrm, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PCMPISTRM128rm, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pcmpistrm, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PEXTRBrr, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_pextrb, MCK_ImmSExt8, MCK_FR32, MCK_GR32 } },
- { X86::PEXTRBmr, Convert__Mem5_3__Reg1_2__ImmSExt81_1, { MCK_pextrb, MCK_ImmSExt8, MCK_FR32, MCK_Mem } },
- { X86::PEXTRDrr, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_pextrd, MCK_ImmSExt8, MCK_FR32, MCK_GR32 } },
- { X86::PEXTRDmr, Convert__Mem5_3__Reg1_2__ImmSExt81_1, { MCK_pextrd, MCK_ImmSExt8, MCK_FR32, MCK_Mem } },
- { X86::PEXTRQrr, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_pextrq, MCK_ImmSExt8, MCK_FR32, MCK_GR64 } },
- { X86::PEXTRQmr, Convert__Mem5_3__Reg1_2__ImmSExt81_1, { MCK_pextrq, MCK_ImmSExt8, MCK_FR32, MCK_Mem } },
- { X86::MMX_PEXTRWri, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_pextrw, MCK_ImmSExt8, MCK_VR64, MCK_GR32 } },
- { X86::PEXTRWri, Convert__Reg1_3__Reg1_2__ImmSExt81_1, { MCK_pextrw, MCK_ImmSExt8, MCK_FR32, MCK_GR32 } },
- { X86::PEXTRWmr, Convert__Mem5_3__Reg1_2__ImmSExt81_1, { MCK_pextrw, MCK_ImmSExt8, MCK_FR32, MCK_Mem } },
- { X86::PINSRBrr, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_pinsrb, MCK_ImmSExt8, MCK_GR32, MCK_FR32 } },
- { X86::PINSRBrm, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_pinsrb, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::PINSRDrr, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_pinsrd, MCK_ImmSExt8, MCK_GR32, MCK_FR32 } },
- { X86::PINSRDrm, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_pinsrd, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::PINSRQrr, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_pinsrq, MCK_ImmSExt8, MCK_GR64, MCK_FR32 } },
- { X86::PINSRQrm, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_pinsrq, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PINSRWrri, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_pinsrw, MCK_ImmSExt8, MCK_GR32, MCK_VR64 } },
- { X86::PINSRWrri, Convert__Reg1_3__Tie0__Reg1_2__ImmSExt81_1, { MCK_pinsrw, MCK_ImmSExt8, MCK_GR32, MCK_FR32 } },
- { X86::MMX_PINSRWrmi, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_pinsrw, MCK_ImmSExt8, MCK_Mem, MCK_VR64 } },
- { X86::PINSRWrmi, Convert__Reg1_3__Tie0__Mem5_2__ImmSExt81_1, { MCK_pinsrw, MCK_ImmSExt8, MCK_Mem, MCK_FR32 } },
- { X86::PSHUFDri, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pshufd, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PSHUFDmi, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pshufd, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PSHUFHWri, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pshufhw, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PSHUFHWmi, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pshufhw, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::PSHUFLWri, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pshuflw, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::PSHUFLWmi, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pshuflw, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::MMX_PSHUFWri, Convert__Reg1_3__Reg1_2__Imm1_1, { MCK_pshufw, MCK_Imm, MCK_VR64, MCK_VR64 } },
- { X86::MMX_PSHUFWmi, Convert__Reg1_3__Mem5_2__Imm1_1, { MCK_pshufw, MCK_Imm, MCK_Mem, MCK_VR64 } },
- { X86::SHLD32rrCL, Convert__Reg1_3__Tie0__Reg1_2, { MCK_shldl, MCK_CL, MCK_GR32, MCK_GR32 } },
- { X86::SHLD32mrCL, Convert__Mem5_3__Reg1_2, { MCK_shldl, MCK_CL, MCK_GR32, MCK_Mem } },
- { X86::SHLD32rri8, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_shldl, MCK_Imm, MCK_GR32, MCK_GR32 } },
- { X86::SHLD32mri8, Convert__Mem5_3__Reg1_2__Imm1_1, { MCK_shldl, MCK_Imm, MCK_GR32, MCK_Mem } },
- { X86::SHLD64rrCL, Convert__Reg1_3__Tie0__Reg1_2, { MCK_shldq, MCK_CL, MCK_GR64, MCK_GR64 } },
- { X86::SHLD64mrCL, Convert__Mem5_3__Reg1_2, { MCK_shldq, MCK_CL, MCK_GR64, MCK_Mem } },
- { X86::SHLD64rri8, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_shldq, MCK_Imm, MCK_GR64, MCK_GR64 } },
- { X86::SHLD64mri8, Convert__Mem5_3__Reg1_2__Imm1_1, { MCK_shldq, MCK_Imm, MCK_GR64, MCK_Mem } },
- { X86::SHLD16rrCL, Convert__Reg1_3__Tie0__Reg1_2, { MCK_shldw, MCK_CL, MCK_GR16, MCK_GR16 } },
- { X86::SHLD16mrCL, Convert__Mem5_3__Reg1_2, { MCK_shldw, MCK_CL, MCK_GR16, MCK_Mem } },
- { X86::SHLD16rri8, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_shldw, MCK_Imm, MCK_GR16, MCK_GR16 } },
- { X86::SHLD16mri8, Convert__Mem5_3__Reg1_2__Imm1_1, { MCK_shldw, MCK_Imm, MCK_GR16, MCK_Mem } },
- { X86::SHRD32rrCL, Convert__Reg1_3__Tie0__Reg1_2, { MCK_shrdl, MCK_CL, MCK_GR32, MCK_GR32 } },
- { X86::SHRD32mrCL, Convert__Mem5_3__Reg1_2, { MCK_shrdl, MCK_CL, MCK_GR32, MCK_Mem } },
- { X86::SHRD32rri8, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_shrdl, MCK_Imm, MCK_GR32, MCK_GR32 } },
- { X86::SHRD32mri8, Convert__Mem5_3__Reg1_2__Imm1_1, { MCK_shrdl, MCK_Imm, MCK_GR32, MCK_Mem } },
- { X86::SHRD64rrCL, Convert__Reg1_3__Tie0__Reg1_2, { MCK_shrdq, MCK_CL, MCK_GR64, MCK_GR64 } },
- { X86::SHRD64mrCL, Convert__Mem5_3__Reg1_2, { MCK_shrdq, MCK_CL, MCK_GR64, MCK_Mem } },
- { X86::SHRD64rri8, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_shrdq, MCK_Imm, MCK_GR64, MCK_GR64 } },
- { X86::SHRD64mri8, Convert__Mem5_3__Reg1_2__Imm1_1, { MCK_shrdq, MCK_Imm, MCK_GR64, MCK_Mem } },
- { X86::SHRD16rrCL, Convert__Reg1_3__Tie0__Reg1_2, { MCK_shrdw, MCK_CL, MCK_GR16, MCK_GR16 } },
- { X86::SHRD16mrCL, Convert__Mem5_3__Reg1_2, { MCK_shrdw, MCK_CL, MCK_GR16, MCK_Mem } },
- { X86::SHRD16rri8, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_shrdw, MCK_Imm, MCK_GR16, MCK_GR16 } },
- { X86::SHRD16mri8, Convert__Mem5_3__Reg1_2__Imm1_1, { MCK_shrdw, MCK_Imm, MCK_GR16, MCK_Mem } },
- { X86::SHUFPDrri, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_shufpd, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::SHUFPDrmi, Convert__Reg1_3__Tie0__Mem5_2__Imm1_1, { MCK_shufpd, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::SHUFPSrri, Convert__Reg1_3__Tie0__Reg1_2__Imm1_1, { MCK_shufps, MCK_Imm, MCK_FR32, MCK_FR32 } },
- { X86::SHUFPSrmi, Convert__Reg1_3__Tie0__Mem5_2__Imm1_1, { MCK_shufps, MCK_Imm, MCK_Mem, MCK_FR32 } },
- { X86::CMPPDrri, Convert__Reg1_4__Tie0__Reg1_3__Imm1_1, { MCK_cmp, MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 } },
- { X86::CMPPDrmi, Convert__Reg1_4__Tie0__Mem5_3__Imm1_1, { MCK_cmp, MCK_Imm, MCK_pd, MCK_Mem, MCK_FR32 } },
- { X86::CMPPSrri, Convert__Reg1_4__Tie0__Reg1_3__Imm1_1, { MCK_cmp, MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 } },
- { X86::CMPPSrmi, Convert__Reg1_4__Tie0__Mem5_3__Imm1_1, { MCK_cmp, MCK_Imm, MCK_ps, MCK_Mem, MCK_FR32 } },
- { X86::CMPSDrr, Convert__Reg1_4__Tie0__Reg1_3__Imm1_1, { MCK_cmp, MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 } },
- { X86::CMPSDrm, Convert__Reg1_4__Tie0__Mem5_3__Imm1_1, { MCK_cmp, MCK_Imm, MCK_sd, MCK_Mem, MCK_FR32 } },
- { X86::CMPSSrr, Convert__Reg1_4__Tie0__Reg1_3__Imm1_1, { MCK_cmp, MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 } },
- { X86::CMPSSrm, Convert__Reg1_4__Tie0__Mem5_3__Imm1_1, { MCK_cmp, MCK_Imm, MCK_ss, MCK_Mem, MCK_FR32 } },
- };
-
- // Eliminate obvious mismatches.
- if (Operands.size() > 5)
- return true;
-
- // Compute the class list for this operand vector.
- MatchClassKind Classes[5];
- for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
- Classes[i] = ClassifyOperand(Operands[i]);
-
- // Check for invalid operands before matching.
- if (Classes[i] == InvalidMatchClass)
- return true;
- }
-
- // Mark unused classes.
- for (unsigned i = Operands.size(), e = 5; i != e; ++i)
- Classes[i] = InvalidMatchClass;
-
- // Search the table.
- for (const MatchEntry *it = MatchTable, *ie = MatchTable + 2037; it != ie; ++it) {
- if (!IsSubclass(Classes[0], it->Classes[0]))
- continue;
- if (!IsSubclass(Classes[1], it->Classes[1]))
- continue;
- if (!IsSubclass(Classes[2], it->Classes[2]))
- continue;
- if (!IsSubclass(Classes[3], it->Classes[3]))
- continue;
- if (!IsSubclass(Classes[4], it->Classes[4]))
- continue;
-
- return ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
- }
-
- return true;
-}
-
-#endif // REGISTERS_ONLY
diff --git a/libclamav/c++/X86GenAsmWriter.inc b/libclamav/c++/X86GenAsmWriter.inc
deleted file mode 100644
index 2382a9e..0000000
--- a/libclamav/c++/X86GenAsmWriter.inc
+++ /dev/null
@@ -1,3954 +0,0 @@
-//===- TableGen'erated file -------------------------------------*- C++ -*-===//
-//
-// Assembly Writer Source Fragment
-//
-// Automatically generated file, do not edit!
-//
-//===----------------------------------------------------------------------===//
-
-/// printInstruction - This method is automatically generated by tablegen
-/// from the instruction set description.
-void X86ATTInstPrinter::printInstruction(const MachineInstr *MI) {
- static const unsigned OpInfo[] = {
- 0U, // PHI
- 0U, // INLINEASM
- 0U, // DBG_LABEL
- 0U, // EH_LABEL
- 0U, // GC_LABEL
- 0U, // KILL
- 0U, // EXTRACT_SUBREG
- 0U, // INSERT_SUBREG
- 0U, // IMPLICIT_DEF
- 0U, // SUBREG_TO_REG
- 0U, // COPY_TO_REGCLASS
- 1U, // DBG_VALUE
- 11U, // ABS_F
- 0U, // ABS_Fp32
- 0U, // ABS_Fp64
- 0U, // ABS_Fp80
- 67108880U, // ADC16i16
- 136314896U, // ADC16mi
- 136314896U, // ADC16mi8
- 136314896U, // ADC16mr
- 205651984U, // ADC16ri
- 205651984U, // ADC16ri8
- 272760848U, // ADC16rm
- 205651984U, // ADC16rr
- 205651984U, // ADC16rr_REV
- 73400342U, // ADC32i32
- 136577046U, // ADC32mi
- 136577046U, // ADC32mi8
- 136577046U, // ADC32mr
- 205651990U, // ADC32ri
- 205651990U, // ADC32ri8
- 339869718U, // ADC32rm
- 205651990U, // ADC32rr
- 205651990U, // ADC32rr_REV
- 75497500U, // ADC64i32
- 136708124U, // ADC64mi32
- 136708124U, // ADC64mi8
- 136708124U, // ADC64mr
- 205651996U, // ADC64ri32
- 205651996U, // ADC64ri8
- 406978588U, // ADC64rm
- 205651996U, // ADC64rr
- 205651996U, // ADC64rr_REV
- 77594658U, // ADC8i8
- 136839202U, // ADC8mi
- 136839202U, // ADC8mr
- 205652002U, // ADC8ri
- 474087458U, // ADC8rm
- 205652002U, // ADC8rr
- 205652002U, // ADC8rr_REV
- 67108904U, // ADD16i16
- 136314920U, // ADD16mi
- 136314920U, // ADD16mi8
- 136314920U, // ADD16mr
- 205652008U, // ADD16mrmrr
- 205652008U, // ADD16ri
- 205652008U, // ADD16ri8
- 272760872U, // ADD16rm
- 205652008U, // ADD16rr
- 73400366U, // ADD32i32
- 136577070U, // ADD32mi
- 136577070U, // ADD32mi8
- 136577070U, // ADD32mr
- 205652014U, // ADD32mrmrr
- 205652014U, // ADD32ri
- 205652014U, // ADD32ri8
- 339869742U, // ADD32rm
- 205652014U, // ADD32rr
- 75497524U, // ADD64i32
- 136708148U, // ADD64mi32
- 136708148U, // ADD64mi8
- 136708148U, // ADD64mr
- 205652014U, // ADD64mrmrr
- 205652020U, // ADD64ri32
- 205652020U, // ADD64ri8
- 406978612U, // ADD64rm
- 205652020U, // ADD64rr
- 77594682U, // ADD8i8
- 136839226U, // ADD8mi
- 136839226U, // ADD8mr
- 205652026U, // ADD8mrmrr
- 205652026U, // ADD8ri
- 474087482U, // ADD8rm
- 205652026U, // ADD8rr
- 536870976U, // ADDPDrm
- 205652032U, // ADDPDrr
- 536870983U, // ADDPSrm
- 205652039U, // ADDPSrr
- 603979854U, // ADDSDrm
- 603979854U, // ADDSDrm_Int
- 205652046U, // ADDSDrr
- 205652046U, // ADDSDrr_Int
- 671088725U, // ADDSSrm
- 671088725U, // ADDSSrm_Int
- 205652053U, // ADDSSrr
- 205652053U, // ADDSSrr_Int
- 536871004U, // ADDSUBPDrm
- 205652060U, // ADDSUBPDrr
- 536871014U, // ADDSUBPSrm
- 205652070U, // ADDSUBPSrr
- 738197616U, // ADD_F32m
- 805306487U, // ADD_F64m
- 872415358U, // ADD_FI16m
- 952107142U, // ADD_FI32m
- 79691918U, // ADD_FPrST0
- 79691925U, // ADD_FST0r
- 0U, // ADD_Fp32
- 0U, // ADD_Fp32m
- 0U, // ADD_Fp64
- 0U, // ADD_Fp64m
- 0U, // ADD_Fp64m32
- 0U, // ADD_Fp80
- 0U, // ADD_Fp80m32
- 0U, // ADD_Fp80m64
- 0U, // ADD_FpI16m32
- 0U, // ADD_FpI16m64
- 0U, // ADD_FpI16m80
- 0U, // ADD_FpI32m32
- 0U, // ADD_FpI32m64
- 0U, // ADD_FpI32m80
- 79691931U, // ADD_FrST0
- 169U, // ADJCALLSTACKDOWN32
- 169U, // ADJCALLSTACKDOWN64
- 187U, // ADJCALLSTACKUP32
- 187U, // ADJCALLSTACKUP64
- 67109067U, // AND16i16
- 136315083U, // AND16mi
- 136315083U, // AND16mi8
- 136315083U, // AND16mr
- 205652171U, // AND16ri
- 205652171U, // AND16ri8
- 272761035U, // AND16rm
- 205652171U, // AND16rr
- 205652171U, // AND16rr_REV
- 73400529U, // AND32i32
- 136577233U, // AND32mi
- 136577233U, // AND32mi8
- 136577233U, // AND32mr
- 205652177U, // AND32ri
- 205652177U, // AND32ri8
- 339869905U, // AND32rm
- 205652177U, // AND32rr
- 205652177U, // AND32rr_REV
- 75497687U, // AND64i32
- 136708311U, // AND64mi32
- 136708311U, // AND64mi8
- 136708311U, // AND64mr
- 205652183U, // AND64ri32
- 205652183U, // AND64ri8
- 406978775U, // AND64rm
- 205652183U, // AND64rr
- 205652183U, // AND64rr_REV
- 77594845U, // AND8i8
- 136839389U, // AND8mi
- 136839389U, // AND8mr
- 205652189U, // AND8ri
- 474087645U, // AND8rm
- 205652189U, // AND8rr
- 205652189U, // AND8rr_REV
- 536871139U, // ANDNPDrm
- 205652195U, // ANDNPDrr
- 536871147U, // ANDNPSrm
- 205652203U, // ANDNPSrr
- 536871155U, // ANDPDrm
- 205652211U, // ANDPDrr
- 536871162U, // ANDPSrm
- 205652218U, // ANDPSrr
- 257U, // ATOMADD6432
- 278U, // ATOMAND16
- 297U, // ATOMAND32
- 316U, // ATOMAND64
- 335U, // ATOMAND6432
- 356U, // ATOMAND8
- 374U, // ATOMMAX16
- 393U, // ATOMMAX32
- 412U, // ATOMMAX64
- 431U, // ATOMMIN16
- 450U, // ATOMMIN32
- 469U, // ATOMMIN64
- 488U, // ATOMNAND16
- 508U, // ATOMNAND32
- 528U, // ATOMNAND64
- 548U, // ATOMNAND6432
- 570U, // ATOMNAND8
- 589U, // ATOMOR16
- 607U, // ATOMOR32
- 625U, // ATOMOR64
- 643U, // ATOMOR6432
- 663U, // ATOMOR8
- 680U, // ATOMSUB6432
- 701U, // ATOMSWAP6432
- 723U, // ATOMUMAX16
- 743U, // ATOMUMAX32
- 763U, // ATOMUMAX64
- 783U, // ATOMUMIN16
- 803U, // ATOMUMIN32
- 823U, // ATOMUMIN64
- 843U, // ATOMXOR16
- 862U, // ATOMXOR32
- 881U, // ATOMXOR64
- 900U, // ATOMXOR6432
- 921U, // ATOMXOR8
- 1021313963U, // BLENDPDrmi
- 1073742763U, // BLENDPDrri
- 1021313972U, // BLENDPSrmi
- 1073742772U, // BLENDPSrri
- 1140851645U, // BLENDVPDrm0
- 205652925U, // BLENDVPDrr0
- 1140851662U, // BLENDVPSrm0
- 205652942U, // BLENDVPSrr0
- 1207960543U, // BSF16rm
- 1279394783U, // BSF16rr
- 1342178277U, // BSF32rm
- 1279394789U, // BSF32rr
- 1409287147U, // BSF64rm
- 1279394795U, // BSF64rr
- 1207960561U, // BSR16rm
- 1279394801U, // BSR16rr
- 1342178295U, // BSR32rm
- 1279394807U, // BSR32rr
- 1409287165U, // BSR64rm
- 1279394813U, // BSR64rr
- 79692803U, // BSWAP32r
- 79692811U, // BSWAP64r
- 136315923U, // BT16mi8
- 136315923U, // BT16mr
- 1279394835U, // BT16ri8
- 1279394835U, // BT16rr
- 136578072U, // BT32mi8
- 136578072U, // BT32mr
- 1279394840U, // BT32ri8
- 1279394840U, // BT32rr
- 136709149U, // BT64mi8
- 136709149U, // BT64mr
- 1279394845U, // BT64ri8
- 1279394845U, // BT64rr
- 136315938U, // BTC16mi8
- 136315938U, // BTC16mr
- 1279394850U, // BTC16ri8
- 1279394850U, // BTC16rr
- 136578088U, // BTC32mi8
- 136578088U, // BTC32mr
- 1279394856U, // BTC32ri8
- 1279394856U, // BTC32rr
- 136709166U, // BTC64mi8
- 136709166U, // BTC64mr
- 1279394862U, // BTC64ri8
- 1279394862U, // BTC64rr
- 136315956U, // BTR16mi8
- 136315956U, // BTR16mr
- 1279394868U, // BTR16ri8
- 1279394868U, // BTR16rr
- 136578106U, // BTR32mi8
- 136578106U, // BTR32mr
- 1279394874U, // BTR32ri8
- 1279394874U, // BTR32rr
- 136709184U, // BTR64mi8
- 136709184U, // BTR64mr
- 1279394880U, // BTR64ri8
- 1279394880U, // BTR64rr
- 136315974U, // BTS16mi8
- 136315974U, // BTS16mr
- 1279394886U, // BTS16ri8
- 1279394886U, // BTS16rr
- 136578124U, // BTS32mi8
- 136578124U, // BTS32mr
- 1279394892U, // BTS32ri8
- 1279394892U, // BTS32rr
- 136709202U, // BTS64mi8
- 136709202U, // BTS64mr
- 1279394898U, // BTS64ri8
- 1279394898U, // BTS64rr
- 952108120U, // CALL32m
- 79692888U, // CALL32r
- 1476396127U, // CALL64m
- 1556087911U, // CALL64pcrel32
- 79692895U, // CALL64r
- 1556087918U, // CALLpcrel32
- 1140U, // CBW
- 1145U, // CDQ
- 1150U, // CDQE
- 1155U, // CHS_F
- 0U, // CHS_Fp32
- 0U, // CHS_Fp64
- 0U, // CHS_Fp80
- 1160U, // CLC
- 1164U, // CLD
- 1610613904U, // CLFLUSH
- 1177U, // CLI
- 1181U, // CLTS
- 1186U, // CMC
- 272762022U, // CMOVA16rm
- 205653158U, // CMOVA16rr
- 339870894U, // CMOVA32rm
- 205653166U, // CMOVA32rr
- 406979766U, // CMOVA64rm
- 205653174U, // CMOVA64rr
- 272762046U, // CMOVAE16rm
- 205653182U, // CMOVAE16rr
- 339870919U, // CMOVAE32rm
- 205653191U, // CMOVAE32rr
- 406979792U, // CMOVAE64rm
- 205653200U, // CMOVAE64rr
- 272762073U, // CMOVB16rm
- 205653209U, // CMOVB16rr
- 339870945U, // CMOVB32rm
- 205653217U, // CMOVB32rr
- 406979817U, // CMOVB64rm
- 205653225U, // CMOVB64rr
- 272762097U, // CMOVBE16rm
- 205653233U, // CMOVBE16rr
- 339870970U, // CMOVBE32rm
- 205653242U, // CMOVBE32rr
- 406979843U, // CMOVBE64rm
- 205653251U, // CMOVBE64rr
- 83887372U, // CMOVBE_F
- 0U, // CMOVBE_Fp32
- 0U, // CMOVBE_Fp64
- 0U, // CMOVBE_Fp80
- 83887381U, // CMOVB_F
- 0U, // CMOVB_Fp32
- 0U, // CMOVB_Fp64
- 0U, // CMOVB_Fp80
- 272762141U, // CMOVE16rm
- 205653277U, // CMOVE16rr
- 339871013U, // CMOVE32rm
- 205653285U, // CMOVE32rr
- 406979885U, // CMOVE64rm
- 205653293U, // CMOVE64rr
- 83887413U, // CMOVE_F
- 0U, // CMOVE_Fp32
- 0U, // CMOVE_Fp64
- 0U, // CMOVE_Fp80
- 272762173U, // CMOVG16rm
- 205653309U, // CMOVG16rr
- 339871045U, // CMOVG32rm
- 205653317U, // CMOVG32rr
- 406979917U, // CMOVG64rm
- 205653325U, // CMOVG64rr
- 272762197U, // CMOVGE16rm
- 205653333U, // CMOVGE16rr
- 339871070U, // CMOVGE32rm
- 205653342U, // CMOVGE32rr
- 406979943U, // CMOVGE64rm
- 205653351U, // CMOVGE64rr
- 272762224U, // CMOVL16rm
- 205653360U, // CMOVL16rr
- 339871096U, // CMOVL32rm
- 205653368U, // CMOVL32rr
- 406979968U, // CMOVL64rm
- 205653376U, // CMOVL64rr
- 272762248U, // CMOVLE16rm
- 205653384U, // CMOVLE16rr
- 339871121U, // CMOVLE32rm
- 205653393U, // CMOVLE32rr
- 406979994U, // CMOVLE64rm
- 205653402U, // CMOVLE64rr
- 83887523U, // CMOVNBE_F
- 0U, // CMOVNBE_Fp32
- 0U, // CMOVNBE_Fp64
- 0U, // CMOVNBE_Fp80
- 83887533U, // CMOVNB_F
- 0U, // CMOVNB_Fp32
- 0U, // CMOVNB_Fp64
- 0U, // CMOVNB_Fp80
- 272762294U, // CMOVNE16rm
- 205653430U, // CMOVNE16rr
- 339871167U, // CMOVNE32rm
- 205653439U, // CMOVNE32rr
- 406980040U, // CMOVNE64rm
- 205653448U, // CMOVNE64rr
- 83887569U, // CMOVNE_F
- 0U, // CMOVNE_Fp32
- 0U, // CMOVNE_Fp64
- 0U, // CMOVNE_Fp80
- 272762330U, // CMOVNO16rm
- 205653466U, // CMOVNO16rr
- 339871203U, // CMOVNO32rm
- 205653475U, // CMOVNO32rr
- 406980076U, // CMOVNO64rm
- 205653484U, // CMOVNO64rr
- 272762357U, // CMOVNP16rm
- 205653493U, // CMOVNP16rr
- 339871230U, // CMOVNP32rm
- 205653502U, // CMOVNP32rr
- 406980103U, // CMOVNP64rm
- 205653511U, // CMOVNP64rr
- 83887632U, // CMOVNP_F
- 0U, // CMOVNP_Fp32
- 0U, // CMOVNP_Fp64
- 0U, // CMOVNP_Fp80
- 272762393U, // CMOVNS16rm
- 205653529U, // CMOVNS16rr
- 339871266U, // CMOVNS32rm
- 205653538U, // CMOVNS32rr
- 406980139U, // CMOVNS64rm
- 205653547U, // CMOVNS64rr
- 272762420U, // CMOVO16rm
- 205653556U, // CMOVO16rr
- 339871292U, // CMOVO32rm
- 205653564U, // CMOVO32rr
- 406980164U, // CMOVO64rm
- 205653572U, // CMOVO64rr
- 272762444U, // CMOVP16rm
- 205653580U, // CMOVP16rr
- 339871316U, // CMOVP32rm
- 205653588U, // CMOVP32rr
- 406980188U, // CMOVP64rm
- 205653596U, // CMOVP64rr
- 83887716U, // CMOVP_F
- 0U, // CMOVP_Fp32
- 0U, // CMOVP_Fp64
- 0U, // CMOVP_Fp80
- 272762477U, // CMOVS16rm
- 205653613U, // CMOVS16rr
- 339871349U, // CMOVS32rm
- 205653621U, // CMOVS32rr
- 406980221U, // CMOVS64rm
- 205653629U, // CMOVS64rr
- 1669U, // CMOV_FR32
- 1688U, // CMOV_FR64
- 1707U, // CMOV_GR8
- 1725U, // CMOV_V1I64
- 1745U, // CMOV_V2F64
- 1765U, // CMOV_V2I64
- 1785U, // CMOV_V4F32
- 67110669U, // CMP16i16
- 136316685U, // CMP16mi
- 136316685U, // CMP16mi8
- 136316685U, // CMP16mr
- 1279395597U, // CMP16mrmrr
- 1279395597U, // CMP16ri
- 1279395597U, // CMP16ri8
- 1207961357U, // CMP16rm
- 1279395597U, // CMP16rr
- 73402131U, // CMP32i32
- 136578835U, // CMP32mi
- 136578835U, // CMP32mi8
- 136578835U, // CMP32mr
- 1279395603U, // CMP32mrmrr
- 1279395603U, // CMP32ri
- 1279395603U, // CMP32ri8
- 1342179091U, // CMP32rm
- 1279395603U, // CMP32rr
- 75499289U, // CMP64i32
- 136709913U, // CMP64mi32
- 136709913U, // CMP64mi8
- 136709913U, // CMP64mr
- 1279395609U, // CMP64mrmrr
- 1279395609U, // CMP64ri32
- 1279395609U, // CMP64ri8
- 1409287961U, // CMP64rm
- 1279395609U, // CMP64rr
- 77596447U, // CMP8i8
- 136840991U, // CMP8mi
- 136840991U, // CMP8mr
- 1279395615U, // CMP8mrmrr
- 1279395615U, // CMP8ri
- 1690306335U, // CMP8rm
- 1279395615U, // CMP8rr
- 1764362021U, // CMPPDrmi
- 1831601957U, // CMPPDrri
- 1766459173U, // CMPPSrmi
- 1833699109U, // CMPPSrri
- 1833U, // CMPS16
- 1839U, // CMPS32
- 1845U, // CMPS64
- 1851U, // CMPS8
- 1768818469U, // CMPSDrm
- 1835796261U, // CMPSDrr
- 1771046693U, // CMPSSrm
- 1837893413U, // CMPSSrr
- 1879050049U, // CMPXCHG16B
- 136316749U, // CMPXCHG16rm
- 1279395661U, // CMPXCHG16rr
- 136578903U, // CMPXCHG32rm
- 1279395671U, // CMPXCHG32rr
- 136709985U, // CMPXCHG64rm
- 1279395681U, // CMPXCHG64rr
- 1476396907U, // CMPXCHG8B
- 136841078U, // CMPXCHG8rm
- 1279395702U, // CMPXCHG8rr
- 1946158976U, // COMISDrm
- 1279395712U, // COMISDrr
- 1946158984U, // COMISSrm
- 1279395720U, // COMISSrr
- 79693712U, // COMP_FST0r
- 83888023U, // COM_FIPr
- 83888031U, // COM_FIr
- 79693734U, // COM_FST0r
- 1964U, // COS_F
- 0U, // COS_Fp32
- 0U, // COS_Fp64
- 0U, // COS_Fp80
- 1969U, // CPUID
- 1975U, // CQO
- 295831484U, // CRC32m16
- 362940348U, // CRC32m32
- 497158076U, // CRC32m8
- 228722620U, // CRC32r16
- 228722620U, // CRC32r32
- 228722620U, // CRC32r8
- 430049212U, // CRC64m64
- 228722620U, // CRC64r64
- 1988U, // CS_PREFIX
- 1946159047U, // CVTDQ2PDrm
- 1279395783U, // CVTDQ2PDrr
- 1946159057U, // CVTDQ2PSrm
- 1279395793U, // CVTDQ2PSrr
- 1946159067U, // CVTPD2DQrm
- 1279395803U, // CVTPD2DQrr
- 1946159077U, // CVTPD2PSrm
- 1279395813U, // CVTPD2PSrr
- 1946159087U, // CVTPS2DQrm
- 1279395823U, // CVTPS2DQrr
- 2013267961U, // CVTPS2PDrm
- 1279395833U, // CVTPS2PDrr
- 2013267971U, // CVTSD2SI64rm
- 1279395843U, // CVTSD2SI64rr
- 2013267982U, // CVTSD2SSrm
- 1279395854U, // CVTSD2SSrr
- 1409288216U, // CVTSI2SD64rm
- 1279395864U, // CVTSI2SD64rr
- 1342179363U, // CVTSI2SDrm
- 1279395875U, // CVTSI2SDrr
- 1409288237U, // CVTSI2SS64rm
- 1279395885U, // CVTSI2SS64rr
- 1342179384U, // CVTSI2SSrm
- 1279395896U, // CVTSI2SSrr
- 2080376898U, // CVTSS2SDrm
- 1279395906U, // CVTSS2SDrr
- 2080376908U, // CVTSS2SI64rm
- 1279395916U, // CVTSS2SI64rr
- 2080376919U, // CVTSS2SIrm
- 1279395927U, // CVTSS2SIrr
- 1946159202U, // CVTTPS2DQrm
- 1279395938U, // CVTTPS2DQrr
- 2013268077U, // CVTTSD2SI64rm
- 1279395949U, // CVTTSD2SI64rr
- 2013268089U, // CVTTSD2SIrm
- 1279395961U, // CVTTSD2SIrr
- 2080376964U, // CVTTSS2SI64rm
- 1279395972U, // CVTTSS2SI64rr
- 2080376976U, // CVTTSS2SIrm
- 1279395984U, // CVTTSS2SIrr
- 2203U, // CWD
- 2208U, // CWDE
- 872417445U, // DEC16m
- 79693989U, // DEC16r
- 952109227U, // DEC32m
- 79693995U, // DEC32r
- 872417445U, // DEC64_16m
- 79693989U, // DEC64_16r
- 952109227U, // DEC64_32m
- 79693995U, // DEC64_32r
- 1476397233U, // DEC64m
- 79694001U, // DEC64r
- 1610614967U, // DEC8m
- 79694007U, // DEC8r
- 872417469U, // DIV16m
- 79694013U, // DIV16r
- 952109251U, // DIV32m
- 79694019U, // DIV32r
- 1476397257U, // DIV64m
- 79694025U, // DIV64r
- 1610614991U, // DIV8m
- 79694031U, // DIV8r
- 536873173U, // DIVPDrm
- 205654229U, // DIVPDrr
- 536873180U, // DIVPSrm
- 205654236U, // DIVPSrr
- 738199779U, // DIVR_F32m
- 805308651U, // DIVR_F64m
- 872417523U, // DIVR_FI16m
- 952109308U, // DIVR_FI32m
- 79694085U, // DIVR_FPrST0
- 79694092U, // DIVR_FST0r
- 0U, // DIVR_Fp32m
- 0U, // DIVR_Fp64m
- 0U, // DIVR_Fp64m32
- 0U, // DIVR_Fp80m32
- 0U, // DIVR_Fp80m64
- 0U, // DIVR_FpI16m32
- 0U, // DIVR_FpI16m64
- 0U, // DIVR_FpI16m80
- 0U, // DIVR_FpI32m32
- 0U, // DIVR_FpI32m64
- 0U, // DIVR_FpI32m80
- 79694099U, // DIVR_FrST0
- 603982113U, // DIVSDrm
- 603982113U, // DIVSDrm_Int
- 205654305U, // DIVSDrr
- 205654305U, // DIVSDrr_Int
- 671090984U, // DIVSSrm
- 671090984U, // DIVSSrm_Int
- 205654312U, // DIVSSrr
- 205654312U, // DIVSSrr_Int
- 738199855U, // DIV_F32m
- 805308726U, // DIV_F64m
- 872417597U, // DIV_FI16m
- 952109381U, // DIV_FI32m
- 79694157U, // DIV_FPrST0
- 79694165U, // DIV_FST0r
- 0U, // DIV_Fp32
- 0U, // DIV_Fp32m
- 0U, // DIV_Fp64
- 0U, // DIV_Fp64m
- 0U, // DIV_Fp64m32
- 0U, // DIV_Fp80
- 0U, // DIV_Fp80m32
- 0U, // DIV_Fp80m64
- 0U, // DIV_FpI16m32
- 0U, // DIV_FpI16m64
- 0U, // DIV_FpI16m80
- 0U, // DIV_FpI32m32
- 0U, // DIV_FpI32m64
- 0U, // DIV_FpI32m80
- 79694171U, // DIV_FrST0
- 1021315434U, // DPPDrmi
- 1073744234U, // DPPDrri
- 1021315440U, // DPPSrmi
- 1073744240U, // DPPSrri
- 2422U, // DS_PREFIX
- 79694201U, // EH_RETURN
- 79694201U, // EH_RETURN64
- 70388112U, // ENTER
- 2455U, // ES_PREFIX
- 2178156954U, // EXTRACTPSmr
- 230033818U, // EXTRACTPSrr
- 2469U, // F2XM1
- 70388139U, // FARCALL16i
- 2214594995U, // FARCALL16m
- 70388156U, // FARCALL32i
- 2214595012U, // FARCALL32m
- 2214595021U, // FARCALL64
- 70388182U, // FARJMP16i
- 2214595037U, // FARJMP16m
- 70388197U, // FARJMP32i
- 2214595052U, // FARJMP32m
- 2214595060U, // FARJMP64
- 738200060U, // FBLDm
- 738200066U, // FBSTPm
- 738200073U, // FCOM32m
- 805308944U, // FCOM64m
- 738200088U, // FCOMP32m
- 805308960U, // FCOMP64m
- 2601U, // FCOMPP
- 2608U, // FDECSTP
- 79694392U, // FFREE
- 872417855U, // FICOM16m
- 952109639U, // FICOM32m
- 872417871U, // FICOMP16m
- 952109656U, // FICOMP32m
- 2657U, // FINCSTP
- 872417897U, // FLDCW16m
- 738200176U, // FLDENVm
- 2680U, // FLDL2E
- 2687U, // FLDL2T
- 2694U, // FLDLG2
- 2701U, // FLDLN2
- 2708U, // FLDPI
- 2714U, // FNCLEX
- 2721U, // FNINIT
- 2728U, // FNOP
- 872417965U, // FNSTCW16m
- 2741U, // FNSTSW8r
- 738200256U, // FNSTSWm
- 2760U, // FP32_TO_INT16_IN_MEM
- 2791U, // FP32_TO_INT32_IN_MEM
- 2822U, // FP32_TO_INT64_IN_MEM
- 2853U, // FP64_TO_INT16_IN_MEM
- 2884U, // FP64_TO_INT32_IN_MEM
- 2915U, // FP64_TO_INT64_IN_MEM
- 2946U, // FP80_TO_INT16_IN_MEM
- 2977U, // FP80_TO_INT32_IN_MEM
- 3008U, // FP80_TO_INT64_IN_MEM
- 3039U, // FPATAN
- 3046U, // FPREM
- 3052U, // FPREM1
- 3059U, // FPTAN
- 3065U, // FP_REG_KILL
- 3079U, // FRNDINT
- 738200591U, // FRSTORm
- 738200599U, // FSAVEm
- 3103U, // FSCALE
- 3110U, // FSINCOS
- 738200622U, // FSTENVm
- 1342180407U, // FS_MOV32rm
- 3137U, // FS_PREFIX
- 3140U, // FXAM
- 2214595657U, // FXRSTOR
- 2214595666U, // FXSAVE
- 3162U, // FXTRACT
- 3170U, // FYL2X
- 3176U, // FYL2XP1
- 0U, // FpGET_ST0_32
- 0U, // FpGET_ST0_64
- 0U, // FpGET_ST0_80
- 0U, // FpGET_ST1_32
- 0U, // FpGET_ST1_64
- 0U, // FpGET_ST1_80
- 0U, // FpSET_ST0_32
- 0U, // FpSET_ST0_64
- 0U, // FpSET_ST0_80
- 0U, // FpSET_ST1_32
- 0U, // FpSET_ST1_64
- 0U, // FpSET_ST1_80
- 536871139U, // FsANDNPDrm
- 205652195U, // FsANDNPDrr
- 536871147U, // FsANDNPSrm
- 205652203U, // FsANDNPSrr
- 536871155U, // FsANDPDrm
- 205652211U, // FsANDPDrr
- 536871162U, // FsANDPSrm
- 205652218U, // FsANDPSrr
- 0U, // FsFLD0SD
- 0U, // FsFLD0SS
- 1946160240U, // FsMOVAPDrm
- 1279396976U, // FsMOVAPDrr
- 1946160248U, // FsMOVAPSrm
- 1279396984U, // FsMOVAPSrr
- 536874112U, // FsORPDrm
- 205655168U, // FsORPDrr
- 536874118U, // FsORPSrm
- 205655174U, // FsORPSrr
- 536874124U, // FsXORPDrm
- 205655180U, // FsXORPDrr
- 536874131U, // FsXORPSrm
- 205655187U, // FsXORPSrr
- 1342180506U, // GS_MOV32rm
- 3236U, // GS_PREFIX
- 536874151U, // HADDPDrm
- 205655207U, // HADDPDrr
- 536874159U, // HADDPSrm
- 205655215U, // HADDPSrr
- 3255U, // HLT
- 536874171U, // HSUBPDrm
- 205655227U, // HSUBPDrr
- 536874179U, // HSUBPSrm
- 205655235U, // HSUBPSrr
- 872418507U, // IDIV16m
- 79695051U, // IDIV16r
- 952110290U, // IDIV32m
- 79695058U, // IDIV32r
- 1476398297U, // IDIV64m
- 79695065U, // IDIV64r
- 1610616032U, // IDIV8m
- 79695072U, // IDIV8r
- 872418535U, // ILD_F16m
- 952110318U, // ILD_F32m
- 1476398325U, // ILD_F64m
- 0U, // ILD_Fp16m32
- 0U, // ILD_Fp16m64
- 0U, // ILD_Fp16m80
- 0U, // ILD_Fp32m32
- 0U, // ILD_Fp32m64
- 0U, // ILD_Fp32m80
- 0U, // ILD_Fp64m32
- 0U, // ILD_Fp64m64
- 0U, // ILD_Fp64m80
- 872418557U, // IMUL16m
- 79695101U, // IMUL16r
- 272764157U, // IMUL16rm
- 2178944253U, // IMUL16rmi
- 2178944253U, // IMUL16rmi8
- 205655293U, // IMUL16rr
- 230034685U, // IMUL16rri
- 230034685U, // IMUL16rri8
- 952110340U, // IMUL32m
- 79695108U, // IMUL32r
- 339873028U, // IMUL32rm
- 2181041412U, // IMUL32rmi
- 2181041412U, // IMUL32rmi8
- 205655300U, // IMUL32rr
- 230034692U, // IMUL32rri
- 230034692U, // IMUL32rri8
- 1476398347U, // IMUL64m
- 79695115U, // IMUL64r
- 406981899U, // IMUL64rm
- 2183138571U, // IMUL64rmi32
- 2183138571U, // IMUL64rmi8
- 205655307U, // IMUL64rr
- 230034699U, // IMUL64rri32
- 230034699U, // IMUL64rri8
- 1610616082U, // IMUL8m
- 79695122U, // IMUL8r
- 3353U, // IN16
- 67112222U, // IN16ri
- 3363U, // IN16rr
- 3376U, // IN32
- 73403701U, // IN32ri
- 3386U, // IN32rr
- 3400U, // IN8
- 77598029U, // IN8ri
- 3410U, // IN8rr
- 872418655U, // INC16m
- 79695199U, // INC16r
- 952110437U, // INC32m
- 79695205U, // INC32r
- 872418655U, // INC64_16m
- 79695199U, // INC64_16r
- 952110437U, // INC64_32m
- 79695205U, // INC64_32r
- 1476398443U, // INC64m
- 79695211U, // INC64r
- 1610616177U, // INC8m
- 79695217U, // INC8r
- 1044385143U, // INSERTPSrm
- 1073745271U, // INSERTPSrr
- 79695233U, // INT
- 3462U, // INT3
- 3468U, // INVD
- 3473U, // INVEPT
- 1610616216U, // INVLPG
- 3488U, // INVVPID
- 3496U, // IRET16
- 3502U, // IRET32
- 3508U, // IRET64
- 872418746U, // ISTT_FP16m
- 952110531U, // ISTT_FP32m
- 1476398540U, // ISTT_FP64m
- 0U, // ISTT_Fp16m32
- 0U, // ISTT_Fp16m64
- 0U, // ISTT_Fp16m80
- 0U, // ISTT_Fp32m32
- 0U, // ISTT_Fp32m64
- 0U, // ISTT_Fp32m80
- 0U, // ISTT_Fp64m32
- 0U, // ISTT_Fp64m64
- 0U, // ISTT_Fp64m80
- 872418774U, // IST_F16m
- 952110557U, // IST_F32m
- 872418788U, // IST_FP16m
- 952110572U, // IST_FP32m
- 1476398580U, // IST_FP64m
- 0U, // IST_Fp16m32
- 0U, // IST_Fp16m64
- 0U, // IST_Fp16m80
- 0U, // IST_Fp32m32
- 0U, // IST_Fp32m64
- 0U, // IST_Fp32m80
- 0U, // IST_Fp64m32
- 0U, // IST_Fp64m64
- 0U, // IST_Fp64m80
- 1768818469U, // Int_CMPSDrm
- 1835796261U, // Int_CMPSDrr
- 1771046693U, // Int_CMPSSrm
- 1837893413U, // Int_CMPSSrr
- 1946158976U, // Int_COMISDrm
- 1279395712U, // Int_COMISDrr
- 1946158984U, // Int_COMISSrm
- 1279395720U, // Int_COMISSrr
- 1409288135U, // Int_CVTDQ2PDrm
- 1279395783U, // Int_CVTDQ2PDrr
- 2281703377U, // Int_CVTDQ2PSrm
- 1279395793U, // Int_CVTDQ2PSrr
- 1946159067U, // Int_CVTPD2DQrm
- 1279395803U, // Int_CVTPD2DQrr
- 1946160637U, // Int_CVTPD2PIrm
- 1279397373U, // Int_CVTPD2PIrr
- 1946159077U, // Int_CVTPD2PSrm
- 1279395813U, // Int_CVTPD2PSrr
- 1409289735U, // Int_CVTPI2PDrm
- 1279397383U, // Int_CVTPI2PDrr
- 406982161U, // Int_CVTPI2PSrm
- 205655569U, // Int_CVTPI2PSrr
- 1946159087U, // Int_CVTPS2DQrm
- 1279395823U, // Int_CVTPS2DQrr
- 2013267961U, // Int_CVTPS2PDrm
- 1279395833U, // Int_CVTPS2PDrr
- 2013269531U, // Int_CVTPS2PIrm
- 1279397403U, // Int_CVTPS2PIrr
- 1946159107U, // Int_CVTSD2SI64rm
- 1279395843U, // Int_CVTSD2SI64rr
- 1946160677U, // Int_CVTSD2SIrm
- 1279397413U, // Int_CVTSD2SIrr
- 603981838U, // Int_CVTSD2SSrm
- 205654030U, // Int_CVTSD2SSrr
- 406980632U, // Int_CVTSI2SD64rm
- 205654040U, // Int_CVTSI2SD64rr
- 339871779U, // Int_CVTSI2SDrm
- 205654051U, // Int_CVTSI2SDrr
- 406980653U, // Int_CVTSI2SS64rm
- 205654061U, // Int_CVTSI2SS64rr
- 339871800U, // Int_CVTSI2SSrm
- 205654072U, // Int_CVTSI2SSrr
- 671090754U, // Int_CVTSS2SDrm
- 205654082U, // Int_CVTSS2SDrr
- 2080376908U, // Int_CVTSS2SI64rm
- 1279395916U, // Int_CVTSS2SI64rr
- 2080378415U, // Int_CVTSS2SIrm
- 1279397423U, // Int_CVTSS2SIrr
- 1946160697U, // Int_CVTTPD2DQrm
- 1279397433U, // Int_CVTTPD2DQrr
- 1946160708U, // Int_CVTTPD2PIrm
- 1279397444U, // Int_CVTTPD2PIrr
- 1946159202U, // Int_CVTTPS2DQrm
- 1279395938U, // Int_CVTTPS2DQrr
- 2013269583U, // Int_CVTTPS2PIrm
- 1279397455U, // Int_CVTTPS2PIrr
- 1946159213U, // Int_CVTTSD2SI64rm
- 1279395949U, // Int_CVTTSD2SI64rr
- 1946159225U, // Int_CVTTSD2SIrm
- 1279395961U, // Int_CVTTSD2SIrr
- 2080376964U, // Int_CVTTSS2SI64rm
- 1279395972U, // Int_CVTTSS2SI64rr
- 2080376976U, // Int_CVTTSS2SIrm
- 1279395984U, // Int_CVTTSS2SIrr
- 1946160730U, // Int_UCOMISDrm
- 1279397466U, // Int_UCOMISDrr
- 1946160739U, // Int_UCOMISSrm
- 1279397475U, // Int_UCOMISSrr
- 1556090476U, // JAE_1
- 1556090476U, // JAE_4
- 1556090481U, // JA_1
- 1556090481U, // JA_4
- 1556090485U, // JBE_1
- 1556090485U, // JBE_4
- 1556090490U, // JB_1
- 1556090490U, // JB_4
- 1556090494U, // JCXZ8
- 1556090500U, // JE_1
- 1556090500U, // JE_4
- 1556090504U, // JGE_1
- 1556090504U, // JGE_4
- 1556090509U, // JG_1
- 1556090509U, // JG_4
- 1556090513U, // JLE_1
- 1556090513U, // JLE_4
- 1556090518U, // JL_1
- 1556090518U, // JL_4
- 952110746U, // JMP32m
- 79695514U, // JMP32r
- 1476398753U, // JMP64m
- 1556090536U, // JMP64pcrel32
- 79695521U, // JMP64r
- 1556090542U, // JMP_1
- 1556090542U, // JMP_4
- 1556090547U, // JNE_1
- 1556090547U, // JNE_4
- 1556090552U, // JNO_1
- 1556090552U, // JNO_4
- 1556090557U, // JNP_1
- 1556090557U, // JNP_4
- 1556090562U, // JNS_1
- 1556090562U, // JNS_4
- 1556090567U, // JO_1
- 1556090567U, // JO_4
- 1556090571U, // JP_1
- 1556090571U, // JP_4
- 1556090575U, // JS_1
- 1556090575U, // JS_4
- 3795U, // LAHF
- 1207963352U, // LAR16rm
- 1279397592U, // LAR16rr
- 1207963358U, // LAR32rm
- 1279397598U, // LAR32rr
- 1207963364U, // LAR64rm
- 1279397604U, // LAR64rr
- 136318698U, // LCMPXCHG16
- 136580858U, // LCMPXCHG32
- 174067466U, // LCMPXCHG64
- 136843034U, // LCMPXCHG8
- 1476398890U, // LCMPXCHG8B
- 2281705275U, // LDDQUrm
- 952110914U, // LDMXCSR
- 2348814155U, // LDS16rm
- 2348814161U, // LDS32rm
- 3927U, // LD_F0
- 3932U, // LD_F1
- 738201441U, // LD_F32m
- 805310311U, // LD_F64m
- 2415923053U, // LD_F80m
- 0U, // LD_Fp032
- 0U, // LD_Fp064
- 0U, // LD_Fp080
- 0U, // LD_Fp132
- 0U, // LD_Fp164
- 0U, // LD_Fp180
- 0U, // LD_Fp32m
- 0U, // LD_Fp32m64
- 0U, // LD_Fp32m80
- 0U, // LD_Fp64m
- 0U, // LD_Fp64m80
- 0U, // LD_Fp80m
- 79695731U, // LD_Frr
- 2483031928U, // LEA16r
- 2483031934U, // LEA32r
- 2550140798U, // LEA64_32r
- 2617249668U, // LEA64r
- 3978U, // LEAVE
- 3978U, // LEAVE64
- 2348814224U, // LES16rm
- 2348814230U, // LES32rm
- 3996U, // LFENCE
- 2348814243U, // LFS16rm
- 2348814249U, // LFS32rm
- 2348814255U, // LFS64rm
- 2214596533U, // LGDTm
- 2348814267U, // LGS16rm
- 2348814273U, // LGS32rm
- 2348814279U, // LGS64rm
- 2214596557U, // LIDTm
- 872419283U, // LLDT16m
- 79695827U, // LLDT16r
- 872419290U, // LMSW16m
- 79695834U, // LMSW16r
- 136318945U, // LOCK_ADD16mi
- 136318945U, // LOCK_ADD16mi8
- 136318945U, // LOCK_ADD16mr
- 136581101U, // LOCK_ADD32mi
- 136581101U, // LOCK_ADD32mi8
- 136581101U, // LOCK_ADD32mr
- 136712185U, // LOCK_ADD64mi32
- 136712185U, // LOCK_ADD64mi8
- 136712185U, // LOCK_ADD64mr
- 136843269U, // LOCK_ADD8mi
- 136843269U, // LOCK_ADD8mr
- 872419345U, // LOCK_DEC16m
- 952111133U, // LOCK_DEC32m
- 1476399145U, // LOCK_DEC64m
- 1610616885U, // LOCK_DEC8m
- 872419393U, // LOCK_INC16m
- 952111181U, // LOCK_INC32m
- 1476399193U, // LOCK_INC64m
- 1610616933U, // LOCK_INC8m
- 4209U, // LOCK_PREFIX
- 136319094U, // LOCK_SUB16mi
- 136319094U, // LOCK_SUB16mi8
- 136319094U, // LOCK_SUB16mr
- 136581250U, // LOCK_SUB32mi
- 136581250U, // LOCK_SUB32mi8
- 136581250U, // LOCK_SUB32mr
- 136712334U, // LOCK_SUB64mi32
- 136712334U, // LOCK_SUB64mi8
- 136712334U, // LOCK_SUB64mr
- 136843418U, // LOCK_SUB8mi
- 136843418U, // LOCK_SUB8mr
- 4262U, // LODSB
- 4268U, // LODSD
- 4274U, // LODSQ
- 4280U, // LODSW
- 1556091070U, // LOOP
- 1556091076U, // LOOPE
- 1556091083U, // LOOPNE
- 4307U, // LRET
- 79696088U, // LRETI
- 1207963870U, // LSL16rm
- 1279398110U, // LSL16rr
- 1342181604U, // LSL32rm
- 1279398116U, // LSL32rr
- 1409290474U, // LSL64rm
- 1279398122U, // LSL64rr
- 2348814576U, // LSS16rm
- 2348814582U, // LSS32rm
- 2348814588U, // LSS64rm
- 872419586U, // LTRm
- 79696130U, // LTRr
- 1317146888U, // LXADD16
- 1319244053U, // LXADD32
- 1321341218U, // LXADD64
- 1323438382U, // LXADD8
- 1279398203U, // MASKMOVDQU
- 1279398203U, // MASKMOVDQU64
- 536875335U, // MAXPDrm
- 536875335U, // MAXPDrm_Int
- 205656391U, // MAXPDrr
- 205656391U, // MAXPDrr_Int
- 536875342U, // MAXPSrm
- 536875342U, // MAXPSrm_Int
- 205656398U, // MAXPSrr
- 205656398U, // MAXPSrr_Int
- 603984213U, // MAXSDrm
- 603984213U, // MAXSDrm_Int
- 205656405U, // MAXSDrr
- 205656405U, // MAXSDrr_Int
- 671093084U, // MAXSSrm
- 671093084U, // MAXSSrm_Int
- 205656412U, // MAXSSrr
- 205656412U, // MAXSSrr_Int
- 4451U, // MFENCE
- 4458U, // MINGW_ALLOCA
- 536875397U, // MINPDrm
- 536875397U, // MINPDrm_Int
- 205656453U, // MINPDrr
- 205656453U, // MINPDrr_Int
- 536875404U, // MINPSrm
- 536875404U, // MINPSrm_Int
- 205656460U, // MINPSrr
- 205656460U, // MINPSrr_Int
- 603984275U, // MINSDrm
- 603984275U, // MINSDrm_Int
- 205656467U, // MINSDrr
- 205656467U, // MINSDrr_Int
- 671093146U, // MINSSrm
- 671093146U, // MINSSrm_Int
- 205656474U, // MINSSrr
- 205656474U, // MINSSrr_Int
- 1946160637U, // MMX_CVTPD2PIrm
- 1279397373U, // MMX_CVTPD2PIrr
- 1409289735U, // MMX_CVTPI2PDrm
- 1279397383U, // MMX_CVTPI2PDrr
- 1409289745U, // MMX_CVTPI2PSrm
- 1279397393U, // MMX_CVTPI2PSrr
- 2013269531U, // MMX_CVTPS2PIrm
- 1279397403U, // MMX_CVTPS2PIrr
- 1946160708U, // MMX_CVTTPD2PIrm
- 1279397444U, // MMX_CVTTPD2PIrr
- 2013269583U, // MMX_CVTTPS2PIrm
- 1279397455U, // MMX_CVTTPS2PIrr
- 4513U, // MMX_EMMS
- 4518U, // MMX_FEMMS
- 1279398316U, // MMX_MASKMOVQ
- 1279398316U, // MMX_MASKMOVQ64
- 1279398326U, // MMX_MOVD64from64rr
- 1279398326U, // MMX_MOVD64grr
- 136581558U, // MMX_MOVD64mr
- 1342181814U, // MMX_MOVD64rm
- 1279398326U, // MMX_MOVD64rr
- 1279398326U, // MMX_MOVD64rrv164
- 1279398326U, // MMX_MOVD64to64rr
- 1279398332U, // MMX_MOVDQ2Qrr
- 136712645U, // MMX_MOVNTQmr
- 1279398349U, // MMX_MOVQ2DQrr
- 1279398349U, // MMX_MOVQ2FR64rr
- 136712662U, // MMX_MOVQ64gmr
- 136712662U, // MMX_MOVQ64mr
- 1409290710U, // MMX_MOVQ64rm
- 1279398358U, // MMX_MOVQ64rr
- 1342181814U, // MMX_MOVZDI2PDIrm
- 1279398326U, // MMX_MOVZDI2PDIrr
- 406983132U, // MMX_PACKSSDWrm
- 205656540U, // MMX_PACKSSDWrr
- 406983142U, // MMX_PACKSSWBrm
- 205656550U, // MMX_PACKSSWBrr
- 406983152U, // MMX_PACKUSWBrm
- 205656560U, // MMX_PACKUSWBrr
- 406983162U, // MMX_PADDBrm
- 205656570U, // MMX_PADDBrr
- 406983169U, // MMX_PADDDrm
- 205656577U, // MMX_PADDDrr
- 406983176U, // MMX_PADDQrm
- 205656584U, // MMX_PADDQrr
- 406983183U, // MMX_PADDSBrm
- 205656591U, // MMX_PADDSBrr
- 406983191U, // MMX_PADDSWrm
- 205656599U, // MMX_PADDSWrr
- 406983199U, // MMX_PADDUSBrm
- 205656607U, // MMX_PADDUSBrr
- 406983208U, // MMX_PADDUSWrm
- 205656616U, // MMX_PADDUSWrr
- 406983217U, // MMX_PADDWrm
- 205656625U, // MMX_PADDWrr
- 406983224U, // MMX_PANDNrm
- 205656632U, // MMX_PANDNrr
- 406983231U, // MMX_PANDrm
- 205656639U, // MMX_PANDrr
- 406983237U, // MMX_PAVGBrm
- 205656645U, // MMX_PAVGBrr
- 406983244U, // MMX_PAVGWrm
- 205656652U, // MMX_PAVGWrr
- 406983251U, // MMX_PCMPEQBrm
- 205656659U, // MMX_PCMPEQBrr
- 406983260U, // MMX_PCMPEQDrm
- 205656668U, // MMX_PCMPEQDrr
- 406983269U, // MMX_PCMPEQWrm
- 205656677U, // MMX_PCMPEQWrr
- 406983278U, // MMX_PCMPGTBrm
- 205656686U, // MMX_PCMPGTBrr
- 406983287U, // MMX_PCMPGTDrm
- 205656695U, // MMX_PCMPGTDrr
- 406983296U, // MMX_PCMPGTWrm
- 205656704U, // MMX_PCMPGTWrr
- 230036105U, // MMX_PEXTRWri
- 1050022545U, // MMX_PINSRWrmi
- 1073746577U, // MMX_PINSRWrri
- 406983321U, // MMX_PMADDWDrm
- 205656729U, // MMX_PMADDWDrr
- 406983330U, // MMX_PMAXSWrm
- 205656738U, // MMX_PMAXSWrr
- 406983338U, // MMX_PMAXUBrm
- 205656746U, // MMX_PMAXUBrr
- 406983346U, // MMX_PMINSWrm
- 205656754U, // MMX_PMINSWrr
- 406983354U, // MMX_PMINUBrm
- 205656762U, // MMX_PMINUBrr
- 1279398594U, // MMX_PMOVMSKBrr
- 406983372U, // MMX_PMULHUWrm
- 205656780U, // MMX_PMULHUWrr
- 406983381U, // MMX_PMULHWrm
- 205656789U, // MMX_PMULHWrr
- 406983389U, // MMX_PMULLWrm
- 205656797U, // MMX_PMULLWrr
- 406983397U, // MMX_PMULUDQrm
- 205656805U, // MMX_PMULUDQrr
- 406983406U, // MMX_PORrm
- 205656814U, // MMX_PORrr
- 406983411U, // MMX_PSADBWrm
- 205656819U, // MMX_PSADBWrr
- 2183140091U, // MMX_PSHUFWmi
- 230036219U, // MMX_PSHUFWri
- 205656835U, // MMX_PSLLDri
- 406983427U, // MMX_PSLLDrm
- 205656835U, // MMX_PSLLDrr
- 205656842U, // MMX_PSLLQri
- 406983434U, // MMX_PSLLQrm
- 205656842U, // MMX_PSLLQrr
- 205656849U, // MMX_PSLLWri
- 406983441U, // MMX_PSLLWrm
- 205656849U, // MMX_PSLLWrr
- 205656856U, // MMX_PSRADri
- 406983448U, // MMX_PSRADrm
- 205656856U, // MMX_PSRADrr
- 205656863U, // MMX_PSRAWri
- 406983455U, // MMX_PSRAWrm
- 205656863U, // MMX_PSRAWrr
- 205656870U, // MMX_PSRLDri
- 406983462U, // MMX_PSRLDrm
- 205656870U, // MMX_PSRLDrr
- 205656877U, // MMX_PSRLQri
- 406983469U, // MMX_PSRLQrm
- 205656877U, // MMX_PSRLQrr
- 205656884U, // MMX_PSRLWri
- 406983476U, // MMX_PSRLWrm
- 205656884U, // MMX_PSRLWrr
- 406983483U, // MMX_PSUBBrm
- 205656891U, // MMX_PSUBBrr
- 406983490U, // MMX_PSUBDrm
- 205656898U, // MMX_PSUBDrr
- 406983497U, // MMX_PSUBQrm
- 205656905U, // MMX_PSUBQrr
- 406983504U, // MMX_PSUBSBrm
- 205656912U, // MMX_PSUBSBrr
- 406983512U, // MMX_PSUBSWrm
- 205656920U, // MMX_PSUBSWrr
- 406983520U, // MMX_PSUBUSBrm
- 205656928U, // MMX_PSUBUSBrr
- 406983529U, // MMX_PSUBUSWrm
- 205656937U, // MMX_PSUBUSWrr
- 406983538U, // MMX_PSUBWrm
- 205656946U, // MMX_PSUBWrr
- 406983545U, // MMX_PUNPCKHBWrm
- 205656953U, // MMX_PUNPCKHBWrr
- 406983556U, // MMX_PUNPCKHDQrm
- 205656964U, // MMX_PUNPCKHDQrr
- 406983567U, // MMX_PUNPCKHWDrm
- 205656975U, // MMX_PUNPCKHWDrr
- 406983578U, // MMX_PUNPCKLBWrm
- 205656986U, // MMX_PUNPCKLBWrr
- 406983589U, // MMX_PUNPCKLDQrm
- 205656997U, // MMX_PUNPCKLDQrr
- 406983600U, // MMX_PUNPCKLWDrm
- 205657008U, // MMX_PUNPCKLWDrr
- 406983611U, // MMX_PXORrm
- 205657019U, // MMX_PXORrr
- 0U, // MMX_V_SET0
- 0U, // MMX_V_SETALLONES
- 5057U, // MONITOR
- 1556091849U, // MOV16ao16
- 136319956U, // MOV16mi
- 136319956U, // MOV16mr
- 136319956U, // MOV16ms
- 1543508948U, // MOV16o16a
- 0U, // MOV16r0
- 1279398868U, // MOV16ri
- 1207964628U, // MOV16rm
- 1279398868U, // MOV16rr
- 1279398868U, // MOV16rr_REV
- 1279398868U, // MOV16rs
- 1207964628U, // MOV16sm
- 1279398868U, // MOV16sr
- 1556091866U, // MOV32ao32
- 1279398358U, // MOV32cr
- 1279398886U, // MOV32dr
- 136582118U, // MOV32mi
- 136582118U, // MOV32mr
- 1549800422U, // MOV32o32a
- 0U, // MOV32r0
- 1279398358U, // MOV32rc
- 1279398886U, // MOV32rd
- 1279398886U, // MOV32ri
- 1342182374U, // MOV32rm
- 1279398886U, // MOV32rr
- 1279398886U, // MOV32rr_REV
- 1409291244U, // MOV64FSrm
- 1409291254U, // MOV64GSrm
- 1556091904U, // MOV64ao64
- 1556091904U, // MOV64ao8
- 1279398358U, // MOV64cr
- 1279398358U, // MOV64dr
- 136712662U, // MOV64mi32
- 136712662U, // MOV64mr
- 136712662U, // MOV64ms
- 1551897046U, // MOV64o64a
- 1551897046U, // MOV64o8a
- 0U, // MOV64r0
- 1279398358U, // MOV64rc
- 1279398358U, // MOV64rd
- 1279398924U, // MOV64ri
- 1279398358U, // MOV64ri32
- 0U, // MOV64ri64i32
- 1409290710U, // MOV64rm
- 1279398358U, // MOV64rr
- 1279398358U, // MOV64rr_REV
- 1279398358U, // MOV64rs
- 1409290710U, // MOV64sm
- 1279398358U, // MOV64sr
- 1279398326U, // MOV64toPQIrr
- 1409290710U, // MOV64toSDrm
- 1279398326U, // MOV64toSDrr
- 1556091925U, // MOV8ao8
- 136844320U, // MOV8mi
- 136844320U, // MOV8mr
- 136877088U, // MOV8mr_NOREX
- 1553994784U, // MOV8o8a
- 0U, // MOV8r0
- 1279398944U, // MOV8ri
- 1690309664U, // MOV8rm
- 1728058400U, // MOV8rm_NOREX
- 1279398944U, // MOV8rr
- 1280840736U, // MOV8rr_NOREX
- 1279398944U, // MOV8rr_REV
- 138022000U, // MOVAPDmr
- 1946160240U, // MOVAPDrm
- 1279396976U, // MOVAPDrr
- 138022008U, // MOVAPSmr
- 1946160248U, // MOVAPSrm
- 1279396984U, // MOVAPSrr
- 2013271078U, // MOVDDUPrm
- 1279398950U, // MOVDDUPrr
- 1342181814U, // MOVDI2PDIrm
- 1279398326U, // MOVDI2PDIrr
- 1342181814U, // MOVDI2SSrm
- 1279398326U, // MOVDI2SSrr
- 138155055U, // MOVDQAmr
- 2281706543U, // MOVDQArm
- 1279398959U, // MOVDQArr
- 138155063U, // MOVDQUmr
- 138155063U, // MOVDQUmr_Int
- 2281706551U, // MOVDQUrm
- 2281706551U, // MOVDQUrm_Int
- 205657151U, // MOVHLPSrr
- 138286152U, // MOVHPDmr
- 603984968U, // MOVHPDrm
- 138286160U, // MOVHPSmr
- 603984976U, // MOVHPSrm
- 205657176U, // MOVLHPSrr
- 138286177U, // MOVLPDmr
- 603984993U, // MOVLPDrm
- 138286185U, // MOVLPSmr
- 603985001U, // MOVLPSrm
- 136712662U, // MOVLQ128mr
- 1279399025U, // MOVMSKPDrr
- 1279399035U, // MOVMSKPSrr
- 2281706629U, // MOVNTDQArm
- 138024079U, // MOVNTDQ_64mr
- 138024079U, // MOVNTDQmr
- 138024079U, // MOVNTDQmr_Int
- 136713368U, // MOVNTI_64mr
- 136582296U, // MOVNTImr
- 136582296U, // MOVNTImr_Int
- 138024096U, // MOVNTPDmr
- 138155168U, // MOVNTPDmr_Int
- 138024105U, // MOVNTPSmr
- 138155177U, // MOVNTPSmr_Int
- 0U, // MOVPC32r
- 136581558U, // MOVPDI2DImr
- 1279398326U, // MOVPDI2DIrr
- 136712662U, // MOVPQI2QImr
- 1279398326U, // MOVPQIto64rr
- 1409290710U, // MOVQI2PQIrm
- 1279398358U, // MOVQxrxr
- 5298U, // MOVSB
- 5304U, // MOVSD
- 138286270U, // MOVSDmr
- 2013271230U, // MOVSDrm
- 205657278U, // MOVSDrr
- 136712662U, // MOVSDto64mr
- 1279398326U, // MOVSDto64rr
- 1946162373U, // MOVSHDUPrm
- 1279399109U, // MOVSHDUPrr
- 1946162383U, // MOVSLDUPrm
- 1279399119U, // MOVSLDUPrr
- 136581558U, // MOVSS2DImr
- 1279398326U, // MOVSS2DIrr
- 137630937U, // MOVSSmr
- 2080380121U, // MOVSSrm
- 205657305U, // MOVSSrr
- 5344U, // MOVSW
- 0U, // MOVSX16rm8
- 1690309862U, // MOVSX16rm8W
- 0U, // MOVSX16rr8
- 1279399142U, // MOVSX16rr8W
- 1207964910U, // MOVSX32rm16
- 1690309878U, // MOVSX32rm8
- 1279399150U, // MOVSX32rr16
- 1279399158U, // MOVSX32rr8
- 1207964926U, // MOVSX64rm16
- 1342182662U, // MOVSX64rm32
- 1690309902U, // MOVSX64rm8
- 1279399166U, // MOVSX64rr16
- 1279399174U, // MOVSX64rr32
- 1279399182U, // MOVSX64rr8
- 138024214U, // MOVUPDmr
- 138024214U, // MOVUPDmr_Int
- 1946162454U, // MOVUPDrm
- 1946162454U, // MOVUPDrm_Int
- 1279399190U, // MOVUPDrr
- 138024222U, // MOVUPSmr
- 138024222U, // MOVUPSmr_Int
- 1946162462U, // MOVUPSrm
- 1946162462U, // MOVUPSrm_Int
- 1279399198U, // MOVUPSrr
- 1342181814U, // MOVZDI2PDIrm
- 1279398326U, // MOVZDI2PDIrr
- 2281705942U, // MOVZPQILo2PQIrm
- 1279398358U, // MOVZPQILo2PQIrr
- 1409290710U, // MOVZQI2PQIrm
- 1279398326U, // MOVZQI2PQIrr
- 0U, // MOVZX16rm8
- 1690309926U, // MOVZX16rm8W
- 0U, // MOVZX16rr8
- 1279399206U, // MOVZX16rr8W
- 1728058670U, // MOVZX32_NOREXrm8
- 1280841006U, // MOVZX32_NOREXrr8
- 1207964982U, // MOVZX32rm16
- 1690309934U, // MOVZX32rm8
- 1279399222U, // MOVZX32rr16
- 1279399214U, // MOVZX32rr8
- 0U, // MOVZX64rm16
- 1207964990U, // MOVZX64rm16_Q
- 0U, // MOVZX64rm32
- 0U, // MOVZX64rm8
- 1690309958U, // MOVZX64rm8_Q
- 0U, // MOVZX64rr16
- 1279399230U, // MOVZX64rr16_Q
- 0U, // MOVZX64rr32
- 0U, // MOVZX64rr8
- 1279399238U, // MOVZX64rr8_Q
- 0U, // MOV_Fp3232
- 0U, // MOV_Fp3264
- 0U, // MOV_Fp3280
- 0U, // MOV_Fp6432
- 0U, // MOV_Fp6464
- 0U, // MOV_Fp6480
- 0U, // MOV_Fp8032
- 0U, // MOV_Fp8064
- 0U, // MOV_Fp8080
- 1021318478U, // MPSADBWrmi
- 1073747278U, // MPSADBWrri
- 872420695U, // MUL16m
- 79697239U, // MUL16r
- 952112477U, // MUL32m
- 79697245U, // MUL32r
- 1476400483U, // MUL64m
- 79697251U, // MUL64r
- 1610618217U, // MUL8m
- 79697257U, // MUL8r
- 536876399U, // MULPDrm
- 205657455U, // MULPDrr
- 536876406U, // MULPSrm
- 205657462U, // MULPSrr
- 603985277U, // MULSDrm
- 603985277U, // MULSDrm_Int
- 205657469U, // MULSDrr
- 205657469U, // MULSDrr_Int
- 671094148U, // MULSSrm
- 671094148U, // MULSSrm_Int
- 205657476U, // MULSSrr
- 205657476U, // MULSSrr_Int
- 738203019U, // MUL_F32m
- 805311890U, // MUL_F64m
- 872420761U, // MUL_FI16m
- 952112545U, // MUL_FI32m
- 79697321U, // MUL_FPrST0
- 79697328U, // MUL_FST0r
- 0U, // MUL_Fp32
- 0U, // MUL_Fp32m
- 0U, // MUL_Fp64
- 0U, // MUL_Fp64m
- 0U, // MUL_Fp64m32
- 0U, // MUL_Fp80
- 0U, // MUL_Fp80m32
- 0U, // MUL_Fp80m64
- 0U, // MUL_FpI16m32
- 0U, // MUL_FpI16m64
- 0U, // MUL_FpI16m80
- 0U, // MUL_FpI32m32
- 0U, // MUL_FpI32m64
- 0U, // MUL_FpI32m80
- 79697334U, // MUL_FrST0
- 5572U, // MWAIT
- 872420810U, // NEG16m
- 79697354U, // NEG16r
- 952112592U, // NEG32m
- 79697360U, // NEG32r
- 1476400598U, // NEG64m
- 79697366U, // NEG64r
- 1610618332U, // NEG8m
- 79697372U, // NEG8r
- 5602U, // NOOP
- 952112614U, // NOOPL
- 872420844U, // NOOPW
- 872420850U, // NOT16m
- 79697394U, // NOT16r
- 952112632U, // NOT32m
- 79697400U, // NOT32r
- 1476400638U, // NOT64m
- 79697406U, // NOT64r
- 1610618372U, // NOT8m
- 79697412U, // NOT8r
- 67114506U, // OR16i16
- 136320522U, // OR16mi
- 136320522U, // OR16mi8
- 136320522U, // OR16mr
- 205657610U, // OR16ri
- 205657610U, // OR16ri8
- 272766474U, // OR16rm
- 205657610U, // OR16rr
- 205657610U, // OR16rr_REV
- 73405967U, // OR32i32
- 136582671U, // OR32mi
- 136582671U, // OR32mi8
- 136582671U, // OR32mr
- 205657615U, // OR32ri
- 205657615U, // OR32ri8
- 339875343U, // OR32rm
- 205657615U, // OR32rr
- 205657615U, // OR32rr_REV
- 75503124U, // OR64i32
- 136713748U, // OR64mi32
- 136713748U, // OR64mi8
- 136713748U, // OR64mr
- 205657620U, // OR64ri32
- 205657620U, // OR64ri8
- 406984212U, // OR64rm
- 205657620U, // OR64rr
- 205657620U, // OR64rr_REV
- 77600281U, // OR8i8
- 136844825U, // OR8mi
- 136844825U, // OR8mr
- 205657625U, // OR8ri
- 474093081U, // OR8rm
- 205657625U, // OR8rr
- 205657625U, // OR8rr_REV
- 536874112U, // ORPDrm
- 205655168U, // ORPDrr
- 536874118U, // ORPSrm
- 205655174U, // ORPSrr
- 79697438U, // OUT16ir
- 5673U, // OUT16rr
- 79697463U, // OUT32ir
- 5699U, // OUT32rr
- 79697490U, // OUT8ir
- 5725U, // OUT8rr
- 5739U, // OUTSB
- 5745U, // OUTSD
- 5751U, // OUTSW
- 2281707133U, // PABSBrm128
- 1409291901U, // PABSBrm64
- 1279399549U, // PABSBrr128
- 1279399549U, // PABSBrr64
- 2281707140U, // PABSDrm128
- 1409291908U, // PABSDrm64
- 1279399556U, // PABSDrr128
- 1279399556U, // PABSDrr64
- 2281707147U, // PABSWrm128
- 1409291915U, // PABSWrm64
- 1279399563U, // PABSWrr128
- 1279399563U, // PABSWrr64
- 1140855260U, // PACKSSDWrm
- 205656540U, // PACKSSDWrr
- 1140855270U, // PACKSSWBrm
- 205656550U, // PACKSSWBrr
- 1140856466U, // PACKUSDWrm
- 205657746U, // PACKUSDWrr
- 1140855280U, // PACKUSWBrm
- 205656560U, // PACKUSWBrr
- 1140855290U, // PADDBrm
- 205656570U, // PADDBrr
- 1140855297U, // PADDDrm
- 205656577U, // PADDDrr
- 1140855304U, // PADDQrm
- 205656584U, // PADDQrr
- 1140855311U, // PADDSBrm
- 205656591U, // PADDSBrr
- 1140855319U, // PADDSWrm
- 205656599U, // PADDSWrr
- 1140855327U, // PADDUSBrm
- 205656607U, // PADDUSBrr
- 1140855336U, // PADDUSWrm
- 205656616U, // PADDUSWrr
- 1140855345U, // PADDWrm
- 205656625U, // PADDWrr
- 1021318812U, // PALIGNR128rm
- 1073747612U, // PALIGNR128rr
- 1054217884U, // PALIGNR64rm
- 1073747612U, // PALIGNR64rr
- 1140855352U, // PANDNrm
- 205656632U, // PANDNrr
- 1140855359U, // PANDrm
- 205656639U, // PANDrr
- 1140855365U, // PAVGBrm
- 205656645U, // PAVGBrr
- 1140855372U, // PAVGWrm
- 205656652U, // PAVGWrr
- 1140856485U, // PBLENDVBrm0
- 205657765U, // PBLENDVBrr0
- 1021318838U, // PBLENDWrmi
- 1073747638U, // PBLENDWrri
- 1140855379U, // PCMPEQBrm
- 205656659U, // PCMPEQBrr
- 1140855388U, // PCMPEQDrm
- 205656668U, // PCMPEQDrr
- 1140856511U, // PCMPEQQrm
- 205657791U, // PCMPEQQrr
- 1140855397U, // PCMPEQWrm
- 205656677U, // PCMPEQWrr
- 2199918280U, // PCMPESTRIArm
- 230037192U, // PCMPESTRIArr
- 2199918280U, // PCMPESTRICrm
- 230037192U, // PCMPESTRICrr
- 2199918280U, // PCMPESTRIOrm
- 230037192U, // PCMPESTRIOrr
- 2199918280U, // PCMPESTRISrm
- 230037192U, // PCMPESTRISrr
- 2199918280U, // PCMPESTRIZrm
- 230037192U, // PCMPESTRIZrr
- 2199918280U, // PCMPESTRIrm
- 230037192U, // PCMPESTRIrr
- 5843U, // PCMPESTRM128MEM
- 5867U, // PCMPESTRM128REG
- 2199918339U, // PCMPESTRM128rm
- 230037251U, // PCMPESTRM128rr
- 1140855406U, // PCMPGTBrm
- 205656686U, // PCMPGTBrr
- 1140855415U, // PCMPGTDrm
- 205656695U, // PCMPGTDrr
- 1140856590U, // PCMPGTQrm
- 205657870U, // PCMPGTQrr
- 1140855424U, // PCMPGTWrm
- 205656704U, // PCMPGTWrr
- 2199918359U, // PCMPISTRIArm
- 230037271U, // PCMPISTRIArr
- 2199918359U, // PCMPISTRICrm
- 230037271U, // PCMPISTRICrr
- 2199918359U, // PCMPISTRIOrm
- 230037271U, // PCMPISTRIOrr
- 2199918359U, // PCMPISTRISrm
- 230037271U, // PCMPISTRISrr
- 2199918359U, // PCMPISTRIZrm
- 230037271U, // PCMPISTRIZrr
- 2199918359U, // PCMPISTRIrm
- 230037271U, // PCMPISTRIrr
- 5922U, // PCMPISTRM128MEM
- 5946U, // PCMPISTRM128REG
- 2199918418U, // PCMPISTRM128rm
- 230037330U, // PCMPISTRM128rr
- 2177374045U, // PEXTRBmr
- 230037341U, // PEXTRBrr
- 2177111909U, // PEXTRDmr
- 230037349U, // PEXTRDrr
- 2177242989U, // PEXTRQmr
- 230037357U, // PEXTRQrr
- 2176848521U, // PEXTRWmr
- 230036105U, // PEXTRWri
- 1140856693U, // PHADDDrm128
- 406984565U, // PHADDDrm64
- 205657973U, // PHADDDrr128
- 205657973U, // PHADDDrr64
- 1140856701U, // PHADDSWrm128
- 406984573U, // PHADDSWrm64
- 205657981U, // PHADDSWrr128
- 205657981U, // PHADDSWrr64
- 1140856710U, // PHADDWrm128
- 406984582U, // PHADDWrm64
- 205657990U, // PHADDWrr128
- 205657990U, // PHADDWrr64
- 2281707406U, // PHMINPOSUWrm128
- 1279399822U, // PHMINPOSUWrr128
- 1140856730U, // PHSUBDrm128
- 406984602U, // PHSUBDrm64
- 205658010U, // PHSUBDrr128
- 205658010U, // PHSUBDrr64
- 1140856738U, // PHSUBSWrm128
- 406984610U, // PHSUBSWrm64
- 205658018U, // PHSUBSWrr128
- 205658018U, // PHSUBSWrr64
- 1140856747U, // PHSUBWrm128
- 406984619U, // PHSUBWrm64
- 205658027U, // PHSUBWrr128
- 205658027U, // PHSUBWrr64
- 1056315315U, // PINSRBrm
- 1073747891U, // PINSRBrr
- 1052121019U, // PINSRDrm
- 1073747899U, // PINSRDrr
- 1054218179U, // PINSRQrm
- 1073747907U, // PINSRQrr
- 1050022545U, // PINSRWrmi
- 1073746577U, // PINSRWrri
- 1140856779U, // PMADDUBSWrm128
- 406984651U, // PMADDUBSWrm64
- 205658059U, // PMADDUBSWrr128
- 205658059U, // PMADDUBSWrr64
- 1140855449U, // PMADDWDrm
- 205656729U, // PMADDWDrr
- 1140856790U, // PMAXSBrm
- 205658070U, // PMAXSBrr
- 1140856798U, // PMAXSDrm
- 205658078U, // PMAXSDrr
- 1140855458U, // PMAXSWrm
- 205656738U, // PMAXSWrr
- 1140855466U, // PMAXUBrm
- 205656746U, // PMAXUBrr
- 1140856806U, // PMAXUDrm
- 205658086U, // PMAXUDrr
- 1140856814U, // PMAXUWrm
- 205658094U, // PMAXUWrr
- 1140856822U, // PMINSBrm
- 205658102U, // PMINSBrr
- 1140856830U, // PMINSDrm
- 205658110U, // PMINSDrr
- 1140855474U, // PMINSWrm
- 205656754U, // PMINSWrr
- 1140855482U, // PMINUBrm
- 205656762U, // PMINUBrr
- 1140856838U, // PMINUDrm
- 205658118U, // PMINUDrr
- 1140856846U, // PMINUWrm
- 205658126U, // PMINUWrr
- 1279398594U, // PMOVMSKBrr
- 1342183446U, // PMOVSXBDrm
- 1279399958U, // PMOVSXBDrr
- 1207965728U, // PMOVSXBQrm
- 1279399968U, // PMOVSXBQrr
- 1409292330U, // PMOVSXBWrm
- 1279399978U, // PMOVSXBWrr
- 1409292340U, // PMOVSXDQrm
- 1279399988U, // PMOVSXDQrr
- 1409292350U, // PMOVSXWDrm
- 1279399998U, // PMOVSXWDrr
- 1342183496U, // PMOVSXWQrm
- 1279400008U, // PMOVSXWQrr
- 1342183506U, // PMOVZXBDrm
- 1279400018U, // PMOVZXBDrr
- 1207965788U, // PMOVZXBQrm
- 1279400028U, // PMOVZXBQrr
- 1409292390U, // PMOVZXBWrm
- 1279400038U, // PMOVZXBWrr
- 1409292400U, // PMOVZXDQrm
- 1279400048U, // PMOVZXDQrr
- 1409292410U, // PMOVZXWDrm
- 1279400058U, // PMOVZXWDrr
- 1342183556U, // PMOVZXWQrm
- 1279400068U, // PMOVZXWQrr
- 1140856974U, // PMULDQrm
- 205658254U, // PMULDQrr
- 1140856982U, // PMULHRSWrm128
- 406984854U, // PMULHRSWrm64
- 205658262U, // PMULHRSWrr128
- 205658262U, // PMULHRSWrr64
- 1140855500U, // PMULHUWrm
- 205656780U, // PMULHUWrr
- 1140855509U, // PMULHWrm
- 205656789U, // PMULHWrr
- 1140856992U, // PMULLDrm
- 1140856992U, // PMULLDrm_int
- 205658272U, // PMULLDrr
- 205658272U, // PMULLDrr_int
- 1140855517U, // PMULLWrm
- 205656797U, // PMULLWrr
- 1140855525U, // PMULUDQrm
- 205656805U, // PMULUDQrr
- 79698088U, // POP16r
- 872421544U, // POP16rmm
- 79698088U, // POP16rmr
- 79698094U, // POP32r
- 952113326U, // POP32rmm
- 79698094U, // POP32rmr
- 79698100U, // POP64r
- 1476401332U, // POP64rmm
- 79698100U, // POP64rmr
- 1207965882U, // POPCNT16rm
- 1279400122U, // POPCNT16rr
- 1342183619U, // POPCNT32rm
- 1279400131U, // POPCNT32rr
- 1409292492U, // POPCNT64rm
- 1279400140U, // POPCNT64rr
- 6357U, // POPF
- 6363U, // POPFD
- 6369U, // POPFQ
- 6375U, // POPFS16
- 6384U, // POPFS32
- 6393U, // POPFS64
- 6402U, // POPGS16
- 6411U, // POPGS32
- 6420U, // POPGS64
- 1140855534U, // PORrm
- 205656814U, // PORrr
- 1610619165U, // PREFETCHNTA
- 1610619178U, // PREFETCHT0
- 1610619190U, // PREFETCHT1
- 1610619202U, // PREFETCHT2
- 1140855539U, // PSADBWrm
- 205656819U, // PSADBWrr
- 1140857166U, // PSHUFBrm128
- 406985038U, // PSHUFBrm64
- 205658446U, // PSHUFBrr128
- 205658446U, // PSHUFBrr64
- 2199918934U, // PSHUFDmi
- 230037846U, // PSHUFDri
- 2199918942U, // PSHUFHWmi
- 230037854U, // PSHUFHWri
- 2199918951U, // PSHUFLWmi
- 230037863U, // PSHUFLWri
- 1140857200U, // PSIGNBrm128
- 406985072U, // PSIGNBrm64
- 205658480U, // PSIGNBrr128
- 205658480U, // PSIGNBrr64
- 1140857208U, // PSIGNDrm128
- 406985080U, // PSIGNDrm64
- 205658488U, // PSIGNDrr128
- 205658488U, // PSIGNDrr64
- 1140857216U, // PSIGNWrm128
- 406985088U, // PSIGNWrm64
- 205658496U, // PSIGNWrr128
- 205658496U, // PSIGNWrr64
- 205658504U, // PSLLDQri
- 205656835U, // PSLLDri
- 1140855555U, // PSLLDrm
- 205656835U, // PSLLDrr
- 205656842U, // PSLLQri
- 1140855562U, // PSLLQrm
- 205656842U, // PSLLQrr
- 205656849U, // PSLLWri
- 1140855569U, // PSLLWrm
- 205656849U, // PSLLWrr
- 205656856U, // PSRADri
- 1140855576U, // PSRADrm
- 205656856U, // PSRADrr
- 205656863U, // PSRAWri
- 1140855583U, // PSRAWrm
- 205656863U, // PSRAWrr
- 205658512U, // PSRLDQri
- 205656870U, // PSRLDri
- 1140855590U, // PSRLDrm
- 205656870U, // PSRLDrr
- 205656877U, // PSRLQri
- 1140855597U, // PSRLQrm
- 205656877U, // PSRLQrr
- 205656884U, // PSRLWri
- 1140855604U, // PSRLWrm
- 205656884U, // PSRLWrr
- 1140855611U, // PSUBBrm
- 205656891U, // PSUBBrr
- 1140855618U, // PSUBDrm
- 205656898U, // PSUBDrr
- 1140855625U, // PSUBQrm
- 205656905U, // PSUBQrr
- 1140855632U, // PSUBSBrm
- 205656912U, // PSUBSBrr
- 1140855640U, // PSUBSWrm
- 205656920U, // PSUBSWrr
- 1140855648U, // PSUBUSBrm
- 205656928U, // PSUBUSBrr
- 1140855657U, // PSUBUSWrm
- 205656937U, // PSUBUSWrr
- 1140855666U, // PSUBWrm
- 205656946U, // PSUBWrr
- 2281707928U, // PTESTrm
- 1279400344U, // PTESTrr
- 1140855673U, // PUNPCKHBWrm
- 205656953U, // PUNPCKHBWrr
- 1140855684U, // PUNPCKHDQrm
- 205656964U, // PUNPCKHDQrr
- 1140857248U, // PUNPCKHQDQrm
- 205658528U, // PUNPCKHQDQrr
- 1140855695U, // PUNPCKHWDrm
- 205656975U, // PUNPCKHWDrr
- 1140855706U, // PUNPCKLBWrm
- 205656986U, // PUNPCKLBWrr
- 1140855717U, // PUNPCKLDQrm
- 205656997U, // PUNPCKLDQrr
- 1140857260U, // PUNPCKLQDQrm
- 205658540U, // PUNPCKLQDQrr
- 1140855728U, // PUNPCKLWDrm
- 205657008U, // PUNPCKLWDrr
- 79698360U, // PUSH16r
- 872421816U, // PUSH16rmm
- 79698360U, // PUSH16rmr
- 79698367U, // PUSH32i16
- 79698367U, // PUSH32i32
- 79698367U, // PUSH32i8
- 79698367U, // PUSH32r
- 952113599U, // PUSH32rmm
- 79698367U, // PUSH32rmr
- 79698374U, // PUSH64i16
- 79698374U, // PUSH64i32
- 79698374U, // PUSH64i8
- 79698374U, // PUSH64r
- 1476401606U, // PUSH64rmm
- 79698374U, // PUSH64rmr
- 6605U, // PUSHF
- 6612U, // PUSHFD
- 6619U, // PUSHFQ64
- 6626U, // PUSHFS16
- 6636U, // PUSHFS32
- 6646U, // PUSHFS64
- 6656U, // PUSHGS16
- 6666U, // PUSHGS32
- 6676U, // PUSHGS64
- 1140855739U, // PXORrm
- 205657019U, // PXORrr
- 872421918U, // RCL16m1
- 872421927U, // RCL16mCL
- 136321586U, // RCL16mi
- 79698462U, // RCL16r1
- 79698471U, // RCL16rCL
- 205658674U, // RCL16ri
- 952113720U, // RCL32m1
- 952113729U, // RCL32mCL
- 136583756U, // RCL32mi
- 79698488U, // RCL32r1
- 79698497U, // RCL32rCL
- 205658700U, // RCL32ri
- 1476401746U, // RCL64m1
- 1476401755U, // RCL64mCL
- 136714854U, // RCL64mi
- 79698514U, // RCL64r1
- 79698523U, // RCL64rCL
- 205658726U, // RCL64ri
- 1610619500U, // RCL8m1
- 1610619509U, // RCL8mCL
- 136845952U, // RCL8mi
- 79698540U, // RCL8r1
- 79698549U, // RCL8rCL
- 205658752U, // RCL8ri
- 1946163846U, // RCPPSm
- 1946163846U, // RCPPSm_Int
- 1279400582U, // RCPPSr
- 1279400582U, // RCPPSr_Int
- 2080381581U, // RCPSSm
- 2080381581U, // RCPSSm_Int
- 1279400589U, // RCPSSr
- 1279400589U, // RCPSSr_Int
- 872422036U, // RCR16m1
- 872422045U, // RCR16mCL
- 136321704U, // RCR16mi
- 79698580U, // RCR16r1
- 79698589U, // RCR16rCL
- 205658792U, // RCR16ri
- 952113838U, // RCR32m1
- 952113847U, // RCR32mCL
- 136583874U, // RCR32mi
- 79698606U, // RCR32r1
- 79698615U, // RCR32rCL
- 205658818U, // RCR32ri
- 1476401864U, // RCR64m1
- 1476401873U, // RCR64mCL
- 136714972U, // RCR64mi
- 79698632U, // RCR64r1
- 79698641U, // RCR64rCL
- 205658844U, // RCR64ri
- 1610619618U, // RCR8m1
- 1610619627U, // RCR8mCL
- 136846070U, // RCR8mi
- 79698658U, // RCR8r1
- 79698667U, // RCR8rCL
- 205658870U, // RCR8ri
- 6908U, // RDMSR
- 6914U, // RDPMC
- 6920U, // RDTSC
- 6926U, // RDTSCP
- 6933U, // REPNE_PREFIX
- 6939U, // REP_MOVSB
- 6949U, // REP_MOVSD
- 6959U, // REP_MOVSQ
- 6969U, // REP_MOVSW
- 6979U, // REP_PREFIX
- 6983U, // REP_STOSB
- 6993U, // REP_STOSD
- 7003U, // REP_STOSQ
- 7013U, // REP_STOSW
- 7023U, // RET
- 79698803U, // RETI
- 872422264U, // ROL16m1
- 872422270U, // ROL16mCL
- 136321912U, // ROL16mi
- 79698808U, // ROL16r1
- 79698814U, // ROL16rCL
- 205659000U, // ROL16ri
- 952114057U, // ROL32m1
- 952114063U, // ROL32mCL
- 136584073U, // ROL32mi
- 79698825U, // ROL32r1
- 79698831U, // ROL32rCL
- 205659017U, // ROL32ri
- 1476402074U, // ROL64m1
- 1476402080U, // ROL64mCL
- 136715162U, // ROL64mi
- 79698842U, // ROL64r1
- 79698848U, // ROL64rCL
- 205659034U, // ROL64ri
- 1610619819U, // ROL8m1
- 1610619825U, // ROL8mCL
- 136846251U, // ROL8mi
- 79698859U, // ROL8r1
- 79698865U, // ROL8rCL
- 205659051U, // ROL8ri
- 872422332U, // ROR16m1
- 872422338U, // ROR16mCL
- 136321980U, // ROR16mi
- 79698876U, // ROR16r1
- 79698882U, // ROR16rCL
- 205659068U, // ROR16ri
- 952114125U, // ROR32m1
- 952114131U, // ROR32mCL
- 136584141U, // ROR32mi
- 79698893U, // ROR32r1
- 79698899U, // ROR32rCL
- 205659085U, // ROR32ri
- 1476402142U, // ROR64m1
- 1476402148U, // ROR64mCL
- 136715230U, // ROR64mi
- 79698910U, // ROR64r1
- 79698916U, // ROR64rCL
- 205659102U, // ROR64ri
- 1610619887U, // ROR8m1
- 1610619893U, // ROR8mCL
- 136846319U, // ROR8mi
- 79698927U, // ROR8r1
- 79698933U, // ROR8rCL
- 205659119U, // ROR8ri
- 2202016768U, // ROUNDPDm_Int
- 230038528U, // ROUNDPDr_Int
- 2202016777U, // ROUNDPSm_Int
- 230038537U, // ROUNDPSr_Int
- 1063263250U, // ROUNDSDm_Int
- 1073749010U, // ROUNDSDr_Int
- 1044388891U, // ROUNDSSm_Int
- 1073749019U, // ROUNDSSr_Int
- 7204U, // RSM
- 1946164264U, // RSQRTPSm
- 1946164264U, // RSQRTPSm_Int
- 1279401000U, // RSQRTPSr
- 1279401000U, // RSQRTPSr_Int
- 2080382001U, // RSQRTSSm
- 2080382001U, // RSQRTSSm_Int
- 1279401009U, // RSQRTSSr
- 1279401009U, // RSQRTSSr_Int
- 7226U, // SAHF
- 872422463U, // SAR16m1
- 872422469U, // SAR16mCL
- 136322111U, // SAR16mi
- 79699007U, // SAR16r1
- 79699013U, // SAR16rCL
- 205659199U, // SAR16ri
- 952114256U, // SAR32m1
- 952114262U, // SAR32mCL
- 136584272U, // SAR32mi
- 79699024U, // SAR32r1
- 79699030U, // SAR32rCL
- 205659216U, // SAR32ri
- 1476402273U, // SAR64m1
- 1476402279U, // SAR64mCL
- 136715361U, // SAR64mi
- 79699041U, // SAR64r1
- 79699047U, // SAR64rCL
- 205659233U, // SAR64ri
- 1610620018U, // SAR8m1
- 1610620024U, // SAR8mCL
- 136846450U, // SAR8mi
- 79699058U, // SAR8r1
- 79699064U, // SAR8rCL
- 205659250U, // SAR8ri
- 67116163U, // SBB16i16
- 136322179U, // SBB16mi
- 136322179U, // SBB16mi8
- 136322179U, // SBB16mr
- 205659267U, // SBB16ri
- 205659267U, // SBB16ri8
- 272768131U, // SBB16rm
- 205659267U, // SBB16rr
- 205659267U, // SBB16rr_REV
- 73407625U, // SBB32i32
- 136584329U, // SBB32mi
- 136584329U, // SBB32mi8
- 136584329U, // SBB32mr
- 205659273U, // SBB32ri
- 205659273U, // SBB32ri8
- 339877001U, // SBB32rm
- 205659273U, // SBB32rr
- 205659273U, // SBB32rr_REV
- 75504783U, // SBB64i32
- 136715407U, // SBB64mi32
- 136715407U, // SBB64mi8
- 136715407U, // SBB64mr
- 205659279U, // SBB64ri32
- 205659279U, // SBB64ri8
- 406985871U, // SBB64rm
- 205659279U, // SBB64rr
- 205659279U, // SBB64rr_REV
- 77601941U, // SBB8i8
- 136846485U, // SBB8mi
- 136846485U, // SBB8mr
- 205659285U, // SBB8ri
- 474094741U, // SBB8rm
- 205659285U, // SBB8rr
- 205659285U, // SBB8rr_REV
- 7323U, // SCAS16
- 7329U, // SCAS32
- 7335U, // SCAS64
- 7341U, // SCAS8
- 1610620083U, // SETAEm
- 79699123U, // SETAEr
- 1610620090U, // SETAm
- 79699130U, // SETAr
- 1610620096U, // SETBEm
- 79699136U, // SETBEr
- 0U, // SETB_C16r
- 0U, // SETB_C32r
- 0U, // SETB_C64r
- 0U, // SETB_C8r
- 1610620103U, // SETBm
- 79699143U, // SETBr
- 1610620109U, // SETEm
- 79699149U, // SETEr
- 1610620115U, // SETGEm
- 79699155U, // SETGEr
- 1610620122U, // SETGm
- 79699162U, // SETGr
- 1610620128U, // SETLEm
- 79699168U, // SETLEr
- 1610620135U, // SETLm
- 79699175U, // SETLr
- 1610620141U, // SETNEm
- 79699181U, // SETNEr
- 1610620148U, // SETNOm
- 79699188U, // SETNOr
- 1610620155U, // SETNPm
- 79699195U, // SETNPr
- 1610620162U, // SETNSm
- 79699202U, // SETNSr
- 1610620169U, // SETOm
- 79699209U, // SETOr
- 1610620175U, // SETPm
- 79699215U, // SETPr
- 1610620181U, // SETSm
- 79699221U, // SETSr
- 7451U, // SFENCE
- 2214599970U, // SGDTm
- 872422696U, // SHL16m1
- 872422702U, // SHL16mCL
- 136322344U, // SHL16mi
- 79699240U, // SHL16r1
- 79699246U, // SHL16rCL
- 205659432U, // SHL16ri
- 952114489U, // SHL32m1
- 952114495U, // SHL32mCL
- 136584505U, // SHL32mi
- 79699257U, // SHL32r1
- 79699263U, // SHL32rCL
- 205659449U, // SHL32ri
- 1476402506U, // SHL64m1
- 1476402512U, // SHL64mCL
- 136715594U, // SHL64mi
- 79699274U, // SHL64r1
- 79699280U, // SHL64rCL
- 205659466U, // SHL64ri
- 1610620251U, // SHL8m1
- 1610620257U, // SHL8mCL
- 136846683U, // SHL8mi
- 79699291U, // SHL8r1
- 79699297U, // SHL8rCL
- 205659483U, // SHL8ri
- 136322412U, // SHLD16mrCL
- 2176851320U, // SHLD16mri8
- 205659500U, // SHLD16rrCL
- 1073749368U, // SHLD16rri8
- 136584575U, // SHLD32mrCL
- 2177113483U, // SHLD32mri8
- 205659519U, // SHLD32rrCL
- 1073749387U, // SHLD32rri8
- 136715666U, // SHLD64mrCL
- 2177244574U, // SHLD64mri8
- 205659538U, // SHLD64rrCL
- 1073749406U, // SHLD64rri8
- 872422821U, // SHR16m1
- 872422827U, // SHR16mCL
- 136322469U, // SHR16mi
- 79699365U, // SHR16r1
- 79699371U, // SHR16rCL
- 205659557U, // SHR16ri
- 952114614U, // SHR32m1
- 952114620U, // SHR32mCL
- 136584630U, // SHR32mi
- 79699382U, // SHR32r1
- 79699388U, // SHR32rCL
- 205659574U, // SHR32ri
- 1476402631U, // SHR64m1
- 1476402637U, // SHR64mCL
- 136715719U, // SHR64mi
- 79699399U, // SHR64r1
- 79699405U, // SHR64rCL
- 205659591U, // SHR64ri
- 1610620376U, // SHR8m1
- 1610620382U, // SHR8mCL
- 136846808U, // SHR8mi
- 79699416U, // SHR8r1
- 79699422U, // SHR8rCL
- 205659608U, // SHR8ri
- 136322537U, // SHRD16mrCL
- 2176851445U, // SHRD16mri8
- 205659625U, // SHRD16rrCL
- 1073749493U, // SHRD16rri8
- 136584700U, // SHRD32mrCL
- 2177113608U, // SHRD32mri8
- 205659644U, // SHRD32rrCL
- 1073749512U, // SHRD32rri8
- 136715791U, // SHRD64mrCL
- 2177244699U, // SHRD64mri8
- 205659663U, // SHRD64rrCL
- 1073749531U, // SHRD64rri8
- 1065360930U, // SHUFPDrmi
- 1073749538U, // SHUFPDrri
- 1065360938U, // SHUFPSrmi
- 1073749546U, // SHUFPSrri
- 2214600242U, // SIDTm
- 7736U, // SIN_F
- 0U, // SIN_Fp32
- 0U, // SIN_Fp64
- 0U, // SIN_Fp80
- 872422973U, // SLDT16m
- 79699517U, // SLDT16r
- 872422980U, // SLDT64m
- 79699524U, // SLDT64r
- 872422987U, // SMSW16m
- 79699531U, // SMSW16r
- 79699538U, // SMSW32r
- 79699545U, // SMSW64r
- 1946164832U, // SQRTPDm
- 1946164832U, // SQRTPDm_Int
- 1279401568U, // SQRTPDr
- 1279401568U, // SQRTPDr_Int
- 1946164840U, // SQRTPSm
- 1946164840U, // SQRTPSm_Int
- 1279401576U, // SQRTPSr
- 1279401576U, // SQRTPSr_Int
- 2013273712U, // SQRTSDm
- 2013273712U, // SQRTSDm_Int
- 1279401584U, // SQRTSDr
- 1279401584U, // SQRTSDr_Int
- 2080382584U, // SQRTSSm
- 2080382584U, // SQRTSSm_Int
- 1279401592U, // SQRTSSr
- 1279401592U, // SQRTSSr_Int
- 7808U, // SQRT_F
- 0U, // SQRT_Fp32
- 0U, // SQRT_Fp64
- 0U, // SQRT_Fp80
- 7814U, // SS_PREFIX
- 7817U, // STC
- 7821U, // STD
- 7825U, // STI
- 952114837U, // STMXCSR
- 7838U, // STOSB
- 7844U, // STOSD
- 7850U, // STOSW
- 872423088U, // STRm
- 79699632U, // STRr
- 738205366U, // ST_F32m
- 805314236U, // ST_F64m
- 738205378U, // ST_FP32m
- 805314249U, // ST_FP64m
- 2415926992U, // ST_FP80m
- 79699671U, // ST_FPrr
- 0U, // ST_Fp32m
- 0U, // ST_Fp64m
- 0U, // ST_Fp64m32
- 0U, // ST_Fp80m32
- 0U, // ST_Fp80m64
- 0U, // ST_FpP32m
- 0U, // ST_FpP64m
- 0U, // ST_FpP64m32
- 0U, // ST_FpP80m
- 0U, // ST_FpP80m32
- 0U, // ST_FpP80m64
- 79699677U, // ST_Frr
- 67116770U, // SUB16i16
- 136322786U, // SUB16mi
- 136322786U, // SUB16mi8
- 136322786U, // SUB16mr
- 205659874U, // SUB16ri
- 205659874U, // SUB16ri8
- 272768738U, // SUB16rm
- 205659874U, // SUB16rr
- 205659874U, // SUB16rr_REV
- 73408232U, // SUB32i32
- 136584936U, // SUB32mi
- 136584936U, // SUB32mi8
- 136584936U, // SUB32mr
- 205659880U, // SUB32ri
- 205659880U, // SUB32ri8
- 339877608U, // SUB32rm
- 205659880U, // SUB32rr
- 205659880U, // SUB32rr_REV
- 75505390U, // SUB64i32
- 136716014U, // SUB64mi32
- 136716014U, // SUB64mi8
- 136716014U, // SUB64mr
- 205659886U, // SUB64ri32
- 205659886U, // SUB64ri8
- 406986478U, // SUB64rm
- 205659886U, // SUB64rr
- 205659886U, // SUB64rr_REV
- 77602548U, // SUB8i8
- 136847092U, // SUB8mi
- 136847092U, // SUB8mr
- 205659892U, // SUB8ri
- 474095348U, // SUB8rm
- 205659892U, // SUB8rr
- 205659892U, // SUB8rr_REV
- 536878842U, // SUBPDrm
- 205659898U, // SUBPDrr
- 536878849U, // SUBPSrm
- 205659905U, // SUBPSrr
- 738205448U, // SUBR_F32m
- 805314320U, // SUBR_F64m
- 872423192U, // SUBR_FI16m
- 952114977U, // SUBR_FI32m
- 79699754U, // SUBR_FPrST0
- 79699761U, // SUBR_FST0r
- 0U, // SUBR_Fp32m
- 0U, // SUBR_Fp64m
- 0U, // SUBR_Fp64m32
- 0U, // SUBR_Fp80m32
- 0U, // SUBR_Fp80m64
- 0U, // SUBR_FpI16m32
- 0U, // SUBR_FpI16m64
- 0U, // SUBR_FpI16m80
- 0U, // SUBR_FpI32m32
- 0U, // SUBR_FpI32m64
- 0U, // SUBR_FpI32m80
- 79699768U, // SUBR_FrST0
- 603987782U, // SUBSDrm
- 603987782U, // SUBSDrm_Int
- 205659974U, // SUBSDrr
- 205659974U, // SUBSDrr_Int
- 671096653U, // SUBSSrm
- 671096653U, // SUBSSrm_Int
- 205659981U, // SUBSSrr
- 205659981U, // SUBSSrr_Int
- 738205524U, // SUB_F32m
- 805314395U, // SUB_F64m
- 872423266U, // SUB_FI16m
- 952115050U, // SUB_FI32m
- 79699826U, // SUB_FPrST0
- 79699834U, // SUB_FST0r
- 0U, // SUB_Fp32
- 0U, // SUB_Fp32m
- 0U, // SUB_Fp64
- 0U, // SUB_Fp64m
- 0U, // SUB_Fp64m32
- 0U, // SUB_Fp80
- 0U, // SUB_Fp80m32
- 0U, // SUB_Fp80m64
- 0U, // SUB_FpI16m32
- 0U, // SUB_FpI16m64
- 0U, // SUB_FpI16m80
- 0U, // SUB_FpI32m32
- 0U, // SUB_FpI32m64
- 0U, // SUB_FpI32m80
- 79699840U, // SUB_FrST0
- 8079U, // SWAPGS
- 8086U, // SYSCALL
- 8094U, // SYSENTER
- 8103U, // SYSEXIT
- 8103U, // SYSEXIT64
- 8111U, // SYSRET
- 1604325038U, // TAILJMPd
- 1000349622U, // TAILJMPm
- 127930010U, // TAILJMPr
- 127930017U, // TAILJMPr64
- 130031548U, // TCRETURNdi
- 130031548U, // TCRETURNdi64
- 130031548U, // TCRETURNri
- 130031548U, // TCRETURNri64
- 67117000U, // TEST16i16
- 136323016U, // TEST16mi
- 1279401928U, // TEST16ri
- 1207967688U, // TEST16rm
- 1279401928U, // TEST16rr
- 73408463U, // TEST32i32
- 136585167U, // TEST32mi
- 1279401935U, // TEST32ri
- 1342185423U, // TEST32rm
- 1279401935U, // TEST32rr
- 75505622U, // TEST64i32
- 136716246U, // TEST64mi32
- 1279401942U, // TEST64ri32
- 1409294294U, // TEST64rm
- 1279401942U, // TEST64rr
- 77602781U, // TEST8i8
- 136847325U, // TEST8mi
- 1279401949U, // TEST8ri
- 1690312669U, // TEST8rm
- 1279401949U, // TEST8rr
- 2684358526U, // TLS_addr32
- 2751471588U, // TLS_addr64
- 8182U, // TRAP
- 8186U, // TST_F
- 0U, // TST_Fp32
- 0U, // TST_Fp64
- 0U, // TST_Fp80
- 2013269594U, // UCOMISDrm
- 1279397466U, // UCOMISDrr
- 2080378467U, // UCOMISSrm
- 1279397475U, // UCOMISSrr
- 83894271U, // UCOM_FIPr
- 83894280U, // UCOM_FIr
- 8208U, // UCOM_FPPr
- 79699992U, // UCOM_FPr
- 0U, // UCOM_FpIr32
- 0U, // UCOM_FpIr64
- 0U, // UCOM_FpIr80
- 0U, // UCOM_Fpr32
- 0U, // UCOM_Fpr64
- 0U, // UCOM_Fpr80
- 79700000U, // UCOM_Fr
- 536879143U, // UNPCKHPDrm
- 205660199U, // UNPCKHPDrr
- 536879153U, // UNPCKHPSrm
- 205660209U, // UNPCKHPSrr
- 536879163U, // UNPCKLPDrm
- 205660219U, // UNPCKLPDrr
- 536879173U, // UNPCKLPSrm
- 205660229U, // UNPCKLPSrr
- 70459471U, // VASTART_SAVE_XMM_REGS
- 872423527U, // VERRm
- 79700071U, // VERRr
- 872423533U, // VERWm
- 79700077U, // VERWr
- 8307U, // VMCALL
- 1476403322U, // VMCLEARm
- 8323U, // VMLAUNCH
- 1476403340U, // VMPTRLDm
- 1476403349U, // VMPTRSTm
- 136585374U, // VMREAD32rm
- 1279402142U, // VMREAD32rr
- 136716455U, // VMREAD64rm
- 1279402151U, // VMREAD64rr
- 8368U, // VMRESUME
- 1342185657U, // VMWRITE32rm
- 1279402169U, // VMWRITE32rr
- 1409294531U, // VMWRITE64rm
- 1279402179U, // VMWRITE64rr
- 8397U, // VMXOFF
- 1476403412U, // VMXON
- 0U, // V_SET0
- 0U, // V_SETALLONES
- 8411U, // WAIT
- 8416U, // WBINVD
- 1476396120U, // WINCALL64m
- 1556087918U, // WINCALL64pcrel32
- 79692888U, // WINCALL64r
- 8423U, // WRMSR
- 136323309U, // XADD16rm
- 1279402221U, // XADD16rr
- 136585460U, // XADD32rm
- 1279402228U, // XADD32rr
- 136716539U, // XADD64rm
- 1279402235U, // XADD64rr
- 136847618U, // XADD8rm
- 1279402242U, // XADD8rr
- 67117321U, // XCHG16ar
- 1317150985U, // XCHG16rm
- 1340088585U, // XCHG16rr
- 73408784U, // XCHG32ar
- 1319248144U, // XCHG32rm
- 1340088592U, // XCHG32rr
- 75505943U, // XCHG64ar
- 1321345303U, // XCHG64rm
- 1340088599U, // XCHG64rr
- 1323442462U, // XCHG8rm
- 1340088606U, // XCHG8rr
- 79700261U, // XCH_F
- 8491U, // XLAT
- 67117361U, // XOR16i16
- 136323377U, // XOR16mi
- 136323377U, // XOR16mi8
- 136323377U, // XOR16mr
- 205660465U, // XOR16ri
- 205660465U, // XOR16ri8
- 272769329U, // XOR16rm
- 205660465U, // XOR16rr
- 205660465U, // XOR16rr_REV
- 73408823U, // XOR32i32
- 136585527U, // XOR32mi
- 136585527U, // XOR32mi8
- 136585527U, // XOR32mr
- 205660471U, // XOR32ri
- 205660471U, // XOR32ri8
- 339878199U, // XOR32rm
- 205660471U, // XOR32rr
- 205660471U, // XOR32rr_REV
- 75505981U, // XOR64i32
- 136716605U, // XOR64mi32
- 136716605U, // XOR64mi8
- 136716605U, // XOR64mr
- 205660477U, // XOR64ri32
- 205660477U, // XOR64ri8
- 406987069U, // XOR64rm
- 205660477U, // XOR64rr
- 205660477U, // XOR64rr_REV
- 77603139U, // XOR8i8
- 136847683U, // XOR8mi
- 136847683U, // XOR8mr
- 205660483U, // XOR8ri
- 474095939U, // XOR8rm
- 205660483U, // XOR8rr
- 205660483U, // XOR8rr_REV
- 536874124U, // XORPDrm
- 205655180U, // XORPDrr
- 536874131U, // XORPSrm
- 205655187U, // XORPSrr
- 0U
- };
-
- const char *AsmStrs =
- "DBG_VALUE\000fabs\000adcw\t\000adcl\t\000adcq\t\000adcb\t\000addw\t\000"
- "addl\t\000addq\t\000addb\t\000addpd\t\000addps\t\000addsd\t\000addss\t\000"
- "addsubpd\t\000addsubps\t\000fadds\t\000faddl\t\000fiadds\t\000fiaddl\t\000"
- "faddp\t\000fadd\t\000fadd\t%st(0), \000#ADJCALLSTACKDOWN\000#ADJCALLSTA"
- "CKUP\000andw\t\000andl\t\000andq\t\000andb\t\000andnpd\t\000andnps\t\000"
- "andpd\t\000andps\t\000#ATOMADD6432 PSEUDO!\000#ATOMAND16 PSEUDO!\000#AT"
- "OMAND32 PSEUDO!\000#ATOMAND64 PSEUDO!\000#ATOMAND6432 PSEUDO!\000#ATOMA"
- "ND8 PSEUDO!\000#ATOMMAX16 PSEUDO!\000#ATOMMAX32 PSEUDO!\000#ATOMMAX64 P"
- "SEUDO!\000#ATOMMIN16 PSEUDO!\000#ATOMMIN32 PSEUDO!\000#ATOMMIN64 PSEUDO"
- "!\000#ATOMNAND16 PSEUDO!\000#ATOMNAND32 PSEUDO!\000#ATOMNAND64 PSEUDO!\000"
- "#ATOMNAND6432 PSEUDO!\000#ATOMNAND8 PSEUDO!\000#ATOMOR16 PSEUDO!\000#AT"
- "OMOR32 PSEUDO!\000#ATOMOR64 PSEUDO!\000#ATOMOR6432 PSEUDO!\000#ATOMOR8 "
- "PSEUDO!\000#ATOMSUB6432 PSEUDO!\000#ATOMSWAP6432 PSEUDO!\000#ATOMUMAX16"
- " PSEUDO!\000#ATOMUMAX32 PSEUDO!\000#ATOMUMAX64 PSEUDO!\000#ATOMUMIN16 P"
- "SEUDO!\000#ATOMUMIN32 PSEUDO!\000#ATOMUMIN64 PSEUDO!\000#ATOMXOR16 PSEU"
- "DO!\000#ATOMXOR32 PSEUDO!\000#ATOMXOR64 PSEUDO!\000#ATOMXOR6432 PSEUDO!"
- "\000#ATOMXOR8 PSEUDO!\000blendpd\t\000blendps\t\000blendvpd\t%xmm0, \000"
- "blendvps\t%xmm0, \000bsfw\t\000bsfl\t\000bsfq\t\000bsrw\t\000bsrl\t\000"
- "bsrq\t\000bswapl\t\000bswapq\t\000btw\t\000btl\t\000btq\t\000btcw\t\000"
- "btcl\t\000btcq\t\000btrw\t\000btrl\t\000btrq\t\000btsw\t\000btsl\t\000b"
- "tsq\t\000call\t*\000callq\t*\000callq\t\000call\t\000cbtw\000cltd\000cl"
- "tq\000fchs\000clc\000cld\000clflush\t\000cli\000clts\000cmc\000cmovaw\t"
- "\000cmoval\t\000cmovaq\t\000cmovaew\t\000cmovael\t\000cmovaeq\t\000cmov"
- "bw\t\000cmovbl\t\000cmovbq\t\000cmovbew\t\000cmovbel\t\000cmovbeq\t\000"
- "fcmovbe\t\000fcmovb\t\000cmovew\t\000cmovel\t\000cmoveq\t\000fcmove\t\000"
- "cmovgw\t\000cmovgl\t\000cmovgq\t\000cmovgew\t\000cmovgel\t\000cmovgeq\t"
- "\000cmovlw\t\000cmovll\t\000cmovlq\t\000cmovlew\t\000cmovlel\t\000cmovl"
- "eq\t\000fcmovnbe\t\000fcmovnb\t\000cmovnew\t\000cmovnel\t\000cmovneq\t\000"
- "fcmovne\t\000cmovnow\t\000cmovnol\t\000cmovnoq\t\000cmovnpw\t\000cmovnp"
- "l\t\000cmovnpq\t\000fcmovnu\t\000cmovnsw\t\000cmovnsl\t\000cmovnsq\t\000"
- "cmovow\t\000cmovol\t\000cmovoq\t\000cmovpw\t\000cmovpl\t\000cmovpq\t\000"
- "fcmovu\t \000cmovsw\t\000cmovsl\t\000cmovsq\t\000#CMOV_FR32 PSEUDO!\000"
- "#CMOV_FR64 PSEUDO!\000#CMOV_GR8 PSEUDO!\000#CMOV_V1I64 PSEUDO!\000#CMOV"
- "_V2F64 PSEUDO!\000#CMOV_V2I64 PSEUDO!\000#CMOV_V4F32 PSEUDO!\000cmpw\t\000"
- "cmpl\t\000cmpq\t\000cmpb\t\000cmp\000cmpsw\000cmpsl\000cmpsq\000cmpsb\000"
- "cmpxchg16b\t\000cmpxchgw\t\000cmpxchgl\t\000cmpxchgq\t\000cmpxchg8b\t\000"
- "cmpxchgb\t\000comisd\t\000comiss\t\000fcomp\t\000fcomip\t\000fcomi\t\000"
- "fcom\t\000fcos\000cpuid\000cqto\000crc32 \t\000cs\000cvtdq2pd\t\000cvtd"
- "q2ps\t\000cvtpd2dq\t\000cvtpd2ps\t\000cvtps2dq\t\000cvtps2pd\t\000cvtsd"
- "2siq\t\000cvtsd2ss\t\000cvtsi2sdq\t\000cvtsi2sd\t\000cvtsi2ssq\t\000cvt"
- "si2ss\t\000cvtss2sd\t\000cvtss2siq\t\000cvtss2sil\t\000cvttps2dq\t\000c"
- "vttsd2siq\t\000cvttsd2si\t\000cvttss2siq\t\000cvttss2si\t\000cwtd\000cw"
- "tl\000decw\t\000decl\t\000decq\t\000decb\t\000divw\t\000divl\t\000divq\t"
- "\000divb\t\000divpd\t\000divps\t\000fdivrs\t\000fdivrl\t\000fidivrs\t\000"
- "fidivrl\t\000fdivp\t\000fdivr\t\000fdiv\t%st(0), \000divsd\t\000divss\t"
- "\000fdivs\t\000fdivl\t\000fidivs\t\000fidivl\t\000fdivrp\t\000fdiv\t\000"
- "fdivr\t%st(0), \000dppd\t\000dpps\t\000ds\000ret\t#eh_return, addr: \000"
- "enter\t\000es\000extractps\t\000f2xm1\000lcallw\t\000lcallw\t*\000lcall"
- "l\t\000lcalll\t*\000lcallq\t*\000ljmpw\t\000ljmpw\t*\000ljmpl\t\000ljmp"
- "l\t*\000ljmpq\t*\000fbld\t\000fbstp\t\000fcoml\t\000fcomll\t\000fcompl\t"
- "\000fcompll\t\000fcompp\000fdecstp\000ffree\t\000ficomw\t\000ficoml\t\000"
- "ficompw\t\000ficompl\t\000fincstp\000fldcw\t\000fldenv\t\000fldl2e\000f"
- "ldl2t\000fldlg2\000fldln2\000fldpi\000fnclex\000fninit\000fnop\000fnstc"
- "w\t\000fnstsw %ax\000fnstsw\t\000##FP32_TO_INT16_IN_MEM PSEUDO!\000##FP"
- "32_TO_INT32_IN_MEM PSEUDO!\000##FP32_TO_INT64_IN_MEM PSEUDO!\000##FP64_"
- "TO_INT16_IN_MEM PSEUDO!\000##FP64_TO_INT32_IN_MEM PSEUDO!\000##FP64_TO_"
- "INT64_IN_MEM PSEUDO!\000##FP80_TO_INT16_IN_MEM PSEUDO!\000##FP80_TO_INT"
- "32_IN_MEM PSEUDO!\000##FP80_TO_INT64_IN_MEM PSEUDO!\000fpatan\000fprem\000"
- "fprem1\000fptan\000##FP_REG_KILL\000frndint\000frstor\t\000fnsave\t\000"
- "fscale\000fsincos\000fnstenv\t\000movl\t%fs:\000fs\000fxam\000fxrstor\t"
- "\000fxsave\t\000fxtract\000fyl2x\000fyl2xp1\000movapd\t\000movaps\t\000"
- "orpd\t\000orps\t\000xorpd\t\000xorps\t\000movl\t%gs:\000gs\000haddpd\t\000"
- "haddps\t\000hlt\000hsubpd\t\000hsubps\t\000idivw\t\000idivl\t\000idivq\t"
- "\000idivb\t\000filds\t\000fildl\t\000fildll\t\000imulw\t\000imull\t\000"
- "imulq\t\000imulb\t\000insw\000inw\t\000inw\t%dx, %ax\000insl\000inl\t\000"
- "inl\t%dx, %eax\000insb\000inb\t\000inb\t%dx, %al\000incw\t\000incl\t\000"
- "incq\t\000incb\t\000insertps\t\000int\t\000int\t3\000invd\000invept\000"
- "invlpg\t\000invvpid\000iretw\000iretl\000iretq\000fisttps\t\000fisttpl\t"
- "\000fisttpll\t\000fists\t\000fistl\t\000fistps\t\000fistpl\t\000fistpll"
- "\t\000cvtpd2pi\t\000cvtpi2pd\t\000cvtpi2ps\t\000cvtps2pi\t\000cvtsd2si\t"
- "\000cvtss2si\t\000cvttpd2dq\t\000cvttpd2pi\t\000cvttps2pi\t\000ucomisd\t"
- "\000ucomiss\t\000jae\t\000ja\t\000jbe\t\000jb\t\000jcxz\t\000je\t\000jg"
- "e\t\000jg\t\000jle\t\000jl\t\000jmpl\t*\000jmpq\t*\000jmpq\t\000jmp\t\000"
- "jne\t\000jno\t\000jnp\t\000jns\t\000jo\t\000jp\t\000js\t\000lahf\000lar"
- "w\t\000larl\t\000larq\t\000lock\n\tcmpxchgw\t\000lock\n\tcmpxchgl\t\000"
- "lock\n\tcmpxchgq\t\000lock\n\tcmpxchgb\t\000lock\n\tcmpxchg8b\t\000lddq"
- "u\t\000ldmxcsr\t\000ldsw\t\000ldsl\t\000fldz\000fld1\000flds\t\000fldl\t"
- "\000fldt\t\000fld\t\000leaw\t\000leal\t\000leaq\t\000leave\000lesw\t\000"
- "lesl\t\000lfence\000lfsw\t\000lfsl\t\000lfsq\t\000lgdt\t\000lgsw\t\000l"
- "gsl\t\000lgsq\t\000lidt\t\000lldtw\t\000lmsww\t\000lock\n\taddw\t\000lo"
- "ck\n\taddl\t\000lock\n\taddq\t\000lock\n\taddb\t\000lock\n\tdecw\t\000l"
- "ock\n\tdecl\t\000lock\n\tdecq\t\000lock\n\tdecb\t\000lock\n\tincw\t\000"
- "lock\n\tincl\t\000lock\n\tincq\t\000lock\n\tincb\t\000lock\000lock\n\ts"
- "ubw\t\000lock\n\tsubl\t\000lock\n\tsubq\t\000lock\n\tsubb\t\000lodsb\000"
- "lodsl\000lodsq\000lodsw\000loop\t\000loope\t\000loopne\t\000lret\000lre"
- "t\t\000lslw\t\000lsll\t\000lslq\t\000lssw\t\000lssl\t\000lssq\t\000ltrw"
- "\t\000lock\n\txaddw\t\000lock\n\txaddl\t\000lock\n\txadd\t\000lock\n\tx"
- "addb\t\000maskmovdqu\t\000maxpd\t\000maxps\t\000maxsd\t\000maxss\t\000m"
- "fence\000# dynamic stack allocation\000minpd\t\000minps\t\000minsd\t\000"
- "minss\t\000emms\000femms\000maskmovq\t\000movd\t\000movdq2q\t\000movntq"
- "\t\000movq2dq\t\000movq\t\000packssdw\t\000packsswb\t\000packuswb\t\000"
- "paddb\t\000paddd\t\000paddq\t\000paddsb\t\000paddsw\t\000paddusb\t\000p"
- "addusw\t\000paddw\t\000pandn\t\000pand\t\000pavgb\t\000pavgw\t\000pcmpe"
- "qb\t\000pcmpeqd\t\000pcmpeqw\t\000pcmpgtb\t\000pcmpgtd\t\000pcmpgtw\t\000"
- "pextrw\t\000pinsrw\t\000pmaddwd\t\000pmaxsw\t\000pmaxub\t\000pminsw\t\000"
- "pminub\t\000pmovmskb\t\000pmulhuw\t\000pmulhw\t\000pmullw\t\000pmuludq\t"
- "\000por\t\000psadbw\t\000pshufw\t\000pslld\t\000psllq\t\000psllw\t\000p"
- "srad\t\000psraw\t\000psrld\t\000psrlq\t\000psrlw\t\000psubb\t\000psubd\t"
- "\000psubq\t\000psubsb\t\000psubsw\t\000psubusb\t\000psubusw\t\000psubw\t"
- "\000punpckhbw\t\000punpckhdq\t\000punpckhwd\t\000punpcklbw\t\000punpckl"
- "dq\t\000punpcklwd\t\000pxor\t\000monitor\000movw\t%ax, \000movw\t\000mo"
- "vl\t%eax, \000movl\t\000movq\t%fs:\000movq\t%gs:\000movq\t%rax, \000mov"
- "absq\t\000movb\t%al, \000movb\t\000movddup\t\000movdqa\t\000movdqu\t\000"
- "movhlps\t\000movhpd\t\000movhps\t\000movlhps\t\000movlpd\t\000movlps\t\000"
- "movmskpd\t\000movmskps\t\000movntdqa\t\000movntdq\t\000movnti\t\000movn"
- "tpd\t\000movntps\t\000movsb\000movsl\000movsd\t\000movshdup\t\000movsld"
- "up\t\000movss\t\000movsw\000movsbw\t\000movswl\t\000movsbl\t\000movswq\t"
- "\000movslq\t\000movsbq\t\000movupd\t\000movups\t\000movzbw\t\000movzbl\t"
- "\000movzwl\t\000movzwq\t\000movzbq\t\000mpsadbw\t\000mulw\t\000mull\t\000"
- "mulq\t\000mulb\t\000mulpd\t\000mulps\t\000mulsd\t\000mulss\t\000fmuls\t"
- "\000fmull\t\000fimuls\t\000fimull\t\000fmulp\t\000fmul\t\000fmul\t%st(0"
- "), \000mwait\000negw\t\000negl\t\000negq\t\000negb\t\000nop\000nopl\t\000"
- "nopw\t\000notw\t\000notl\t\000notq\t\000notb\t\000orw\t\000orl\t\000orq"
- "\t\000orb\t\000outw\t%ax, \000outw\t%ax, %dx\000outl\t%eax, \000outl\t%"
- "eax, %dx\000outb\t%al, \000outb\t%al, %dx\000outsb\000outsl\000outsw\000"
- "pabsb\t\000pabsd\t\000pabsw\t\000packusdw\t\000palignr\t\000pblendvb\t%"
- "xmm0, \000pblendw\t\000pcmpeqq\t\000pcmpestri\t\000#PCMPESTRM128rm PSEU"
- "DO!\000#PCMPESTRM128rr PSEUDO!\000pcmpestrm\t\000pcmpgtq\t\000pcmpistri"
- "\t\000#PCMPISTRM128rm PSEUDO!\000#PCMPISTRM128rr PSEUDO!\000pcmpistrm\t"
- "\000pextrb\t\000pextrd\t\000pextrq\t\000phaddd\t\000phaddsw\t\000phaddw"
- "\t\000phminposuw\t\000phsubd\t\000phsubsw\t\000phsubw\t\000pinsrb\t\000"
- "pinsrd\t\000pinsrq\t\000pmaddubsw\t\000pmaxsb\t\000pmaxsd\t\000pmaxud\t"
- "\000pmaxuw\t\000pminsb\t\000pminsd\t\000pminud\t\000pminuw\t\000pmovsxb"
- "d\t\000pmovsxbq\t\000pmovsxbw\t\000pmovsxdq\t\000pmovsxwd\t\000pmovsxwq"
- "\t\000pmovzxbd\t\000pmovzxbq\t\000pmovzxbw\t\000pmovzxdq\t\000pmovzxwd\t"
- "\000pmovzxwq\t\000pmuldq\t\000pmulhrsw\t\000pmulld\t\000popw\t\000popl\t"
- "\000popq\t\000popcntw\t\000popcntl\t\000popcntq\t\000popfw\000popfl\000"
- "popfq\000popw\t%fs\000popl\t%fs\000popq\t%fs\000popw\t%gs\000popl\t%gs\000"
- "popq\t%gs\000prefetchnta\t\000prefetcht0\t\000prefetcht1\t\000prefetcht"
- "2\t\000pshufb\t\000pshufd\t\000pshufhw\t\000pshuflw\t\000psignb\t\000ps"
- "ignd\t\000psignw\t\000pslldq\t\000psrldq\t\000ptest \t\000punpckhqdq\t\000"
- "punpcklqdq\t\000pushw\t\000pushl\t\000pushq\t\000pushfw\000pushfl\000pu"
- "shfq\000pushw\t%fs\000pushl\t%fs\000pushq\t%fs\000pushw\t%gs\000pushl\t"
- "%gs\000pushq\t%gs\000rclw\t1, \000rclw\t%cl, \000rclw\t\000rcll\t1, \000"
- "rcll\t%cl, \000rcll\t\000rclq\t1, \000rclq\t%cl, \000rclq\t\000rclb\t1,"
- " \000rclb\t%cl, \000rclb\t\000rcpps\t\000rcpss\t\000rcrw\t1, \000rcrw\t"
- "%cl, \000rcrw\t\000rcrl\t1, \000rcrl\t%cl, \000rcrl\t\000rcrq\t1, \000r"
- "crq\t%cl, \000rcrq\t\000rcrb\t1, \000rcrb\t%cl, \000rcrb\t\000rdmsr\000"
- "rdpmc\000rdtsc\000rdtscp\000repne\000rep;movsb\000rep;movsl\000rep;movs"
- "q\000rep;movsw\000rep\000rep;stosb\000rep;stosl\000rep;stosq\000rep;sto"
- "sw\000ret\000ret\t\000rolw\t\000rolw\t%cl, \000roll\t\000roll\t%cl, \000"
- "rolq\t\000rolq\t%cl, \000rolb\t\000rolb\t%cl, \000rorw\t\000rorw\t%cl, "
- "\000rorl\t\000rorl\t%cl, \000rorq\t\000rorq\t%cl, \000rorb\t\000rorb\t%"
- "cl, \000roundpd\t\000roundps\t\000roundsd\t\000roundss\t\000rsm\000rsqr"
- "tps\t\000rsqrtss\t\000sahf\000sarw\t\000sarw\t%cl, \000sarl\t\000sarl\t"
- "%cl, \000sarq\t\000sarq\t%cl, \000sarb\t\000sarb\t%cl, \000sbbw\t\000sb"
- "bl\t\000sbbq\t\000sbbb\t\000scasw\000scasl\000scasq\000scasb\000setae\t"
- "\000seta\t\000setbe\t\000setb\t\000sete\t\000setge\t\000setg\t\000setle"
- "\t\000setl\t\000setne\t\000setno\t\000setnp\t\000setns\t\000seto\t\000s"
- "etp\t\000sets\t\000sfence\000sgdt\t\000shlw\t\000shlw\t%cl, \000shll\t\000"
- "shll\t%cl, \000shlq\t\000shlq\t%cl, \000shlb\t\000shlb\t%cl, \000shldw\t"
- "%cl, \000shldw\t\000shldl\t%cl, \000shldl\t\000shldq\t%cl, \000shldq\t\000"
- "shrw\t\000shrw\t%cl, \000shrl\t\000shrl\t%cl, \000shrq\t\000shrq\t%cl, "
- "\000shrb\t\000shrb\t%cl, \000shrdw\t%cl, \000shrdw\t\000shrdl\t%cl, \000"
- "shrdl\t\000shrdq\t%cl, \000shrdq\t\000shufpd\t\000shufps\t\000sidt\t\000"
- "fsin\000sldtw\t\000sldtq\t\000smsww\t\000smswl\t\000smswq\t\000sqrtpd\t"
- "\000sqrtps\t\000sqrtsd\t\000sqrtss\t\000fsqrt\000ss\000stc\000std\000st"
- "i\000stmxcsr\t\000stosb\000stosl\000stosw\000strw\t\000fsts\t\000fstl\t"
- "\000fstps\t\000fstpl\t\000fstpt\t\000fstp\t\000fst\t\000subw\t\000subl\t"
- "\000subq\t\000subb\t\000subpd\t\000subps\t\000fsubrs\t\000fsubrl\t\000f"
- "isubrs\t\000fisubrl\t\000fsubp\t\000fsubr\t\000fsub\t%st(0), \000subsd\t"
- "\000subss\t\000fsubs\t\000fsubl\t\000fisubs\t\000fisubl\t\000fsubrp\t\000"
- "fsub\t\000fsubr\t%st(0), \000swapgs\000syscall\000sysenter\000sysexit\000"
- "sysret\000jmp\t*\000#TC_RETURN \000testw\t\000testl\t\000testq\t\000tes"
- "tb\t\000.byte\t0x66; leaq\t\000ud2\000ftst\000fucomip\t\000fucomi\t\000"
- "fucompp\000fucomp\t\000fucom\t\000unpckhpd\t\000unpckhps\t\000unpcklpd\t"
- "\000unpcklps\t\000#VASTART_SAVE_XMM_REGS \000verr\t\000verw\t\000vmcall"
- "\000vmclear\t\000vmlaunch\000vmptrld\t\000vmptrst\t\000vmreadl\t\000vmr"
- "eadq\t\000vmresume\000vmwritel\t\000vmwriteq\t\000vmxoff\000vmxon\t\000"
- "wait\000wbinvd\000wrmsr\000xaddw\t\000xaddl\t\000xaddq\t\000xaddb\t\000"
- "xchgw\t\000xchgl\t\000xchgq\t\000xchgb\t\000fxch\t\000xlatb\000xorw\t\000"
- "xorl\t\000xorq\t\000xorb\t\000";
-
- O << "\t";
-
- // Emit the opcode for the instruction.
- unsigned Bits = OpInfo[MI->getOpcode()];
- assert(Bits != 0 && "Cannot print this instruction.");
- O << AsmStrs+(Bits & 16383)-1;
-
-
- // Fragment 0 encoded into 6 bits for 42 unique commands.
- switch ((Bits >> 26) & 63) {
- default: // unreachable.
- case 0:
- // DBG_VALUE, ABS_F, ADJCALLSTACKDOWN32, ADJCALLSTACKDOWN64, ADJCALLSTACK...
- return;
- break;
- case 1:
- // ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i32, ADD64i32, AD...
- printOperand(MI, 0);
- break;
- case 2:
- // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC...
- printOperand(MI, 5);
- break;
- case 3:
- // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A...
- printOperand(MI, 2);
- O << ", ";
- break;
- case 4:
- // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r...
- printi16mem(MI, 2);
- O << ", ";
- break;
- case 5:
- // ADC32rm, ADD32rm, AND32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm, CMOVBE32r...
- printi32mem(MI, 2);
- O << ", ";
- break;
- case 6:
- // ADC64rm, ADD64rm, AND64rm, CMOVA64rm, CMOVAE64rm, CMOVB64rm, CMOVBE64r...
- printi64mem(MI, 2);
- O << ", ";
- break;
- case 7:
- // ADC8rm, ADD8rm, AND8rm, CRC32m8, OR8rm, SBB8rm, SUB8rm, XOR8rm
- printi8mem(MI, 2);
- O << ", ";
- break;
- case 8:
- // ADDPDrm, ADDPSrm, ADDSUBPDrm, ADDSUBPSrm, ANDNPDrm, ANDNPSrm, ANDPDrm,...
- printf128mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 9:
- // ADDSDrm, ADDSDrm_Int, DIVSDrm, DIVSDrm_Int, Int_CVTSD2SSrm, MAXSDrm, M...
- printf64mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 10:
- // ADDSSrm, ADDSSrm_Int, DIVSSrm, DIVSSrm_Int, Int_CVTSS2SDrm, MAXSSrm, M...
- printf32mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 11:
- // ADD_F32m, DIVR_F32m, DIV_F32m, FBLDm, FBSTPm, FCOM32m, FCOMP32m, FLDEN...
- printf32mem(MI, 0);
- return;
- break;
- case 12:
- // ADD_F64m, DIVR_F64m, DIV_F64m, FCOM64m, FCOMP64m, LD_F64m, MUL_F64m, S...
- printf64mem(MI, 0);
- return;
- break;
- case 13:
- // ADD_FI16m, DEC16m, DEC64_16m, DIV16m, DIVR_FI16m, DIV_FI16m, FICOM16m,...
- printi16mem(MI, 0);
- return;
- break;
- case 14:
- // ADD_FI32m, CALL32m, DEC32m, DEC64_32m, DIV32m, DIVR_FI32m, DIV_FI32m, ...
- printi32mem(MI, 0);
- break;
- case 15:
- // BLENDPDrmi, BLENDPSrmi, DPPDrmi, DPPSrmi, INSERTPSrm, MMX_PINSRWrmi, M...
- printOperand(MI, 7);
- O << ", ";
- break;
- case 16:
- // BLENDPDrri, BLENDPSrri, DPPDrri, DPPSrri, INSERTPSrr, MMX_PINSRWrri, M...
- printOperand(MI, 3);
- O << ", ";
- printOperand(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 17:
- // BLENDVPDrm0, BLENDVPSrm0, PACKSSDWrm, PACKSSWBrm, PACKUSDWrm, PACKUSWB...
- printi128mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 18:
- // BSF16rm, BSR16rm, CMP16rm, LAR16rm, LAR32rm, LAR64rm, LSL16rm, MOV16rm...
- printi16mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 19:
- // BSF16rr, BSF32rr, BSF64rr, BSR16rr, BSR32rr, BSR64rr, BT16ri8, BT16rr,...
- printOperand(MI, 1);
- O << ", ";
- break;
- case 20:
- // BSF32rm, BSR32rm, CMP32rm, CVTSI2SDrm, CVTSI2SSrm, FS_MOV32rm, GS_MOV3...
- printi32mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 21:
- // BSF64rm, BSR64rm, CMP64rm, CVTSI2SD64rm, CVTSI2SS64rm, Int_CVTDQ2PDrm,...
- printi64mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 22:
- // CALL64m, CMPXCHG8B, DEC64m, DIV64m, IDIV64m, ILD_F64m, IMUL64m, INC64m...
- printi64mem(MI, 0);
- return;
- break;
- case 23:
- // CALL64pcrel32, CALLpcrel32, JAE_1, JAE_4, JA_1, JA_4, JBE_1, JBE_4, JB...
- print_pcrel_imm(MI, 0);
- break;
- case 24:
- // CLFLUSH, DEC8m, DIV8m, IDIV8m, IMUL8m, INC8m, INVLPG, LOCK_DEC8m, LOCK...
- printi8mem(MI, 0);
- return;
- break;
- case 25:
- // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8W, MOVSX32rm8, MOVSX64rm8, MOV...
- printi8mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- break;
- case 26:
- // CMPPDrmi, CMPPSrmi, CMPSDrm, CMPSSrm, Int_CMPSDrm, Int_CMPSSrm
- printSSECC(MI, 7);
- break;
- case 27:
- // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr
- printSSECC(MI, 3);
- break;
- case 28:
- // CMPXCHG16B
- printi128mem(MI, 0);
- return;
- break;
- case 29:
- // COMISDrm, COMISSrm, CVTDQ2PDrm, CVTDQ2PSrm, CVTPD2DQrm, CVTPD2PSrm, CV...
- printf128mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 30:
- // CVTPS2PDrm, CVTSD2SI64rm, CVTSD2SSrm, CVTTSD2SI64rm, CVTTSD2SIrm, Int_...
- printf64mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 31:
- // CVTSS2SDrm, CVTSS2SI64rm, CVTSS2SIrm, CVTTSS2SI64rm, CVTTSS2SIrm, Int_...
- printf32mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 32:
- // EXTRACTPSmr, IMUL16rmi, IMUL16rmi8, IMUL32rmi, IMUL32rmi8, IMUL64rmi32...
- printOperand(MI, 6);
- O << ", ";
- break;
- case 33:
- // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, FXR...
- printopaquemem(MI, 0);
- return;
- break;
- case 34:
- // Int_CVTDQ2PSrm, LDDQUrm, MOVDQArm, MOVDQUrm, MOVDQUrm_Int, MOVNTDQArm,...
- printi128mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 35:
- // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm...
- printopaquemem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 36:
- // LD_F80m, ST_FP80m
- printf80mem(MI, 0);
- return;
- break;
- case 37:
- // LEA16r, LEA32r
- printlea32mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 38:
- // LEA64_32r
- printlea64_32mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 39:
- // LEA64r
- printlea64mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 40:
- // TLS_addr32
- printlea32mem(MI, 0);
- O << ", %eax; call\t___tls_get_addr at PLT";
- return;
- break;
- case 41:
- // TLS_addr64
- printlea64mem(MI, 0);
- O << "(%rip), %rdi; .word\t0x6666; rex64; call\t__tls_get_addr at PLT";
- return;
- break;
- }
-
-
- // Fragment 1 encoded into 5 bits for 32 unique commands.
- switch ((Bits >> 21) & 31) {
- default: // unreachable.
- case 0:
- // ADC16i16, ADD16i16, AND16i16, CMP16i16, IN16ri, MOV16o16a, OR16i16, SB...
- O << ", %ax";
- return;
- break;
- case 1:
- // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC...
- O << ", ";
- break;
- case 2:
- // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, A...
- printOperand(MI, 0);
- break;
- case 3:
- // ADC32i32, ADD32i32, AND32i32, CMP32i32, IN32ri, MOV32o32a, OR32i32, SB...
- O << ", %eax";
- return;
- break;
- case 4:
- // ADC64i32, ADD64i32, AND64i32, CMP64i32, MOV64o64a, MOV64o8a, OR64i32, ...
- O << ", %rax";
- return;
- break;
- case 5:
- // ADC8i8, ADD8i8, AND8i8, CMP8i8, IN8ri, MOV8o8a, OR8i8, SBB8i8, SUB8i8,...
- O << ", %al";
- return;
- break;
- case 6:
- // ADD_FI32m, ADD_FPrST0, ADD_FST0r, ADD_FrST0, BSWAP32r, BSWAP64r, CALL3...
- return;
- break;
- case 7:
- // BLENDPDrmi, BLENDPSrmi, DPPDrmi, DPPSrmi, MPSADBWrmi, PALIGNR128rm, PB...
- printi128mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 8:
- // CMOVBE_F, CMOVB_F, CMOVE_F, CMOVNBE_F, CMOVNB_F, CMOVNE_F, CMOVNP_F, C...
- O << ", %st(0)";
- return;
- break;
- case 9:
- // CMPPDrmi, CMPPDrri
- O << "pd\t";
- break;
- case 10:
- // CMPPSrmi, CMPPSrri
- O << "ps\t";
- break;
- case 11:
- // CMPSDrm, CMPSDrr, Int_CMPSDrm, Int_CMPSDrr
- O << "sd\t";
- break;
- case 12:
- // CMPSSrm, CMPSSrr, Int_CMPSSrm, Int_CMPSSrr
- O << "ss\t";
- break;
- case 13:
- // CRC32m16, CRC32m32, CRC32m8, CRC32r16, CRC32r32, CRC32r8, CRC64m64, CR...
- printOperand(MI, 1);
- break;
- case 14:
- // EXTRACTPSmr, PEXTRBmr, PEXTRDmr, PEXTRQmr, PEXTRWmr, SHLD16mri8, SHLD3...
- printOperand(MI, 5);
- O << ", ";
- break;
- case 15:
- // IMUL16rmi, IMUL16rmi8
- printi16mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 16:
- // IMUL32rmi, IMUL32rmi8
- printi32mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 17:
- // IMUL64rmi32, IMUL64rmi8, MMX_PSHUFWmi
- printi64mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 18:
- // INSERTPSrm, ROUNDSSm_Int
- printf32mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 19:
- // LCMPXCHG64
- O << ',';
- printi64mem(MI, 0);
- return;
- break;
- case 20:
- // LXADD16, MMX_PINSRWrmi, PINSRWrmi, XCHG16rm
- printi16mem(MI, 2);
- break;
- case 21:
- // LXADD32, PINSRDrm, XCHG32rm
- printi32mem(MI, 2);
- break;
- case 22:
- // LXADD64, PALIGNR64rm, PINSRQrm, XCHG64rm
- printi64mem(MI, 2);
- break;
- case 23:
- // LXADD8, PINSRBrm, XCHG8rm
- printi8mem(MI, 2);
- break;
- case 24:
- // MOV8rm_NOREX, MOVZX32_NOREXrm8
- O << " # NOREX";
- return;
- break;
- case 25:
- // PCMPESTRIArm, PCMPESTRICrm, PCMPESTRIOrm, PCMPESTRISrm, PCMPESTRIZrm, ...
- printi128mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 26:
- // ROUNDPDm_Int, ROUNDPSm_Int
- printf128mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 27:
- // ROUNDSDm_Int
- printf64mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 28:
- // SHUFPDrmi, SHUFPSrmi
- printf128mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 29:
- // TAILJMPd, TAILJMPm, TAILJMPr, TAILJMPr64
- O << " # TAILCALL";
- return;
- break;
- case 30:
- // TCRETURNdi, TCRETURNdi64, TCRETURNri, TCRETURNri64
- O << ' ';
- printOperand(MI, 1);
- return;
- break;
- case 31:
- // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr
- printOperand(MI, 2);
- return;
- break;
- }
-
-
- // Fragment 2 encoded into 4 bits for 16 unique commands.
- switch ((Bits >> 17) & 15) {
- default: // unreachable.
- case 0:
- // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, AND16mi, AND16...
- printi16mem(MI, 0);
- return;
- break;
- case 1:
- // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, A...
- return;
- break;
- case 2:
- // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, AND32mi, AND32...
- printi32mem(MI, 0);
- return;
- break;
- case 3:
- // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,...
- printi64mem(MI, 0);
- return;
- break;
- case 4:
- // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CMP8mi, CMP8mr, CMPXCH...
- printi8mem(MI, 0);
- break;
- case 5:
- // CMPPDrmi, CMPPSrmi
- printf128mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 6:
- // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr
- printOperand(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 7:
- // CMPSDrm, Int_CMPSDrm
- printf64mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 8:
- // CMPSSrm, Int_CMPSSrm
- printf32mem(MI, 2);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 9:
- // ENTER, FARCALL16i, FARCALL32i, FARJMP16i, FARJMP32i, VASTART_SAVE_XMM_...
- printOperand(MI, 1);
- break;
- case 10:
- // EXTRACTPSmr, MOVSSmr
- printf32mem(MI, 0);
- return;
- break;
- case 11:
- // EXTRACTPSrr, IMUL16rri, IMUL16rri8, IMUL32rri, IMUL32rri8, IMUL64rri32...
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 12:
- // MOV8rr_NOREX, MOVZX32_NOREXrr8
- O << " # NOREX";
- return;
- break;
- case 13:
- // MOVAPDmr, MOVAPSmr, MOVNTDQ_64mr, MOVNTDQmr, MOVNTDQmr_Int, MOVNTPDmr,...
- printf128mem(MI, 0);
- return;
- break;
- case 14:
- // MOVDQAmr, MOVDQUmr, MOVDQUmr_Int, MOVNTPDmr_Int, MOVNTPSmr_Int
- printi128mem(MI, 0);
- return;
- break;
- case 15:
- // MOVHPDmr, MOVHPSmr, MOVLPDmr, MOVLPSmr, MOVSDmr
- printf64mem(MI, 0);
- return;
- break;
- }
-
-
- // Fragment 3 encoded into 2 bits for 3 unique commands.
- switch ((Bits >> 15) & 3) {
- default: // unreachable.
- case 0:
- // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CMP8mi, CMP8mr, CMPXCH...
- return;
- break;
- case 1:
- // MOV8mr_NOREX
- O << " # NOREX";
- return;
- break;
- case 2:
- // VASTART_SAVE_XMM_REGS
- O << ", ";
- printOperand(MI, 2);
- return;
- break;
- }
-
-}
-
-
-/// getRegisterName - This method is automatically generated by tblgen
-/// from the register set description. This returns the assembler name
-/// for the specified register.
-const char *X86ATTInstPrinter::getRegisterName(unsigned RegNo) {
- assert(RegNo && RegNo < 159 && "Invalid register number!");
-
- static const unsigned RegAsmOffset[] = {
- 0, 3, 6, 9, 12, 15, 18, 22, 25, 28, 31, 34, 37, 40,
- 43, 47, 50, 54, 58, 62, 66, 70, 74, 78, 82, 85, 88, 92,
- 96, 100, 105, 110, 115, 120, 125, 130, 135, 140, 144, 148, 152, 158,
- 162, 165, 169, 173, 177, 181, 185, 189, 193, 197, 201, 204, 207, 210,
- 214, 218, 222, 226, 230, 234, 238, 242, 246, 251, 256, 261, 265, 270,
- 275, 280, 284, 289, 294, 299, 303, 308, 313, 318, 322, 327, 332, 337,
- 341, 346, 351, 356, 359, 363, 367, 371, 374, 378, 382, 386, 390, 394,
- 398, 403, 408, 413, 418, 423, 428, 433, 438, 443, 447, 451, 455, 459,
- 463, 467, 470, 474, 477, 481, 484, 490, 496, 502, 508, 514, 520, 526,
- 532, 537, 542, 548, 554, 560, 566, 572, 578, 583, 588, 593, 598, 603,
- 608, 613, 618, 623, 628, 634, 640, 646, 652, 658, 664, 669, 674, 679,
- 684, 689, 694, 699, 0
- };
-
- const char *AsmStrs =
- "ah\000al\000ax\000bh\000bl\000bp\000bpl\000bx\000ch\000cl\000cs\000cx\000"
- "dh\000di\000dil\000dl\000dr0\000dr1\000dr2\000dr3\000dr4\000dr5\000dr6\000"
- "dr7\000ds\000dx\000eax\000ebp\000ebx\000ecr0\000ecr1\000ecr2\000ecr3\000"
- "ecr4\000ecr5\000ecr6\000ecr7\000ecx\000edi\000edx\000flags\000eip\000es"
- "\000esi\000esp\000fp0\000fp1\000fp2\000fp3\000fp4\000fp5\000fp6\000fs\000"
- "gs\000ip\000mm0\000mm1\000mm2\000mm3\000mm4\000mm5\000mm6\000mm7\000r10"
- "\000r10b\000r10d\000r10w\000r11\000r11b\000r11d\000r11w\000r12\000r12b\000"
- "r12d\000r12w\000r13\000r13b\000r13d\000r13w\000r14\000r14b\000r14d\000r"
- "14w\000r15\000r15b\000r15d\000r15w\000r8\000r8b\000r8d\000r8w\000r9\000"
- "r9b\000r9d\000r9w\000rax\000rbp\000rbx\000rcr0\000rcr1\000rcr2\000rcr3\000"
- "rcr4\000rcr5\000rcr6\000rcr7\000rcr8\000rcx\000rdi\000rdx\000rip\000rsi"
- "\000rsp\000si\000sil\000sp\000spl\000ss\000st(0)\000st(1)\000st(2)\000s"
- "t(3)\000st(4)\000st(5)\000st(6)\000st(7)\000xmm0\000xmm1\000xmm10\000xm"
- "m11\000xmm12\000xmm13\000xmm14\000xmm15\000xmm2\000xmm3\000xmm4\000xmm5"
- "\000xmm6\000xmm7\000xmm8\000xmm9\000ymm0\000ymm1\000ymm10\000ymm11\000y"
- "mm12\000ymm13\000ymm14\000ymm15\000ymm2\000ymm3\000ymm4\000ymm5\000ymm6"
- "\000ymm7\000ymm8\000ymm9\000";
- return AsmStrs+RegAsmOffset[RegNo-1];
-}
-
-
-#ifdef GET_INSTRUCTION_NAME
-#undef GET_INSTRUCTION_NAME
-
-/// getInstructionName: This method is automatically generated by tblgen
-/// from the instruction set description. This returns the enum name of the
-/// specified instruction.
-const char *X86ATTInstPrinter::getInstructionName(unsigned Opcode) {
- assert(Opcode < 2525 && "Invalid instruction number!");
-
- static const unsigned InstAsmOffset[] = {
- 0, 4, 14, 24, 33, 42, 47, 62, 76, 89, 103, 120, 130, 136,
- 145, 154, 163, 172, 180, 189, 197, 205, 214, 222, 230, 242, 251, 259,
- 268, 276, 284, 293, 301, 309, 321, 330, 340, 349, 357, 367, 376, 384,
- 392, 404, 411, 418, 425, 432, 439, 446, 457, 466, 474, 483, 491, 502,
- 510, 519, 527, 535, 544, 552, 561, 569, 580, 588, 597, 605, 613, 622,
- 632, 641, 649, 660, 670, 679, 687, 695, 702, 709, 716, 726, 733, 740,
- 747, 755, 763, 771, 779, 787, 799, 807, 819, 827, 839, 847, 859, 870,
- 881, 892, 903, 912, 921, 931, 941, 952, 962, 971, 981, 990, 1000, 1012,
- 1021, 1033, 1045, 1058, 1071, 1084, 1097, 1110, 1123, 1133, 1152, 1171, 1188, 1205,
- 1214, 1222, 1231, 1239, 1247, 1256, 1264, 1272, 1284, 1293, 1301, 1310, 1318, 1326,
- 1335, 1343, 1351, 1363, 1372, 1382, 1391, 1399, 1409, 1418, 1426, 1434, 1446, 1453,
- 1460, 1467, 1474, 1481, 1488, 1499, 1508, 1517, 1526, 1535, 1543, 1551, 1559, 1567,
- 1579, 1589, 1599, 1609, 1621, 1630, 1640, 1650, 1660, 1670, 1680, 1690, 1701, 1712,
- 1723, 1736, 1746, 1755, 1764, 1773, 1784, 1792, 1804, 1817, 1828, 1839, 1850, 1861,
- 1872, 1883, 1893, 1903, 1913, 1925, 1934, 1945, 1956, 1967, 1978, 1990, 2002, 2014,
- 2026, 2034, 2042, 2050, 2058, 2066, 2074, 2082, 2090, 2098, 2106, 2114, 2122, 2131,
- 2140, 2148, 2155, 2163, 2170, 2178, 2185, 2193, 2200, 2208, 2215, 2223, 2230, 2239,
- 2247, 2256, 2264, 2273, 2281, 2290, 2298, 2307, 2315, 2324, 2332, 2341, 2349, 2358,
- 2366, 2375, 2383, 2392, 2400, 2409, 2417, 2426, 2434, 2443, 2451, 2460, 2468, 2477,
- 2485, 2494, 2502, 2511, 2519, 2528, 2536, 2544, 2552, 2560, 2574, 2582, 2594, 2598,
- 2602, 2607, 2613, 2622, 2631, 2640, 2644, 2648, 2656, 2660, 2665, 2669, 2679, 2689,
- 2699, 2709, 2719, 2729, 2740, 2751, 2762, 2773, 2784, 2795, 2805, 2815, 2825, 2835,
- 2845, 2855, 2866, 2877, 2888, 2899, 2910, 2921, 2930, 2942, 2954, 2966, 2974, 2985,
- 2996, 3007, 3017, 3027, 3037, 3047, 3057, 3067, 3075, 3086, 3097, 3108, 3118, 3128,
- 3138, 3148, 3158, 3168, 3179, 3190, 3201, 3212, 3223, 3234, 3244, 3254, 3264, 3274,
- 3284, 3294, 3305, 3316, 3327, 3338, 3349, 3360, 3370, 3383, 3396, 3409, 3418, 3430,
- 3442, 3454, 3465, 3476, 3487, 3498, 3509, 3520, 3529, 3541, 3553, 3565, 3576, 3587,
- 3598, 3609, 3620, 3631, 3642, 3653, 3664, 3675, 3686, 3697, 3706, 3718, 3730, 3742,
- 3753, 3764, 3775, 3786, 3797, 3808, 3818, 3828, 3838, 3848, 3858, 3868, 3878, 3888,
- 3898, 3908, 3918, 3928, 3936, 3947, 3958, 3969, 3979, 3989, 3999, 4009, 4019, 4029,
- 4039, 4049, 4058, 4069, 4080, 4091, 4102, 4111, 4119, 4128, 4136, 4147, 4155, 4164,
- 4172, 4180, 4189, 4197, 4206, 4214, 4225, 4233, 4242, 4250, 4258, 4267, 4277, 4286,
- 4294, 4305, 4315, 4324, 4332, 4340, 4347, 4354, 4361, 4371, 4378, 4385, 4392, 4401,
- 4410, 4419, 4428, 4435, 4442, 4449, 4455, 4463, 4471, 4479, 4487, 4498, 4510, 4522,
- 4534, 4546, 4558, 4570, 4580, 4591, 4602, 4611, 4620, 4629, 4638, 4649, 4658, 4666,
- 4676, 4682, 4691, 4700, 4709, 4715, 4719, 4728, 4737, 4745, 4754, 4763, 4771, 4780,
- 4789, 4799, 4810, 4821, 4832, 4843, 4854, 4865, 4876, 4887, 4898, 4909, 4920, 4931,
- 4944, 4957, 4968, 4979, 4992, 5005, 5016, 5027, 5040, 5053, 5064, 5075, 5086, 5097,
- 5110, 5123, 5134, 5145, 5157, 5169, 5183, 5197, 5209, 5221, 5235, 5249, 5261, 5273,
- 5277, 5282, 5289, 5296, 5303, 5310, 5320, 5330, 5340, 5350, 5357, 5364, 5370, 5376,
- 5383, 5390, 5397, 5404, 5411, 5418, 5424, 5430, 5438, 5446, 5454, 5462, 5472, 5482,
- 5493, 5504, 5516, 5527, 5538, 5549, 5562, 5575, 5588, 5602, 5616, 5630, 5644, 5658,
- 5672, 5683, 5691, 5703, 5711, 5723, 5731, 5743, 5751, 5763, 5772, 5781, 5791, 5801,
- 5812, 5822, 5831, 5841, 5850, 5860, 5872, 5881, 5893, 5905, 5918, 5931, 5944, 5957,
- 5970, 5983, 5993, 6001, 6009, 6017, 6025, 6035, 6045, 6057, 6063, 6073, 6085, 6097,
- 6103, 6114, 6125, 6136, 6147, 6157, 6167, 6177, 6187, 6197, 6206, 6212, 6219, 6227,
- 6235, 6244, 6253, 6260, 6268, 6274, 6283, 6292, 6302, 6312, 6320, 6329, 6337, 6344,
- 6351, 6358, 6365, 6371, 6378, 6385, 6390, 6400, 6409, 6417, 6438, 6459, 6480, 6501,
- 6522, 6543, 6564, 6585, 6606, 6613, 6619, 6626, 6632, 6644, 6652, 6660, 6667, 6674,
- 6682, 6690, 6701, 6711, 6716, 6724, 6731, 6739, 6745, 6753, 6766, 6779, 6792, 6805,
- 6818, 6831, 6844, 6857, 6870, 6883, 6896, 6909, 6920, 6931, 6942, 6953, 6963, 6973,
- 6983, 6993, 7002, 7011, 7022, 7033, 7044, 7055, 7064, 7073, 7082, 7091, 7101, 7111,
- 7121, 7131, 7142, 7152, 7161, 7170, 7179, 7188, 7192, 7201, 7210, 7219, 7228, 7236,
- 7244, 7252, 7260, 7268, 7276, 7283, 7290, 7299, 7308, 7317, 7329, 7341, 7353, 7365,
- 7377, 7389, 7401, 7413, 7425, 7433, 7441, 7450, 7460, 7471, 7480, 7490, 7501, 7509,
- 7517, 7526, 7536, 7547, 7556, 7566, 7577, 7585, 7593, 7602, 7614, 7625, 7634, 7646,
- 7657, 7664, 7671, 7676, 7683, 7690, 7695, 7702, 7709, 7713, 7719, 7725, 7732, 7739,
- 7746, 7753, 7763, 7773, 7783, 7793, 7800, 7807, 7813, 7819, 7830, 7841, 7845, 7850,
- 7855, 7862, 7869, 7877, 7884, 7891, 7898, 7909, 7920, 7931, 7944, 7957, 7970, 7983,
- 7996, 8009, 8022, 8035, 8048, 8057, 8066, 8076, 8086, 8096, 8108, 8120, 8132, 8144,
- 8156, 8168, 8180, 8192, 8204, 8216, 8228, 8240, 8252, 8265, 8278, 8291, 8304, 8319,
- 8334, 8349, 8364, 8379, 8394, 8409, 8424, 8439, 8454, 8469, 8484, 8499, 8514, 8529,
- 8544, 8559, 8574, 8589, 8604, 8621, 8638, 8653, 8668, 8683, 8698, 8715, 8732, 8747,
- 8762, 8779, 8796, 8811, 8826, 8841, 8856, 8873, 8890, 8905, 8920, 8936, 8952, 8968,
- 8984, 9000, 9016, 9032, 9048, 9066, 9084, 9100, 9116, 9134, 9152, 9168, 9184, 9198,
- 9212, 9226, 9240, 9246, 9252, 9257, 9262, 9268, 9274, 9279, 9284, 9290, 9295, 9300,
- 9306, 9312, 9317, 9322, 9328, 9334, 9339, 9344, 9351, 9358, 9365, 9378, 9385, 9391,
- 9397, 9403, 9409, 9415, 9421, 9427, 9433, 9439, 9445, 9450, 9455, 9460, 9465, 9470,
- 9475, 9480, 9488, 9496, 9504, 9512, 9520, 9528, 9539, 9550, 9561, 9571, 9582, 9590,
- 9598, 9606, 9614, 9620, 9626, 9634, 9642, 9650, 9659, 9668, 9677, 9686, 9695, 9704,
- 9713, 9724, 9735, 9744, 9755, 9764, 9771, 9778, 9785, 9795, 9802, 9808, 9816, 9824,
- 9832, 9839, 9847, 9855, 9863, 9869, 9877, 9885, 9893, 9899, 9907, 9915, 9923, 9931,
- 9944, 9958, 9971, 9984, 9998, 10011, 10026, 10040, 10053, 10065, 10077, 10089, 10101, 10113,
- 10124, 10136, 10148, 10160, 10171, 10183, 10196, 10210, 10223, 10236, 10250, 10263, 10278, 10292,
- 10305, 10317, 10329, 10335, 10341, 10347, 10353, 10358, 10364, 10371, 10376, 10382, 10390, 10398,
- 10406, 10414, 10422, 10430, 10438, 10446, 10454, 10459, 10464, 10472, 10480, 10488, 10495, 10506,
- 10519, 10527, 10539, 10547, 10559, 10567, 10579, 10587, 10599, 10607, 10619, 10627, 10639, 10647,
- 10659, 10667, 10679, 10686, 10699, 10707, 10719, 10727, 10739, 10747, 10759, 10767, 10779, 10787,
- 10799, 10807, 10819, 10827, 10839, 10847, 10859, 10874, 10889, 10904, 10919, 10934, 10949, 10964,
- 10979, 10995, 11011, 11027, 11043, 11052, 11062, 11075, 11090, 11109, 11123, 11136, 11149, 11162,
- 11179, 11196, 11210, 11223, 11237, 11253, 11267, 11280, 11293, 11306, 11323, 11340, 11355, 11370,
- 11385, 11400, 11415, 11430, 11442, 11454, 11466, 11478, 11490, 11502, 11515, 11528, 11541, 11554,
- 11568, 11582, 11596, 11610, 11622, 11634, 11646, 11658, 11669, 11680, 11692, 11704, 11716, 11728,
- 11742, 11756, 11770, 11784, 11798, 11812, 11826, 11840, 11854, 11868, 11882, 11896, 11909, 11923,
- 11937, 11951, 11965, 11978, 11991, 12004, 12017, 12030, 12043, 12056, 12069, 12084, 12098, 12112,
- 12125, 12138, 12151, 12164, 12178, 12192, 12202, 12212, 12225, 12238, 12251, 12264, 12276, 12288,
- 12300, 12312, 12324, 12336, 12348, 12360, 12372, 12384, 12396, 12408, 12420, 12432, 12444, 12456,
- 12468, 12480, 12492, 12504, 12516, 12528, 12540, 12552, 12564, 12576, 12588, 12600, 12612, 12624,
- 12637, 12650, 12663, 12676, 12690, 12704, 12718, 12732, 12744, 12756, 12772, 12788, 12804, 12820,
- 12836, 12852, 12868, 12884, 12900, 12916, 12932, 12948, 12959, 12970, 12981, 12998, 13006, 13016,
- 13024, 13032, 13040, 13050, 13058, 13066, 13074, 13082, 13094, 13102, 13110, 13118, 13128, 13136,
- 13144, 13152, 13160, 13170, 13178, 13186, 13194, 13202, 13210, 13218, 13230, 13240, 13250, 13260,
- 13269, 13277, 13285, 13295, 13303, 13311, 13321, 13330, 13338, 13346, 13354, 13362, 13372, 13385,
- 13393, 13401, 13413, 13421, 13429, 13437, 13450, 13462, 13474, 13482, 13489, 13496, 13509, 13517,
- 13524, 13531, 13538, 13551, 13558, 13571, 13582, 13591, 13600, 13609, 13618, 13627, 13636, 13646,
- 13656, 13668, 13680, 13691, 13702, 13711, 13720, 13729, 13738, 13751, 13760, 13773, 13783, 13792,
- 13801, 13810, 13819, 13829, 13838, 13847, 13856, 13865, 13876, 13887, 13898, 13909, 13922, 13932,
- 13946, 13958, 13967, 13980, 13990, 14004, 14014, 14028, 14037, 14049, 14061, 14073, 14086, 14098,
- 14107, 14113, 14119, 14127, 14135, 14143, 14155, 14167, 14178, 14189, 14200, 14211, 14222, 14233,
- 14241, 14249, 14257, 14263, 14274, 14286, 14297, 14309, 14321, 14332, 14344, 14355, 14367, 14379,
- 14390, 14402, 14414, 14425, 14434, 14447, 14456, 14469, 14478, 14487, 14500, 14509, 14522, 14531,
- 14544, 14557, 14573, 14589, 14602, 14615, 14626, 14638, 14649, 14661, 14678, 14695, 14707, 14718,
- 14730, 14741, 14753, 14767, 14779, 14790, 14803, 14815, 14829, 14841, 14852, 14865, 14876, 14887,
- 14898, 14909, 14920, 14931, 14942, 14953, 14964, 14975, 14986, 14993, 15000, 15007, 15014, 15021,
- 15028, 15034, 15040, 15048, 15056, 15064, 15072, 15080, 15092, 15100, 15112, 15120, 15132, 15140,
- 15152, 15161, 15170, 15180, 15190, 15201, 15211, 15220, 15230, 15239, 15249, 15261, 15270, 15282,
- 15294, 15307, 15320, 15333, 15346, 15359, 15372, 15382, 15388, 15395, 15402, 15409, 15416, 15423,
- 15430, 15436, 15442, 15447, 15453, 15459, 15466, 15473, 15480, 15487, 15494, 15501, 15507, 15513,
- 15521, 15528, 15536, 15543, 15550, 15558, 15565, 15572, 15583, 15591, 15598, 15606, 15613, 15620,
- 15628, 15635, 15642, 15653, 15661, 15670, 15678, 15685, 15694, 15702, 15709, 15716, 15727, 15733,
- 15739, 15745, 15751, 15757, 15763, 15773, 15780, 15787, 15794, 15801, 15809, 15817, 15825, 15833,
- 15840, 15847, 15853, 15859, 15865, 15876, 15886, 15897, 15907, 15918, 15928, 15939, 15949, 15960,
- 15970, 15981, 15991, 16002, 16013, 16024, 16035, 16046, 16057, 16068, 16079, 16087, 16095, 16103,
- 16111, 16119, 16127, 16136, 16145, 16154, 16163, 16173, 16183, 16193, 16203, 16211, 16219, 16232,
- 16245, 16257, 16269, 16277, 16285, 16292, 16299, 16307, 16315, 16323, 16331, 16343, 16355, 16366,
- 16377, 16387, 16397, 16407, 16417, 16427, 16437, 16447, 16457, 16470, 16483, 16496, 16509, 16522,
- 16535, 16548, 16561, 16574, 16587, 16599, 16611, 16627, 16643, 16658, 16673, 16683, 16693, 16703,
- 16713, 16723, 16733, 16743, 16753, 16766, 16779, 16792, 16805, 16818, 16831, 16844, 16857, 16870,
- 16883, 16895, 16907, 16923, 16939, 16954, 16969, 16978, 16987, 16996, 17005, 17014, 17023, 17032,
- 17041, 17053, 17064, 17076, 17087, 17100, 17112, 17125, 17137, 17149, 17160, 17172, 17183, 17199,
- 17215, 17227, 17238, 17250, 17261, 17274, 17286, 17299, 17311, 17323, 17334, 17346, 17357, 17366,
- 17375, 17384, 17393, 17402, 17411, 17421, 17431, 17446, 17460, 17475, 17489, 17499, 17509, 17518,
- 17527, 17536, 17545, 17554, 17563, 17572, 17581, 17590, 17599, 17608, 17617, 17626, 17635, 17644,
- 17653, 17662, 17671, 17680, 17689, 17698, 17707, 17716, 17725, 17736, 17747, 17758, 17769, 17780,
- 17791, 17802, 17813, 17824, 17835, 17846, 17857, 17868, 17879, 17890, 17901, 17912, 17923, 17934,
- 17945, 17956, 17967, 17978, 17989, 18000, 18009, 18018, 18032, 18045, 18059, 18072, 18082, 18092,
- 18101, 18110, 18119, 18132, 18141, 18154, 18163, 18172, 18182, 18192, 18199, 18208, 18217, 18224,
- 18233, 18242, 18249, 18258, 18267, 18278, 18289, 18300, 18311, 18322, 18333, 18338, 18344, 18350,
- 18358, 18366, 18374, 18382, 18390, 18398, 18404, 18410, 18422, 18433, 18444, 18455, 18464, 18473,
- 18485, 18496, 18508, 18519, 18528, 18537, 18547, 18557, 18567, 18577, 18589, 18600, 18612, 18623,
- 18635, 18646, 18658, 18669, 18681, 18692, 18704, 18715, 18724, 18732, 18740, 18748, 18756, 18764,
- 18772, 18780, 18788, 18796, 18804, 18812, 18820, 18828, 18836, 18844, 18853, 18861, 18869, 18877,
- 18885, 18893, 18901, 18909, 18917, 18925, 18933, 18941, 18949, 18957, 18965, 18973, 18982, 18991,
- 19000, 19009, 19019, 19029, 19039, 19049, 19057, 19065, 19073, 19081, 19093, 19105, 19117, 19129,
- 19142, 19155, 19167, 19179, 19191, 19203, 19215, 19227, 19240, 19253, 19265, 19277, 19285, 19295,
- 19305, 19315, 19325, 19334, 19342, 19352, 19362, 19372, 19382, 19391, 19399, 19409, 19419, 19425,
- 19432, 19441, 19450, 19459, 19468, 19477, 19486, 19495, 19502, 19509, 19517, 19526, 19534, 19542,
- 19551, 19559, 19567, 19576, 19584, 19592, 19601, 19609, 19617, 19626, 19634, 19642, 19651, 19659,
- 19666, 19674, 19681, 19688, 19696, 19703, 19710, 19721, 19728, 19739, 19746, 19757, 19764, 19775,
- 19783, 19792, 19800, 19808, 19817, 19825, 19833, 19842, 19850, 19858, 19867, 19875, 19883, 19892,
- 19900, 19908, 19917, 19925, 19932, 19940, 19947, 19954, 19962, 19969, 19975, 19981, 19987, 19994,
- 20007, 20017, 20027, 20037, 20047, 20058, 20068, 20078, 20088, 20098, 20102, 20107, 20115, 20124,
- 20132, 20140, 20149, 20157, 20165, 20174, 20182, 20190, 20199, 20207, 20215, 20224, 20232, 20240,
- 20249, 20257, 20264, 20272, 20279, 20286, 20294, 20301, 20309, 20318, 20326, 20334, 20343, 20351,
- 20359, 20368, 20376, 20384, 20393, 20401, 20409, 20418, 20426, 20434, 20443, 20451, 20458, 20466,
- 20473, 20480, 20488, 20495, 20508, 20521, 20534, 20547, 20560, 20573, 20586, 20599, 20603, 20612,
- 20625, 20634, 20647, 20656, 20669, 20678, 20691, 20696, 20704, 20713, 20721, 20729, 20738, 20746,
- 20754, 20763, 20771, 20779, 20788, 20796, 20804, 20813, 20821, 20829, 20838, 20846, 20853, 20861,
- 20868, 20875, 20883, 20890, 20899, 20907, 20916, 20924, 20932, 20941, 20949, 20957, 20969, 20978,
- 20986, 20995, 21003, 21011, 21020, 21028, 21036, 21048, 21057, 21067, 21076, 21084, 21094, 21103,
- 21111, 21119, 21131, 21138, 21145, 21152, 21159, 21166, 21173, 21184, 21191, 21198, 21205, 21211,
- 21218, 21225, 21231, 21237, 21244, 21251, 21261, 21271, 21281, 21290, 21296, 21302, 21308, 21314,
- 21321, 21328, 21334, 21340, 21347, 21354, 21360, 21366, 21373, 21380, 21387, 21394, 21401, 21408,
- 21415, 21422, 21428, 21434, 21440, 21446, 21452, 21458, 21465, 21471, 21479, 21488, 21496, 21504,
- 21513, 21521, 21529, 21538, 21546, 21554, 21563, 21571, 21579, 21588, 21596, 21604, 21613, 21621,
- 21628, 21636, 21643, 21650, 21658, 21665, 21676, 21687, 21698, 21709, 21720, 21731, 21742, 21753,
- 21764, 21775, 21786, 21797, 21805, 21814, 21822, 21830, 21839, 21847, 21855, 21864, 21872, 21880,
- 21889, 21897, 21905, 21914, 21922, 21930, 21939, 21947, 21954, 21962, 21969, 21976, 21984, 21991,
- 22002, 22013, 22024, 22035, 22046, 22057, 22068, 22079, 22090, 22101, 22112, 22123, 22133, 22143,
- 22153, 22163, 22169, 22175, 22184, 22193, 22202, 22210, 22218, 22226, 22234, 22242, 22250, 22258,
- 22266, 22274, 22286, 22294, 22306, 22314, 22326, 22334, 22346, 22354, 22366, 22374, 22386, 22394,
- 22406, 22414, 22426, 22433, 22443, 22453, 22463, 22473, 22477, 22481, 22485, 22493, 22499, 22505,
- 22511, 22516, 22521, 22529, 22537, 22546, 22555, 22564, 22572, 22581, 22590, 22601, 22612, 22623,
- 22633, 22643, 22655, 22665, 22677, 22689, 22696, 22705, 22713, 22722, 22730, 22738, 22747, 22755,
- 22763, 22775, 22784, 22792, 22801, 22809, 22817, 22826, 22834, 22842, 22854, 22863, 22873, 22882,
- 22890, 22900, 22909, 22917, 22925, 22937, 22944, 22951, 22958, 22965, 22972, 22979, 22990, 22998,
- 23006, 23014, 23022, 23032, 23042, 23053, 23064, 23076, 23087, 23098, 23109, 23122, 23135, 23148,
- 23162, 23176, 23190, 23204, 23218, 23232, 23243, 23251, 23263, 23271, 23283, 23291, 23303, 23311,
- 23323, 23332, 23341, 23351, 23361, 23372, 23382, 23391, 23401, 23410, 23420, 23432, 23441, 23453,
- 23465, 23478, 23491, 23504, 23517, 23530, 23543, 23553, 23560, 23568, 23577, 23585, 23595, 23602,
- 23611, 23620, 23629, 23640, 23651, 23664, 23675, 23688, 23698, 23707, 23716, 23725, 23734, 23744,
- 23753, 23762, 23771, 23780, 23790, 23801, 23812, 23821, 23830, 23838, 23846, 23854, 23862, 23870,
- 23881, 23892, 23897, 23903, 23912, 23921, 23930, 23940, 23950, 23960, 23970, 23980, 23989, 23999,
- 24008, 24020, 24032, 24044, 24055, 24066, 24077, 24085, 24096, 24107, 24118, 24129, 24140, 24151,
- 24162, 24173, 24195, 24201, 24207, 24213, 24219, 24226, 24235, 24244, 24253, 24262, 24273, 24284,
- 24295, 24306, 24315, 24327, 24339, 24351, 24363, 24370, 24376, 24383, 24396, 24401, 24408, 24419,
- 24436, 24447, 24453, 24462, 24471, 24480, 24489, 24498, 24507, 24515, 24523, 24532, 24541, 24550,
- 24559, 24568, 24577, 24586, 24595, 24604, 24612, 24620, 24626, 24631, 24640, 24648, 24657, 24665,
- 24673, 24682, 24690, 24698, 24710, 24719, 24727, 24736, 24744, 24752, 24761, 24769, 24777, 24789,
- 24798, 24808, 24817, 24825, 24835, 24844, 24852, 24860, 24872, 24879, 24886, 24893, 24900, 24907,
- 24914, 24925, 24933, 24941, 24949, 0
- };
-
- const char *Strs =
- "PHI\000INLINEASM\000DBG_LABEL\000EH_LABEL\000GC_LABEL\000KILL\000EXTRAC"
- "T_SUBREG\000INSERT_SUBREG\000IMPLICIT_DEF\000SUBREG_TO_REG\000COPY_TO_R"
- "EGCLASS\000DBG_VALUE\000ABS_F\000ABS_Fp32\000ABS_Fp64\000ABS_Fp80\000AD"
- "C16i16\000ADC16mi\000ADC16mi8\000ADC16mr\000ADC16ri\000ADC16ri8\000ADC1"
- "6rm\000ADC16rr\000ADC16rr_REV\000ADC32i32\000ADC32mi\000ADC32mi8\000ADC"
- "32mr\000ADC32ri\000ADC32ri8\000ADC32rm\000ADC32rr\000ADC32rr_REV\000ADC"
- "64i32\000ADC64mi32\000ADC64mi8\000ADC64mr\000ADC64ri32\000ADC64ri8\000A"
- "DC64rm\000ADC64rr\000ADC64rr_REV\000ADC8i8\000ADC8mi\000ADC8mr\000ADC8r"
- "i\000ADC8rm\000ADC8rr\000ADC8rr_REV\000ADD16i16\000ADD16mi\000ADD16mi8\000"
- "ADD16mr\000ADD16mrmrr\000ADD16ri\000ADD16ri8\000ADD16rm\000ADD16rr\000A"
- "DD32i32\000ADD32mi\000ADD32mi8\000ADD32mr\000ADD32mrmrr\000ADD32ri\000A"
- "DD32ri8\000ADD32rm\000ADD32rr\000ADD64i32\000ADD64mi32\000ADD64mi8\000A"
- "DD64mr\000ADD64mrmrr\000ADD64ri32\000ADD64ri8\000ADD64rm\000ADD64rr\000"
- "ADD8i8\000ADD8mi\000ADD8mr\000ADD8mrmrr\000ADD8ri\000ADD8rm\000ADD8rr\000"
- "ADDPDrm\000ADDPDrr\000ADDPSrm\000ADDPSrr\000ADDSDrm\000ADDSDrm_Int\000A"
- "DDSDrr\000ADDSDrr_Int\000ADDSSrm\000ADDSSrm_Int\000ADDSSrr\000ADDSSrr_I"
- "nt\000ADDSUBPDrm\000ADDSUBPDrr\000ADDSUBPSrm\000ADDSUBPSrr\000ADD_F32m\000"
- "ADD_F64m\000ADD_FI16m\000ADD_FI32m\000ADD_FPrST0\000ADD_FST0r\000ADD_Fp"
- "32\000ADD_Fp32m\000ADD_Fp64\000ADD_Fp64m\000ADD_Fp64m32\000ADD_Fp80\000"
- "ADD_Fp80m32\000ADD_Fp80m64\000ADD_FpI16m32\000ADD_FpI16m64\000ADD_FpI16"
- "m80\000ADD_FpI32m32\000ADD_FpI32m64\000ADD_FpI32m80\000ADD_FrST0\000ADJ"
- "CALLSTACKDOWN32\000ADJCALLSTACKDOWN64\000ADJCALLSTACKUP32\000ADJCALLSTA"
- "CKUP64\000AND16i16\000AND16mi\000AND16mi8\000AND16mr\000AND16ri\000AND1"
- "6ri8\000AND16rm\000AND16rr\000AND16rr_REV\000AND32i32\000AND32mi\000AND"
- "32mi8\000AND32mr\000AND32ri\000AND32ri8\000AND32rm\000AND32rr\000AND32r"
- "r_REV\000AND64i32\000AND64mi32\000AND64mi8\000AND64mr\000AND64ri32\000A"
- "ND64ri8\000AND64rm\000AND64rr\000AND64rr_REV\000AND8i8\000AND8mi\000AND"
- "8mr\000AND8ri\000AND8rm\000AND8rr\000AND8rr_REV\000ANDNPDrm\000ANDNPDrr"
- "\000ANDNPSrm\000ANDNPSrr\000ANDPDrm\000ANDPDrr\000ANDPSrm\000ANDPSrr\000"
- "ATOMADD6432\000ATOMAND16\000ATOMAND32\000ATOMAND64\000ATOMAND6432\000AT"
- "OMAND8\000ATOMMAX16\000ATOMMAX32\000ATOMMAX64\000ATOMMIN16\000ATOMMIN32"
- "\000ATOMMIN64\000ATOMNAND16\000ATOMNAND32\000ATOMNAND64\000ATOMNAND6432"
- "\000ATOMNAND8\000ATOMOR16\000ATOMOR32\000ATOMOR64\000ATOMOR6432\000ATOM"
- "OR8\000ATOMSUB6432\000ATOMSWAP6432\000ATOMUMAX16\000ATOMUMAX32\000ATOMU"
- "MAX64\000ATOMUMIN16\000ATOMUMIN32\000ATOMUMIN64\000ATOMXOR16\000ATOMXOR"
- "32\000ATOMXOR64\000ATOMXOR6432\000ATOMXOR8\000BLENDPDrmi\000BLENDPDrri\000"
- "BLENDPSrmi\000BLENDPSrri\000BLENDVPDrm0\000BLENDVPDrr0\000BLENDVPSrm0\000"
- "BLENDVPSrr0\000BSF16rm\000BSF16rr\000BSF32rm\000BSF32rr\000BSF64rm\000B"
- "SF64rr\000BSR16rm\000BSR16rr\000BSR32rm\000BSR32rr\000BSR64rm\000BSR64r"
- "r\000BSWAP32r\000BSWAP64r\000BT16mi8\000BT16mr\000BT16ri8\000BT16rr\000"
- "BT32mi8\000BT32mr\000BT32ri8\000BT32rr\000BT64mi8\000BT64mr\000BT64ri8\000"
- "BT64rr\000BTC16mi8\000BTC16mr\000BTC16ri8\000BTC16rr\000BTC32mi8\000BTC"
- "32mr\000BTC32ri8\000BTC32rr\000BTC64mi8\000BTC64mr\000BTC64ri8\000BTC64"
- "rr\000BTR16mi8\000BTR16mr\000BTR16ri8\000BTR16rr\000BTR32mi8\000BTR32mr"
- "\000BTR32ri8\000BTR32rr\000BTR64mi8\000BTR64mr\000BTR64ri8\000BTR64rr\000"
- "BTS16mi8\000BTS16mr\000BTS16ri8\000BTS16rr\000BTS32mi8\000BTS32mr\000BT"
- "S32ri8\000BTS32rr\000BTS64mi8\000BTS64mr\000BTS64ri8\000BTS64rr\000CALL"
- "32m\000CALL32r\000CALL64m\000CALL64pcrel32\000CALL64r\000CALLpcrel32\000"
- "CBW\000CDQ\000CDQE\000CHS_F\000CHS_Fp32\000CHS_Fp64\000CHS_Fp80\000CLC\000"
- "CLD\000CLFLUSH\000CLI\000CLTS\000CMC\000CMOVA16rm\000CMOVA16rr\000CMOVA"
- "32rm\000CMOVA32rr\000CMOVA64rm\000CMOVA64rr\000CMOVAE16rm\000CMOVAE16rr"
- "\000CMOVAE32rm\000CMOVAE32rr\000CMOVAE64rm\000CMOVAE64rr\000CMOVB16rm\000"
- "CMOVB16rr\000CMOVB32rm\000CMOVB32rr\000CMOVB64rm\000CMOVB64rr\000CMOVBE"
- "16rm\000CMOVBE16rr\000CMOVBE32rm\000CMOVBE32rr\000CMOVBE64rm\000CMOVBE6"
- "4rr\000CMOVBE_F\000CMOVBE_Fp32\000CMOVBE_Fp64\000CMOVBE_Fp80\000CMOVB_F"
- "\000CMOVB_Fp32\000CMOVB_Fp64\000CMOVB_Fp80\000CMOVE16rm\000CMOVE16rr\000"
- "CMOVE32rm\000CMOVE32rr\000CMOVE64rm\000CMOVE64rr\000CMOVE_F\000CMOVE_Fp"
- "32\000CMOVE_Fp64\000CMOVE_Fp80\000CMOVG16rm\000CMOVG16rr\000CMOVG32rm\000"
- "CMOVG32rr\000CMOVG64rm\000CMOVG64rr\000CMOVGE16rm\000CMOVGE16rr\000CMOV"
- "GE32rm\000CMOVGE32rr\000CMOVGE64rm\000CMOVGE64rr\000CMOVL16rm\000CMOVL1"
- "6rr\000CMOVL32rm\000CMOVL32rr\000CMOVL64rm\000CMOVL64rr\000CMOVLE16rm\000"
- "CMOVLE16rr\000CMOVLE32rm\000CMOVLE32rr\000CMOVLE64rm\000CMOVLE64rr\000C"
- "MOVNBE_F\000CMOVNBE_Fp32\000CMOVNBE_Fp64\000CMOVNBE_Fp80\000CMOVNB_F\000"
- "CMOVNB_Fp32\000CMOVNB_Fp64\000CMOVNB_Fp80\000CMOVNE16rm\000CMOVNE16rr\000"
- "CMOVNE32rm\000CMOVNE32rr\000CMOVNE64rm\000CMOVNE64rr\000CMOVNE_F\000CMO"
- "VNE_Fp32\000CMOVNE_Fp64\000CMOVNE_Fp80\000CMOVNO16rm\000CMOVNO16rr\000C"
- "MOVNO32rm\000CMOVNO32rr\000CMOVNO64rm\000CMOVNO64rr\000CMOVNP16rm\000CM"
- "OVNP16rr\000CMOVNP32rm\000CMOVNP32rr\000CMOVNP64rm\000CMOVNP64rr\000CMO"
- "VNP_F\000CMOVNP_Fp32\000CMOVNP_Fp64\000CMOVNP_Fp80\000CMOVNS16rm\000CMO"
- "VNS16rr\000CMOVNS32rm\000CMOVNS32rr\000CMOVNS64rm\000CMOVNS64rr\000CMOV"
- "O16rm\000CMOVO16rr\000CMOVO32rm\000CMOVO32rr\000CMOVO64rm\000CMOVO64rr\000"
- "CMOVP16rm\000CMOVP16rr\000CMOVP32rm\000CMOVP32rr\000CMOVP64rm\000CMOVP6"
- "4rr\000CMOVP_F\000CMOVP_Fp32\000CMOVP_Fp64\000CMOVP_Fp80\000CMOVS16rm\000"
- "CMOVS16rr\000CMOVS32rm\000CMOVS32rr\000CMOVS64rm\000CMOVS64rr\000CMOV_F"
- "R32\000CMOV_FR64\000CMOV_GR8\000CMOV_V1I64\000CMOV_V2F64\000CMOV_V2I64\000"
- "CMOV_V4F32\000CMP16i16\000CMP16mi\000CMP16mi8\000CMP16mr\000CMP16mrmrr\000"
- "CMP16ri\000CMP16ri8\000CMP16rm\000CMP16rr\000CMP32i32\000CMP32mi\000CMP"
- "32mi8\000CMP32mr\000CMP32mrmrr\000CMP32ri\000CMP32ri8\000CMP32rm\000CMP"
- "32rr\000CMP64i32\000CMP64mi32\000CMP64mi8\000CMP64mr\000CMP64mrmrr\000C"
- "MP64ri32\000CMP64ri8\000CMP64rm\000CMP64rr\000CMP8i8\000CMP8mi\000CMP8m"
- "r\000CMP8mrmrr\000CMP8ri\000CMP8rm\000CMP8rr\000CMPPDrmi\000CMPPDrri\000"
- "CMPPSrmi\000CMPPSrri\000CMPS16\000CMPS32\000CMPS64\000CMPS8\000CMPSDrm\000"
- "CMPSDrr\000CMPSSrm\000CMPSSrr\000CMPXCHG16B\000CMPXCHG16rm\000CMPXCHG16"
- "rr\000CMPXCHG32rm\000CMPXCHG32rr\000CMPXCHG64rm\000CMPXCHG64rr\000CMPXC"
- "HG8B\000CMPXCHG8rm\000CMPXCHG8rr\000COMISDrm\000COMISDrr\000COMISSrm\000"
- "COMISSrr\000COMP_FST0r\000COM_FIPr\000COM_FIr\000COM_FST0r\000COS_F\000"
- "COS_Fp32\000COS_Fp64\000COS_Fp80\000CPUID\000CQO\000CRC32m16\000CRC32m3"
- "2\000CRC32m8\000CRC32r16\000CRC32r32\000CRC32r8\000CRC64m64\000CRC64r64"
- "\000CS_PREFIX\000CVTDQ2PDrm\000CVTDQ2PDrr\000CVTDQ2PSrm\000CVTDQ2PSrr\000"
- "CVTPD2DQrm\000CVTPD2DQrr\000CVTPD2PSrm\000CVTPD2PSrr\000CVTPS2DQrm\000C"
- "VTPS2DQrr\000CVTPS2PDrm\000CVTPS2PDrr\000CVTSD2SI64rm\000CVTSD2SI64rr\000"
- "CVTSD2SSrm\000CVTSD2SSrr\000CVTSI2SD64rm\000CVTSI2SD64rr\000CVTSI2SDrm\000"
- "CVTSI2SDrr\000CVTSI2SS64rm\000CVTSI2SS64rr\000CVTSI2SSrm\000CVTSI2SSrr\000"
- "CVTSS2SDrm\000CVTSS2SDrr\000CVTSS2SI64rm\000CVTSS2SI64rr\000CVTSS2SIrm\000"
- "CVTSS2SIrr\000CVTTPS2DQrm\000CVTTPS2DQrr\000CVTTSD2SI64rm\000CVTTSD2SI6"
- "4rr\000CVTTSD2SIrm\000CVTTSD2SIrr\000CVTTSS2SI64rm\000CVTTSS2SI64rr\000"
- "CVTTSS2SIrm\000CVTTSS2SIrr\000CWD\000CWDE\000DEC16m\000DEC16r\000DEC32m"
- "\000DEC32r\000DEC64_16m\000DEC64_16r\000DEC64_32m\000DEC64_32r\000DEC64"
- "m\000DEC64r\000DEC8m\000DEC8r\000DIV16m\000DIV16r\000DIV32m\000DIV32r\000"
- "DIV64m\000DIV64r\000DIV8m\000DIV8r\000DIVPDrm\000DIVPDrr\000DIVPSrm\000"
- "DIVPSrr\000DIVR_F32m\000DIVR_F64m\000DIVR_FI16m\000DIVR_FI32m\000DIVR_F"
- "PrST0\000DIVR_FST0r\000DIVR_Fp32m\000DIVR_Fp64m\000DIVR_Fp64m32\000DIVR"
- "_Fp80m32\000DIVR_Fp80m64\000DIVR_FpI16m32\000DIVR_FpI16m64\000DIVR_FpI1"
- "6m80\000DIVR_FpI32m32\000DIVR_FpI32m64\000DIVR_FpI32m80\000DIVR_FrST0\000"
- "DIVSDrm\000DIVSDrm_Int\000DIVSDrr\000DIVSDrr_Int\000DIVSSrm\000DIVSSrm_"
- "Int\000DIVSSrr\000DIVSSrr_Int\000DIV_F32m\000DIV_F64m\000DIV_FI16m\000D"
- "IV_FI32m\000DIV_FPrST0\000DIV_FST0r\000DIV_Fp32\000DIV_Fp32m\000DIV_Fp6"
- "4\000DIV_Fp64m\000DIV_Fp64m32\000DIV_Fp80\000DIV_Fp80m32\000DIV_Fp80m64"
- "\000DIV_FpI16m32\000DIV_FpI16m64\000DIV_FpI16m80\000DIV_FpI32m32\000DIV"
- "_FpI32m64\000DIV_FpI32m80\000DIV_FrST0\000DPPDrmi\000DPPDrri\000DPPSrmi"
- "\000DPPSrri\000DS_PREFIX\000EH_RETURN\000EH_RETURN64\000ENTER\000ES_PRE"
- "FIX\000EXTRACTPSmr\000EXTRACTPSrr\000F2XM1\000FARCALL16i\000FARCALL16m\000"
- "FARCALL32i\000FARCALL32m\000FARCALL64\000FARJMP16i\000FARJMP16m\000FARJ"
- "MP32i\000FARJMP32m\000FARJMP64\000FBLDm\000FBSTPm\000FCOM32m\000FCOM64m"
- "\000FCOMP32m\000FCOMP64m\000FCOMPP\000FDECSTP\000FFREE\000FICOM16m\000F"
- "ICOM32m\000FICOMP16m\000FICOMP32m\000FINCSTP\000FLDCW16m\000FLDENVm\000"
- "FLDL2E\000FLDL2T\000FLDLG2\000FLDLN2\000FLDPI\000FNCLEX\000FNINIT\000FN"
- "OP\000FNSTCW16m\000FNSTSW8r\000FNSTSWm\000FP32_TO_INT16_IN_MEM\000FP32_"
- "TO_INT32_IN_MEM\000FP32_TO_INT64_IN_MEM\000FP64_TO_INT16_IN_MEM\000FP64"
- "_TO_INT32_IN_MEM\000FP64_TO_INT64_IN_MEM\000FP80_TO_INT16_IN_MEM\000FP8"
- "0_TO_INT32_IN_MEM\000FP80_TO_INT64_IN_MEM\000FPATAN\000FPREM\000FPREM1\000"
- "FPTAN\000FP_REG_KILL\000FRNDINT\000FRSTORm\000FSAVEm\000FSCALE\000FSINC"
- "OS\000FSTENVm\000FS_MOV32rm\000FS_PREFIX\000FXAM\000FXRSTOR\000FXSAVE\000"
- "FXTRACT\000FYL2X\000FYL2XP1\000FpGET_ST0_32\000FpGET_ST0_64\000FpGET_ST"
- "0_80\000FpGET_ST1_32\000FpGET_ST1_64\000FpGET_ST1_80\000FpSET_ST0_32\000"
- "FpSET_ST0_64\000FpSET_ST0_80\000FpSET_ST1_32\000FpSET_ST1_64\000FpSET_S"
- "T1_80\000FsANDNPDrm\000FsANDNPDrr\000FsANDNPSrm\000FsANDNPSrr\000FsANDP"
- "Drm\000FsANDPDrr\000FsANDPSrm\000FsANDPSrr\000FsFLD0SD\000FsFLD0SS\000F"
- "sMOVAPDrm\000FsMOVAPDrr\000FsMOVAPSrm\000FsMOVAPSrr\000FsORPDrm\000FsOR"
- "PDrr\000FsORPSrm\000FsORPSrr\000FsXORPDrm\000FsXORPDrr\000FsXORPSrm\000"
- "FsXORPSrr\000GS_MOV32rm\000GS_PREFIX\000HADDPDrm\000HADDPDrr\000HADDPSr"
- "m\000HADDPSrr\000HLT\000HSUBPDrm\000HSUBPDrr\000HSUBPSrm\000HSUBPSrr\000"
- "IDIV16m\000IDIV16r\000IDIV32m\000IDIV32r\000IDIV64m\000IDIV64r\000IDIV8"
- "m\000IDIV8r\000ILD_F16m\000ILD_F32m\000ILD_F64m\000ILD_Fp16m32\000ILD_F"
- "p16m64\000ILD_Fp16m80\000ILD_Fp32m32\000ILD_Fp32m64\000ILD_Fp32m80\000I"
- "LD_Fp64m32\000ILD_Fp64m64\000ILD_Fp64m80\000IMUL16m\000IMUL16r\000IMUL1"
- "6rm\000IMUL16rmi\000IMUL16rmi8\000IMUL16rr\000IMUL16rri\000IMUL16rri8\000"
- "IMUL32m\000IMUL32r\000IMUL32rm\000IMUL32rmi\000IMUL32rmi8\000IMUL32rr\000"
- "IMUL32rri\000IMUL32rri8\000IMUL64m\000IMUL64r\000IMUL64rm\000IMUL64rmi3"
- "2\000IMUL64rmi8\000IMUL64rr\000IMUL64rri32\000IMUL64rri8\000IMUL8m\000I"
- "MUL8r\000IN16\000IN16ri\000IN16rr\000IN32\000IN32ri\000IN32rr\000IN8\000"
- "IN8ri\000IN8rr\000INC16m\000INC16r\000INC32m\000INC32r\000INC64_16m\000"
- "INC64_16r\000INC64_32m\000INC64_32r\000INC64m\000INC64r\000INC8m\000INC"
- "8r\000INSERTPSrm\000INSERTPSrr\000INT\000INT3\000INVD\000INVEPT\000INVL"
- "PG\000INVVPID\000IRET16\000IRET32\000IRET64\000ISTT_FP16m\000ISTT_FP32m"
- "\000ISTT_FP64m\000ISTT_Fp16m32\000ISTT_Fp16m64\000ISTT_Fp16m80\000ISTT_"
- "Fp32m32\000ISTT_Fp32m64\000ISTT_Fp32m80\000ISTT_Fp64m32\000ISTT_Fp64m64"
- "\000ISTT_Fp64m80\000IST_F16m\000IST_F32m\000IST_FP16m\000IST_FP32m\000I"
- "ST_FP64m\000IST_Fp16m32\000IST_Fp16m64\000IST_Fp16m80\000IST_Fp32m32\000"
- "IST_Fp32m64\000IST_Fp32m80\000IST_Fp64m32\000IST_Fp64m64\000IST_Fp64m80"
- "\000Int_CMPSDrm\000Int_CMPSDrr\000Int_CMPSSrm\000Int_CMPSSrr\000Int_COM"
- "ISDrm\000Int_COMISDrr\000Int_COMISSrm\000Int_COMISSrr\000Int_CVTDQ2PDrm"
- "\000Int_CVTDQ2PDrr\000Int_CVTDQ2PSrm\000Int_CVTDQ2PSrr\000Int_CVTPD2DQr"
- "m\000Int_CVTPD2DQrr\000Int_CVTPD2PIrm\000Int_CVTPD2PIrr\000Int_CVTPD2PS"
- "rm\000Int_CVTPD2PSrr\000Int_CVTPI2PDrm\000Int_CVTPI2PDrr\000Int_CVTPI2P"
- "Srm\000Int_CVTPI2PSrr\000Int_CVTPS2DQrm\000Int_CVTPS2DQrr\000Int_CVTPS2"
- "PDrm\000Int_CVTPS2PDrr\000Int_CVTPS2PIrm\000Int_CVTPS2PIrr\000Int_CVTSD"
- "2SI64rm\000Int_CVTSD2SI64rr\000Int_CVTSD2SIrm\000Int_CVTSD2SIrr\000Int_"
- "CVTSD2SSrm\000Int_CVTSD2SSrr\000Int_CVTSI2SD64rm\000Int_CVTSI2SD64rr\000"
- "Int_CVTSI2SDrm\000Int_CVTSI2SDrr\000Int_CVTSI2SS64rm\000Int_CVTSI2SS64r"
- "r\000Int_CVTSI2SSrm\000Int_CVTSI2SSrr\000Int_CVTSS2SDrm\000Int_CVTSS2SD"
- "rr\000Int_CVTSS2SI64rm\000Int_CVTSS2SI64rr\000Int_CVTSS2SIrm\000Int_CVT"
- "SS2SIrr\000Int_CVTTPD2DQrm\000Int_CVTTPD2DQrr\000Int_CVTTPD2PIrm\000Int"
- "_CVTTPD2PIrr\000Int_CVTTPS2DQrm\000Int_CVTTPS2DQrr\000Int_CVTTPS2PIrm\000"
- "Int_CVTTPS2PIrr\000Int_CVTTSD2SI64rm\000Int_CVTTSD2SI64rr\000Int_CVTTSD"
- "2SIrm\000Int_CVTTSD2SIrr\000Int_CVTTSS2SI64rm\000Int_CVTTSS2SI64rr\000I"
- "nt_CVTTSS2SIrm\000Int_CVTTSS2SIrr\000Int_UCOMISDrm\000Int_UCOMISDrr\000"
- "Int_UCOMISSrm\000Int_UCOMISSrr\000JAE_1\000JAE_4\000JA_1\000JA_4\000JBE"
- "_1\000JBE_4\000JB_1\000JB_4\000JCXZ8\000JE_1\000JE_4\000JGE_1\000JGE_4\000"
- "JG_1\000JG_4\000JLE_1\000JLE_4\000JL_1\000JL_4\000JMP32m\000JMP32r\000J"
- "MP64m\000JMP64pcrel32\000JMP64r\000JMP_1\000JMP_4\000JNE_1\000JNE_4\000"
- "JNO_1\000JNO_4\000JNP_1\000JNP_4\000JNS_1\000JNS_4\000JO_1\000JO_4\000J"
- "P_1\000JP_4\000JS_1\000JS_4\000LAHF\000LAR16rm\000LAR16rr\000LAR32rm\000"
- "LAR32rr\000LAR64rm\000LAR64rr\000LCMPXCHG16\000LCMPXCHG32\000LCMPXCHG64"
- "\000LCMPXCHG8\000LCMPXCHG8B\000LDDQUrm\000LDMXCSR\000LDS16rm\000LDS32rm"
- "\000LD_F0\000LD_F1\000LD_F32m\000LD_F64m\000LD_F80m\000LD_Fp032\000LD_F"
- "p064\000LD_Fp080\000LD_Fp132\000LD_Fp164\000LD_Fp180\000LD_Fp32m\000LD_"
- "Fp32m64\000LD_Fp32m80\000LD_Fp64m\000LD_Fp64m80\000LD_Fp80m\000LD_Frr\000"
- "LEA16r\000LEA32r\000LEA64_32r\000LEA64r\000LEAVE\000LEAVE64\000LES16rm\000"
- "LES32rm\000LFENCE\000LFS16rm\000LFS32rm\000LFS64rm\000LGDTm\000LGS16rm\000"
- "LGS32rm\000LGS64rm\000LIDTm\000LLDT16m\000LLDT16r\000LMSW16m\000LMSW16r"
- "\000LOCK_ADD16mi\000LOCK_ADD16mi8\000LOCK_ADD16mr\000LOCK_ADD32mi\000LO"
- "CK_ADD32mi8\000LOCK_ADD32mr\000LOCK_ADD64mi32\000LOCK_ADD64mi8\000LOCK_"
- "ADD64mr\000LOCK_ADD8mi\000LOCK_ADD8mr\000LOCK_DEC16m\000LOCK_DEC32m\000"
- "LOCK_DEC64m\000LOCK_DEC8m\000LOCK_INC16m\000LOCK_INC32m\000LOCK_INC64m\000"
- "LOCK_INC8m\000LOCK_PREFIX\000LOCK_SUB16mi\000LOCK_SUB16mi8\000LOCK_SUB1"
- "6mr\000LOCK_SUB32mi\000LOCK_SUB32mi8\000LOCK_SUB32mr\000LOCK_SUB64mi32\000"
- "LOCK_SUB64mi8\000LOCK_SUB64mr\000LOCK_SUB8mi\000LOCK_SUB8mr\000LODSB\000"
- "LODSD\000LODSQ\000LODSW\000LOOP\000LOOPE\000LOOPNE\000LRET\000LRETI\000"
- "LSL16rm\000LSL16rr\000LSL32rm\000LSL32rr\000LSL64rm\000LSL64rr\000LSS16"
- "rm\000LSS32rm\000LSS64rm\000LTRm\000LTRr\000LXADD16\000LXADD32\000LXADD"
- "64\000LXADD8\000MASKMOVDQU\000MASKMOVDQU64\000MAXPDrm\000MAXPDrm_Int\000"
- "MAXPDrr\000MAXPDrr_Int\000MAXPSrm\000MAXPSrm_Int\000MAXPSrr\000MAXPSrr_"
- "Int\000MAXSDrm\000MAXSDrm_Int\000MAXSDrr\000MAXSDrr_Int\000MAXSSrm\000M"
- "AXSSrm_Int\000MAXSSrr\000MAXSSrr_Int\000MFENCE\000MINGW_ALLOCA\000MINPD"
- "rm\000MINPDrm_Int\000MINPDrr\000MINPDrr_Int\000MINPSrm\000MINPSrm_Int\000"
- "MINPSrr\000MINPSrr_Int\000MINSDrm\000MINSDrm_Int\000MINSDrr\000MINSDrr_"
- "Int\000MINSSrm\000MINSSrm_Int\000MINSSrr\000MINSSrr_Int\000MMX_CVTPD2PI"
- "rm\000MMX_CVTPD2PIrr\000MMX_CVTPI2PDrm\000MMX_CVTPI2PDrr\000MMX_CVTPI2P"
- "Srm\000MMX_CVTPI2PSrr\000MMX_CVTPS2PIrm\000MMX_CVTPS2PIrr\000MMX_CVTTPD"
- "2PIrm\000MMX_CVTTPD2PIrr\000MMX_CVTTPS2PIrm\000MMX_CVTTPS2PIrr\000MMX_E"
- "MMS\000MMX_FEMMS\000MMX_MASKMOVQ\000MMX_MASKMOVQ64\000MMX_MOVD64from64r"
- "r\000MMX_MOVD64grr\000MMX_MOVD64mr\000MMX_MOVD64rm\000MMX_MOVD64rr\000M"
- "MX_MOVD64rrv164\000MMX_MOVD64to64rr\000MMX_MOVDQ2Qrr\000MMX_MOVNTQmr\000"
- "MMX_MOVQ2DQrr\000MMX_MOVQ2FR64rr\000MMX_MOVQ64gmr\000MMX_MOVQ64mr\000MM"
- "X_MOVQ64rm\000MMX_MOVQ64rr\000MMX_MOVZDI2PDIrm\000MMX_MOVZDI2PDIrr\000M"
- "MX_PACKSSDWrm\000MMX_PACKSSDWrr\000MMX_PACKSSWBrm\000MMX_PACKSSWBrr\000"
- "MMX_PACKUSWBrm\000MMX_PACKUSWBrr\000MMX_PADDBrm\000MMX_PADDBrr\000MMX_P"
- "ADDDrm\000MMX_PADDDrr\000MMX_PADDQrm\000MMX_PADDQrr\000MMX_PADDSBrm\000"
- "MMX_PADDSBrr\000MMX_PADDSWrm\000MMX_PADDSWrr\000MMX_PADDUSBrm\000MMX_PA"
- "DDUSBrr\000MMX_PADDUSWrm\000MMX_PADDUSWrr\000MMX_PADDWrm\000MMX_PADDWrr"
- "\000MMX_PANDNrm\000MMX_PANDNrr\000MMX_PANDrm\000MMX_PANDrr\000MMX_PAVGB"
- "rm\000MMX_PAVGBrr\000MMX_PAVGWrm\000MMX_PAVGWrr\000MMX_PCMPEQBrm\000MMX"
- "_PCMPEQBrr\000MMX_PCMPEQDrm\000MMX_PCMPEQDrr\000MMX_PCMPEQWrm\000MMX_PC"
- "MPEQWrr\000MMX_PCMPGTBrm\000MMX_PCMPGTBrr\000MMX_PCMPGTDrm\000MMX_PCMPG"
- "TDrr\000MMX_PCMPGTWrm\000MMX_PCMPGTWrr\000MMX_PEXTRWri\000MMX_PINSRWrmi"
- "\000MMX_PINSRWrri\000MMX_PMADDWDrm\000MMX_PMADDWDrr\000MMX_PMAXSWrm\000"
- "MMX_PMAXSWrr\000MMX_PMAXUBrm\000MMX_PMAXUBrr\000MMX_PMINSWrm\000MMX_PMI"
- "NSWrr\000MMX_PMINUBrm\000MMX_PMINUBrr\000MMX_PMOVMSKBrr\000MMX_PMULHUWr"
- "m\000MMX_PMULHUWrr\000MMX_PMULHWrm\000MMX_PMULHWrr\000MMX_PMULLWrm\000M"
- "MX_PMULLWrr\000MMX_PMULUDQrm\000MMX_PMULUDQrr\000MMX_PORrm\000MMX_PORrr"
- "\000MMX_PSADBWrm\000MMX_PSADBWrr\000MMX_PSHUFWmi\000MMX_PSHUFWri\000MMX"
- "_PSLLDri\000MMX_PSLLDrm\000MMX_PSLLDrr\000MMX_PSLLQri\000MMX_PSLLQrm\000"
- "MMX_PSLLQrr\000MMX_PSLLWri\000MMX_PSLLWrm\000MMX_PSLLWrr\000MMX_PSRADri"
- "\000MMX_PSRADrm\000MMX_PSRADrr\000MMX_PSRAWri\000MMX_PSRAWrm\000MMX_PSR"
- "AWrr\000MMX_PSRLDri\000MMX_PSRLDrm\000MMX_PSRLDrr\000MMX_PSRLQri\000MMX"
- "_PSRLQrm\000MMX_PSRLQrr\000MMX_PSRLWri\000MMX_PSRLWrm\000MMX_PSRLWrr\000"
- "MMX_PSUBBrm\000MMX_PSUBBrr\000MMX_PSUBDrm\000MMX_PSUBDrr\000MMX_PSUBQrm"
- "\000MMX_PSUBQrr\000MMX_PSUBSBrm\000MMX_PSUBSBrr\000MMX_PSUBSWrm\000MMX_"
- "PSUBSWrr\000MMX_PSUBUSBrm\000MMX_PSUBUSBrr\000MMX_PSUBUSWrm\000MMX_PSUB"
- "USWrr\000MMX_PSUBWrm\000MMX_PSUBWrr\000MMX_PUNPCKHBWrm\000MMX_PUNPCKHBW"
- "rr\000MMX_PUNPCKHDQrm\000MMX_PUNPCKHDQrr\000MMX_PUNPCKHWDrm\000MMX_PUNP"
- "CKHWDrr\000MMX_PUNPCKLBWrm\000MMX_PUNPCKLBWrr\000MMX_PUNPCKLDQrm\000MMX"
- "_PUNPCKLDQrr\000MMX_PUNPCKLWDrm\000MMX_PUNPCKLWDrr\000MMX_PXORrm\000MMX"
- "_PXORrr\000MMX_V_SET0\000MMX_V_SETALLONES\000MONITOR\000MOV16ao16\000MO"
- "V16mi\000MOV16mr\000MOV16ms\000MOV16o16a\000MOV16r0\000MOV16ri\000MOV16"
- "rm\000MOV16rr\000MOV16rr_REV\000MOV16rs\000MOV16sm\000MOV16sr\000MOV32a"
- "o32\000MOV32cr\000MOV32dr\000MOV32mi\000MOV32mr\000MOV32o32a\000MOV32r0"
- "\000MOV32rc\000MOV32rd\000MOV32ri\000MOV32rm\000MOV32rr\000MOV32rr_REV\000"
- "MOV64FSrm\000MOV64GSrm\000MOV64ao64\000MOV64ao8\000MOV64cr\000MOV64dr\000"
- "MOV64mi32\000MOV64mr\000MOV64ms\000MOV64o64a\000MOV64o8a\000MOV64r0\000"
- "MOV64rc\000MOV64rd\000MOV64ri\000MOV64ri32\000MOV64ri64i32\000MOV64rm\000"
- "MOV64rr\000MOV64rr_REV\000MOV64rs\000MOV64sm\000MOV64sr\000MOV64toPQIrr"
- "\000MOV64toSDrm\000MOV64toSDrr\000MOV8ao8\000MOV8mi\000MOV8mr\000MOV8mr"
- "_NOREX\000MOV8o8a\000MOV8r0\000MOV8ri\000MOV8rm\000MOV8rm_NOREX\000MOV8"
- "rr\000MOV8rr_NOREX\000MOV8rr_REV\000MOVAPDmr\000MOVAPDrm\000MOVAPDrr\000"
- "MOVAPSmr\000MOVAPSrm\000MOVAPSrr\000MOVDDUPrm\000MOVDDUPrr\000MOVDI2PDI"
- "rm\000MOVDI2PDIrr\000MOVDI2SSrm\000MOVDI2SSrr\000MOVDQAmr\000MOVDQArm\000"
- "MOVDQArr\000MOVDQUmr\000MOVDQUmr_Int\000MOVDQUrm\000MOVDQUrm_Int\000MOV"
- "HLPSrr\000MOVHPDmr\000MOVHPDrm\000MOVHPSmr\000MOVHPSrm\000MOVLHPSrr\000"
- "MOVLPDmr\000MOVLPDrm\000MOVLPSmr\000MOVLPSrm\000MOVLQ128mr\000MOVMSKPDr"
- "r\000MOVMSKPSrr\000MOVNTDQArm\000MOVNTDQ_64mr\000MOVNTDQmr\000MOVNTDQmr"
- "_Int\000MOVNTI_64mr\000MOVNTImr\000MOVNTImr_Int\000MOVNTPDmr\000MOVNTPD"
- "mr_Int\000MOVNTPSmr\000MOVNTPSmr_Int\000MOVPC32r\000MOVPDI2DImr\000MOVP"
- "DI2DIrr\000MOVPQI2QImr\000MOVPQIto64rr\000MOVQI2PQIrm\000MOVQxrxr\000MO"
- "VSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr\000MOVSDto64mr\000MOVSDto"
- "64rr\000MOVSHDUPrm\000MOVSHDUPrr\000MOVSLDUPrm\000MOVSLDUPrr\000MOVSS2D"
- "Imr\000MOVSS2DIrr\000MOVSSmr\000MOVSSrm\000MOVSSrr\000MOVSW\000MOVSX16r"
- "m8\000MOVSX16rm8W\000MOVSX16rr8\000MOVSX16rr8W\000MOVSX32rm16\000MOVSX3"
- "2rm8\000MOVSX32rr16\000MOVSX32rr8\000MOVSX64rm16\000MOVSX64rm32\000MOVS"
- "X64rm8\000MOVSX64rr16\000MOVSX64rr32\000MOVSX64rr8\000MOVUPDmr\000MOVUP"
- "Dmr_Int\000MOVUPDrm\000MOVUPDrm_Int\000MOVUPDrr\000MOVUPSmr\000MOVUPSmr"
- "_Int\000MOVUPSrm\000MOVUPSrm_Int\000MOVUPSrr\000MOVZDI2PDIrm\000MOVZDI2"
- "PDIrr\000MOVZPQILo2PQIrm\000MOVZPQILo2PQIrr\000MOVZQI2PQIrm\000MOVZQI2P"
- "QIrr\000MOVZX16rm8\000MOVZX16rm8W\000MOVZX16rr8\000MOVZX16rr8W\000MOVZX"
- "32_NOREXrm8\000MOVZX32_NOREXrr8\000MOVZX32rm16\000MOVZX32rm8\000MOVZX32"
- "rr16\000MOVZX32rr8\000MOVZX64rm16\000MOVZX64rm16_Q\000MOVZX64rm32\000MO"
- "VZX64rm8\000MOVZX64rm8_Q\000MOVZX64rr16\000MOVZX64rr16_Q\000MOVZX64rr32"
- "\000MOVZX64rr8\000MOVZX64rr8_Q\000MOV_Fp3232\000MOV_Fp3264\000MOV_Fp328"
- "0\000MOV_Fp6432\000MOV_Fp6464\000MOV_Fp6480\000MOV_Fp8032\000MOV_Fp8064"
- "\000MOV_Fp8080\000MPSADBWrmi\000MPSADBWrri\000MUL16m\000MUL16r\000MUL32"
- "m\000MUL32r\000MUL64m\000MUL64r\000MUL8m\000MUL8r\000MULPDrm\000MULPDrr"
- "\000MULPSrm\000MULPSrr\000MULSDrm\000MULSDrm_Int\000MULSDrr\000MULSDrr_"
- "Int\000MULSSrm\000MULSSrm_Int\000MULSSrr\000MULSSrr_Int\000MUL_F32m\000"
- "MUL_F64m\000MUL_FI16m\000MUL_FI32m\000MUL_FPrST0\000MUL_FST0r\000MUL_Fp"
- "32\000MUL_Fp32m\000MUL_Fp64\000MUL_Fp64m\000MUL_Fp64m32\000MUL_Fp80\000"
- "MUL_Fp80m32\000MUL_Fp80m64\000MUL_FpI16m32\000MUL_FpI16m64\000MUL_FpI16"
- "m80\000MUL_FpI32m32\000MUL_FpI32m64\000MUL_FpI32m80\000MUL_FrST0\000MWA"
- "IT\000NEG16m\000NEG16r\000NEG32m\000NEG32r\000NEG64m\000NEG64r\000NEG8m"
- "\000NEG8r\000NOOP\000NOOPL\000NOOPW\000NOT16m\000NOT16r\000NOT32m\000NO"
- "T32r\000NOT64m\000NOT64r\000NOT8m\000NOT8r\000OR16i16\000OR16mi\000OR16"
- "mi8\000OR16mr\000OR16ri\000OR16ri8\000OR16rm\000OR16rr\000OR16rr_REV\000"
- "OR32i32\000OR32mi\000OR32mi8\000OR32mr\000OR32ri\000OR32ri8\000OR32rm\000"
- "OR32rr\000OR32rr_REV\000OR64i32\000OR64mi32\000OR64mi8\000OR64mr\000OR6"
- "4ri32\000OR64ri8\000OR64rm\000OR64rr\000OR64rr_REV\000OR8i8\000OR8mi\000"
- "OR8mr\000OR8ri\000OR8rm\000OR8rr\000OR8rr_REV\000ORPDrm\000ORPDrr\000OR"
- "PSrm\000ORPSrr\000OUT16ir\000OUT16rr\000OUT32ir\000OUT32rr\000OUT8ir\000"
- "OUT8rr\000OUTSB\000OUTSD\000OUTSW\000PABSBrm128\000PABSBrm64\000PABSBrr"
- "128\000PABSBrr64\000PABSDrm128\000PABSDrm64\000PABSDrr128\000PABSDrr64\000"
- "PABSWrm128\000PABSWrm64\000PABSWrr128\000PABSWrr64\000PACKSSDWrm\000PAC"
- "KSSDWrr\000PACKSSWBrm\000PACKSSWBrr\000PACKUSDWrm\000PACKUSDWrr\000PACK"
- "USWBrm\000PACKUSWBrr\000PADDBrm\000PADDBrr\000PADDDrm\000PADDDrr\000PAD"
- "DQrm\000PADDQrr\000PADDSBrm\000PADDSBrr\000PADDSWrm\000PADDSWrr\000PADD"
- "USBrm\000PADDUSBrr\000PADDUSWrm\000PADDUSWrr\000PADDWrm\000PADDWrr\000P"
- "ALIGNR128rm\000PALIGNR128rr\000PALIGNR64rm\000PALIGNR64rr\000PANDNrm\000"
- "PANDNrr\000PANDrm\000PANDrr\000PAVGBrm\000PAVGBrr\000PAVGWrm\000PAVGWrr"
- "\000PBLENDVBrm0\000PBLENDVBrr0\000PBLENDWrmi\000PBLENDWrri\000PCMPEQBrm"
- "\000PCMPEQBrr\000PCMPEQDrm\000PCMPEQDrr\000PCMPEQQrm\000PCMPEQQrr\000PC"
- "MPEQWrm\000PCMPEQWrr\000PCMPESTRIArm\000PCMPESTRIArr\000PCMPESTRICrm\000"
- "PCMPESTRICrr\000PCMPESTRIOrm\000PCMPESTRIOrr\000PCMPESTRISrm\000PCMPEST"
- "RISrr\000PCMPESTRIZrm\000PCMPESTRIZrr\000PCMPESTRIrm\000PCMPESTRIrr\000"
- "PCMPESTRM128MEM\000PCMPESTRM128REG\000PCMPESTRM128rm\000PCMPESTRM128rr\000"
- "PCMPGTBrm\000PCMPGTBrr\000PCMPGTDrm\000PCMPGTDrr\000PCMPGTQrm\000PCMPGT"
- "Qrr\000PCMPGTWrm\000PCMPGTWrr\000PCMPISTRIArm\000PCMPISTRIArr\000PCMPIS"
- "TRICrm\000PCMPISTRICrr\000PCMPISTRIOrm\000PCMPISTRIOrr\000PCMPISTRISrm\000"
- "PCMPISTRISrr\000PCMPISTRIZrm\000PCMPISTRIZrr\000PCMPISTRIrm\000PCMPISTR"
- "Irr\000PCMPISTRM128MEM\000PCMPISTRM128REG\000PCMPISTRM128rm\000PCMPISTR"
- "M128rr\000PEXTRBmr\000PEXTRBrr\000PEXTRDmr\000PEXTRDrr\000PEXTRQmr\000P"
- "EXTRQrr\000PEXTRWmr\000PEXTRWri\000PHADDDrm128\000PHADDDrm64\000PHADDDr"
- "r128\000PHADDDrr64\000PHADDSWrm128\000PHADDSWrm64\000PHADDSWrr128\000PH"
- "ADDSWrr64\000PHADDWrm128\000PHADDWrm64\000PHADDWrr128\000PHADDWrr64\000"
- "PHMINPOSUWrm128\000PHMINPOSUWrr128\000PHSUBDrm128\000PHSUBDrm64\000PHSU"
- "BDrr128\000PHSUBDrr64\000PHSUBSWrm128\000PHSUBSWrm64\000PHSUBSWrr128\000"
- "PHSUBSWrr64\000PHSUBWrm128\000PHSUBWrm64\000PHSUBWrr128\000PHSUBWrr64\000"
- "PINSRBrm\000PINSRBrr\000PINSRDrm\000PINSRDrr\000PINSRQrm\000PINSRQrr\000"
- "PINSRWrmi\000PINSRWrri\000PMADDUBSWrm128\000PMADDUBSWrm64\000PMADDUBSWr"
- "r128\000PMADDUBSWrr64\000PMADDWDrm\000PMADDWDrr\000PMAXSBrm\000PMAXSBrr"
- "\000PMAXSDrm\000PMAXSDrr\000PMAXSWrm\000PMAXSWrr\000PMAXUBrm\000PMAXUBr"
- "r\000PMAXUDrm\000PMAXUDrr\000PMAXUWrm\000PMAXUWrr\000PMINSBrm\000PMINSB"
- "rr\000PMINSDrm\000PMINSDrr\000PMINSWrm\000PMINSWrr\000PMINUBrm\000PMINU"
- "Brr\000PMINUDrm\000PMINUDrr\000PMINUWrm\000PMINUWrr\000PMOVMSKBrr\000PM"
- "OVSXBDrm\000PMOVSXBDrr\000PMOVSXBQrm\000PMOVSXBQrr\000PMOVSXBWrm\000PMO"
- "VSXBWrr\000PMOVSXDQrm\000PMOVSXDQrr\000PMOVSXWDrm\000PMOVSXWDrr\000PMOV"
- "SXWQrm\000PMOVSXWQrr\000PMOVZXBDrm\000PMOVZXBDrr\000PMOVZXBQrm\000PMOVZ"
- "XBQrr\000PMOVZXBWrm\000PMOVZXBWrr\000PMOVZXDQrm\000PMOVZXDQrr\000PMOVZX"
- "WDrm\000PMOVZXWDrr\000PMOVZXWQrm\000PMOVZXWQrr\000PMULDQrm\000PMULDQrr\000"
- "PMULHRSWrm128\000PMULHRSWrm64\000PMULHRSWrr128\000PMULHRSWrr64\000PMULH"
- "UWrm\000PMULHUWrr\000PMULHWrm\000PMULHWrr\000PMULLDrm\000PMULLDrm_int\000"
- "PMULLDrr\000PMULLDrr_int\000PMULLWrm\000PMULLWrr\000PMULUDQrm\000PMULUD"
- "Qrr\000POP16r\000POP16rmm\000POP16rmr\000POP32r\000POP32rmm\000POP32rmr"
- "\000POP64r\000POP64rmm\000POP64rmr\000POPCNT16rm\000POPCNT16rr\000POPCN"
- "T32rm\000POPCNT32rr\000POPCNT64rm\000POPCNT64rr\000POPF\000POPFD\000POP"
- "FQ\000POPFS16\000POPFS32\000POPFS64\000POPGS16\000POPGS32\000POPGS64\000"
- "PORrm\000PORrr\000PREFETCHNTA\000PREFETCHT0\000PREFETCHT1\000PREFETCHT2"
- "\000PSADBWrm\000PSADBWrr\000PSHUFBrm128\000PSHUFBrm64\000PSHUFBrr128\000"
- "PSHUFBrr64\000PSHUFDmi\000PSHUFDri\000PSHUFHWmi\000PSHUFHWri\000PSHUFLW"
- "mi\000PSHUFLWri\000PSIGNBrm128\000PSIGNBrm64\000PSIGNBrr128\000PSIGNBrr"
- "64\000PSIGNDrm128\000PSIGNDrm64\000PSIGNDrr128\000PSIGNDrr64\000PSIGNWr"
- "m128\000PSIGNWrm64\000PSIGNWrr128\000PSIGNWrr64\000PSLLDQri\000PSLLDri\000"
- "PSLLDrm\000PSLLDrr\000PSLLQri\000PSLLQrm\000PSLLQrr\000PSLLWri\000PSLLW"
- "rm\000PSLLWrr\000PSRADri\000PSRADrm\000PSRADrr\000PSRAWri\000PSRAWrm\000"
- "PSRAWrr\000PSRLDQri\000PSRLDri\000PSRLDrm\000PSRLDrr\000PSRLQri\000PSRL"
- "Qrm\000PSRLQrr\000PSRLWri\000PSRLWrm\000PSRLWrr\000PSUBBrm\000PSUBBrr\000"
- "PSUBDrm\000PSUBDrr\000PSUBQrm\000PSUBQrr\000PSUBSBrm\000PSUBSBrr\000PSU"
- "BSWrm\000PSUBSWrr\000PSUBUSBrm\000PSUBUSBrr\000PSUBUSWrm\000PSUBUSWrr\000"
- "PSUBWrm\000PSUBWrr\000PTESTrm\000PTESTrr\000PUNPCKHBWrm\000PUNPCKHBWrr\000"
- "PUNPCKHDQrm\000PUNPCKHDQrr\000PUNPCKHQDQrm\000PUNPCKHQDQrr\000PUNPCKHWD"
- "rm\000PUNPCKHWDrr\000PUNPCKLBWrm\000PUNPCKLBWrr\000PUNPCKLDQrm\000PUNPC"
- "KLDQrr\000PUNPCKLQDQrm\000PUNPCKLQDQrr\000PUNPCKLWDrm\000PUNPCKLWDrr\000"
- "PUSH16r\000PUSH16rmm\000PUSH16rmr\000PUSH32i16\000PUSH32i32\000PUSH32i8"
- "\000PUSH32r\000PUSH32rmm\000PUSH32rmr\000PUSH64i16\000PUSH64i32\000PUSH"
- "64i8\000PUSH64r\000PUSH64rmm\000PUSH64rmr\000PUSHF\000PUSHFD\000PUSHFQ6"
- "4\000PUSHFS16\000PUSHFS32\000PUSHFS64\000PUSHGS16\000PUSHGS32\000PUSHGS"
- "64\000PXORrm\000PXORrr\000RCL16m1\000RCL16mCL\000RCL16mi\000RCL16r1\000"
- "RCL16rCL\000RCL16ri\000RCL32m1\000RCL32mCL\000RCL32mi\000RCL32r1\000RCL"
- "32rCL\000RCL32ri\000RCL64m1\000RCL64mCL\000RCL64mi\000RCL64r1\000RCL64r"
- "CL\000RCL64ri\000RCL8m1\000RCL8mCL\000RCL8mi\000RCL8r1\000RCL8rCL\000RC"
- "L8ri\000RCPPSm\000RCPPSm_Int\000RCPPSr\000RCPPSr_Int\000RCPSSm\000RCPSS"
- "m_Int\000RCPSSr\000RCPSSr_Int\000RCR16m1\000RCR16mCL\000RCR16mi\000RCR1"
- "6r1\000RCR16rCL\000RCR16ri\000RCR32m1\000RCR32mCL\000RCR32mi\000RCR32r1"
- "\000RCR32rCL\000RCR32ri\000RCR64m1\000RCR64mCL\000RCR64mi\000RCR64r1\000"
- "RCR64rCL\000RCR64ri\000RCR8m1\000RCR8mCL\000RCR8mi\000RCR8r1\000RCR8rCL"
- "\000RCR8ri\000RDMSR\000RDPMC\000RDTSC\000RDTSCP\000REPNE_PREFIX\000REP_"
- "MOVSB\000REP_MOVSD\000REP_MOVSQ\000REP_MOVSW\000REP_PREFIX\000REP_STOSB"
- "\000REP_STOSD\000REP_STOSQ\000REP_STOSW\000RET\000RETI\000ROL16m1\000RO"
- "L16mCL\000ROL16mi\000ROL16r1\000ROL16rCL\000ROL16ri\000ROL32m1\000ROL32"
- "mCL\000ROL32mi\000ROL32r1\000ROL32rCL\000ROL32ri\000ROL64m1\000ROL64mCL"
- "\000ROL64mi\000ROL64r1\000ROL64rCL\000ROL64ri\000ROL8m1\000ROL8mCL\000R"
- "OL8mi\000ROL8r1\000ROL8rCL\000ROL8ri\000ROR16m1\000ROR16mCL\000ROR16mi\000"
- "ROR16r1\000ROR16rCL\000ROR16ri\000ROR32m1\000ROR32mCL\000ROR32mi\000ROR"
- "32r1\000ROR32rCL\000ROR32ri\000ROR64m1\000ROR64mCL\000ROR64mi\000ROR64r"
- "1\000ROR64rCL\000ROR64ri\000ROR8m1\000ROR8mCL\000ROR8mi\000ROR8r1\000RO"
- "R8rCL\000ROR8ri\000ROUNDPDm_Int\000ROUNDPDr_Int\000ROUNDPSm_Int\000ROUN"
- "DPSr_Int\000ROUNDSDm_Int\000ROUNDSDr_Int\000ROUNDSSm_Int\000ROUNDSSr_In"
- "t\000RSM\000RSQRTPSm\000RSQRTPSm_Int\000RSQRTPSr\000RSQRTPSr_Int\000RSQ"
- "RTSSm\000RSQRTSSm_Int\000RSQRTSSr\000RSQRTSSr_Int\000SAHF\000SAR16m1\000"
- "SAR16mCL\000SAR16mi\000SAR16r1\000SAR16rCL\000SAR16ri\000SAR32m1\000SAR"
- "32mCL\000SAR32mi\000SAR32r1\000SAR32rCL\000SAR32ri\000SAR64m1\000SAR64m"
- "CL\000SAR64mi\000SAR64r1\000SAR64rCL\000SAR64ri\000SAR8m1\000SAR8mCL\000"
- "SAR8mi\000SAR8r1\000SAR8rCL\000SAR8ri\000SBB16i16\000SBB16mi\000SBB16mi"
- "8\000SBB16mr\000SBB16ri\000SBB16ri8\000SBB16rm\000SBB16rr\000SBB16rr_RE"
- "V\000SBB32i32\000SBB32mi\000SBB32mi8\000SBB32mr\000SBB32ri\000SBB32ri8\000"
- "SBB32rm\000SBB32rr\000SBB32rr_REV\000SBB64i32\000SBB64mi32\000SBB64mi8\000"
- "SBB64mr\000SBB64ri32\000SBB64ri8\000SBB64rm\000SBB64rr\000SBB64rr_REV\000"
- "SBB8i8\000SBB8mi\000SBB8mr\000SBB8ri\000SBB8rm\000SBB8rr\000SBB8rr_REV\000"
- "SCAS16\000SCAS32\000SCAS64\000SCAS8\000SETAEm\000SETAEr\000SETAm\000SET"
- "Ar\000SETBEm\000SETBEr\000SETB_C16r\000SETB_C32r\000SETB_C64r\000SETB_C"
- "8r\000SETBm\000SETBr\000SETEm\000SETEr\000SETGEm\000SETGEr\000SETGm\000"
- "SETGr\000SETLEm\000SETLEr\000SETLm\000SETLr\000SETNEm\000SETNEr\000SETN"
- "Om\000SETNOr\000SETNPm\000SETNPr\000SETNSm\000SETNSr\000SETOm\000SETOr\000"
- "SETPm\000SETPr\000SETSm\000SETSr\000SFENCE\000SGDTm\000SHL16m1\000SHL16"
- "mCL\000SHL16mi\000SHL16r1\000SHL16rCL\000SHL16ri\000SHL32m1\000SHL32mCL"
- "\000SHL32mi\000SHL32r1\000SHL32rCL\000SHL32ri\000SHL64m1\000SHL64mCL\000"
- "SHL64mi\000SHL64r1\000SHL64rCL\000SHL64ri\000SHL8m1\000SHL8mCL\000SHL8m"
- "i\000SHL8r1\000SHL8rCL\000SHL8ri\000SHLD16mrCL\000SHLD16mri8\000SHLD16r"
- "rCL\000SHLD16rri8\000SHLD32mrCL\000SHLD32mri8\000SHLD32rrCL\000SHLD32rr"
- "i8\000SHLD64mrCL\000SHLD64mri8\000SHLD64rrCL\000SHLD64rri8\000SHR16m1\000"
- "SHR16mCL\000SHR16mi\000SHR16r1\000SHR16rCL\000SHR16ri\000SHR32m1\000SHR"
- "32mCL\000SHR32mi\000SHR32r1\000SHR32rCL\000SHR32ri\000SHR64m1\000SHR64m"
- "CL\000SHR64mi\000SHR64r1\000SHR64rCL\000SHR64ri\000SHR8m1\000SHR8mCL\000"
- "SHR8mi\000SHR8r1\000SHR8rCL\000SHR8ri\000SHRD16mrCL\000SHRD16mri8\000SH"
- "RD16rrCL\000SHRD16rri8\000SHRD32mrCL\000SHRD32mri8\000SHRD32rrCL\000SHR"
- "D32rri8\000SHRD64mrCL\000SHRD64mri8\000SHRD64rrCL\000SHRD64rri8\000SHUF"
- "PDrmi\000SHUFPDrri\000SHUFPSrmi\000SHUFPSrri\000SIDTm\000SIN_F\000SIN_F"
- "p32\000SIN_Fp64\000SIN_Fp80\000SLDT16m\000SLDT16r\000SLDT64m\000SLDT64r"
- "\000SMSW16m\000SMSW16r\000SMSW32r\000SMSW64r\000SQRTPDm\000SQRTPDm_Int\000"
- "SQRTPDr\000SQRTPDr_Int\000SQRTPSm\000SQRTPSm_Int\000SQRTPSr\000SQRTPSr_"
- "Int\000SQRTSDm\000SQRTSDm_Int\000SQRTSDr\000SQRTSDr_Int\000SQRTSSm\000S"
- "QRTSSm_Int\000SQRTSSr\000SQRTSSr_Int\000SQRT_F\000SQRT_Fp32\000SQRT_Fp6"
- "4\000SQRT_Fp80\000SS_PREFIX\000STC\000STD\000STI\000STMXCSR\000STOSB\000"
- "STOSD\000STOSW\000STRm\000STRr\000ST_F32m\000ST_F64m\000ST_FP32m\000ST_"
- "FP64m\000ST_FP80m\000ST_FPrr\000ST_Fp32m\000ST_Fp64m\000ST_Fp64m32\000S"
- "T_Fp80m32\000ST_Fp80m64\000ST_FpP32m\000ST_FpP64m\000ST_FpP64m32\000ST_"
- "FpP80m\000ST_FpP80m32\000ST_FpP80m64\000ST_Frr\000SUB16i16\000SUB16mi\000"
- "SUB16mi8\000SUB16mr\000SUB16ri\000SUB16ri8\000SUB16rm\000SUB16rr\000SUB"
- "16rr_REV\000SUB32i32\000SUB32mi\000SUB32mi8\000SUB32mr\000SUB32ri\000SU"
- "B32ri8\000SUB32rm\000SUB32rr\000SUB32rr_REV\000SUB64i32\000SUB64mi32\000"
- "SUB64mi8\000SUB64mr\000SUB64ri32\000SUB64ri8\000SUB64rm\000SUB64rr\000S"
- "UB64rr_REV\000SUB8i8\000SUB8mi\000SUB8mr\000SUB8ri\000SUB8rm\000SUB8rr\000"
- "SUB8rr_REV\000SUBPDrm\000SUBPDrr\000SUBPSrm\000SUBPSrr\000SUBR_F32m\000"
- "SUBR_F64m\000SUBR_FI16m\000SUBR_FI32m\000SUBR_FPrST0\000SUBR_FST0r\000S"
- "UBR_Fp32m\000SUBR_Fp64m\000SUBR_Fp64m32\000SUBR_Fp80m32\000SUBR_Fp80m64"
- "\000SUBR_FpI16m32\000SUBR_FpI16m64\000SUBR_FpI16m80\000SUBR_FpI32m32\000"
- "SUBR_FpI32m64\000SUBR_FpI32m80\000SUBR_FrST0\000SUBSDrm\000SUBSDrm_Int\000"
- "SUBSDrr\000SUBSDrr_Int\000SUBSSrm\000SUBSSrm_Int\000SUBSSrr\000SUBSSrr_"
- "Int\000SUB_F32m\000SUB_F64m\000SUB_FI16m\000SUB_FI32m\000SUB_FPrST0\000"
- "SUB_FST0r\000SUB_Fp32\000SUB_Fp32m\000SUB_Fp64\000SUB_Fp64m\000SUB_Fp64"
- "m32\000SUB_Fp80\000SUB_Fp80m32\000SUB_Fp80m64\000SUB_FpI16m32\000SUB_Fp"
- "I16m64\000SUB_FpI16m80\000SUB_FpI32m32\000SUB_FpI32m64\000SUB_FpI32m80\000"
- "SUB_FrST0\000SWAPGS\000SYSCALL\000SYSENTER\000SYSEXIT\000SYSEXIT64\000S"
- "YSRET\000TAILJMPd\000TAILJMPm\000TAILJMPr\000TAILJMPr64\000TCRETURNdi\000"
- "TCRETURNdi64\000TCRETURNri\000TCRETURNri64\000TEST16i16\000TEST16mi\000"
- "TEST16ri\000TEST16rm\000TEST16rr\000TEST32i32\000TEST32mi\000TEST32ri\000"
- "TEST32rm\000TEST32rr\000TEST64i32\000TEST64mi32\000TEST64ri32\000TEST64"
- "rm\000TEST64rr\000TEST8i8\000TEST8mi\000TEST8ri\000TEST8rm\000TEST8rr\000"
- "TLS_addr32\000TLS_addr64\000TRAP\000TST_F\000TST_Fp32\000TST_Fp64\000TS"
- "T_Fp80\000UCOMISDrm\000UCOMISDrr\000UCOMISSrm\000UCOMISSrr\000UCOM_FIPr"
- "\000UCOM_FIr\000UCOM_FPPr\000UCOM_FPr\000UCOM_FpIr32\000UCOM_FpIr64\000"
- "UCOM_FpIr80\000UCOM_Fpr32\000UCOM_Fpr64\000UCOM_Fpr80\000UCOM_Fr\000UNP"
- "CKHPDrm\000UNPCKHPDrr\000UNPCKHPSrm\000UNPCKHPSrr\000UNPCKLPDrm\000UNPC"
- "KLPDrr\000UNPCKLPSrm\000UNPCKLPSrr\000VASTART_SAVE_XMM_REGS\000VERRm\000"
- "VERRr\000VERWm\000VERWr\000VMCALL\000VMCLEARm\000VMLAUNCH\000VMPTRLDm\000"
- "VMPTRSTm\000VMREAD32rm\000VMREAD32rr\000VMREAD64rm\000VMREAD64rr\000VMR"
- "ESUME\000VMWRITE32rm\000VMWRITE32rr\000VMWRITE64rm\000VMWRITE64rr\000VM"
- "XOFF\000VMXON\000V_SET0\000V_SETALLONES\000WAIT\000WBINVD\000WINCALL64m"
- "\000WINCALL64pcrel32\000WINCALL64r\000WRMSR\000XADD16rm\000XADD16rr\000"
- "XADD32rm\000XADD32rr\000XADD64rm\000XADD64rr\000XADD8rm\000XADD8rr\000X"
- "CHG16ar\000XCHG16rm\000XCHG16rr\000XCHG32ar\000XCHG32rm\000XCHG32rr\000"
- "XCHG64ar\000XCHG64rm\000XCHG64rr\000XCHG8rm\000XCHG8rr\000XCH_F\000XLAT"
- "\000XOR16i16\000XOR16mi\000XOR16mi8\000XOR16mr\000XOR16ri\000XOR16ri8\000"
- "XOR16rm\000XOR16rr\000XOR16rr_REV\000XOR32i32\000XOR32mi\000XOR32mi8\000"
- "XOR32mr\000XOR32ri\000XOR32ri8\000XOR32rm\000XOR32rr\000XOR32rr_REV\000"
- "XOR64i32\000XOR64mi32\000XOR64mi8\000XOR64mr\000XOR64ri32\000XOR64ri8\000"
- "XOR64rm\000XOR64rr\000XOR64rr_REV\000XOR8i8\000XOR8mi\000XOR8mr\000XOR8"
- "ri\000XOR8rm\000XOR8rr\000XOR8rr_REV\000XORPDrm\000XORPDrr\000XORPSrm\000"
- "XORPSrr\000";
- return Strs+InstAsmOffset[Opcode];
-}
-
-#endif
diff --git a/libclamav/c++/X86GenAsmWriter1.inc b/libclamav/c++/X86GenAsmWriter1.inc
deleted file mode 100644
index 22a3e54..0000000
--- a/libclamav/c++/X86GenAsmWriter1.inc
+++ /dev/null
@@ -1,4016 +0,0 @@
-//===- TableGen'erated file -------------------------------------*- C++ -*-===//
-//
-// Assembly Writer Source Fragment
-//
-// Automatically generated file, do not edit!
-//
-//===----------------------------------------------------------------------===//
-
-/// printInstruction - This method is automatically generated by tablegen
-/// from the instruction set description.
-void X86IntelInstPrinter::printInstruction(const MachineInstr *MI) {
- static const unsigned OpInfo[] = {
- 0U, // PHI
- 0U, // INLINEASM
- 0U, // DBG_LABEL
- 0U, // EH_LABEL
- 0U, // GC_LABEL
- 0U, // KILL
- 0U, // EXTRACT_SUBREG
- 0U, // INSERT_SUBREG
- 0U, // IMPLICIT_DEF
- 0U, // SUBREG_TO_REG
- 0U, // COPY_TO_REGCLASS
- 1U, // DBG_VALUE
- 11U, // ABS_F
- 0U, // ABS_Fp32
- 0U, // ABS_Fp64
- 0U, // ABS_Fp80
- 134217744U, // ADC16i16
- 272629786U, // ADC16mi
- 272629786U, // ADC16mi8
- 272629786U, // ADC16mr
- 138543130U, // ADC16ri
- 138543130U, // ADC16ri8
- 138674202U, // ADC16rm
- 138543130U, // ADC16rr
- 138543130U, // ADC16rr_REV
- 134217759U, // ADC32i32
- 406847514U, // ADC32mi
- 406847514U, // ADC32mi8
- 406847514U, // ADC32mr
- 138543130U, // ADC32ri
- 138543130U, // ADC32ri8
- 138805274U, // ADC32rm
- 138543130U, // ADC32rr
- 138543130U, // ADC32rr_REV
- 134217770U, // ADC64i32
- 541065242U, // ADC64mi32
- 541065242U, // ADC64mi8
- 541065242U, // ADC64mr
- 138543130U, // ADC64ri32
- 138543130U, // ADC64ri8
- 138936346U, // ADC64rm
- 138543130U, // ADC64rr
- 138543130U, // ADC64rr_REV
- 134217781U, // ADC8i8
- 675282970U, // ADC8mi
- 675282970U, // ADC8mr
- 138543130U, // ADC8ri
- 139067418U, // ADC8rm
- 138543130U, // ADC8rr
- 138543130U, // ADC8rr_REV
- 134217791U, // ADD16i16
- 272629833U, // ADD16mi
- 272629833U, // ADD16mi8
- 272629833U, // ADD16mr
- 138543177U, // ADD16mrmrr
- 138543177U, // ADD16ri
- 138543177U, // ADD16ri8
- 138674249U, // ADD16rm
- 138543177U, // ADD16rr
- 134217806U, // ADD32i32
- 406847561U, // ADD32mi
- 406847561U, // ADD32mi8
- 406847561U, // ADD32mr
- 138543177U, // ADD32mrmrr
- 138543177U, // ADD32ri
- 138543177U, // ADD32ri8
- 138805321U, // ADD32rm
- 138543177U, // ADD32rr
- 134217817U, // ADD64i32
- 541065289U, // ADD64mi32
- 541065289U, // ADD64mi8
- 541065289U, // ADD64mr
- 138543177U, // ADD64mrmrr
- 138543177U, // ADD64ri32
- 138543177U, // ADD64ri8
- 138936393U, // ADD64rm
- 138543177U, // ADD64rr
- 134217828U, // ADD8i8
- 675283017U, // ADD8mi
- 675283017U, // ADD8mr
- 138543177U, // ADD8mrmrr
- 138543177U, // ADD8ri
- 139067465U, // ADD8rm
- 138543177U, // ADD8rr
- 139198574U, // ADDPDrm
- 138543214U, // ADDPDrr
- 139198581U, // ADDPSrm
- 138543221U, // ADDPSrr
- 139329660U, // ADDSDrm
- 139329660U, // ADDSDrm_Int
- 138543228U, // ADDSDrr
- 138543228U, // ADDSDrr_Int
- 139460739U, // ADDSSrm
- 139460739U, // ADDSSrm_Int
- 138543235U, // ADDSSrr
- 138543235U, // ADDSSrr_Int
- 139198602U, // ADDSUBPDrm
- 138543242U, // ADDSUBPDrr
- 139198612U, // ADDSUBPSrm
- 138543252U, // ADDSUBPSrr
- 805306526U, // ADD_F32m
- 939524254U, // ADD_F64m
- 268435620U, // ADD_FI16m
- 402653348U, // ADD_FI32m
- 134217899U, // ADD_FPrST0
- 134217886U, // ADD_FST0r
- 0U, // ADD_Fp32
- 0U, // ADD_Fp32m
- 0U, // ADD_Fp64
- 0U, // ADD_Fp64m
- 0U, // ADD_Fp64m32
- 0U, // ADD_Fp80
- 0U, // ADD_Fp80m32
- 0U, // ADD_Fp80m64
- 0U, // ADD_FpI16m32
- 0U, // ADD_FpI16m64
- 0U, // ADD_FpI16m80
- 0U, // ADD_FpI32m32
- 0U, // ADD_FpI32m64
- 0U, // ADD_FpI32m80
- 142606494U, // ADD_FrST0
- 178U, // ADJCALLSTACKDOWN32
- 178U, // ADJCALLSTACKDOWN64
- 196U, // ADJCALLSTACKUP32
- 196U, // ADJCALLSTACKUP64
- 134217940U, // AND16i16
- 272629982U, // AND16mi
- 272629982U, // AND16mi8
- 272629982U, // AND16mr
- 138543326U, // AND16ri
- 138543326U, // AND16ri8
- 138674398U, // AND16rm
- 138543326U, // AND16rr
- 138543326U, // AND16rr_REV
- 134217955U, // AND32i32
- 406847710U, // AND32mi
- 406847710U, // AND32mi8
- 406847710U, // AND32mr
- 138543326U, // AND32ri
- 138543326U, // AND32ri8
- 138805470U, // AND32rm
- 138543326U, // AND32rr
- 138543326U, // AND32rr_REV
- 134217966U, // AND64i32
- 541065438U, // AND64mi32
- 541065438U, // AND64mi8
- 541065438U, // AND64mr
- 138543326U, // AND64ri32
- 138543326U, // AND64ri8
- 138936542U, // AND64rm
- 138543326U, // AND64rr
- 138543326U, // AND64rr_REV
- 134217977U, // AND8i8
- 675283166U, // AND8mi
- 675283166U, // AND8mr
- 138543326U, // AND8ri
- 139067614U, // AND8rm
- 138543326U, // AND8rr
- 138543326U, // AND8rr_REV
- 139198723U, // ANDNPDrm
- 138543363U, // ANDNPDrr
- 139198731U, // ANDNPSrm
- 138543371U, // ANDNPSrr
- 139198739U, // ANDPDrm
- 138543379U, // ANDPDrr
- 139198746U, // ANDPSrm
- 138543386U, // ANDPSrr
- 289U, // ATOMADD6432
- 310U, // ATOMAND16
- 329U, // ATOMAND32
- 348U, // ATOMAND64
- 367U, // ATOMAND6432
- 388U, // ATOMAND8
- 406U, // ATOMMAX16
- 425U, // ATOMMAX32
- 444U, // ATOMMAX64
- 463U, // ATOMMIN16
- 482U, // ATOMMIN32
- 501U, // ATOMMIN64
- 520U, // ATOMNAND16
- 540U, // ATOMNAND32
- 560U, // ATOMNAND64
- 580U, // ATOMNAND6432
- 602U, // ATOMNAND8
- 621U, // ATOMOR16
- 639U, // ATOMOR32
- 657U, // ATOMOR64
- 675U, // ATOMOR6432
- 695U, // ATOMOR8
- 712U, // ATOMSUB6432
- 733U, // ATOMSWAP6432
- 755U, // ATOMUMAX16
- 775U, // ATOMUMAX32
- 795U, // ATOMUMAX64
- 815U, // ATOMUMIN16
- 835U, // ATOMUMIN32
- 855U, // ATOMUMIN64
- 875U, // ATOMXOR16
- 894U, // ATOMXOR32
- 913U, // ATOMXOR64
- 932U, // ATOMXOR6432
- 953U, // ATOMXOR8
- 139609035U, // BLENDPDrmi
- 138560459U, // BLENDPDrri
- 139609044U, // BLENDPSrmi
- 138560468U, // BLENDPSrri
- 139625437U, // BLENDVPDrm0
- 138576861U, // BLENDVPDrr0
- 139625447U, // BLENDVPSrm0
- 138576871U, // BLENDVPSrr0
- 139723761U, // BSF16rm
- 139854833U, // BSF16rr
- 139985905U, // BSF32rm
- 139854833U, // BSF32rr
- 140116977U, // BSF64rm
- 139854833U, // BSF64rr
- 139723766U, // BSR16rm
- 139854838U, // BSR16rr
- 139985910U, // BSR32rm
- 139854838U, // BSR32rr
- 140116982U, // BSR64rm
- 139854838U, // BSR64rr
- 134218747U, // BSWAP32r
- 134218747U, // BSWAP64r
- 272630786U, // BT16mi8
- 272630786U, // BT16mr
- 139854850U, // BT16ri8
- 139854850U, // BT16rr
- 406848514U, // BT32mi8
- 406848514U, // BT32mr
- 139854850U, // BT32ri8
- 139854850U, // BT32rr
- 541066242U, // BT64mi8
- 541066242U, // BT64mr
- 139854850U, // BT64ri8
- 139854850U, // BT64rr
- 272630790U, // BTC16mi8
- 272630790U, // BTC16mr
- 139854854U, // BTC16ri8
- 139854854U, // BTC16rr
- 406848518U, // BTC32mi8
- 406848518U, // BTC32mr
- 139854854U, // BTC32ri8
- 139854854U, // BTC32rr
- 541066246U, // BTC64mi8
- 541066246U, // BTC64mr
- 139854854U, // BTC64ri8
- 139854854U, // BTC64rr
- 272630795U, // BTR16mi8
- 272630795U, // BTR16mr
- 139854859U, // BTR16ri8
- 139854859U, // BTR16rr
- 406848523U, // BTR32mi8
- 406848523U, // BTR32mr
- 139854859U, // BTR32ri8
- 139854859U, // BTR32rr
- 541066251U, // BTR64mi8
- 541066251U, // BTR64mr
- 139854859U, // BTR64ri8
- 139854859U, // BTR64rr
- 272630800U, // BTS16mi8
- 272630800U, // BTS16mr
- 139854864U, // BTS16ri8
- 139854864U, // BTS16rr
- 406848528U, // BTS32mi8
- 406848528U, // BTS32mr
- 139854864U, // BTS32ri8
- 139854864U, // BTS32rr
- 541066256U, // BTS64mi8
- 541066256U, // BTS64mr
- 139854864U, // BTS64ri8
- 139854864U, // BTS64rr
- 402654229U, // CALL32m
- 134218773U, // CALL32r
- 536871957U, // CALL64m
- 1073742869U, // CALL64pcrel32
- 134218773U, // CALL64r
- 1073742869U, // CALLpcrel32
- 1051U, // CBW
- 1055U, // CDQ
- 1059U, // CDQE
- 1064U, // CHS_F
- 0U, // CHS_Fp32
- 0U, // CHS_Fp64
- 0U, // CHS_Fp80
- 1069U, // CLC
- 1073U, // CLD
- 671089717U, // CLFLUSH
- 1086U, // CLI
- 1090U, // CLTS
- 1095U, // CMC
- 138675275U, // CMOVA16rm
- 138544203U, // CMOVA16rr
- 138806347U, // CMOVA32rm
- 138544203U, // CMOVA32rr
- 138937419U, // CMOVA64rm
- 138544203U, // CMOVA64rr
- 138675282U, // CMOVAE16rm
- 138544210U, // CMOVAE16rr
- 138806354U, // CMOVAE32rm
- 138544210U, // CMOVAE32rr
- 138937426U, // CMOVAE64rm
- 138544210U, // CMOVAE64rr
- 138675290U, // CMOVB16rm
- 138544218U, // CMOVB16rr
- 138806362U, // CMOVB32rm
- 138544218U, // CMOVB32rr
- 138937434U, // CMOVB64rm
- 138544218U, // CMOVB64rr
- 138675297U, // CMOVBE16rm
- 138544225U, // CMOVBE16rr
- 138806369U, // CMOVBE32rm
- 138544225U, // CMOVBE32rr
- 138937441U, // CMOVBE64rm
- 138544225U, // CMOVBE64rr
- 134218857U, // CMOVBE_F
- 0U, // CMOVBE_Fp32
- 0U, // CMOVBE_Fp64
- 0U, // CMOVBE_Fp80
- 134218874U, // CMOVB_F
- 0U, // CMOVB_Fp32
- 0U, // CMOVB_Fp64
- 0U, // CMOVB_Fp80
- 138675338U, // CMOVE16rm
- 138544266U, // CMOVE16rr
- 138806410U, // CMOVE32rm
- 138544266U, // CMOVE32rr
- 138937482U, // CMOVE64rm
- 138544266U, // CMOVE64rr
- 134218897U, // CMOVE_F
- 0U, // CMOVE_Fp32
- 0U, // CMOVE_Fp64
- 0U, // CMOVE_Fp80
- 138675361U, // CMOVG16rm
- 138544289U, // CMOVG16rr
- 138806433U, // CMOVG32rm
- 138544289U, // CMOVG32rr
- 138937505U, // CMOVG64rm
- 138544289U, // CMOVG64rr
- 138675368U, // CMOVGE16rm
- 138544296U, // CMOVGE16rr
- 138806440U, // CMOVGE32rm
- 138544296U, // CMOVGE32rr
- 138937512U, // CMOVGE64rm
- 138544296U, // CMOVGE64rr
- 138675376U, // CMOVL16rm
- 138544304U, // CMOVL16rr
- 138806448U, // CMOVL32rm
- 138544304U, // CMOVL32rr
- 138937520U, // CMOVL64rm
- 138544304U, // CMOVL64rr
- 138675383U, // CMOVLE16rm
- 138544311U, // CMOVLE16rr
- 138806455U, // CMOVLE32rm
- 138544311U, // CMOVLE32rr
- 138937527U, // CMOVLE64rm
- 138544311U, // CMOVLE64rr
- 134218943U, // CMOVNBE_F
- 0U, // CMOVNBE_Fp32
- 0U, // CMOVNBE_Fp64
- 0U, // CMOVNBE_Fp80
- 134218961U, // CMOVNB_F
- 0U, // CMOVNB_Fp32
- 0U, // CMOVNB_Fp64
- 0U, // CMOVNB_Fp80
- 138675426U, // CMOVNE16rm
- 138544354U, // CMOVNE16rr
- 138806498U, // CMOVNE32rm
- 138544354U, // CMOVNE32rr
- 138937570U, // CMOVNE64rm
- 138544354U, // CMOVNE64rr
- 134218986U, // CMOVNE_F
- 0U, // CMOVNE_Fp32
- 0U, // CMOVNE_Fp64
- 0U, // CMOVNE_Fp80
- 138675451U, // CMOVNO16rm
- 138544379U, // CMOVNO16rr
- 138806523U, // CMOVNO32rm
- 138544379U, // CMOVNO32rr
- 138937595U, // CMOVNO64rm
- 138544379U, // CMOVNO64rr
- 138675459U, // CMOVNP16rm
- 138544387U, // CMOVNP16rr
- 138806531U, // CMOVNP32rm
- 138544387U, // CMOVNP32rr
- 138937603U, // CMOVNP64rm
- 138544387U, // CMOVNP64rr
- 134219019U, // CMOVNP_F
- 0U, // CMOVNP_Fp32
- 0U, // CMOVNP_Fp64
- 0U, // CMOVNP_Fp80
- 138675484U, // CMOVNS16rm
- 138544412U, // CMOVNS16rr
- 138806556U, // CMOVNS32rm
- 138544412U, // CMOVNS32rr
- 138937628U, // CMOVNS64rm
- 138544412U, // CMOVNS64rr
- 138675492U, // CMOVO16rm
- 138544420U, // CMOVO16rr
- 138806564U, // CMOVO32rm
- 138544420U, // CMOVO32rr
- 138937636U, // CMOVO64rm
- 138544420U, // CMOVO64rr
- 138675499U, // CMOVP16rm
- 138544427U, // CMOVP16rr
- 138806571U, // CMOVP32rm
- 138544427U, // CMOVP32rr
- 138937643U, // CMOVP64rm
- 138544427U, // CMOVP64rr
- 134219058U, // CMOVP_F
- 0U, // CMOVP_Fp32
- 0U, // CMOVP_Fp64
- 0U, // CMOVP_Fp80
- 138675523U, // CMOVS16rm
- 138544451U, // CMOVS16rr
- 138806595U, // CMOVS32rm
- 138544451U, // CMOVS32rr
- 138937667U, // CMOVS64rm
- 138544451U, // CMOVS64rr
- 1354U, // CMOV_FR32
- 1373U, // CMOV_FR64
- 1392U, // CMOV_GR8
- 1410U, // CMOV_V1I64
- 1430U, // CMOV_V2F64
- 1450U, // CMOV_V2I64
- 1470U, // CMOV_V4F32
- 134219218U, // CMP16i16
- 272631260U, // CMP16mi
- 272631260U, // CMP16mi8
- 272631260U, // CMP16mr
- 139855324U, // CMP16mrmrr
- 139855324U, // CMP16ri
- 139855324U, // CMP16ri8
- 139724252U, // CMP16rm
- 139855324U, // CMP16rr
- 134219233U, // CMP32i32
- 406848988U, // CMP32mi
- 406848988U, // CMP32mi8
- 406848988U, // CMP32mr
- 139855324U, // CMP32mrmrr
- 139855324U, // CMP32ri
- 139855324U, // CMP32ri8
- 139986396U, // CMP32rm
- 139855324U, // CMP32rr
- 134219244U, // CMP64i32
- 541066716U, // CMP64mi32
- 541066716U, // CMP64mi8
- 541066716U, // CMP64mr
- 139855324U, // CMP64mrmrr
- 139855324U, // CMP64ri32
- 139855324U, // CMP64ri8
- 140117468U, // CMP64rm
- 139855324U, // CMP64rr
- 134219255U, // CMP8i8
- 675284444U, // CMP8mi
- 675284444U, // CMP8mr
- 139855324U, // CMP8mrmrr
- 139855324U, // CMP8ri
- 140248540U, // CMP8rm
- 139855324U, // CMP8rr
- 1221330433U, // CMPPDrmi
- 1354892801U, // CMPPDrri
- 1225524737U, // CMPPSrmi
- 1359087105U, // CMPPSrri
- 1541U, // CMPS16
- 1541U, // CMPS32
- 1541U, // CMPS64
- 1541U, // CMPS8
- 1229850113U, // CMPSDrm
- 1363281409U, // CMPSDrr
- 1234175489U, // CMPSSrm
- 1367475713U, // CMPSSrr
- 1476396554U, // CMPXCHG16B
- 272631318U, // CMPXCHG16rm
- 139855382U, // CMPXCHG16rr
- 406849046U, // CMPXCHG32rm
- 139855382U, // CMPXCHG32rr
- 541066774U, // CMPXCHG64rm
- 139855382U, // CMPXCHG64rr
- 536872479U, // CMPXCHG8B
- 675284502U, // CMPXCHG8rm
- 139855382U, // CMPXCHG8rr
- 140379690U, // COMISDrm
- 139855402U, // COMISDrr
- 140379698U, // COMISSrm
- 139855410U, // COMISSrr
- 134219322U, // COMP_FST0r
- 134219329U, // COM_FIPr
- 134219345U, // COM_FIr
- 134219360U, // COM_FST0r
- 1638U, // COS_F
- 0U, // COS_Fp32
- 0U, // COS_Fp64
- 0U, // COS_Fp80
- 1643U, // CPUID
- 1649U, // CQO
- 1639974517U, // CRC32m16
- 1644168821U, // CRC32m32
- 1648363125U, // CRC32m8
- 1652557429U, // CRC32r16
- 1652557429U, // CRC32r32
- 1652557429U, // CRC32r8
- 1656751733U, // CRC64m64
- 1652557429U, // CRC64r64
- 1661U, // CS_PREFIX
- 140379776U, // CVTDQ2PDrm
- 139855488U, // CVTDQ2PDrr
- 140379786U, // CVTDQ2PSrm
- 139855498U, // CVTDQ2PSrr
- 140379796U, // CVTPD2DQrm
- 139855508U, // CVTPD2DQrr
- 140379806U, // CVTPD2PSrm
- 139855518U, // CVTPD2PSrr
- 140379816U, // CVTPS2DQrm
- 139855528U, // CVTPS2DQrr
- 140510898U, // CVTPS2PDrm
- 139855538U, // CVTPS2PDrr
- 140510908U, // CVTSD2SI64rm
- 139855548U, // CVTSD2SI64rr
- 140510918U, // CVTSD2SSrm
- 139855558U, // CVTSD2SSrr
- 140117712U, // CVTSI2SD64rm
- 139855568U, // CVTSI2SD64rr
- 139986640U, // CVTSI2SDrm
- 139855568U, // CVTSI2SDrr
- 140117722U, // CVTSI2SS64rm
- 139855578U, // CVTSI2SS64rr
- 139986650U, // CVTSI2SSrm
- 139855578U, // CVTSI2SSrr
- 140642020U, // CVTSS2SDrm
- 139855588U, // CVTSS2SDrr
- 140642030U, // CVTSS2SI64rm
- 139855598U, // CVTSS2SI64rr
- 140642030U, // CVTSS2SIrm
- 139855598U, // CVTSS2SIrr
- 140379896U, // CVTTPS2DQrm
- 139855608U, // CVTTPS2DQrr
- 140510979U, // CVTTSD2SI64rm
- 139855619U, // CVTTSD2SI64rr
- 140510979U, // CVTTSD2SIrm
- 139855619U, // CVTTSD2SIrr
- 140642062U, // CVTTSS2SI64rm
- 139855630U, // CVTTSS2SI64rr
- 140642062U, // CVTTSS2SIrm
- 139855630U, // CVTTSS2SIrr
- 1817U, // CWD
- 1821U, // CWDE
- 268437282U, // DEC16m
- 134219554U, // DEC16r
- 402655010U, // DEC32m
- 134219554U, // DEC32r
- 268437282U, // DEC64_16m
- 134219554U, // DEC64_16r
- 402655010U, // DEC64_32m
- 134219554U, // DEC64_32r
- 536872738U, // DEC64m
- 134219554U, // DEC64r
- 671090466U, // DEC8m
- 134219554U, // DEC8r
- 268437287U, // DIV16m
- 134219559U, // DIV16r
- 402655015U, // DIV32m
- 134219559U, // DIV32r
- 536872743U, // DIV64m
- 134219559U, // DIV64r
- 671090471U, // DIV8m
- 134219559U, // DIV8r
- 139200300U, // DIVPDrm
- 138544940U, // DIVPDrr
- 139200307U, // DIVPSrm
- 138544947U, // DIVPSrr
- 805308218U, // DIVR_F32m
- 939525946U, // DIVR_F64m
- 268437313U, // DIVR_FI16m
- 402655041U, // DIVR_FI32m
- 134219593U, // DIVR_FPrST0
- 134219578U, // DIVR_FST0r
- 0U, // DIVR_Fp32m
- 0U, // DIVR_Fp64m
- 0U, // DIVR_Fp64m32
- 0U, // DIVR_Fp80m32
- 0U, // DIVR_Fp80m64
- 0U, // DIVR_FpI16m32
- 0U, // DIVR_FpI16m64
- 0U, // DIVR_FpI16m80
- 0U, // DIVR_FpI32m32
- 0U, // DIVR_FpI32m64
- 0U, // DIVR_FpI32m80
- 142608186U, // DIVR_FrST0
- 139331409U, // DIVSDrm
- 139331409U, // DIVSDrm_Int
- 138544977U, // DIVSDrr
- 138544977U, // DIVSDrr_Int
- 139462488U, // DIVSSrm
- 139462488U, // DIVSSrm_Int
- 138544984U, // DIVSSrr
- 138544984U, // DIVSSrr_Int
- 805308255U, // DIV_F32m
- 939525983U, // DIV_F64m
- 268437349U, // DIV_FI16m
- 402655077U, // DIV_FI32m
- 134219628U, // DIV_FPrST0
- 134219615U, // DIV_FST0r
- 0U, // DIV_Fp32
- 0U, // DIV_Fp32m
- 0U, // DIV_Fp64
- 0U, // DIV_Fp64m
- 0U, // DIV_Fp64m32
- 0U, // DIV_Fp80
- 0U, // DIV_Fp80m32
- 0U, // DIV_Fp80m64
- 0U, // DIV_FpI16m32
- 0U, // DIV_FpI16m64
- 0U, // DIV_FpI16m80
- 0U, // DIV_FpI32m32
- 0U, // DIV_FpI32m64
- 0U, // DIV_FpI32m80
- 142608223U, // DIV_FrST0
- 139609971U, // DPPDrmi
- 138561395U, // DPPDrri
- 139609977U, // DPPSrmi
- 138561401U, // DPPSrri
- 1919U, // DS_PREFIX
- 134219650U, // EH_RETURN
- 134219650U, // EH_RETURN64
- 139855769U, // ENTER
- 1952U, // ES_PREFIX
- 809519011U, // EXTRACTPSmr
- 139872163U, // EXTRACTPSrr
- 1966U, // F2XM1
- 139855796U, // FARCALL16i
- 1744832436U, // FARCALL16m
- 139855796U, // FARCALL32i
- 1744832436U, // FARCALL32m
- 1744832436U, // FARCALL64
- 139855803U, // FARJMP16i
- 1744832443U, // FARJMP16m
- 139855803U, // FARJMP32i
- 1744832443U, // FARJMP32m
- 1744832443U, // FARJMP64
- 805308353U, // FBLDm
- 805308359U, // FBSTPm
- 805308000U, // FCOM32m
- 939525728U, // FCOM64m
- 805307962U, // FCOMP32m
- 939525690U, // FCOMP64m
- 1998U, // FCOMPP
- 2005U, // FDECSTP
- 134219741U, // FFREE
- 268437476U, // FICOM16m
- 402655204U, // FICOM32m
- 268437483U, // FICOMP16m
- 402655211U, // FICOMP32m
- 2035U, // FINCSTP
- 268437499U, // FLDCW16m
- 805308418U, // FLDENVm
- 2058U, // FLDL2E
- 2065U, // FLDL2T
- 2072U, // FLDLG2
- 2079U, // FLDLN2
- 2086U, // FLDPI
- 2092U, // FNCLEX
- 2099U, // FNINIT
- 2106U, // FNOP
- 268437567U, // FNSTCW16m
- 2119U, // FNSTSW8r
- 805308498U, // FNSTSWm
- 2138U, // FP32_TO_INT16_IN_MEM
- 2169U, // FP32_TO_INT32_IN_MEM
- 2200U, // FP32_TO_INT64_IN_MEM
- 2231U, // FP64_TO_INT16_IN_MEM
- 2262U, // FP64_TO_INT32_IN_MEM
- 2293U, // FP64_TO_INT64_IN_MEM
- 2324U, // FP80_TO_INT16_IN_MEM
- 2355U, // FP80_TO_INT32_IN_MEM
- 2386U, // FP80_TO_INT64_IN_MEM
- 2417U, // FPATAN
- 2424U, // FPREM
- 2430U, // FPREM1
- 2437U, // FPTAN
- 2443U, // FP_REG_KILL
- 2457U, // FRNDINT
- 805308833U, // FRSTORm
- 805308841U, // FSAVEm
- 2481U, // FSCALE
- 2488U, // FSINCOS
- 805308864U, // FSTENVm
- 1879050697U, // FS_MOV32rm
- 2515U, // FS_PREFIX
- 2518U, // FXAM
- 1744832987U, // FXRSTOR
- 1744832996U, // FXSAVE
- 2540U, // FXTRACT
- 2548U, // FYL2X
- 2554U, // FYL2XP1
- 0U, // FpGET_ST0_32
- 0U, // FpGET_ST0_64
- 0U, // FpGET_ST0_80
- 0U, // FpGET_ST1_32
- 0U, // FpGET_ST1_64
- 0U, // FpGET_ST1_80
- 0U, // FpSET_ST0_32
- 0U, // FpSET_ST0_64
- 0U, // FpSET_ST0_80
- 0U, // FpSET_ST1_32
- 0U, // FpSET_ST1_64
- 0U, // FpSET_ST1_80
- 139198723U, // FsANDNPDrm
- 138543363U, // FsANDNPDrr
- 139198731U, // FsANDNPSrm
- 138543371U, // FsANDNPSrr
- 139198739U, // FsANDPDrm
- 138543379U, // FsANDPDrr
- 139198746U, // FsANDPSrm
- 138543386U, // FsANDPSrr
- 0U, // FsFLD0SD
- 0U, // FsFLD0SS
- 140380674U, // FsMOVAPDrm
- 139856386U, // FsMOVAPDrr
- 140380682U, // FsMOVAPSrm
- 139856394U, // FsMOVAPSrr
- 139201042U, // FsORPDrm
- 138545682U, // FsORPDrr
- 139201048U, // FsORPSrm
- 138545688U, // FsORPSrr
- 139201054U, // FsXORPDrm
- 138545694U, // FsXORPDrr
- 139201061U, // FsXORPSrm
- 138545701U, // FsXORPSrr
- 1879050796U, // GS_MOV32rm
- 2614U, // GS_PREFIX
- 139201081U, // HADDPDrm
- 138545721U, // HADDPDrr
- 139201089U, // HADDPSrm
- 138545729U, // HADDPSrr
- 2633U, // HLT
- 139201101U, // HSUBPDrm
- 138545741U, // HSUBPDrr
- 139201109U, // HSUBPSrm
- 138545749U, // HSUBPSrr
- 268438109U, // IDIV16m
- 134220381U, // IDIV16r
- 402655837U, // IDIV32m
- 134220381U, // IDIV32r
- 536873565U, // IDIV64m
- 134220381U, // IDIV64r
- 671091293U, // IDIV8m
- 134220381U, // IDIV8r
- 268438115U, // ILD_F16m
- 402655843U, // ILD_F32m
- 536873571U, // ILD_F64m
- 0U, // ILD_Fp16m32
- 0U, // ILD_Fp16m64
- 0U, // ILD_Fp16m80
- 0U, // ILD_Fp32m32
- 0U, // ILD_Fp32m64
- 0U, // ILD_Fp32m80
- 0U, // ILD_Fp64m32
- 0U, // ILD_Fp64m64
- 0U, // ILD_Fp64m80
- 268438121U, // IMUL16m
- 134220393U, // IMUL16r
- 138676841U, // IMUL16rm
- 139741801U, // IMUL16rmi
- 139741801U, // IMUL16rmi8
- 138545769U, // IMUL16rr
- 139872873U, // IMUL16rri
- 139872873U, // IMUL16rri8
- 402655849U, // IMUL32m
- 134220393U, // IMUL32r
- 138807913U, // IMUL32rm
- 140003945U, // IMUL32rmi
- 140003945U, // IMUL32rmi8
- 138545769U, // IMUL32rr
- 139872873U, // IMUL32rri
- 139872873U, // IMUL32rri8
- 536873577U, // IMUL64m
- 134220393U, // IMUL64r
- 138938985U, // IMUL64rm
- 140135017U, // IMUL64rmi32
- 140135017U, // IMUL64rmi8
- 138545769U, // IMUL64rr
- 139872873U, // IMUL64rri32
- 139872873U, // IMUL64rri8
- 671091305U, // IMUL8m
- 134220393U, // IMUL8r
- 2671U, // IN16
- 134220403U, // IN16ri
- 2684U, // IN16rr
- 2671U, // IN32
- 134220424U, // IN32ri
- 2706U, // IN32rr
- 2671U, // IN8
- 134220447U, // IN8ri
- 2728U, // IN8rr
- 268438196U, // INC16m
- 134220468U, // INC16r
- 402655924U, // INC32m
- 134220468U, // INC32r
- 268438196U, // INC64_16m
- 134220468U, // INC64_16r
- 402655924U, // INC64_32m
- 134220468U, // INC64_32r
- 536873652U, // INC64m
- 134220468U, // INC64r
- 671091380U, // INC8m
- 134220468U, // INC8r
- 139479737U, // INSERTPSrm
- 138562233U, // INSERTPSrr
- 134220483U, // INT
- 2760U, // INT3
- 2766U, // INVD
- 2771U, // INVEPT
- 671091418U, // INVLPG
- 2786U, // INVVPID
- 2794U, // IRET16
- 2794U, // IRET32
- 2794U, // IRET64
- 268438255U, // ISTT_FP16m
- 402655983U, // ISTT_FP32m
- 536873711U, // ISTT_FP64m
- 0U, // ISTT_Fp16m32
- 0U, // ISTT_Fp16m64
- 0U, // ISTT_Fp16m80
- 0U, // ISTT_Fp32m32
- 0U, // ISTT_Fp32m64
- 0U, // ISTT_Fp32m80
- 0U, // ISTT_Fp64m32
- 0U, // ISTT_Fp64m64
- 0U, // ISTT_Fp64m80
- 268438263U, // IST_F16m
- 402655991U, // IST_F32m
- 268438269U, // IST_FP16m
- 402655997U, // IST_FP32m
- 536873725U, // IST_FP64m
- 0U, // IST_Fp16m32
- 0U, // IST_Fp16m64
- 0U, // IST_Fp16m80
- 0U, // IST_Fp32m32
- 0U, // IST_Fp32m64
- 0U, // IST_Fp32m80
- 0U, // IST_Fp64m32
- 0U, // IST_Fp64m64
- 0U, // IST_Fp64m80
- 1229850113U, // Int_CMPSDrm
- 1363281409U, // Int_CMPSDrr
- 1234175489U, // Int_CMPSSrm
- 1367475713U, // Int_CMPSSrr
- 140379690U, // Int_COMISDrm
- 139855402U, // Int_COMISDrr
- 140379698U, // Int_COMISSrm
- 139855410U, // Int_COMISSrr
- 140117632U, // Int_CVTDQ2PDrm
- 139855488U, // Int_CVTDQ2PDrr
- 140773002U, // Int_CVTDQ2PSrm
- 139855498U, // Int_CVTDQ2PSrr
- 140379796U, // Int_CVTPD2DQrm
- 139855508U, // Int_CVTPD2DQrr
- 140380932U, // Int_CVTPD2PIrm
- 139856644U, // Int_CVTPD2PIrr
- 140379806U, // Int_CVTPD2PSrm
- 139855518U, // Int_CVTPD2PSrr
- 140118798U, // Int_CVTPI2PDrm
- 139856654U, // Int_CVTPI2PDrr
- 138939160U, // Int_CVTPI2PSrm
- 138545944U, // Int_CVTPI2PSrr
- 140379816U, // Int_CVTPS2DQrm
- 139855528U, // Int_CVTPS2DQrr
- 140510898U, // Int_CVTPS2PDrm
- 139855538U, // Int_CVTPS2PDrr
- 140512034U, // Int_CVTPS2PIrm
- 139856674U, // Int_CVTPS2PIrr
- 140379836U, // Int_CVTSD2SI64rm
- 139855548U, // Int_CVTSD2SI64rr
- 140379836U, // Int_CVTSD2SIrm
- 139855548U, // Int_CVTSD2SIrr
- 139331270U, // Int_CVTSD2SSrm
- 138544838U, // Int_CVTSD2SSrr
- 138938064U, // Int_CVTSI2SD64rm
- 138544848U, // Int_CVTSI2SD64rr
- 138806992U, // Int_CVTSI2SDrm
- 138544848U, // Int_CVTSI2SDrr
- 138938074U, // Int_CVTSI2SS64rm
- 138544858U, // Int_CVTSI2SS64rr
- 138807002U, // Int_CVTSI2SSrm
- 138544858U, // Int_CVTSI2SSrr
- 139462372U, // Int_CVTSS2SDrm
- 138544868U, // Int_CVTSS2SDrr
- 140642030U, // Int_CVTSS2SI64rm
- 139855598U, // Int_CVTSS2SI64rr
- 140642030U, // Int_CVTSS2SIrm
- 139855598U, // Int_CVTSS2SIrr
- 140380972U, // Int_CVTTPD2DQrm
- 139856684U, // Int_CVTTPD2DQrr
- 140380983U, // Int_CVTTPD2PIrm
- 139856695U, // Int_CVTTPD2PIrr
- 140379896U, // Int_CVTTPS2DQrm
- 139855608U, // Int_CVTTPS2DQrr
- 140512066U, // Int_CVTTPS2PIrm
- 139856706U, // Int_CVTTPS2PIrr
- 140379907U, // Int_CVTTSD2SI64rm
- 139855619U, // Int_CVTTSD2SI64rr
- 140379907U, // Int_CVTTSD2SIrm
- 139855619U, // Int_CVTTSD2SIrr
- 140642062U, // Int_CVTTSS2SI64rm
- 139855630U, // Int_CVTTSS2SI64rr
- 140642062U, // Int_CVTTSS2SIrm
- 139855630U, // Int_CVTTSS2SIrr
- 140381005U, // Int_UCOMISDrm
- 139856717U, // Int_UCOMISDrr
- 140381014U, // Int_UCOMISSrm
- 139856726U, // Int_UCOMISSrr
- 1073744735U, // JAE_1
- 1073744735U, // JAE_4
- 1073744740U, // JA_1
- 1073744740U, // JA_4
- 1073744744U, // JBE_1
- 1073744744U, // JBE_4
- 1073744749U, // JB_1
- 1073744749U, // JB_4
- 1073744753U, // JCXZ8
- 1073744759U, // JE_1
- 1073744759U, // JE_4
- 1073744763U, // JGE_1
- 1073744763U, // JGE_4
- 1073744768U, // JG_1
- 1073744768U, // JG_4
- 1073744772U, // JLE_1
- 1073744772U, // JLE_4
- 1073744777U, // JL_1
- 1073744777U, // JL_4
- 402656141U, // JMP32m
- 134220685U, // JMP32r
- 536873869U, // JMP64m
- 1073744781U, // JMP64pcrel32
- 134220685U, // JMP64r
- 1073744781U, // JMP_1
- 1073744781U, // JMP_4
- 1073744786U, // JNE_1
- 1073744786U, // JNE_4
- 1073744791U, // JNO_1
- 1073744791U, // JNO_4
- 1073744796U, // JNP_1
- 1073744796U, // JNP_4
- 1073744801U, // JNS_1
- 1073744801U, // JNS_4
- 1073744806U, // JO_1
- 1073744806U, // JO_4
- 1073744810U, // JP_1
- 1073744810U, // JP_4
- 1073744814U, // JS_1
- 1073744814U, // JS_4
- 2994U, // LAHF
- 139725751U, // LAR16rm
- 139856823U, // LAR16rr
- 139725751U, // LAR32rm
- 139856823U, // LAR32rr
- 139725751U, // LAR64rm
- 139856823U, // LAR64rr
- 272632764U, // LCMPXCHG16
- 406850492U, // LCMPXCHG32
- 2013268939U, // LCMPXCHG64
- 675285948U, // LCMPXCHG8
- 536873947U, // LCMPXCHG8B
- 140774380U, // LDDQUrm
- 402656243U, // LDMXCSR
- 140905468U, // LDS16rm
- 140905468U, // LDS32rm
- 3073U, // LD_F0
- 3078U, // LD_F1
- 805309451U, // LD_F32m
- 939527179U, // LD_F64m
- 2147486731U, // LD_F80m
- 0U, // LD_Fp032
- 0U, // LD_Fp064
- 0U, // LD_Fp080
- 0U, // LD_Fp132
- 0U, // LD_Fp164
- 0U, // LD_Fp180
- 0U, // LD_Fp32m
- 0U, // LD_Fp32m64
- 0U, // LD_Fp32m80
- 0U, // LD_Fp64m
- 0U, // LD_Fp64m80
- 0U, // LD_Fp80m
- 134220811U, // LD_Frr
- 141036560U, // LEA16r
- 141036560U, // LEA32r
- 141167632U, // LEA64_32r
- 141298704U, // LEA64r
- 3093U, // LEAVE
- 3093U, // LEAVE64
- 140905499U, // LES16rm
- 140905499U, // LES32rm
- 3104U, // LFENCE
- 140905511U, // LFS16rm
- 140905511U, // LFS32rm
- 140905511U, // LFS64rm
- 1744833580U, // LGDTm
- 140905522U, // LGS16rm
- 140905522U, // LGS32rm
- 140905522U, // LGS64rm
- 1744833591U, // LIDTm
- 268438589U, // LLDT16m
- 134220861U, // LLDT16r
- 268438595U, // LMSW16m
- 134220867U, // LMSW16r
- 272632905U, // LOCK_ADD16mi
- 272632905U, // LOCK_ADD16mi8
- 272632905U, // LOCK_ADD16mr
- 406850633U, // LOCK_ADD32mi
- 406850633U, // LOCK_ADD32mi8
- 406850633U, // LOCK_ADD32mr
- 541068361U, // LOCK_ADD64mi32
- 541068361U, // LOCK_ADD64mi8
- 541068361U, // LOCK_ADD64mr
- 675286089U, // LOCK_ADD8mi
- 675286089U, // LOCK_ADD8mr
- 268438612U, // LOCK_DEC16m
- 402656340U, // LOCK_DEC32m
- 536874068U, // LOCK_DEC64m
- 671091796U, // LOCK_DEC8m
- 268438623U, // LOCK_INC16m
- 402656351U, // LOCK_INC32m
- 536874079U, // LOCK_INC64m
- 671091807U, // LOCK_INC8m
- 3178U, // LOCK_PREFIX
- 272632943U, // LOCK_SUB16mi
- 272632943U, // LOCK_SUB16mi8
- 272632943U, // LOCK_SUB16mr
- 406850671U, // LOCK_SUB32mi
- 406850671U, // LOCK_SUB32mi8
- 406850671U, // LOCK_SUB32mr
- 541068399U, // LOCK_SUB64mi32
- 541068399U, // LOCK_SUB64mi8
- 541068399U, // LOCK_SUB64mr
- 675286127U, // LOCK_SUB8mi
- 675286127U, // LOCK_SUB8mr
- 3194U, // LODSB
- 3200U, // LODSD
- 3206U, // LODSQ
- 3212U, // LODSW
- 1073745042U, // LOOP
- 1073745048U, // LOOPE
- 1073745055U, // LOOPNE
- 3239U, // LRET
- 134220972U, // LRETI
- 139726002U, // LSL16rm
- 139857074U, // LSL16rr
- 139988146U, // LSL32rm
- 139857074U, // LSL32rr
- 140119218U, // LSL64rm
- 139857074U, // LSL64rr
- 140905655U, // LSS16rm
- 140905655U, // LSS32rm
- 140905655U, // LSS64rm
- 3260U, // LTRm
- 3260U, // LTRr
- 2281704641U, // LXADD16
- 2415922369U, // LXADD32
- 1656753345U, // LXADD64
- 2550140097U, // LXADD8
- 139857101U, // MASKMOVDQU
- 139857101U, // MASKMOVDQU64
- 139201753U, // MAXPDrm
- 139201753U, // MAXPDrm_Int
- 138546393U, // MAXPDrr
- 138546393U, // MAXPDrr_Int
- 139201760U, // MAXPSrm
- 139201760U, // MAXPSrm_Int
- 138546400U, // MAXPSrr
- 138546400U, // MAXPSrr_Int
- 139332839U, // MAXSDrm
- 139332839U, // MAXSDrm_Int
- 138546407U, // MAXSDrr
- 138546407U, // MAXSDrr_Int
- 139463918U, // MAXSSrm
- 139463918U, // MAXSSrm_Int
- 138546414U, // MAXSSrr
- 138546414U, // MAXSSrr_Int
- 3317U, // MFENCE
- 3324U, // MINGW_ALLOCA
- 139201815U, // MINPDrm
- 139201815U, // MINPDrm_Int
- 138546455U, // MINPDrr
- 138546455U, // MINPDrr_Int
- 139201822U, // MINPSrm
- 139201822U, // MINPSrm_Int
- 138546462U, // MINPSrr
- 138546462U, // MINPSrr_Int
- 139332901U, // MINSDrm
- 139332901U, // MINSDrm_Int
- 138546469U, // MINSDrr
- 138546469U, // MINSDrr_Int
- 139463980U, // MINSSrm
- 139463980U, // MINSSrm_Int
- 138546476U, // MINSSrr
- 138546476U, // MINSSrr_Int
- 140380932U, // MMX_CVTPD2PIrm
- 139856644U, // MMX_CVTPD2PIrr
- 140118798U, // MMX_CVTPI2PDrm
- 139856654U, // MMX_CVTPI2PDrr
- 140118808U, // MMX_CVTPI2PSrm
- 139856664U, // MMX_CVTPI2PSrr
- 140512034U, // MMX_CVTPS2PIrm
- 139856674U, // MMX_CVTPS2PIrr
- 140380983U, // MMX_CVTTPD2PIrm
- 139856695U, // MMX_CVTTPD2PIrr
- 140512066U, // MMX_CVTTPS2PIrm
- 139856706U, // MMX_CVTTPS2PIrr
- 3379U, // MMX_EMMS
- 3384U, // MMX_FEMMS
- 139857214U, // MMX_MASKMOVQ
- 139857214U, // MMX_MASKMOVQ64
- 139857224U, // MMX_MOVD64from64rr
- 139857224U, // MMX_MOVD64grr
- 406850888U, // MMX_MOVD64mr
- 139988296U, // MMX_MOVD64rm
- 139857224U, // MMX_MOVD64rr
- 139857224U, // MMX_MOVD64rrv164
- 139857224U, // MMX_MOVD64to64rr
- 139857230U, // MMX_MOVDQ2Qrr
- 541068631U, // MMX_MOVNTQmr
- 139857247U, // MMX_MOVQ2DQrr
- 139857247U, // MMX_MOVQ2FR64rr
- 541068648U, // MMX_MOVQ64gmr
- 541068648U, // MMX_MOVQ64mr
- 140119400U, // MMX_MOVQ64rm
- 139857256U, // MMX_MOVQ64rr
- 139988296U, // MMX_MOVZDI2PDIrm
- 139857224U, // MMX_MOVZDI2PDIrr
- 138939758U, // MMX_PACKSSDWrm
- 138546542U, // MMX_PACKSSDWrr
- 138939768U, // MMX_PACKSSWBrm
- 138546552U, // MMX_PACKSSWBrr
- 138939778U, // MMX_PACKUSWBrm
- 138546562U, // MMX_PACKUSWBrr
- 138939788U, // MMX_PADDBrm
- 138546572U, // MMX_PADDBrr
- 138939795U, // MMX_PADDDrm
- 138546579U, // MMX_PADDDrr
- 138939802U, // MMX_PADDQrm
- 138546586U, // MMX_PADDQrr
- 138939809U, // MMX_PADDSBrm
- 138546593U, // MMX_PADDSBrr
- 138939817U, // MMX_PADDSWrm
- 138546601U, // MMX_PADDSWrr
- 138939825U, // MMX_PADDUSBrm
- 138546609U, // MMX_PADDUSBrr
- 138939834U, // MMX_PADDUSWrm
- 138546618U, // MMX_PADDUSWrr
- 138939843U, // MMX_PADDWrm
- 138546627U, // MMX_PADDWrr
- 138939850U, // MMX_PANDNrm
- 138546634U, // MMX_PANDNrr
- 138939857U, // MMX_PANDrm
- 138546641U, // MMX_PANDrr
- 138939863U, // MMX_PAVGBrm
- 138546647U, // MMX_PAVGBrr
- 138939870U, // MMX_PAVGWrm
- 138546654U, // MMX_PAVGWrr
- 138939877U, // MMX_PCMPEQBrm
- 138546661U, // MMX_PCMPEQBrr
- 138939886U, // MMX_PCMPEQDrm
- 138546670U, // MMX_PCMPEQDrr
- 138939895U, // MMX_PCMPEQWrm
- 138546679U, // MMX_PCMPEQWrr
- 138939904U, // MMX_PCMPGTBrm
- 138546688U, // MMX_PCMPGTBrr
- 138939913U, // MMX_PCMPGTDrm
- 138546697U, // MMX_PCMPGTDrr
- 138939922U, // MMX_PCMPGTWrm
- 138546706U, // MMX_PCMPGTWrr
- 139873819U, // MMX_PEXTRWri
- 138694179U, // MMX_PINSRWrmi
- 138563107U, // MMX_PINSRWrri
- 138939947U, // MMX_PMADDWDrm
- 138546731U, // MMX_PMADDWDrr
- 138939956U, // MMX_PMAXSWrm
- 138546740U, // MMX_PMAXSWrr
- 138939964U, // MMX_PMAXUBrm
- 138546748U, // MMX_PMAXUBrr
- 138939972U, // MMX_PMINSWrm
- 138546756U, // MMX_PMINSWrr
- 138939980U, // MMX_PMINUBrm
- 138546764U, // MMX_PMINUBrr
- 139857492U, // MMX_PMOVMSKBrr
- 138939998U, // MMX_PMULHUWrm
- 138546782U, // MMX_PMULHUWrr
- 138940007U, // MMX_PMULHWrm
- 138546791U, // MMX_PMULHWrr
- 138940015U, // MMX_PMULLWrm
- 138546799U, // MMX_PMULLWrr
- 138940023U, // MMX_PMULUDQrm
- 138546807U, // MMX_PMULUDQrr
- 138940032U, // MMX_PORrm
- 138546816U, // MMX_PORrr
- 138940037U, // MMX_PSADBWrm
- 138546821U, // MMX_PSADBWrr
- 140136077U, // MMX_PSHUFWmi
- 139873933U, // MMX_PSHUFWri
- 138546837U, // MMX_PSLLDri
- 138940053U, // MMX_PSLLDrm
- 138546837U, // MMX_PSLLDrr
- 138546844U, // MMX_PSLLQri
- 138940060U, // MMX_PSLLQrm
- 138546844U, // MMX_PSLLQrr
- 138546851U, // MMX_PSLLWri
- 138940067U, // MMX_PSLLWrm
- 138546851U, // MMX_PSLLWrr
- 138546858U, // MMX_PSRADri
- 138940074U, // MMX_PSRADrm
- 138546858U, // MMX_PSRADrr
- 138546865U, // MMX_PSRAWri
- 138940081U, // MMX_PSRAWrm
- 138546865U, // MMX_PSRAWrr
- 138546872U, // MMX_PSRLDri
- 138940088U, // MMX_PSRLDrm
- 138546872U, // MMX_PSRLDrr
- 138546879U, // MMX_PSRLQri
- 138940095U, // MMX_PSRLQrm
- 138546879U, // MMX_PSRLQrr
- 138546886U, // MMX_PSRLWri
- 138940102U, // MMX_PSRLWrm
- 138546886U, // MMX_PSRLWrr
- 138940109U, // MMX_PSUBBrm
- 138546893U, // MMX_PSUBBrr
- 138940116U, // MMX_PSUBDrm
- 138546900U, // MMX_PSUBDrr
- 138940123U, // MMX_PSUBQrm
- 138546907U, // MMX_PSUBQrr
- 138940130U, // MMX_PSUBSBrm
- 138546914U, // MMX_PSUBSBrr
- 138940138U, // MMX_PSUBSWrm
- 138546922U, // MMX_PSUBSWrr
- 138940146U, // MMX_PSUBUSBrm
- 138546930U, // MMX_PSUBUSBrr
- 138940155U, // MMX_PSUBUSWrm
- 138546939U, // MMX_PSUBUSWrr
- 138940164U, // MMX_PSUBWrm
- 138546948U, // MMX_PSUBWrr
- 138940171U, // MMX_PUNPCKHBWrm
- 138546955U, // MMX_PUNPCKHBWrr
- 138940182U, // MMX_PUNPCKHDQrm
- 138546966U, // MMX_PUNPCKHDQrr
- 138940193U, // MMX_PUNPCKHWDrm
- 138546977U, // MMX_PUNPCKHWDrr
- 138940204U, // MMX_PUNPCKLBWrm
- 138546988U, // MMX_PUNPCKLBWrr
- 138940215U, // MMX_PUNPCKLDQrm
- 138546999U, // MMX_PUNPCKLDQrr
- 138940226U, // MMX_PUNPCKLWDrm
- 138547010U, // MMX_PUNPCKLWDrr
- 138940237U, // MMX_PXORrm
- 138547021U, // MMX_PXORrr
- 0U, // MMX_V_SET0
- 0U, // MMX_V_SETALLONES
- 3923U, // MONITOR
- 1124077403U, // MOV16ao16
- 272633691U, // MOV16mi
- 272633691U, // MOV16mr
- 272633691U, // MOV16ms
- 1073745760U, // MOV16o16a
- 0U, // MOV16r0
- 139857755U, // MOV16ri
- 139726683U, // MOV16rm
- 139857755U, // MOV16rr
- 139857755U, // MOV16rr_REV
- 139857755U, // MOV16rs
- 139726683U, // MOV16sm
- 139857755U, // MOV16sr
- 1128271707U, // MOV32ao32
- 139857755U, // MOV32cr
- 139857755U, // MOV32dr
- 406851419U, // MOV32mi
- 406851419U, // MOV32mr
- 1073745770U, // MOV32o32a
- 0U, // MOV32r0
- 139857755U, // MOV32rc
- 139857755U, // MOV32rd
- 139857755U, // MOV32ri
- 139988827U, // MOV32rm
- 139857755U, // MOV32rr
- 139857755U, // MOV32rr_REV
- 2684358517U, // MOV64FSrm
- 2684358527U, // MOV64GSrm
- 1132466011U, // MOV64ao64
- 1132466011U, // MOV64ao8
- 139857755U, // MOV64cr
- 139857755U, // MOV64dr
- 541069147U, // MOV64mi32
- 541069147U, // MOV64mr
- 541069147U, // MOV64ms
- 1073745801U, // MOV64o64a
- 1073745801U, // MOV64o8a
- 0U, // MOV64r0
- 139857755U, // MOV64rc
- 139857755U, // MOV64rd
- 139857812U, // MOV64ri
- 139857755U, // MOV64ri32
- 0U, // MOV64ri64i32
- 140119899U, // MOV64rm
- 139857755U, // MOV64rr
- 139857755U, // MOV64rr_REV
- 139857755U, // MOV64rs
- 140119899U, // MOV64sm
- 139857755U, // MOV64sr
- 139857256U, // MOV64toPQIrr
- 140119400U, // MOV64toSDrm
- 139857256U, // MOV64toSDrr
- 1136660315U, // MOV8ao8
- 675286875U, // MOV8mi
- 675286875U, // MOV8mr
- 675336027U, // MOV8mr_NOREX
- 1073745820U, // MOV8o8a
- 0U, // MOV8r0
- 139857755U, // MOV8ri
- 140250971U, // MOV8rm
- 140300123U, // MOV8rm_NOREX
- 139857755U, // MOV8rr
- 139906907U, // MOV8rr_NOREX
- 139857755U, // MOV8rr_REV
- 2818574850U, // MOVAPDmr
- 140380674U, // MOVAPDrm
- 139856386U, // MOVAPDrr
- 2818574858U, // MOVAPSmr
- 140380682U, // MOVAPSrm
- 139856394U, // MOVAPSrr
- 140513190U, // MOVDDUPrm
- 139857830U, // MOVDDUPrr
- 139988296U, // MOVDI2PDIrm
- 139857224U, // MOVDI2PDIrr
- 139988296U, // MOVDI2SSrm
- 139857224U, // MOVDI2SSrr
- 1480593327U, // MOVDQAmr
- 140775343U, // MOVDQArm
- 139857839U, // MOVDQArr
- 1480593335U, // MOVDQUmr
- 1480593335U, // MOVDQUmr_Int
- 140775351U, // MOVDQUrm
- 140775351U, // MOVDQUrm_Int
- 138547135U, // MOVHLPSrr
- 943722440U, // MOVHPDmr
- 139333576U, // MOVHPDrm
- 943722448U, // MOVHPSmr
- 139333584U, // MOVHPSrm
- 138547160U, // MOVLHPSrr
- 943722465U, // MOVLPDmr
- 139333601U, // MOVLPDrm
- 943722473U, // MOVLPSmr
- 139333609U, // MOVLPSrm
- 541068648U, // MOVLQ128mr
- 139857905U, // MOVMSKPDrr
- 139857915U, // MOVMSKPSrr
- 140775429U, // MOVNTDQArm
- 2818576399U, // MOVNTDQ_64mr
- 2818576399U, // MOVNTDQmr
- 2818576399U, // MOVNTDQmr_Int
- 541069336U, // MOVNTI_64mr
- 406851608U, // MOVNTImr
- 406851608U, // MOVNTImr_Int
- 2818576416U, // MOVNTPDmr
- 1480593440U, // MOVNTPDmr_Int
- 2818576425U, // MOVNTPSmr
- 1480593449U, // MOVNTPSmr_Int
- 0U, // MOVPC32r
- 406850888U, // MOVPDI2DImr
- 139857224U, // MOVPDI2DIrr
- 541068648U, // MOVPQI2QImr
- 139857256U, // MOVPQIto64rr
- 140119400U, // MOVQI2PQIrm
- 139857256U, // MOVQxrxr
- 4146U, // MOVSB
- 4147U, // MOVSD
- 943722553U, // MOVSDmr
- 140513337U, // MOVSDrm
- 138547257U, // MOVSDrr
- 541068648U, // MOVSDto64mr
- 139857256U, // MOVSDto64rr
- 140382272U, // MOVSHDUPrm
- 139857984U, // MOVSHDUPrr
- 140382282U, // MOVSLDUPrm
- 139857994U, // MOVSLDUPrr
- 406850888U, // MOVSS2DImr
- 139857224U, // MOVSS2DIrr
- 809504852U, // MOVSSmr
- 140644436U, // MOVSSrm
- 138547284U, // MOVSSrr
- 4146U, // MOVSW
- 0U, // MOVSX16rm8
- 140251227U, // MOVSX16rm8W
- 0U, // MOVSX16rr8
- 139858011U, // MOVSX16rr8W
- 139726939U, // MOVSX32rm16
- 140251227U, // MOVSX32rm8
- 139858011U, // MOVSX32rr16
- 139858011U, // MOVSX32rr8
- 139726939U, // MOVSX64rm16
- 139989090U, // MOVSX64rm32
- 140251227U, // MOVSX64rm8
- 139858011U, // MOVSX64rr16
- 139858018U, // MOVSX64rr32
- 139858011U, // MOVSX64rr8
- 2818576490U, // MOVUPDmr
- 2818576490U, // MOVUPDmr_Int
- 140382314U, // MOVUPDrm
- 140382314U, // MOVUPDrm_Int
- 139858026U, // MOVUPDrr
- 2818576498U, // MOVUPSmr
- 2818576498U, // MOVUPSmr_Int
- 140382322U, // MOVUPSrm
- 140382322U, // MOVUPSrm_Int
- 139858034U, // MOVUPSrr
- 139988296U, // MOVZDI2PDIrm
- 139857224U, // MOVZDI2PDIrr
- 140774760U, // MOVZPQILo2PQIrm
- 139857256U, // MOVZPQILo2PQIrr
- 140119400U, // MOVZQI2PQIrm
- 139857256U, // MOVZQI2PQIrr
- 0U, // MOVZX16rm8
- 140251258U, // MOVZX16rm8W
- 0U, // MOVZX16rr8
- 139858042U, // MOVZX16rr8W
- 140300410U, // MOVZX32_NOREXrm8
- 139907194U, // MOVZX32_NOREXrr8
- 139726970U, // MOVZX32rm16
- 140251258U, // MOVZX32rm8
- 139858042U, // MOVZX32rr16
- 139858042U, // MOVZX32rr8
- 0U, // MOVZX64rm16
- 139726970U, // MOVZX64rm16_Q
- 0U, // MOVZX64rm32
- 0U, // MOVZX64rm8
- 140251258U, // MOVZX64rm8_Q
- 0U, // MOVZX64rr16
- 139858042U, // MOVZX64rr16_Q
- 0U, // MOVZX64rr32
- 0U, // MOVZX64rr8
- 139858042U, // MOVZX64rr8_Q
- 0U, // MOV_Fp3232
- 0U, // MOV_Fp3264
- 0U, // MOV_Fp3280
- 0U, // MOV_Fp6432
- 0U, // MOV_Fp6464
- 0U, // MOV_Fp6480
- 0U, // MOV_Fp8032
- 0U, // MOV_Fp8064
- 0U, // MOV_Fp8080
- 139612289U, // MPSADBWrmi
- 138563713U, // MPSADBWrri
- 268439690U, // MUL16m
- 134221962U, // MUL16r
- 402657418U, // MUL32m
- 134221962U, // MUL32r
- 536875146U, // MUL64m
- 134221962U, // MUL64r
- 671092874U, // MUL8m
- 134221962U, // MUL8r
- 139202703U, // MULPDrm
- 138547343U, // MULPDrr
- 139202710U, // MULPSrm
- 138547350U, // MULPSrr
- 139333789U, // MULSDrm
- 139333789U, // MULSDrm_Int
- 138547357U, // MULSDrr
- 138547357U, // MULSDrr_Int
- 139464868U, // MULSSrm
- 139464868U, // MULSSrm_Int
- 138547364U, // MULSSrr
- 138547364U, // MULSSrr_Int
- 805310635U, // MUL_F32m
- 939528363U, // MUL_F64m
- 268439729U, // MUL_FI16m
- 402657457U, // MUL_FI32m
- 134222008U, // MUL_FPrST0
- 134221995U, // MUL_FST0r
- 0U, // MUL_Fp32
- 0U, // MUL_Fp32m
- 0U, // MUL_Fp64
- 0U, // MUL_Fp64m
- 0U, // MUL_Fp64m32
- 0U, // MUL_Fp80
- 0U, // MUL_Fp80m32
- 0U, // MUL_Fp80m64
- 0U, // MUL_FpI16m32
- 0U, // MUL_FpI16m64
- 0U, // MUL_FpI16m80
- 0U, // MUL_FpI32m32
- 0U, // MUL_FpI32m64
- 0U, // MUL_FpI32m80
- 142610603U, // MUL_FrST0
- 4287U, // MWAIT
- 268439749U, // NEG16m
- 134222021U, // NEG16r
- 402657477U, // NEG32m
- 134222021U, // NEG32r
- 536875205U, // NEG64m
- 134222021U, // NEG64r
- 671092933U, // NEG8m
- 134222021U, // NEG8r
- 4298U, // NOOP
- 402657486U, // NOOPL
- 268439758U, // NOOPW
- 268439763U, // NOT16m
- 134222035U, // NOT16r
- 402657491U, // NOT32m
- 134222035U, // NOT32r
- 536875219U, // NOT64m
- 134222035U, // NOT64r
- 671092947U, // NOT8m
- 134222035U, // NOT8r
- 134222040U, // OR16i16
- 272634081U, // OR16mi
- 272634081U, // OR16mi8
- 272634081U, // OR16mr
- 138547425U, // OR16ri
- 138547425U, // OR16ri8
- 138678497U, // OR16rm
- 138547425U, // OR16rr
- 138547425U, // OR16rr_REV
- 134222053U, // OR32i32
- 406851809U, // OR32mi
- 406851809U, // OR32mi8
- 406851809U, // OR32mr
- 138547425U, // OR32ri
- 138547425U, // OR32ri8
- 138809569U, // OR32rm
- 138547425U, // OR32rr
- 138547425U, // OR32rr_REV
- 134222063U, // OR64i32
- 541069537U, // OR64mi32
- 541069537U, // OR64mi8
- 541069537U, // OR64mr
- 138547425U, // OR64ri32
- 138547425U, // OR64ri8
- 138940641U, // OR64rm
- 138547425U, // OR64rr
- 138547425U, // OR64rr_REV
- 134222073U, // OR8i8
- 675287265U, // OR8mi
- 675287265U, // OR8mr
- 138547425U, // OR8ri
- 139071713U, // OR8rm
- 138547425U, // OR8rr
- 138547425U, // OR8rr_REV
- 139201042U, // ORPDrm
- 138545682U, // ORPDrr
- 139201048U, // ORPSrm
- 138545688U, // ORPSrr
- 201330946U, // OUT16ir
- 4359U, // OUT16rr
- 205525250U, // OUT32ir
- 4372U, // OUT32rr
- 209719554U, // OUT8ir
- 4386U, // OUT8rr
- 4399U, // OUTSB
- 4405U, // OUTSD
- 4411U, // OUTSW
- 140775745U, // PABSBrm128
- 140120385U, // PABSBrm64
- 139858241U, // PABSBrr128
- 139858241U, // PABSBrr64
- 140775752U, // PABSDrm128
- 140120392U, // PABSDrm64
- 139858248U, // PABSDrr128
- 139858248U, // PABSDrr64
- 140775759U, // PABSWrm128
- 140120399U, // PABSWrm64
- 139858255U, // PABSWrr128
- 139858255U, // PABSWrr64
- 139595118U, // PACKSSDWrm
- 138546542U, // PACKSSDWrr
- 139595128U, // PACKSSWBrm
- 138546552U, // PACKSSWBrr
- 139596118U, // PACKUSDWrm
- 138547542U, // PACKUSDWrr
- 139595138U, // PACKUSWBrm
- 138546562U, // PACKUSWBrr
- 139595148U, // PADDBrm
- 138546572U, // PADDBrr
- 139595155U, // PADDDrm
- 138546579U, // PADDDrr
- 139595162U, // PADDQrm
- 138546586U, // PADDQrr
- 139595169U, // PADDSBrm
- 138546593U, // PADDSBrr
- 139595177U, // PADDSWrm
- 138546601U, // PADDSWrr
- 139595185U, // PADDUSBrm
- 138546609U, // PADDUSBrr
- 139595194U, // PADDUSWrm
- 138546618U, // PADDUSWrr
- 139595203U, // PADDWrm
- 138546627U, // PADDWrr
- 139612512U, // PALIGNR128rm
- 138563936U, // PALIGNR128rr
- 138957152U, // PALIGNR64rm
- 138563936U, // PALIGNR64rr
- 139595210U, // PANDNrm
- 138546634U, // PANDNrr
- 139595217U, // PANDrm
- 138546641U, // PANDrr
- 139595223U, // PAVGBrm
- 138546647U, // PAVGBrr
- 139595230U, // PAVGWrm
- 138546654U, // PAVGWrr
- 139628905U, // PBLENDVBrm0
- 138580329U, // PBLENDVBrr0
- 139612531U, // PBLENDWrmi
- 138563955U, // PBLENDWrri
- 139595237U, // PCMPEQBrm
- 138546661U, // PCMPEQBrr
- 139595246U, // PCMPEQDrm
- 138546670U, // PCMPEQDrr
- 139596156U, // PCMPEQQrm
- 138547580U, // PCMPEQQrr
- 139595255U, // PCMPEQWrm
- 138546679U, // PCMPEQWrr
- 140792197U, // PCMPESTRIArm
- 139874693U, // PCMPESTRIArr
- 140792197U, // PCMPESTRICrm
- 139874693U, // PCMPESTRICrr
- 140792197U, // PCMPESTRIOrm
- 139874693U, // PCMPESTRIOrr
- 140792197U, // PCMPESTRISrm
- 139874693U, // PCMPESTRISrr
- 140792197U, // PCMPESTRIZrm
- 139874693U, // PCMPESTRIZrr
- 140792197U, // PCMPESTRIrm
- 139874693U, // PCMPESTRIrr
- 4496U, // PCMPESTRM128MEM
- 4520U, // PCMPESTRM128REG
- 140792256U, // PCMPESTRM128rm
- 139874752U, // PCMPESTRM128rr
- 139595264U, // PCMPGTBrm
- 138546688U, // PCMPGTBrr
- 139595273U, // PCMPGTDrm
- 138546697U, // PCMPGTDrr
- 139596235U, // PCMPGTQrm
- 138547659U, // PCMPGTQrr
- 139595282U, // PCMPGTWrm
- 138546706U, // PCMPGTWrr
- 140792276U, // PCMPISTRIArm
- 139874772U, // PCMPISTRIArr
- 140792276U, // PCMPISTRICrm
- 139874772U, // PCMPISTRICrr
- 140792276U, // PCMPISTRIOrm
- 139874772U, // PCMPISTRIOrr
- 140792276U, // PCMPISTRISrm
- 139874772U, // PCMPISTRISrr
- 140792276U, // PCMPISTRIZrm
- 139874772U, // PCMPISTRIZrr
- 140792276U, // PCMPISTRIrm
- 139874772U, // PCMPISTRIrr
- 4575U, // PCMPISTRM128MEM
- 4599U, // PCMPISTRM128REG
- 140792335U, // PCMPISTRM128rm
- 139874831U, // PCMPISTRM128rr
- 675303962U, // PEXTRBmr
- 139874842U, // PEXTRBrr
- 406868514U, // PEXTRDmr
- 139874850U, // PEXTRDrr
- 541086250U, // PEXTRQmr
- 139874858U, // PEXTRQrr
- 272649755U, // PEXTRWmr
- 139873819U, // PEXTRWri
- 139596338U, // PHADDDrm128
- 138940978U, // PHADDDrm64
- 138547762U, // PHADDDrr128
- 138547762U, // PHADDDrr64
- 139596346U, // PHADDSWrm128
- 138940986U, // PHADDSWrm64
- 138547770U, // PHADDSWrr128
- 138547770U, // PHADDSWrr64
- 139596355U, // PHADDWrm128
- 138940995U, // PHADDWrm64
- 138547779U, // PHADDWrr128
- 138547779U, // PHADDWrr64
- 140776011U, // PHMINPOSUWrm128
- 139858507U, // PHMINPOSUWrr128
- 139596375U, // PHSUBDrm128
- 138941015U, // PHSUBDrm64
- 138547799U, // PHSUBDrr128
- 138547799U, // PHSUBDrr64
- 139596383U, // PHSUBSWrm128
- 138941023U, // PHSUBSWrm64
- 138547807U, // PHSUBSWrr128
- 138547807U, // PHSUBSWrr64
- 139596392U, // PHSUBWrm128
- 138941032U, // PHSUBWrm64
- 138547816U, // PHSUBWrr128
- 138547816U, // PHSUBWrr64
- 139088496U, // PINSRBrm
- 138564208U, // PINSRBrr
- 138826360U, // PINSRDrm
- 138564216U, // PINSRDrr
- 138957440U, // PINSRQrm
- 138564224U, // PINSRQrr
- 138694179U, // PINSRWrmi
- 138563107U, // PINSRWrri
- 139596424U, // PMADDUBSWrm128
- 138941064U, // PMADDUBSWrm64
- 138547848U, // PMADDUBSWrr128
- 138547848U, // PMADDUBSWrr64
- 139595307U, // PMADDWDrm
- 138546731U, // PMADDWDrr
- 139596435U, // PMAXSBrm
- 138547859U, // PMAXSBrr
- 139596443U, // PMAXSDrm
- 138547867U, // PMAXSDrr
- 139595316U, // PMAXSWrm
- 138546740U, // PMAXSWrr
- 139595324U, // PMAXUBrm
- 138546748U, // PMAXUBrr
- 139596451U, // PMAXUDrm
- 138547875U, // PMAXUDrr
- 139596459U, // PMAXUWrm
- 138547883U, // PMAXUWrr
- 139596467U, // PMINSBrm
- 138547891U, // PMINSBrr
- 139596475U, // PMINSDrm
- 138547899U, // PMINSDrr
- 139595332U, // PMINSWrm
- 138546756U, // PMINSWrr
- 139595340U, // PMINUBrm
- 138546764U, // PMINUBrr
- 139596483U, // PMINUDrm
- 138547907U, // PMINUDrr
- 139596491U, // PMINUWrm
- 138547915U, // PMINUWrr
- 139857492U, // PMOVMSKBrr
- 139989715U, // PMOVSXBDrm
- 139858643U, // PMOVSXBDrr
- 139727581U, // PMOVSXBQrm
- 139858653U, // PMOVSXBQrr
- 140120807U, // PMOVSXBWrm
- 139858663U, // PMOVSXBWrr
- 140120817U, // PMOVSXDQrm
- 139858673U, // PMOVSXDQrr
- 140120827U, // PMOVSXWDrm
- 139858683U, // PMOVSXWDrr
- 139989765U, // PMOVSXWQrm
- 139858693U, // PMOVSXWQrr
- 139989775U, // PMOVZXBDrm
- 139858703U, // PMOVZXBDrr
- 139727641U, // PMOVZXBQrm
- 139858713U, // PMOVZXBQrr
- 140120867U, // PMOVZXBWrm
- 139858723U, // PMOVZXBWrr
- 140120877U, // PMOVZXDQrm
- 139858733U, // PMOVZXDQrr
- 140120887U, // PMOVZXWDrm
- 139858743U, // PMOVZXWDrr
- 139989825U, // PMOVZXWQrm
- 139858753U, // PMOVZXWQrr
- 139596619U, // PMULDQrm
- 138548043U, // PMULDQrr
- 139596627U, // PMULHRSWrm128
- 138941267U, // PMULHRSWrm64
- 138548051U, // PMULHRSWrr128
- 138548051U, // PMULHRSWrr64
- 139595358U, // PMULHUWrm
- 138546782U, // PMULHUWrr
- 139595367U, // PMULHWrm
- 138546791U, // PMULHWrr
- 139596637U, // PMULLDrm
- 139596637U, // PMULLDrm_int
- 138548061U, // PMULLDrr
- 138548061U, // PMULLDrr_int
- 139595375U, // PMULLWrm
- 138546799U, // PMULLWrr
- 139595383U, // PMULUDQrm
- 138546807U, // PMULUDQrr
- 134222693U, // POP16r
- 268440421U, // POP16rmm
- 134222693U, // POP16rmr
- 134222693U, // POP32r
- 402658149U, // POP32rmm
- 134222693U, // POP32rmr
- 134222693U, // POP64r
- 536875877U, // POP64rmm
- 134222693U, // POP64rmr
- 139727722U, // POPCNT16rm
- 139858794U, // POPCNT16rr
- 139989866U, // POPCNT32rm
- 139858794U, // POPCNT32rr
- 140120938U, // POPCNT64rm
- 139858794U, // POPCNT64rr
- 4978U, // POPF
- 4978U, // POPFD
- 4978U, // POPFQ
- 4983U, // POPFS16
- 4983U, // POPFS32
- 4983U, // POPFS64
- 4991U, // POPGS16
- 4991U, // POPGS32
- 4991U, // POPGS64
- 139595392U, // PORrm
- 138546816U, // PORrr
- 671093639U, // PREFETCHNTA
- 671093652U, // PREFETCHT0
- 671093664U, // PREFETCHT1
- 671093676U, // PREFETCHT2
- 139595397U, // PSADBWrm
- 138546821U, // PSADBWrr
- 139596728U, // PSHUFBrm128
- 138941368U, // PSHUFBrm64
- 138548152U, // PSHUFBrr128
- 138548152U, // PSHUFBrr64
- 140792768U, // PSHUFDmi
- 139875264U, // PSHUFDri
- 140792776U, // PSHUFHWmi
- 139875272U, // PSHUFHWri
- 140792785U, // PSHUFLWmi
- 139875281U, // PSHUFLWri
- 139596762U, // PSIGNBrm128
- 138941402U, // PSIGNBrm64
- 138548186U, // PSIGNBrr128
- 138548186U, // PSIGNBrr64
- 139596770U, // PSIGNDrm128
- 138941410U, // PSIGNDrm64
- 138548194U, // PSIGNDrr128
- 138548194U, // PSIGNDrr64
- 139596778U, // PSIGNWrm128
- 138941418U, // PSIGNWrm64
- 138548202U, // PSIGNWrr128
- 138548202U, // PSIGNWrr64
- 138548210U, // PSLLDQri
- 138546837U, // PSLLDri
- 139595413U, // PSLLDrm
- 138546837U, // PSLLDrr
- 138546844U, // PSLLQri
- 139595420U, // PSLLQrm
- 138546844U, // PSLLQrr
- 138546851U, // PSLLWri
- 139595427U, // PSLLWrm
- 138546851U, // PSLLWrr
- 138546858U, // PSRADri
- 139595434U, // PSRADrm
- 138546858U, // PSRADrr
- 138546865U, // PSRAWri
- 139595441U, // PSRAWrm
- 138546865U, // PSRAWrr
- 138548218U, // PSRLDQri
- 138546872U, // PSRLDri
- 139595448U, // PSRLDrm
- 138546872U, // PSRLDrr
- 138546879U, // PSRLQri
- 139595455U, // PSRLQrm
- 138546879U, // PSRLQrr
- 138546886U, // PSRLWri
- 139595462U, // PSRLWrm
- 138546886U, // PSRLWrr
- 139595469U, // PSUBBrm
- 138546893U, // PSUBBrr
- 139595476U, // PSUBDrm
- 138546900U, // PSUBDrr
- 139595483U, // PSUBQrm
- 138546907U, // PSUBQrr
- 139595490U, // PSUBSBrm
- 138546914U, // PSUBSBrr
- 139595498U, // PSUBSWrm
- 138546922U, // PSUBSWrr
- 139595506U, // PSUBUSBrm
- 138546930U, // PSUBUSBrr
- 139595515U, // PSUBUSWrm
- 138546939U, // PSUBUSWrr
- 139595524U, // PSUBWrm
- 138546948U, // PSUBWrr
- 140776450U, // PTESTrm
- 139858946U, // PTESTrr
- 139595531U, // PUNPCKHBWrm
- 138546955U, // PUNPCKHBWrr
- 139595542U, // PUNPCKHDQrm
- 138546966U, // PUNPCKHDQrr
- 139596810U, // PUNPCKHQDQrm
- 138548234U, // PUNPCKHQDQrr
- 139595553U, // PUNPCKHWDrm
- 138546977U, // PUNPCKHWDrr
- 139595564U, // PUNPCKLBWrm
- 138546988U, // PUNPCKLBWrr
- 139595575U, // PUNPCKLDQrm
- 138546999U, // PUNPCKLDQrr
- 139596822U, // PUNPCKLQDQrm
- 138548246U, // PUNPCKLQDQrr
- 139595586U, // PUNPCKLWDrm
- 138547010U, // PUNPCKLWDrr
- 134222882U, // PUSH16r
- 268440610U, // PUSH16rmm
- 134222882U, // PUSH16rmr
- 134222882U, // PUSH32i16
- 134222882U, // PUSH32i32
- 134222882U, // PUSH32i8
- 134222882U, // PUSH32r
- 402658338U, // PUSH32rmm
- 134222882U, // PUSH32rmr
- 134222882U, // PUSH64i16
- 134222882U, // PUSH64i32
- 134222882U, // PUSH64i8
- 134222882U, // PUSH64r
- 536876066U, // PUSH64rmm
- 134222882U, // PUSH64rmr
- 5160U, // PUSHF
- 5160U, // PUSHFD
- 5160U, // PUSHFQ64
- 5166U, // PUSHFS16
- 5166U, // PUSHFS32
- 5166U, // PUSHFS64
- 5175U, // PUSHGS16
- 5175U, // PUSHGS32
- 5175U, // PUSHGS64
- 139595597U, // PXORrm
- 138547021U, // PXORrr
- 348132416U, // RCL16m1
- 352326720U, // RCL16mCL
- 272634944U, // RCL16mi
- 213914688U, // RCL16r1
- 218108992U, // RCL16rCL
- 138548288U, // RCL16ri
- 482350144U, // RCL32m1
- 486544448U, // RCL32mCL
- 406852672U, // RCL32mi
- 213914688U, // RCL32r1
- 218108992U, // RCL32rCL
- 138548288U, // RCL32ri
- 616567872U, // RCL64m1
- 620762176U, // RCL64mCL
- 541070400U, // RCL64mi
- 213914688U, // RCL64r1
- 218108992U, // RCL64rCL
- 138548288U, // RCL64ri
- 750785600U, // RCL8m1
- 754979904U, // RCL8mCL
- 675288128U, // RCL8mi
- 213914688U, // RCL8r1
- 218108992U, // RCL8rCL
- 138548288U, // RCL8ri
- 140383301U, // RCPPSm
- 140383301U, // RCPPSm_Int
- 139859013U, // RCPPSr
- 139859013U, // RCPPSr_Int
- 140645452U, // RCPSSm
- 140645452U, // RCPSSm_Int
- 139859020U, // RCPSSr
- 139859020U, // RCPSSr_Int
- 348132435U, // RCR16m1
- 352326739U, // RCR16mCL
- 272634963U, // RCR16mi
- 213914707U, // RCR16r1
- 218109011U, // RCR16rCL
- 138548307U, // RCR16ri
- 482350163U, // RCR32m1
- 486544467U, // RCR32mCL
- 406852691U, // RCR32mi
- 213914707U, // RCR32r1
- 218109011U, // RCR32rCL
- 138548307U, // RCR32ri
- 616567891U, // RCR64m1
- 620762195U, // RCR64mCL
- 541070419U, // RCR64mi
- 213914707U, // RCR64r1
- 218109011U, // RCR64rCL
- 138548307U, // RCR64ri
- 750785619U, // RCR8m1
- 754979923U, // RCR8mCL
- 675288147U, // RCR8mi
- 213914707U, // RCR8r1
- 218109011U, // RCR8rCL
- 138548307U, // RCR8ri
- 5208U, // RDMSR
- 5214U, // RDPMC
- 5220U, // RDTSC
- 5226U, // RDTSCP
- 5233U, // REPNE_PREFIX
- 5239U, // REP_MOVSB
- 5249U, // REP_MOVSD
- 5259U, // REP_MOVSQ
- 5269U, // REP_MOVSW
- 5279U, // REP_PREFIX
- 5283U, // REP_STOSB
- 5293U, // REP_STOSD
- 5303U, // REP_STOSQ
- 5313U, // REP_STOSW
- 5323U, // RET
- 134223055U, // RETI
- 268440788U, // ROL16m1
- 352326868U, // ROL16mCL
- 272635092U, // ROL16mi
- 134223060U, // ROL16r1
- 218109140U, // ROL16rCL
- 138548436U, // ROL16ri
- 402658516U, // ROL32m1
- 486544596U, // ROL32mCL
- 406852820U, // ROL32mi
- 134223060U, // ROL32r1
- 218109140U, // ROL32rCL
- 138548436U, // ROL32ri
- 536876244U, // ROL64m1
- 624956628U, // ROL64mCL
- 541070548U, // ROL64mi
- 134223060U, // ROL64r1
- 222303444U, // ROL64rCL
- 138548436U, // ROL64ri
- 671093972U, // ROL8m1
- 754980052U, // ROL8mCL
- 675288276U, // ROL8mi
- 134223060U, // ROL8r1
- 218109140U, // ROL8rCL
- 138548436U, // ROL8ri
- 268440793U, // ROR16m1
- 352326873U, // ROR16mCL
- 272635097U, // ROR16mi
- 134223065U, // ROR16r1
- 218109145U, // ROR16rCL
- 138548441U, // ROR16ri
- 402658521U, // ROR32m1
- 486544601U, // ROR32mCL
- 406852825U, // ROR32mi
- 134223065U, // ROR32r1
- 218109145U, // ROR32rCL
- 138548441U, // ROR32ri
- 536876249U, // ROR64m1
- 624956633U, // ROR64mCL
- 541070553U, // ROR64mi
- 134223065U, // ROR64r1
- 222303449U, // ROR64rCL
- 138548441U, // ROR64ri
- 671093977U, // ROR8m1
- 754980057U, // ROR8mCL
- 675288281U, // ROR8mi
- 134223065U, // ROR8r1
- 218109145U, // ROR8rCL
- 138548441U, // ROR8ri
- 140399838U, // ROUNDPDm_Int
- 139875550U, // ROUNDPDr_Int
- 140399847U, // ROUNDPSm_Int
- 139875559U, // ROUNDPSr_Int
- 139351280U, // ROUNDSDm_Int
- 138564848U, // ROUNDSDr_Int
- 139482361U, // ROUNDSSm_Int
- 138564857U, // ROUNDSSr_Int
- 5378U, // RSM
- 140383494U, // RSQRTPSm
- 140383494U, // RSQRTPSm_Int
- 139859206U, // RSQRTPSr
- 139859206U, // RSQRTPSr_Int
- 140645647U, // RSQRTSSm
- 140645647U, // RSQRTSSm_Int
- 139859215U, // RSQRTSSr
- 139859215U, // RSQRTSSr_Int
- 5400U, // SAHF
- 268440861U, // SAR16m1
- 352326941U, // SAR16mCL
- 272635165U, // SAR16mi
- 134223133U, // SAR16r1
- 218109213U, // SAR16rCL
- 138548509U, // SAR16ri
- 402658589U, // SAR32m1
- 486544669U, // SAR32mCL
- 406852893U, // SAR32mi
- 134223133U, // SAR32r1
- 218109213U, // SAR32rCL
- 138548509U, // SAR32ri
- 536876317U, // SAR64m1
- 624956701U, // SAR64mCL
- 541070621U, // SAR64mi
- 134223133U, // SAR64r1
- 222303517U, // SAR64rCL
- 138548509U, // SAR64ri
- 671094045U, // SAR8m1
- 754980125U, // SAR8mCL
- 675288349U, // SAR8mi
- 134223133U, // SAR8r1
- 218109213U, // SAR8rCL
- 138548509U, // SAR8ri
- 134223138U, // SBB16i16
- 272635180U, // SBB16mi
- 272635180U, // SBB16mi8
- 272635180U, // SBB16mr
- 138548524U, // SBB16ri
- 138548524U, // SBB16ri8
- 138679596U, // SBB16rm
- 138548524U, // SBB16rr
- 138548524U, // SBB16rr_REV
- 134223153U, // SBB32i32
- 406852908U, // SBB32mi
- 406852908U, // SBB32mi8
- 406852908U, // SBB32mr
- 138548524U, // SBB32ri
- 138548524U, // SBB32ri8
- 138810668U, // SBB32rm
- 138548524U, // SBB32rr
- 138548524U, // SBB32rr_REV
- 134223164U, // SBB64i32
- 541070636U, // SBB64mi32
- 541070636U, // SBB64mi8
- 541070636U, // SBB64mr
- 138548524U, // SBB64ri32
- 138548524U, // SBB64ri8
- 138941740U, // SBB64rm
- 138548524U, // SBB64rr
- 138548524U, // SBB64rr_REV
- 134223175U, // SBB8i8
- 675288364U, // SBB8mi
- 675288364U, // SBB8mr
- 138548524U, // SBB8ri
- 139072812U, // SBB8rm
- 138548524U, // SBB8rr
- 138548524U, // SBB8rr_REV
- 5457U, // SCAS16
- 5457U, // SCAS32
- 5457U, // SCAS64
- 5457U, // SCAS8
- 671094102U, // SETAEm
- 134223190U, // SETAEr
- 671094109U, // SETAm
- 134223197U, // SETAr
- 671094115U, // SETBEm
- 134223203U, // SETBEr
- 0U, // SETB_C16r
- 0U, // SETB_C32r
- 0U, // SETB_C64r
- 0U, // SETB_C8r
- 671094122U, // SETBm
- 134223210U, // SETBr
- 671094128U, // SETEm
- 134223216U, // SETEr
- 671094134U, // SETGEm
- 134223222U, // SETGEr
- 671094141U, // SETGm
- 134223229U, // SETGr
- 671094147U, // SETLEm
- 134223235U, // SETLEr
- 671094154U, // SETLm
- 134223242U, // SETLr
- 671094160U, // SETNEm
- 134223248U, // SETNEr
- 671094167U, // SETNOm
- 134223255U, // SETNOr
- 671094174U, // SETNPm
- 134223262U, // SETNPr
- 671094181U, // SETNSm
- 134223269U, // SETNSr
- 671094188U, // SETOm
- 134223276U, // SETOr
- 671094194U, // SETPm
- 134223282U, // SETPr
- 671094200U, // SETSm
- 134223288U, // SETSr
- 5566U, // SFENCE
- 1744836037U, // SGDTm
- 268441035U, // SHL16m1
- 352327115U, // SHL16mCL
- 272635339U, // SHL16mi
- 134223307U, // SHL16r1
- 218109387U, // SHL16rCL
- 138548683U, // SHL16ri
- 402658763U, // SHL32m1
- 486544843U, // SHL32mCL
- 406853067U, // SHL32mi
- 134223307U, // SHL32r1
- 218109387U, // SHL32rCL
- 138548683U, // SHL32ri
- 536876491U, // SHL64m1
- 624956875U, // SHL64mCL
- 541070795U, // SHL64mi
- 134223307U, // SHL64r1
- 222303691U, // SHL64rCL
- 138548683U, // SHL64ri
- 671094219U, // SHL8m1
- 754980299U, // SHL8mCL
- 675288523U, // SHL8mi
- 134223307U, // SHL8r1
- 218109387U, // SHL8rCL
- 138548683U, // SHL8ri
- 272700880U, // SHLD16mrCL
- 272651728U, // SHLD16mri8
- 138614224U, // SHLD16rrCL
- 138565072U, // SHLD16rri8
- 406918608U, // SHLD32mrCL
- 406869456U, // SHLD32mri8
- 138614224U, // SHLD32rrCL
- 138565072U, // SHLD32rri8
- 541152720U, // SHLD64mrCL
- 541087184U, // SHLD64mri8
- 138630608U, // SHLD64rrCL
- 138565072U, // SHLD64rri8
- 268441046U, // SHR16m1
- 352327126U, // SHR16mCL
- 272635350U, // SHR16mi
- 134223318U, // SHR16r1
- 218109398U, // SHR16rCL
- 138548694U, // SHR16ri
- 402658774U, // SHR32m1
- 486544854U, // SHR32mCL
- 406853078U, // SHR32mi
- 134223318U, // SHR32r1
- 218109398U, // SHR32rCL
- 138548694U, // SHR32ri
- 536876502U, // SHR64m1
- 624956886U, // SHR64mCL
- 541070806U, // SHR64mi
- 134223318U, // SHR64r1
- 222303702U, // SHR64rCL
- 138548694U, // SHR64ri
- 671094230U, // SHR8m1
- 754980310U, // SHR8mCL
- 675288534U, // SHR8mi
- 134223318U, // SHR8r1
- 218109398U, // SHR8rCL
- 138548694U, // SHR8ri
- 272700891U, // SHRD16mrCL
- 272651739U, // SHRD16mri8
- 138614235U, // SHRD16rrCL
- 138565083U, // SHRD16rri8
- 406918619U, // SHRD32mrCL
- 406869467U, // SHRD32mri8
- 138614235U, // SHRD32rrCL
- 138565083U, // SHRD32rri8
- 541152731U, // SHRD64mrCL
- 541087195U, // SHRD64mri8
- 138630619U, // SHRD64rrCL
- 138565083U, // SHRD64rri8
- 139220449U, // SHUFPDrmi
- 138565089U, // SHUFPDrri
- 139220457U, // SHUFPSrmi
- 138565097U, // SHUFPSrri
- 1744836081U, // SIDTm
- 5623U, // SIN_F
- 0U, // SIN_Fp32
- 0U, // SIN_Fp64
- 0U, // SIN_Fp80
- 268441084U, // SLDT16m
- 134223356U, // SLDT16r
- 268441084U, // SLDT64m
- 134223356U, // SLDT64r
- 268441090U, // SMSW16m
- 134223362U, // SMSW16r
- 134223362U, // SMSW32r
- 134223362U, // SMSW64r
- 140383752U, // SQRTPDm
- 140383752U, // SQRTPDm_Int
- 139859464U, // SQRTPDr
- 139859464U, // SQRTPDr_Int
- 140383760U, // SQRTPSm
- 140383760U, // SQRTPSm_Int
- 139859472U, // SQRTPSr
- 139859472U, // SQRTPSr_Int
- 140514840U, // SQRTSDm
- 140514840U, // SQRTSDm_Int
- 139859480U, // SQRTSDr
- 139859480U, // SQRTSDr_Int
- 140645920U, // SQRTSSm
- 140645920U, // SQRTSSm_Int
- 139859488U, // SQRTSSr
- 139859488U, // SQRTSSr_Int
- 5672U, // SQRT_F
- 0U, // SQRT_Fp32
- 0U, // SQRT_Fp64
- 0U, // SQRT_Fp80
- 5678U, // SS_PREFIX
- 5681U, // STC
- 5685U, // STD
- 5689U, // STI
- 402658877U, // STMXCSR
- 4146U, // STOSB
- 5702U, // STOSD
- 4146U, // STOSW
- 5708U, // STRm
- 5708U, // STRr
- 805312081U, // ST_F32m
- 939529809U, // ST_F64m
- 805312086U, // ST_FP32m
- 939529814U, // ST_FP64m
- 2147489366U, // ST_FP80m
- 134223446U, // ST_FPrr
- 0U, // ST_Fp32m
- 0U, // ST_Fp64m
- 0U, // ST_Fp64m32
- 0U, // ST_Fp80m32
- 0U, // ST_Fp80m64
- 0U, // ST_FpP32m
- 0U, // ST_FpP64m
- 0U, // ST_FpP64m32
- 0U, // ST_FpP80m
- 0U, // ST_FpP80m32
- 0U, // ST_FpP80m64
- 134223441U, // ST_Frr
- 134223452U, // SUB16i16
- 272635494U, // SUB16mi
- 272635494U, // SUB16mi8
- 272635494U, // SUB16mr
- 138548838U, // SUB16ri
- 138548838U, // SUB16ri8
- 138679910U, // SUB16rm
- 138548838U, // SUB16rr
- 138548838U, // SUB16rr_REV
- 134223467U, // SUB32i32
- 406853222U, // SUB32mi
- 406853222U, // SUB32mi8
- 406853222U, // SUB32mr
- 138548838U, // SUB32ri
- 138548838U, // SUB32ri8
- 138810982U, // SUB32rm
- 138548838U, // SUB32rr
- 138548838U, // SUB32rr_REV
- 134223478U, // SUB64i32
- 541070950U, // SUB64mi32
- 541070950U, // SUB64mi8
- 541070950U, // SUB64mr
- 138548838U, // SUB64ri32
- 138548838U, // SUB64ri8
- 138942054U, // SUB64rm
- 138548838U, // SUB64rr
- 138548838U, // SUB64rr_REV
- 134223489U, // SUB8i8
- 675288678U, // SUB8mi
- 675288678U, // SUB8mr
- 138548838U, // SUB8ri
- 139073126U, // SUB8rm
- 138548838U, // SUB8rr
- 138548838U, // SUB8rr_REV
- 139204235U, // SUBPDrm
- 138548875U, // SUBPDrr
- 139204242U, // SUBPSrm
- 138548882U, // SUBPSrr
- 805312153U, // SUBR_F32m
- 939529881U, // SUBR_F64m
- 268441248U, // SUBR_FI16m
- 402658976U, // SUBR_FI32m
- 134223528U, // SUBR_FPrST0
- 134223513U, // SUBR_FST0r
- 0U, // SUBR_Fp32m
- 0U, // SUBR_Fp64m
- 0U, // SUBR_Fp64m32
- 0U, // SUBR_Fp80m32
- 0U, // SUBR_Fp80m64
- 0U, // SUBR_FpI16m32
- 0U, // SUBR_FpI16m64
- 0U, // SUBR_FpI16m80
- 0U, // SUBR_FpI32m32
- 0U, // SUBR_FpI32m64
- 0U, // SUBR_FpI32m80
- 142612121U, // SUBR_FrST0
- 139335344U, // SUBSDrm
- 139335344U, // SUBSDrm_Int
- 138548912U, // SUBSDrr
- 138548912U, // SUBSDrr_Int
- 139466423U, // SUBSSrm
- 139466423U, // SUBSSrm_Int
- 138548919U, // SUBSSrr
- 138548919U, // SUBSSrr_Int
- 805312190U, // SUB_F32m
- 939529918U, // SUB_F64m
- 268441284U, // SUB_FI16m
- 402659012U, // SUB_FI32m
- 134223563U, // SUB_FPrST0
- 134223550U, // SUB_FST0r
- 0U, // SUB_Fp32
- 0U, // SUB_Fp32m
- 0U, // SUB_Fp64
- 0U, // SUB_Fp64m
- 0U, // SUB_Fp64m32
- 0U, // SUB_Fp80
- 0U, // SUB_Fp80m32
- 0U, // SUB_Fp80m64
- 0U, // SUB_FpI16m32
- 0U, // SUB_FpI16m64
- 0U, // SUB_FpI16m80
- 0U, // SUB_FpI32m32
- 0U, // SUB_FpI32m64
- 0U, // SUB_FpI32m80
- 142612158U, // SUB_FrST0
- 5842U, // SWAPGS
- 5849U, // SYSCALL
- 5857U, // SYSENTER
- 5866U, // SYSEXIT
- 5866U, // SYSEXIT64
- 5874U, // SYSRET
- 1166019469U, // TAILJMPd
- 494930829U, // TAILJMPm
- 226495373U, // TAILJMPr
- 226495373U, // TAILJMPr64
- 230692601U, // TCRETURNdi
- 230692601U, // TCRETURNdi64
- 230692601U, // TCRETURNri
- 230692601U, // TCRETURNri64
- 134223621U, // TEST16i16
- 272635664U, // TEST16mi
- 139859728U, // TEST16ri
- 139728656U, // TEST16rm
- 139859728U, // TEST16rr
- 134223638U, // TEST32i32
- 406853392U, // TEST32mi
- 139859728U, // TEST32ri
- 139990800U, // TEST32rm
- 139859728U, // TEST32rr
- 134223650U, // TEST64i32
- 541071120U, // TEST64mi32
- 139859728U, // TEST64ri32
- 140121872U, // TEST64rm
- 139859728U, // TEST64rr
- 134223662U, // TEST8i8
- 675288848U, // TEST8mi
- 139859728U, // TEST8ri
- 140252944U, // TEST8rm
- 139859728U, // TEST8rr
- 2952795961U, // TLS_addr32
- 3087013695U, // TLS_addr64
- 5969U, // TRAP
- 5973U, // TST_F
- 0U, // TST_Fp32
- 0U, // TST_Fp64
- 0U, // TST_Fp80
- 140512077U, // UCOMISDrm
- 139856717U, // UCOMISDrr
- 140643158U, // UCOMISSrm
- 139856726U, // UCOMISSrr
- 134223706U, // UCOM_FIPr
- 134223723U, // UCOM_FIr
- 6011U, // UCOM_FPPr
- 134223747U, // UCOM_FPr
- 0U, // UCOM_FpIr32
- 0U, // UCOM_FpIr64
- 0U, // UCOM_FpIr80
- 0U, // UCOM_Fpr32
- 0U, // UCOM_Fpr64
- 0U, // UCOM_Fpr80
- 134223755U, // UCOM_Fr
- 139204498U, // UNPCKHPDrm
- 138549138U, // UNPCKHPDrr
- 139204508U, // UNPCKHPSrm
- 138549148U, // UNPCKHPSrr
- 139204518U, // UNPCKLPDrm
- 138549158U, // UNPCKLPDrr
- 139204528U, // UNPCKLPSrm
- 138549168U, // UNPCKLPSrr
- 139876282U, // VASTART_SAVE_XMM_REGS
- 268441554U, // VERRm
- 134223826U, // VERRr
- 268441560U, // VERWm
- 134223832U, // VERWr
- 6110U, // VMCALL
- 536877029U, // VMCLEARm
- 6126U, // VMLAUNCH
- 536877047U, // VMPTRLDm
- 536877056U, // VMPTRSTm
- 406853641U, // VMREAD32rm
- 139859977U, // VMREAD32rr
- 541071369U, // VMREAD64rm
- 139859977U, // VMREAD64rr
- 6161U, // VMRESUME
- 139991066U, // VMWRITE32rm
- 139859994U, // VMWRITE32rr
- 140122138U, // VMWRITE64rm
- 139859994U, // VMWRITE64rr
- 6179U, // VMXOFF
- 6186U, // VMXON
- 0U, // V_SET0
- 0U, // V_SETALLONES
- 6193U, // WAIT
- 6198U, // WBINVD
- 536871957U, // WINCALL64m
- 1073742869U, // WINCALL64pcrel32
- 134218773U, // WINCALL64r
- 6205U, // WRMSR
- 272635971U, // XADD16rm
- 139860035U, // XADD16rr
- 406853699U, // XADD32rm
- 139860035U, // XADD32rr
- 541071427U, // XADD64rm
- 139860035U, // XADD64rr
- 675289155U, // XADD8rm
- 139860035U, // XADD8rr
- 134223945U, // XCHG16ar
- 2281707604U, // XCHG16rm
- 3221231700U, // XCHG16rr
- 134223962U, // XCHG32ar
- 2415925332U, // XCHG32rm
- 3221231700U, // XCHG32rr
- 134223974U, // XCHG64ar
- 3355449428U, // XCHG64rm
- 3221231700U, // XCHG64rr
- 2550143060U, // XCHG8rm
- 3221231700U, // XCHG8rr
- 134223986U, // XCH_F
- 6264U, // XLAT
- 134223998U, // XOR16i16
- 272636040U, // XOR16mi
- 272636040U, // XOR16mi8
- 272636040U, // XOR16mr
- 138549384U, // XOR16ri
- 138549384U, // XOR16ri8
- 138680456U, // XOR16rm
- 138549384U, // XOR16rr
- 138549384U, // XOR16rr_REV
- 134224013U, // XOR32i32
- 406853768U, // XOR32mi
- 406853768U, // XOR32mi8
- 406853768U, // XOR32mr
- 138549384U, // XOR32ri
- 138549384U, // XOR32ri8
- 138811528U, // XOR32rm
- 138549384U, // XOR32rr
- 138549384U, // XOR32rr_REV
- 134224024U, // XOR64i32
- 541071496U, // XOR64mi32
- 541071496U, // XOR64mi8
- 541071496U, // XOR64mr
- 138549384U, // XOR64ri32
- 138549384U, // XOR64ri8
- 138942600U, // XOR64rm
- 138549384U, // XOR64rr
- 138549384U, // XOR64rr_REV
- 134224035U, // XOR8i8
- 675289224U, // XOR8mi
- 675289224U, // XOR8mr
- 138549384U, // XOR8ri
- 139073672U, // XOR8rm
- 138549384U, // XOR8rr
- 138549384U, // XOR8rr_REV
- 139201054U, // XORPDrm
- 138545694U, // XORPDrr
- 139201061U, // XORPSrm
- 138545701U, // XORPSrr
- 0U
- };
-
- const char *AsmStrs =
- "DBG_VALUE\000fabs\000adc\t%ax, \000adc\t\000adc\t%eax, \000adc\t%rax, \000"
- "adc\t%al, \000add\t%ax, \000add\t\000add\t%eax, \000add\t%rax, \000add\t"
- "%al, \000addpd\t\000addps\t\000addsd\t\000addss\t\000addsubpd\t\000adds"
- "ubps\t\000fadd\t\000fiadd\t\000faddp\t\000#ADJCALLSTACKDOWN\000#ADJCALL"
- "STACKUP\000and\t%ax, \000and\t\000and\t%eax, \000and\t%rax, \000and\t%a"
- "l, \000andnpd\t\000andnps\t\000andpd\t\000andps\t\000#ATOMADD6432 PSEUD"
- "O!\000#ATOMAND16 PSEUDO!\000#ATOMAND32 PSEUDO!\000#ATOMAND64 PSEUDO!\000"
- "#ATOMAND6432 PSEUDO!\000#ATOMAND8 PSEUDO!\000#ATOMMAX16 PSEUDO!\000#ATO"
- "MMAX32 PSEUDO!\000#ATOMMAX64 PSEUDO!\000#ATOMMIN16 PSEUDO!\000#ATOMMIN3"
- "2 PSEUDO!\000#ATOMMIN64 PSEUDO!\000#ATOMNAND16 PSEUDO!\000#ATOMNAND32 P"
- "SEUDO!\000#ATOMNAND64 PSEUDO!\000#ATOMNAND6432 PSEUDO!\000#ATOMNAND8 PS"
- "EUDO!\000#ATOMOR16 PSEUDO!\000#ATOMOR32 PSEUDO!\000#ATOMOR64 PSEUDO!\000"
- "#ATOMOR6432 PSEUDO!\000#ATOMOR8 PSEUDO!\000#ATOMSUB6432 PSEUDO!\000#ATO"
- "MSWAP6432 PSEUDO!\000#ATOMUMAX16 PSEUDO!\000#ATOMUMAX32 PSEUDO!\000#ATO"
- "MUMAX64 PSEUDO!\000#ATOMUMIN16 PSEUDO!\000#ATOMUMIN32 PSEUDO!\000#ATOMU"
- "MIN64 PSEUDO!\000#ATOMXOR16 PSEUDO!\000#ATOMXOR32 PSEUDO!\000#ATOMXOR64"
- " PSEUDO!\000#ATOMXOR6432 PSEUDO!\000#ATOMXOR8 PSEUDO!\000blendpd\t\000b"
- "lendps\t\000blendvpd\t\000blendvps\t\000bsf\t\000bsr\t\000bswap\t\000bt"
- "\t\000btc\t\000btr\t\000bts\t\000call\t\000cbw\000cdq\000cdqe\000fchs\000"
- "clc\000cld\000clflush\t\000cli\000clts\000cmc\000cmova\t\000cmovae\t\000"
- "cmovb\t\000cmovbe\t\000fcmovbe\t%ST(0), \000fcmovb\t%ST(0), \000cmove\t"
- "\000fcmove\t%ST(0), \000cmovg\t\000cmovge\t\000cmovl\t\000cmovle\t\000f"
- "cmovnbe\t%ST(0), \000fcmovnb\t%ST(0), \000cmovne\t\000fcmovne\t%ST(0), "
- "\000cmovno\t\000cmovnp\t\000fcmovnu\t%ST(0), \000cmovns\t\000cmovo\t\000"
- "cmovp\t\000fcmovu\t %ST(0), \000cmovs\t\000#CMOV_FR32 PSEUDO!\000#CMOV_"
- "FR64 PSEUDO!\000#CMOV_GR8 PSEUDO!\000#CMOV_V1I64 PSEUDO!\000#CMOV_V2F64"
- " PSEUDO!\000#CMOV_V2I64 PSEUDO!\000#CMOV_V4F32 PSEUDO!\000cmp\t%ax, \000"
- "cmp\t\000cmp\t%eax, \000cmp\t%rax, \000cmp\t%al, \000cmp\000cmps\000cmp"
- "xchg16b\t\000cmpxchg\t\000cmpxchg8b\t\000comisd\t\000comiss\t\000fcomp\t"
- "\000fcomip\t%ST(0), \000fcomi\t%ST(0), \000fcom\t\000fcos\000cpuid\000c"
- "qo\000crc32 \t\000cs\000cvtdq2pd\t\000cvtdq2ps\t\000cvtpd2dq\t\000cvtpd"
- "2ps\t\000cvtps2dq\t\000cvtps2pd\t\000cvtsd2si\t\000cvtsd2ss\t\000cvtsi2"
- "sd\t\000cvtsi2ss\t\000cvtss2sd\t\000cvtss2si\t\000cvttps2dq\t\000cvttsd"
- "2si\t\000cvttss2si\t\000cwd\000cwde\000dec\t\000div\t\000divpd\t\000div"
- "ps\t\000fdivr\t\000fidivr\t\000fdivrp\t\000divsd\t\000divss\t\000fdiv\t"
- "\000fidiv\t\000fdivp\t\000dppd\t\000dpps\t\000ds\000ret\t#eh_return, ad"
- "dr: \000enter\t\000es\000extractps\t\000f2xm1\000lcall\t\000ljmp\t\000f"
- "bld\t\000fbstp\t\000fcompp\000fdecstp\000ffree\t\000ficom\t\000ficomp\t"
- "\000fincstp\000fldcw\t\000fldenv\t\000fldl2e\000fldl2t\000fldlg2\000fld"
- "ln2\000fldpi\000fnclex\000fninit\000fnop\000fnstcw\t\000fnstsw %ax\000f"
- "nstsw\t\000##FP32_TO_INT16_IN_MEM PSEUDO!\000##FP32_TO_INT32_IN_MEM PSE"
- "UDO!\000##FP32_TO_INT64_IN_MEM PSEUDO!\000##FP64_TO_INT16_IN_MEM PSEUDO"
- "!\000##FP64_TO_INT32_IN_MEM PSEUDO!\000##FP64_TO_INT64_IN_MEM PSEUDO!\000"
- "##FP80_TO_INT16_IN_MEM PSEUDO!\000##FP80_TO_INT32_IN_MEM PSEUDO!\000##F"
- "P80_TO_INT64_IN_MEM PSEUDO!\000fpatan\000fprem\000fprem1\000fptan\000##"
- "FP_REG_KILL\000frndint\000frstor\t\000fnsave\t\000fscale\000fsincos\000"
- "fnstenv\t\000movl\t%fs:\000fs\000fxam\000fxrstor\t\000fxsave\t\000fxtra"
- "ct\000fyl2x\000fyl2xp1\000movapd\t\000movaps\t\000orpd\t\000orps\t\000x"
- "orpd\t\000xorps\t\000movl\t%gs:\000gs\000haddpd\t\000haddps\t\000hlt\000"
- "hsubpd\t\000hsubps\t\000idiv\t\000fild\t\000imul\t\000ins\000in\t%AX, \000"
- "in\t%AX, %DX\000in\t%EAX, \000in\t%EAX, %DX\000in\t%AL, \000in\t%AL, %D"
- "X\000inc\t\000insertps\t\000int\t\000int\t3\000invd\000invept\000invlpg"
- "\t\000invvpid\000iret\000fisttp\t\000fist\t\000fistp\t\000cvtpd2pi\t\000"
- "cvtpi2pd\t\000cvtpi2ps\t\000cvtps2pi\t\000cvttpd2dq\t\000cvttpd2pi\t\000"
- "cvttps2pi\t\000ucomisd\t\000ucomiss\t\000jae\t\000ja\t\000jbe\t\000jb\t"
- "\000jcxz\t\000je\t\000jge\t\000jg\t\000jle\t\000jl\t\000jmp\t\000jne\t\000"
- "jno\t\000jnp\t\000jns\t\000jo\t\000jp\t\000js\t\000lahf\000lar\t\000loc"
- "k\n\tcmpxchg\t\000lock\n\tcmpxchgq\t\000lock\n\tcmpxchg8b\t\000lddqu\t\000"
- "ldmxcsr\t\000lds\t\000fldz\000fld1\000fld\t\000lea\t\000leave\000les\t\000"
- "lfence\000lfs\t\000lgdt\t\000lgs\t\000lidt\t\000lldt\t\000lmsw\t\000loc"
- "k\n\tadd\t\000lock\n\tdec\t\000lock\n\tinc\t\000lock\000lock\n\tsub\t\000"
- "lodsb\000lodsd\000lodsq\000lodsw\000loop\t\000loope\t\000loopne\t\000lr"
- "et\000lret\t\000lsl\t\000lss\t\000ltr\t\000lock\n\txadd\t\000maskmovdqu"
- "\t\000maxpd\t\000maxps\t\000maxsd\t\000maxss\t\000mfence\000# dynamic s"
- "tack allocation\000minpd\t\000minps\t\000minsd\t\000minss\t\000emms\000"
- "femms\000maskmovq\t\000movd\t\000movdq2q\t\000movntq\t\000movq2dq\t\000"
- "movq\t\000packssdw\t\000packsswb\t\000packuswb\t\000paddb\t\000paddd\t\000"
- "paddq\t\000paddsb\t\000paddsw\t\000paddusb\t\000paddusw\t\000paddw\t\000"
- "pandn\t\000pand\t\000pavgb\t\000pavgw\t\000pcmpeqb\t\000pcmpeqd\t\000pc"
- "mpeqw\t\000pcmpgtb\t\000pcmpgtd\t\000pcmpgtw\t\000pextrw\t\000pinsrw\t\000"
- "pmaddwd\t\000pmaxsw\t\000pmaxub\t\000pminsw\t\000pminub\t\000pmovmskb\t"
- "\000pmulhuw\t\000pmulhw\t\000pmullw\t\000pmuludq\t\000por\t\000psadbw\t"
- "\000pshufw\t\000pslld\t\000psllq\t\000psllw\t\000psrad\t\000psraw\t\000"
- "psrld\t\000psrlq\t\000psrlw\t\000psubb\t\000psubd\t\000psubq\t\000psubs"
- "b\t\000psubsw\t\000psubusb\t\000psubusw\t\000psubw\t\000punpckhbw\t\000"
- "punpckhdq\t\000punpckhwd\t\000punpcklbw\t\000punpckldq\t\000punpcklwd\t"
- "\000pxor\t\000monitor\000mov\t\000mov\t%ax, \000mov\t%eax, \000movq\t%f"
- "s:\000movq\t%gs:\000mov\t%rax, \000movabs\t\000mov\t%al, \000movddup\t\000"
- "movdqa\t\000movdqu\t\000movhlps\t\000movhpd\t\000movhps\t\000movlhps\t\000"
- "movlpd\t\000movlps\t\000movmskpd\t\000movmskps\t\000movntdqa\t\000movnt"
- "dq\t\000movnti\t\000movntpd\t\000movntps\t\000\000movsd\000movsd\t\000m"
- "ovshdup\t\000movsldup\t\000movss\t\000movsx\t\000movsxd\t\000movupd\t\000"
- "movups\t\000movzx\t\000mpsadbw\t\000mul\t\000mulpd\t\000mulps\t\000muls"
- "d\t\000mulss\t\000fmul\t\000fimul\t\000fmulp\t\000mwait\000neg\t\000nop"
- "\000nop\t\000not\t\000or\t%ax, \000or\t\000or\t%eax, \000or\t%rax, \000"
- "or\t%al, \000out\t\000out\t%DX, %AX\000out\t%DX, %EAX\000out\t%DX, %AL\000"
- "outsb\000outsd\000outsw\000pabsb\t\000pabsd\t\000pabsw\t\000packusdw\t\000"
- "palignr\t\000pblendvb\t\000pblendw\t\000pcmpeqq\t\000pcmpestri\t\000#PC"
- "MPESTRM128rm PSEUDO!\000#PCMPESTRM128rr PSEUDO!\000pcmpestrm\t\000pcmpg"
- "tq\t\000pcmpistri\t\000#PCMPISTRM128rm PSEUDO!\000#PCMPISTRM128rr PSEUD"
- "O!\000pcmpistrm\t\000pextrb\t\000pextrd\t\000pextrq\t\000phaddd\t\000ph"
- "addsw\t\000phaddw\t\000phminposuw\t\000phsubd\t\000phsubsw\t\000phsubw\t"
- "\000pinsrb\t\000pinsrd\t\000pinsrq\t\000pmaddubsw\t\000pmaxsb\t\000pmax"
- "sd\t\000pmaxud\t\000pmaxuw\t\000pminsb\t\000pminsd\t\000pminud\t\000pmi"
- "nuw\t\000pmovsxbd\t\000pmovsxbq\t\000pmovsxbw\t\000pmovsxdq\t\000pmovsx"
- "wd\t\000pmovsxwq\t\000pmovzxbd\t\000pmovzxbq\t\000pmovzxbw\t\000pmovzxd"
- "q\t\000pmovzxwd\t\000pmovzxwq\t\000pmuldq\t\000pmulhrsw\t\000pmulld\t\000"
- "pop\t\000popcnt\t\000popf\000pop\t%fs\000pop\t%gs\000prefetchnta\t\000p"
- "refetcht0\t\000prefetcht1\t\000prefetcht2\t\000pshufb\t\000pshufd\t\000"
- "pshufhw\t\000pshuflw\t\000psignb\t\000psignd\t\000psignw\t\000pslldq\t\000"
- "psrldq\t\000ptest \t\000punpckhqdq\t\000punpcklqdq\t\000push\t\000pushf"
- "\000push\t%fs\000push\t%gs\000rcl\t\000rcpps\t\000rcpss\t\000rcr\t\000r"
- "dmsr\000rdpmc\000rdtsc\000rdtscp\000repne\000rep movsb\000rep movsd\000"
- "rep movsq\000rep movsw\000rep\000rep stosb\000rep stosd\000rep stosq\000"
- "rep stosw\000ret\000ret\t\000rol\t\000ror\t\000roundpd\t\000roundps\t\000"
- "roundsd\t\000roundss\t\000rsm\000rsqrtps\t\000rsqrtss\t\000sahf\000sar\t"
- "\000sbb\t%ax, \000sbb\t\000sbb\t%eax, \000sbb\t%rax, \000sbb\t%al, \000"
- "scas\000setae\t\000seta\t\000setbe\t\000setb\t\000sete\t\000setge\t\000"
- "setg\t\000setle\t\000setl\t\000setne\t\000setno\t\000setnp\t\000setns\t"
- "\000seto\t\000setp\t\000sets\t\000sfence\000sgdt\t\000shl\t\000shld\t\000"
- "shr\t\000shrd\t\000shufpd\t\000shufps\t\000sidt\t\000fsin\000sldt\t\000"
- "smsw\t\000sqrtpd\t\000sqrtps\t\000sqrtsd\t\000sqrtss\t\000fsqrt\000ss\000"
- "stc\000std\000sti\000stmxcsr\t\000stosd\000str\t\000fst\t\000fstp\t\000"
- "sub\t%ax, \000sub\t\000sub\t%eax, \000sub\t%rax, \000sub\t%al, \000subp"
- "d\t\000subps\t\000fsubr\t\000fisubr\t\000fsubrp\t\000subsd\t\000subss\t"
- "\000fsub\t\000fisub\t\000fsubp\t\000swapgs\000syscall\000sysenter\000sy"
- "sexit\000sysret\000#TC_RETURN \000test\t%ax, \000test\t\000test\t%eax, "
- "\000test\t%rax, \000test\t%al, \000leal\t\000.byte\t0x66; leaq\t\000ud2"
- "\000ftst\000fucomip\t%ST(0), \000fucomi\t%ST(0), \000fucompp\000fucomp\t"
- "\000fucom\t\000unpckhpd\t\000unpckhps\t\000unpcklpd\t\000unpcklps\t\000"
- "#VASTART_SAVE_XMM_REGS \000verr\t\000verw\t\000vmcall\000vmclear\t\000v"
- "mlaunch\000vmptrld\t\000vmptrst\t\000vmread\t\000vmresume\000vmwrite\t\000"
- "vmxoff\000vmxon\t\000wait\000wbinvd\000wrmsr\000xadd\t\000xchg\t%ax, \000"
- "xchg\t\000xchg\t%eax, \000xchg\t%rax, \000fxch\t\000xlatb\000xor\t%ax, "
- "\000xor\t\000xor\t%eax, \000xor\t%rax, \000xor\t%al, \000";
-
- O << "\t";
-
- // Emit the opcode for the instruction.
- unsigned Bits = OpInfo[MI->getOpcode()];
- assert(Bits != 0 && "Cannot print this instruction.");
- O << AsmStrs+(Bits & 8191)-1;
-
-
- // Fragment 0 encoded into 5 bits for 26 unique commands.
- switch ((Bits >> 27) & 31) {
- default: // unreachable.
- case 0:
- // DBG_VALUE, ABS_F, ADJCALLSTACKDOWN32, ADJCALLSTACKDOWN64, ADJCALLSTACK...
- return;
- break;
- case 1:
- // ADC16i16, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16rr_REV, ADC32i32, ...
- printOperand(MI, 0);
- break;
- case 2:
- // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, ADD_FI16m, AND...
- printi16mem(MI, 0);
- break;
- case 3:
- // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, ADD_FI32m, AND...
- printi32mem(MI, 0);
- break;
- case 4:
- // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,...
- printi64mem(MI, 0);
- break;
- case 5:
- // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CLFLUSH, CMP8mi, CMP8m...
- printi8mem(MI, 0);
- break;
- case 6:
- // ADD_F32m, DIVR_F32m, DIV_F32m, EXTRACTPSmr, FBLDm, FBSTPm, FCOM32m, FC...
- printf32mem(MI, 0);
- break;
- case 7:
- // ADD_F64m, DIVR_F64m, DIV_F64m, FCOM64m, FCOMP64m, LD_F64m, MOVHPDmr, M...
- printf64mem(MI, 0);
- break;
- case 8:
- // CALL64pcrel32, CALLpcrel32, JAE_1, JAE_4, JA_1, JA_4, JBE_1, JBE_4, JB...
- print_pcrel_imm(MI, 0);
- break;
- case 9:
- // CMPPDrmi, CMPPSrmi, CMPSDrm, CMPSSrm, Int_CMPSDrm, Int_CMPSSrm
- printSSECC(MI, 7);
- break;
- case 10:
- // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr
- printSSECC(MI, 3);
- break;
- case 11:
- // CMPXCHG16B, MOVDQAmr, MOVDQUmr, MOVDQUmr_Int, MOVNTPDmr_Int, MOVNTPSmr...
- printi128mem(MI, 0);
- break;
- case 12:
- // CRC32m16, CRC32m32, CRC32m8, CRC32r16, CRC32r32, CRC32r8, CRC64m64, CR...
- printOperand(MI, 1);
- O << ", ";
- break;
- case 13:
- // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, FXR...
- printopaquemem(MI, 0);
- return;
- break;
- case 14:
- // FS_MOV32rm, GS_MOV32rm
- printi32mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 15:
- // LCMPXCHG64
- printOperand(MI, 5);
- O << ',';
- printi64mem(MI, 0);
- return;
- break;
- case 16:
- // LD_F80m, ST_FP80m
- printf80mem(MI, 0);
- return;
- break;
- case 17:
- // LXADD16, XCHG16rm
- printi16mem(MI, 2);
- O << ", ";
- printOperand(MI, 1);
- return;
- break;
- case 18:
- // LXADD32, XCHG32rm
- printi32mem(MI, 2);
- O << ", ";
- printOperand(MI, 1);
- return;
- break;
- case 19:
- // LXADD8, XCHG8rm
- printi8mem(MI, 2);
- O << ", ";
- printOperand(MI, 1);
- return;
- break;
- case 20:
- // MOV64FSrm, MOV64GSrm
- printi64mem(MI, 1);
- O << ", ";
- printOperand(MI, 0);
- return;
- break;
- case 21:
- // MOVAPDmr, MOVAPSmr, MOVNTDQ_64mr, MOVNTDQmr, MOVNTDQmr_Int, MOVNTPDmr,...
- printf128mem(MI, 0);
- O << ", ";
- printOperand(MI, 5);
- return;
- break;
- case 22:
- // TLS_addr32
- printlea32mem(MI, 0);
- O << ", %eax; call\t___tls_get_addr at PLT";
- return;
- break;
- case 23:
- // TLS_addr64
- printlea64mem(MI, 0);
- O << "(%rip), %rdi; .word\t0x6666; rex64; call\t__tls_get_addr at PLT";
- return;
- break;
- case 24:
- // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr
- printOperand(MI, 2);
- O << ", ";
- printOperand(MI, 1);
- return;
- break;
- case 25:
- // XCHG64rm
- printi64mem(MI, 2);
- O << ", ";
- printOperand(MI, 1);
- return;
- break;
- }
-
-
- // Fragment 1 encoded into 5 bits for 24 unique commands.
- switch ((Bits >> 22) & 31) {
- default: // unreachable.
- case 0:
- // ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i32, ADD64i32, AD...
- return;
- break;
- case 1:
- // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16...
- O << ", ";
- break;
- case 2:
- // ADD_FrST0, DIVR_FrST0, DIV_FrST0, MUL_FrST0, SUBR_FrST0, SUB_FrST0
- O << ", %ST(0)";
- return;
- break;
- case 3:
- // CMPPDrmi, CMPPDrri
- O << "pd\t";
- printOperand(MI, 0);
- O << ", ";
- break;
- case 4:
- // CMPPSrmi, CMPPSrri
- O << "ps\t";
- printOperand(MI, 0);
- O << ", ";
- break;
- case 5:
- // CMPSDrm, CMPSDrr, Int_CMPSDrm, Int_CMPSDrr
- O << "sd\t";
- printOperand(MI, 0);
- O << ", ";
- break;
- case 6:
- // CMPSSrm, CMPSSrr, Int_CMPSSrm, Int_CMPSSrr
- O << "ss\t";
- printOperand(MI, 0);
- O << ", ";
- break;
- case 7:
- // CRC32m16
- printi16mem(MI, 2);
- return;
- break;
- case 8:
- // CRC32m32
- printi32mem(MI, 2);
- return;
- break;
- case 9:
- // CRC32m8
- printi8mem(MI, 2);
- return;
- break;
- case 10:
- // CRC32r16, CRC32r32, CRC32r8, CRC64r64
- printOperand(MI, 2);
- return;
- break;
- case 11:
- // CRC64m64, LXADD64
- printi64mem(MI, 2);
- return;
- break;
- case 12:
- // MOV16ao16
- O << ", %ax";
- return;
- break;
- case 13:
- // MOV32ao32
- O << ", %eax";
- return;
- break;
- case 14:
- // MOV64ao64, MOV64ao8
- O << ", %rax";
- return;
- break;
- case 15:
- // MOV8ao8
- O << ", %al";
- return;
- break;
- case 16:
- // OUT16ir
- O << ", %AX";
- return;
- break;
- case 17:
- // OUT32ir
- O << ", %EAX";
- return;
- break;
- case 18:
- // OUT8ir
- O << ", %AL";
- return;
- break;
- case 19:
- // RCL16m1, RCL16r1, RCL32m1, RCL32r1, RCL64m1, RCL64r1, RCL8m1, RCL8r1, ...
- O << ", 1";
- return;
- break;
- case 20:
- // RCL16mCL, RCL16rCL, RCL32mCL, RCL32rCL, RCL64mCL, RCL64rCL, RCL8mCL, R...
- O << ", CL";
- return;
- break;
- case 21:
- // ROL64mCL, ROL64rCL, ROR64mCL, ROR64rCL, SAR64mCL, SAR64rCL, SHL64mCL, ...
- O << ", %CL";
- return;
- break;
- case 22:
- // TAILJMPd, TAILJMPm, TAILJMPr, TAILJMPr64
- O << " # TAILCALL";
- return;
- break;
- case 23:
- // TCRETURNdi, TCRETURNdi64, TCRETURNri, TCRETURNri64
- O << ' ';
- printOperand(MI, 1);
- return;
- break;
- }
-
-
- // Fragment 2 encoded into 5 bits for 23 unique commands.
- switch ((Bits >> 17) & 31) {
- default: // unreachable.
- case 0:
- // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC...
- printOperand(MI, 5);
- break;
- case 1:
- // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A...
- printOperand(MI, 2);
- break;
- case 2:
- // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r...
- printi16mem(MI, 2);
- break;
- case 3:
- // ADC32rm, ADD32rm, AND32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm, CMOVBE32r...
- printi32mem(MI, 2);
- break;
- case 4:
- // ADC64rm, ADD64rm, AND64rm, CMOVA64rm, CMOVAE64rm, CMOVB64rm, CMOVBE64r...
- printi64mem(MI, 2);
- break;
- case 5:
- // ADC8rm, ADD8rm, AND8rm, OR8rm, PINSRBrm, SBB8rm, SUB8rm, XOR8rm
- printi8mem(MI, 2);
- break;
- case 6:
- // ADDPDrm, ADDPSrm, ADDSUBPDrm, ADDSUBPSrm, ANDNPDrm, ANDNPSrm, ANDPDrm,...
- printf128mem(MI, 2);
- break;
- case 7:
- // ADDSDrm, ADDSDrm_Int, CMPSDrm, DIVSDrm, DIVSDrm_Int, Int_CMPSDrm, Int_...
- printf64mem(MI, 2);
- break;
- case 8:
- // ADDSSrm, ADDSSrm_Int, CMPSSrm, DIVSSrm, DIVSSrm_Int, INSERTPSrm, Int_C...
- printf32mem(MI, 2);
- break;
- case 9:
- // BLENDPDrmi, BLENDPSrmi, BLENDVPDrm0, BLENDVPSrm0, DPPDrmi, DPPSrmi, MP...
- printi128mem(MI, 2);
- break;
- case 10:
- // BSF16rm, BSR16rm, CMP16rm, IMUL16rmi, IMUL16rmi8, LAR16rm, LAR32rm, LA...
- printi16mem(MI, 1);
- break;
- case 11:
- // BSF16rr, BSF32rr, BSF64rr, BSR16rr, BSR32rr, BSR64rr, BT16ri8, BT16rr,...
- printOperand(MI, 1);
- break;
- case 12:
- // BSF32rm, BSR32rm, CMP32rm, CVTSI2SDrm, CVTSI2SSrm, IMUL32rmi, IMUL32rm...
- printi32mem(MI, 1);
- break;
- case 13:
- // BSF64rm, BSR64rm, CMP64rm, CVTSI2SD64rm, CVTSI2SS64rm, IMUL64rmi32, IM...
- printi64mem(MI, 1);
- break;
- case 14:
- // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8W, MOVSX32rm8, MOVSX64rm8, MOV...
- printi8mem(MI, 1);
- break;
- case 15:
- // COMISDrm, COMISSrm, CVTDQ2PDrm, CVTDQ2PSrm, CVTPD2DQrm, CVTPD2PSrm, CV...
- printf128mem(MI, 1);
- break;
- case 16:
- // CVTPS2PDrm, CVTSD2SI64rm, CVTSD2SSrm, CVTTSD2SI64rm, CVTTSD2SIrm, Int_...
- printf64mem(MI, 1);
- return;
- break;
- case 17:
- // CVTSS2SDrm, CVTSS2SI64rm, CVTSS2SIrm, CVTTSS2SI64rm, CVTTSS2SIrm, Int_...
- printf32mem(MI, 1);
- return;
- break;
- case 18:
- // Int_CVTDQ2PSrm, LDDQUrm, MOVDQArm, MOVDQUrm, MOVDQUrm_Int, MOVNTDQArm,...
- printi128mem(MI, 1);
- break;
- case 19:
- // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm...
- printopaquemem(MI, 1);
- return;
- break;
- case 20:
- // LEA16r, LEA32r
- printlea32mem(MI, 1);
- return;
- break;
- case 21:
- // LEA64_32r
- printlea64_32mem(MI, 1);
- return;
- break;
- case 22:
- // LEA64r
- printlea64mem(MI, 1);
- return;
- break;
- }
-
-
- // Fragment 3 encoded into 3 bits for 6 unique commands.
- switch ((Bits >> 14) & 7) {
- default: // unreachable.
- case 0:
- // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16...
- return;
- break;
- case 1:
- // BLENDPDrmi, BLENDPDrri, BLENDPSrmi, BLENDPSrri, DPPDrmi, DPPDrri, DPPS...
- O << ", ";
- break;
- case 2:
- // BLENDVPDrm0, BLENDVPDrr0, BLENDVPSrm0, BLENDVPSrr0, PBLENDVBrm0, PBLEN...
- O << ", %xmm0";
- return;
- break;
- case 3:
- // MOV8mr_NOREX, MOV8rm_NOREX, MOV8rr_NOREX, MOVZX32_NOREXrm8, MOVZX32_NO...
- O << " # NOREX";
- return;
- break;
- case 4:
- // SHLD16mrCL, SHLD16rrCL, SHLD32mrCL, SHLD32rrCL, SHRD16mrCL, SHRD16rrCL...
- O << ", CL";
- return;
- break;
- case 5:
- // SHLD64mrCL, SHLD64rrCL, SHRD64mrCL, SHRD64rrCL
- O << ", %CL";
- return;
- break;
- }
-
- switch (MI->getOpcode()) {
- case X86::BLENDPDrmi:
- case X86::BLENDPDrri:
- case X86::BLENDPSrmi:
- case X86::BLENDPSrri:
- case X86::DPPDrmi:
- case X86::DPPDrri:
- case X86::DPPSrmi:
- case X86::DPPSrri:
- case X86::EXTRACTPSmr:
- case X86::EXTRACTPSrr:
- case X86::IMUL16rmi:
- case X86::IMUL16rmi8:
- case X86::IMUL16rri:
- case X86::IMUL16rri8:
- case X86::IMUL32rmi:
- case X86::IMUL32rmi8:
- case X86::IMUL32rri:
- case X86::IMUL32rri8:
- case X86::IMUL64rmi32:
- case X86::IMUL64rmi8:
- case X86::IMUL64rri32:
- case X86::IMUL64rri8:
- case X86::INSERTPSrm:
- case X86::INSERTPSrr:
- case X86::MMX_PEXTRWri:
- case X86::MMX_PINSRWrmi:
- case X86::MMX_PINSRWrri:
- case X86::MMX_PSHUFWmi:
- case X86::MMX_PSHUFWri:
- case X86::MPSADBWrmi:
- case X86::MPSADBWrri:
- case X86::PALIGNR128rm:
- case X86::PALIGNR128rr:
- case X86::PALIGNR64rm:
- case X86::PALIGNR64rr:
- case X86::PBLENDWrmi:
- case X86::PBLENDWrri:
- case X86::PCMPESTRIArm:
- case X86::PCMPESTRIArr:
- case X86::PCMPESTRICrm:
- case X86::PCMPESTRICrr:
- case X86::PCMPESTRIOrm:
- case X86::PCMPESTRIOrr:
- case X86::PCMPESTRISrm:
- case X86::PCMPESTRISrr:
- case X86::PCMPESTRIZrm:
- case X86::PCMPESTRIZrr:
- case X86::PCMPESTRIrm:
- case X86::PCMPESTRIrr:
- case X86::PCMPESTRM128rm:
- case X86::PCMPESTRM128rr:
- case X86::PCMPISTRIArm:
- case X86::PCMPISTRIArr:
- case X86::PCMPISTRICrm:
- case X86::PCMPISTRICrr:
- case X86::PCMPISTRIOrm:
- case X86::PCMPISTRIOrr:
- case X86::PCMPISTRISrm:
- case X86::PCMPISTRISrr:
- case X86::PCMPISTRIZrm:
- case X86::PCMPISTRIZrr:
- case X86::PCMPISTRIrm:
- case X86::PCMPISTRIrr:
- case X86::PCMPISTRM128rm:
- case X86::PCMPISTRM128rr:
- case X86::PEXTRBmr:
- case X86::PEXTRBrr:
- case X86::PEXTRDmr:
- case X86::PEXTRDrr:
- case X86::PEXTRQmr:
- case X86::PEXTRQrr:
- case X86::PEXTRWmr:
- case X86::PEXTRWri:
- case X86::PINSRBrm:
- case X86::PINSRBrr:
- case X86::PINSRDrm:
- case X86::PINSRDrr:
- case X86::PINSRQrm:
- case X86::PINSRQrr:
- case X86::PINSRWrmi:
- case X86::PINSRWrri:
- case X86::PSHUFDmi:
- case X86::PSHUFDri:
- case X86::PSHUFHWmi:
- case X86::PSHUFHWri:
- case X86::PSHUFLWmi:
- case X86::PSHUFLWri:
- case X86::ROUNDPDm_Int:
- case X86::ROUNDPDr_Int:
- case X86::ROUNDPSm_Int:
- case X86::ROUNDPSr_Int:
- case X86::ROUNDSDm_Int:
- case X86::ROUNDSDr_Int:
- case X86::ROUNDSSm_Int:
- case X86::ROUNDSSr_Int:
- case X86::SHLD16mri8:
- case X86::SHLD16rri8:
- case X86::SHLD32mri8:
- case X86::SHLD32rri8:
- case X86::SHLD64mri8:
- case X86::SHLD64rri8:
- case X86::SHRD16mri8:
- case X86::SHRD16rri8:
- case X86::SHRD32mri8:
- case X86::SHRD32rri8:
- case X86::SHRD64mri8:
- case X86::SHRD64rri8:
- case X86::SHUFPDrmi:
- case X86::SHUFPDrri:
- case X86::SHUFPSrmi:
- case X86::SHUFPSrri:
- case X86::VASTART_SAVE_XMM_REGS:
- switch (MI->getOpcode()) {
- case X86::BLENDPDrmi:
- case X86::BLENDPSrmi:
- case X86::DPPDrmi:
- case X86::DPPSrmi:
- case X86::INSERTPSrm:
- case X86::MMX_PINSRWrmi:
- case X86::MPSADBWrmi:
- case X86::PALIGNR128rm:
- case X86::PALIGNR64rm:
- case X86::PBLENDWrmi:
- case X86::PINSRBrm:
- case X86::PINSRDrm:
- case X86::PINSRQrm:
- case X86::PINSRWrmi:
- case X86::ROUNDSDm_Int:
- case X86::ROUNDSSm_Int:
- case X86::SHUFPDrmi:
- case X86::SHUFPSrmi: printOperand(MI, 7); break;
- case X86::BLENDPDrri:
- case X86::BLENDPSrri:
- case X86::DPPDrri:
- case X86::DPPSrri:
- case X86::INSERTPSrr:
- case X86::MMX_PINSRWrri:
- case X86::MPSADBWrri:
- case X86::PALIGNR128rr:
- case X86::PALIGNR64rr:
- case X86::PBLENDWrri:
- case X86::PINSRBrr:
- case X86::PINSRDrr:
- case X86::PINSRQrr:
- case X86::PINSRWrri:
- case X86::ROUNDSDr_Int:
- case X86::ROUNDSSr_Int:
- case X86::SHLD16rri8:
- case X86::SHLD32rri8:
- case X86::SHLD64rri8:
- case X86::SHRD16rri8:
- case X86::SHRD32rri8:
- case X86::SHRD64rri8:
- case X86::SHUFPDrri:
- case X86::SHUFPSrri: printOperand(MI, 3); break;
- case X86::EXTRACTPSmr:
- case X86::IMUL16rmi:
- case X86::IMUL16rmi8:
- case X86::IMUL32rmi:
- case X86::IMUL32rmi8:
- case X86::IMUL64rmi32:
- case X86::IMUL64rmi8:
- case X86::MMX_PSHUFWmi:
- case X86::PCMPESTRIArm:
- case X86::PCMPESTRICrm:
- case X86::PCMPESTRIOrm:
- case X86::PCMPESTRISrm:
- case X86::PCMPESTRIZrm:
- case X86::PCMPESTRIrm:
- case X86::PCMPESTRM128rm:
- case X86::PCMPISTRIArm:
- case X86::PCMPISTRICrm:
- case X86::PCMPISTRIOrm:
- case X86::PCMPISTRISrm:
- case X86::PCMPISTRIZrm:
- case X86::PCMPISTRIrm:
- case X86::PCMPISTRM128rm:
- case X86::PEXTRBmr:
- case X86::PEXTRDmr:
- case X86::PEXTRQmr:
- case X86::PEXTRWmr:
- case X86::PSHUFDmi:
- case X86::PSHUFHWmi:
- case X86::PSHUFLWmi:
- case X86::ROUNDPDm_Int:
- case X86::ROUNDPSm_Int:
- case X86::SHLD16mri8:
- case X86::SHLD32mri8:
- case X86::SHLD64mri8:
- case X86::SHRD16mri8:
- case X86::SHRD32mri8:
- case X86::SHRD64mri8: printOperand(MI, 6); break;
- case X86::EXTRACTPSrr:
- case X86::IMUL16rri:
- case X86::IMUL16rri8:
- case X86::IMUL32rri:
- case X86::IMUL32rri8:
- case X86::IMUL64rri32:
- case X86::IMUL64rri8:
- case X86::MMX_PEXTRWri:
- case X86::MMX_PSHUFWri:
- case X86::PCMPESTRIArr:
- case X86::PCMPESTRICrr:
- case X86::PCMPESTRIOrr:
- case X86::PCMPESTRISrr:
- case X86::PCMPESTRIZrr:
- case X86::PCMPESTRIrr:
- case X86::PCMPESTRM128rr:
- case X86::PCMPISTRIArr:
- case X86::PCMPISTRICrr:
- case X86::PCMPISTRIOrr:
- case X86::PCMPISTRISrr:
- case X86::PCMPISTRIZrr:
- case X86::PCMPISTRIrr:
- case X86::PCMPISTRM128rr:
- case X86::PEXTRBrr:
- case X86::PEXTRDrr:
- case X86::PEXTRQrr:
- case X86::PEXTRWri:
- case X86::PSHUFDri:
- case X86::PSHUFHWri:
- case X86::PSHUFLWri:
- case X86::ROUNDPDr_Int:
- case X86::ROUNDPSr_Int:
- case X86::VASTART_SAVE_XMM_REGS: printOperand(MI, 2); break;
- }
- return;
- break;
- }
- return;
-}
-
-
-/// getRegisterName - This method is automatically generated by tblgen
-/// from the register set description. This returns the assembler name
-/// for the specified register.
-const char *X86IntelInstPrinter::getRegisterName(unsigned RegNo) {
- assert(RegNo && RegNo < 159 && "Invalid register number!");
-
- static const unsigned RegAsmOffset[] = {
- 0, 3, 6, 9, 12, 15, 18, 22, 25, 28, 31, 34, 37, 40,
- 43, 47, 50, 54, 58, 62, 66, 70, 74, 78, 82, 85, 88, 92,
- 96, 100, 105, 110, 115, 120, 125, 130, 135, 140, 144, 148, 152, 158,
- 162, 165, 169, 173, 177, 181, 185, 189, 193, 197, 201, 204, 207, 210,
- 214, 218, 222, 226, 230, 234, 238, 242, 246, 251, 256, 261, 265, 270,
- 275, 280, 284, 289, 294, 299, 303, 308, 313, 318, 322, 327, 332, 337,
- 341, 346, 351, 356, 359, 363, 367, 371, 374, 378, 382, 386, 390, 394,
- 398, 403, 408, 413, 418, 423, 428, 433, 438, 443, 447, 451, 455, 459,
- 463, 467, 470, 474, 477, 481, 484, 490, 496, 502, 508, 514, 520, 526,
- 532, 537, 542, 548, 554, 560, 566, 572, 578, 583, 588, 593, 598, 603,
- 608, 613, 618, 623, 628, 634, 640, 646, 652, 658, 664, 669, 674, 679,
- 684, 689, 694, 699, 0
- };
-
- const char *AsmStrs =
- "ah\000al\000ax\000bh\000bl\000bp\000bpl\000bx\000ch\000cl\000cs\000cx\000"
- "dh\000di\000dil\000dl\000dr0\000dr1\000dr2\000dr3\000dr4\000dr5\000dr6\000"
- "dr7\000ds\000dx\000eax\000ebp\000ebx\000ecr0\000ecr1\000ecr2\000ecr3\000"
- "ecr4\000ecr5\000ecr6\000ecr7\000ecx\000edi\000edx\000flags\000eip\000es"
- "\000esi\000esp\000fp0\000fp1\000fp2\000fp3\000fp4\000fp5\000fp6\000fs\000"
- "gs\000ip\000mm0\000mm1\000mm2\000mm3\000mm4\000mm5\000mm6\000mm7\000r10"
- "\000r10b\000r10d\000r10w\000r11\000r11b\000r11d\000r11w\000r12\000r12b\000"
- "r12d\000r12w\000r13\000r13b\000r13d\000r13w\000r14\000r14b\000r14d\000r"
- "14w\000r15\000r15b\000r15d\000r15w\000r8\000r8b\000r8d\000r8w\000r9\000"
- "r9b\000r9d\000r9w\000rax\000rbp\000rbx\000rcr0\000rcr1\000rcr2\000rcr3\000"
- "rcr4\000rcr5\000rcr6\000rcr7\000rcr8\000rcx\000rdi\000rdx\000rip\000rsi"
- "\000rsp\000si\000sil\000sp\000spl\000ss\000st(0)\000st(1)\000st(2)\000s"
- "t(3)\000st(4)\000st(5)\000st(6)\000st(7)\000xmm0\000xmm1\000xmm10\000xm"
- "m11\000xmm12\000xmm13\000xmm14\000xmm15\000xmm2\000xmm3\000xmm4\000xmm5"
- "\000xmm6\000xmm7\000xmm8\000xmm9\000ymm0\000ymm1\000ymm10\000ymm11\000y"
- "mm12\000ymm13\000ymm14\000ymm15\000ymm2\000ymm3\000ymm4\000ymm5\000ymm6"
- "\000ymm7\000ymm8\000ymm9\000";
- return AsmStrs+RegAsmOffset[RegNo-1];
-}
-
-
-#ifdef GET_INSTRUCTION_NAME
-#undef GET_INSTRUCTION_NAME
-
-/// getInstructionName: This method is automatically generated by tblgen
-/// from the instruction set description. This returns the enum name of the
-/// specified instruction.
-const char *X86IntelInstPrinter::getInstructionName(unsigned Opcode) {
- assert(Opcode < 2525 && "Invalid instruction number!");
-
- static const unsigned InstAsmOffset[] = {
- 0, 4, 14, 24, 33, 42, 47, 62, 76, 89, 103, 120, 130, 136,
- 145, 154, 163, 172, 180, 189, 197, 205, 214, 222, 230, 242, 251, 259,
- 268, 276, 284, 293, 301, 309, 321, 330, 340, 349, 357, 367, 376, 384,
- 392, 404, 411, 418, 425, 432, 439, 446, 457, 466, 474, 483, 491, 502,
- 510, 519, 527, 535, 544, 552, 561, 569, 580, 588, 597, 605, 613, 622,
- 632, 641, 649, 660, 670, 679, 687, 695, 702, 709, 716, 726, 733, 740,
- 747, 755, 763, 771, 779, 787, 799, 807, 819, 827, 839, 847, 859, 870,
- 881, 892, 903, 912, 921, 931, 941, 952, 962, 971, 981, 990, 1000, 1012,
- 1021, 1033, 1045, 1058, 1071, 1084, 1097, 1110, 1123, 1133, 1152, 1171, 1188, 1205,
- 1214, 1222, 1231, 1239, 1247, 1256, 1264, 1272, 1284, 1293, 1301, 1310, 1318, 1326,
- 1335, 1343, 1351, 1363, 1372, 1382, 1391, 1399, 1409, 1418, 1426, 1434, 1446, 1453,
- 1460, 1467, 1474, 1481, 1488, 1499, 1508, 1517, 1526, 1535, 1543, 1551, 1559, 1567,
- 1579, 1589, 1599, 1609, 1621, 1630, 1640, 1650, 1660, 1670, 1680, 1690, 1701, 1712,
- 1723, 1736, 1746, 1755, 1764, 1773, 1784, 1792, 1804, 1817, 1828, 1839, 1850, 1861,
- 1872, 1883, 1893, 1903, 1913, 1925, 1934, 1945, 1956, 1967, 1978, 1990, 2002, 2014,
- 2026, 2034, 2042, 2050, 2058, 2066, 2074, 2082, 2090, 2098, 2106, 2114, 2122, 2131,
- 2140, 2148, 2155, 2163, 2170, 2178, 2185, 2193, 2200, 2208, 2215, 2223, 2230, 2239,
- 2247, 2256, 2264, 2273, 2281, 2290, 2298, 2307, 2315, 2324, 2332, 2341, 2349, 2358,
- 2366, 2375, 2383, 2392, 2400, 2409, 2417, 2426, 2434, 2443, 2451, 2460, 2468, 2477,
- 2485, 2494, 2502, 2511, 2519, 2528, 2536, 2544, 2552, 2560, 2574, 2582, 2594, 2598,
- 2602, 2607, 2613, 2622, 2631, 2640, 2644, 2648, 2656, 2660, 2665, 2669, 2679, 2689,
- 2699, 2709, 2719, 2729, 2740, 2751, 2762, 2773, 2784, 2795, 2805, 2815, 2825, 2835,
- 2845, 2855, 2866, 2877, 2888, 2899, 2910, 2921, 2930, 2942, 2954, 2966, 2974, 2985,
- 2996, 3007, 3017, 3027, 3037, 3047, 3057, 3067, 3075, 3086, 3097, 3108, 3118, 3128,
- 3138, 3148, 3158, 3168, 3179, 3190, 3201, 3212, 3223, 3234, 3244, 3254, 3264, 3274,
- 3284, 3294, 3305, 3316, 3327, 3338, 3349, 3360, 3370, 3383, 3396, 3409, 3418, 3430,
- 3442, 3454, 3465, 3476, 3487, 3498, 3509, 3520, 3529, 3541, 3553, 3565, 3576, 3587,
- 3598, 3609, 3620, 3631, 3642, 3653, 3664, 3675, 3686, 3697, 3706, 3718, 3730, 3742,
- 3753, 3764, 3775, 3786, 3797, 3808, 3818, 3828, 3838, 3848, 3858, 3868, 3878, 3888,
- 3898, 3908, 3918, 3928, 3936, 3947, 3958, 3969, 3979, 3989, 3999, 4009, 4019, 4029,
- 4039, 4049, 4058, 4069, 4080, 4091, 4102, 4111, 4119, 4128, 4136, 4147, 4155, 4164,
- 4172, 4180, 4189, 4197, 4206, 4214, 4225, 4233, 4242, 4250, 4258, 4267, 4277, 4286,
- 4294, 4305, 4315, 4324, 4332, 4340, 4347, 4354, 4361, 4371, 4378, 4385, 4392, 4401,
- 4410, 4419, 4428, 4435, 4442, 4449, 4455, 4463, 4471, 4479, 4487, 4498, 4510, 4522,
- 4534, 4546, 4558, 4570, 4580, 4591, 4602, 4611, 4620, 4629, 4638, 4649, 4658, 4666,
- 4676, 4682, 4691, 4700, 4709, 4715, 4719, 4728, 4737, 4745, 4754, 4763, 4771, 4780,
- 4789, 4799, 4810, 4821, 4832, 4843, 4854, 4865, 4876, 4887, 4898, 4909, 4920, 4931,
- 4944, 4957, 4968, 4979, 4992, 5005, 5016, 5027, 5040, 5053, 5064, 5075, 5086, 5097,
- 5110, 5123, 5134, 5145, 5157, 5169, 5183, 5197, 5209, 5221, 5235, 5249, 5261, 5273,
- 5277, 5282, 5289, 5296, 5303, 5310, 5320, 5330, 5340, 5350, 5357, 5364, 5370, 5376,
- 5383, 5390, 5397, 5404, 5411, 5418, 5424, 5430, 5438, 5446, 5454, 5462, 5472, 5482,
- 5493, 5504, 5516, 5527, 5538, 5549, 5562, 5575, 5588, 5602, 5616, 5630, 5644, 5658,
- 5672, 5683, 5691, 5703, 5711, 5723, 5731, 5743, 5751, 5763, 5772, 5781, 5791, 5801,
- 5812, 5822, 5831, 5841, 5850, 5860, 5872, 5881, 5893, 5905, 5918, 5931, 5944, 5957,
- 5970, 5983, 5993, 6001, 6009, 6017, 6025, 6035, 6045, 6057, 6063, 6073, 6085, 6097,
- 6103, 6114, 6125, 6136, 6147, 6157, 6167, 6177, 6187, 6197, 6206, 6212, 6219, 6227,
- 6235, 6244, 6253, 6260, 6268, 6274, 6283, 6292, 6302, 6312, 6320, 6329, 6337, 6344,
- 6351, 6358, 6365, 6371, 6378, 6385, 6390, 6400, 6409, 6417, 6438, 6459, 6480, 6501,
- 6522, 6543, 6564, 6585, 6606, 6613, 6619, 6626, 6632, 6644, 6652, 6660, 6667, 6674,
- 6682, 6690, 6701, 6711, 6716, 6724, 6731, 6739, 6745, 6753, 6766, 6779, 6792, 6805,
- 6818, 6831, 6844, 6857, 6870, 6883, 6896, 6909, 6920, 6931, 6942, 6953, 6963, 6973,
- 6983, 6993, 7002, 7011, 7022, 7033, 7044, 7055, 7064, 7073, 7082, 7091, 7101, 7111,
- 7121, 7131, 7142, 7152, 7161, 7170, 7179, 7188, 7192, 7201, 7210, 7219, 7228, 7236,
- 7244, 7252, 7260, 7268, 7276, 7283, 7290, 7299, 7308, 7317, 7329, 7341, 7353, 7365,
- 7377, 7389, 7401, 7413, 7425, 7433, 7441, 7450, 7460, 7471, 7480, 7490, 7501, 7509,
- 7517, 7526, 7536, 7547, 7556, 7566, 7577, 7585, 7593, 7602, 7614, 7625, 7634, 7646,
- 7657, 7664, 7671, 7676, 7683, 7690, 7695, 7702, 7709, 7713, 7719, 7725, 7732, 7739,
- 7746, 7753, 7763, 7773, 7783, 7793, 7800, 7807, 7813, 7819, 7830, 7841, 7845, 7850,
- 7855, 7862, 7869, 7877, 7884, 7891, 7898, 7909, 7920, 7931, 7944, 7957, 7970, 7983,
- 7996, 8009, 8022, 8035, 8048, 8057, 8066, 8076, 8086, 8096, 8108, 8120, 8132, 8144,
- 8156, 8168, 8180, 8192, 8204, 8216, 8228, 8240, 8252, 8265, 8278, 8291, 8304, 8319,
- 8334, 8349, 8364, 8379, 8394, 8409, 8424, 8439, 8454, 8469, 8484, 8499, 8514, 8529,
- 8544, 8559, 8574, 8589, 8604, 8621, 8638, 8653, 8668, 8683, 8698, 8715, 8732, 8747,
- 8762, 8779, 8796, 8811, 8826, 8841, 8856, 8873, 8890, 8905, 8920, 8936, 8952, 8968,
- 8984, 9000, 9016, 9032, 9048, 9066, 9084, 9100, 9116, 9134, 9152, 9168, 9184, 9198,
- 9212, 9226, 9240, 9246, 9252, 9257, 9262, 9268, 9274, 9279, 9284, 9290, 9295, 9300,
- 9306, 9312, 9317, 9322, 9328, 9334, 9339, 9344, 9351, 9358, 9365, 9378, 9385, 9391,
- 9397, 9403, 9409, 9415, 9421, 9427, 9433, 9439, 9445, 9450, 9455, 9460, 9465, 9470,
- 9475, 9480, 9488, 9496, 9504, 9512, 9520, 9528, 9539, 9550, 9561, 9571, 9582, 9590,
- 9598, 9606, 9614, 9620, 9626, 9634, 9642, 9650, 9659, 9668, 9677, 9686, 9695, 9704,
- 9713, 9724, 9735, 9744, 9755, 9764, 9771, 9778, 9785, 9795, 9802, 9808, 9816, 9824,
- 9832, 9839, 9847, 9855, 9863, 9869, 9877, 9885, 9893, 9899, 9907, 9915, 9923, 9931,
- 9944, 9958, 9971, 9984, 9998, 10011, 10026, 10040, 10053, 10065, 10077, 10089, 10101, 10113,
- 10124, 10136, 10148, 10160, 10171, 10183, 10196, 10210, 10223, 10236, 10250, 10263, 10278, 10292,
- 10305, 10317, 10329, 10335, 10341, 10347, 10353, 10358, 10364, 10371, 10376, 10382, 10390, 10398,
- 10406, 10414, 10422, 10430, 10438, 10446, 10454, 10459, 10464, 10472, 10480, 10488, 10495, 10506,
- 10519, 10527, 10539, 10547, 10559, 10567, 10579, 10587, 10599, 10607, 10619, 10627, 10639, 10647,
- 10659, 10667, 10679, 10686, 10699, 10707, 10719, 10727, 10739, 10747, 10759, 10767, 10779, 10787,
- 10799, 10807, 10819, 10827, 10839, 10847, 10859, 10874, 10889, 10904, 10919, 10934, 10949, 10964,
- 10979, 10995, 11011, 11027, 11043, 11052, 11062, 11075, 11090, 11109, 11123, 11136, 11149, 11162,
- 11179, 11196, 11210, 11223, 11237, 11253, 11267, 11280, 11293, 11306, 11323, 11340, 11355, 11370,
- 11385, 11400, 11415, 11430, 11442, 11454, 11466, 11478, 11490, 11502, 11515, 11528, 11541, 11554,
- 11568, 11582, 11596, 11610, 11622, 11634, 11646, 11658, 11669, 11680, 11692, 11704, 11716, 11728,
- 11742, 11756, 11770, 11784, 11798, 11812, 11826, 11840, 11854, 11868, 11882, 11896, 11909, 11923,
- 11937, 11951, 11965, 11978, 11991, 12004, 12017, 12030, 12043, 12056, 12069, 12084, 12098, 12112,
- 12125, 12138, 12151, 12164, 12178, 12192, 12202, 12212, 12225, 12238, 12251, 12264, 12276, 12288,
- 12300, 12312, 12324, 12336, 12348, 12360, 12372, 12384, 12396, 12408, 12420, 12432, 12444, 12456,
- 12468, 12480, 12492, 12504, 12516, 12528, 12540, 12552, 12564, 12576, 12588, 12600, 12612, 12624,
- 12637, 12650, 12663, 12676, 12690, 12704, 12718, 12732, 12744, 12756, 12772, 12788, 12804, 12820,
- 12836, 12852, 12868, 12884, 12900, 12916, 12932, 12948, 12959, 12970, 12981, 12998, 13006, 13016,
- 13024, 13032, 13040, 13050, 13058, 13066, 13074, 13082, 13094, 13102, 13110, 13118, 13128, 13136,
- 13144, 13152, 13160, 13170, 13178, 13186, 13194, 13202, 13210, 13218, 13230, 13240, 13250, 13260,
- 13269, 13277, 13285, 13295, 13303, 13311, 13321, 13330, 13338, 13346, 13354, 13362, 13372, 13385,
- 13393, 13401, 13413, 13421, 13429, 13437, 13450, 13462, 13474, 13482, 13489, 13496, 13509, 13517,
- 13524, 13531, 13538, 13551, 13558, 13571, 13582, 13591, 13600, 13609, 13618, 13627, 13636, 13646,
- 13656, 13668, 13680, 13691, 13702, 13711, 13720, 13729, 13738, 13751, 13760, 13773, 13783, 13792,
- 13801, 13810, 13819, 13829, 13838, 13847, 13856, 13865, 13876, 13887, 13898, 13909, 13922, 13932,
- 13946, 13958, 13967, 13980, 13990, 14004, 14014, 14028, 14037, 14049, 14061, 14073, 14086, 14098,
- 14107, 14113, 14119, 14127, 14135, 14143, 14155, 14167, 14178, 14189, 14200, 14211, 14222, 14233,
- 14241, 14249, 14257, 14263, 14274, 14286, 14297, 14309, 14321, 14332, 14344, 14355, 14367, 14379,
- 14390, 14402, 14414, 14425, 14434, 14447, 14456, 14469, 14478, 14487, 14500, 14509, 14522, 14531,
- 14544, 14557, 14573, 14589, 14602, 14615, 14626, 14638, 14649, 14661, 14678, 14695, 14707, 14718,
- 14730, 14741, 14753, 14767, 14779, 14790, 14803, 14815, 14829, 14841, 14852, 14865, 14876, 14887,
- 14898, 14909, 14920, 14931, 14942, 14953, 14964, 14975, 14986, 14993, 15000, 15007, 15014, 15021,
- 15028, 15034, 15040, 15048, 15056, 15064, 15072, 15080, 15092, 15100, 15112, 15120, 15132, 15140,
- 15152, 15161, 15170, 15180, 15190, 15201, 15211, 15220, 15230, 15239, 15249, 15261, 15270, 15282,
- 15294, 15307, 15320, 15333, 15346, 15359, 15372, 15382, 15388, 15395, 15402, 15409, 15416, 15423,
- 15430, 15436, 15442, 15447, 15453, 15459, 15466, 15473, 15480, 15487, 15494, 15501, 15507, 15513,
- 15521, 15528, 15536, 15543, 15550, 15558, 15565, 15572, 15583, 15591, 15598, 15606, 15613, 15620,
- 15628, 15635, 15642, 15653, 15661, 15670, 15678, 15685, 15694, 15702, 15709, 15716, 15727, 15733,
- 15739, 15745, 15751, 15757, 15763, 15773, 15780, 15787, 15794, 15801, 15809, 15817, 15825, 15833,
- 15840, 15847, 15853, 15859, 15865, 15876, 15886, 15897, 15907, 15918, 15928, 15939, 15949, 15960,
- 15970, 15981, 15991, 16002, 16013, 16024, 16035, 16046, 16057, 16068, 16079, 16087, 16095, 16103,
- 16111, 16119, 16127, 16136, 16145, 16154, 16163, 16173, 16183, 16193, 16203, 16211, 16219, 16232,
- 16245, 16257, 16269, 16277, 16285, 16292, 16299, 16307, 16315, 16323, 16331, 16343, 16355, 16366,
- 16377, 16387, 16397, 16407, 16417, 16427, 16437, 16447, 16457, 16470, 16483, 16496, 16509, 16522,
- 16535, 16548, 16561, 16574, 16587, 16599, 16611, 16627, 16643, 16658, 16673, 16683, 16693, 16703,
- 16713, 16723, 16733, 16743, 16753, 16766, 16779, 16792, 16805, 16818, 16831, 16844, 16857, 16870,
- 16883, 16895, 16907, 16923, 16939, 16954, 16969, 16978, 16987, 16996, 17005, 17014, 17023, 17032,
- 17041, 17053, 17064, 17076, 17087, 17100, 17112, 17125, 17137, 17149, 17160, 17172, 17183, 17199,
- 17215, 17227, 17238, 17250, 17261, 17274, 17286, 17299, 17311, 17323, 17334, 17346, 17357, 17366,
- 17375, 17384, 17393, 17402, 17411, 17421, 17431, 17446, 17460, 17475, 17489, 17499, 17509, 17518,
- 17527, 17536, 17545, 17554, 17563, 17572, 17581, 17590, 17599, 17608, 17617, 17626, 17635, 17644,
- 17653, 17662, 17671, 17680, 17689, 17698, 17707, 17716, 17725, 17736, 17747, 17758, 17769, 17780,
- 17791, 17802, 17813, 17824, 17835, 17846, 17857, 17868, 17879, 17890, 17901, 17912, 17923, 17934,
- 17945, 17956, 17967, 17978, 17989, 18000, 18009, 18018, 18032, 18045, 18059, 18072, 18082, 18092,
- 18101, 18110, 18119, 18132, 18141, 18154, 18163, 18172, 18182, 18192, 18199, 18208, 18217, 18224,
- 18233, 18242, 18249, 18258, 18267, 18278, 18289, 18300, 18311, 18322, 18333, 18338, 18344, 18350,
- 18358, 18366, 18374, 18382, 18390, 18398, 18404, 18410, 18422, 18433, 18444, 18455, 18464, 18473,
- 18485, 18496, 18508, 18519, 18528, 18537, 18547, 18557, 18567, 18577, 18589, 18600, 18612, 18623,
- 18635, 18646, 18658, 18669, 18681, 18692, 18704, 18715, 18724, 18732, 18740, 18748, 18756, 18764,
- 18772, 18780, 18788, 18796, 18804, 18812, 18820, 18828, 18836, 18844, 18853, 18861, 18869, 18877,
- 18885, 18893, 18901, 18909, 18917, 18925, 18933, 18941, 18949, 18957, 18965, 18973, 18982, 18991,
- 19000, 19009, 19019, 19029, 19039, 19049, 19057, 19065, 19073, 19081, 19093, 19105, 19117, 19129,
- 19142, 19155, 19167, 19179, 19191, 19203, 19215, 19227, 19240, 19253, 19265, 19277, 19285, 19295,
- 19305, 19315, 19325, 19334, 19342, 19352, 19362, 19372, 19382, 19391, 19399, 19409, 19419, 19425,
- 19432, 19441, 19450, 19459, 19468, 19477, 19486, 19495, 19502, 19509, 19517, 19526, 19534, 19542,
- 19551, 19559, 19567, 19576, 19584, 19592, 19601, 19609, 19617, 19626, 19634, 19642, 19651, 19659,
- 19666, 19674, 19681, 19688, 19696, 19703, 19710, 19721, 19728, 19739, 19746, 19757, 19764, 19775,
- 19783, 19792, 19800, 19808, 19817, 19825, 19833, 19842, 19850, 19858, 19867, 19875, 19883, 19892,
- 19900, 19908, 19917, 19925, 19932, 19940, 19947, 19954, 19962, 19969, 19975, 19981, 19987, 19994,
- 20007, 20017, 20027, 20037, 20047, 20058, 20068, 20078, 20088, 20098, 20102, 20107, 20115, 20124,
- 20132, 20140, 20149, 20157, 20165, 20174, 20182, 20190, 20199, 20207, 20215, 20224, 20232, 20240,
- 20249, 20257, 20264, 20272, 20279, 20286, 20294, 20301, 20309, 20318, 20326, 20334, 20343, 20351,
- 20359, 20368, 20376, 20384, 20393, 20401, 20409, 20418, 20426, 20434, 20443, 20451, 20458, 20466,
- 20473, 20480, 20488, 20495, 20508, 20521, 20534, 20547, 20560, 20573, 20586, 20599, 20603, 20612,
- 20625, 20634, 20647, 20656, 20669, 20678, 20691, 20696, 20704, 20713, 20721, 20729, 20738, 20746,
- 20754, 20763, 20771, 20779, 20788, 20796, 20804, 20813, 20821, 20829, 20838, 20846, 20853, 20861,
- 20868, 20875, 20883, 20890, 20899, 20907, 20916, 20924, 20932, 20941, 20949, 20957, 20969, 20978,
- 20986, 20995, 21003, 21011, 21020, 21028, 21036, 21048, 21057, 21067, 21076, 21084, 21094, 21103,
- 21111, 21119, 21131, 21138, 21145, 21152, 21159, 21166, 21173, 21184, 21191, 21198, 21205, 21211,
- 21218, 21225, 21231, 21237, 21244, 21251, 21261, 21271, 21281, 21290, 21296, 21302, 21308, 21314,
- 21321, 21328, 21334, 21340, 21347, 21354, 21360, 21366, 21373, 21380, 21387, 21394, 21401, 21408,
- 21415, 21422, 21428, 21434, 21440, 21446, 21452, 21458, 21465, 21471, 21479, 21488, 21496, 21504,
- 21513, 21521, 21529, 21538, 21546, 21554, 21563, 21571, 21579, 21588, 21596, 21604, 21613, 21621,
- 21628, 21636, 21643, 21650, 21658, 21665, 21676, 21687, 21698, 21709, 21720, 21731, 21742, 21753,
- 21764, 21775, 21786, 21797, 21805, 21814, 21822, 21830, 21839, 21847, 21855, 21864, 21872, 21880,
- 21889, 21897, 21905, 21914, 21922, 21930, 21939, 21947, 21954, 21962, 21969, 21976, 21984, 21991,
- 22002, 22013, 22024, 22035, 22046, 22057, 22068, 22079, 22090, 22101, 22112, 22123, 22133, 22143,
- 22153, 22163, 22169, 22175, 22184, 22193, 22202, 22210, 22218, 22226, 22234, 22242, 22250, 22258,
- 22266, 22274, 22286, 22294, 22306, 22314, 22326, 22334, 22346, 22354, 22366, 22374, 22386, 22394,
- 22406, 22414, 22426, 22433, 22443, 22453, 22463, 22473, 22477, 22481, 22485, 22493, 22499, 22505,
- 22511, 22516, 22521, 22529, 22537, 22546, 22555, 22564, 22572, 22581, 22590, 22601, 22612, 22623,
- 22633, 22643, 22655, 22665, 22677, 22689, 22696, 22705, 22713, 22722, 22730, 22738, 22747, 22755,
- 22763, 22775, 22784, 22792, 22801, 22809, 22817, 22826, 22834, 22842, 22854, 22863, 22873, 22882,
- 22890, 22900, 22909, 22917, 22925, 22937, 22944, 22951, 22958, 22965, 22972, 22979, 22990, 22998,
- 23006, 23014, 23022, 23032, 23042, 23053, 23064, 23076, 23087, 23098, 23109, 23122, 23135, 23148,
- 23162, 23176, 23190, 23204, 23218, 23232, 23243, 23251, 23263, 23271, 23283, 23291, 23303, 23311,
- 23323, 23332, 23341, 23351, 23361, 23372, 23382, 23391, 23401, 23410, 23420, 23432, 23441, 23453,
- 23465, 23478, 23491, 23504, 23517, 23530, 23543, 23553, 23560, 23568, 23577, 23585, 23595, 23602,
- 23611, 23620, 23629, 23640, 23651, 23664, 23675, 23688, 23698, 23707, 23716, 23725, 23734, 23744,
- 23753, 23762, 23771, 23780, 23790, 23801, 23812, 23821, 23830, 23838, 23846, 23854, 23862, 23870,
- 23881, 23892, 23897, 23903, 23912, 23921, 23930, 23940, 23950, 23960, 23970, 23980, 23989, 23999,
- 24008, 24020, 24032, 24044, 24055, 24066, 24077, 24085, 24096, 24107, 24118, 24129, 24140, 24151,
- 24162, 24173, 24195, 24201, 24207, 24213, 24219, 24226, 24235, 24244, 24253, 24262, 24273, 24284,
- 24295, 24306, 24315, 24327, 24339, 24351, 24363, 24370, 24376, 24383, 24396, 24401, 24408, 24419,
- 24436, 24447, 24453, 24462, 24471, 24480, 24489, 24498, 24507, 24515, 24523, 24532, 24541, 24550,
- 24559, 24568, 24577, 24586, 24595, 24604, 24612, 24620, 24626, 24631, 24640, 24648, 24657, 24665,
- 24673, 24682, 24690, 24698, 24710, 24719, 24727, 24736, 24744, 24752, 24761, 24769, 24777, 24789,
- 24798, 24808, 24817, 24825, 24835, 24844, 24852, 24860, 24872, 24879, 24886, 24893, 24900, 24907,
- 24914, 24925, 24933, 24941, 24949, 0
- };
-
- const char *Strs =
- "PHI\000INLINEASM\000DBG_LABEL\000EH_LABEL\000GC_LABEL\000KILL\000EXTRAC"
- "T_SUBREG\000INSERT_SUBREG\000IMPLICIT_DEF\000SUBREG_TO_REG\000COPY_TO_R"
- "EGCLASS\000DBG_VALUE\000ABS_F\000ABS_Fp32\000ABS_Fp64\000ABS_Fp80\000AD"
- "C16i16\000ADC16mi\000ADC16mi8\000ADC16mr\000ADC16ri\000ADC16ri8\000ADC1"
- "6rm\000ADC16rr\000ADC16rr_REV\000ADC32i32\000ADC32mi\000ADC32mi8\000ADC"
- "32mr\000ADC32ri\000ADC32ri8\000ADC32rm\000ADC32rr\000ADC32rr_REV\000ADC"
- "64i32\000ADC64mi32\000ADC64mi8\000ADC64mr\000ADC64ri32\000ADC64ri8\000A"
- "DC64rm\000ADC64rr\000ADC64rr_REV\000ADC8i8\000ADC8mi\000ADC8mr\000ADC8r"
- "i\000ADC8rm\000ADC8rr\000ADC8rr_REV\000ADD16i16\000ADD16mi\000ADD16mi8\000"
- "ADD16mr\000ADD16mrmrr\000ADD16ri\000ADD16ri8\000ADD16rm\000ADD16rr\000A"
- "DD32i32\000ADD32mi\000ADD32mi8\000ADD32mr\000ADD32mrmrr\000ADD32ri\000A"
- "DD32ri8\000ADD32rm\000ADD32rr\000ADD64i32\000ADD64mi32\000ADD64mi8\000A"
- "DD64mr\000ADD64mrmrr\000ADD64ri32\000ADD64ri8\000ADD64rm\000ADD64rr\000"
- "ADD8i8\000ADD8mi\000ADD8mr\000ADD8mrmrr\000ADD8ri\000ADD8rm\000ADD8rr\000"
- "ADDPDrm\000ADDPDrr\000ADDPSrm\000ADDPSrr\000ADDSDrm\000ADDSDrm_Int\000A"
- "DDSDrr\000ADDSDrr_Int\000ADDSSrm\000ADDSSrm_Int\000ADDSSrr\000ADDSSrr_I"
- "nt\000ADDSUBPDrm\000ADDSUBPDrr\000ADDSUBPSrm\000ADDSUBPSrr\000ADD_F32m\000"
- "ADD_F64m\000ADD_FI16m\000ADD_FI32m\000ADD_FPrST0\000ADD_FST0r\000ADD_Fp"
- "32\000ADD_Fp32m\000ADD_Fp64\000ADD_Fp64m\000ADD_Fp64m32\000ADD_Fp80\000"
- "ADD_Fp80m32\000ADD_Fp80m64\000ADD_FpI16m32\000ADD_FpI16m64\000ADD_FpI16"
- "m80\000ADD_FpI32m32\000ADD_FpI32m64\000ADD_FpI32m80\000ADD_FrST0\000ADJ"
- "CALLSTACKDOWN32\000ADJCALLSTACKDOWN64\000ADJCALLSTACKUP32\000ADJCALLSTA"
- "CKUP64\000AND16i16\000AND16mi\000AND16mi8\000AND16mr\000AND16ri\000AND1"
- "6ri8\000AND16rm\000AND16rr\000AND16rr_REV\000AND32i32\000AND32mi\000AND"
- "32mi8\000AND32mr\000AND32ri\000AND32ri8\000AND32rm\000AND32rr\000AND32r"
- "r_REV\000AND64i32\000AND64mi32\000AND64mi8\000AND64mr\000AND64ri32\000A"
- "ND64ri8\000AND64rm\000AND64rr\000AND64rr_REV\000AND8i8\000AND8mi\000AND"
- "8mr\000AND8ri\000AND8rm\000AND8rr\000AND8rr_REV\000ANDNPDrm\000ANDNPDrr"
- "\000ANDNPSrm\000ANDNPSrr\000ANDPDrm\000ANDPDrr\000ANDPSrm\000ANDPSrr\000"
- "ATOMADD6432\000ATOMAND16\000ATOMAND32\000ATOMAND64\000ATOMAND6432\000AT"
- "OMAND8\000ATOMMAX16\000ATOMMAX32\000ATOMMAX64\000ATOMMIN16\000ATOMMIN32"
- "\000ATOMMIN64\000ATOMNAND16\000ATOMNAND32\000ATOMNAND64\000ATOMNAND6432"
- "\000ATOMNAND8\000ATOMOR16\000ATOMOR32\000ATOMOR64\000ATOMOR6432\000ATOM"
- "OR8\000ATOMSUB6432\000ATOMSWAP6432\000ATOMUMAX16\000ATOMUMAX32\000ATOMU"
- "MAX64\000ATOMUMIN16\000ATOMUMIN32\000ATOMUMIN64\000ATOMXOR16\000ATOMXOR"
- "32\000ATOMXOR64\000ATOMXOR6432\000ATOMXOR8\000BLENDPDrmi\000BLENDPDrri\000"
- "BLENDPSrmi\000BLENDPSrri\000BLENDVPDrm0\000BLENDVPDrr0\000BLENDVPSrm0\000"
- "BLENDVPSrr0\000BSF16rm\000BSF16rr\000BSF32rm\000BSF32rr\000BSF64rm\000B"
- "SF64rr\000BSR16rm\000BSR16rr\000BSR32rm\000BSR32rr\000BSR64rm\000BSR64r"
- "r\000BSWAP32r\000BSWAP64r\000BT16mi8\000BT16mr\000BT16ri8\000BT16rr\000"
- "BT32mi8\000BT32mr\000BT32ri8\000BT32rr\000BT64mi8\000BT64mr\000BT64ri8\000"
- "BT64rr\000BTC16mi8\000BTC16mr\000BTC16ri8\000BTC16rr\000BTC32mi8\000BTC"
- "32mr\000BTC32ri8\000BTC32rr\000BTC64mi8\000BTC64mr\000BTC64ri8\000BTC64"
- "rr\000BTR16mi8\000BTR16mr\000BTR16ri8\000BTR16rr\000BTR32mi8\000BTR32mr"
- "\000BTR32ri8\000BTR32rr\000BTR64mi8\000BTR64mr\000BTR64ri8\000BTR64rr\000"
- "BTS16mi8\000BTS16mr\000BTS16ri8\000BTS16rr\000BTS32mi8\000BTS32mr\000BT"
- "S32ri8\000BTS32rr\000BTS64mi8\000BTS64mr\000BTS64ri8\000BTS64rr\000CALL"
- "32m\000CALL32r\000CALL64m\000CALL64pcrel32\000CALL64r\000CALLpcrel32\000"
- "CBW\000CDQ\000CDQE\000CHS_F\000CHS_Fp32\000CHS_Fp64\000CHS_Fp80\000CLC\000"
- "CLD\000CLFLUSH\000CLI\000CLTS\000CMC\000CMOVA16rm\000CMOVA16rr\000CMOVA"
- "32rm\000CMOVA32rr\000CMOVA64rm\000CMOVA64rr\000CMOVAE16rm\000CMOVAE16rr"
- "\000CMOVAE32rm\000CMOVAE32rr\000CMOVAE64rm\000CMOVAE64rr\000CMOVB16rm\000"
- "CMOVB16rr\000CMOVB32rm\000CMOVB32rr\000CMOVB64rm\000CMOVB64rr\000CMOVBE"
- "16rm\000CMOVBE16rr\000CMOVBE32rm\000CMOVBE32rr\000CMOVBE64rm\000CMOVBE6"
- "4rr\000CMOVBE_F\000CMOVBE_Fp32\000CMOVBE_Fp64\000CMOVBE_Fp80\000CMOVB_F"
- "\000CMOVB_Fp32\000CMOVB_Fp64\000CMOVB_Fp80\000CMOVE16rm\000CMOVE16rr\000"
- "CMOVE32rm\000CMOVE32rr\000CMOVE64rm\000CMOVE64rr\000CMOVE_F\000CMOVE_Fp"
- "32\000CMOVE_Fp64\000CMOVE_Fp80\000CMOVG16rm\000CMOVG16rr\000CMOVG32rm\000"
- "CMOVG32rr\000CMOVG64rm\000CMOVG64rr\000CMOVGE16rm\000CMOVGE16rr\000CMOV"
- "GE32rm\000CMOVGE32rr\000CMOVGE64rm\000CMOVGE64rr\000CMOVL16rm\000CMOVL1"
- "6rr\000CMOVL32rm\000CMOVL32rr\000CMOVL64rm\000CMOVL64rr\000CMOVLE16rm\000"
- "CMOVLE16rr\000CMOVLE32rm\000CMOVLE32rr\000CMOVLE64rm\000CMOVLE64rr\000C"
- "MOVNBE_F\000CMOVNBE_Fp32\000CMOVNBE_Fp64\000CMOVNBE_Fp80\000CMOVNB_F\000"
- "CMOVNB_Fp32\000CMOVNB_Fp64\000CMOVNB_Fp80\000CMOVNE16rm\000CMOVNE16rr\000"
- "CMOVNE32rm\000CMOVNE32rr\000CMOVNE64rm\000CMOVNE64rr\000CMOVNE_F\000CMO"
- "VNE_Fp32\000CMOVNE_Fp64\000CMOVNE_Fp80\000CMOVNO16rm\000CMOVNO16rr\000C"
- "MOVNO32rm\000CMOVNO32rr\000CMOVNO64rm\000CMOVNO64rr\000CMOVNP16rm\000CM"
- "OVNP16rr\000CMOVNP32rm\000CMOVNP32rr\000CMOVNP64rm\000CMOVNP64rr\000CMO"
- "VNP_F\000CMOVNP_Fp32\000CMOVNP_Fp64\000CMOVNP_Fp80\000CMOVNS16rm\000CMO"
- "VNS16rr\000CMOVNS32rm\000CMOVNS32rr\000CMOVNS64rm\000CMOVNS64rr\000CMOV"
- "O16rm\000CMOVO16rr\000CMOVO32rm\000CMOVO32rr\000CMOVO64rm\000CMOVO64rr\000"
- "CMOVP16rm\000CMOVP16rr\000CMOVP32rm\000CMOVP32rr\000CMOVP64rm\000CMOVP6"
- "4rr\000CMOVP_F\000CMOVP_Fp32\000CMOVP_Fp64\000CMOVP_Fp80\000CMOVS16rm\000"
- "CMOVS16rr\000CMOVS32rm\000CMOVS32rr\000CMOVS64rm\000CMOVS64rr\000CMOV_F"
- "R32\000CMOV_FR64\000CMOV_GR8\000CMOV_V1I64\000CMOV_V2F64\000CMOV_V2I64\000"
- "CMOV_V4F32\000CMP16i16\000CMP16mi\000CMP16mi8\000CMP16mr\000CMP16mrmrr\000"
- "CMP16ri\000CMP16ri8\000CMP16rm\000CMP16rr\000CMP32i32\000CMP32mi\000CMP"
- "32mi8\000CMP32mr\000CMP32mrmrr\000CMP32ri\000CMP32ri8\000CMP32rm\000CMP"
- "32rr\000CMP64i32\000CMP64mi32\000CMP64mi8\000CMP64mr\000CMP64mrmrr\000C"
- "MP64ri32\000CMP64ri8\000CMP64rm\000CMP64rr\000CMP8i8\000CMP8mi\000CMP8m"
- "r\000CMP8mrmrr\000CMP8ri\000CMP8rm\000CMP8rr\000CMPPDrmi\000CMPPDrri\000"
- "CMPPSrmi\000CMPPSrri\000CMPS16\000CMPS32\000CMPS64\000CMPS8\000CMPSDrm\000"
- "CMPSDrr\000CMPSSrm\000CMPSSrr\000CMPXCHG16B\000CMPXCHG16rm\000CMPXCHG16"
- "rr\000CMPXCHG32rm\000CMPXCHG32rr\000CMPXCHG64rm\000CMPXCHG64rr\000CMPXC"
- "HG8B\000CMPXCHG8rm\000CMPXCHG8rr\000COMISDrm\000COMISDrr\000COMISSrm\000"
- "COMISSrr\000COMP_FST0r\000COM_FIPr\000COM_FIr\000COM_FST0r\000COS_F\000"
- "COS_Fp32\000COS_Fp64\000COS_Fp80\000CPUID\000CQO\000CRC32m16\000CRC32m3"
- "2\000CRC32m8\000CRC32r16\000CRC32r32\000CRC32r8\000CRC64m64\000CRC64r64"
- "\000CS_PREFIX\000CVTDQ2PDrm\000CVTDQ2PDrr\000CVTDQ2PSrm\000CVTDQ2PSrr\000"
- "CVTPD2DQrm\000CVTPD2DQrr\000CVTPD2PSrm\000CVTPD2PSrr\000CVTPS2DQrm\000C"
- "VTPS2DQrr\000CVTPS2PDrm\000CVTPS2PDrr\000CVTSD2SI64rm\000CVTSD2SI64rr\000"
- "CVTSD2SSrm\000CVTSD2SSrr\000CVTSI2SD64rm\000CVTSI2SD64rr\000CVTSI2SDrm\000"
- "CVTSI2SDrr\000CVTSI2SS64rm\000CVTSI2SS64rr\000CVTSI2SSrm\000CVTSI2SSrr\000"
- "CVTSS2SDrm\000CVTSS2SDrr\000CVTSS2SI64rm\000CVTSS2SI64rr\000CVTSS2SIrm\000"
- "CVTSS2SIrr\000CVTTPS2DQrm\000CVTTPS2DQrr\000CVTTSD2SI64rm\000CVTTSD2SI6"
- "4rr\000CVTTSD2SIrm\000CVTTSD2SIrr\000CVTTSS2SI64rm\000CVTTSS2SI64rr\000"
- "CVTTSS2SIrm\000CVTTSS2SIrr\000CWD\000CWDE\000DEC16m\000DEC16r\000DEC32m"
- "\000DEC32r\000DEC64_16m\000DEC64_16r\000DEC64_32m\000DEC64_32r\000DEC64"
- "m\000DEC64r\000DEC8m\000DEC8r\000DIV16m\000DIV16r\000DIV32m\000DIV32r\000"
- "DIV64m\000DIV64r\000DIV8m\000DIV8r\000DIVPDrm\000DIVPDrr\000DIVPSrm\000"
- "DIVPSrr\000DIVR_F32m\000DIVR_F64m\000DIVR_FI16m\000DIVR_FI32m\000DIVR_F"
- "PrST0\000DIVR_FST0r\000DIVR_Fp32m\000DIVR_Fp64m\000DIVR_Fp64m32\000DIVR"
- "_Fp80m32\000DIVR_Fp80m64\000DIVR_FpI16m32\000DIVR_FpI16m64\000DIVR_FpI1"
- "6m80\000DIVR_FpI32m32\000DIVR_FpI32m64\000DIVR_FpI32m80\000DIVR_FrST0\000"
- "DIVSDrm\000DIVSDrm_Int\000DIVSDrr\000DIVSDrr_Int\000DIVSSrm\000DIVSSrm_"
- "Int\000DIVSSrr\000DIVSSrr_Int\000DIV_F32m\000DIV_F64m\000DIV_FI16m\000D"
- "IV_FI32m\000DIV_FPrST0\000DIV_FST0r\000DIV_Fp32\000DIV_Fp32m\000DIV_Fp6"
- "4\000DIV_Fp64m\000DIV_Fp64m32\000DIV_Fp80\000DIV_Fp80m32\000DIV_Fp80m64"
- "\000DIV_FpI16m32\000DIV_FpI16m64\000DIV_FpI16m80\000DIV_FpI32m32\000DIV"
- "_FpI32m64\000DIV_FpI32m80\000DIV_FrST0\000DPPDrmi\000DPPDrri\000DPPSrmi"
- "\000DPPSrri\000DS_PREFIX\000EH_RETURN\000EH_RETURN64\000ENTER\000ES_PRE"
- "FIX\000EXTRACTPSmr\000EXTRACTPSrr\000F2XM1\000FARCALL16i\000FARCALL16m\000"
- "FARCALL32i\000FARCALL32m\000FARCALL64\000FARJMP16i\000FARJMP16m\000FARJ"
- "MP32i\000FARJMP32m\000FARJMP64\000FBLDm\000FBSTPm\000FCOM32m\000FCOM64m"
- "\000FCOMP32m\000FCOMP64m\000FCOMPP\000FDECSTP\000FFREE\000FICOM16m\000F"
- "ICOM32m\000FICOMP16m\000FICOMP32m\000FINCSTP\000FLDCW16m\000FLDENVm\000"
- "FLDL2E\000FLDL2T\000FLDLG2\000FLDLN2\000FLDPI\000FNCLEX\000FNINIT\000FN"
- "OP\000FNSTCW16m\000FNSTSW8r\000FNSTSWm\000FP32_TO_INT16_IN_MEM\000FP32_"
- "TO_INT32_IN_MEM\000FP32_TO_INT64_IN_MEM\000FP64_TO_INT16_IN_MEM\000FP64"
- "_TO_INT32_IN_MEM\000FP64_TO_INT64_IN_MEM\000FP80_TO_INT16_IN_MEM\000FP8"
- "0_TO_INT32_IN_MEM\000FP80_TO_INT64_IN_MEM\000FPATAN\000FPREM\000FPREM1\000"
- "FPTAN\000FP_REG_KILL\000FRNDINT\000FRSTORm\000FSAVEm\000FSCALE\000FSINC"
- "OS\000FSTENVm\000FS_MOV32rm\000FS_PREFIX\000FXAM\000FXRSTOR\000FXSAVE\000"
- "FXTRACT\000FYL2X\000FYL2XP1\000FpGET_ST0_32\000FpGET_ST0_64\000FpGET_ST"
- "0_80\000FpGET_ST1_32\000FpGET_ST1_64\000FpGET_ST1_80\000FpSET_ST0_32\000"
- "FpSET_ST0_64\000FpSET_ST0_80\000FpSET_ST1_32\000FpSET_ST1_64\000FpSET_S"
- "T1_80\000FsANDNPDrm\000FsANDNPDrr\000FsANDNPSrm\000FsANDNPSrr\000FsANDP"
- "Drm\000FsANDPDrr\000FsANDPSrm\000FsANDPSrr\000FsFLD0SD\000FsFLD0SS\000F"
- "sMOVAPDrm\000FsMOVAPDrr\000FsMOVAPSrm\000FsMOVAPSrr\000FsORPDrm\000FsOR"
- "PDrr\000FsORPSrm\000FsORPSrr\000FsXORPDrm\000FsXORPDrr\000FsXORPSrm\000"
- "FsXORPSrr\000GS_MOV32rm\000GS_PREFIX\000HADDPDrm\000HADDPDrr\000HADDPSr"
- "m\000HADDPSrr\000HLT\000HSUBPDrm\000HSUBPDrr\000HSUBPSrm\000HSUBPSrr\000"
- "IDIV16m\000IDIV16r\000IDIV32m\000IDIV32r\000IDIV64m\000IDIV64r\000IDIV8"
- "m\000IDIV8r\000ILD_F16m\000ILD_F32m\000ILD_F64m\000ILD_Fp16m32\000ILD_F"
- "p16m64\000ILD_Fp16m80\000ILD_Fp32m32\000ILD_Fp32m64\000ILD_Fp32m80\000I"
- "LD_Fp64m32\000ILD_Fp64m64\000ILD_Fp64m80\000IMUL16m\000IMUL16r\000IMUL1"
- "6rm\000IMUL16rmi\000IMUL16rmi8\000IMUL16rr\000IMUL16rri\000IMUL16rri8\000"
- "IMUL32m\000IMUL32r\000IMUL32rm\000IMUL32rmi\000IMUL32rmi8\000IMUL32rr\000"
- "IMUL32rri\000IMUL32rri8\000IMUL64m\000IMUL64r\000IMUL64rm\000IMUL64rmi3"
- "2\000IMUL64rmi8\000IMUL64rr\000IMUL64rri32\000IMUL64rri8\000IMUL8m\000I"
- "MUL8r\000IN16\000IN16ri\000IN16rr\000IN32\000IN32ri\000IN32rr\000IN8\000"
- "IN8ri\000IN8rr\000INC16m\000INC16r\000INC32m\000INC32r\000INC64_16m\000"
- "INC64_16r\000INC64_32m\000INC64_32r\000INC64m\000INC64r\000INC8m\000INC"
- "8r\000INSERTPSrm\000INSERTPSrr\000INT\000INT3\000INVD\000INVEPT\000INVL"
- "PG\000INVVPID\000IRET16\000IRET32\000IRET64\000ISTT_FP16m\000ISTT_FP32m"
- "\000ISTT_FP64m\000ISTT_Fp16m32\000ISTT_Fp16m64\000ISTT_Fp16m80\000ISTT_"
- "Fp32m32\000ISTT_Fp32m64\000ISTT_Fp32m80\000ISTT_Fp64m32\000ISTT_Fp64m64"
- "\000ISTT_Fp64m80\000IST_F16m\000IST_F32m\000IST_FP16m\000IST_FP32m\000I"
- "ST_FP64m\000IST_Fp16m32\000IST_Fp16m64\000IST_Fp16m80\000IST_Fp32m32\000"
- "IST_Fp32m64\000IST_Fp32m80\000IST_Fp64m32\000IST_Fp64m64\000IST_Fp64m80"
- "\000Int_CMPSDrm\000Int_CMPSDrr\000Int_CMPSSrm\000Int_CMPSSrr\000Int_COM"
- "ISDrm\000Int_COMISDrr\000Int_COMISSrm\000Int_COMISSrr\000Int_CVTDQ2PDrm"
- "\000Int_CVTDQ2PDrr\000Int_CVTDQ2PSrm\000Int_CVTDQ2PSrr\000Int_CVTPD2DQr"
- "m\000Int_CVTPD2DQrr\000Int_CVTPD2PIrm\000Int_CVTPD2PIrr\000Int_CVTPD2PS"
- "rm\000Int_CVTPD2PSrr\000Int_CVTPI2PDrm\000Int_CVTPI2PDrr\000Int_CVTPI2P"
- "Srm\000Int_CVTPI2PSrr\000Int_CVTPS2DQrm\000Int_CVTPS2DQrr\000Int_CVTPS2"
- "PDrm\000Int_CVTPS2PDrr\000Int_CVTPS2PIrm\000Int_CVTPS2PIrr\000Int_CVTSD"
- "2SI64rm\000Int_CVTSD2SI64rr\000Int_CVTSD2SIrm\000Int_CVTSD2SIrr\000Int_"
- "CVTSD2SSrm\000Int_CVTSD2SSrr\000Int_CVTSI2SD64rm\000Int_CVTSI2SD64rr\000"
- "Int_CVTSI2SDrm\000Int_CVTSI2SDrr\000Int_CVTSI2SS64rm\000Int_CVTSI2SS64r"
- "r\000Int_CVTSI2SSrm\000Int_CVTSI2SSrr\000Int_CVTSS2SDrm\000Int_CVTSS2SD"
- "rr\000Int_CVTSS2SI64rm\000Int_CVTSS2SI64rr\000Int_CVTSS2SIrm\000Int_CVT"
- "SS2SIrr\000Int_CVTTPD2DQrm\000Int_CVTTPD2DQrr\000Int_CVTTPD2PIrm\000Int"
- "_CVTTPD2PIrr\000Int_CVTTPS2DQrm\000Int_CVTTPS2DQrr\000Int_CVTTPS2PIrm\000"
- "Int_CVTTPS2PIrr\000Int_CVTTSD2SI64rm\000Int_CVTTSD2SI64rr\000Int_CVTTSD"
- "2SIrm\000Int_CVTTSD2SIrr\000Int_CVTTSS2SI64rm\000Int_CVTTSS2SI64rr\000I"
- "nt_CVTTSS2SIrm\000Int_CVTTSS2SIrr\000Int_UCOMISDrm\000Int_UCOMISDrr\000"
- "Int_UCOMISSrm\000Int_UCOMISSrr\000JAE_1\000JAE_4\000JA_1\000JA_4\000JBE"
- "_1\000JBE_4\000JB_1\000JB_4\000JCXZ8\000JE_1\000JE_4\000JGE_1\000JGE_4\000"
- "JG_1\000JG_4\000JLE_1\000JLE_4\000JL_1\000JL_4\000JMP32m\000JMP32r\000J"
- "MP64m\000JMP64pcrel32\000JMP64r\000JMP_1\000JMP_4\000JNE_1\000JNE_4\000"
- "JNO_1\000JNO_4\000JNP_1\000JNP_4\000JNS_1\000JNS_4\000JO_1\000JO_4\000J"
- "P_1\000JP_4\000JS_1\000JS_4\000LAHF\000LAR16rm\000LAR16rr\000LAR32rm\000"
- "LAR32rr\000LAR64rm\000LAR64rr\000LCMPXCHG16\000LCMPXCHG32\000LCMPXCHG64"
- "\000LCMPXCHG8\000LCMPXCHG8B\000LDDQUrm\000LDMXCSR\000LDS16rm\000LDS32rm"
- "\000LD_F0\000LD_F1\000LD_F32m\000LD_F64m\000LD_F80m\000LD_Fp032\000LD_F"
- "p064\000LD_Fp080\000LD_Fp132\000LD_Fp164\000LD_Fp180\000LD_Fp32m\000LD_"
- "Fp32m64\000LD_Fp32m80\000LD_Fp64m\000LD_Fp64m80\000LD_Fp80m\000LD_Frr\000"
- "LEA16r\000LEA32r\000LEA64_32r\000LEA64r\000LEAVE\000LEAVE64\000LES16rm\000"
- "LES32rm\000LFENCE\000LFS16rm\000LFS32rm\000LFS64rm\000LGDTm\000LGS16rm\000"
- "LGS32rm\000LGS64rm\000LIDTm\000LLDT16m\000LLDT16r\000LMSW16m\000LMSW16r"
- "\000LOCK_ADD16mi\000LOCK_ADD16mi8\000LOCK_ADD16mr\000LOCK_ADD32mi\000LO"
- "CK_ADD32mi8\000LOCK_ADD32mr\000LOCK_ADD64mi32\000LOCK_ADD64mi8\000LOCK_"
- "ADD64mr\000LOCK_ADD8mi\000LOCK_ADD8mr\000LOCK_DEC16m\000LOCK_DEC32m\000"
- "LOCK_DEC64m\000LOCK_DEC8m\000LOCK_INC16m\000LOCK_INC32m\000LOCK_INC64m\000"
- "LOCK_INC8m\000LOCK_PREFIX\000LOCK_SUB16mi\000LOCK_SUB16mi8\000LOCK_SUB1"
- "6mr\000LOCK_SUB32mi\000LOCK_SUB32mi8\000LOCK_SUB32mr\000LOCK_SUB64mi32\000"
- "LOCK_SUB64mi8\000LOCK_SUB64mr\000LOCK_SUB8mi\000LOCK_SUB8mr\000LODSB\000"
- "LODSD\000LODSQ\000LODSW\000LOOP\000LOOPE\000LOOPNE\000LRET\000LRETI\000"
- "LSL16rm\000LSL16rr\000LSL32rm\000LSL32rr\000LSL64rm\000LSL64rr\000LSS16"
- "rm\000LSS32rm\000LSS64rm\000LTRm\000LTRr\000LXADD16\000LXADD32\000LXADD"
- "64\000LXADD8\000MASKMOVDQU\000MASKMOVDQU64\000MAXPDrm\000MAXPDrm_Int\000"
- "MAXPDrr\000MAXPDrr_Int\000MAXPSrm\000MAXPSrm_Int\000MAXPSrr\000MAXPSrr_"
- "Int\000MAXSDrm\000MAXSDrm_Int\000MAXSDrr\000MAXSDrr_Int\000MAXSSrm\000M"
- "AXSSrm_Int\000MAXSSrr\000MAXSSrr_Int\000MFENCE\000MINGW_ALLOCA\000MINPD"
- "rm\000MINPDrm_Int\000MINPDrr\000MINPDrr_Int\000MINPSrm\000MINPSrm_Int\000"
- "MINPSrr\000MINPSrr_Int\000MINSDrm\000MINSDrm_Int\000MINSDrr\000MINSDrr_"
- "Int\000MINSSrm\000MINSSrm_Int\000MINSSrr\000MINSSrr_Int\000MMX_CVTPD2PI"
- "rm\000MMX_CVTPD2PIrr\000MMX_CVTPI2PDrm\000MMX_CVTPI2PDrr\000MMX_CVTPI2P"
- "Srm\000MMX_CVTPI2PSrr\000MMX_CVTPS2PIrm\000MMX_CVTPS2PIrr\000MMX_CVTTPD"
- "2PIrm\000MMX_CVTTPD2PIrr\000MMX_CVTTPS2PIrm\000MMX_CVTTPS2PIrr\000MMX_E"
- "MMS\000MMX_FEMMS\000MMX_MASKMOVQ\000MMX_MASKMOVQ64\000MMX_MOVD64from64r"
- "r\000MMX_MOVD64grr\000MMX_MOVD64mr\000MMX_MOVD64rm\000MMX_MOVD64rr\000M"
- "MX_MOVD64rrv164\000MMX_MOVD64to64rr\000MMX_MOVDQ2Qrr\000MMX_MOVNTQmr\000"
- "MMX_MOVQ2DQrr\000MMX_MOVQ2FR64rr\000MMX_MOVQ64gmr\000MMX_MOVQ64mr\000MM"
- "X_MOVQ64rm\000MMX_MOVQ64rr\000MMX_MOVZDI2PDIrm\000MMX_MOVZDI2PDIrr\000M"
- "MX_PACKSSDWrm\000MMX_PACKSSDWrr\000MMX_PACKSSWBrm\000MMX_PACKSSWBrr\000"
- "MMX_PACKUSWBrm\000MMX_PACKUSWBrr\000MMX_PADDBrm\000MMX_PADDBrr\000MMX_P"
- "ADDDrm\000MMX_PADDDrr\000MMX_PADDQrm\000MMX_PADDQrr\000MMX_PADDSBrm\000"
- "MMX_PADDSBrr\000MMX_PADDSWrm\000MMX_PADDSWrr\000MMX_PADDUSBrm\000MMX_PA"
- "DDUSBrr\000MMX_PADDUSWrm\000MMX_PADDUSWrr\000MMX_PADDWrm\000MMX_PADDWrr"
- "\000MMX_PANDNrm\000MMX_PANDNrr\000MMX_PANDrm\000MMX_PANDrr\000MMX_PAVGB"
- "rm\000MMX_PAVGBrr\000MMX_PAVGWrm\000MMX_PAVGWrr\000MMX_PCMPEQBrm\000MMX"
- "_PCMPEQBrr\000MMX_PCMPEQDrm\000MMX_PCMPEQDrr\000MMX_PCMPEQWrm\000MMX_PC"
- "MPEQWrr\000MMX_PCMPGTBrm\000MMX_PCMPGTBrr\000MMX_PCMPGTDrm\000MMX_PCMPG"
- "TDrr\000MMX_PCMPGTWrm\000MMX_PCMPGTWrr\000MMX_PEXTRWri\000MMX_PINSRWrmi"
- "\000MMX_PINSRWrri\000MMX_PMADDWDrm\000MMX_PMADDWDrr\000MMX_PMAXSWrm\000"
- "MMX_PMAXSWrr\000MMX_PMAXUBrm\000MMX_PMAXUBrr\000MMX_PMINSWrm\000MMX_PMI"
- "NSWrr\000MMX_PMINUBrm\000MMX_PMINUBrr\000MMX_PMOVMSKBrr\000MMX_PMULHUWr"
- "m\000MMX_PMULHUWrr\000MMX_PMULHWrm\000MMX_PMULHWrr\000MMX_PMULLWrm\000M"
- "MX_PMULLWrr\000MMX_PMULUDQrm\000MMX_PMULUDQrr\000MMX_PORrm\000MMX_PORrr"
- "\000MMX_PSADBWrm\000MMX_PSADBWrr\000MMX_PSHUFWmi\000MMX_PSHUFWri\000MMX"
- "_PSLLDri\000MMX_PSLLDrm\000MMX_PSLLDrr\000MMX_PSLLQri\000MMX_PSLLQrm\000"
- "MMX_PSLLQrr\000MMX_PSLLWri\000MMX_PSLLWrm\000MMX_PSLLWrr\000MMX_PSRADri"
- "\000MMX_PSRADrm\000MMX_PSRADrr\000MMX_PSRAWri\000MMX_PSRAWrm\000MMX_PSR"
- "AWrr\000MMX_PSRLDri\000MMX_PSRLDrm\000MMX_PSRLDrr\000MMX_PSRLQri\000MMX"
- "_PSRLQrm\000MMX_PSRLQrr\000MMX_PSRLWri\000MMX_PSRLWrm\000MMX_PSRLWrr\000"
- "MMX_PSUBBrm\000MMX_PSUBBrr\000MMX_PSUBDrm\000MMX_PSUBDrr\000MMX_PSUBQrm"
- "\000MMX_PSUBQrr\000MMX_PSUBSBrm\000MMX_PSUBSBrr\000MMX_PSUBSWrm\000MMX_"
- "PSUBSWrr\000MMX_PSUBUSBrm\000MMX_PSUBUSBrr\000MMX_PSUBUSWrm\000MMX_PSUB"
- "USWrr\000MMX_PSUBWrm\000MMX_PSUBWrr\000MMX_PUNPCKHBWrm\000MMX_PUNPCKHBW"
- "rr\000MMX_PUNPCKHDQrm\000MMX_PUNPCKHDQrr\000MMX_PUNPCKHWDrm\000MMX_PUNP"
- "CKHWDrr\000MMX_PUNPCKLBWrm\000MMX_PUNPCKLBWrr\000MMX_PUNPCKLDQrm\000MMX"
- "_PUNPCKLDQrr\000MMX_PUNPCKLWDrm\000MMX_PUNPCKLWDrr\000MMX_PXORrm\000MMX"
- "_PXORrr\000MMX_V_SET0\000MMX_V_SETALLONES\000MONITOR\000MOV16ao16\000MO"
- "V16mi\000MOV16mr\000MOV16ms\000MOV16o16a\000MOV16r0\000MOV16ri\000MOV16"
- "rm\000MOV16rr\000MOV16rr_REV\000MOV16rs\000MOV16sm\000MOV16sr\000MOV32a"
- "o32\000MOV32cr\000MOV32dr\000MOV32mi\000MOV32mr\000MOV32o32a\000MOV32r0"
- "\000MOV32rc\000MOV32rd\000MOV32ri\000MOV32rm\000MOV32rr\000MOV32rr_REV\000"
- "MOV64FSrm\000MOV64GSrm\000MOV64ao64\000MOV64ao8\000MOV64cr\000MOV64dr\000"
- "MOV64mi32\000MOV64mr\000MOV64ms\000MOV64o64a\000MOV64o8a\000MOV64r0\000"
- "MOV64rc\000MOV64rd\000MOV64ri\000MOV64ri32\000MOV64ri64i32\000MOV64rm\000"
- "MOV64rr\000MOV64rr_REV\000MOV64rs\000MOV64sm\000MOV64sr\000MOV64toPQIrr"
- "\000MOV64toSDrm\000MOV64toSDrr\000MOV8ao8\000MOV8mi\000MOV8mr\000MOV8mr"
- "_NOREX\000MOV8o8a\000MOV8r0\000MOV8ri\000MOV8rm\000MOV8rm_NOREX\000MOV8"
- "rr\000MOV8rr_NOREX\000MOV8rr_REV\000MOVAPDmr\000MOVAPDrm\000MOVAPDrr\000"
- "MOVAPSmr\000MOVAPSrm\000MOVAPSrr\000MOVDDUPrm\000MOVDDUPrr\000MOVDI2PDI"
- "rm\000MOVDI2PDIrr\000MOVDI2SSrm\000MOVDI2SSrr\000MOVDQAmr\000MOVDQArm\000"
- "MOVDQArr\000MOVDQUmr\000MOVDQUmr_Int\000MOVDQUrm\000MOVDQUrm_Int\000MOV"
- "HLPSrr\000MOVHPDmr\000MOVHPDrm\000MOVHPSmr\000MOVHPSrm\000MOVLHPSrr\000"
- "MOVLPDmr\000MOVLPDrm\000MOVLPSmr\000MOVLPSrm\000MOVLQ128mr\000MOVMSKPDr"
- "r\000MOVMSKPSrr\000MOVNTDQArm\000MOVNTDQ_64mr\000MOVNTDQmr\000MOVNTDQmr"
- "_Int\000MOVNTI_64mr\000MOVNTImr\000MOVNTImr_Int\000MOVNTPDmr\000MOVNTPD"
- "mr_Int\000MOVNTPSmr\000MOVNTPSmr_Int\000MOVPC32r\000MOVPDI2DImr\000MOVP"
- "DI2DIrr\000MOVPQI2QImr\000MOVPQIto64rr\000MOVQI2PQIrm\000MOVQxrxr\000MO"
- "VSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr\000MOVSDto64mr\000MOVSDto"
- "64rr\000MOVSHDUPrm\000MOVSHDUPrr\000MOVSLDUPrm\000MOVSLDUPrr\000MOVSS2D"
- "Imr\000MOVSS2DIrr\000MOVSSmr\000MOVSSrm\000MOVSSrr\000MOVSW\000MOVSX16r"
- "m8\000MOVSX16rm8W\000MOVSX16rr8\000MOVSX16rr8W\000MOVSX32rm16\000MOVSX3"
- "2rm8\000MOVSX32rr16\000MOVSX32rr8\000MOVSX64rm16\000MOVSX64rm32\000MOVS"
- "X64rm8\000MOVSX64rr16\000MOVSX64rr32\000MOVSX64rr8\000MOVUPDmr\000MOVUP"
- "Dmr_Int\000MOVUPDrm\000MOVUPDrm_Int\000MOVUPDrr\000MOVUPSmr\000MOVUPSmr"
- "_Int\000MOVUPSrm\000MOVUPSrm_Int\000MOVUPSrr\000MOVZDI2PDIrm\000MOVZDI2"
- "PDIrr\000MOVZPQILo2PQIrm\000MOVZPQILo2PQIrr\000MOVZQI2PQIrm\000MOVZQI2P"
- "QIrr\000MOVZX16rm8\000MOVZX16rm8W\000MOVZX16rr8\000MOVZX16rr8W\000MOVZX"
- "32_NOREXrm8\000MOVZX32_NOREXrr8\000MOVZX32rm16\000MOVZX32rm8\000MOVZX32"
- "rr16\000MOVZX32rr8\000MOVZX64rm16\000MOVZX64rm16_Q\000MOVZX64rm32\000MO"
- "VZX64rm8\000MOVZX64rm8_Q\000MOVZX64rr16\000MOVZX64rr16_Q\000MOVZX64rr32"
- "\000MOVZX64rr8\000MOVZX64rr8_Q\000MOV_Fp3232\000MOV_Fp3264\000MOV_Fp328"
- "0\000MOV_Fp6432\000MOV_Fp6464\000MOV_Fp6480\000MOV_Fp8032\000MOV_Fp8064"
- "\000MOV_Fp8080\000MPSADBWrmi\000MPSADBWrri\000MUL16m\000MUL16r\000MUL32"
- "m\000MUL32r\000MUL64m\000MUL64r\000MUL8m\000MUL8r\000MULPDrm\000MULPDrr"
- "\000MULPSrm\000MULPSrr\000MULSDrm\000MULSDrm_Int\000MULSDrr\000MULSDrr_"
- "Int\000MULSSrm\000MULSSrm_Int\000MULSSrr\000MULSSrr_Int\000MUL_F32m\000"
- "MUL_F64m\000MUL_FI16m\000MUL_FI32m\000MUL_FPrST0\000MUL_FST0r\000MUL_Fp"
- "32\000MUL_Fp32m\000MUL_Fp64\000MUL_Fp64m\000MUL_Fp64m32\000MUL_Fp80\000"
- "MUL_Fp80m32\000MUL_Fp80m64\000MUL_FpI16m32\000MUL_FpI16m64\000MUL_FpI16"
- "m80\000MUL_FpI32m32\000MUL_FpI32m64\000MUL_FpI32m80\000MUL_FrST0\000MWA"
- "IT\000NEG16m\000NEG16r\000NEG32m\000NEG32r\000NEG64m\000NEG64r\000NEG8m"
- "\000NEG8r\000NOOP\000NOOPL\000NOOPW\000NOT16m\000NOT16r\000NOT32m\000NO"
- "T32r\000NOT64m\000NOT64r\000NOT8m\000NOT8r\000OR16i16\000OR16mi\000OR16"
- "mi8\000OR16mr\000OR16ri\000OR16ri8\000OR16rm\000OR16rr\000OR16rr_REV\000"
- "OR32i32\000OR32mi\000OR32mi8\000OR32mr\000OR32ri\000OR32ri8\000OR32rm\000"
- "OR32rr\000OR32rr_REV\000OR64i32\000OR64mi32\000OR64mi8\000OR64mr\000OR6"
- "4ri32\000OR64ri8\000OR64rm\000OR64rr\000OR64rr_REV\000OR8i8\000OR8mi\000"
- "OR8mr\000OR8ri\000OR8rm\000OR8rr\000OR8rr_REV\000ORPDrm\000ORPDrr\000OR"
- "PSrm\000ORPSrr\000OUT16ir\000OUT16rr\000OUT32ir\000OUT32rr\000OUT8ir\000"
- "OUT8rr\000OUTSB\000OUTSD\000OUTSW\000PABSBrm128\000PABSBrm64\000PABSBrr"
- "128\000PABSBrr64\000PABSDrm128\000PABSDrm64\000PABSDrr128\000PABSDrr64\000"
- "PABSWrm128\000PABSWrm64\000PABSWrr128\000PABSWrr64\000PACKSSDWrm\000PAC"
- "KSSDWrr\000PACKSSWBrm\000PACKSSWBrr\000PACKUSDWrm\000PACKUSDWrr\000PACK"
- "USWBrm\000PACKUSWBrr\000PADDBrm\000PADDBrr\000PADDDrm\000PADDDrr\000PAD"
- "DQrm\000PADDQrr\000PADDSBrm\000PADDSBrr\000PADDSWrm\000PADDSWrr\000PADD"
- "USBrm\000PADDUSBrr\000PADDUSWrm\000PADDUSWrr\000PADDWrm\000PADDWrr\000P"
- "ALIGNR128rm\000PALIGNR128rr\000PALIGNR64rm\000PALIGNR64rr\000PANDNrm\000"
- "PANDNrr\000PANDrm\000PANDrr\000PAVGBrm\000PAVGBrr\000PAVGWrm\000PAVGWrr"
- "\000PBLENDVBrm0\000PBLENDVBrr0\000PBLENDWrmi\000PBLENDWrri\000PCMPEQBrm"
- "\000PCMPEQBrr\000PCMPEQDrm\000PCMPEQDrr\000PCMPEQQrm\000PCMPEQQrr\000PC"
- "MPEQWrm\000PCMPEQWrr\000PCMPESTRIArm\000PCMPESTRIArr\000PCMPESTRICrm\000"
- "PCMPESTRICrr\000PCMPESTRIOrm\000PCMPESTRIOrr\000PCMPESTRISrm\000PCMPEST"
- "RISrr\000PCMPESTRIZrm\000PCMPESTRIZrr\000PCMPESTRIrm\000PCMPESTRIrr\000"
- "PCMPESTRM128MEM\000PCMPESTRM128REG\000PCMPESTRM128rm\000PCMPESTRM128rr\000"
- "PCMPGTBrm\000PCMPGTBrr\000PCMPGTDrm\000PCMPGTDrr\000PCMPGTQrm\000PCMPGT"
- "Qrr\000PCMPGTWrm\000PCMPGTWrr\000PCMPISTRIArm\000PCMPISTRIArr\000PCMPIS"
- "TRICrm\000PCMPISTRICrr\000PCMPISTRIOrm\000PCMPISTRIOrr\000PCMPISTRISrm\000"
- "PCMPISTRISrr\000PCMPISTRIZrm\000PCMPISTRIZrr\000PCMPISTRIrm\000PCMPISTR"
- "Irr\000PCMPISTRM128MEM\000PCMPISTRM128REG\000PCMPISTRM128rm\000PCMPISTR"
- "M128rr\000PEXTRBmr\000PEXTRBrr\000PEXTRDmr\000PEXTRDrr\000PEXTRQmr\000P"
- "EXTRQrr\000PEXTRWmr\000PEXTRWri\000PHADDDrm128\000PHADDDrm64\000PHADDDr"
- "r128\000PHADDDrr64\000PHADDSWrm128\000PHADDSWrm64\000PHADDSWrr128\000PH"
- "ADDSWrr64\000PHADDWrm128\000PHADDWrm64\000PHADDWrr128\000PHADDWrr64\000"
- "PHMINPOSUWrm128\000PHMINPOSUWrr128\000PHSUBDrm128\000PHSUBDrm64\000PHSU"
- "BDrr128\000PHSUBDrr64\000PHSUBSWrm128\000PHSUBSWrm64\000PHSUBSWrr128\000"
- "PHSUBSWrr64\000PHSUBWrm128\000PHSUBWrm64\000PHSUBWrr128\000PHSUBWrr64\000"
- "PINSRBrm\000PINSRBrr\000PINSRDrm\000PINSRDrr\000PINSRQrm\000PINSRQrr\000"
- "PINSRWrmi\000PINSRWrri\000PMADDUBSWrm128\000PMADDUBSWrm64\000PMADDUBSWr"
- "r128\000PMADDUBSWrr64\000PMADDWDrm\000PMADDWDrr\000PMAXSBrm\000PMAXSBrr"
- "\000PMAXSDrm\000PMAXSDrr\000PMAXSWrm\000PMAXSWrr\000PMAXUBrm\000PMAXUBr"
- "r\000PMAXUDrm\000PMAXUDrr\000PMAXUWrm\000PMAXUWrr\000PMINSBrm\000PMINSB"
- "rr\000PMINSDrm\000PMINSDrr\000PMINSWrm\000PMINSWrr\000PMINUBrm\000PMINU"
- "Brr\000PMINUDrm\000PMINUDrr\000PMINUWrm\000PMINUWrr\000PMOVMSKBrr\000PM"
- "OVSXBDrm\000PMOVSXBDrr\000PMOVSXBQrm\000PMOVSXBQrr\000PMOVSXBWrm\000PMO"
- "VSXBWrr\000PMOVSXDQrm\000PMOVSXDQrr\000PMOVSXWDrm\000PMOVSXWDrr\000PMOV"
- "SXWQrm\000PMOVSXWQrr\000PMOVZXBDrm\000PMOVZXBDrr\000PMOVZXBQrm\000PMOVZ"
- "XBQrr\000PMOVZXBWrm\000PMOVZXBWrr\000PMOVZXDQrm\000PMOVZXDQrr\000PMOVZX"
- "WDrm\000PMOVZXWDrr\000PMOVZXWQrm\000PMOVZXWQrr\000PMULDQrm\000PMULDQrr\000"
- "PMULHRSWrm128\000PMULHRSWrm64\000PMULHRSWrr128\000PMULHRSWrr64\000PMULH"
- "UWrm\000PMULHUWrr\000PMULHWrm\000PMULHWrr\000PMULLDrm\000PMULLDrm_int\000"
- "PMULLDrr\000PMULLDrr_int\000PMULLWrm\000PMULLWrr\000PMULUDQrm\000PMULUD"
- "Qrr\000POP16r\000POP16rmm\000POP16rmr\000POP32r\000POP32rmm\000POP32rmr"
- "\000POP64r\000POP64rmm\000POP64rmr\000POPCNT16rm\000POPCNT16rr\000POPCN"
- "T32rm\000POPCNT32rr\000POPCNT64rm\000POPCNT64rr\000POPF\000POPFD\000POP"
- "FQ\000POPFS16\000POPFS32\000POPFS64\000POPGS16\000POPGS32\000POPGS64\000"
- "PORrm\000PORrr\000PREFETCHNTA\000PREFETCHT0\000PREFETCHT1\000PREFETCHT2"
- "\000PSADBWrm\000PSADBWrr\000PSHUFBrm128\000PSHUFBrm64\000PSHUFBrr128\000"
- "PSHUFBrr64\000PSHUFDmi\000PSHUFDri\000PSHUFHWmi\000PSHUFHWri\000PSHUFLW"
- "mi\000PSHUFLWri\000PSIGNBrm128\000PSIGNBrm64\000PSIGNBrr128\000PSIGNBrr"
- "64\000PSIGNDrm128\000PSIGNDrm64\000PSIGNDrr128\000PSIGNDrr64\000PSIGNWr"
- "m128\000PSIGNWrm64\000PSIGNWrr128\000PSIGNWrr64\000PSLLDQri\000PSLLDri\000"
- "PSLLDrm\000PSLLDrr\000PSLLQri\000PSLLQrm\000PSLLQrr\000PSLLWri\000PSLLW"
- "rm\000PSLLWrr\000PSRADri\000PSRADrm\000PSRADrr\000PSRAWri\000PSRAWrm\000"
- "PSRAWrr\000PSRLDQri\000PSRLDri\000PSRLDrm\000PSRLDrr\000PSRLQri\000PSRL"
- "Qrm\000PSRLQrr\000PSRLWri\000PSRLWrm\000PSRLWrr\000PSUBBrm\000PSUBBrr\000"
- "PSUBDrm\000PSUBDrr\000PSUBQrm\000PSUBQrr\000PSUBSBrm\000PSUBSBrr\000PSU"
- "BSWrm\000PSUBSWrr\000PSUBUSBrm\000PSUBUSBrr\000PSUBUSWrm\000PSUBUSWrr\000"
- "PSUBWrm\000PSUBWrr\000PTESTrm\000PTESTrr\000PUNPCKHBWrm\000PUNPCKHBWrr\000"
- "PUNPCKHDQrm\000PUNPCKHDQrr\000PUNPCKHQDQrm\000PUNPCKHQDQrr\000PUNPCKHWD"
- "rm\000PUNPCKHWDrr\000PUNPCKLBWrm\000PUNPCKLBWrr\000PUNPCKLDQrm\000PUNPC"
- "KLDQrr\000PUNPCKLQDQrm\000PUNPCKLQDQrr\000PUNPCKLWDrm\000PUNPCKLWDrr\000"
- "PUSH16r\000PUSH16rmm\000PUSH16rmr\000PUSH32i16\000PUSH32i32\000PUSH32i8"
- "\000PUSH32r\000PUSH32rmm\000PUSH32rmr\000PUSH64i16\000PUSH64i32\000PUSH"
- "64i8\000PUSH64r\000PUSH64rmm\000PUSH64rmr\000PUSHF\000PUSHFD\000PUSHFQ6"
- "4\000PUSHFS16\000PUSHFS32\000PUSHFS64\000PUSHGS16\000PUSHGS32\000PUSHGS"
- "64\000PXORrm\000PXORrr\000RCL16m1\000RCL16mCL\000RCL16mi\000RCL16r1\000"
- "RCL16rCL\000RCL16ri\000RCL32m1\000RCL32mCL\000RCL32mi\000RCL32r1\000RCL"
- "32rCL\000RCL32ri\000RCL64m1\000RCL64mCL\000RCL64mi\000RCL64r1\000RCL64r"
- "CL\000RCL64ri\000RCL8m1\000RCL8mCL\000RCL8mi\000RCL8r1\000RCL8rCL\000RC"
- "L8ri\000RCPPSm\000RCPPSm_Int\000RCPPSr\000RCPPSr_Int\000RCPSSm\000RCPSS"
- "m_Int\000RCPSSr\000RCPSSr_Int\000RCR16m1\000RCR16mCL\000RCR16mi\000RCR1"
- "6r1\000RCR16rCL\000RCR16ri\000RCR32m1\000RCR32mCL\000RCR32mi\000RCR32r1"
- "\000RCR32rCL\000RCR32ri\000RCR64m1\000RCR64mCL\000RCR64mi\000RCR64r1\000"
- "RCR64rCL\000RCR64ri\000RCR8m1\000RCR8mCL\000RCR8mi\000RCR8r1\000RCR8rCL"
- "\000RCR8ri\000RDMSR\000RDPMC\000RDTSC\000RDTSCP\000REPNE_PREFIX\000REP_"
- "MOVSB\000REP_MOVSD\000REP_MOVSQ\000REP_MOVSW\000REP_PREFIX\000REP_STOSB"
- "\000REP_STOSD\000REP_STOSQ\000REP_STOSW\000RET\000RETI\000ROL16m1\000RO"
- "L16mCL\000ROL16mi\000ROL16r1\000ROL16rCL\000ROL16ri\000ROL32m1\000ROL32"
- "mCL\000ROL32mi\000ROL32r1\000ROL32rCL\000ROL32ri\000ROL64m1\000ROL64mCL"
- "\000ROL64mi\000ROL64r1\000ROL64rCL\000ROL64ri\000ROL8m1\000ROL8mCL\000R"
- "OL8mi\000ROL8r1\000ROL8rCL\000ROL8ri\000ROR16m1\000ROR16mCL\000ROR16mi\000"
- "ROR16r1\000ROR16rCL\000ROR16ri\000ROR32m1\000ROR32mCL\000ROR32mi\000ROR"
- "32r1\000ROR32rCL\000ROR32ri\000ROR64m1\000ROR64mCL\000ROR64mi\000ROR64r"
- "1\000ROR64rCL\000ROR64ri\000ROR8m1\000ROR8mCL\000ROR8mi\000ROR8r1\000RO"
- "R8rCL\000ROR8ri\000ROUNDPDm_Int\000ROUNDPDr_Int\000ROUNDPSm_Int\000ROUN"
- "DPSr_Int\000ROUNDSDm_Int\000ROUNDSDr_Int\000ROUNDSSm_Int\000ROUNDSSr_In"
- "t\000RSM\000RSQRTPSm\000RSQRTPSm_Int\000RSQRTPSr\000RSQRTPSr_Int\000RSQ"
- "RTSSm\000RSQRTSSm_Int\000RSQRTSSr\000RSQRTSSr_Int\000SAHF\000SAR16m1\000"
- "SAR16mCL\000SAR16mi\000SAR16r1\000SAR16rCL\000SAR16ri\000SAR32m1\000SAR"
- "32mCL\000SAR32mi\000SAR32r1\000SAR32rCL\000SAR32ri\000SAR64m1\000SAR64m"
- "CL\000SAR64mi\000SAR64r1\000SAR64rCL\000SAR64ri\000SAR8m1\000SAR8mCL\000"
- "SAR8mi\000SAR8r1\000SAR8rCL\000SAR8ri\000SBB16i16\000SBB16mi\000SBB16mi"
- "8\000SBB16mr\000SBB16ri\000SBB16ri8\000SBB16rm\000SBB16rr\000SBB16rr_RE"
- "V\000SBB32i32\000SBB32mi\000SBB32mi8\000SBB32mr\000SBB32ri\000SBB32ri8\000"
- "SBB32rm\000SBB32rr\000SBB32rr_REV\000SBB64i32\000SBB64mi32\000SBB64mi8\000"
- "SBB64mr\000SBB64ri32\000SBB64ri8\000SBB64rm\000SBB64rr\000SBB64rr_REV\000"
- "SBB8i8\000SBB8mi\000SBB8mr\000SBB8ri\000SBB8rm\000SBB8rr\000SBB8rr_REV\000"
- "SCAS16\000SCAS32\000SCAS64\000SCAS8\000SETAEm\000SETAEr\000SETAm\000SET"
- "Ar\000SETBEm\000SETBEr\000SETB_C16r\000SETB_C32r\000SETB_C64r\000SETB_C"
- "8r\000SETBm\000SETBr\000SETEm\000SETEr\000SETGEm\000SETGEr\000SETGm\000"
- "SETGr\000SETLEm\000SETLEr\000SETLm\000SETLr\000SETNEm\000SETNEr\000SETN"
- "Om\000SETNOr\000SETNPm\000SETNPr\000SETNSm\000SETNSr\000SETOm\000SETOr\000"
- "SETPm\000SETPr\000SETSm\000SETSr\000SFENCE\000SGDTm\000SHL16m1\000SHL16"
- "mCL\000SHL16mi\000SHL16r1\000SHL16rCL\000SHL16ri\000SHL32m1\000SHL32mCL"
- "\000SHL32mi\000SHL32r1\000SHL32rCL\000SHL32ri\000SHL64m1\000SHL64mCL\000"
- "SHL64mi\000SHL64r1\000SHL64rCL\000SHL64ri\000SHL8m1\000SHL8mCL\000SHL8m"
- "i\000SHL8r1\000SHL8rCL\000SHL8ri\000SHLD16mrCL\000SHLD16mri8\000SHLD16r"
- "rCL\000SHLD16rri8\000SHLD32mrCL\000SHLD32mri8\000SHLD32rrCL\000SHLD32rr"
- "i8\000SHLD64mrCL\000SHLD64mri8\000SHLD64rrCL\000SHLD64rri8\000SHR16m1\000"
- "SHR16mCL\000SHR16mi\000SHR16r1\000SHR16rCL\000SHR16ri\000SHR32m1\000SHR"
- "32mCL\000SHR32mi\000SHR32r1\000SHR32rCL\000SHR32ri\000SHR64m1\000SHR64m"
- "CL\000SHR64mi\000SHR64r1\000SHR64rCL\000SHR64ri\000SHR8m1\000SHR8mCL\000"
- "SHR8mi\000SHR8r1\000SHR8rCL\000SHR8ri\000SHRD16mrCL\000SHRD16mri8\000SH"
- "RD16rrCL\000SHRD16rri8\000SHRD32mrCL\000SHRD32mri8\000SHRD32rrCL\000SHR"
- "D32rri8\000SHRD64mrCL\000SHRD64mri8\000SHRD64rrCL\000SHRD64rri8\000SHUF"
- "PDrmi\000SHUFPDrri\000SHUFPSrmi\000SHUFPSrri\000SIDTm\000SIN_F\000SIN_F"
- "p32\000SIN_Fp64\000SIN_Fp80\000SLDT16m\000SLDT16r\000SLDT64m\000SLDT64r"
- "\000SMSW16m\000SMSW16r\000SMSW32r\000SMSW64r\000SQRTPDm\000SQRTPDm_Int\000"
- "SQRTPDr\000SQRTPDr_Int\000SQRTPSm\000SQRTPSm_Int\000SQRTPSr\000SQRTPSr_"
- "Int\000SQRTSDm\000SQRTSDm_Int\000SQRTSDr\000SQRTSDr_Int\000SQRTSSm\000S"
- "QRTSSm_Int\000SQRTSSr\000SQRTSSr_Int\000SQRT_F\000SQRT_Fp32\000SQRT_Fp6"
- "4\000SQRT_Fp80\000SS_PREFIX\000STC\000STD\000STI\000STMXCSR\000STOSB\000"
- "STOSD\000STOSW\000STRm\000STRr\000ST_F32m\000ST_F64m\000ST_FP32m\000ST_"
- "FP64m\000ST_FP80m\000ST_FPrr\000ST_Fp32m\000ST_Fp64m\000ST_Fp64m32\000S"
- "T_Fp80m32\000ST_Fp80m64\000ST_FpP32m\000ST_FpP64m\000ST_FpP64m32\000ST_"
- "FpP80m\000ST_FpP80m32\000ST_FpP80m64\000ST_Frr\000SUB16i16\000SUB16mi\000"
- "SUB16mi8\000SUB16mr\000SUB16ri\000SUB16ri8\000SUB16rm\000SUB16rr\000SUB"
- "16rr_REV\000SUB32i32\000SUB32mi\000SUB32mi8\000SUB32mr\000SUB32ri\000SU"
- "B32ri8\000SUB32rm\000SUB32rr\000SUB32rr_REV\000SUB64i32\000SUB64mi32\000"
- "SUB64mi8\000SUB64mr\000SUB64ri32\000SUB64ri8\000SUB64rm\000SUB64rr\000S"
- "UB64rr_REV\000SUB8i8\000SUB8mi\000SUB8mr\000SUB8ri\000SUB8rm\000SUB8rr\000"
- "SUB8rr_REV\000SUBPDrm\000SUBPDrr\000SUBPSrm\000SUBPSrr\000SUBR_F32m\000"
- "SUBR_F64m\000SUBR_FI16m\000SUBR_FI32m\000SUBR_FPrST0\000SUBR_FST0r\000S"
- "UBR_Fp32m\000SUBR_Fp64m\000SUBR_Fp64m32\000SUBR_Fp80m32\000SUBR_Fp80m64"
- "\000SUBR_FpI16m32\000SUBR_FpI16m64\000SUBR_FpI16m80\000SUBR_FpI32m32\000"
- "SUBR_FpI32m64\000SUBR_FpI32m80\000SUBR_FrST0\000SUBSDrm\000SUBSDrm_Int\000"
- "SUBSDrr\000SUBSDrr_Int\000SUBSSrm\000SUBSSrm_Int\000SUBSSrr\000SUBSSrr_"
- "Int\000SUB_F32m\000SUB_F64m\000SUB_FI16m\000SUB_FI32m\000SUB_FPrST0\000"
- "SUB_FST0r\000SUB_Fp32\000SUB_Fp32m\000SUB_Fp64\000SUB_Fp64m\000SUB_Fp64"
- "m32\000SUB_Fp80\000SUB_Fp80m32\000SUB_Fp80m64\000SUB_FpI16m32\000SUB_Fp"
- "I16m64\000SUB_FpI16m80\000SUB_FpI32m32\000SUB_FpI32m64\000SUB_FpI32m80\000"
- "SUB_FrST0\000SWAPGS\000SYSCALL\000SYSENTER\000SYSEXIT\000SYSEXIT64\000S"
- "YSRET\000TAILJMPd\000TAILJMPm\000TAILJMPr\000TAILJMPr64\000TCRETURNdi\000"
- "TCRETURNdi64\000TCRETURNri\000TCRETURNri64\000TEST16i16\000TEST16mi\000"
- "TEST16ri\000TEST16rm\000TEST16rr\000TEST32i32\000TEST32mi\000TEST32ri\000"
- "TEST32rm\000TEST32rr\000TEST64i32\000TEST64mi32\000TEST64ri32\000TEST64"
- "rm\000TEST64rr\000TEST8i8\000TEST8mi\000TEST8ri\000TEST8rm\000TEST8rr\000"
- "TLS_addr32\000TLS_addr64\000TRAP\000TST_F\000TST_Fp32\000TST_Fp64\000TS"
- "T_Fp80\000UCOMISDrm\000UCOMISDrr\000UCOMISSrm\000UCOMISSrr\000UCOM_FIPr"
- "\000UCOM_FIr\000UCOM_FPPr\000UCOM_FPr\000UCOM_FpIr32\000UCOM_FpIr64\000"
- "UCOM_FpIr80\000UCOM_Fpr32\000UCOM_Fpr64\000UCOM_Fpr80\000UCOM_Fr\000UNP"
- "CKHPDrm\000UNPCKHPDrr\000UNPCKHPSrm\000UNPCKHPSrr\000UNPCKLPDrm\000UNPC"
- "KLPDrr\000UNPCKLPSrm\000UNPCKLPSrr\000VASTART_SAVE_XMM_REGS\000VERRm\000"
- "VERRr\000VERWm\000VERWr\000VMCALL\000VMCLEARm\000VMLAUNCH\000VMPTRLDm\000"
- "VMPTRSTm\000VMREAD32rm\000VMREAD32rr\000VMREAD64rm\000VMREAD64rr\000VMR"
- "ESUME\000VMWRITE32rm\000VMWRITE32rr\000VMWRITE64rm\000VMWRITE64rr\000VM"
- "XOFF\000VMXON\000V_SET0\000V_SETALLONES\000WAIT\000WBINVD\000WINCALL64m"
- "\000WINCALL64pcrel32\000WINCALL64r\000WRMSR\000XADD16rm\000XADD16rr\000"
- "XADD32rm\000XADD32rr\000XADD64rm\000XADD64rr\000XADD8rm\000XADD8rr\000X"
- "CHG16ar\000XCHG16rm\000XCHG16rr\000XCHG32ar\000XCHG32rm\000XCHG32rr\000"
- "XCHG64ar\000XCHG64rm\000XCHG64rr\000XCHG8rm\000XCHG8rr\000XCH_F\000XLAT"
- "\000XOR16i16\000XOR16mi\000XOR16mi8\000XOR16mr\000XOR16ri\000XOR16ri8\000"
- "XOR16rm\000XOR16rr\000XOR16rr_REV\000XOR32i32\000XOR32mi\000XOR32mi8\000"
- "XOR32mr\000XOR32ri\000XOR32ri8\000XOR32rm\000XOR32rr\000XOR32rr_REV\000"
- "XOR64i32\000XOR64mi32\000XOR64mi8\000XOR64mr\000XOR64ri32\000XOR64ri8\000"
- "XOR64rm\000XOR64rr\000XOR64rr_REV\000XOR8i8\000XOR8mi\000XOR8mr\000XOR8"
- "ri\000XOR8rm\000XOR8rr\000XOR8rr_REV\000XORPDrm\000XORPDrr\000XORPSrm\000"
- "XORPSrr\000";
- return Strs+InstAsmOffset[Opcode];
-}
-
-#endif
--
Debian repository for ClamAV
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