[mupen64plus-core] 02/03: Synchronize cycle counting between cores
Sven Eckelmann
ecsv-guest at moszumanska.debian.org
Thu Nov 26 05:58:42 UTC 2015
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ecsv-guest pushed a commit to branch experimental-dynarec
in repository mupen64plus-core.
commit f378efa9bcfb4bd4b2a32aeca9f6c0b0efa4445b
Author: Emil Langrock <emil.langrock at gmx.de>
Date: Sat Mar 12 13:59:39 2011 +0100
Synchronize cycle counting between cores
---
src/r4300/interpreter_cop0.def | 4 +++-
src/r4300/x86/gr4300.c | 9 +++++----
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/src/r4300/interpreter_cop0.def b/src/r4300/interpreter_cop0.def
index 678e3ee..313ec9d 100644
--- a/src/r4300/interpreter_cop0.def
+++ b/src/r4300/interpreter_cop0.def
@@ -26,6 +26,8 @@ DECLARE_INSTRUCTION(MFC0)
case 1:
DebugMessage(M64MSG_ERROR, "MFC0 instruction reading un-implemented Random register");
stop=1;
+ case 9: // Count
+ update_count();
default:
rrt32 = reg_cop0[PC->f.r.nrd];
sign_extended(rrt);
@@ -92,9 +94,9 @@ DECLARE_INSTRUCTION(MTC0)
set_fpr_pointers((unsigned int) rrt);
}
Status = (unsigned int) rrt;
+ update_count();
ADD_TO_PC(1);
check_interupt();
- update_count();
interupt_unsafe_state = 1;
if (next_interupt <= Count) gen_interupt();
interupt_unsafe_state = 0;
diff --git a/src/r4300/x86/gr4300.c b/src/r4300/x86/gr4300.c
index 32b91fc..5d934f4 100644
--- a/src/r4300/x86/gr4300.c
+++ b/src/r4300/x86/gr4300.c
@@ -657,9 +657,10 @@ void gentest_idle(void)
mov_reg32_m32(reg, (unsigned int *)(&next_interupt));
sub_reg32_m32(reg, (unsigned int *)(&Count));
- cmp_reg32_imm8(reg, 3);
- jbe_rj(12);
+ cmp_reg32_imm8(reg, 5);
+ jbe_rj(18);
+ sub_reg32_imm32(reg, 2); // 6
and_reg32_imm32(reg, 0xFFFFFFFC); // 6
add_m32_reg32((unsigned int *)(&Count), reg); // 6
@@ -984,7 +985,7 @@ void gentestl(void)
jump_end_rel32();
- genupdate_count(dst->addr-4);
+ genupdate_count(dst->addr+4);
mov_m32_imm32(&last_addr, dst->addr + 4);
gencheck_interupt((unsigned int)(dst + 1));
jmp(dst->addr + 4);
@@ -1025,7 +1026,7 @@ void gentestl_out(void)
jump_end_rel32();
- genupdate_count(dst->addr-4);
+ genupdate_count(dst->addr+4);
mov_m32_imm32(&last_addr, dst->addr + 4);
gencheck_interupt((unsigned int)(dst + 1));
jmp(dst->addr + 4);
--
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