[mupen64plus] 136/262: Set register bank location when loading savestate

[Sven Eckelmann]

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ecsv-guest pushed a commit to branch master
in repository mupen64plus.

commit 08b46d3b1afdee9c0f688436495b160429bb76a1
Author: Sven Eckelmann <sven.eckelmann at gmx.de>
Date:   Mon Sep 28 15:15:14 2009 +0200

    Set register bank location when loading savestate
    
    The program can change the register banks for floating point registers
    from MIPS I to MIPS III and back again using mtr0. We must set the
    register sets again after a savestate was loaded or invalid values could
    be loaded when accessing the wrong floating point registers.
---
 debian/changelog                       |  2 ++
 debian/patches/load-fpr-location.patch | 55 ++++++++++++++++++++++++++++++++++
 debian/patches/series                  |  1 +
 3 files changed, 58 insertions(+)

diff --git a/debian/changelog b/debian/changelog
index 51ada1c..d99ba10 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -14,6 +14,8 @@ mupen64plus (1.5+dfsg1-5) UNRELEASED; urgency=low
     - Add rice_nodebug.patch, Don't enable excessive debug functionality in
       rice_video
     - Add interpreter_x86_fldcw.patch, Correctly set floating point control word
+    - Add load-fpr-location.patch, Set register bank location when loading
+      savestate
 
  -- Sven Eckelmann <sven.eckelmann at gmx.de>  Fri, 11 Sep 2009 00:37:19 +0200
 
diff --git a/debian/patches/load-fpr-location.patch b/debian/patches/load-fpr-location.patch
new file mode 100644
index 0000000..105a61b
--- /dev/null
+++ b/debian/patches/load-fpr-location.patch
@@ -0,0 +1,55 @@
+Description: Set register bank location when loading savestate
+ The program can change the register banks for floating point registers from
+ MIPS I to MIPS III and back again using mtr0. We must set the register sets
+ again after a savestate was loaded or invalid values could be loaded when
+ accessing the wrong floating point registers.
+Bug: http://code.google.com/p/mupen64plus/issues/detail?id=51
+Author: Sven Eckelmann <sven.eckelmann at gmx.de>
+
+---
+diff --git a/main/savestates.c b/main/savestates.c
+index 940b4c409ae9cd66eb804b29e83d3be0df3fb69a..f2df55824d0696d04472a268b6f9aae1aec731c4 100644
+--- a/main/savestates.c
++++ b/main/savestates.c
+@@ -194,6 +194,33 @@ void savestates_save()
+     free(filename);
+ }
+ 
++static void set_cop1_register(void)
++{
++    if (reg_cop0[12] & 0x04000000)
++    {
++        int i;
++        for (i=0; i<32; i++)
++        {
++            reg_cop1_double[i]=(double*)&reg_cop1_fgr_64[i];
++            reg_cop1_simple[i]=(float*)&reg_cop1_fgr_64[i];
++        }
++    }
++    else
++    {
++        int i;
++        for (i=0; i<32; i++)
++        {
++               if(!(i&1))
++             reg_cop1_double[i]=(double*)&reg_cop1_fgr_64[i>>1];
++#ifndef _BIG_ENDIAN
++               reg_cop1_simple[i]=(float*)&reg_cop1_fgr_64[i>>1]+(i&1);
++#else
++               reg_cop1_simple[i]=(float*)&reg_cop1_fgr_64[i>>1]+(1-(i&1));
++#endif
++        }
++    }
++}
++
+ void savestates_load()
+ {
+     char *filename, *file, buffer[1024];
+@@ -286,6 +313,7 @@ void savestates_load()
+     gzread(f, &llbit, 4);
+     gzread(f, reg, 32*8);
+     gzread(f, reg_cop0, 32*4);
++    set_cop1_register();
+     gzread(f, &lo, 8);
+     gzread(f, &hi, 8);
+     gzread(f, reg_cop1_fgr_64, 32*8);
diff --git a/debian/patches/series b/debian/patches/series
index 8631f20..0b89d07 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -27,3 +27,4 @@ fix_readpng.patch
 jttl_fix_romclosed.patch
 rice_nodebug.patch
 interpreter_x86_fldcw.patch
+load-fpr-location.patch

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