[mupen64plus] 155/262: Prevent corruption of upper registers due to sign extension

[Sven Eckelmann]

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ecsv-guest pushed a commit to branch master
in repository mupen64plus.

commit 31639ba1459861668d6dca7eda7a277fc75479cd
Author: Sven Eckelmann <sven.eckelmann at gmx.de>
Date:   Sat Oct 10 15:12:03 2009 +0200

    Prevent corruption of upper registers due to sign extension
    
    When somebody switches between 64-bit wide FGR to 32-bit FGR it will
    rearrange all registers in memory. This is partly done by shifting the
    different parts of a new register pair for a double together. It is
    important that this is done with unsigned integers or otherwise sign
    extension is done and the upper part of the register will always be
    0xffffffff when the bit 31 of the lower part of the register is 1.
---
 debian/changelog                           | 2 ++
 debian/patches/correct_fpr32_mapping.patch | 6 +++---
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/debian/changelog b/debian/changelog
index 4f3db9b..0ae2abe 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,8 @@
 mupen64plus (1.5+dfsg1-7) UNRELEASED; urgency=low
 
   * debian/patches:
+    - Update correct_fpr32_mapping.patch, prevent corruption of upper registers
+      in a register pair due to sign extension
     - Add system-liblzma.patch, use liblzma from debian instead of buildin
       (Closes: #543552)
   * debian/control:
diff --git a/debian/patches/correct_fpr32_mapping.patch b/debian/patches/correct_fpr32_mapping.patch
index 64c8003..8f9d872 100644
--- a/debian/patches/correct_fpr32_mapping.patch
+++ b/debian/patches/correct_fpr32_mapping.patch
@@ -148,7 +148,7 @@ index 734e244c95b34a4e167b7975f3e7aaf3765dabda..d38cb9e2d00b0ade17fba2334246b207
      interp_addr+=4;
      check_interupt();
 diff --git a/r4300/r4300.c b/r4300/r4300.c
-index f3203c3da1f34ab3d4d127252c4c39abdeebad6e..4584f34d6a0e0519dfec4015108b088a6cad05cb 100644
+index f3203c3da1f34ab3d4d127252c4c39abdeebad6e..d30223f350a8f0dd6ba127da0c3425ef6ecc04c3 100644
 --- a/r4300/r4300.c
 +++ b/r4300/r4300.c
 @@ -45,7 +45,6 @@ int local_rs32, local_rt32;
@@ -206,8 +206,8 @@ index f3203c3da1f34ab3d4d127252c4c39abdeebad6e..4584f34d6a0e0519dfec4015108b088a
 +            // take the low 32 bits from each register and pack them together into 64-bit pairs
 +            for (i = 0; i < 16; i++)
 +            {
-+                int least32 = *((int *) &reg_cop1_fgr_64[i*2] + isBigEndian);
-+                int most32 = *((int *) &reg_cop1_fgr_64[i*2+1] + isBigEndian);
++                unsigned int least32 = *((unsigned int *) &reg_cop1_fgr_64[i*2] + isBigEndian);
++                unsigned int most32 = *((unsigned int *) &reg_cop1_fgr_64[i*2+1] + isBigEndian);
 +                reg_cop1_fgr_64[i] = ((unsigned long long) most32 << 32) | (unsigned long long) least32;
 +            }
 +            // store the high bits in the upper 16 FGRs, which wont be accessible in 32-bit mode

-- 
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