[hamradio-commits] [gnss-sdr] 129/149: adding neon implementation
Carles Fernandez
carles_fernandez-guest at moszumanska.debian.org
Sat Feb 6 19:43:12 UTC 2016
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carles_fernandez-guest pushed a commit to branch next
in repository gnss-sdr.
commit ccbdcf8788e7ff8869a048bfc18fe70109a7e157
Author: Carles Fernandez <carles.fernandez at gmail.com>
Date: Thu Jan 28 23:36:19 2016 +0100
adding neon implementation
about x10 acceleration
---
.../volk_gnsssdr_16ic_rotatorpuppet_16ic.h | 40 +--
.../volk_gnsssdr_16ic_s32fc_x2_rotator_16ic.h | 389 ++++++++++++---------
2 files changed, 249 insertions(+), 180 deletions(-)
diff --git a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_rotatorpuppet_16ic.h b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_rotatorpuppet_16ic.h
index 50e653e..e77b7df 100644
--- a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_rotatorpuppet_16ic.h
+++ b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_rotatorpuppet_16ic.h
@@ -11,13 +11,13 @@
static inline void volk_gnsssdr_16ic_rotatorpuppet_16ic_generic(lv_16sc_t* outVector, const lv_16sc_t* inVector, unsigned int num_points)
{
- // phases must be normalized. Phase rotator expects a complex exponential input!
- float rem_carrier_phase_in_rad=0.345;
- float phase_step_rad = 0.123;
+ // phases must be normalized. Phase rotator expects a complex exponential input!
+ float rem_carrier_phase_in_rad = 0.345;
+ float phase_step_rad = 0.123;
lv_32fc_t phase[1];
- phase[0]=lv_cmake(cos(rem_carrier_phase_in_rad), -sin(rem_carrier_phase_in_rad));
+ phase[0] = lv_cmake(cos(rem_carrier_phase_in_rad), -sin(rem_carrier_phase_in_rad));
lv_32fc_t phase_inc[1];
- phase_inc[0]=lv_cmake(cos(phase_step_rad), -sin(phase_step_rad));
+ phase_inc[0] = lv_cmake(cos(phase_step_rad), -sin(phase_step_rad));
volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_generic(outVector, inVector, phase_inc[0], phase, num_points);
}
@@ -28,13 +28,13 @@ static inline void volk_gnsssdr_16ic_rotatorpuppet_16ic_generic(lv_16sc_t* outVe
static inline void volk_gnsssdr_16ic_rotatorpuppet_16ic_a_sse2(lv_16sc_t* outVector, const lv_16sc_t* inVector, unsigned int num_points)
{
- // phases must be normalized. Phase rotator expects a complex exponential input!
- float rem_carrier_phase_in_rad=0.345;
- float phase_step_rad = 0.123;
+ // phases must be normalized. Phase rotator expects a complex exponential input!
+ float rem_carrier_phase_in_rad = 0.345;
+ float phase_step_rad = 0.123;
lv_32fc_t phase[1];
- phase[0]=lv_cmake(cos(rem_carrier_phase_in_rad), -sin(rem_carrier_phase_in_rad));
+ phase[0] = lv_cmake(cos(rem_carrier_phase_in_rad), -sin(rem_carrier_phase_in_rad));
lv_32fc_t phase_inc[1];
- phase_inc[0]=lv_cmake(cos(phase_step_rad), -sin(phase_step_rad));
+ phase_inc[0] = lv_cmake(cos(phase_step_rad), -sin(phase_step_rad));
volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_a_sse2(outVector, inVector, phase_inc[0], phase, num_points);
}
@@ -44,13 +44,13 @@ static inline void volk_gnsssdr_16ic_rotatorpuppet_16ic_a_sse2(lv_16sc_t* outVec
static inline void volk_gnsssdr_16ic_rotatorpuppet_16ic_u_sse2(lv_16sc_t* outVector, const lv_16sc_t* inVector, unsigned int num_points)
{
- // phases must be normalized. Phase rotator expects a complex exponential input!
- float rem_carrier_phase_in_rad=0.345;
- float phase_step_rad = 0.123;
+ // phases must be normalized. Phase rotator expects a complex exponential input!
+ float rem_carrier_phase_in_rad = 0.345;
+ float phase_step_rad = 0.123;
lv_32fc_t phase[1];
- phase[0]=lv_cmake(cos(rem_carrier_phase_in_rad), -sin(rem_carrier_phase_in_rad));
+ phase[0] = lv_cmake(cos(rem_carrier_phase_in_rad), -sin(rem_carrier_phase_in_rad));
lv_32fc_t phase_inc[1];
- phase_inc[0]=lv_cmake(cos(phase_step_rad), -sin(phase_step_rad));
+ phase_inc[0] = lv_cmake(cos(phase_step_rad), -sin(phase_step_rad));
volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_u_sse2(outVector, inVector, phase_inc[0], phase, num_points);
}
@@ -60,13 +60,13 @@ static inline void volk_gnsssdr_16ic_rotatorpuppet_16ic_u_sse2(lv_16sc_t* outVec
static inline void volk_gnsssdr_16ic_rotatorpuppet_16ic_neon(lv_16sc_t* outVector, const lv_16sc_t* inVector, unsigned int num_points)
{
- // phases must be normalized. Phase rotator expects a complex exponential input!
- float rem_carrier_phase_in_rad=0.345;
- float phase_step_rad = 0.123;
+ // phases must be normalized. Phase rotator expects a complex exponential input!
+ float rem_carrier_phase_in_rad = 0.345;
+ float phase_step_rad = 0.123;
lv_32fc_t phase[1];
- phase[0]=lv_cmake(cos(rem_carrier_phase_in_rad), -sin(rem_carrier_phase_in_rad));
+ phase[0] = lv_cmake(cos(rem_carrier_phase_in_rad), -sin(rem_carrier_phase_in_rad));
lv_32fc_t phase_inc[1];
- phase_inc[0]=lv_cmake(cos(phase_step_rad), -sin(phase_step_rad));
+ phase_inc[0] = lv_cmake(cos(phase_step_rad), -sin(phase_step_rad));
volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_neon(outVector, inVector, phase_inc[0], phase, num_points);
}
diff --git a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_s32fc_x2_rotator_16ic.h b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_s32fc_x2_rotator_16ic.h
index 46390b8..d926e0f 100644
--- a/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_s32fc_x2_rotator_16ic.h
+++ b/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr/kernels/volk_gnsssdr/volk_gnsssdr_16ic_s32fc_x2_rotator_16ic.h
@@ -38,7 +38,7 @@
#include <volk_gnsssdr/volk_gnsssdr_complex.h>
#include <math.h>
-#include <stdio.h>
+
#define ROTATOR_RELOAD 512
@@ -58,14 +58,12 @@ static inline void volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_generic(lv_16sc_t* ou
tmp32 = lv_cmake((float)lv_creal(tmp16), (float)lv_cimag(tmp16)) * (*phase);
*outVector++ = lv_cmake((int16_t)rintf(lv_creal(tmp32)), (int16_t)rintf(lv_cimag(tmp32)));
(*phase) *= phase_inc;
- tmp32=(*phase);
- //printf("[%i][%i] phase fc: %f,%f \n",i,j,lv_creal(tmp32),lv_cimag(tmp32));
}
}
for(i = 0; i < num_points % ROTATOR_RELOAD; ++i)
{
- tmp16 = *inVector++;
- tmp32 = lv_cmake((float)lv_creal(tmp16), (float)lv_cimag(tmp16)) * (*phase);
+ tmp16 = *inVector++;
+ tmp32 = lv_cmake((float)lv_creal(tmp16), (float)lv_cimag(tmp16)) * (*phase);
*outVector++ = lv_cmake((int16_t)rintf(lv_creal(tmp32)), (int16_t)rintf(lv_cimag(tmp32)));
(*phase) *= phase_inc;
}
@@ -79,95 +77,94 @@ static inline void volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_generic(lv_16sc_t* ou
static inline void volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_a_sse2(lv_16sc_t* outVector, const lv_16sc_t* inVector, const lv_32fc_t phase_inc, lv_32fc_t* phase, unsigned int num_points)
{
- const unsigned int sse_iters = num_points / 4;
- __m128i a,b,c, c_sr, mask_imag, mask_real, real, imag, imag1,imag2, b_sl, a_sl, result;
-
- mask_imag = _mm_set_epi8(255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0);
- mask_real = _mm_set_epi8(0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255);
+ const unsigned int sse_iters = num_points / 4;
+ __m128i a,b,c, c_sr, mask_imag, mask_real, real, imag, imag1,imag2, b_sl, a_sl, result;
- const lv_16sc_t* _in_a = inVector;
- __attribute__((aligned(32))) lv_32fc_t four_phase_rotations_32fc[4];
- // debug
- //__attribute__((aligned(16))) lv_16sc_t four_phase_rotations_16sc[4];
+ mask_imag = _mm_set_epi8(255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0);
+ mask_real = _mm_set_epi8(0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255);
- // specify how many bits are used in the rotation (2^(N-1)) (it WILL increase the output signal range!)
- __attribute__((aligned(32))) float rotator_amplitude_float[4] = { 4.0f, 4.0f, 4.0f, 4.0f };
- __m128 _rotator_amplitude_reg = _mm_load_ps(rotator_amplitude_float);
+ const lv_16sc_t* _in_a = inVector;
+ __attribute__((aligned(32))) lv_32fc_t four_phase_rotations_32fc[4];
+ // debug
+ //__attribute__((aligned(16))) lv_16sc_t four_phase_rotations_16sc[4];
- //const lv_16sc_t* _in_b = in_b;
- lv_16sc_t* _out = outVector;
+ // specify how many bits are used in the rotation (2^(N-1)) (it WILL increase the output signal range!)
+ __attribute__((aligned(32))) float rotator_amplitude_float[4] = { 4.0f, 4.0f, 4.0f, 4.0f };
+ __m128 _rotator_amplitude_reg = _mm_load_ps(rotator_amplitude_float);
- __m128 fc_reg1, fc_reg2;
- __m128i sc_reg1, sc_reg2; // is __m128i defined in xmmintrin.h?
+ //const lv_16sc_t* _in_b = in_b;
+ lv_16sc_t* _out = outVector;
- for(unsigned int number = 0; number < sse_iters; number++)
- {
- //std::complex<T> memory structure: real part -> reinterpret_cast<cv T*>(a)[2*i]
- //imaginery part -> reinterpret_cast<cv T*>(a)[2*i + 1]
- // a[127:0]=[a3.i,a3.r,a2.i,a2.r,a1.i,a1.r,a0.i,a0.r]
- a = _mm_load_si128((__m128i*)_in_a); //load (2 byte imag, 2 byte real) x 4 into 128 bits reg
- //b = _mm_loadu_si128((__m128i*)_in_b);
+ __m128 fc_reg1, fc_reg2;
+ __m128i sc_reg1, sc_reg2; // is __m128i defined in xmmintrin.h?
- // compute next four 16ic complex exponential values for phase rotation
+ for(unsigned int number = 0; number < sse_iters; number++)
+ {
+ //std::complex<T> memory structure: real part -> reinterpret_cast<cv T*>(a)[2*i]
+ //imaginery part -> reinterpret_cast<cv T*>(a)[2*i + 1]
+ // a[127:0]=[a3.i,a3.r,a2.i,a2.r,a1.i,a1.r,a0.i,a0.r]
+ a = _mm_load_si128((__m128i*)_in_a); //load (2 byte imag, 2 byte real) x 4 into 128 bits reg
+ //b = _mm_loadu_si128((__m128i*)_in_b);
- // compute next four float complex rotations
- four_phase_rotations_32fc[0]=*phase;
- (*phase) *= phase_inc;
- four_phase_rotations_32fc[1]=*phase;
- (*phase) *= phase_inc;
- four_phase_rotations_32fc[2]=*phase;
- (*phase) *= phase_inc;
- four_phase_rotations_32fc[3]=*phase;
- (*phase) *= phase_inc;
- //convert the rotations to integers
- fc_reg1 = _mm_load_ps((float*)&four_phase_rotations_32fc[0]);
+ // compute next four 16ic complex exponential values for phase rotation
- // disable next line for 1 bit rotation (equivalent to a square wave NCO)
- fc_reg1 = _mm_mul_ps (fc_reg1, _rotator_amplitude_reg);
+ // compute next four float complex rotations
+ four_phase_rotations_32fc[0]=*phase;
+ (*phase) *= phase_inc;
+ four_phase_rotations_32fc[1]=*phase;
+ (*phase) *= phase_inc;
+ four_phase_rotations_32fc[2]=*phase;
+ (*phase) *= phase_inc;
+ four_phase_rotations_32fc[3]=*phase;
+ (*phase) *= phase_inc;
+ //convert the rotations to integers
+ fc_reg1 = _mm_load_ps((float*)&four_phase_rotations_32fc[0]);
- fc_reg2 = _mm_load_ps((float*)&four_phase_rotations_32fc[2]);
- sc_reg1 = _mm_cvtps_epi32(fc_reg1);
- sc_reg2 = _mm_cvtps_epi32(fc_reg2);
- b = _mm_packs_epi32(sc_reg1, sc_reg2);
+ // disable next line for 1 bit rotation (equivalent to a square wave NCO)
+ fc_reg1 = _mm_mul_ps (fc_reg1, _rotator_amplitude_reg);
- // debug
- //_mm_store_si128((__m128i*)four_phase_rotations_16sc, b);
- //printf("phase fc: %f,%f phase sc: %i,%i \n",lv_creal(four_phase_rotations_32fc[0]),lv_cimag(four_phase_rotations_32fc[0]),lv_creal(four_phase_rotations_16sc[0]),lv_cimag(four_phase_rotations_16sc[0]));
+ fc_reg2 = _mm_load_ps((float*)&four_phase_rotations_32fc[2]);
+ sc_reg1 = _mm_cvtps_epi32(fc_reg1);
+ sc_reg2 = _mm_cvtps_epi32(fc_reg2);
+ b = _mm_packs_epi32(sc_reg1, sc_reg2);
- // multiply the input vector times the rotations
- c = _mm_mullo_epi16 (a, b); // a3.i*b3.i, a3.r*b3.r, ....
+ // debug
+ //_mm_store_si128((__m128i*)four_phase_rotations_16sc, b);
+ //printf("phase fc: %f,%f phase sc: %i,%i \n",lv_creal(four_phase_rotations_32fc[0]),lv_cimag(four_phase_rotations_32fc[0]),lv_creal(four_phase_rotations_16sc[0]),lv_cimag(four_phase_rotations_16sc[0]));
- c_sr = _mm_srli_si128 (c, 2); // Shift a right by imm8 bytes while shifting in zeros, and store the results in dst.
- real = _mm_subs_epi16 (c, c_sr);
- real = _mm_and_si128 (real, mask_real); // a3.r*b3.r-a3.i*b3.i , 0, a3.r*b3.r- a3.i*b3.i
+ // multiply the input vector times the rotations
+ c = _mm_mullo_epi16 (a, b); // a3.i*b3.i, a3.r*b3.r, ....
- b_sl = _mm_slli_si128(b, 2); // b3.r, b2.i ....
- a_sl = _mm_slli_si128(a, 2); // a3.r, a2.i ....
+ c_sr = _mm_srli_si128 (c, 2); // Shift a right by imm8 bytes while shifting in zeros, and store the results in dst.
+ real = _mm_subs_epi16 (c, c_sr);
+ real = _mm_and_si128 (real, mask_real); // a3.r*b3.r-a3.i*b3.i , 0, a3.r*b3.r- a3.i*b3.i
- imag1 = _mm_mullo_epi16(a, b_sl); // a3.i*b3.r, ....
- imag2 = _mm_mullo_epi16(b, a_sl); // b3.i*a3.r, ....
+ b_sl = _mm_slli_si128(b, 2); // b3.r, b2.i ....
+ a_sl = _mm_slli_si128(a, 2); // a3.r, a2.i ....
- imag = _mm_adds_epi16(imag1, imag2);
- imag = _mm_and_si128 (imag, mask_imag); // a3.i*b3.r+b3.i*a3.r, 0, ...
+ imag1 = _mm_mullo_epi16(a, b_sl); // a3.i*b3.r, ....
+ imag2 = _mm_mullo_epi16(b, a_sl); // b3.i*a3.r, ....
- result = _mm_or_si128 (real, imag);
+ imag = _mm_adds_epi16(imag1, imag2);
+ imag = _mm_and_si128 (imag, mask_imag); // a3.i*b3.r+b3.i*a3.r, 0, ...
- // normalize the rotations
- // TODO
+ result = _mm_or_si128 (real, imag);
- // store results
- _mm_store_si128((__m128i*)_out, result);
+ // normalize the rotations
+ // TODO
- _in_a += 4;
- _out += 4;
- }
+ // store results
+ _mm_store_si128((__m128i*)_out, result);
- for (unsigned int i = sse_iters * 4; i < num_points; ++i)
- {
- *_out++ = *_in_a++ * (*phase);
- (*phase) *= phase_inc;
- }
+ _in_a += 4;
+ _out += 4;
+ }
+ for (unsigned int i = sse_iters * 4; i < num_points; ++i)
+ {
+ *_out++ = *_in_a++ * (*phase);
+ (*phase) *= phase_inc;
+ }
}
#endif /* LV_HAVE_SSE2 */
@@ -177,128 +174,200 @@ static inline void volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_a_sse2(lv_16sc_t* out
static inline void volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_u_sse2(lv_16sc_t* outVector, const lv_16sc_t* inVector, const lv_32fc_t phase_inc, lv_32fc_t* phase, unsigned int num_points)
{
- const unsigned int sse_iters = num_points / 4;
- __m128i a,b,c, c_sr, mask_imag, mask_real, real, imag, imag1,imag2, b_sl, a_sl, result;
-
- mask_imag = _mm_set_epi8(255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0);
- mask_real = _mm_set_epi8(0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255);
+ const unsigned int sse_iters = num_points / 4;
+ __m128i a,b,c, c_sr, mask_imag, mask_real, real, imag, imag1,imag2, b_sl, a_sl, result;
- const lv_16sc_t* _in_a = inVector;
- __attribute__((aligned(32))) lv_32fc_t four_phase_rotations_32fc[4];
- // debug
- //__attribute__((aligned(16))) lv_16sc_t four_phase_rotations_16sc[4];
+ mask_imag = _mm_set_epi8(255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0);
+ mask_real = _mm_set_epi8(0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255, 0, 0, 255, 255);
- // specify how many bits are used in the rotation (2^(N-1)) (it WILL increase the output signal range!)
- __attribute__((aligned(32))) float rotator_amplitude_float[4] = { 4.0f, 4.0f, 4.0f, 4.0f };
- __m128 _rotator_amplitude_reg = _mm_load_ps(rotator_amplitude_float);
+ const lv_16sc_t* _in_a = inVector;
+ __attribute__((aligned(32))) lv_32fc_t four_phase_rotations_32fc[4];
+ // debug
+ //__attribute__((aligned(16))) lv_16sc_t four_phase_rotations_16sc[4];
- //const lv_16sc_t* _in_b = in_b;
- lv_16sc_t* _out = outVector;
+ // specify how many bits are used in the rotation (2^(N-1)) (it WILL increase the output signal range!)
+ __attribute__((aligned(32))) float rotator_amplitude_float[4] = { 4.0f, 4.0f, 4.0f, 4.0f };
+ __m128 _rotator_amplitude_reg = _mm_load_ps(rotator_amplitude_float);
- __m128 fc_reg1, fc_reg2;
- __m128i sc_reg1, sc_reg2; // is __m128i defined in xmmintrin.h?
+ //const lv_16sc_t* _in_b = in_b;
+ lv_16sc_t* _out = outVector;
- for(unsigned int number = 0; number < sse_iters; number++)
- {
- //std::complex<T> memory structure: real part -> reinterpret_cast<cv T*>(a)[2*i]
- //imaginery part -> reinterpret_cast<cv T*>(a)[2*i + 1]
- // a[127:0]=[a3.i,a3.r,a2.i,a2.r,a1.i,a1.r,a0.i,a0.r]
- a = _mm_loadu_si128((__m128i*)_in_a); //load (2 byte imag, 2 byte real) x 4 into 128 bits reg
- //b = _mm_loadu_si128((__m128i*)_in_b);
+ __m128 fc_reg1, fc_reg2;
+ __m128i sc_reg1, sc_reg2; // is __m128i defined in xmmintrin.h?
- // compute next four 16ic complex exponential values for phase rotation
+ for(unsigned int number = 0; number < sse_iters; number++)
+ {
+ //std::complex<T> memory structure: real part -> reinterpret_cast<cv T*>(a)[2*i]
+ //imaginery part -> reinterpret_cast<cv T*>(a)[2*i + 1]
+ // a[127:0]=[a3.i,a3.r,a2.i,a2.r,a1.i,a1.r,a0.i,a0.r]
+ a = _mm_loadu_si128((__m128i*)_in_a); //load (2 byte imag, 2 byte real) x 4 into 128 bits reg
+ //b = _mm_loadu_si128((__m128i*)_in_b);
- // compute next four float complex rotations
- four_phase_rotations_32fc[0]=*phase;
- (*phase) *= phase_inc;
- four_phase_rotations_32fc[1]=*phase;
- (*phase) *= phase_inc;
- four_phase_rotations_32fc[2]=*phase;
- (*phase) *= phase_inc;
- four_phase_rotations_32fc[3]=*phase;
- (*phase) *= phase_inc;
- //convert the rotations to integers
- fc_reg1 = _mm_load_ps((float*)&four_phase_rotations_32fc[0]);
+ // compute next four 16ic complex exponential values for phase rotation
- // disable next line for 1 bit rotation (equivalent to a square wave NCO)
- fc_reg1 = _mm_mul_ps (fc_reg1, _rotator_amplitude_reg);
+ // compute next four float complex rotations
+ four_phase_rotations_32fc[0]=*phase;
+ (*phase) *= phase_inc;
+ four_phase_rotations_32fc[1]=*phase;
+ (*phase) *= phase_inc;
+ four_phase_rotations_32fc[2]=*phase;
+ (*phase) *= phase_inc;
+ four_phase_rotations_32fc[3]=*phase;
+ (*phase) *= phase_inc;
+ //convert the rotations to integers
+ fc_reg1 = _mm_load_ps((float*)&four_phase_rotations_32fc[0]);
- fc_reg2 = _mm_load_ps((float*)&four_phase_rotations_32fc[2]);
- sc_reg1 = _mm_cvtps_epi32(fc_reg1);
- sc_reg2 = _mm_cvtps_epi32(fc_reg2);
- b = _mm_packs_epi32(sc_reg1, sc_reg2);
+ // disable next line for 1 bit rotation (equivalent to a square wave NCO)
+ fc_reg1 = _mm_mul_ps (fc_reg1, _rotator_amplitude_reg);
- // debug
- //_mm_store_si128((__m128i*)four_phase_rotations_16sc, b);
- //printf("phase fc: %f,%f phase sc: %i,%i \n",lv_creal(four_phase_rotations_32fc[0]),lv_cimag(four_phase_rotations_32fc[0]),lv_creal(four_phase_rotations_16sc[0]),lv_cimag(four_phase_rotations_16sc[0]));
+ fc_reg2 = _mm_load_ps((float*)&four_phase_rotations_32fc[2]);
+ sc_reg1 = _mm_cvtps_epi32(fc_reg1);
+ sc_reg2 = _mm_cvtps_epi32(fc_reg2);
+ b = _mm_packs_epi32(sc_reg1, sc_reg2);
- // multiply the input vector times the rotations
- c = _mm_mullo_epi16 (a, b); // a3.i*b3.i, a3.r*b3.r, ....
+ // debug
+ //_mm_store_si128((__m128i*)four_phase_rotations_16sc, b);
+ //printf("phase fc: %f,%f phase sc: %i,%i \n",lv_creal(four_phase_rotations_32fc[0]),lv_cimag(four_phase_rotations_32fc[0]),lv_creal(four_phase_rotations_16sc[0]),lv_cimag(four_phase_rotations_16sc[0]));
- c_sr = _mm_srli_si128 (c, 2); // Shift a right by imm8 bytes while shifting in zeros, and store the results in dst.
- real = _mm_subs_epi16 (c, c_sr);
- real = _mm_and_si128 (real, mask_real); // a3.r*b3.r-a3.i*b3.i , 0, a3.r*b3.r- a3.i*b3.i
+ // multiply the input vector times the rotations
+ c = _mm_mullo_epi16 (a, b); // a3.i*b3.i, a3.r*b3.r, ....
- b_sl = _mm_slli_si128(b, 2); // b3.r, b2.i ....
- a_sl = _mm_slli_si128(a, 2); // a3.r, a2.i ....
+ c_sr = _mm_srli_si128 (c, 2); // Shift a right by imm8 bytes while shifting in zeros, and store the results in dst.
+ real = _mm_subs_epi16 (c, c_sr);
+ real = _mm_and_si128 (real, mask_real); // a3.r*b3.r-a3.i*b3.i , 0, a3.r*b3.r- a3.i*b3.i
- imag1 = _mm_mullo_epi16(a, b_sl); // a3.i*b3.r, ....
- imag2 = _mm_mullo_epi16(b, a_sl); // b3.i*a3.r, ....
+ b_sl = _mm_slli_si128(b, 2); // b3.r, b2.i ....
+ a_sl = _mm_slli_si128(a, 2); // a3.r, a2.i ....
- imag = _mm_adds_epi16(imag1, imag2);
- imag = _mm_and_si128 (imag, mask_imag); // a3.i*b3.r+b3.i*a3.r, 0, ...
+ imag1 = _mm_mullo_epi16(a, b_sl); // a3.i*b3.r, ....
+ imag2 = _mm_mullo_epi16(b, a_sl); // b3.i*a3.r, ....
- result = _mm_or_si128 (real, imag);
+ imag = _mm_adds_epi16(imag1, imag2);
+ imag = _mm_and_si128 (imag, mask_imag); // a3.i*b3.r+b3.i*a3.r, 0, ...
- // normalize the rotations
- // TODO
+ result = _mm_or_si128 (real, imag);
- // store results
- _mm_storeu_si128((__m128i*)_out, result);
+ // normalize the rotations
+ // TODO
- _in_a += 4;
- _out += 4;
- }
+ // store results
+ _mm_storeu_si128((__m128i*)_out, result);
- for (unsigned int i = sse_iters * 4; i < num_points; ++i)
- {
- *_out++ = *_in_a++ * (*phase);
- (*phase) *= phase_inc;
- }
+ _in_a += 4;
+ _out += 4;
+ }
+ for (unsigned int i = sse_iters * 4; i < num_points; ++i)
+ {
+ *_out++ = *_in_a++ * (*phase);
+ (*phase) *= phase_inc;
+ }
}
#endif /* LV_HAVE_SSE2 */
#ifdef LV_HAVE_NEON
-#include <arm.neon.h>
+#include <arm_neon.h>
+
static inline void volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_neon(lv_16sc_t* outVector, const lv_16sc_t* inVector, const lv_32fc_t phase_inc, lv_32fc_t* phase, unsigned int num_points)
{
unsigned int i = 0;
- int j = 0;
- lv_16sc_t tmp16;
- lv_32fc_t tmp32;
- for(i = 0; i < (unsigned int)(num_points / ROTATOR_RELOAD); ++i)
+ const unsigned int neon_iters = num_points / 4;
+ lv_16sc_t tmp16_;
+ lv_32fc_t tmp32_;
+
+ const lv_16sc_t* _in = inVector;
+ lv_16sc_t* _out = outVector;
+
+ lv_32fc_t ___phase4 = phase_inc * phase_inc * phase_inc * phase_inc;
+ float32_t __phase4_real[4] = { lv_creal(___phase4), lv_creal(___phase4), lv_creal(___phase4), lv_creal(___phase4) };
+ float32_t __phase4_imag[4] = { lv_cimag(___phase4), lv_cimag(___phase4), lv_cimag(___phase4), lv_cimag(___phase4) };
+
+ float32x4_t _phase4_real = vld1q_f32(__phase4_real);
+ float32x4_t _phase4_imag = vld1q_f32(__phase4_imag);
+
+ lv_32fc_t phase2 = (lv_32fc_t)(*phase) * phase_inc;
+ lv_32fc_t phase3 = phase2 * phase_inc;
+ lv_32fc_t phase4 = phase3 * phase_inc;
+
+ float32_t __phase_real[4] = { lv_creal((*phase)), lv_creal(phase2), lv_creal(phase3), lv_creal(phase4) };
+ float32_t __phase_imag[4] = { lv_cimag((*phase)), lv_cimag(phase2), lv_cimag(phase3), lv_cimag(phase4) };
+
+ float32x4_t _phase_real = vld1q_f32(__phase_real);
+ float32x4_t _phase_imag = vld1q_f32(__phase_imag);
+
+ float32x4_t half = vdupq_n_f32(0.5f);
+ int16x4x2_t tmp16;
+ int32x4x2_t tmp32i;
+ float32x4x2_t tmp32f, tmp_real, tmp_imag;
+ float32x4_t sign, PlusHalf, Round;
+
+ if (neon_iters > 0)
{
- for(j = 0; j < ROTATOR_RELOAD; ++j)
+ for(; i < neon_iters; ++i)
{
- tmp16 = *inVector++;
- tmp32 = lv_cmake((float)lv_creal(tmp16), (float)lv_cimag(tmp16)) * (*phase);
- *outVector++ = lv_cmake((int16_t)rintf(lv_creal(tmp32)), (int16_t)rintf(lv_cimag(tmp32)));
- (*phase) *= phase_inc;
- tmp32=(*phase);
- printf("[%i][%i] phase fc: %f,%f \n",i,j,lv_creal(tmp32),lv_cimag(tmp32));
+ /* load 4 complex numbers (int 16 bits each component) */
+ tmp16 = vld2_s16((int16_t*)_in); _in += 4;
+
+ /* promote them to int 32 bits */
+ tmp32i.val[0] = vmovl_s16(tmp16.val[0]);
+ tmp32i.val[1] = vmovl_s16(tmp16.val[1]);
+
+ /* promote them to float 32 bits */
+ tmp32f.val[0] = vcvtq_f32_s32(tmp32i.val[0]);
+ tmp32f.val[1] = vcvtq_f32_s32(tmp32i.val[1]);
+
+ /* complex multiplication of four complex samples (float 32 bits each component) */
+ tmp_real.val[0] = vmulq_f32(tmp32f.val[0], _phase_real);
+ tmp_real.val[1] = vmulq_f32(tmp32f.val[1], _phase_imag);
+ tmp_imag.val[0] = vmulq_f32(tmp32f.val[0], _phase_imag);
+ tmp_imag.val[1] = vmulq_f32(tmp32f.val[1], _phase_real);
+
+ tmp32f.val[0] = vsubq_f32(tmp_real.val[0], tmp_real.val[1]);
+ tmp32f.val[1] = vaddq_f32(tmp_imag.val[0], tmp_imag.val[1]);
+
+ /* downcast results to int32 */
+ /* in __aarch64__ we can do that with vcvtaq_s32_f32(ret1); vcvtaq_s32_f32(ret2); */
+ sign = vcvtq_f32_u32((vshrq_n_u32(vreinterpretq_u32_f32(tmp32f.val[0]), 31)));
+ PlusHalf = vaddq_f32(tmp32f.val[0], half);
+ Round = vsubq_f32(PlusHalf, sign);
+ tmp32i.val[0] = vcvtq_s32_f32(Round);
+
+ sign = vcvtq_f32_u32((vshrq_n_u32(vreinterpretq_u32_f32(tmp32f.val[1]), 31)));
+ PlusHalf = vaddq_f32(tmp32f.val[1], half);
+ Round = vsubq_f32(PlusHalf, sign);
+ tmp32i.val[1] = vcvtq_s32_f32(Round);
+
+ /* downcast results to int16 */
+ tmp16.val[0] = vqmovn_s32(tmp32i.val[0]);
+ tmp16.val[1] = vqmovn_s32(tmp32i.val[1]);
+
+ /* compute next four phases */
+ tmp_real.val[0] = vmulq_f32(_phase_real, _phase4_real);
+ tmp_real.val[1] = vmulq_f32(_phase_imag, _phase4_imag);
+ tmp_imag.val[0] = vmulq_f32(_phase_real, _phase4_imag);
+ tmp_imag.val[1] = vmulq_f32(_phase_imag, _phase4_real);
+
+ _phase_real = vsubq_f32(tmp_real.val[0], tmp_real.val[1]);
+ _phase_imag = vaddq_f32(tmp_imag.val[0], tmp_imag.val[1]);
+
+ /* store the four complex results */
+ vst2_s16((int16_t*)_out, tmp16);
+ _out += 4;
}
+ vst1q_f32((float32_t*)__phase_real, _phase_real);
+ vst1q_f32((float32_t*)__phase_imag, _phase_imag);
+
+ (*phase) = lv_cmake(__phase_real[3], __phase_imag[3]);
}
- for(i = 0; i < num_points % ROTATOR_RELOAD; ++i)
+ for(i = 0; i < neon_iters % 4; ++i)
{
- tmp16 = *inVector++;
- tmp32 = lv_cmake((float)lv_creal(tmp16), (float)lv_cimag(tmp16)) * (*phase);
- *outVector++ = lv_cmake((int16_t)rintf(lv_creal(tmp32)), (int16_t)rintf(lv_cimag(tmp32)));
+ tmp16_ = *_in++;
+ tmp32_ = lv_cmake((float32_t)lv_creal(tmp16_), (float32_t)lv_cimag(tmp16_)) * (*phase);
+ *_out++ = lv_cmake((int16_t)rintf(lv_creal(tmp32_)), (int16_t)rintf(lv_cimag(tmp32_)));
(*phase) *= phase_inc;
}
+}
#endif /* LV_HAVE_NEON */
-
-#endif
-
+#endif /* INCLUDED_volk_gnsssdr_16ic_s32fc_x2_rotator_16ic_H */
--
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