rev 14505 - in trunk/packages/qt4-x11/debian: . patches
Aurelien Jarno
aurel32 at alioth.debian.org
Sun Apr 26 20:52:24 UTC 2009
Author: aurel32
Date: 2009-04-26 20:52:23 +0000 (Sun, 26 Apr 2009)
New Revision: 14505
Added:
trunk/packages/qt4-x11/debian/patches/20_mips_atomic_ops.diff
Modified:
trunk/packages/qt4-x11/debian/changelog
Log:
+++ Changes by Aurelien Jarno:
* Add patch:
- 20_mips_atomic_ops.diff
Set the mips instruction set to MIPS II around ll/sc in
qatomic_mips.h. (Closes: #525707)
Modified: trunk/packages/qt4-x11/debian/changelog
===================================================================
--- trunk/packages/qt4-x11/debian/changelog 2009-04-26 18:54:01 UTC (rev 14504)
+++ trunk/packages/qt4-x11/debian/changelog 2009-04-26 20:52:23 UTC (rev 14505)
@@ -1,5 +1,7 @@
qt4-x11 (4.5.1-2) UNRELEASED; urgency=low
+ +++ Changes by Fathi Boudra:
+
* Update debian/rules:
- Build with -opensource configure option to avoid Qt edition question
triggered on some build setups caused by a bug in configure script.
@@ -8,6 +10,13 @@
- 21_fix_quiloader_wrong_header_translated.diff
The header of the QTableWidgets loaded with QUiLoader are not
translated when the language change. This patch fix the issue.
+
+ +++ Changes by Aurelien Jarno:
+
+ * Add patch:
+ - 20_mips_atomic_ops.diff
+ Set the mips instruction set to MIPS II around ll/sc in
+ qatomic_mips.h. (Closes: #525707)
-- Fathi Boudra <fabo at debian.org> Sat, 25 Apr 2009 18:52:20 +0200
Added: trunk/packages/qt4-x11/debian/patches/20_mips_atomic_ops.diff
===================================================================
--- trunk/packages/qt4-x11/debian/patches/20_mips_atomic_ops.diff (rev 0)
+++ trunk/packages/qt4-x11/debian/patches/20_mips_atomic_ops.diff 2009-04-26 20:52:23 UTC (rev 14505)
@@ -0,0 +1,377 @@
+2009-04-26 Aurelien Jarno <aurelien at aurel32.net>
+
+ * src/corelib/arch/qatomic_mips.h: set the mips instruction set
+ to MIPS II around ll/sc.
+
+--- a/src/corelib/arch/qatomic_mips.h
++++ b/src/corelib/arch/qatomic_mips.h
+@@ -103,16 +103,25 @@
+
+ #if defined(Q_CC_GNU) && !defined(Q_OS_IRIX)
+
++#if _MIPS_SIM == _ABIO32
++#define SET_MIPS2 ".set mips2\n\t"
++#else
++#define SET_MIPS2
++#endif
++
+ inline bool QBasicAtomicInt::ref()
+ {
+ register int originalValue;
+ register int newValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ "ll %[originalValue], %[_q_value]\n"
+ "addiu %[newValue], %[originalValue], %[one]\n"
+ "sc %[newValue], %[_q_value]\n"
+ "beqz %[newValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [_q_value] "+m" (_q_value),
+ [newValue] "=&r" (newValue)
+@@ -125,12 +134,15 @@
+ {
+ register int originalValue;
+ register int newValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ "ll %[originalValue], %[_q_value]\n"
+ "addiu %[newValue], %[originalValue], %[minusOne]\n"
+ "sc %[newValue], %[_q_value]\n"
+ "beqz %[newValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [_q_value] "+m" (_q_value),
+ [newValue] "=&r" (newValue)
+@@ -143,7 +155,9 @@
+ {
+ register int result;
+ register int tempValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ "ll %[result], %[_q_value]\n"
+ "xor %[result], %[result], %[expectedValue]\n"
+ "bnez %[result], 0f\n"
+@@ -153,6 +167,7 @@
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
+ "0:\n"
++ ".set pop\n"
+ : [result] "=&r" (result),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -166,7 +181,9 @@
+ {
+ register int result;
+ register int tempValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ "ll %[result], %[_q_value]\n"
+ "xor %[result], %[result], %[expectedValue]\n"
+ "bnez %[result], 0f\n"
+@@ -177,6 +194,7 @@
+ "nop\n"
+ "sync\n"
+ "0:\n"
++ ".set pop\n"
+ : [result] "=&r" (result),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -190,7 +208,9 @@
+ {
+ register int result;
+ register int tempValue;
+- asm volatile("sync\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "sync\n"
+ "0:\n"
+ "ll %[result], %[_q_value]\n"
+ "xor %[result], %[result], %[expectedValue]\n"
+@@ -201,6 +221,7 @@
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
+ "0:\n"
++ ".set pop\n"
+ : [result] "=&r" (result),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -219,12 +240,15 @@
+ {
+ register int originalValue;
+ register int tempValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ "ll %[originalValue], %[_q_value]\n"
+ "move %[tempValue], %[newValue]\n"
+ "sc %[tempValue], %[_q_value]\n"
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -237,13 +261,16 @@
+ {
+ register int originalValue;
+ register int tempValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ "ll %[originalValue], %[_q_value]\n"
+ "move %[tempValue], %[newValue]\n"
+ "sc %[tempValue], %[_q_value]\n"
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
+ "sync\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -256,13 +283,16 @@
+ {
+ register int originalValue;
+ register int tempValue;
+- asm volatile("sync\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "sync\n"
+ "0:\n"
+ "ll %[originalValue], %[_q_value]\n"
+ "move %[tempValue], %[newValue]\n"
+ "sc %[tempValue], %[_q_value]\n"
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -280,12 +310,15 @@
+ {
+ register int originalValue;
+ register int newValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ "ll %[originalValue], %[_q_value]\n"
+ "addu %[newValue], %[originalValue], %[valueToAdd]\n"
+ "sc %[newValue], %[_q_value]\n"
+ "beqz %[newValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [_q_value] "+m" (_q_value),
+ [newValue] "=&r" (newValue)
+@@ -298,13 +331,16 @@
+ {
+ register int originalValue;
+ register int newValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ "ll %[originalValue], %[_q_value]\n"
+ "addu %[newValue], %[originalValue], %[valueToAdd]\n"
+ "sc %[newValue], %[_q_value]\n"
+ "beqz %[newValue], 0b\n"
+ "nop\n"
+ "sync\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [_q_value] "+m" (_q_value),
+ [newValue] "=&r" (newValue)
+@@ -317,13 +353,16 @@
+ {
+ register int originalValue;
+ register int newValue;
+- asm volatile("sync\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "sync\n"
+ "0:\n"
+ "ll %[originalValue], %[_q_value]\n"
+ "addu %[newValue], %[originalValue], %[valueToAdd]\n"
+ "sc %[newValue], %[_q_value]\n"
+ "beqz %[newValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [_q_value] "+m" (_q_value),
+ [newValue] "=&r" (newValue)
+@@ -350,7 +389,9 @@
+ {
+ register T *result;
+ register T *tempValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ LLP" %[result], %[_q_value]\n"
+ "xor %[result], %[result], %[expectedValue]\n"
+ "bnez %[result], 0f\n"
+@@ -360,6 +401,7 @@
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
+ "0:\n"
++ ".set pop\n"
+ : [result] "=&r" (result),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -374,7 +416,9 @@
+ {
+ register T *result;
+ register T *tempValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ LLP" %[result], %[_q_value]\n"
+ "xor %[result], %[result], %[expectedValue]\n"
+ "bnez %[result], 0f\n"
+@@ -385,6 +429,7 @@
+ "nop\n"
+ "sync\n"
+ "0:\n"
++ ".set pop\n"
+ : [result] "=&r" (result),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -399,7 +444,9 @@
+ {
+ register T *result;
+ register T *tempValue;
+- asm volatile("sync\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "sync\n"
+ "0:\n"
+ LLP" %[result], %[_q_value]\n"
+ "xor %[result], %[result], %[expectedValue]\n"
+@@ -410,6 +457,7 @@
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
+ "0:\n"
++ ".set pop\n"
+ : [result] "=&r" (result),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -430,12 +478,15 @@
+ {
+ register T *originalValue;
+ register T *tempValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ LLP" %[originalValue], %[_q_value]\n"
+ "move %[tempValue], %[newValue]\n"
+ SCP" %[tempValue], %[_q_value]\n"
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -449,13 +500,16 @@
+ {
+ register T *originalValue;
+ register T *tempValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ LLP" %[originalValue], %[_q_value]\n"
+ "move %[tempValue], %[newValue]\n"
+ SCP" %[tempValue], %[_q_value]\n"
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
+ "sync\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -469,13 +523,16 @@
+ {
+ register T *originalValue;
+ register T *tempValue;
+- asm volatile("sync\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "sync\n"
+ "0:\n"
+ LLP" %[originalValue], %[_q_value]\n"
+ "move %[tempValue], %[newValue]\n"
+ SCP" %[tempValue], %[_q_value]\n"
+ "beqz %[tempValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [tempValue] "=&r" (tempValue),
+ [_q_value] "+m" (_q_value)
+@@ -495,12 +552,15 @@
+ {
+ register T *originalValue;
+ register T *newValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ LLP" %[originalValue], %[_q_value]\n"
+ "addu %[newValue], %[originalValue], %[valueToAdd]\n"
+ SCP" %[newValue], %[_q_value]\n"
+ "beqz %[newValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [_q_value] "+m" (_q_value),
+ [newValue] "=&r" (newValue)
+@@ -514,13 +574,16 @@
+ {
+ register T *originalValue;
+ register T *newValue;
+- asm volatile("0:\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "0:\n"
+ LLP" %[originalValue], %[_q_value]\n"
+ "addu %[newValue], %[originalValue], %[valueToAdd]\n"
+ SCP" %[newValue], %[_q_value]\n"
+ "beqz %[newValue], 0b\n"
+ "nop\n"
+ "sync\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [_q_value] "+m" (_q_value),
+ [newValue] "=&r" (newValue)
+@@ -534,13 +597,16 @@
+ {
+ register T *originalValue;
+ register T *newValue;
+- asm volatile("sync\n"
++ asm volatile(".set push\n"
++ SET_MIPS2
++ "sync\n"
+ "0:\n"
+ LLP" %[originalValue], %[_q_value]\n"
+ "addu %[newValue], %[originalValue], %[valueToAdd]\n"
+ SCP" %[newValue], %[_q_value]\n"
+ "beqz %[newValue], 0b\n"
+ "nop\n"
++ ".set pop\n"
+ : [originalValue] "=&r" (originalValue),
+ [_q_value] "+m" (_q_value),
+ [newValue] "=&r" (newValue)
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