[libclc] annotated tag upstream/0.2.0+git20180312 created (now bb96b6f)
Andreas Boll
aboll-guest at moszumanska.debian.org
Mon Mar 19 16:51:08 UTC 2018
This is an automated email from the git hooks/post-receive script.
aboll-guest pushed a change to annotated tag upstream/0.2.0+git20180312
in repository libclc.
at bb96b6f (tag)
tagging 00236279a293b3737dee08c14f25923a889d2795 (commit)
replaces upstream/0.2.0+git20171106
tagged by Timo Aaltonen
on Tue Mar 13 13:56:17 2018 +0200
- Log -----------------------------------------------------------------
upstream 0.2.0+git20180312
Jan Vesely (74):
native_log2: Switch to generic native intrinsic inc file
native_log: Switch to generic native intrinsic inc file
native_log10: Switch to generic native intrinsic inc file
amdgpu: Add workaround for unimplemented llvm.exp intrinsic
native_exp: Switch implementation to llvm intrinsic
native_exp2: Switch implementation to llvm intrinsic
native_cos: Switch implementation to llvm intrinsic
native_sin: Switch implementation to llvm intrinsic
native_sqrt: Switch implementation to llvm intrinsic
native_exp10: Switch implementation to llvm intrinsic
math: Use precomputed constant for log2(10.0)
native_tan: Switch implementation to use native_sin/native_cos
native_rsqrt: Switch implementation to 1 / native_sqrt
native_recip: provide function implementation instead of macro
native_divide: provide function implementation instead of macro
native_powr: Switch implementation to native_exp2 and native_log2
math: Implement maxmag
math: Implement minmag
pow: Port from amd_builtins
pown: Port from amd_builtins
powr: Port from amd_builtins
rootn: Port from amd_builtins
half_rsqrt: Cleanup implementation
half_sqrt: Cleanup implementation
half_cos: Implement using cos
half_exp: Implement using exp
half_exp2: Implement using exp2
half_exp10: Implement using exp10
half_log: Implement using log
half_log10: Implement using log10
half_log2: Implement using log2
half_recip: Implement using 1/x
half_sin: Implement using sin
half_tan: Implement using tan
half_divide: Implement using x/y
tan: Port from amd_builtins
tanpi: Port from amd_builtins
math.h: Set HAVE_HW_FMA32 based on compiler provided macro
math.h: Use logical operations instead of bit operations for readability
half_powr: Implement using powr
vstore_half: Make sure the helper function is always inline
vstore_half: Add support for custom rounding functions
vstore_half: Consolidate declarations
Add vstore_half_rtz implementation
Add vstore_half_rtn implementation
Add vstore_half_rtp implementation
Add vstore_half_rte implementation
amdgpu/half_rsqrt: Switch implementation to native_rsqrt
amdgpu/half_sqrt: Switch implementation to native_sqrt
amdgpu/half_exp: Switch implementation to native_exp
amdgpu/half_exp10: Switch implementation to native_exp10
amdgpu/half_exp2: Switch implementation to native_exp2
amdgpu/half_log: Switch implementation to native_log
amdgpu/half_log10: Switch implementation to native_log10
amdgpu/half_log2: Switch implementation to native_log2
amdgpu/half_recip: Switch implementation to native_recip
amdgcn: Fix datalayout after clang r324101
r600: Fix datalayout after clang r324101
amdgcn: Fix datalayout after addition of 32bit const AS in r324747
amdgcn: Fix build after GDS/const AS swap in r325030
utils: Adapt to llvm r325155
Move cl_khr_fp64 exntension enablement to gentype include lists
maxmag: Condition variable needs to be the same bitwidth as operands
minmag: Condition variable needs to be the same bitwidth as operands
select: Add vector implementation
frexp: Reuse types provided by gentype.inc
lgamma_r: Move code from .inc to .cl file
popcount: Provide function implementation rather than intrinsic redirect
integer/gentype: Add __CLC_VECSIZE macro
amdgcn,popcount: Workaround broken llvm.ctpop intrinsic on some GCN ASICs
amdgcn/fmin: fcanonicalize operands
amdgcn/fmax: fcanonicalize operands
travis: Add build using llvm-6
nan: Implement
Vedran Miletic (1):
configure.py: Add gfx900 (Vega, Raven)
-----------------------------------------------------------------------
This annotated tag includes the following new commits:
new 23d5db8 native_log2: Switch to generic native intrinsic inc file
new 8fdb785 native_log: Switch to generic native intrinsic inc file
new d881f24 native_log10: Switch to generic native intrinsic inc file
new 6ce5704 amdgpu: Add workaround for unimplemented llvm.exp intrinsic
new 8811942 native_exp: Switch implementation to llvm intrinsic
new 7973d6a native_exp2: Switch implementation to llvm intrinsic
new f65be22 native_cos: Switch implementation to llvm intrinsic
new 522e710 native_sin: Switch implementation to llvm intrinsic
new d597896 native_sqrt: Switch implementation to llvm intrinsic
new 11e82f7 native_exp10: Switch implementation to llvm intrinsic
new d66c580 math: Use precomputed constant for log2(10.0)
new 928e00c native_tan: Switch implementation to use native_sin/native_cos
new cee90c3 native_rsqrt: Switch implementation to 1 / native_sqrt
new bfc859b native_recip: provide function implementation instead of macro
new f19c422 native_divide: provide function implementation instead of macro
new 38cf24d native_powr: Switch implementation to native_exp2 and native_log2
new 60e04f4 math: Implement maxmag
new 3d994f2 math: Implement minmag
new d638441 configure.py: Add gfx900 (Vega, Raven)
new e57924f pow: Port from amd_builtins
new 090cd0e pown: Port from amd_builtins
new e7ba5a1 powr: Port from amd_builtins
new e583aa1 rootn: Port from amd_builtins
new 41879e4 half_rsqrt: Cleanup implementation
new dc17ee5 half_sqrt: Cleanup implementation
new a172af7 half_cos: Implement using cos
new 6b9ebbd half_exp: Implement using exp
new 02bc2ee half_exp2: Implement using exp2
new 4096c0a half_exp10: Implement using exp10
new 391caaf half_log: Implement using log
new 05dc895 half_log10: Implement using log10
new bc35b27 half_log2: Implement using log2
new 2b093d6 half_recip: Implement using 1/x
new 8c3ada2 half_sin: Implement using sin
new 135437f half_tan: Implement using tan
new fdd3dde half_divide: Implement using x/y
new c7403d2 tan: Port from amd_builtins
new d20b120 tanpi: Port from amd_builtins
new e7fc75d math.h: Set HAVE_HW_FMA32 based on compiler provided macro
new becbb86 math.h: Use logical operations instead of bit operations for readability
new 13541fc half_powr: Implement using powr
new 1036c36 vstore_half: Make sure the helper function is always inline
new 5d1b20e vstore_half: Add support for custom rounding functions
new a9a3597 vstore_half: Consolidate declarations
new 88e1b33 Add vstore_half_rtz implementation
new dbcf909 Add vstore_half_rtn implementation
new 95849e0 Add vstore_half_rtp implementation
new 81da85d Add vstore_half_rte implementation
new 7c4255e amdgpu/half_rsqrt: Switch implementation to native_rsqrt
new 7858f64 amdgpu/half_sqrt: Switch implementation to native_sqrt
new de0a7c3 amdgpu/half_exp: Switch implementation to native_exp
new 31c7154 amdgpu/half_exp10: Switch implementation to native_exp10
new cf2cbdc amdgpu/half_exp2: Switch implementation to native_exp2
new ae36257 amdgpu/half_log: Switch implementation to native_log
new 2e3a2fc amdgpu/half_log10: Switch implementation to native_log10
new bff9f08 amdgpu/half_log2: Switch implementation to native_log2
new ca73f7f amdgpu/half_recip: Switch implementation to native_recip
new 35cf067 amdgcn: Fix datalayout after clang r324101
new 732e19e r600: Fix datalayout after clang r324101
new c947a4d amdgcn: Fix datalayout after addition of 32bit const AS in r324747
new fb39e82 amdgcn: Fix build after GDS/const AS swap in r325030
new 3554053 utils: Adapt to llvm r325155
new d1875de Move cl_khr_fp64 exntension enablement to gentype include lists
new 6017bbe maxmag: Condition variable needs to be the same bitwidth as operands
new 8e7fa64 minmag: Condition variable needs to be the same bitwidth as operands
new c34ffc2 select: Add vector implementation
new 3385ea8 frexp: Reuse types provided by gentype.inc
new 1235fbf lgamma_r: Move code from .inc to .cl file
new 284d8a6 popcount: Provide function implementation rather than intrinsic redirect
new 352e947 integer/gentype: Add __CLC_VECSIZE macro
new 034def9 amdgcn,popcount: Workaround broken llvm.ctpop intrinsic on some GCN ASICs
new 443a7c3 amdgcn/fmin: fcanonicalize operands
new a8b683e amdgcn/fmax: fcanonicalize operands
new 81a5e89 travis: Add build using llvm-6
new 0023627 nan: Implement
The 75 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
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