[Pkg-voip-commits] r6077 - /dahdi-linux/trunk/drivers/dahdi/wcopenpci.c
tzafrir-guest at alioth.debian.org
tzafrir-guest at alioth.debian.org
Mon Aug 25 15:06:49 UTC 2008
Author: tzafrir-guest
Date: Mon Aug 25 15:06:49 2008
New Revision: 6077
URL: http://svn.debian.org/wsvn/pkg-voip/?sc=1&rev=6077
Log:
A dahdi version of wcopenpci for ron to check.
Modified:
dahdi-linux/trunk/drivers/dahdi/wcopenpci.c
Modified: dahdi-linux/trunk/drivers/dahdi/wcopenpci.c
URL: http://svn.debian.org/wsvn/pkg-voip/dahdi-linux/trunk/drivers/dahdi/wcopenpci.c?rev=6077&op=diff
==============================================================================
--- dahdi-linux/trunk/drivers/dahdi/wcopenpci.c (original)
+++ dahdi-linux/trunk/drivers/dahdi/wcopenpci.c Mon Aug 25 15:06:49 2008
@@ -31,7 +31,7 @@
#define VERBOSE_TIMING 0
/* Driver constants */
-#define DRIVER_DESCRIPTION "Voicetronix OpenPCI zaptel driver"
+#define DRIVER_DESCRIPTION "Voicetronix OpenPCI DAHDI driver"
#define DRIVER_AUTHOR "Mark Spencer <markster at digium.com> "\
"Voicetronix <support at voicetronix.com.au>"
@@ -47,15 +47,10 @@
#include <linux/pci.h>
#include <linux/delay.h>
-#ifdef STANDALONE_ZAPATA
- #include "zaptel.h"
- #include "../version.h"
- #include "proslic.h"
- #include "wctdm.h"
-#else
- //#include <zaptel/zaptel.h>
- #error The wcopenpci module must be built with the full zaptel source
-#endif
+#include <dahdi/kernel.h>
+#include <dahdi/version.h>
+#include "proslic.h"
+#include <dahdi/wctdm_user.h>
@@ -267,9 +262,9 @@
/* Allocate enough memory for two zt chunks, receive and transmit. Each sample uses
32 bits. Allocate an extra set just for control too */
-#define VT_PCIDMA_BLOCKSIZE (ZT_MAX_CHUNKSIZE * INOUT * MAX_PORTS * 2 * 2)
-#define VT_PCIDMA_MIDDLE (ZT_MAX_CHUNKSIZE * MAX_PORTS - 4)
-#define VT_PCIDMA_END (ZT_MAX_CHUNKSIZE * MAX_PORTS * 2 - 4)
+#define VT_PCIDMA_BLOCKSIZE (DAHDI_MAX_CHUNKSIZE * INOUT * MAX_PORTS * 2 * 2)
+#define VT_PCIDMA_MIDDLE (DAHDI_MAX_CHUNKSIZE * MAX_PORTS - 4)
+#define VT_PCIDMA_END (DAHDI_MAX_CHUNKSIZE * MAX_PORTS * 2 - 4)
#define ID_DATA_MAXSIZE 30
@@ -395,7 +390,7 @@
spinlock_t lock;
- //XXX Replace these with proper try_module_get locking in the zaptel driver.
+ //XXX Replace these with proper try_module_get locking in the dahdi driver.
//int usecount; //XXX
//int dead; //XXX
union {
@@ -415,8 +410,9 @@
volatile unsigned int *writechunk; /* Double-word aligned write memory */
volatile unsigned int *readchunk; /* Double-word aligned read memory */
- struct zt_chan chans[MAX_PORTS];
- struct zt_span span;
+ struct dahdi_chan _chans[MAX_PORTS];
+ struct dahdi_chan *chans[MAX_PORTS];
+ struct dahdi_span span;
} *cards[MAX_CARDS];
// You must hold this lock anytime you access or modify the cards[] array.
@@ -694,32 +690,32 @@
switch(msg[1]){
case DSP_LOOP_OFFHOOK:
- zt_hooksig(&wc->chans[port], ZT_RXSIG_OFFHOOK);
+ dahdi_hooksig(wc->chans[port], DAHDI_RXSIG_OFFHOOK);
dbginfo(wc->boardnum, "Port %d Loop OffHook", port);
break;
case DSP_LOOP_ONHOOK:
- zt_hooksig(&wc->chans[port], ZT_RXSIG_ONHOOK);
+ dahdi_hooksig(wc->chans[port], DAHDI_RXSIG_ONHOOK);
dbginfo(wc->boardnum, "Port %d Loop OnHook", port);
break;
case DSP_LOOP_POLARITY:
- zt_qevent_lock(&wc->chans[port], ZT_EVENT_POLARITY);
+ dahdi_qevent_lock(wc->chans[port], DAHDI_EVENT_POLARITY);
dbginfo(wc->boardnum, "Port %d Loop Polarity", port);
break;
case DSP_CODEC_RING:
- zt_hooksig(&wc->chans[port], ZT_RXSIG_RING);
+ dahdi_hooksig(wc->chans[port], DAHDI_RXSIG_RING);
dbginfo(wc->boardnum, "Port %d Ring On", port);
break;
case DSP_RING_OFF:
- zt_hooksig(&wc->chans[port], ZT_RXSIG_OFFHOOK);
+ dahdi_hooksig(wc->chans[port], DAHDI_RXSIG_OFFHOOK);
dbginfo(wc->boardnum, "Port %d Ring Off", port);
break;
case DSP_CODEC_HKOFF:
- zt_hooksig(&wc->chans[port], ZT_RXSIG_OFFHOOK);
+ dahdi_hooksig(wc->chans[port], DAHDI_RXSIG_OFFHOOK);
dbginfo(wc->boardnum, "Port %d Station OffHook", port);
if (reversepolarity)
wc->mod[port].fxs.idletxhookstate = 5;
@@ -728,7 +724,7 @@
break;
case DSP_CODEC_HKON:
- zt_hooksig(&wc->chans[port], ZT_RXSIG_ONHOOK);
+ dahdi_hooksig(wc->chans[port], DAHDI_RXSIG_ONHOOK);
dbginfo(wc->boardnum, "Port %d Station OnHook", port);
if (reversepolarity)
wc->mod[port].fxs.idletxhookstate = 6;
@@ -737,7 +733,7 @@
break;
case DSP_CODEC_FLASH:
- zt_qevent_lock(&wc->chans[port], ZT_EVENT_WINKFLASH);
+ dahdi_qevent_lock(wc->chans[port], DAHDI_EVENT_WINKFLASH);
dbginfo(wc->boardnum, "Port %d Station Flash", port);
break;
@@ -836,15 +832,15 @@
if (flags & 0x01)
writechunk = wc->writechunk;
else if (flags & 0x02)
- writechunk = wc->writechunk + ZT_CHUNKSIZE*2;
+ writechunk = wc->writechunk + DAHDI_CHUNKSIZE*2;
else {
cardcrit(wc->boardnum, "bad write interrupt flags %x, at %x",
flags, inb(TJ_DMAWC) );
return;
}
/* get data */
- zt_transmit(&wc->span);
- for (y=0,x=0;x<ZT_CHUNKSIZE;++x) {
+ dahdi_transmit(&wc->span);
+ for (y=0,x=0;x<DAHDI_CHUNKSIZE;++x) {
/* Send a sample, as a 32-bit word */
#ifdef __BIG_ENDIAN
#error No big endian support (yet)
@@ -852,33 +848,33 @@
/* transmit second 4 ports */
writechunk[y]=0;
if (wc->porttype[4])
- writechunk[y] |= (wc->chans[4].writechunk[x] << 24);
+ writechunk[y] |= (wc->chans[4]->writechunk[x] << 24);
else
writechunk[y] |= (0x01 << 24);
if (wc->porttype[5])
- writechunk[y] |= (wc->chans[5].writechunk[x] << 16);
+ writechunk[y] |= (wc->chans[5]->writechunk[x] << 16);
if (wc->porttype[6])
- writechunk[y] |= (wc->chans[6].writechunk[x] << 8);
+ writechunk[y] |= (wc->chans[6]->writechunk[x] << 8);
if (wc->porttype[7])
- writechunk[y] |= (wc->chans[7].writechunk[x]);
+ writechunk[y] |= (wc->chans[7]->writechunk[x]);
++y;
/* transmit first 4 ports */
writechunk[y]=0x01000000;
/* Make sure first port doesnt equal 0x00 */
if (wc->porttype[0]){
- if (wc->chans[0].writechunk[x] == 0)
+ if (wc->chans[0]->writechunk[x] == 0)
writechunk[y] |= (0x01 << 24);
else
- writechunk[y] |= (wc->chans[0].writechunk[x] << 24);
+ writechunk[y] |= (wc->chans[0]->writechunk[x] << 24);
}
//else writechunk[y] |= (0x00 << 24);
if (wc->porttype[1])
- writechunk[y] |= (wc->chans[1].writechunk[x] << 16);
+ writechunk[y] |= (wc->chans[1]->writechunk[x] << 16);
if (wc->porttype[2])
- writechunk[y] |= (wc->chans[2].writechunk[x] << 8);
+ writechunk[y] |= (wc->chans[2]->writechunk[x] << 8);
if (wc->porttype[3])
- writechunk[y] |= (wc->chans[3].writechunk[x]);
+ writechunk[y] |= (wc->chans[3]->writechunk[x]);
++y;
#endif
}
@@ -890,7 +886,7 @@
volatile unsigned int *readchunk;
if (flags & 0x08)
- readchunk = wc->readchunk + ZT_CHUNKSIZE*2;
+ readchunk = wc->readchunk + DAHDI_CHUNKSIZE*2;
else if (flags & 0x04)
readchunk = wc->readchunk;
else {
@@ -899,39 +895,39 @@
return;
}
- for (y=0,x=0;x<ZT_CHUNKSIZE;++x) {
+ for (y=0,x=0;x<DAHDI_CHUNKSIZE;++x) {
#ifdef __BIG_ENDIAN
#error No big endian support (yet)
#else
/* Receive first 4 ports */
if (wc->porttype[0])
- wc->chans[0].readchunk[x] = (readchunk[y] >> 24) & 0xff;
+ wc->chans[0]->readchunk[x] = (readchunk[y] >> 24) & 0xff;
if (wc->porttype[1])
- wc->chans[1].readchunk[x] = (readchunk[y] >> 16) & 0xff;
+ wc->chans[1]->readchunk[x] = (readchunk[y] >> 16) & 0xff;
if (wc->porttype[2])
- wc->chans[2].readchunk[x] = (readchunk[y] >> 8) & 0xff;
+ wc->chans[2]->readchunk[x] = (readchunk[y] >> 8) & 0xff;
if (wc->porttype[3])
- wc->chans[3].readchunk[x] = (readchunk[y]) & 0xff;
+ wc->chans[3]->readchunk[x] = (readchunk[y]) & 0xff;
++y;
/* Receive second 4 ports */
if (wc->porttype[4])
- wc->chans[4].readchunk[x] = (readchunk[y] >> 24) & 0xff;
+ wc->chans[4]->readchunk[x] = (readchunk[y] >> 24) & 0xff;
if (wc->porttype[5])
- wc->chans[5].readchunk[x] = (readchunk[y] >> 16) & 0xff;
+ wc->chans[5]->readchunk[x] = (readchunk[y] >> 16) & 0xff;
if (wc->porttype[6])
- wc->chans[6].readchunk[x] = (readchunk[y] >> 8) & 0xff;
+ wc->chans[6]->readchunk[x] = (readchunk[y] >> 8) & 0xff;
if (wc->porttype[7])
- wc->chans[7].readchunk[x] = (readchunk[y]) & 0xff;
+ wc->chans[7]->readchunk[x] = (readchunk[y]) & 0xff;
++y;
#endif
}
/* XXX We're wasting 8 taps. We should get closer :( */
for (x = 0; x < MAX_PORTS; x++) {
if (wc->porttype[x])
- zt_ec_chunk(&wc->chans[x], wc->chans[x].readchunk, wc->chans[x].writechunk);
- }
- zt_receive(&wc->span);
+ dahdi_ec_chunk(wc->chans[x], wc->chans[x]->readchunk, wc->chans[x]->writechunk);
+ }
+ dahdi_receive(&wc->span);
} //}}}
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
@@ -997,7 +993,7 @@
return IRQ_HANDLED;
} //}}}
-static int openpci_ioctl(struct zt_chan *chan, unsigned int cmd, unsigned long data)
+static int openpci_ioctl(struct dahdi_chan *chan, unsigned int cmd, unsigned long data)
{ //{{{
struct wctdm_stats stats;
struct wctdm_regs regs;
@@ -1008,7 +1004,7 @@
int x;
switch (cmd) {
- case ZT_ONHOOKTRANSFER:
+ case DAHDI_ONHOOKTRANSFER:
if (wc->porttype[port] != VT_PORT_PROSLIC)
return -EINVAL;
if (get_user(x, (int *)data))
@@ -1029,7 +1025,7 @@
return -EIO;
}
break;
- case ZT_SETPOLARITY:
+ case DAHDI_SETPOLARITY:
if (get_user(x, (int *)data))
return -EFAULT;
if (wc->porttype[port] != VT_PORT_PROSLIC)
@@ -1144,7 +1140,7 @@
return 0;
} //}}}
-static int openpci_open(struct zt_chan *chan)
+static int openpci_open(struct dahdi_chan *chan)
{
struct openpci *wc = chan->pvt;
if( ! wc->porttype[chan->chanpos-1] )
@@ -1152,7 +1148,7 @@
//XXX This is WRONG and can prang in a race. We must pass THIS_MODULE
// as the owner of the span that holds the pointer to this function,
- // then bump the refcount in the zaptel code _BEFORE_ the potentially
+ // then bump the refcount in the dahdi code _BEFORE_ the potentially
// fatal call to an invalid pointer is made.
//if( wc->dead ) return -ENODEV;
//wc->usecount++;
@@ -1161,14 +1157,14 @@
return 0;
}
-static int openpci_watchdog(struct zt_span *span, int event)
+static int openpci_watchdog(struct dahdi_span *span, int event)
{
info("TDM: Restarting DMA");
restart_dma(span->pvt);
return 0;
}
-static int openpci_close(struct zt_chan *chan)
+static int openpci_close(struct dahdi_chan *chan)
{
struct openpci *wc = chan->pvt;
int port = chan->chanpos - 1;
@@ -1176,7 +1172,7 @@
//XXX wc->usecount--;
//XXX This is WRONG and can prang in a race. We must pass THIS_MODULE
// as the owner of the span that holds the pointer to this function,
- // then bump the refcount in the zaptel code _BEFORE_ the potentially
+ // then bump the refcount in the dahdi code _BEFORE_ the potentially
// fatal call to an invalid pointer is made.
module_put(THIS_MODULE);
if (wc->porttype[port] == VT_PORT_PROSLIC) {
@@ -1191,7 +1187,7 @@
return 0;
}
-static int openpci_hooksig(struct zt_chan *chan, zt_txsig_t txsig)
+static int openpci_hooksig(struct dahdi_chan *chan, dahdi_txsig_t txsig)
{ //{{{
struct openpci *wc = chan->pvt;
int port = chan->chanpos - 1;
@@ -1208,8 +1204,8 @@
switch(wc->porttype[port]) {
case VT_PORT_VDAA:
switch(txsig) {
- case ZT_TXSIG_START:
- case ZT_TXSIG_OFFHOOK:
+ case DAHDI_TXSIG_START:
+ case DAHDI_TXSIG_OFFHOOK:
if( write_reg_fxo(wc, port, 5, 0x9)
&& write_reg_fxo(wc, port, 0x20, 0x0) )
wc->mod[port].fxo.offhook = 1;
@@ -1217,7 +1213,7 @@
cardcrit(wc->boardnum, "Failed set fxo off-hook");
break;
- case ZT_TXSIG_ONHOOK:
+ case DAHDI_TXSIG_ONHOOK:
if( write_reg_fxo(wc, port, 5, 0x8)
&& write_reg_fxo(wc, port, 0x20, 0x3) )
wc->mod[port].fxo.offhook = 0;
@@ -1235,22 +1231,22 @@
case VT_PORT_PROSLIC:
new_hk_state = wc->mod[port].fxs.lasttxhook;
switch(txsig) {
- case ZT_TXSIG_ONHOOK:
+ case DAHDI_TXSIG_ONHOOK:
switch(chan->sig) {
- case ZT_SIG_EM:
- case ZT_SIG_FXOKS:
- case ZT_SIG_FXOLS:
+ case DAHDI_SIG_EM:
+ case DAHDI_SIG_FXOKS:
+ case DAHDI_SIG_FXOLS:
new_hk_state = wc->mod[port].fxs.idletxhookstate;
break;
- case ZT_SIG_FXOGS:
+ case DAHDI_SIG_FXOGS:
new_hk_state = 3;
break;
}
break;
- case ZT_TXSIG_OFFHOOK:
+ case DAHDI_TXSIG_OFFHOOK:
switch(chan->sig) {
- case ZT_SIG_EM:
+ case DAHDI_SIG_EM:
new_hk_state = 5;
break;
default:
@@ -1259,11 +1255,11 @@
}
break;
- case ZT_TXSIG_START:
+ case DAHDI_TXSIG_START:
new_hk_state = 4;
break;
- case ZT_TXSIG_KEWL:
+ case DAHDI_TXSIG_KEWL:
new_hk_state = 0;
break;
@@ -1303,27 +1299,29 @@
sprintf(wc->span.name, "WCTDM/%d", wc->boardnum);
sprintf(wc->span.desc, "%s Board %d", wc->variety, wc->boardnum + 1);
for (x = 0; x < MAX_PORTS; x++) {
- sprintf(wc->chans[x].name, "WCTDM/%d/%d", wc->boardnum, x);
- wc->chans[x].sigcap = ZT_SIG_FXOKS | ZT_SIG_FXOLS | ZT_SIG_FXOGS
- | ZT_SIG_SF | ZT_SIG_EM | ZT_SIG_CLEAR;
- wc->chans[x].sigcap |= ZT_SIG_FXSKS | ZT_SIG_FXSLS | ZT_SIG_SF | ZT_SIG_CLEAR;
- wc->chans[x].chanpos = x+1;
- wc->chans[x].pvt = wc;
- }
- wc->span.deflaw = ZT_LAW_MULAW;
+ struct dahdi_chan *chan = &wc->_chans[x];
+ wc->chans[x] = chan;
+ sprintf(chan->name, "WCTDM/%d/%d", wc->boardnum, x);
+ chan->sigcap = DAHDI_SIG_FXOKS | DAHDI_SIG_FXOLS | DAHDI_SIG_FXOGS
+ | DAHDI_SIG_SF | DAHDI_SIG_EM | DAHDI_SIG_CLEAR;
+ chan->sigcap |= DAHDI_SIG_FXSKS | DAHDI_SIG_FXSLS | DAHDI_SIG_SF | DAHDI_SIG_CLEAR;
+ chan->chanpos = x+1;
+ chan->pvt = wc;
+ }
+ wc->span.deflaw = DAHDI_LAW_MULAW;
wc->span.chans = wc->chans;
wc->span.channels = MAX_PORTS;
wc->span.hooksig = openpci_hooksig;
wc->span.open = openpci_open;
wc->span.close = openpci_close;
- wc->span.flags = ZT_FLAG_RBS;
+ wc->span.flags = DAHDI_FLAG_RBS;
wc->span.ioctl = openpci_ioctl;
wc->span.watchdog = openpci_watchdog;
init_waitqueue_head(&wc->span.maintq);
wc->span.pvt = wc;
- if (zt_register(&wc->span, 0)) {
- cardcrit(wc->boardnum, "Unable to register span with zaptel");
+ if (dahdi_register(&wc->span, 0)) {
+ cardcrit(wc->boardnum, "Unable to register span with dahdi");
return RET_FAIL;
}
return RET_OK;
@@ -1665,8 +1663,8 @@
cardcrit(boardnum, "Couldnt get DMA memory.");
goto hell_3;
}
- wc->readchunk = wc->writechunk + ZT_MAX_CHUNKSIZE * (MAX_PORTS*2 / sizeof(int));
- wc->readdma = wc->writedma + ZT_MAX_CHUNKSIZE * (MAX_PORTS*2);
+ wc->readchunk = wc->writechunk + DAHDI_MAX_CHUNKSIZE * (MAX_PORTS*2 / sizeof(int));
+ wc->readdma = wc->writedma + DAHDI_MAX_CHUNKSIZE * (MAX_PORTS*2);
memset((void*)wc->writechunk,0,VT_PCIDMA_BLOCKSIZE);
@@ -1716,7 +1714,7 @@
cardinfo(wc->boardnum, "have %d configured ports", wc->portcount);
if( ! span_initialize(wc) ) {
- cardcrit(boardnum, "Failed to register with zaptel driver");
+ cardcrit(boardnum, "Failed to register with dahdi driver");
failret = -EFAULT;
goto hell_4;
}
@@ -1724,12 +1722,12 @@
/* Finalize signalling */
for (i=0; i < MAX_PORTS; ++i) {
if (wc->porttype[i] == VT_PORT_VDAA)
- wc->chans[i].sigcap = ZT_SIG_FXSKS | ZT_SIG_FXSLS
- | ZT_SIG_CLEAR | ZT_SIG_SF;
+ wc->chans[i]->sigcap = DAHDI_SIG_FXSKS | DAHDI_SIG_FXSLS
+ | DAHDI_SIG_CLEAR | DAHDI_SIG_SF;
else if (wc->porttype[i] == VT_PORT_PROSLIC)
- wc->chans[i].sigcap = ZT_SIG_FXOKS | ZT_SIG_FXOLS
- | ZT_SIG_FXOGS | ZT_SIG_SF
- | ZT_SIG_CLEAR | ZT_SIG_EM;
+ wc->chans[i]->sigcap = DAHDI_SIG_FXOKS | DAHDI_SIG_FXOLS
+ | DAHDI_SIG_FXOGS | DAHDI_SIG_SF
+ | DAHDI_SIG_CLEAR | DAHDI_SIG_EM;
else if (wc->porttype[i])
cardcrit(wc->boardnum, "Port %d has unknown type (%d)",
i, wc->porttype[i]);
@@ -1738,7 +1736,7 @@
/* Enable bus mastering */
pci_set_master(pdev);
- if (request_irq(pdev->irq, openpci_isr, ZAP_IRQ_SHARED, NAME, wc)) {
+ if (request_irq(pdev->irq, openpci_isr, DAHDI_IRQ_SHARED, NAME, wc)) {
cardcrit(boardnum, "Cant get IRQ!");
failret = -EIO;
goto hell_5;
@@ -1752,7 +1750,7 @@
return 0;
hell_5:
- zt_unregister(&wc->span);
+ dahdi_unregister(&wc->span);
hell_4:
if (wc->writechunk){
pci_free_consistent(pdev, VT_PCIDMA_BLOCKSIZE,
@@ -1786,7 +1784,7 @@
/* Release span, possibly delayed */
//XXX if (!wc->usecount) openpci_release(wc); else wc->dead = 1;
- zt_unregister(&wc->span);
+ dahdi_unregister(&wc->span);
outb(0x00, TJ_CNTL);
pci_free_consistent(pdev, VT_PCIDMA_BLOCKSIZE, (void *)wc->writechunk, wc->writedma);
@@ -1820,7 +1818,7 @@
static int __init openpci_init(void)
{
- if( zap_pci_module(&openpci_driver) )
+ if( dahdi_pci_module(&openpci_driver) )
return -ENODEV;
info("Module loaded %s", debug ? "with debug enabled" : "");
@@ -1838,6 +1836,6 @@
MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
MODULE_AUTHOR(DRIVER_AUTHOR);
-MODULE_VERSION(ZAPTEL_VERSION);
+MODULE_VERSION(DAHDI_VERSION);
MODULE_LICENSE("GPL");
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