[SCM] WebKit Debian packaging branch, webkit-1.2, updated. upstream/1.1.90-6072-g9a69373
barraclough at apple.com
barraclough at apple.com
Wed Apr 7 23:24:52 UTC 2010
The following commit has been merged in the webkit-1.2 branch:
commit c4a3fa8c0dbb2f76abfcfa88a0cc9d784dcb6ac7
Author: barraclough at apple.com <barraclough at apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Date: Fri Nov 6 09:35:03 2009 +0000
Tidy up the shift methods on the macro-assembler interface.
Patch by Gavin Barraclough <barraclough at apple.com> on 2009-11-06
Reviewed by Oliver Hunt.
Currently behaviour of shifts of a magnitude > 0x1f is undefined.
Instead defined that all shifts are masked to this range. This makes a lot of
practical sense, both since having undefined behaviour is not particularly
desirable, and because this behaviour is commonly required (particularly since
it is required bt ECMA-262 for shifts).
Update the ARM assemblers to provide this behaviour. Remove (now) redundant
masks from JITArithmetic, and remove rshiftPtr (this was used in case that
could be rewritten in a simpler form using rshift32, only optimized JSVALUE32
on x86-64, which uses JSVALUE64!)
* assembler/MacroAssembler.h:
* assembler/MacroAssemblerARM.h:
(JSC::MacroAssemblerARM::lshift32):
(JSC::MacroAssemblerARM::rshift32):
* assembler/MacroAssemblerARMv7.h:
(JSC::MacroAssemblerARMv7::lshift32):
(JSC::MacroAssemblerARMv7::rshift32):
* assembler/MacroAssemblerX86_64.h:
* jit/JITArithmetic.cpp:
(JSC::JIT::emit_op_lshift):
(JSC::JIT::emit_op_rshift):
git-svn-id: http://svn.webkit.org/repository/webkit/trunk@50595 268f45cc-cd09-0410-ab3c-d52691b4dbfc
diff --git a/JavaScriptCore/ChangeLog b/JavaScriptCore/ChangeLog
index 60c4973..70898f3 100644
--- a/JavaScriptCore/ChangeLog
+++ b/JavaScriptCore/ChangeLog
@@ -1,3 +1,32 @@
+2009-11-06 Gavin Barraclough <barraclough at apple.com>
+
+ Reviewed by Oliver Hunt.
+
+ Tidy up the shift methods on the macro-assembler interface.
+
+ Currently behaviour of shifts of a magnitude > 0x1f is undefined.
+ Instead defined that all shifts are masked to this range. This makes a lot of
+ practical sense, both since having undefined behaviour is not particularly
+ desirable, and because this behaviour is commonly required (particularly since
+ it is required bt ECMA-262 for shifts).
+
+ Update the ARM assemblers to provide this behaviour. Remove (now) redundant
+ masks from JITArithmetic, and remove rshiftPtr (this was used in case that
+ could be rewritten in a simpler form using rshift32, only optimized JSVALUE32
+ on x86-64, which uses JSVALUE64!)
+
+ * assembler/MacroAssembler.h:
+ * assembler/MacroAssemblerARM.h:
+ (JSC::MacroAssemblerARM::lshift32):
+ (JSC::MacroAssemblerARM::rshift32):
+ * assembler/MacroAssemblerARMv7.h:
+ (JSC::MacroAssemblerARMv7::lshift32):
+ (JSC::MacroAssemblerARMv7::rshift32):
+ * assembler/MacroAssemblerX86_64.h:
+ * jit/JITArithmetic.cpp:
+ (JSC::JIT::emit_op_lshift):
+ (JSC::JIT::emit_op_rshift):
+
2009-11-05 Gavin Barraclough <barraclough at apple.com>
Rubber Stamped by Oliver Hunt.
diff --git a/JavaScriptCore/assembler/MacroAssembler.h b/JavaScriptCore/assembler/MacroAssembler.h
index 2743ab4..858707d 100644
--- a/JavaScriptCore/assembler/MacroAssembler.h
+++ b/JavaScriptCore/assembler/MacroAssembler.h
@@ -179,16 +179,6 @@ public:
or32(imm, dest);
}
- void rshiftPtr(RegisterID shift_amount, RegisterID dest)
- {
- rshift32(shift_amount, dest);
- }
-
- void rshiftPtr(Imm32 imm, RegisterID dest)
- {
- rshift32(imm, dest);
- }
-
void subPtr(RegisterID src, RegisterID dest)
{
sub32(src, dest);
diff --git a/JavaScriptCore/assembler/MacroAssemblerARM.h b/JavaScriptCore/assembler/MacroAssemblerARM.h
index 6d309aa..4d13b0f 100644
--- a/JavaScriptCore/assembler/MacroAssemblerARM.h
+++ b/JavaScriptCore/assembler/MacroAssemblerARM.h
@@ -118,14 +118,18 @@ public:
m_assembler.ands_r(dest, dest, w);
}
- void lshift32(Imm32 imm, RegisterID dest)
+ void lshift32(RegisterID shift_amount, RegisterID dest)
{
- m_assembler.movs_r(dest, m_assembler.lsl(dest, imm.m_value & 0x1f));
+ ARMWord w = m_assembler.getImm(0x1f, ARMRegisters::S0, true);
+ ASSERT(!(w & ARMAssembler::OP2_INV_IMM));
+ m_assembler.ands_r(ARMRegisters::S0, shift_amount, w);
+
+ m_assembler.movs_r(dest, m_assembler.lsl_r(dest, ARMRegisters::S0));
}
- void lshift32(RegisterID shift_amount, RegisterID dest)
+ void lshift32(Imm32 imm, RegisterID dest)
{
- m_assembler.movs_r(dest, m_assembler.lsl_r(dest, shift_amount));
+ m_assembler.movs_r(dest, m_assembler.lsl(dest, imm.m_value & 0x1f));
}
void mul32(RegisterID src, RegisterID dest)
@@ -160,7 +164,11 @@ public:
void rshift32(RegisterID shift_amount, RegisterID dest)
{
- m_assembler.movs_r(dest, m_assembler.asr_r(dest, shift_amount));
+ ARMWord w = m_assembler.getImm(0x1f, ARMRegisters::S0, true);
+ ASSERT(!(w & ARMAssembler::OP2_INV_IMM));
+ m_assembler.ands_r(ARMRegisters::S0, shift_amount, w);
+
+ m_assembler.movs_r(dest, m_assembler.asr_r(dest, ARMRegisters::S0));
}
void rshift32(Imm32 imm, RegisterID dest)
diff --git a/JavaScriptCore/assembler/MacroAssemblerARMv7.h b/JavaScriptCore/assembler/MacroAssemblerARMv7.h
index ab117d4..532a9cf 100644
--- a/JavaScriptCore/assembler/MacroAssemblerARMv7.h
+++ b/JavaScriptCore/assembler/MacroAssemblerARMv7.h
@@ -197,14 +197,19 @@ public:
}
}
- void lshift32(Imm32 imm, RegisterID dest)
+ void lshift32(RegisterID shift_amount, RegisterID dest)
{
- m_assembler.lsl(dest, dest, imm.m_value);
+ // Clamp the shift to the range 0..31
+ ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
+ ASSERT(armImm.isValid());
+ m_assembler.ARM_and(dataTempRegister, shift_amount, armImm);
+
+ m_assembler.lsl(dest, dest, dataTempRegister);
}
- void lshift32(RegisterID shift_amount, RegisterID dest)
+ void lshift32(Imm32 imm, RegisterID dest)
{
- m_assembler.lsl(dest, dest, shift_amount);
+ m_assembler.lsl(dest, dest, imm.m_value & 0x1f);
}
void mul32(RegisterID src, RegisterID dest)
@@ -241,12 +246,17 @@ public:
void rshift32(RegisterID shift_amount, RegisterID dest)
{
- m_assembler.asr(dest, dest, shift_amount);
+ // Clamp the shift to the range 0..31
+ ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
+ ASSERT(armImm.isValid());
+ m_assembler.ARM_and(dataTempRegister, shift_amount, armImm);
+
+ m_assembler.asr(dest, dest, dataTempRegister);
}
void rshift32(Imm32 imm, RegisterID dest)
{
- m_assembler.asr(dest, dest, imm.m_value);
+ m_assembler.asr(dest, dest, imm.m_value & 0x1f);
}
void sub32(RegisterID src, RegisterID dest)
diff --git a/JavaScriptCore/assembler/MacroAssemblerX86Common.h b/JavaScriptCore/assembler/MacroAssemblerX86Common.h
index c415f24..96d21f1 100644
--- a/JavaScriptCore/assembler/MacroAssemblerX86Common.h
+++ b/JavaScriptCore/assembler/MacroAssemblerX86Common.h
@@ -558,7 +558,8 @@ public:
void swap(RegisterID reg1, RegisterID reg2)
{
- m_assembler.xchgq_rr(reg1, reg2);
+ if (reg1 != reg2)
+ m_assembler.xchgq_rr(reg1, reg2);
}
void signExtend32ToPtr(RegisterID src, RegisterID dest)
diff --git a/JavaScriptCore/assembler/MacroAssemblerX86_64.h b/JavaScriptCore/assembler/MacroAssemblerX86_64.h
index 0f95fe6..7828cf5 100644
--- a/JavaScriptCore/assembler/MacroAssemblerX86_64.h
+++ b/JavaScriptCore/assembler/MacroAssemblerX86_64.h
@@ -192,33 +192,6 @@ public:
m_assembler.orq_ir(imm.m_value, dest);
}
- void rshiftPtr(RegisterID shift_amount, RegisterID dest)
- {
- // On x86 we can only shift by ecx; if asked to shift by another register we'll
- // need rejig the shift amount into ecx first, and restore the registers afterwards.
- if (shift_amount != X86Registers::ecx) {
- swap(shift_amount, X86Registers::ecx);
-
- // E.g. transform "shll %eax, %eax" -> "xchgl %eax, %ecx; shll %ecx, %ecx; xchgl %eax, %ecx"
- if (dest == shift_amount)
- m_assembler.sarq_CLr(X86Registers::ecx);
- // E.g. transform "shll %eax, %ecx" -> "xchgl %eax, %ecx; shll %ecx, %eax; xchgl %eax, %ecx"
- else if (dest == X86Registers::ecx)
- m_assembler.sarq_CLr(shift_amount);
- // E.g. transform "shll %eax, %ebx" -> "xchgl %eax, %ecx; shll %ecx, %ebx; xchgl %eax, %ecx"
- else
- m_assembler.sarq_CLr(dest);
-
- swap(shift_amount, X86Registers::ecx);
- } else
- m_assembler.sarq_CLr(dest);
- }
-
- void rshiftPtr(Imm32 imm, RegisterID dest)
- {
- m_assembler.sarq_i8r(imm.m_value, dest);
- }
-
void subPtr(RegisterID src, RegisterID dest)
{
m_assembler.subq_rr(src, dest);
diff --git a/JavaScriptCore/jit/JITArithmetic.cpp b/JavaScriptCore/jit/JITArithmetic.cpp
index e6df334..4e4e4bb 100644
--- a/JavaScriptCore/jit/JITArithmetic.cpp
+++ b/JavaScriptCore/jit/JITArithmetic.cpp
@@ -1143,13 +1143,8 @@ void JIT::emit_op_lshift(Instruction* currentInstruction)
emitJumpSlowCaseIfNotImmediateInteger(regT2);
emitFastArithImmToInt(regT0);
emitFastArithImmToInt(regT2);
-#if !PLATFORM(X86)
- // Mask with 0x1f as per ecma-262 11.7.2 step 7.
- // On 32-bit x86 this is not necessary, since the shift anount is implicitly masked in the instruction.
- and32(Imm32(0x1f), regT2);
-#endif
lshift32(regT2, regT0);
-#if !USE(JSVALUE64)
+#if USE(JSVALUE32)
addSlowCase(branchAdd32(Overflow, regT0, regT0));
signExtend32ToPtr(regT0, regT0);
#endif
@@ -1225,15 +1220,9 @@ void JIT::emit_op_rshift(Instruction* currentInstruction)
emitJumpSlowCaseIfNotImmediateInteger(regT2);
}
emitFastArithImmToInt(regT2);
-#if !PLATFORM(X86)
- // Mask with 0x1f as per ecma-262 11.7.2 step 7.
- // On 32-bit x86 this is not necessary, since the shift anount is implicitly masked in the instruction.
- and32(Imm32(0x1f), regT2);
-#endif
-#if USE(JSVALUE64)
rshift32(regT2, regT0);
-#else
- rshiftPtr(regT2, regT0);
+#if USE(JSVALUE32)
+ signExtend32ToPtr(regT0, regT0);
#endif
}
#if USE(JSVALUE64)
--
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