[SCM] WebKit Debian packaging branch, debian/experimental, updated. upstream/1.3.3-10851-g50815da
barraclough at apple.com
barraclough at apple.com
Wed Dec 22 17:59:33 UTC 2010
The following commit has been merged in the debian/experimental branch:
commit b79c1c007f9609006dd4fab0a054c68fde8764aa
Author: barraclough at apple.com <barraclough at apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Date: Sat Dec 4 02:46:49 2010 +0000
Bug 50509 - set* methods on MacroAssembler are awfully named.
Rubber stamped by Oliver Hunt.
Methods set32 and setTest32 compare 32-bit operands, and set a 32-bit results based on the comparison.
set8 compares 32-bit operands, and sets an 8-bit result based on the comparison.
setTest8 compares 8-bit operands, and sets a 32-bit result based on the comparison.
Rename to clarify.
set32 -> set32Compare32
setTest32 -> set32Test32
set8 -> set8Compare32
setTest8 -> set32Test8
* assembler/MacroAssembler.h:
(JSC::MacroAssembler::setPtr):
* assembler/MacroAssemblerARM.h:
(JSC::MacroAssemblerARM::set32Compare32):
(JSC::MacroAssemblerARM::set8Compare32):
(JSC::MacroAssemblerARM::set32Test32):
(JSC::MacroAssemblerARM::set32Test8):
* assembler/MacroAssemblerARMv7.h:
(JSC::MacroAssemblerARMv7::set32Compare32):
(JSC::MacroAssemblerARMv7::set8Compare32):
(JSC::MacroAssemblerARMv7::set32Test32):
(JSC::MacroAssemblerARMv7::set32Test8):
* assembler/MacroAssemblerMIPS.h:
(JSC::MacroAssemblerMIPS::set8Compare32):
(JSC::MacroAssemblerMIPS::set32Compare32):
(JSC::MacroAssemblerMIPS::set32Test8):
(JSC::MacroAssemblerMIPS::set32Test32):
* assembler/MacroAssemblerX86Common.h:
(JSC::MacroAssemblerX86Common::set8Compare32):
(JSC::MacroAssemblerX86Common::set32Compare32):
(JSC::MacroAssemblerX86Common::set32Test8):
(JSC::MacroAssemblerX86Common::set32Test32):
* jit/JITOpcodes.cpp:
(JSC::JIT::emit_op_eq):
(JSC::JIT::emit_op_neq):
(JSC::JIT::compileOpStrictEq):
(JSC::JIT::emit_op_eq_null):
(JSC::JIT::emit_op_neq_null):
* jit/JITOpcodes32_64.cpp:
(JSC::JIT::emit_op_eq):
(JSC::JIT::emit_op_neq):
(JSC::JIT::compileOpStrictEq):
(JSC::JIT::emit_op_eq_null):
(JSC::JIT::emit_op_neq_null):
git-svn-id: http://svn.webkit.org/repository/webkit/trunk@73323 268f45cc-cd09-0410-ab3c-d52691b4dbfc
diff --git a/JavaScriptCore/ChangeLog b/JavaScriptCore/ChangeLog
index e314643..ee2aa99 100644
--- a/JavaScriptCore/ChangeLog
+++ b/JavaScriptCore/ChangeLog
@@ -1,3 +1,55 @@
+2010-12-03 Gavin Barraclough <barraclough at apple.com>
+
+ Rubber stamped by Oliver Hunt.
+
+ Bug 50509 - set* methods on MacroAssembler are awfully named.
+
+ Methods set32 and setTest32 compare 32-bit operands, and set a 32-bit results based on the comparison.
+ set8 compares 32-bit operands, and sets an 8-bit result based on the comparison.
+ setTest8 compares 8-bit operands, and sets a 32-bit result based on the comparison.
+
+ Rename to clarify.
+
+ set32 -> set32Compare32
+ setTest32 -> set32Test32
+ set8 -> set8Compare32
+ setTest8 -> set32Test8
+
+ * assembler/MacroAssembler.h:
+ (JSC::MacroAssembler::setPtr):
+ * assembler/MacroAssemblerARM.h:
+ (JSC::MacroAssemblerARM::set32Compare32):
+ (JSC::MacroAssemblerARM::set8Compare32):
+ (JSC::MacroAssemblerARM::set32Test32):
+ (JSC::MacroAssemblerARM::set32Test8):
+ * assembler/MacroAssemblerARMv7.h:
+ (JSC::MacroAssemblerARMv7::set32Compare32):
+ (JSC::MacroAssemblerARMv7::set8Compare32):
+ (JSC::MacroAssemblerARMv7::set32Test32):
+ (JSC::MacroAssemblerARMv7::set32Test8):
+ * assembler/MacroAssemblerMIPS.h:
+ (JSC::MacroAssemblerMIPS::set8Compare32):
+ (JSC::MacroAssemblerMIPS::set32Compare32):
+ (JSC::MacroAssemblerMIPS::set32Test8):
+ (JSC::MacroAssemblerMIPS::set32Test32):
+ * assembler/MacroAssemblerX86Common.h:
+ (JSC::MacroAssemblerX86Common::set8Compare32):
+ (JSC::MacroAssemblerX86Common::set32Compare32):
+ (JSC::MacroAssemblerX86Common::set32Test8):
+ (JSC::MacroAssemblerX86Common::set32Test32):
+ * jit/JITOpcodes.cpp:
+ (JSC::JIT::emit_op_eq):
+ (JSC::JIT::emit_op_neq):
+ (JSC::JIT::compileOpStrictEq):
+ (JSC::JIT::emit_op_eq_null):
+ (JSC::JIT::emit_op_neq_null):
+ * jit/JITOpcodes32_64.cpp:
+ (JSC::JIT::emit_op_eq):
+ (JSC::JIT::emit_op_neq):
+ (JSC::JIT::compileOpStrictEq):
+ (JSC::JIT::emit_op_eq_null):
+ (JSC::JIT::emit_op_neq_null):
+
2010-12-03 Oliver Hunt <oliver at apple.com>
Reviewed by Geoff Garen.
diff --git a/JavaScriptCore/assembler/MacroAssembler.h b/JavaScriptCore/assembler/MacroAssembler.h
index ce1be78..fa165de 100644
--- a/JavaScriptCore/assembler/MacroAssembler.h
+++ b/JavaScriptCore/assembler/MacroAssembler.h
@@ -232,7 +232,7 @@ public:
void setPtr(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
- set32(cond, left, right, dest);
+ set32Compare32(cond, left, right, dest);
}
void storePtr(RegisterID src, ImplicitAddress address)
diff --git a/JavaScriptCore/assembler/MacroAssemblerARM.h b/JavaScriptCore/assembler/MacroAssemblerARM.h
index c51686a..73390f8 100644
--- a/JavaScriptCore/assembler/MacroAssemblerARM.h
+++ b/JavaScriptCore/assembler/MacroAssemblerARM.h
@@ -628,40 +628,40 @@ public:
m_assembler.bx(linkRegister);
}
- void set32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.cmp_r(left, right);
m_assembler.mov_r(dest, ARMAssembler::getOp2(0));
m_assembler.mov_r(dest, ARMAssembler::getOp2(1), ARMCondition(cond));
}
- void set32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
+ void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
m_assembler.cmp_r(left, m_assembler.getImm(right.m_value, ARMRegisters::S0));
m_assembler.mov_r(dest, ARMAssembler::getOp2(0));
m_assembler.mov_r(dest, ARMAssembler::getOp2(1), ARMCondition(cond));
}
- void set8(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
{
// ARM doesn't have byte registers
- set32(cond, left, right, dest);
+ set32Compare32(cond, left, right, dest);
}
- void set8(Condition cond, Address left, RegisterID right, RegisterID dest)
+ void set8Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
{
// ARM doesn't have byte registers
load32(left, ARMRegisters::S1);
- set32(cond, ARMRegisters::S1, right, dest);
+ set32Compare32(cond, ARMRegisters::S1, right, dest);
}
- void set8(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
+ void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
// ARM doesn't have byte registers
- set32(cond, left, right, dest);
+ set32Compare32(cond, left, right, dest);
}
- void setTest32(Condition cond, Address address, Imm32 mask, RegisterID dest)
+ void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest)
{
load32(address, ARMRegisters::S1);
if (mask.m_value == -1)
@@ -672,10 +672,10 @@ public:
m_assembler.mov_r(dest, ARMAssembler::getOp2(1), ARMCondition(cond));
}
- void setTest8(Condition cond, Address address, Imm32 mask, RegisterID dest)
+ void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest)
{
// ARM doesn't have byte registers
- setTest32(cond, address, mask, dest);
+ set32Test32(cond, address, mask, dest);
}
void add32(Imm32 imm, RegisterID src, RegisterID dest)
diff --git a/JavaScriptCore/assembler/MacroAssemblerARMv7.h b/JavaScriptCore/assembler/MacroAssemblerARMv7.h
index d5b4ce7..5980de0 100644
--- a/JavaScriptCore/assembler/MacroAssemblerARMv7.h
+++ b/JavaScriptCore/assembler/MacroAssemblerARMv7.h
@@ -1127,7 +1127,7 @@ public:
m_assembler.bx(linkRegister, ARMv7Assembler::JumpFixed);
}
- void set32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.cmp(left, right);
m_assembler.it(armV7Condition(cond), false);
@@ -1135,13 +1135,13 @@ public:
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
- void set32(Condition cond, Address left, RegisterID right, RegisterID dest)
+ void set32Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
{
load32(left, dataTempRegister);
- set32(cond, dataTempRegister, right, dest);
+ set32Compare32(cond, dataTempRegister, right, dest);
}
- void set32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
+ void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
compare32(left, right);
m_assembler.it(armV7Condition(cond), false);
@@ -1149,26 +1149,26 @@ public:
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
- void set8(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
{
- set32(cond, left, right, dest);
+ set32Compare32(cond, left, right, dest);
}
- void set8(Condition cond, Address left, RegisterID right, RegisterID dest)
+ void set8Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
{
- set32(cond, left, right, dest);
+ set32Compare32(cond, left, right, dest);
}
- void set8(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
+ void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
- set32(cond, left, right, dest);
+ set32Compare32(cond, left, right, dest);
}
// FIXME:
// The mask should be optional... paerhaps the argument order should be
// dest-src, operations always have a dest? ... possibly not true, considering
// asm ops like test, or pseudo ops like pop().
- void setTest32(Condition cond, Address address, Imm32 mask, RegisterID dest)
+ void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest)
{
load32(address, dataTempRegister);
test32(dataTempRegister, mask);
@@ -1177,7 +1177,7 @@ public:
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
- void setTest8(Condition cond, Address address, Imm32 mask, RegisterID dest)
+ void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest)
{
load8(address, dataTempRegister);
test32(dataTempRegister, mask);
diff --git a/JavaScriptCore/assembler/MacroAssemblerMIPS.h b/JavaScriptCore/assembler/MacroAssemblerMIPS.h
index 3fb2549..41f0152 100644
--- a/JavaScriptCore/assembler/MacroAssemblerMIPS.h
+++ b/JavaScriptCore/assembler/MacroAssemblerMIPS.h
@@ -1372,18 +1372,18 @@ public:
m_assembler.nop();
}
- void set8(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
{
- set32(cond, left, right, dest);
+ set32Compare32(cond, left, right, dest);
}
- void set8(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
+ void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
move(right, immTempRegister);
- set32(cond, left, immTempRegister, dest);
+ set32Compare32(cond, left, immTempRegister, dest);
}
- void set32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
{
if (cond == Equal || cond == Zero) {
m_assembler.xorInsn(dest, left, right);
@@ -1434,13 +1434,13 @@ public:
}
}
- void set32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
+ void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
move(right, immTempRegister);
- set32(cond, left, immTempRegister, dest);
+ set32Compare32(cond, left, immTempRegister, dest);
}
- void setTest8(Condition cond, Address address, Imm32 mask, RegisterID dest)
+ void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest)
{
ASSERT((cond == Zero) || (cond == NonZero));
load8(address, dataTempRegister);
@@ -1460,7 +1460,7 @@ public:
}
}
- void setTest32(Condition cond, Address address, Imm32 mask, RegisterID dest)
+ void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest)
{
ASSERT((cond == Zero) || (cond == NonZero));
load32(address, dataTempRegister);
diff --git a/JavaScriptCore/assembler/MacroAssemblerX86Common.h b/JavaScriptCore/assembler/MacroAssemblerX86Common.h
index cb86da7..b6f0b0c 100644
--- a/JavaScriptCore/assembler/MacroAssemblerX86Common.h
+++ b/JavaScriptCore/assembler/MacroAssemblerX86Common.h
@@ -939,19 +939,19 @@ public:
m_assembler.ret();
}
- void set8(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.cmpl_rr(right, left);
m_assembler.setCC_r(x86Condition(cond), dest);
}
- void set8(Condition cond, Address left, RegisterID right, RegisterID dest)
+ void set8Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
{
m_assembler.cmpl_mr(left.offset, left.base, right);
m_assembler.setCC_r(x86Condition(cond), dest);
}
- void set8(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
+ void set8Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
m_assembler.testl_rr(left, left);
@@ -960,14 +960,14 @@ public:
m_assembler.setCC_r(x86Condition(cond), dest);
}
- void set32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.cmpl_rr(right, left);
m_assembler.setCC_r(x86Condition(cond), dest);
m_assembler.movzbl_rr(dest, dest);
}
- void set32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
+ void set32Compare32(Condition cond, RegisterID left, Imm32 right, RegisterID dest)
{
if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
m_assembler.testl_rr(left, left);
@@ -982,7 +982,7 @@ public:
// dest-src, operations always have a dest? ... possibly not true, considering
// asm ops like test, or pseudo ops like pop().
- void setTest8(Condition cond, Address address, Imm32 mask, RegisterID dest)
+ void set32Test8(Condition cond, Address address, Imm32 mask, RegisterID dest)
{
if (mask.m_value == -1)
m_assembler.cmpb_im(0, address.offset, address.base);
@@ -992,7 +992,7 @@ public:
m_assembler.movzbl_rr(dest, dest);
}
- void setTest32(Condition cond, Address address, Imm32 mask, RegisterID dest)
+ void set32Test32(Condition cond, Address address, Imm32 mask, RegisterID dest)
{
if (mask.m_value == -1)
m_assembler.cmpl_im(0, address.offset, address.base);
diff --git a/JavaScriptCore/jit/JITOpcodes.cpp b/JavaScriptCore/jit/JITOpcodes.cpp
index 66285ae..972b879 100644
--- a/JavaScriptCore/jit/JITOpcodes.cpp
+++ b/JavaScriptCore/jit/JITOpcodes.cpp
@@ -806,7 +806,7 @@ void JIT::emit_op_eq(Instruction* currentInstruction)
{
emitGetVirtualRegisters(currentInstruction[2].u.operand, regT0, currentInstruction[3].u.operand, regT1);
emitJumpSlowCaseIfNotImmediateIntegers(regT0, regT1, regT2);
- set32(Equal, regT1, regT0, regT0);
+ set32Compare32(Equal, regT1, regT0, regT0);
emitTagAsBoolImmediate(regT0);
emitPutVirtualRegister(currentInstruction[1].u.operand);
}
@@ -854,7 +854,7 @@ void JIT::emit_op_neq(Instruction* currentInstruction)
{
emitGetVirtualRegisters(currentInstruction[2].u.operand, regT0, currentInstruction[3].u.operand, regT1);
emitJumpSlowCaseIfNotImmediateIntegers(regT0, regT1, regT2);
- set32(NotEqual, regT1, regT0, regT0);
+ set32Compare32(NotEqual, regT1, regT0, regT0);
emitTagAsBoolImmediate(regT0);
emitPutVirtualRegister(currentInstruction[1].u.operand);
@@ -1026,9 +1026,9 @@ void JIT::compileOpStrictEq(Instruction* currentInstruction, CompileOpStrictEqTy
addSlowCase(emitJumpIfImmediateNumber(regT2));
if (type == OpStrictEq)
- set32(Equal, regT1, regT0, regT0);
+ set32Compare32(Equal, regT1, regT0, regT0);
else
- set32(NotEqual, regT1, regT0, regT0);
+ set32Compare32(NotEqual, regT1, regT0, regT0);
emitTagAsBoolImmediate(regT0);
emitPutVirtualRegister(dst);
@@ -1177,7 +1177,7 @@ void JIT::emit_op_eq_null(Instruction* currentInstruction)
Jump isImmediate = emitJumpIfNotJSCell(regT0);
loadPtr(Address(regT0, OBJECT_OFFSETOF(JSCell, m_structure)), regT2);
- setTest8(NonZero, Address(regT2, OBJECT_OFFSETOF(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined), regT0);
+ set32Test8(NonZero, Address(regT2, OBJECT_OFFSETOF(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined), regT0);
Jump wasNotImmediate = jump();
@@ -1202,7 +1202,7 @@ void JIT::emit_op_neq_null(Instruction* currentInstruction)
Jump isImmediate = emitJumpIfNotJSCell(regT0);
loadPtr(Address(regT0, OBJECT_OFFSETOF(JSCell, m_structure)), regT2);
- setTest8(Zero, Address(regT2, OBJECT_OFFSETOF(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined), regT0);
+ set32Test8(Zero, Address(regT2, OBJECT_OFFSETOF(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined), regT0);
Jump wasNotImmediate = jump();
diff --git a/JavaScriptCore/jit/JITOpcodes32_64.cpp b/JavaScriptCore/jit/JITOpcodes32_64.cpp
index a2bb159..4ad974c 100644
--- a/JavaScriptCore/jit/JITOpcodes32_64.cpp
+++ b/JavaScriptCore/jit/JITOpcodes32_64.cpp
@@ -1018,7 +1018,7 @@ void JIT::emit_op_eq(Instruction* currentInstruction)
addSlowCase(branch32(Equal, regT1, Imm32(JSValue::CellTag)));
addSlowCase(branch32(Below, regT1, Imm32(JSValue::LowestTag)));
- set8(Equal, regT0, regT2, regT0);
+ set8Compare32(Equal, regT0, regT2, regT0);
or32(Imm32(JSValue::FalseTag), regT0);
emitStoreBool(dst, regT0);
@@ -1070,7 +1070,7 @@ void JIT::emit_op_neq(Instruction* currentInstruction)
addSlowCase(branch32(Equal, regT1, Imm32(JSValue::CellTag)));
addSlowCase(branch32(Below, regT1, Imm32(JSValue::LowestTag)));
- set8(NotEqual, regT0, regT2, regT0);
+ set8Compare32(NotEqual, regT0, regT2, regT0);
or32(Imm32(JSValue::FalseTag), regT0);
emitStoreBool(dst, regT0);
@@ -1127,9 +1127,9 @@ void JIT::compileOpStrictEq(Instruction* currentInstruction, CompileOpStrictEqTy
addSlowCase(branch32(AboveOrEqual, regT2, Imm32(JSValue::CellTag)));
if (type == OpStrictEq)
- set8(Equal, regT0, regT1, regT0);
+ set8Compare32(Equal, regT0, regT1, regT0);
else
- set8(NotEqual, regT0, regT1, regT0);
+ set8Compare32(NotEqual, regT0, regT1, regT0);
or32(Imm32(JSValue::FalseTag), regT0);
@@ -1185,14 +1185,14 @@ void JIT::emit_op_eq_null(Instruction* currentInstruction)
Jump isImmediate = branch32(NotEqual, regT1, Imm32(JSValue::CellTag));
loadPtr(Address(regT0, OBJECT_OFFSETOF(JSCell, m_structure)), regT1);
- setTest8(NonZero, Address(regT1, OBJECT_OFFSETOF(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined), regT1);
+ set32Test8(NonZero, Address(regT1, OBJECT_OFFSETOF(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined), regT1);
Jump wasNotImmediate = jump();
isImmediate.link(this);
- set8(Equal, regT1, Imm32(JSValue::NullTag), regT2);
- set8(Equal, regT1, Imm32(JSValue::UndefinedTag), regT1);
+ set8Compare32(Equal, regT1, Imm32(JSValue::NullTag), regT2);
+ set8Compare32(Equal, regT1, Imm32(JSValue::UndefinedTag), regT1);
or32(regT2, regT1);
wasNotImmediate.link(this);
@@ -1211,14 +1211,14 @@ void JIT::emit_op_neq_null(Instruction* currentInstruction)
Jump isImmediate = branch32(NotEqual, regT1, Imm32(JSValue::CellTag));
loadPtr(Address(regT0, OBJECT_OFFSETOF(JSCell, m_structure)), regT1);
- setTest8(Zero, Address(regT1, OBJECT_OFFSETOF(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined), regT1);
+ set32Test8(Zero, Address(regT1, OBJECT_OFFSETOF(Structure, m_typeInfo.m_flags)), Imm32(MasqueradesAsUndefined), regT1);
Jump wasNotImmediate = jump();
isImmediate.link(this);
- set8(NotEqual, regT1, Imm32(JSValue::NullTag), regT2);
- set8(NotEqual, regT1, Imm32(JSValue::UndefinedTag), regT1);
+ set8Compare32(NotEqual, regT1, Imm32(JSValue::NullTag), regT2);
+ set8Compare32(NotEqual, regT1, Imm32(JSValue::UndefinedTag), regT1);
and32(regT2, regT1);
wasNotImmediate.link(this);
--
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