[SCM] WebKit Debian packaging branch, debian/experimental, updated. debian/1.3.8-1-1049-g2e11a8e
barraclough at apple.com
barraclough at apple.com
Fri Jan 21 15:05:31 UTC 2011
The following commit has been merged in the debian/experimental branch:
commit 07d783c772585e0f4b4c9cd518c2c7d73c7b2e36
Author: barraclough at apple.com <barraclough at apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Date: Fri Jan 7 00:38:37 2011 +0000
Bug 52021 - zeroDouble broken on ARMv7
Reviewed by Darin Adler.
The bug here is that zeroDouble was working incorrectly,
leading to op_loop_if_true failing - specifically in the
case where the value being checked is 0.0 encoded as a
double (rather than an integer immediate).
Additionally this patch removes a redundant duplicate compare
in some (many) case.
* assembler/ARMv7Assembler.h:
(JSC::ARMv7Assembler::vcmp_F64):
(JSC::ARMv7Assembler::vcmpz_F64):
* assembler/MacroAssemblerARM.h:
(JSC::MacroAssemblerARM::branchDoubleNonZero):
(JSC::MacroAssemblerARM::branchDoubleZeroOrNaN):
* assembler/MacroAssemblerARMv7.h:
(JSC::MacroAssemblerARMv7::branchDouble):
(JSC::MacroAssemblerARMv7::branchDoubleNonZero):
(JSC::MacroAssemblerARMv7::branchDoubleZeroOrNaN):
(JSC::MacroAssemblerARMv7::compare32):
* assembler/MacroAssemblerMIPS.h:
(JSC::MacroAssemblerMIPS::branchDoubleNonZero):
(JSC::MacroAssemblerMIPS::branchDoubleZeroOrNaN):
* assembler/MacroAssemblerX86Common.h:
(JSC::MacroAssemblerX86Common::branchDoubleNonZero):
(JSC::MacroAssemblerX86Common::branchDoubleZeroOrNaN):
* jit/JITOpcodes32_64.cpp:
(JSC::JIT::emit_op_jfalse):
(JSC::JIT::emit_op_jtrue):
git-svn-id: http://svn.webkit.org/repository/webkit/trunk@75210 268f45cc-cd09-0410-ab3c-d52691b4dbfc
diff --git a/Source/JavaScriptCore/ChangeLog b/Source/JavaScriptCore/ChangeLog
index bc0f35e..a5145e5 100644
--- a/Source/JavaScriptCore/ChangeLog
+++ b/Source/JavaScriptCore/ChangeLog
@@ -1,3 +1,38 @@
+2011-01-06 Gavin Barraclough <barraclough at apple.com>
+
+ Reviewed by Darin Adler.
+
+ Bug 52021 - zeroDouble broken on ARMv7
+
+ The bug here is that zeroDouble was working incorrectly,
+ leading to op_loop_if_true failing - specifically in the
+ case where the value being checked is 0.0 encoded as a
+ double (rather than an integer immediate).
+
+ Additionally this patch removes a redundant duplicate compare
+ in some (many) case.
+
+ * assembler/ARMv7Assembler.h:
+ (JSC::ARMv7Assembler::vcmp_F64):
+ (JSC::ARMv7Assembler::vcmpz_F64):
+ * assembler/MacroAssemblerARM.h:
+ (JSC::MacroAssemblerARM::branchDoubleNonZero):
+ (JSC::MacroAssemblerARM::branchDoubleZeroOrNaN):
+ * assembler/MacroAssemblerARMv7.h:
+ (JSC::MacroAssemblerARMv7::branchDouble):
+ (JSC::MacroAssemblerARMv7::branchDoubleNonZero):
+ (JSC::MacroAssemblerARMv7::branchDoubleZeroOrNaN):
+ (JSC::MacroAssemblerARMv7::compare32):
+ * assembler/MacroAssemblerMIPS.h:
+ (JSC::MacroAssemblerMIPS::branchDoubleNonZero):
+ (JSC::MacroAssemblerMIPS::branchDoubleZeroOrNaN):
+ * assembler/MacroAssemblerX86Common.h:
+ (JSC::MacroAssemblerX86Common::branchDoubleNonZero):
+ (JSC::MacroAssemblerX86Common::branchDoubleZeroOrNaN):
+ * jit/JITOpcodes32_64.cpp:
+ (JSC::JIT::emit_op_jfalse):
+ (JSC::JIT::emit_op_jtrue):
+
2011-01-06 Michael Saboff <msaboff at apple.com>
Reviewed by Gavin Barraclough.
diff --git a/Source/JavaScriptCore/assembler/ARMv7Assembler.h b/Source/JavaScriptCore/assembler/ARMv7Assembler.h
index b0fcd06..f584883 100644
--- a/Source/JavaScriptCore/assembler/ARMv7Assembler.h
+++ b/Source/JavaScriptCore/assembler/ARMv7Assembler.h
@@ -655,7 +655,7 @@ private:
OP_VADD_T2 = 0xEE30,
OP_VSUB_T2 = 0xEE30,
OP_VDIV = 0xEE80,
- OP_VCMP_T1 = 0xEEB0,
+ OP_VCMP = 0xEEB0,
OP_VCVT_FPIVFP = 0xEEB0,
OP_VMOV_IMM_T2 = 0xEEB0,
OP_VMRS = 0xEEB0,
@@ -709,7 +709,7 @@ private:
OP_VMOV_CtoSb = 0x0A10,
OP_VMOV_StoCb = 0x0A10,
OP_VMRSb = 0x0A10,
- OP_VCMP_T1b = 0x0A40,
+ OP_VCMPb = 0x0A40,
OP_VCVT_FPIVFPb = 0x0A40,
OP_VSUB_T2b = 0x0A40,
OP_NOP_T2b = 0x8000,
@@ -1563,7 +1563,12 @@ public:
void vcmp_F64(FPDoubleRegisterID rd, FPDoubleRegisterID rm)
{
- m_formatter.vfpOp(OP_VCMP_T1, OP_VCMP_T1b, true, VFPOperand(4), rd, rm);
+ m_formatter.vfpOp(OP_VCMP, OP_VCMPb, true, VFPOperand(4), rd, rm);
+ }
+
+ void vcmpz_F64(FPDoubleRegisterID rd)
+ {
+ m_formatter.vfpOp(OP_VCMP, OP_VCMPb, true, VFPOperand(5), rd, VFPOperand(0));
}
void vcvt_F64_S32(FPDoubleRegisterID rd, FPSingleRegisterID rm)
@@ -1588,11 +1593,6 @@ public:
m_formatter.vfpMemOp(OP_VLDR, OP_VLDRb, true, rn, rd, imm);
}
- void vmov_F64_0(FPDoubleRegisterID rd)
- {
- m_formatter.vfpOp(OP_VMOV_IMM_T2, OP_VMOV_IMM_T2b, true, VFPOperand(0), rd, VFPOperand(0));
- }
-
void vmov(RegisterID rd, FPSingleRegisterID rn)
{
ASSERT(!BadReg(rd));
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARM.h b/Source/JavaScriptCore/assembler/MacroAssemblerARM.h
index 73390f8..aa85c88 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerARM.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerARM.h
@@ -931,10 +931,18 @@ public:
failureCases.append(branchTest32(Zero, dest));
}
- void zeroDouble(FPRegisterID srcDest)
+ Jump branchDoubleNonZero(FPRegisterID reg, FPRegisterID scratch)
{
m_assembler.mov_r(ARMRegisters::S0, ARMAssembler::getOp2(0));
- convertInt32ToDouble(ARMRegisters::S0, srcDest);
+ convertInt32ToDouble(ARMRegisters::S0, scratch);
+ return branchDouble(DoubleNotEqual, reg, scratch);
+ }
+
+ Jump branchDoubleZeroOrNaN(FPRegisterID reg, FPRegisterID scratch)
+ {
+ m_assembler.mov_r(ARMRegisters::S0, ARMAssembler::getOp2(0));
+ convertInt32ToDouble(ARMRegisters::S0, scratch);
+ return branchDouble(DoubleEqualOrUnordered, reg, scratch);
}
protected:
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h b/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h
index 5980de0..a3c1301 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h
@@ -676,7 +676,7 @@ public:
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
Jump notEqual = makeBranch(ARMv7Assembler::ConditionNE);
unordered.link(this);
- // We get here if either unordered, or equal.
+ // We get here if either unordered or equal.
Jump result = makeJump();
notEqual.link(this);
return result;
@@ -707,9 +707,27 @@ public:
failureCases.append(branchTest32(Zero, dest));
}
- void zeroDouble(FPRegisterID dest)
+ Jump branchDoubleNonZero(FPRegisterID reg, FPRegisterID)
{
- m_assembler.vmov_F64_0(dest);
+ m_assembler.vcmpz_F64(reg);
+ m_assembler.vmrs();
+ Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
+ Jump result = makeBranch(ARMv7Assembler::ConditionNE);
+ unordered.link(this);
+ return result;
+ }
+
+ Jump branchDoubleZeroOrNaN(FPRegisterID reg, FPRegisterID)
+ {
+ m_assembler.vcmpz_F64(reg);
+ m_assembler.vmrs();
+ Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
+ Jump notEqual = makeBranch(ARMv7Assembler::ConditionNE);
+ unordered.link(this);
+ // We get here if either unordered or equal.
+ Jump result = makeJump();
+ notEqual.link(this);
+ return result;
}
// Stack manipulation operations:
@@ -828,7 +846,7 @@ private:
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm);
if (armImm.isValid())
m_assembler.cmp(left, armImm);
- if ((armImm = ARMThumbImmediate::makeEncodedImm(-imm)).isValid())
+ else if ((armImm = ARMThumbImmediate::makeEncodedImm(-imm)).isValid())
m_assembler.cmn(left, armImm);
else {
move(Imm32(imm), dataTempRegister);
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h b/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h
index 41f0152..fcfbcda 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h
@@ -1816,17 +1816,31 @@ public:
failureCases.append(branchDouble(DoubleNotEqualOrUnordered, fpTemp, src));
}
- void zeroDouble(FPRegisterID dest)
+ Jump branchDoubleNonZero(FPRegisterID reg, FPRegisterID scratch)
{
#if WTF_MIPS_ISA_REV(2) && WTF_MIPS_FP64
- m_assembler.mtc1(MIPSRegisters::zero, dest);
- m_assembler.mthc1(MIPSRegisters::zero, dest);
+ m_assembler.mtc1(MIPSRegisters::zero, scratch);
+ m_assembler.mthc1(MIPSRegisters::zero, scratch);
#else
- m_assembler.mtc1(MIPSRegisters::zero, dest);
- m_assembler.mtc1(MIPSRegisters::zero, FPRegisterID(dest + 1));
+ m_assembler.mtc1(MIPSRegisters::zero, scratch);
+ m_assembler.mtc1(MIPSRegisters::zero, FPRegisterID(scratch + 1));
#endif
+ return branchDouble(DoubleNotEqual, reg, scratch);
}
+ Jump branchDoubleZeroOrNaN(FPRegisterID reg, FPRegisterID scratch)
+ {
+#if WTF_MIPS_ISA_REV(2) && WTF_MIPS_FP64
+ m_assembler.mtc1(MIPSRegisters::zero, scratch);
+ m_assembler.mthc1(MIPSRegisters::zero, scratch);
+#else
+ m_assembler.mtc1(MIPSRegisters::zero, scratch);
+ m_assembler.mtc1(MIPSRegisters::zero, FPRegisterID(scratch + 1));
+#endif
+ return branchDouble(DoubleEqualOrUnordered, reg, scratch);
+ }
+
+
private:
// If m_fixedWidth is true, we will generate a fixed number of instructions.
// Otherwise, we can emit any number of instructions.
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h
index b6f0b0c..a02074c 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h
@@ -527,12 +527,19 @@ public:
failureCases.append(m_assembler.jne());
}
- void zeroDouble(FPRegisterID srcDest)
+ Jump branchDoubleNonZero(FPRegisterID reg, FPRegisterID scratch)
{
ASSERT(isSSE2Present());
- m_assembler.xorpd_rr(srcDest, srcDest);
+ m_assembler.xorpd_rr(scratch, scratch);
+ return branchDouble(DoubleNotEqual, reg, scratch);
}
+ Jump branchDoubleZeroOrNaN(FPRegisterID reg, FPRegisterID scratch)
+ {
+ ASSERT(isSSE2Present());
+ m_assembler.xorpd_rr(scratch, scratch);
+ return branchDouble(DoubleEqualOrUnordered, reg, scratch);
+ }
// Stack manipulation operations:
//
diff --git a/Source/JavaScriptCore/jit/JITOpcodes32_64.cpp b/Source/JavaScriptCore/jit/JITOpcodes32_64.cpp
index 4ad974c..5a0aae5 100644
--- a/Source/JavaScriptCore/jit/JITOpcodes32_64.cpp
+++ b/Source/JavaScriptCore/jit/JITOpcodes32_64.cpp
@@ -871,9 +871,8 @@ void JIT::emit_op_jfalse(Instruction* currentInstruction)
addSlowCase(branch32(Above, regT1, Imm32(JSValue::LowestTag)));
- zeroDouble(fpRegT0);
- emitLoadDouble(cond, fpRegT1);
- addJump(branchDouble(DoubleEqualOrUnordered, fpRegT0, fpRegT1), target);
+ emitLoadDouble(cond, fpRegT0);
+ addJump(branchDoubleZeroOrNaN(fpRegT0, fpRegT1), target);
} else
addSlowCase(isNotInteger);
@@ -912,9 +911,8 @@ void JIT::emit_op_jtrue(Instruction* currentInstruction)
addSlowCase(branch32(Above, regT1, Imm32(JSValue::LowestTag)));
- zeroDouble(fpRegT0);
- emitLoadDouble(cond, fpRegT1);
- addJump(branchDouble(DoubleNotEqual, fpRegT0, fpRegT1), target);
+ emitLoadDouble(cond, fpRegT0);
+ addJump(branchDoubleNonZero(fpRegT0, fpRegT1), target);
} else
addSlowCase(isNotInteger);
--
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