[gcc-6] 160/401: * Update to SVN 20160620 (r237590, 6.1.1) from the gcc-6-branch.
Ximin Luo
infinity0 at debian.org
Wed Apr 5 15:48:48 UTC 2017
This is an automated email from the git hooks/post-receive script.
infinity0 pushed a commit to branch pu/reproducible_builds
in repository gcc-6.
commit bb5bd0f6699badb36e3cf69b68b03974b469485f
Author: doko <doko at 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca>
Date: Mon Jun 20 11:58:23 2016 +0000
* Update to SVN 20160620 (r237590, 6.1.1) from the gcc-6-branch.
git-svn-id: svn://anonscm.debian.org/gcccvs/branches/sid/gcc-6@8886 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
---
debian/changelog | 12 +
debian/patches/svn-updates.diff | 5604 ++++++++++++++++++++++++++++++++++++++-
2 files changed, 5469 insertions(+), 147 deletions(-)
diff --git a/debian/changelog b/debian/changelog
index 0d49b0a..7a05708 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,15 @@
+gcc-6 (6.1.1-7) UNRELEASED; urgency=medium
+
+ * Update to SVN 20160620 (r237590, 6.1.1) from the gcc-6-branch.
+ - Fix PR middle-end/71373, PR c/71381, PR libstdc++/71545, PR c/68657,
+ PR sanitizer/71498, PR middle-end/71529, PR target/71103 (AVR),
+ PR target/71554 (x86), PR middle-end/71494, PR c++/71448,
+ PR tree-optimization/71405, PR tree-optimization/71505,
+ PR target/71379 (s390), PR target/71186 (PPC), PR target/70915 (PPC),
+ PR c++/70572, PR c++/71516, PR c/71381.
+
+ -- Matthias Klose <doko at debian.org> Mon, 20 Jun 2016 13:41:44 +0200
+
gcc-6 (6.1.1-6) unstable; urgency=medium
* Update to SVN 20160609 (r237267, 6.1.1) from the gcc-6-branch.
diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff
index 86ff355..612c37f 100644
--- a/debian/patches/svn-updates.diff
+++ b/debian/patches/svn-updates.diff
@@ -1,10 +1,10 @@
-# DP: updates from the 6 branch upto 20160609 (r237267).
+# DP: updates from the 6 branch upto 20160620 (r237590).
last_update()
{
cat > ${dir}LAST_UPDATED <EOF
-Thu Jun 9 18:08:42 CEST 2016
-Thu Jun 9 16:08:42 UTC 2016 (revision 237267)
+Mon Jun 20 13:16:32 CEST 2016
+Mon Jun 20 11:16:32 UTC 2016 (revision 237590)
EOF
}
@@ -16,7 +16,26 @@ Index: libgomp/ChangeLog
===================================================================
--- a/src/libgomp/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/libgomp/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,27 @@
+@@ -1,3 +1,46 @@
++2016-06-10 Thomas Schwinge <thomas at codesourcery.com>
++
++ PR middle-end/71373
++ Backport from trunk r237291:
++ 2016-06-10 Thomas Schwinge <thomas at codesourcery.com>
++ Cesar Philippidis <cesar at codesourcery.com>
++
++ * libgomp.oacc-c/nested-function-1.c: New file.
++ * libgomp.oacc-c/nested-function-2.c: Likewise.
++ * libgomp.oacc-fortran/nested-function-1.f90: Likewise.
++ * libgomp.oacc-fortran/nested-function-2.f90: Likewise.
++ * libgomp.oacc-fortran/nested-function-3.f90: Likewise.
++
++ PR c/71381
++ Backport from trunk r237290:
++ * testsuite/libgomp.oacc-c-c++-common/cache-1.c: #include
++ "../../../gcc/testsuite/c-c++-common/goacc/cache-1.c".
++ * testsuite/libgomp.oacc-fortran/cache-1.f95: New file.
++
+2016-05-23 Martin Jambor <mjambor at suse.cz>
+
+ * testsuite/libgomp.hsa.c/switch-sbr-2.c: New test.
@@ -204,6 +223,519 @@ Index: libgomp/testsuite/libgomp.oacc-fortran/combined-reduction.f90
+
+ if (var .ne. n) call abort
+end program test
+Index: libgomp/testsuite/libgomp.oacc-fortran/nested-function-1.f90
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.oacc-fortran/nested-function-1.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/libgomp/testsuite/libgomp.oacc-fortran/nested-function-1.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,70 @@
++! Exercise nested function decomposition, gcc/tree-nested.c.
++
++! { dg-do run }
++
++program collapse2
++ call test1
++ call test2
++contains
++ subroutine test1
++ integer :: i, j, k, a(1:3, 4:6, 5:7)
++ logical :: l
++ l = .false.
++ a(:, :, :) = 0
++ !$acc parallel reduction (.or.:l)
++ !$acc loop worker vector collapse(4 - 1)
++ do 164 i = 1, 3
++ do 164 j = 4, 6
++ do 164 k = 5, 7
++ a(i, j, k) = i + j + k
++164 end do
++ !$acc loop worker vector reduction(.or.:l) collapse(2)
++firstdo: do i = 1, 3
++ do j = 4, 6
++ do k = 5, 7
++ if (a(i, j, k) .ne. (i + j + k)) l = .true.
++ end do
++ end do
++ end do firstdo
++ !$acc end parallel
++ if (l) call abort
++ end subroutine test1
++
++ subroutine test2
++ integer :: a(3,3,3), k, kk, kkk, l, ll, lll
++ a = 0
++ !$acc parallel
++ ! Use "gang(static:1)" here and below to effectively turn gang-redundant
++ ! execution mode into something like gang-single.
++ !$acc loop gang(static:1) collapse(1)
++ do 115 k=1,3
++ !$acc loop collapse(2)
++ dokk: do kk=1,3
++ do kkk=1,3
++ a(k,kk,kkk) = 1
++ enddo
++ enddo dokk
++115 continue
++ !$acc loop gang(static:1) collapse(1)
++ do k=1,3
++ if (any(a(k,1:3,1:3).ne.1)) call abort
++ enddo
++ ! Use "gang(static:1)" here and below to effectively turn gang-redundant
++ ! execution mode into something like gang-single.
++ !$acc loop gang(static:1) collapse(1)
++ dol: do 120 l=1,3
++ !$acc loop collapse(2)
++ doll: do ll=1,3
++ do lll=1,3
++ a(l,ll,lll) = 2
++ enddo
++ enddo doll
++120 end do dol
++ !$acc loop gang(static:1) collapse(1)
++ do l=1,3
++ if (any(a(l,1:3,1:3).ne.2)) call abort
++ enddo
++ !$acc end parallel
++ end subroutine test2
++
++end program collapse2
+Index: libgomp/testsuite/libgomp.oacc-fortran/nested-function-2.f90
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.oacc-fortran/nested-function-2.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/libgomp/testsuite/libgomp.oacc-fortran/nested-function-2.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,173 @@
++! Exercise nested function decomposition, gcc/tree-nested.c.
++
++! { dg-do run }
++
++program collapse3
++ integer :: p1, p2, p3, p4, p5, p6, p7, p8, p9
++ p1 = 2
++ p2 = 6
++ p3 = -2
++ p4 = 4
++ p5 = 13
++ p6 = 18
++ p7 = 1
++ p8 = 1
++ p9 = 1
++ call test1
++ call test2 (p1, p2, p3, p4, p5, p6)
++ call test3 (p1, p2, p3, p4, p5, p6, p7, p8, p9)
++ call test4
++contains
++ subroutine test1
++ integer :: a(3,3,3), k, kk, kkk, l, ll, lll
++ !$acc parallel
++ !$acc loop collapse(3)
++ do 115 k=1,3
++dokk: do kk=1,3
++ do kkk=1,3
++ a(k,kk,kkk) = 1
++ enddo
++ enddo dokk
++115 continue
++ !$acc end parallel
++ if (any(a(1:3,1:3,1:3).ne.1)) call abort
++ !$acc parallel
++ !$acc loop collapse(3)
++dol: do 120 l=1,3
++doll: do ll=1,3
++ do lll=1,3
++ a(l,ll,lll) = 2
++ enddo
++ enddo doll
++120 end do dol
++ !$acc end parallel
++ if (any(a(1:3,1:3,1:3).ne.2)) call abort
++ end subroutine test1
++
++ subroutine test2(v1, v2, v3, v4, v5, v6)
++ integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
++ integer :: v1, v2, v3, v4, v5, v6
++ logical :: l, r
++ l = .false.
++ r = .false.
++ a(:, :, :) = 0
++ b(:, :, :) = 0
++ !$acc parallel reduction (.or.:l)
++ !$acc loop reduction (.or.:l) collapse (3)
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ l = l.or.k.lt.13.or.k.gt.18
++ if (.not.l) a(i, j, k) = a(i, j, k) + 1
++ end do
++ end do
++ end do
++ !$acc end parallel
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ r = r.or.k.lt.13.or.k.gt.18
++ if (.not.l) b(i, j, k) = b(i, j, k) + 1
++ end do
++ end do
++ end do
++ if (l .neqv. r) call abort
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ if (a(i, j, k) .ne. b(i, j, k)) call abort
++ end do
++ end do
++ end do
++ end subroutine test2
++
++ subroutine test3(v1, v2, v3, v4, v5, v6, v7, v8, v9)
++ integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
++ integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
++ logical :: l, r
++ l = .false.
++ r = .false.
++ a(:, :, :) = 0
++ b(:, :, :) = 0
++ !$acc parallel reduction (.or.:l)
++ !$acc loop reduction (.or.:l) collapse (3)
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ l = l.or.k.lt.13.or.k.gt.18
++ if (.not.l) a(i, j, k) = a(i, j, k) + 1
++ end do
++ end do
++ end do
++ !$acc end parallel
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ r = r.or.k.lt.13.or.k.gt.18
++ if (.not.l) b(i, j, k) = b(i, j, k) + 1
++ end do
++ end do
++ end do
++ if (l .neqv. r) call abort
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ if (a(i, j, k) .ne. b(i, j, k)) call abort
++ end do
++ end do
++ end do
++ end subroutine test3
++
++ subroutine test4
++ integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
++ integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
++ logical :: l, r
++ l = .false.
++ r = .false.
++ a(:, :, :) = 0
++ b(:, :, :) = 0
++ v1 = p1
++ v2 = p2
++ v3 = p3
++ v4 = p4
++ v5 = p5
++ v6 = p6
++ v7 = p7
++ v8 = p8
++ v9 = p9
++ !$acc parallel reduction (.or.:l)
++ !$acc loop reduction (.or.:l) collapse (3)
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ l = l.or.k.lt.13.or.k.gt.18
++ if (.not.l) a(i, j, k) = a(i, j, k) + 1
++ end do
++ end do
++ end do
++ !$acc end parallel
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ r = r.or.k.lt.13.or.k.gt.18
++ if (.not.r) b(i, j, k) = b(i, j, k) + 1
++ end do
++ end do
++ end do
++ if (l .neqv. r) call abort
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ if (a(i, j, k) .ne. b(i, j, k)) call abort
++ end do
++ end do
++ end do
++ end subroutine test4
++
++end program collapse3
+Index: libgomp/testsuite/libgomp.oacc-fortran/nested-function-3.f90
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.oacc-fortran/nested-function-3.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/libgomp/testsuite/libgomp.oacc-fortran/nested-function-3.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,244 @@
++! Exercise nested function decomposition, gcc/tree-nested.c.
++
++! { dg-do run }
++
++program sub_collapse_3
++ call test1
++ call test2 (2, 6, -2, 4, 13, 18)
++ call test3 (2, 6, -2, 4, 13, 18, 1, 1, 1)
++ call test4
++ call test5 (2, 6, -2, 4, 13, 18)
++ call test6 (2, 6, -2, 4, 13, 18, 1, 1, 1)
++contains
++ subroutine test1
++ integer :: a(3,3,3), k, kk, kkk, l, ll, lll
++ !$acc parallel
++ !$acc loop collapse(3)
++ do 115 k=1,3
++dokk: do kk=1,3
++ do kkk=1,3
++ a(k,kk,kkk) = 1
++ enddo
++ enddo dokk
++115 continue
++ !$acc end parallel
++ if (any(a(1:3,1:3,1:3).ne.1)) call abort
++ !$acc parallel
++ !$acc loop collapse(3)
++dol: do 120 l=1,3
++doll: do ll=1,3
++ do lll=1,3
++ a(l,ll,lll) = 2
++ enddo
++ enddo doll
++120 end do dol
++ !$acc end parallel
++ if (any(a(1:3,1:3,1:3).ne.2)) call abort
++ end subroutine test1
++
++ subroutine test2(v1, v2, v3, v4, v5, v6)
++ integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
++ integer :: v1, v2, v3, v4, v5, v6
++ logical :: l, r
++ l = .false.
++ r = .false.
++ a(:, :, :) = 0
++ b(:, :, :) = 0
++ !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6) reduction (.or.:l)
++ !$acc loop reduction (.or.:l) collapse (3)
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ l = l.or.k.lt.13.or.k.gt.18
++ if (.not.l) a(i, j, k) = a(i, j, k) + 1
++ end do
++ end do
++ end do
++ !$acc end parallel
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ r = r.or.k.lt.13.or.k.gt.18
++ if (.not.l) b(i, j, k) = b(i, j, k) + 1
++ end do
++ end do
++ end do
++ if (l .neqv. r) call abort
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ if (a(i, j, k) .ne. b(i, j, k)) call abort
++ end do
++ end do
++ end do
++ end subroutine test2
++
++ subroutine test3(v1, v2, v3, v4, v5, v6, v7, v8, v9)
++ integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
++ integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
++ logical :: l, r
++ l = .false.
++ r = .false.
++ a(:, :, :) = 0
++ b(:, :, :) = 0
++ !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6, v7, v8, v9) reduction (.or.:l)
++ !$acc loop reduction (.or.:l) collapse (3)
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ l = l.or.k.lt.13.or.k.gt.18
++ if (.not.l) a(i, j, k) = a(i, j, k) + 1
++ end do
++ end do
++ end do
++ !$acc end parallel
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ r = r.or.k.lt.13.or.k.gt.18
++ if (.not.l) b(i, j, k) = b(i, j, k) + 1
++ end do
++ end do
++ end do
++ if (l .neqv. r) call abort
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ if (a(i, j, k) .ne. b(i, j, k)) call abort
++ end do
++ end do
++ end do
++ end subroutine test3
++
++ subroutine test4
++ integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
++ integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
++ logical :: l, r
++ l = .false.
++ r = .false.
++ a(:, :, :) = 0
++ b(:, :, :) = 0
++ v1 = 2
++ v2 = 6
++ v3 = -2
++ v4 = 4
++ v5 = 13
++ v6 = 18
++ v7 = 1
++ v8 = 1
++ v9 = 1
++ !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6, v7, v8, v9) reduction (.or.:l)
++ !$acc loop reduction (.or.:l) collapse (3)
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ l = l.or.k.lt.13.or.k.gt.18
++ if (.not.l) a(i, j, k) = a(i, j, k) + 1
++ end do
++ end do
++ end do
++ !$acc end parallel
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ r = r.or.k.lt.13.or.k.gt.18
++ if (.not.r) b(i, j, k) = b(i, j, k) + 1
++ end do
++ end do
++ end do
++ if (l .neqv. r) call abort
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ if (a(i, j, k) .ne. b(i, j, k)) call abort
++ end do
++ end do
++ end do
++ end subroutine test4
++
++ subroutine test5(v1, v2, v3, v4, v5, v6)
++ integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
++ integer :: v1, v2, v3, v4, v5, v6
++ logical :: l, r
++ l = .false.
++ r = .false.
++ a(:, :, :) = 0
++ b(:, :, :) = 0
++ !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6) reduction (.or.:l)
++ !$acc loop reduction (.or.:l) collapse (3)
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ l = l.or.k.lt.13.or.k.gt.18
++ if (.not.l) a(i, j, k) = a(i, j, k) + 1
++ end do
++ end do
++ end do
++ !$acc end parallel
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ r = r.or.k.lt.13.or.k.gt.18
++ if (.not.r) b(i, j, k) = b(i, j, k) + 1
++ end do
++ end do
++ end do
++ if (l .neqv. r) call abort
++ do i = v1, v2
++ do j = v3, v4
++ do k = v5, v6
++ if (a(i, j, k) .ne. b(i, j, k)) call abort
++ end do
++ end do
++ end do
++ end subroutine test5
++
++ subroutine test6(v1, v2, v3, v4, v5, v6, v7, v8, v9)
++ integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
++ integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
++ logical :: l, r
++ l = .false.
++ r = .false.
++ a(:, :, :) = 0
++ b(:, :, :) = 0
++ !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6, v7, v8, v9) reduction (.or.:l)
++ !$acc loop reduction (.or.:l) collapse (3)
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ l = l.or.k.lt.13.or.k.gt.18
++ if (.not.l) a(i, j, k) = a(i, j, k) + 1
++ m = i * 100 + j * 10 + k
++ end do
++ end do
++ end do
++ !$acc end parallel
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
++ r = r.or.k.lt.13.or.k.gt.18
++ if (.not.r) b(i, j, k) = b(i, j, k) + 1
++ end do
++ end do
++ end do
++ if (l .neqv. r) call abort
++ do i = v1, v2, v7
++ do j = v3, v4, v8
++ do k = v5, v6, v9
++ if (a(i, j, k) .ne. b(i, j, k)) call abort
++ end do
++ end do
++ end do
++ end subroutine test6
++
++end program sub_collapse_3
+Index: libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95 (.../branches/gcc-6-branch)
+@@ -0,0 +1,6 @@
++! OpenACC cache directive.
++! { dg-do run }
++! { dg-additional-options "-std=f2008" }
++! { dg-additional-options "-cpp" }
++
++#include "../../../gcc/testsuite/gfortran.dg/goacc/cache-1.f95"
Index: libgomp/testsuite/libgomp.oacc-c-c++-common/combined-reduction.c
===================================================================
--- a/src/libgomp/testsuite/libgomp.oacc-c-c++-common/combined-reduction.c (.../tags/gcc_6_1_0_release)
@@ -232,6 +764,61 @@ Index: libgomp/testsuite/libgomp.oacc-c-c++-common/combined-reduction.c
+
+ return 0;
+}
+Index: libgomp/testsuite/libgomp.oacc-c-c++-common/cache-1.c
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.oacc-c-c++-common/cache-1.c (.../tags/gcc_6_1_0_release)
++++ b/src/libgomp/testsuite/libgomp.oacc-c-c++-common/cache-1.c (.../branches/gcc-6-branch)
+@@ -1,48 +1,3 @@
+-int
+-main (int argc, char **argv)
+-{
+-#define N 2
+- int a[N], b[N];
+- int i;
++/* OpenACC cache directive. */
+
+- for (i = 0; i < N; i++)
+- {
+- a[i] = 3;
+- b[i] = 0;
+- }
+-
+-#pragma acc parallel copyin (a[0:N]) copyout (b[0:N])
+-{
+- int ii;
+-
+- for (ii = 0; ii < N; ii++)
+- {
+- const int idx = ii;
+- int n = 1;
+- const int len = n;
+-
+-#pragma acc cache (a[0:N])
+-
+-#pragma acc cache (a[0:N], b[0:N])
+-
+-#pragma acc cache (a[0])
+-
+-#pragma acc cache (a[0], a[1], b[0:N])
+-
+-#pragma acc cache (a[idx])
+-
+-#pragma acc cache (a[idx:len])
+-
+- b[ii] = a[ii];
+- }
+-}
+-
+-
+- for (i = 0; i < N; i++)
+- {
+- if (a[i] != b[i])
+- __builtin_abort ();
+- }
+-
+- return 0;
+-}
++#include "../../../gcc/testsuite/c-c++-common/goacc/cache-1.c"
Index: libgomp/testsuite/libgomp.c/pr70680-1.c
===================================================================
--- a/src/libgomp/testsuite/libgomp.c/pr70680-1.c (.../tags/gcc_6_1_0_release)
@@ -396,6 +983,268 @@ Index: libgomp/testsuite/libgomp.c/pr70680-2.c
+ f4 ();
+ return 0;
+}
+Index: libgomp/testsuite/libgomp.oacc-c/nested-function-1.c
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.oacc-c/nested-function-1.c (.../tags/gcc_6_1_0_release)
++++ b/src/libgomp/testsuite/libgomp.oacc-c/nested-function-1.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,52 @@
++/* Exercise nested function decomposition, gcc/tree-nested.c. */
++
++int
++main (void)
++{
++ void test1 ()
++ {
++ int i, j, k;
++ int a[4][7][8];
++
++ __builtin_memset (a, 0, sizeof (a));
++
++#pragma acc parallel
++#pragma acc loop collapse(4 - 1)
++ for (i = 1; i <= 3; i++)
++ for (j = 4; j <= 6; j++)
++ for (k = 5; k <= 7; k++)
++ a[i][j][k] = i + j + k;
++
++ for (i = 1; i <= 3; i++)
++ for (j = 4; j <= 6; j++)
++ for (k = 5; k <= 7; k++)
++ if (a[i][j][k] != i + j + k)
++ __builtin_abort();
++ }
++
++ void test2 ()
++ {
++ int i, j, k;
++ int a[4][4][4];
++
++ __builtin_memset (a, 0, sizeof (a));
++
++#pragma acc parallel
++#pragma acc loop collapse(3)
++ for (i = 1; i <= 3; i++)
++ for (j = 1; j <= 3; j++)
++ for (k = 1; k <= 3; k++)
++ a[i][j][k] = 1;
++
++ for (i = 1; i <= 3; i++)
++ for (j = 1; j <= 3; j++)
++ for (k = 1; k <= 3; k++)
++ if (a[i][j][k] != 1)
++ __builtin_abort ();
++ }
++
++ test1 ();
++ test2 ();
++
++ return 0;
++}
+Index: libgomp/testsuite/libgomp.oacc-c/nested-function-2.c
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.oacc-c/nested-function-2.c (.../tags/gcc_6_1_0_release)
++++ b/src/libgomp/testsuite/libgomp.oacc-c/nested-function-2.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,155 @@
++/* Exercise nested function decomposition, gcc/tree-nested.c. */
++
++int
++main (void)
++{
++ int p1 = 2, p2 = 6, p3 = 0, p4 = 4, p5 = 13, p6 = 18, p7 = 1, p8 = 1, p9 = 1;
++
++ void test1 ()
++ {
++ int i, j, k;
++ int a[4][4][4];
++
++ __builtin_memset (a, '\0', sizeof (a));
++
++#pragma acc parallel
++#pragma acc loop collapse(3)
++ for (i = 1; i <= 3; i++)
++ for (j = 1; j <= 3; j++)
++ for (k = 2; k <= 3; k++)
++ a[i][j][k] = 1;
++
++ for (i = 1; i <= 3; i++)
++ for (j = 1; j <= 3; j++)
++ for (k = 2; k <= 3; k++)
++ if (a[i][j][k] != 1)
++ __builtin_abort();
++ }
++
++ void test2 (int v1, int v2, int v3, int v4, int v5, int v6)
++ {
++ int i, j, k, l = 0, r = 0;
++ int a[7][5][19];
++ int b[7][5][19];
++
++ __builtin_memset (a, '\0', sizeof (a));
++ __builtin_memset (b, '\0', sizeof (b));
++
++#pragma acc parallel reduction (||:l)
++#pragma acc loop reduction (||:l) collapse(3)
++ for (i = v1; i <= v2; i++)
++ for (j = v3; j <= v4; j++)
++ for (k = v5; k <= v6; k++)
++ {
++ l = l || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
++ if (!l)
++ a[i][j][k] += 1;
++ }
++
++ for (i = v1; i <= v2; i++)
++ for (j = v3; j <= v4; j++)
++ for (k = v5; k <= v6; k++)
++ {
++ r = r || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
++ if (!r)
++ b[i][j][k] += 1;
++ }
++
++ if (l != r)
++ __builtin_abort ();
++
++ for (i = v1; i <= v2; i++)
++ for (j = v3; j <= v4; j++)
++ for (k = v5; k <= v6; k++)
++ if (b[i][j][k] != a[i][j][k])
++ __builtin_abort ();
++ }
++
++ void test3 (int v1, int v2, int v3, int v4, int v5, int v6, int v7, int v8,
++ int v9)
++ {
++ int i, j, k, l = 0, r = 0;
++ int a[7][5][19];
++ int b[7][5][19];
++
++ __builtin_memset (a, '\0', sizeof (a));
++ __builtin_memset (b, '\0', sizeof (b));
++
++#pragma acc parallel reduction (||:l)
++#pragma acc loop reduction (||:l) collapse(3)
++ for (i = v1; i <= v2; i += v7)
++ for (j = v3; j <= v4; j += v8)
++ for (k = v5; k <= v6; k += v9)
++ {
++ l = l || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
++ if (!l)
++ a[i][j][k] += 1;
++ }
++
++ for (i = v1; i <= v2; i += v7)
++ for (j = v3; j <= v4; j += v8)
++ for (k = v5; k <= v6; k += v9)
++ {
++ r = r || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
++ if (!r)
++ b[i][j][k] += 1;
++ }
++
++ if (l != r)
++ __builtin_abort ();
++
++ for (i = v1; i <= v2; i++)
++ for (j = v3; j <= v4; j++)
++ for (k = v5; k <= v6; k++)
++ if (b[i][j][k] != a[i][j][k])
++ __builtin_abort ();
++ }
++
++ void test4 ()
++ {
++ int i, j, k, l = 0, r = 0;
++ int a[7][5][19];
++ int b[7][5][19];
++ int v1 = p1, v2 = p2, v3 = p3, v4 = p4, v5 = p5, v6 = p6, v7 = p7, v8 = p8,
++ v9 = p9;
++
++ __builtin_memset (a, '\0', sizeof (a));
++ __builtin_memset (b, '\0', sizeof (b));
++
++#pragma acc parallel reduction (||:l)
++#pragma acc loop reduction (||:l) collapse(3)
++ for (i = v1; i <= v2; i += v7)
++ for (j = v3; j <= v4; j += v8)
++ for (k = v5; k <= v6; k += v9)
++ {
++ l = l || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
++ if (!l)
++ a[i][j][k] += 1;
++ }
++
++ for (i = v1; i <= v2; i += v7)
++ for (j = v3; j <= v4; j += v8)
++ for (k = v5; k <= v6; k += v9)
++ {
++ r = r || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
++ if (!r)
++ b[i][j][k] += 1;
++ }
++
++ if (l != r)
++ __builtin_abort ();
++
++ for (i = v1; i <= v2; i++)
++ for (j = v3; j <= v4; j++)
++ for (k = v5; k <= v6; k++)
++ if (b[i][j][k] != a[i][j][k])
++ __builtin_abort ();
++ }
++
++ test1 ();
++ test2 (p1, p2, p3, p4, p5, p6);
++ test3 (p1, p2, p3, p4, p5, p6, p7, p8, p9);
++ test4 ();
++
++ return 0;
++}
+Index: libmpx/ChangeLog
+===================================================================
+--- a/src/libmpx/ChangeLog (.../tags/gcc_6_1_0_release)
++++ b/src/libmpx/ChangeLog (.../branches/gcc-6-branch)
+@@ -1,3 +1,10 @@
++2016-06-10 Ilya Enkovich <ilya.enkovich at intel.com>
++
++ Backport from mainline r237292.
++ 2016-06-10 Ilya Enkovich <ilya.enkovich at intel.com>
++
++ * mpxwrap/mpx_wrappers.c (move_bounds): Fix overflow bug.
++
+ 2016-04-27 Release Manager
+
+ * GCC 6.1.0 released.
+Index: libmpx/mpxwrap/mpx_wrappers.c
+===================================================================
+--- a/src/libmpx/mpxwrap/mpx_wrappers.c (.../tags/gcc_6_1_0_release)
++++ b/src/libmpx/mpxwrap/mpx_wrappers.c (.../branches/gcc-6-branch)
+@@ -27,6 +27,7 @@
+ #include "string.h"
+ #include <sys/mman.h>
+ #include <stdint.h>
++#include <assert.h>
+ #include "mpxrt/mpxrt.h"
+
+ void *
+@@ -418,7 +419,16 @@
+ else
+ elems_to_copy -= src_bt_index_end + 1;
+ }
+- src_bd_index_end--;
++ /* Go to previous table but beware of overflow.
++ We should have copied all required element
++ in case src_bd_index_end is 0. */
++ if (src_bd_index_end)
++ src_bd_index_end--;
++ else
++ {
++ assert (!elems_to_copy);
++ return;
++ }
+ /* For each bounds table we check if there are valid pointers inside.
+ If there are some, we copy table in pre-counted portions. */
+ for (; src_bd_index_end > src_bd_index; src_bd_index_end--)
Index: libsanitizer/asan/asan_malloc_linux.cc
===================================================================
--- a/src/libsanitizer/asan/asan_malloc_linux.cc (.../tags/gcc_6_1_0_release)
@@ -1140,11 +1989,117 @@ Index: libstdc++-v3/include/experimental/bits/fs_fwd.h
{ return __x = __x ^ __y; }
typedef chrono::time_point<chrono::system_clock> file_time_type;
+Index: libstdc++-v3/include/bits/stl_algobase.h
+===================================================================
+--- a/src/libstdc++-v3/include/bits/stl_algobase.h (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/bits/stl_algobase.h (.../branches/gcc-6-branch)
+@@ -989,7 +989,6 @@
+ __glibcxx_function_requires(_LessThanOpConcept<
+ typename iterator_traits<_ForwardIterator>::value_type, _Tp>)
+ __glibcxx_requires_partitioned_lower(__first, __last, __val);
+- __glibcxx_requires_irreflexive2(__first, __last);
+
+ return std::__lower_bound(__first, __last, __val,
+ __gnu_cxx::__ops::__iter_less_val());
+@@ -1214,9 +1213,7 @@
+ __glibcxx_function_requires(_LessThanOpConcept<_ValueType1, _ValueType2>)
+ __glibcxx_function_requires(_LessThanOpConcept<_ValueType2, _ValueType1>)
+ __glibcxx_requires_valid_range(__first1, __last1);
+- __glibcxx_requires_irreflexive2(__first1, __last1);
+ __glibcxx_requires_valid_range(__first2, __last2);
+- __glibcxx_requires_irreflexive2(__first2, __last2);
+
+ return std::__lexicographical_compare_aux(std::__niter_base(__first1),
+ std::__niter_base(__last1),
+@@ -1246,9 +1243,7 @@
+ __glibcxx_function_requires(_InputIteratorConcept<_II1>)
+ __glibcxx_function_requires(_InputIteratorConcept<_II2>)
+ __glibcxx_requires_valid_range(__first1, __last1);
+- __glibcxx_requires_irreflexive_pred2(__first1, __last1, __comp);
+ __glibcxx_requires_valid_range(__first2, __last2);
+- __glibcxx_requires_irreflexive_pred2(__first2, __last2, __comp);
+
+ return std::__lexicographical_compare_impl
+ (__first1, __last1, __first2, __last2,
+Index: libstdc++-v3/include/bits/stl_algo.h
+===================================================================
+--- a/src/libstdc++-v3/include/bits/stl_algo.h (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/bits/stl_algo.h (.../branches/gcc-6-branch)
+@@ -2026,7 +2026,6 @@
+ typename iterator_traits<_ForwardIterator>::value_type, _Tp>)
+ __glibcxx_requires_partitioned_lower_pred(__first, __last,
+ __val, __comp);
+- __glibcxx_requires_irreflexive_pred2(__first, __last, __comp);
+
+ return std::__lower_bound(__first, __last, __val,
+ __gnu_cxx::__ops::__iter_comp_val(__comp));
+@@ -2080,7 +2079,6 @@
+ __glibcxx_function_requires(_LessThanOpConcept<
+ _Tp, typename iterator_traits<_ForwardIterator>::value_type>)
+ __glibcxx_requires_partitioned_upper(__first, __last, __val);
+- __glibcxx_requires_irreflexive2(__first, __last);
+
+ return std::__upper_bound(__first, __last, __val,
+ __gnu_cxx::__ops::__val_less_iter());
+@@ -2112,7 +2110,6 @@
+ _Tp, typename iterator_traits<_ForwardIterator>::value_type>)
+ __glibcxx_requires_partitioned_upper_pred(__first, __last,
+ __val, __comp);
+- __glibcxx_requires_irreflexive_pred2(__first, __last, __comp);
+
+ return std::__upper_bound(__first, __last, __val,
+ __gnu_cxx::__ops::__val_comp_iter(__comp));
+@@ -2186,7 +2183,6 @@
+ _Tp, typename iterator_traits<_ForwardIterator>::value_type>)
+ __glibcxx_requires_partitioned_lower(__first, __last, __val);
+ __glibcxx_requires_partitioned_upper(__first, __last, __val);
+- __glibcxx_requires_irreflexive2(__first, __last);
+
+ return std::__equal_range(__first, __last, __val,
+ __gnu_cxx::__ops::__iter_less_val(),
+@@ -2225,7 +2221,6 @@
+ __val, __comp);
+ __glibcxx_requires_partitioned_upper_pred(__first, __last,
+ __val, __comp);
+- __glibcxx_requires_irreflexive_pred2(__first, __last, __comp);
+
+ return std::__equal_range(__first, __last, __val,
+ __gnu_cxx::__ops::__iter_comp_val(__comp),
+@@ -2255,7 +2250,6 @@
+ _Tp, typename iterator_traits<_ForwardIterator>::value_type>)
+ __glibcxx_requires_partitioned_lower(__first, __last, __val);
+ __glibcxx_requires_partitioned_upper(__first, __last, __val);
+- __glibcxx_requires_irreflexive2(__first, __last);
+
+ _ForwardIterator __i
+ = std::__lower_bound(__first, __last, __val,
+@@ -2291,7 +2285,6 @@
+ __val, __comp);
+ __glibcxx_requires_partitioned_upper_pred(__first, __last,
+ __val, __comp);
+- __glibcxx_requires_irreflexive_pred2(__first, __last, __comp);
+
+ _ForwardIterator __i
+ = std::__lower_bound(__first, __last, __val,
Index: libstdc++-v3/ChangeLog
===================================================================
--- a/src/libstdc++-v3/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/libstdc++-v3/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,132 @@
+@@ -1,3 +1,146 @@
++2016-06-17 Jonathan Wakely <jwakely at redhat.com>
++
++ PR libstdc++/71545
++ * include/bits/stl_algobase.h (lower_bound, lexicographical_compare):
++ Remove irreflexive checks.
++ * include/bits/stl_algo.h (lower_bound, upper_bound, equal_range,
++ binary_search): Likewise.
++ * testsuite/25_algorithms/equal_range/partitioned.cc: New test.
++ * testsuite/25_algorithms/lexicographical_compare/71545.cc: New test.
++ * testsuite/25_algorithms/lower_bound/partitioned.cc: New test.
++ * testsuite/25_algorithms/upper_bound/partitioned.cc: New test.
++ * testsuite/util/testsuite_iterators.h (__gnu_test::test_container):
++ Add constructor from array.
++
+2016-05-26 Jonathan Wakely <jwakely at redhat.com>
+
+ Backport from mainline
@@ -1277,6 +2232,397 @@ Index: libstdc++-v3/ChangeLog
2016-04-27 Release Manager
* GCC 6.1.0 released.
+Index: libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/71545.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/71545.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/71545.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,35 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
++// { dg-do link }
++
++#include <algorithm>
++
++struct X { };
++
++bool operator<(X, int) { return true; }
++bool operator<(int, X) { return false; }
++
++bool operator<(X, X); // undefined (PR libstdc++/71545)
++
++int main()
++{
++ X x[1];
++ int i[1];
++ std::lexicographical_compare(x, x+1, i, i+1);
++}
+Index: libstdc++-v3/testsuite/25_algorithms/binary_search/partitioned.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/25_algorithms/binary_search/partitioned.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/25_algorithms/binary_search/partitioned.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,67 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
++
++#include <algorithm>
++#include <functional>
++#include <testsuite_iterators.h>
++#include <testsuite_hooks.h>
++
++using __gnu_test::test_container;
++using __gnu_test::forward_iterator_wrapper;
++
++struct X
++{
++ int val;
++
++ bool odd() const { return val % 2; }
++
++ // Partitioned so that all odd values come before even values:
++ bool operator<(const X& x) const { return this->odd() && !x.odd(); }
++};
++
++void
++test01()
++{
++ bool test __attribute((unused)) = true;
++
++ // Test with range that is partitioned, but not sorted.
++ X seq[] = { 1, 3, 5, 7, 1, 6, 4 };
++ test_container<X, forward_iterator_wrapper> c(seq);
++
++ auto b1 = std::binary_search(c.begin(), c.end(), X{2});
++ VERIFY( b1 );
++ auto b2 = std::binary_search(c.begin(), c.end(), X{2}, std::less<X>{});
++ VERIFY( b2 );
++
++ auto b3 = std::binary_search(c.begin(), c.end(), X{9});
++ VERIFY( b3 );
++ auto b4 = std::binary_search(c.begin(), c.end(), X{9}, std::less<X>{});
++ VERIFY( b4 );
++
++ auto b5 = std::binary_search(seq, seq+5, X{2});
++ VERIFY( !b5 );
++ auto b6 = std::binary_search(seq, seq+5, X{2}, std::less<X>{});
++ VERIFY( !b6 );
++}
++
++int
++main()
++{
++ test01();
++}
+Index: libstdc++-v3/testsuite/25_algorithms/upper_bound/partitioned.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/25_algorithms/upper_bound/partitioned.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/25_algorithms/upper_bound/partitioned.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,98 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
++
++#include <algorithm>
++#include <functional>
++#include <testsuite_iterators.h>
++#include <testsuite_hooks.h>
++
++using __gnu_test::test_container;
++using __gnu_test::forward_iterator_wrapper;
++
++struct X
++{
++ int val;
++
++ bool odd() const { return val % 2; }
++
++ // Partitioned so that all odd values come before even values:
++ bool operator<(const X& x) const { return this->odd() && !x.odd(); }
++};
++
++void
++test01()
++{
++ bool test __attribute((unused)) = true;
++
++ // Test with range that is partitioned, but not sorted.
++ X seq[] = { 1, 3, 5, 7, 1, 6, 4, 2 };
++ test_container<X, forward_iterator_wrapper> c(seq);
++
++ auto part1 = std::upper_bound(c.begin(), c.end(), X{2});
++ VERIFY( part1 == c.end() );
++ auto part2 = std::upper_bound(c.begin(), c.end(), X{2}, std::less<X>{});
++ VERIFY( part2 == c.end() );
++
++ auto part3 = std::upper_bound(c.begin(), c.end(), X{9});
++ VERIFY( part3 != c.end() );
++ VERIFY( part3->val == 6 );
++ auto part4 = std::upper_bound(c.begin(), c.end(), X{9}, std::less<X>{});
++ VERIFY( part3 != c.end() );
++ VERIFY( part4->val == 6 );
++}
++
++struct Y
++{
++ double val;
++
++ // Not irreflexive, so not a strict weak order.
++ bool operator<(const Y& y) const { return val < (int)y.val; }
++};
++
++void
++test02()
++{
++ bool test __attribute((unused)) = true;
++
++ // Test that Debug Mode checks don't fire (libstdc++/71545)
++
++ Y seq[] = { -0.1, 1.2, 5.0, 5.2, 5.1, 5.9, 5.5, 6.0 };
++ test_container<Y, forward_iterator_wrapper> c(seq);
++
++ auto part1 = std::upper_bound(c.begin(), c.end(), Y{5.5});
++ VERIFY( part1 != c.end() );
++ VERIFY( part1->val == 6.0 );
++ auto part2 = std::upper_bound(c.begin(), c.end(), Y{5.5}, std::less<Y>{});
++ VERIFY( part2 != c.end() );
++ VERIFY( part2->val == 6.0 );
++
++ auto part3 = std::upper_bound(c.begin(), c.end(), Y{1.0});
++ VERIFY( part3 != c.end() );
++ VERIFY( part3->val == 5.0 );
++ auto part4 = std::upper_bound(c.begin(), c.end(), Y{1.0}, std::less<Y>{});
++ VERIFY( part4 != c.end() );
++ VERIFY( part4->val == 5.0 );
++}
++
++int
++main()
++{
++ test01();
++ test02();
++}
+Index: libstdc++-v3/testsuite/25_algorithms/lower_bound/partitioned.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/25_algorithms/lower_bound/partitioned.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/25_algorithms/lower_bound/partitioned.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,100 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
++
++#include <algorithm>
++#include <functional>
++#include <testsuite_iterators.h>
++#include <testsuite_hooks.h>
++
++using __gnu_test::test_container;
++using __gnu_test::forward_iterator_wrapper;
++
++struct X
++{
++ int val;
++
++ bool odd() const { return val % 2; }
++
++ // Partitioned so that all odd values come before even values:
++ bool operator<(const X& x) const { return this->odd() && !x.odd(); }
++};
++
++void
++test01()
++{
++ bool test __attribute((unused)) = true;
++
++ // Test with range that is partitioned, but not sorted.
++ X seq[] = { 1, 3, 5, 7, 1, 6, 4, 2 };
++ test_container<X, forward_iterator_wrapper> c(seq);
++
++ auto part1 = std::lower_bound(c.begin(), c.end(), X{2});
++ VERIFY( part1 != c.end() );
++ VERIFY( part1->val == 6 );
++ auto part2 = std::lower_bound(c.begin(), c.end(), X{2}, std::less<X>{});
++ VERIFY( part2 != c.end() );
++ VERIFY( part2->val == 6 );
++
++ auto part3 = std::lower_bound(c.begin(), c.end(), X{9});
++ VERIFY( part3 != c.end() );
++ VERIFY( part3->val == 1 );
++ auto part4 = std::lower_bound(c.begin(), c.end(), X{9}, std::less<X>{});
++ VERIFY( part4 != c.end() );
++ VERIFY( part4->val == 1 );
++}
++
++struct Y
++{
++ double val;
++
++ // Not irreflexive, so not a strict weak order.
++ bool operator<(const Y& y) const { return val < int(y.val); }
++};
++
++void
++test02()
++{
++ bool test __attribute((unused)) = true;
++
++ // Test that Debug Mode checks don't fire (libstdc++/71545)
++
++ Y seq[] = { -0.1, 1.2, 5.0, 5.2, 5.1, 5.9, 5.5, 6.0 };
++ test_container<Y, forward_iterator_wrapper> c(seq);
++
++ auto part1 = std::lower_bound(c.begin(), c.end(), Y{5.5});
++ VERIFY( part1 != c.end() );
++ VERIFY( part1->val == 5.0 );
++ auto part2 = std::lower_bound(c.begin(), c.end(), Y{5.5}, std::less<Y>{});
++ VERIFY( part2 != c.end() );
++ VERIFY( part2->val == 5.0 );
++
++ auto part3 = std::lower_bound(c.begin(), c.end(), Y{1.0});
++ VERIFY( part3 != c.end() );
++ VERIFY( part3->val == 1.2 );
++ auto part4 = std::lower_bound(c.begin(), c.end(), Y{1.0}, std::less<Y>{});
++ VERIFY( part4 != c.end() );
++ VERIFY( part4->val == 1.2 );
++}
++
++int
++main()
++{
++ test01();
++ test02();
++}
+Index: libstdc++-v3/testsuite/25_algorithms/equal_range/partitioned.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/25_algorithms/equal_range/partitioned.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/25_algorithms/equal_range/partitioned.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,66 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
++
++#include <algorithm>
++#include <functional>
++#include <testsuite_iterators.h>
++#include <testsuite_hooks.h>
++
++using __gnu_test::test_container;
++using __gnu_test::forward_iterator_wrapper;
++
++struct X
++{
++ int val;
++
++ bool odd() const { return val % 2; }
++
++ // Partitioned so that all odd values come before even values:
++ bool operator<(const X& x) const { return this->odd() && !x.odd(); }
++};
++
++void
++test01()
++{
++ bool test __attribute((unused)) = true;
++
++ // Test with range that is partitioned, but not sorted.
++ X seq[] = { 1, 3, 5, 7, 1, 6, 4, 2 };
++ test_container<X, forward_iterator_wrapper> c(seq);
++
++ auto part1 = std::equal_range(c.begin(), c.end(), X{2});
++ VERIFY( part1.first != c.end() && part1.second == c.end() );
++ VERIFY( part1.first->val == 6 );
++ auto part2 = std::equal_range(c.begin(), c.end(), X{2}, std::less<X>{});
++ VERIFY( part2.first != c.end() && part1.second == c.end() );
++ VERIFY( part2.first->val == 6 );
++
++ auto part3 = std::equal_range(c.begin(), c.end(), X{9});
++ VERIFY( part3.first == c.begin() && part3.second != c.end() );
++ VERIFY( part3.second->val == 6 );
++ auto part4 = std::equal_range(c.begin(), c.end(), X{9}, std::less<X>{});
++ VERIFY( part4.first == c.begin() && part4.second != c.end() );
++ VERIFY( part4.second->val == 6 );
++}
++
++int
++main()
++{
++ test01();
++}
Index: libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8_utf16/66855.cc
===================================================================
--- a/src/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8_utf16/66855.cc (.../tags/gcc_6_1_0_release)
@@ -2015,6 +3361,24 @@ Index: libstdc++-v3/testsuite/experimental/filesystem/path/native/string.cc
+ test01();
+ test02();
+}
+Index: libstdc++-v3/testsuite/util/testsuite_iterators.h
+===================================================================
+--- a/src/libstdc++-v3/testsuite/util/testsuite_iterators.h (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/util/testsuite_iterators.h (.../branches/gcc-6-branch)
+@@ -542,6 +542,13 @@
+ test_container(T* _first, T* _last):bounds(_first, _last)
+ { }
+
++#if __cplusplus >= 201103L
++ template<std::size_t N>
++ explicit
++ test_container(T (&arr)[N]) : test_container(arr, arr+N)
++ { }
++#endif
++
+ ItType<T>
+ it(int pos)
+ {
Index: libstdc++-v3/testsuite/util/testsuite_fs.h
===================================================================
--- a/src/libstdc++-v3/testsuite/util/testsuite_fs.h (.../tags/gcc_6_1_0_release)
@@ -2551,6 +3915,42 @@ Index: libjava/testsuite/lib/libjava.exp
foreach x {. .. ../.. ../../..} {
if {[file exists $d/$x/libtool]} then {
# We have to run silently to avoid DejaGNU lossage.
+Index: maintainer-scripts/generate_libstdcxx_web_docs
+===================================================================
+--- a/src/maintainer-scripts/generate_libstdcxx_web_docs (.../tags/gcc_6_1_0_release)
++++ b/src/maintainer-scripts/generate_libstdcxx_web_docs (.../branches/gcc-6-branch)
+@@ -3,7 +3,7 @@
+ # i.e. http://gcc.gnu.org/onlinedocs/gcc-x.y.z/libstdc++*
+
+ SRCDIR=${1}
+-DOCSDIR=${2}
++DOCSDIR=$(realpath ${2})
+
+ if ! [ $# -eq 2 -a -x "${SRCDIR}/configure" -a -d "${DOCSDIR}" ]
+ then
+@@ -34,6 +34,9 @@
+ ${SRCDIR}/configure --enable-languages=c,c++ --disable-gcc $disabled_libs --docdir=/docs
+ eval `grep '^target=' config.log`
+ make configure-target
++# If the following step fails with an error like
++# ! LaTeX Error: File `xtab.sty' not found.
++# then you need to install the relevant TeX package e.g. texlive-xtab
+ make -C $target/libstdc++-v3 doc-install-html doc-install-xml doc-install-pdf DESTDIR=$DESTDIR
+ cd $DESTDIR/docs
+ mkdir libstdc++
+Index: maintainer-scripts/ChangeLog
+===================================================================
+--- a/src/maintainer-scripts/ChangeLog (.../tags/gcc_6_1_0_release)
++++ b/src/maintainer-scripts/ChangeLog (.../branches/gcc-6-branch)
+@@ -1,3 +1,8 @@
++2016-06-13 Jonathan Wakely <jwakely at redhat.com>
++
++ * generate_libstdcxx_web_docs: Use realpath to get absolute path.
++ Add comment about LaTeX errors.
++
+ 2016-04-27 Release Manager
+
+ * GCC 6.1.0 released.
Index: libgcc/config.host
===================================================================
--- a/src/libgcc/config.host (.../tags/gcc_6_1_0_release)
@@ -2631,6 +4031,40 @@ Index: gcc/tree-vrp.c
}
else
{
+Index: gcc/ipa-chkp.c
+===================================================================
+--- a/src/gcc/ipa-chkp.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/ipa-chkp.c (.../branches/gcc-6-branch)
+@@ -207,8 +207,14 @@
+ /* For functions with body versioning will make a copy of arguments.
+ For functions with no body we need to do it here. */
+ if (!gimple_has_body_p (fndecl))
+- DECL_ARGUMENTS (new_decl) = copy_list (DECL_ARGUMENTS (fndecl));
++ {
++ tree arg;
+
++ DECL_ARGUMENTS (new_decl) = copy_list (DECL_ARGUMENTS (fndecl));
++ for (arg = DECL_ARGUMENTS (new_decl); arg; arg = DECL_CHAIN (arg))
++ DECL_CONTEXT (arg) = new_decl;
++ }
++
+ /* We are going to modify attributes list and therefore should
+ make own copy. */
+ DECL_ATTRIBUTES (new_decl) = copy_list (DECL_ATTRIBUTES (fndecl));
+Index: gcc/tree-ssa-tail-merge.c
+===================================================================
+--- a/src/gcc/tree-ssa-tail-merge.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/tree-ssa-tail-merge.c (.../branches/gcc-6-branch)
+@@ -538,6 +538,9 @@
+ gimple *s1, *s2;
+ basic_block bb1, bb2;
+
++ if (e1 == e2)
++ return 1;
++
+ if (e1->hashval != e2->hashval)
+ return 0;
+
Index: gcc/tree-chkp.c
===================================================================
--- a/src/gcc/tree-chkp.c (.../tags/gcc_6_1_0_release)
@@ -2713,11 +4147,73 @@ Index: gcc/graphite-isl-ast-to-gimple.c
for (gphi_iterator psi = gsi_start_phis (bb); !gsi_end_p (psi);
gsi_next (&psi))
{
+Index: gcc/c-family/c-gimplify.c
+===================================================================
+--- a/src/gcc/c-family/c-gimplify.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/c-family/c-gimplify.c (.../branches/gcc-6-branch)
+@@ -67,17 +67,16 @@
+ {
+ hash_set<tree> *pset = (hash_set<tree> *) data;
+
+- /* Since walk_tree doesn't call the callback function on the decls
+- in BIND_EXPR_VARS, we have to walk them manually. */
+ if (TREE_CODE (*tp) == BIND_EXPR)
+ {
++ /* Since walk_tree doesn't call the callback function on the decls
++ in BIND_EXPR_VARS, we have to walk them manually, so we can avoid
++ instrumenting DECL_INITIAL of TREE_STATIC vars. */
++ *walk_subtrees = 0;
+ for (tree decl = BIND_EXPR_VARS (*tp); decl; decl = DECL_CHAIN (decl))
+ {
+ if (TREE_STATIC (decl))
+- {
+- *walk_subtrees = 0;
+- continue;
+- }
++ continue;
+ walk_tree (&DECL_INITIAL (decl), ubsan_walk_array_refs_r, pset,
+ pset);
+ walk_tree (&DECL_SIZE (decl), ubsan_walk_array_refs_r, pset, pset);
+@@ -84,6 +83,7 @@
+ walk_tree (&DECL_SIZE_UNIT (decl), ubsan_walk_array_refs_r, pset,
+ pset);
+ }
++ walk_tree (&BIND_EXPR_BODY (*tp), ubsan_walk_array_refs_r, pset, pset);
+ }
+ else if (TREE_CODE (*tp) == ADDR_EXPR
+ && TREE_CODE (TREE_OPERAND (*tp, 0)) == ARRAY_REF)
+Index: gcc/c-family/c.opt
+===================================================================
+--- a/src/gcc/c-family/c.opt (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/c-family/c.opt (.../branches/gcc-6-branch)
+@@ -265,7 +265,7 @@
+ Warn if a subobject has an abi_tag attribute that the complete object type does not have.
+
+ Wpsabi
+-C ObjC C++ ObjC++ LTO Var(warn_psabi) Init(1) Undocumented LangEnabledBy(C ObjC C++ ObjC++,Wabi)
++C ObjC C++ ObjC++ LTO Var(warn_psabi) Init(1) Warning Undocumented LangEnabledBy(C ObjC C++ ObjC++,Wabi)
+
+ Waddress
+ C ObjC C++ ObjC++ Var(warn_address) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall)
Index: gcc/c-family/ChangeLog
===================================================================
--- a/src/gcc/c-family/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/c-family/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,18 @@
+@@ -1,3 +1,32 @@
++2016-06-14 Jakub Jelinek <jakub at redhat.com>
++
++ Backported from mainline
++ 2016-06-10 Jakub Jelinek <jakub at redhat.com>
++
++ PR c/68657
++ * c.opt (Wpsabi): Add Warning flag.
++
++2016-06-13 Jakub Jelinek <jakub at redhat.com>
++
++ PR sanitizer/71498
++ * c-gimplify.c (ubsan_walk_array_refs_r): Set *walk_subtrees = 0 on
++ all BIND_EXPRs, and on all BIND_EXPRs recurse also on BIND_EXPR_BODY.
++
+2016-05-30 Jakub Jelinek <jakub at redhat.com>
+
+ PR c++/71349
@@ -2904,7 +4400,14 @@ Index: gcc/c/ChangeLog
===================================================================
--- a/src/gcc/c/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/c/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,28 @@
+@@ -1,3 +1,35 @@
++2016-06-10 Thomas Schwinge <thomas at codesourcery.com>
++
++ PR c/71381
++ Backport from trunk r237290:
++ * c-parser.c (c_parser_omp_variable_list) <OMP_CLAUSE__CACHE_>:
++ Loosen checking.
++
+2016-05-30 Jakub Jelinek <jakub at redhat.com>
+
+ PR c++/71349
@@ -3251,7 +4754,42 @@ Index: gcc/c/c-parser.c
expr.original_code = ERROR_MARK;
expr.original_type = NULL;
return expr;
-@@ -13822,6 +13822,8 @@
+@@ -10595,6 +10595,8 @@
+ switch (kind)
+ {
+ case OMP_CLAUSE__CACHE_:
++ /* The OpenACC cache directive explicitly only allows "array
++ elements or subarrays". */
+ if (c_parser_peek_token (parser)->type != CPP_OPEN_SQUARE)
+ {
+ c_parser_error (parser, "expected %<[%>");
+@@ -10657,25 +10659,6 @@
+ break;
+ }
+
+- if (kind == OMP_CLAUSE__CACHE_)
+- {
+- if (TREE_CODE (low_bound) != INTEGER_CST
+- && !TREE_READONLY (low_bound))
+- {
+- error_at (clause_loc,
+- "%qD is not a constant", low_bound);
+- t = error_mark_node;
+- }
+-
+- if (TREE_CODE (length) != INTEGER_CST
+- && !TREE_READONLY (length))
+- {
+- error_at (clause_loc,
+- "%qD is not a constant", length);
+- t = error_mark_node;
+- }
+- }
+-
+ t = tree_cons (low_bound, length, t);
+ }
+ break;
+@@ -13822,6 +13805,8 @@
c_parser_oacc_loop (location_t loc, c_parser *parser, char *p_name,
omp_clause_mask mask, tree *cclauses, bool *if_p)
{
@@ -3260,7 +4798,7 @@ Index: gcc/c/c-parser.c
strcat (p_name, " loop");
mask |= OACC_LOOP_CLAUSE_MASK;
-@@ -13829,7 +13831,7 @@
+@@ -13829,7 +13814,7 @@
cclauses == NULL);
if (cclauses)
{
@@ -3269,7 +4807,7 @@ Index: gcc/c/c-parser.c
if (*cclauses)
*cclauses = c_finish_omp_clauses (*cclauses, false);
if (clauses)
-@@ -13924,8 +13926,6 @@
+@@ -13924,8 +13909,6 @@
if (strcmp (p, "loop") == 0)
{
c_parser_consume_token (parser);
@@ -3278,7 +4816,7 @@ Index: gcc/c/c-parser.c
tree block = c_begin_omp_parallel ();
tree clauses;
c_parser_oacc_loop (loc, parser, p_name, mask, &clauses, if_p);
-@@ -15094,7 +15094,9 @@
+@@ -15094,7 +15077,9 @@
strcat (p_name, " for");
mask |= OMP_FOR_CLAUSE_MASK;
@@ -3360,7 +4898,7 @@ Index: gcc/DATESTAMP
+++ b/src/gcc/DATESTAMP (.../branches/gcc-6-branch)
@@ -1 +1 @@
-20160427
-+20160609
++20160620
Index: gcc/tree.h
===================================================================
--- a/src/gcc/tree.h (.../tags/gcc_6_1_0_release)
@@ -3622,7 +5160,30 @@ Index: gcc/fold-const.c
ll_unsignedp || rl_unsignedp, ll_reversep);
ll_mask = const_binop (BIT_IOR_EXPR, ll_mask, rl_mask);
-@@ -11631,9 +11640,9 @@
+@@ -8566,9 +8575,9 @@
+ if ((offset0 == offset1
+ || (offset0 && offset1
+ && operand_equal_p (offset0, offset1, 0)))
+- && (code == EQ_EXPR
+- || code == NE_EXPR
+- || (indirect_base0 && DECL_P (base0))
++ && (equality_code
++ || (indirect_base0
++ && (DECL_P (base0) || CONSTANT_CLASS_P (base0)))
+ || POINTER_TYPE_OVERFLOW_UNDEFINED))
+
+ {
+@@ -8607,7 +8616,8 @@
+ 6.5.6/8 and /9 with respect to the signed ptrdiff_t. */
+ else if (bitpos0 == bitpos1
+ && (equality_code
+- || (indirect_base0 && DECL_P (base0))
++ || (indirect_base0
++ && (DECL_P (base0) || CONSTANT_CLASS_P (base0)))
+ || POINTER_TYPE_OVERFLOW_UNDEFINED))
+ {
+ /* By converting to signed sizetype we cover middle-end pointer
+@@ -11631,9 +11641,9 @@
/* Convert A ? 0 : 1 to !A. This prefers the use of NOT_EXPR
over COND_EXPR in cases such as floating point comparisons. */
if (integer_zerop (op1)
@@ -3635,7 +5196,7 @@ Index: gcc/fold-const.c
&& truth_value_p (TREE_CODE (arg0)))
return pedantic_non_lvalue_loc (loc,
fold_convert_loc (loc, type,
-@@ -12305,7 +12314,8 @@
+@@ -12305,7 +12315,8 @@
|| TYPE_REFERENCE_TO (expr)
|| TYPE_CACHED_VALUES_P (expr)
|| TYPE_CONTAINS_PLACEHOLDER_INTERNAL (expr)
@@ -3645,7 +5206,7 @@ Index: gcc/fold-const.c
{
/* Allow these fields to be modified. */
tree tmp;
-@@ -12315,6 +12325,7 @@
+@@ -12315,6 +12326,7 @@
TYPE_POINTER_TO (tmp) = NULL;
TYPE_REFERENCE_TO (tmp) = NULL;
TYPE_NEXT_VARIANT (tmp) = NULL;
@@ -3653,7 +5214,7 @@ Index: gcc/fold-const.c
if (TYPE_CACHED_VALUES_P (tmp))
{
TYPE_CACHED_VALUES_P (tmp) = 0;
-@@ -13549,6 +13560,9 @@
+@@ -13549,6 +13561,9 @@
if (!DECL_P (base))
base = get_base_address (base);
@@ -3667,7 +5228,47 @@ Index: gcc/omp-low.c
===================================================================
--- a/src/gcc/omp-low.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/omp-low.c (.../branches/gcc-6-branch)
-@@ -13680,6 +13680,9 @@
+@@ -2186,7 +2186,6 @@
+ case OMP_CLAUSE_GANG:
+ case OMP_CLAUSE_WORKER:
+ case OMP_CLAUSE_VECTOR:
+- case OMP_CLAUSE_TILE:
+ case OMP_CLAUSE_INDEPENDENT:
+ case OMP_CLAUSE_AUTO:
+ case OMP_CLAUSE_SEQ:
+@@ -2200,10 +2199,8 @@
+ break;
+
+ case OMP_CLAUSE_DEVICE_RESIDENT:
++ case OMP_CLAUSE_TILE:
+ case OMP_CLAUSE__CACHE_:
+- sorry ("Clause not supported yet");
+- break;
+-
+ default:
+ gcc_unreachable ();
+ }
+@@ -2360,7 +2357,6 @@
+ case OMP_CLAUSE_GANG:
+ case OMP_CLAUSE_WORKER:
+ case OMP_CLAUSE_VECTOR:
+- case OMP_CLAUSE_TILE:
+ case OMP_CLAUSE_INDEPENDENT:
+ case OMP_CLAUSE_AUTO:
+ case OMP_CLAUSE_SEQ:
+@@ -2368,10 +2364,8 @@
+ break;
+
+ case OMP_CLAUSE_DEVICE_RESIDENT:
++ case OMP_CLAUSE_TILE:
+ case OMP_CLAUSE__CACHE_:
+- sorry ("Clause not supported yet");
+- break;
+-
+ default:
+ gcc_unreachable ();
+ }
+@@ -13680,6 +13674,9 @@
tree new_parm_decl = copy_node (DECL_ARGUMENTS (kern_fndecl));
DECL_CONTEXT (new_parm_decl) = kern_fndecl;
DECL_ARGUMENTS (kern_fndecl) = new_parm_decl;
@@ -3677,11 +5278,236 @@ Index: gcc/omp-low.c
struct function *kern_cfun = DECL_STRUCT_FUNCTION (kern_fndecl);
kern_cfun->curr_properties = cfun->curr_properties;
+Index: gcc/tree-ssa-sccvn.c
+===================================================================
+--- a/src/gcc/tree-ssa-sccvn.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/tree-ssa-sccvn.c (.../branches/gcc-6-branch)
+@@ -1976,11 +1976,7 @@
+ /* We need to pre-pend vr->operands[0..i] to rhs. */
+ vec<vn_reference_op_s> old = vr->operands;
+ if (i + 1 + rhs.length () > vr->operands.length ())
+- {
+- vr->operands.safe_grow (i + 1 + rhs.length ());
+- if (old == shared_lookup_references)
+- shared_lookup_references = vr->operands;
+- }
++ vr->operands.safe_grow (i + 1 + rhs.length ());
+ else
+ vr->operands.truncate (i + 1 + rhs.length ());
+ FOR_EACH_VEC_ELT (rhs, j, vro)
+@@ -2131,8 +2127,7 @@
+ {
+ vec<vn_reference_op_s> old = vr->operands;
+ vr->operands.safe_grow_cleared (2);
+- if (old == shared_lookup_references
+- && vr->operands != old)
++ if (old == shared_lookup_references)
+ shared_lookup_references = vr->operands;
+ }
+ else
Index: gcc/ChangeLog
===================================================================
--- a/src/gcc/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,1014 @@
+@@ -1,3 +1,1212 @@
++2016-06-20 Ilya Enkovich <ilya.enkovich at intel.com>
++
++ Backport from mainline r237484.
++ 2016-06-15 Ilya Enkovich <ilya.enkovich at intel.com>
++
++ PR middle-end/71529
++ * ipa-chkp.c (chkp_build_instrumented_fndecl): Fix
++ DECL_CONTEXT for copied arguments.
++
++2016-06-20 Georg-Johann Lay <avr at gjlay.de>
++ Pitchumani Sivanupandi <pitchumani.s at atmel.com>
++
++ Backport from 2016-06-20 trunk r237589, r236558.
++
++ PR target/71103
++ * config/avr/avr.md (movqi): Handle loading subreg:qi (const,
++ symbol_ref,label_ref).
++
++2016-06-16 Jakub Jelinek <jakub at redhat.com>
++
++ PR target/71554
++ * config/i386/i386.md (setcc + movzbl peephole2): Use reg_set_p.
++ (setcc + and peephole2): Likewise.
++
++2016-06-15 Andreas Tobler <andreast at gcc.gnu.org>
++
++ Backported from mainline
++ 2016-06-14 Andreas Tobler <andreast at gcc.gnu.org>
++
++ * config/arm/freebsd.h: Only enable unaligned access for armv6 on
++ FreeBSD 11 and above.
++
++2016-06-15 Ilya Verbin <ilya.verbin at intel.com>
++
++ Backport from mainline
++ 2016-04-30 Rainer Orth <ro at CeBiTec.Uni-Bielefeld.DE>
++
++ * config/darwin.h (LINK_COMMAND_SPEC_A): Handle -fcilkplus.
++
++2016-06-14 Jakub Jelinek <jakub at redhat.com>
++
++ Backported from mainline
++ 2016-06-10 Jakub Jelinek <jakub at redhat.com>
++
++ PR middle-end/71494
++ * tree-nested.c (convert_nonlocal_reference_stmt): For GIMPLE_GOTO
++ without LABEL_DECL, set *handled_ops_p to false instead of true.
++
++ 2016-06-08 Jakub Jelinek <jakub at redhat.com>
++ Richard Biener <rguenther at suse.de>
++
++ PR c++/71448
++ * fold-const.c (fold_comparison): Handle CONSTANT_CLASS_P (base0)
++ the same as DECL_P (base0) for indirect_base0. Use equality_code
++ in one further place.
++
++ 2016-06-04 Jakub Jelinek <jakub at redhat.com>
++
++ PR tree-optimization/71405
++ * tree-ssa.c (execute_update_addresses_taken): For clobber with
++ incompatible type, build a new clobber with the right type instead
++ of building a VIEW_CONVERT_EXPR around it.
++
++2016-06-13 Eric Botcazou <ebotcazou at adacore.com>
++
++ * tree-ssa-sccvn.c (vn_reference_lookup_3): Use a uniform test and
++ update shared_lookup_references only once after changing operands.
++
++2016-06-13 Richard Biener <rguenther at suse.de>
++
++ PR tree-optimization/71505
++ * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Make
++ assert match comment.
++
++2016-06-13 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-06-13 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ PR target/71379
++ * config/s390/s390.c (s390_expand_builtin): Increase MAX_ARGS by
++ one.
++
++2016-06-10 Thomas Schwinge <thomas at codesourcery.com>
++
++ PR middle-end/71373
++ Backport from trunk r237291:
++ * tree-nested.c (convert_nonlocal_omp_clauses)
++ (convert_local_omp_clauses): Handle OMP_CLAUSE_ASYNC,
++ OMP_CLAUSE_WAIT, OMP_CLAUSE_INDEPENDENT, OMP_CLAUSE_AUTO,
++ OMP_CLAUSE__CACHE_, OMP_CLAUSE_TILE.
++
++ Backport from trunk r237291:
++ * gimplify.c (gimplify_adjust_omp_clauses): Discard
++ OMP_CLAUSE_TILE.
++ * omp-low.c (scan_sharing_clauses): Don't expect OMP_CLAUSE_TILE.
++
++ Backport from trunk r237290:
++ * omp-low.c (scan_sharing_clauses): Don't expect
++ OMP_CLAUSE__CACHE_.
++
++ Backport trunk r235964:
++ 2016-05-06 Nathan Sidwell <nathan at codesourcery.com>
++
++ * gimple.c (gimple_call_same_target_p): Unique functions are eq.
++ * tree-ssa-tail-merge.c (same_succ::equal): Check pointer eq
++ equality first.
++
++2016-06-09 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ Back port from trunk
++ 2016-05-31 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ * config/rs6000/vsx.md (vsx_splat_<mode>, V2DI/V2DF): Simplify
++ alternatives, eliminating preferred register class. Add support
++ for the MTVSRDD instruction in ISA 3.0.
++ (vsx_splat_v4si_internal): Use splat_input_operand instead of
++ reg_or_indexed_operand.
++ (vsx_splat_v4sf_internal): Likewise.
++
++ Back port from trunk
++ 2016-05-31 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ PR target/71186
++ * config/rs6000/vsx.md (xxspltib_<mode>_nosplit): Add alternatives
++ for loading up all 0's or all 1's.
++
++ Back port from trunk
++ 2016-05-18 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ PR target/70915
++ * config/rs6000/constraints.md (wE constraint): New constraint
++ for a vector constant that can be loaded with XXSPLTIB.
++ (wM constraint): New constraint for a vector constant of a 1's.
++ (wS constraint): New constraint for a vector constant that can be
++ loaded with XXSPLTIB and a vector sign extend instruction.
++ * config/rs6000/predicates.md (xxspltib_constant_split): New
++ predicates for wE/wS constraints.
++ (xxspltib_constant_nosplit): Likewise.
++ (easy_vector_constant): Add support for constants that can be
++ loaded via XXSPLTIB.
++ (splat_input_operand): Add support for ISA 3.0 word splat operations.
++ * config/rs6000/rs6000.c (xxspltib_constant_p): New function to
++ return if a constant can be loaded with the ISA 3.0 XXSPLTIB
++ instruction and possibly with a sign extension.
++ (output_vec_const_move): Add support for XXSPLTIB. If we are
++ loading up 0/-1 into Altivec registers, prefer using VSPLTISW
++ instead of XXLXOR/XXLORC.
++ (rs6000_expand_vector_init): Add support for ISA 3.0 word splat
++ operations.
++ (rs6000_legitimize_reload_address): Likewise.
++ (rs6000_output_move_128bit): Use output_vec_const_move to emit
++ constants.
++ * config/rs6000/vsx.md (VSX_M): Add TImode (if -mvsx-timode) and
++ combine VSX_M and VSX_M2 into one iterator.
++ (VSX_M2): Likewise.
++ (VSINT_84): New iterators for loading constants with XXSPLTIB.
++ (VSINT_842): Likewise.
++ (UNSPEC_VSX_SIGN_EXTEND): New UNSPEC.
++ (xxspltib_v16qi): New insns to load up constants with the ISA 3.0
++ XXSPLTIB instruction.
++ (xxspltib_<mode>_nosplit): Likewise.
++ (xxspltib_<mode>_split): New insn to load up constants with
++ XXSPLTIB and a sign extend instruction.
++ (vsx_mov<mode>): Replace single move that handled all vector types
++ with separate 32-bit and 64-bit moves. Combine the movti_<bit>
++ moves (when -mvsx-timode is in effect) into the main vector
++ moves. Eliminate separate moves for <VSr> <VSa>, where the
++ preferred register class (<VSr>) is listed first, and the
++ secondary register class (<VSa>) is listed second with a '?' to
++ discourage use. Prefer loading 0/-1 in any VSX register for ISA
++ 3.0, and Altivec registers for ISA 2.06/2.07 (PR target/70915) so
++ that if the register was involved in a slow operation, the
++ clear/set operation does not wait for the slow operation to
++ finish. Adjust the length attributes for 32-bit mode. Use
++ rs6000_output_move_128bit and drop the use of the string
++ instructions for 32-bit movti when -mvsx-timode is in effect. Use
++ spacing so that the alternatives and attributes don't generate
++ long lines, and put things in columns, so that it is easier to
++ match up the operands and attributes with the insn alternatives.
++ (vsx_mov<mode>_64bit): Likewise.
++ (vsx_mov<mode>_32bit): Likewise.
++ (vsx_movti_64bit): Fold movti into normal vector moves.
++ (vsx_movti_32bit): Likewise.
++ (vsx_splat_<mode>, V4SI/V4SF modes): Add support for ISA 3.0 word
++ splat instructions.
++ (vsx_splat_v4si_internal): Likewise.
++ (vsx_splat_v4sf_internal): Likewise.
++ (vector fusion peepholes): Use VSX_M instead of VSX_M2.
++ (vsx_sign_extend_qi_<mode>): New ISA 3.0 instructions to sign
++ extend vector elements.
++ (vsx_sign_extend_hi_<mode>): Likewise.
++ (vsx_sign_extend_si_v2di): Likewise.
++ * config/rs6000/rs6000-protos.h (xxspltib_constant_p): Add
++ declaration.
++ * doc/md.texi (PowerPC constraints): Document the wE, wM, and wS
++ constraints. Add trailing period to wL documentation.
++
+2016-06-08 Jose E. Marchesi <jose.marchesi at oracle.com>
+
+ Backport from mainline
@@ -4696,7 +6522,7 @@ Index: gcc/ChangeLog
2016-04-27 Release Manager
* GCC 6.1.0 released.
-@@ -49,7 +1060,7 @@
+@@ -49,7 +1258,7 @@
constant boolean.
2016-04-20 Andrew Pinski <apinski at cavium.com>
@@ -4705,6 +6531,21 @@ Index: gcc/ChangeLog
PR target/64971
* config/aarch64/aarch64.md (sibcall): Force call
+Index: gcc/testsuite/gcc.target/powerpc/p9-splat-4.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++
++#include <altivec.h>
++
++vector long long foo (long long a) { return (vector long long) { a, a }; }
++
++/* { dg-final { scan-assembler "mtvsrdd" } } */
Index: gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c (.../tags/gcc_6_1_0_release)
@@ -4885,11 +6726,12 @@ Index: gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c (.../branches/gcc-6-branch)
-@@ -0,0 +1,229 @@
+@@ -0,0 +1,230 @@
+/* { dg-do compile { target { powerpc64-*-* } } } */
+/* { dg-skip-if "do not override mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O0" } */
-+/* { dg-require-effective-target p9vector_hw } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */
+/* { dg-final { scan-assembler-times "lxvx" 40 } } */
+/* { dg-final { scan-assembler-times "stxvx" 40 } } */
+
@@ -5771,6 +7613,19 @@ Index: gcc/testsuite/gcc.target/powerpc/ctz-4.c
+/* { dg-final { scan-assembler "vctzw" } } */
+/* { dg-final { scan-assembler-not "cnttzd" } } */
+/* { dg-final { scan-assembler-not "cnttzw" } } */
+Index: gcc/testsuite/gcc.target/powerpc/pr47755.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr47755.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr47755.c (.../branches/gcc-6-branch)
+@@ -3,7 +3,7 @@
+ /* { dg-require-effective-target powerpc_vsx_ok } */
+ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+ /* { dg-options "-O3 -mcpu=power7" } */
+-/* { dg-final { scan-assembler "xxlxor" } } */
++/* { dg-final { scan-assembler "xxlxor\|vspltis\[bhw\]" } } */
+ /* { dg-final { scan-assembler-not "lxvd2x" } } */
+ /* { dg-final { scan-assembler-not "lxvw4x" } } */
+ /* { dg-final { scan-assembler-not "lvx" } } */
Index: gcc/testsuite/gcc.target/powerpc/pr68805.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/powerpc/pr68805.c (.../tags/gcc_6_1_0_release)
@@ -5783,6 +7638,43 @@ Index: gcc/testsuite/gcc.target/powerpc/pr68805.c
typedef struct bar {
void *a;
+Index: gcc/testsuite/gcc.target/powerpc/pr71186.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr71186.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr71186.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,32 @@
++/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++
++static unsigned short x[(16384/sizeof(unsigned short))] __attribute__ ((aligned (16)));
++static unsigned short y[(16384/sizeof(unsigned short))] __attribute__ ((aligned (16)));
++static unsigned short a;
++
++void obfuscate(void *a, ...);
++
++static void __attribute__((noinline)) do_one(void)
++{
++ unsigned long i;
++
++ obfuscate(x, y, &a);
++
++ for (i = 0; i < (16384/sizeof(unsigned short)); i++)
++ y[i] = a * x[i];
++
++ obfuscate(x, y, &a);
++}
++
++int main(void)
++{
++ unsigned long i;
++
++ for (i = 0; i < 1000000; i++)
++ do_one();
++
++ return 0;
++}
Index: gcc/testsuite/gcc.target/powerpc/p9-permute.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/powerpc/p9-permute.c (.../tags/gcc_6_1_0_release)
@@ -5800,6 +7692,38 @@ Index: gcc/testsuite/gcc.target/powerpc/p9-permute.c
+/* expect xxpermr on little-endian, xxperm on big-endian */
/* { dg-final { scan-assembler "xxperm" } } */
/* { dg-final { scan-assembler-not "vperm" } } */
+Index: gcc/testsuite/gcc.target/powerpc/p9-splat-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,27 @@
++/* { dg-do compile { target { powerpc64le-*-* } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++
++#include <altivec.h>
++
++vector int
++foo_r (int a)
++{
++ return (vector int) { a, a, a, a }; /* mtvsrws */
++}
++
++vector int
++foo_r2 (int a)
++{
++ return vec_splats (a); /* mtvsrws */
++}
++
++vector int
++foo_p (int *a)
++{
++ return (vector int) { *a, *a, *a, *a }; /* lxvwsx */
++}
++
++/* { dg-final { scan-assembler-times "mtvsrws" 2 } } */
++/* { dg-final { scan-assembler-times "lxvwsx" 1 } } */
Index: gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c (.../tags/gcc_6_1_0_release)
@@ -5948,15 +7872,59 @@ Index: gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c
+{
+ vec_xst (vui, 0, uip);
+}
+Index: gcc/testsuite/gcc.target/powerpc/p9-splat-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,38 @@
++/* { dg-do compile { target { powerpc64le-*-* } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++
++#include <altivec.h>
++
++vector float
++foo_r (float a)
++{
++ return (vector float) { a, a, a, a }; /* xscvdpspn/xxspltw */
++}
++
++vector float
++foo_r2 (float a)
++{
++ return vec_splats (a); /* xscvdpspn/xxspltw */
++}
++
++vector float
++foo_g (float *a)
++{
++ float f = *a;
++
++ __asm__ (" # %0" : "+r" (f));
++ return (vector float) { f, f, f, f }; /* mtvsrws */
++}
++
++vector float
++foo_p (float *a)
++{
++ return (vector float) { *a, *a, *a, *a }; /* lxvwsx */
++}
++
++/* { dg-final { scan-assembler-times "xscvdpspn" 2 } } */
++/* { dg-final { scan-assembler-times "xxspltw" 2 } } */
++/* { dg-final { scan-assembler-times "mtvsrws" 1 } } */
++/* { dg-final { scan-assembler-times "lxvwsx" 1 } } */
Index: gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c (.../branches/gcc-6-branch)
-@@ -0,0 +1,235 @@
+@@ -0,0 +1,236 @@
+/* { dg-do compile { target { powerpc64le*-*-* } } } */
+/* { dg-skip-if "do not override mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O0" } */
-+/* { dg-require-effective-target p9vector_hw } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */
+/* { dg-final { scan-assembler-times "lxvd2x" 6 } } */
+/* { dg-final { scan-assembler-times "lxvw4x" 6 } } */
+/* { dg-final { scan-assembler-times "lxvh8x" 4 } } */
@@ -6231,6 +8199,72 @@ Index: gcc/testsuite/gcc.target/powerpc/darn-0.c
+}
+
+/* { dg-final { scan-assembler "darn" } } */
+Index: gcc/testsuite/gcc.target/powerpc/p9-splat-3.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,61 @@
++/* { dg-do compile { target { powerpc64le-*-* } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++
++#include <altivec.h>
++
++typedef vector signed char v16qi_t;
++typedef vector short v8hi_t;
++typedef vector int v4si_t;
++typedef vector long long v2di_t;
++
++void v16qi_0a (v16qi_t *p) { *p = (v16qi_t) { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; }
++void v8hi_0a (v8hi_t *p) { *p = (v8hi_t) { 0, 0, 0, 0, 0, 0, 0, 0 }; }
++void v4si_0a (v4si_t *p) { *p = (v4si_t) { 0, 0, 0, 0 }; }
++void v2di_0a (v2di_t *p) { *p = (v2di_t) { 0, 0 }; }
++
++void v16qi_0b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)0); }
++void v8hi_0b (v8hi_t *p) { *p = (v8hi_t) vec_splats ((short)0); }
++void v4si_0b (v4si_t *p) { *p = (v4si_t) vec_splats ((int)0); }
++void v2di_0b (v2di_t *p) { *p = (v2di_t) vec_splats ((long long)0); }
++
++void v16qi_m1a (v16qi_t *p) { *p = (v16qi_t) { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; }
++void v8hi_m1a (v8hi_t *p) { *p = (v8hi_t) { -1, -1, -1, -1, -1, -1, -1, -1 }; }
++void v4si_m1a (v4si_t *p) { *p = (v4si_t) { -1, -1, -1, -1 }; }
++void v2di_m1a (v2di_t *p) { *p = (v2di_t) { -1, -1 }; }
++
++void v16qi_m1b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)-1); }
++void v8hi_m1b (v8hi_t *p) { *p = (v8hi_t) vec_splats ((short)-1); }
++void v4si_m1b (v4si_t *p) { *p = (v4si_t) vec_splats ((int)-1); }
++void v2di_m1b (v2di_t *p) { *p = (v2di_t) vec_splats ((long long)-1); }
++
++void v16qi_5a (v16qi_t *p) { *p = (v16qi_t) { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }; }
++void v8hi_5a (v8hi_t *p) { *p = (v8hi_t) { 5, 5, 5, 5, 5, 5, 5, 5 }; }
++void v4si_5a (v4si_t *p) { *p = (v4si_t) { 5, 5, 5, 5 }; }
++void v2di_5a (v2di_t *p) { *p = (v2di_t) { 5, 5 }; }
++
++void v16qi_5b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)5); }
++void v8hi_5b (v8hi_t *p) { *p = (v8hi_t) vec_splats ((short)5); }
++void v4si_5b (v4si_t *p) { *p = (v4si_t) vec_splats ((int)5); }
++void v2di_5b (v2di_t *p) { *p = (v2di_t) vec_splats ((long long)5); }
++
++void v16qi_33a (v16qi_t *p) { *p = (v16qi_t) { 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33 }; }
++void v8hi_33a (v8hi_t *p) { *p = (v8hi_t) { 33, 33, 33, 33, 33, 33, 33, 33 }; }
++void v4si_33a (v4si_t *p) { *p = (v4si_t) { 33, 33, 33, 33 }; }
++void v2di_33a (v2di_t *p) { *p = (v2di_t) { 33, 33 }; }
++
++void v16qi_33b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)33); }
++void v8hi_33b (v8hi_t *p) { *p = (v8hi_t) vec_splats ((short)33); }
++void v4si_33b (v4si_t *p) { *p = (v4si_t) vec_splats ((int)33); }
++void v2di_33b (v2di_t *p) { *p = (v2di_t) vec_splats ((long long)33); }
++
++/* { dg-final { scan-assembler "xxspltib" } } */
++/* { dg-final { scan-assembler "vextsb2d" } } */
++/* { dg-final { scan-assembler "vextsb2w" } } */
++/* { dg-final { scan-assembler "vupk\[hl\]sb" } } */
++/* { dg-final { scan-assembler-not "lxvd2x" } } */
++/* { dg-final { scan-assembler-not "lxvw4x" } } */
++/* { dg-final { scan-assembler-not "lxv " } } */
++/* { dg-final { scan-assembler-not "lxvx" } } */
++/* { dg-final { scan-assembler-not "lvx" } } */
Index: gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c (.../tags/gcc_6_1_0_release)
@@ -6493,6 +8527,150 @@ Index: gcc/testsuite/gcc.target/arm/pr70830.c
+ prints("IRQ" );
+}
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" } } */
+Index: gcc/testsuite/gcc.target/avr/pr71103.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/avr/pr71103.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/avr/pr71103.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O1" } */
++
++struct ResponseStruct{
++ unsigned char responseLength;
++ char *response;
++};
++
++static char response[5];
++struct ResponseStruct something(){
++ struct ResponseStruct returnValue;
++ returnValue.responseLength = 5;
++ returnValue.response = response;
++ return returnValue;
++}
++
+Index: gcc/testsuite/gcc.target/avr/torture/pr71103-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,118 @@
++/* Use -g0 so that this test case doesn't just fail because
++ of PR52472. */
++
++/* { dg-do compile } */
++/* { dg-options "-std=gnu99 -g0" } */
++
++struct S12
++{
++ char c;
++ const char *p;
++};
++
++struct S12f
++{
++ char c;
++ struct S12f (*f)(void);
++};
++
++struct S12labl
++{
++ char c;
++ void **labl;
++};
++
++struct S121
++{
++ char c;
++ const char *p;
++ char d;
++};
++
++const char str[5] = "abcd";
++
++struct S12 test_S12_0 (void)
++{
++ struct S12 s;
++ s.c = 'A';
++ s.p = str;
++ return s;
++}
++
++struct S12 test_S12_4 (void)
++{
++ struct S12 s;
++ s.c = 'A';
++ s.p = str + 4;
++ return s;
++}
++
++struct S12f test_S12f (void)
++{
++ struct S12f s;
++ s.c = 'A';
++ s.f = test_S12f;
++ return s;
++}
++
++struct S121 test_S121 (void)
++{
++ struct S121 s;
++ s.c = 'c';
++ s.p = str + 4;
++ s.d = 'd';
++ return s;
++}
++
++extern void use_S12lab (struct S12labl*);
++
++struct S12labl test_S12lab (void)
++{
++ struct S12labl s;
++labl:;
++ s.c = 'A';
++ s.labl = &&labl;
++ return s;
++}
++
++#ifdef __MEMX
++
++struct S13
++{
++ char c;
++ const __memx char *p;
++};
++
++const __memx char str_x[] = "abcd";
++
++struct S13 test_S13_0 (void)
++{
++ struct S13 s;
++ s.c = 'A';
++ s.p = str_x;
++ return s;
++}
++
++struct S13 test_S13_4a (void)
++{
++ struct S13 s;
++ s.c = 'A';
++ s.p = str_x + 4;
++ return s;
++}
++
++#ifdef __FLASH1
++
++const __flash1 char str_1[] = "abcd";
++
++struct S13 test_13_4b (void)
++{
++ struct S13 s;
++ s.c = 'A';
++ s.p = str_1 + 4;
++ return s;
++}
++
++#endif /* have __flash1 */
++#endif /* have __memx */
++
Index: gcc/testsuite/gcc.target/sparc/fpcmpu.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/sparc/fpcmpu.c (.../tags/gcc_6_1_0_release)
@@ -6823,6 +9001,33 @@ Index: gcc/testsuite/gcc.target/i386/avx512f-floor-vec-1.c
+ if (r[i] != floor (a[i]))
+ abort();
+}
+Index: gcc/testsuite/gcc.target/i386/pr71529.C
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr71529.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr71529.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,22 @@
++/* PR71529 */
++/* { dg-do compile { target { ! x32 } } } */
++/* { dg-options "-fcheck-pointer-bounds -mmpx -O2" } */
++
++class c1
++{
++ public:
++ virtual ~c1 ();
++};
++
++class c2
++{
++ public:
++ virtual ~c2 ();
++};
++
++class c3 : c1, c2 { };
++
++int main (int, char **)
++{
++ c3 obj;
++}
Index: gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c (.../tags/gcc_6_1_0_release)
@@ -7628,6 +9833,26 @@ Index: gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-1.c
+ if (r[i] != floorf (a[i]))
+ abort();
+}
+Index: gcc/testsuite/gcc.target/i386/pr68657.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr68657.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr68657.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,15 @@
++/* PR c/68657 */
++/* { dg-options "-mno-avx512f -Werror=psabi" } */
++
++typedef int V __attribute__((vector_size (64)));
++
++void foo (V x, V *y) { /* { dg-error "AVX512F vector argument without AVX512F enabled" } */
++ *y = x;
++}
++
++V bar (V *x) { /* { dg-error "AVX512F vector return without AVX512F enabled" } */
++ return *x;
++}
++
++/* { dg-message "The ABI for passing parameters with 64-byte alignment has changed" "" { target *-*-* } 6 } */
++/* { dg-message "some warnings being treated as errors" "" { target *-*-* } 0 } */
Index: gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c (.../tags/gcc_6_1_0_release)
@@ -7965,6 +10190,84 @@ Index: gcc/testsuite/gfortran.dg/gomp/order-2.f90
+ !$omp declare simd (f5) notinbranch ! { dg-error "Unexpected" }
+ end function f5
+end subroutine f1
+Index: gcc/testsuite/gfortran.dg/goacc/subroutines.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/subroutines.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/subroutines.f90 (.../branches/gcc-6-branch)
+@@ -1,73 +0,0 @@
+-! Exercise how tree-nested.c handles gang, worker vector and seq.
+-
+-! { dg-do compile }
+-
+-program main
+- integer, parameter :: N = 100
+- integer :: nonlocal_arg
+- integer :: nonlocal_a(N)
+- integer :: nonlocal_i
+- integer :: nonlocal_j
+-
+- nonlocal_a (:) = 5
+- nonlocal_arg = 5
+-
+- call local ()
+- call nonlocal ()
+-
+-contains
+-
+- subroutine local ()
+- integer :: local_i
+- integer :: local_arg
+- integer :: local_a(N)
+- integer :: local_j
+-
+- local_a (:) = 5
+- local_arg = 5
+-
+- !$acc kernels loop gang(num:local_arg) worker(local_arg) vector(local_arg)
+- do local_i = 1, N
+- local_a(local_i) = 100
+- !$acc loop seq
+- do local_j = 1, N
+- enddo
+- enddo
+- !$acc end kernels loop
+-
+- !$acc kernels loop gang(static:local_arg) worker(local_arg) &
+- !$acc vector(local_arg)
+- do local_i = 1, N
+- local_a(local_i) = 100
+- !$acc loop seq
+- do local_j = 1, N
+- enddo
+- enddo
+- !$acc end kernels loop
+- end subroutine local
+-
+- subroutine nonlocal ()
+- nonlocal_a (:) = 5
+- nonlocal_arg = 5
+-
+- !$acc kernels loop gang(num:nonlocal_arg) worker(nonlocal_arg) &
+- !$acc vector(nonlocal_arg)
+- do nonlocal_i = 1, N
+- nonlocal_a(nonlocal_i) = 100
+- !$acc loop seq
+- do nonlocal_j = 1, N
+- enddo
+- enddo
+- !$acc end kernels loop
+-
+- !$acc kernels loop gang(static:nonlocal_arg) worker(nonlocal_arg) &
+- !$acc vector(nonlocal_arg)
+- do nonlocal_i = 1, N
+- nonlocal_a(nonlocal_i) = 100
+- !$acc loop seq
+- do nonlocal_j = 1, N
+- enddo
+- enddo
+- !$acc end kernels loop
+- end subroutine nonlocal
+-end program main
Index: gcc/testsuite/gfortran.dg/goacc/reduction-2.f95
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/goacc/reduction-2.f95 (.../tags/gcc_6_1_0_release)
@@ -7978,6 +10281,673 @@ Index: gcc/testsuite/gfortran.dg/goacc/reduction-2.f95
! { dg-final { scan-tree-dump-times "acc loop private.p. reduction..:a." 1 "gimple" } }
! { dg-final { scan-tree-dump-times "target oacc_kernels map.force_tofrom:a .len: 4.." 1 "gimple" } }
! { dg-final { scan-tree-dump-times "acc loop private.k. reduction..:a." 1 "gimple" } }
+Index: gcc/testsuite/gfortran.dg/goacc/cray-2.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/cray-2.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/cray-2.f95 (.../branches/gcc-6-branch)
+@@ -0,0 +1,56 @@
++! { dg-additional-options "-fcray-pointer" }
++! See also cray.f95.
++
++program test
++ call oacc1
++contains
++ subroutine oacc1
++ implicit none
++ integer :: i
++ real :: pointee
++ pointer (ptr, pointee)
++ !$acc declare device_resident (pointee)
++ !$acc declare device_resident (ptr)
++ !$acc data copy (pointee) ! { dg-error "Cray pointee" }
++ !$acc end data
++ !$acc data deviceptr (pointee) ! { dg-error "Cray pointee" }
++ !$acc end data
++ !$acc parallel private (pointee) ! { dg-error "Cray pointee" }
++ !$acc end parallel
++ !$acc host_data use_device (pointee) ! { dg-error "Cray pointee" }
++ !$acc end host_data
++ !$acc parallel loop reduction(+:pointee) ! { dg-error "Cray pointee" }
++ do i = 1,5
++ enddo
++ !$acc end parallel loop
++ !$acc parallel loop
++ do i = 1,5
++ !$acc cache (pointee) ! { dg-error "Cray pointee" }
++ enddo
++ !$acc end parallel loop
++ !$acc update device (pointee) ! { dg-error "Cray pointee" }
++ !$acc update host (pointee) ! { dg-error "Cray pointee" }
++ !$acc update self (pointee) ! { dg-error "Cray pointee" }
++ !$acc data copy (ptr)
++ !$acc end data
++ !$acc data deviceptr (ptr) ! { dg-error "Cray pointer" }
++ !$acc end data
++ !$acc parallel private (ptr)
++ !$acc end parallel
++ !$acc host_data use_device (ptr) ! { dg-error "Cray pointer" }
++ !$acc end host_data
++ !$acc parallel loop reduction(+:ptr) ! { dg-error "Cray pointer" }
++ do i = 1,5
++ enddo
++ !$acc end parallel loop
++ !$acc parallel loop
++ do i = 1,5
++ !TODO: This must fail, as in openacc-1_0-branch.
++ !$acc cache (ptr) ! { dg-error "" "TODO" { xfail *-*-* } }
++ enddo
++ !$acc end parallel loop
++ !$acc update device (ptr)
++ !$acc update host (ptr)
++ !$acc update self (ptr)
++ end subroutine oacc1
++end program test
+Index: gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,93 @@
++! Exercise nested function decomposition, gcc/tree-nested.c.
++! See gcc/testsuite/gcc.dg/goacc/nested-function-1.c for the C version.
++
++program main
++ integer, parameter :: N = 100
++ integer :: nonlocal_arg
++ integer :: nonlocal_a(N)
++ integer :: nonlocal_i
++ integer :: nonlocal_j
++
++ nonlocal_a (:) = 5
++ nonlocal_arg = 5
++
++ call local ()
++ call nonlocal ()
++
++contains
++
++ subroutine local ()
++ integer :: local_i
++ integer :: local_arg
++ integer :: local_a(N)
++ integer :: local_j
++
++ local_a (:) = 5
++ local_arg = 5
++
++ !$acc kernels loop &
++ !$acc gang(num:local_arg) worker(local_arg) vector(local_arg) &
++ !$acc wait async(local_arg)
++ do local_i = 1, N
++ !$acc cache (local_a(local_i:local_i + 5))
++ local_a(local_i) = 100
++ !$acc loop seq tile(*)
++ do local_j = 1, N
++ enddo
++ !$acc loop auto independent tile(1)
++ do local_j = 1, N
++ enddo
++ enddo
++ !$acc end kernels loop
++
++ !$acc kernels loop &
++ !$acc gang(static:local_arg) worker(local_arg) vector(local_arg) &
++ !$acc wait(local_arg, local_arg + 1, local_arg + 2) async
++ do local_i = 1, N
++ !$acc cache (local_a(local_i:local_i + 4))
++ local_a(local_i) = 100
++ !$acc loop seq tile(1)
++ do local_j = 1, N
++ enddo
++ !$acc loop auto independent tile(*)
++ do local_j = 1, N
++ enddo
++ enddo
++ !$acc end kernels loop
++ end subroutine local
++
++ subroutine nonlocal ()
++ nonlocal_a (:) = 5
++ nonlocal_arg = 5
++
++ !$acc kernels loop &
++ !$acc gang(num:nonlocal_arg) worker(nonlocal_arg) vector(nonlocal_arg) &
++ !$acc wait async(nonlocal_arg)
++ do nonlocal_i = 1, N
++ !$acc cache (nonlocal_a(nonlocal_i:nonlocal_i + 3))
++ nonlocal_a(nonlocal_i) = 100
++ !$acc loop seq tile(2)
++ do nonlocal_j = 1, N
++ enddo
++ !$acc loop auto independent tile(3)
++ do nonlocal_j = 1, N
++ enddo
++ enddo
++ !$acc end kernels loop
++
++ !$acc kernels loop &
++ !$acc gang(static:nonlocal_arg) worker(nonlocal_arg) vector(nonlocal_arg) &
++ !$acc wait(nonlocal_arg, nonlocal_arg + 1, nonlocal_arg + 2) async
++ do nonlocal_i = 1, N
++ !$acc cache (nonlocal_a(nonlocal_i:nonlocal_i + 2))
++ nonlocal_a(nonlocal_i) = 100
++ !$acc loop seq tile(*)
++ do nonlocal_j = 1, N
++ enddo
++ !$acc loop auto independent tile(*)
++ do nonlocal_j = 1, N
++ enddo
++ enddo
++ !$acc end kernels loop
++ end subroutine nonlocal
++end program main
+Index: gcc/testsuite/gfortran.dg/goacc/loop-1-2.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/loop-1-2.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/loop-1-2.f95 (.../branches/gcc-6-branch)
+@@ -0,0 +1,176 @@
++! See also loop-1.f95.
++
++program test
++ call test1
++contains
++
++subroutine test1
++ integer :: i, j, k, b(10)
++ integer, dimension (30) :: a
++ double precision :: d
++ real :: r
++ i = 0
++ !$acc loop
++ do 100 ! { dg-error "cannot be a DO WHILE or DO without loop control" }
++ if (i .gt. 0) exit ! { dg-error "EXIT statement" }
++ 100 i = i + 1
++ i = 0
++ !$acc loop
++ do ! { dg-error "cannot be a DO WHILE or DO without loop control" }
++ if (i .gt. 0) exit ! { dg-error "EXIT statement" }
++ i = i + 1
++ end do
++ i = 0
++ !$acc loop
++ do 200 while (i .lt. 4) ! { dg-error "cannot be a DO WHILE or DO without loop control" }
++ 200 i = i + 1
++ !$acc loop
++ do while (i .lt. 8) ! { dg-error "cannot be a DO WHILE or DO without loop control" }
++ i = i + 1
++ end do
++ !$acc loop
++ do 300 d = 1, 30, 6
++ i = d
++ 300 a(i) = 1
++ ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 32 }
++ ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 32 }
++ !$acc loop
++ do d = 1, 30, 5
++ i = d
++ a(i) = 2
++ end do
++ ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 38 }
++ ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 38 }
++ !$acc loop
++ do i = 1, 30
++ if (i .eq. 16) exit ! { dg-error "EXIT statement" }
++ end do
++ !$acc loop
++ outer: do i = 1, 30
++ do j = 5, 10
++ if (i .eq. 6 .and. j .eq. 7) exit outer ! { dg-error "EXIT statement" }
++ end do
++ end do outer
++ last: do i = 1, 30
++ end do last
++
++ ! different types of loop are allowed
++ !$acc loop
++ do i = 1,10
++ end do
++ !$acc loop
++ do 400, i = 1,10
++400 a(i) = i
++
++ ! after loop directive must be loop
++ !$acc loop
++ a(1) = 1 ! { dg-error "Expected DO loop" }
++ do i = 1,10
++ enddo
++
++ ! combined directives may be used with/without end
++ !$acc parallel loop
++ do i = 1,10
++ enddo
++ !$acc parallel loop
++ do i = 1,10
++ enddo
++ !$acc end parallel loop
++ !$acc kernels loop
++ do i = 1,10
++ enddo
++ !$acc kernels loop
++ do i = 1,10
++ enddo
++ !$acc end kernels loop
++
++ !$acc kernels loop reduction(max:i)
++ do i = 1,10
++ enddo
++ !$acc kernels
++ !$acc loop reduction(max:i)
++ do i = 1,10
++ enddo
++ !$acc end kernels
++
++ !$acc parallel loop collapse(0) ! { dg-error "constant positive integer" }
++ do i = 1,10
++ enddo
++
++ !$acc parallel loop collapse(-1) ! { dg-error "constant positive integer" }
++ do i = 1,10
++ enddo
++
++ !$acc parallel loop collapse(i) ! { dg-error "Constant expression required" }
++ do i = 1,10
++ enddo
++
++ !$acc parallel loop collapse(4) ! { dg-error "not enough DO loops for collapsed" }
++ do i = 1, 3
++ do j = 4, 6
++ do k = 5, 7
++ a(i+j-k) = i + j + k
++ end do
++ end do
++ end do
++ !$acc parallel loop collapse(2)
++ do i = 1, 5, 2
++ do j = i + 1, 7, i ! { dg-error "collapsed loops don.t form rectangular iteration space" }
++ end do
++ end do
++ !$acc parallel loop collapse(2)
++ do i = 1, 3
++ do j = 4, 6
++ end do
++ end do
++ !$acc parallel loop collapse(2)
++ do i = 1, 3
++ do j = 4, 6
++ end do
++ k = 4
++ end do
++ !$acc parallel loop collapse(3-1)
++ do i = 1, 3
++ do j = 4, 6
++ end do
++ k = 4
++ end do
++ !$acc parallel loop collapse(1+1)
++ do i = 1, 3
++ do j = 4, 6
++ end do
++ k = 4
++ end do
++ !$acc parallel loop collapse(2)
++ do i = 1, 3
++ do ! { dg-error "cannot be a DO WHILE or DO without loop control" }
++ end do
++ end do
++ !$acc parallel loop collapse(2)
++ do i = 1, 3
++ do r = 4, 6
++ end do
++ ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 151 }
++ ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 151 }
++ end do
++
++ ! Both seq and independent are not allowed
++ !$acc loop independent seq ! { dg-error "SEQ conflicts with INDEPENDENT" }
++ do i = 1,10
++ enddo
++
++
++ !$acc cache (a(1:10)) ! { dg-error "ACC CACHE directive must be inside of loop" }
++
++ do i = 1,10
++ !$acc cache(a(i:i+1))
++ enddo
++
++ do i = 1,10
++ !$acc cache(a(i:i+1))
++ a(i) = i
++ !$acc cache(a(i+2:i+2+1))
++ enddo
++
++end subroutine test1
++end program test
+Index: gcc/testsuite/gfortran.dg/goacc/loop-1.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/loop-1.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/loop-1.f95 (.../branches/gcc-6-branch)
+@@ -1,8 +1,10 @@
++! See also loop-1-2.f95.
++
+ module test
+ implicit none
+ contains
+
+-subroutine test1
++subroutine test1
+ integer :: i, j, k, b(10)
+ integer, dimension (30) :: a
+ double precision :: d
+@@ -30,15 +32,15 @@
+ do 300 d = 1, 30, 6
+ i = d
+ 300 a(i) = 1
+- ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 30 }
+- ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 30 }
++ ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 32 }
++ ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 32 }
+ !$acc loop
+ do d = 1, 30, 5
+ i = d
+ a(i) = 2
+ end do
+- ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 36 }
+- ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 36 }
++ ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 38 }
++ ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 38 }
+ !$acc loop
+ do i = 1, 30
+ if (i .eq. 16) exit ! { dg-error "EXIT statement" }
+@@ -53,7 +55,7 @@
+ end do last
+
+ ! different types of loop are allowed
+- !$acc loop
++ !$acc loop
+ do i = 1,10
+ end do
+ !$acc loop
+@@ -65,8 +67,8 @@
+ a(1) = 1 ! { dg-error "Expected DO loop" }
+ do i = 1,10
+ enddo
+-
+- ! combined directives may be used with/without end
++
++ ! combined directives may be used with/without end
+ !$acc parallel loop
+ do i = 1,10
+ enddo
+@@ -82,11 +84,11 @@
+ enddo
+ !$acc end kernels loop
+
+- !$acc kernels loop reduction(max:i)
++ !$acc kernels loop reduction(max:i)
+ do i = 1,10
+ enddo
+- !$acc kernels
+- !$acc loop reduction(max:i)
++ !$acc kernels
++ !$acc loop reduction(max:i)
+ do i = 1,10
+ enddo
+ !$acc end kernels
+@@ -118,7 +120,7 @@
+ end do
+ !$acc parallel loop collapse(2)
+ do i = 1, 3
+- do j = 4, 6
++ do j = 4, 6
+ end do
+ end do
+ !$acc parallel loop collapse(2)
+@@ -148,8 +150,8 @@
+ do i = 1, 3
+ do r = 4, 6
+ end do
+- ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 149 }
+- ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 149 }
++ ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 151 }
++ ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 151 }
+ end do
+
+ ! Both seq and independent are not allowed
+@@ -158,15 +160,16 @@
+ enddo
+
+
+- !$acc cache (a) ! { dg-error "inside of loop" }
++ !$acc cache (a(1:10)) ! { dg-error "ACC CACHE directive must be inside of loop" }
+
+ do i = 1,10
+- !$acc cache(a)
++ !$acc cache(a(i:i+1))
+ enddo
+
+ do i = 1,10
++ !$acc cache(a(i:i+1))
+ a(i) = i
+- !$acc cache(a)
++ !$acc cache(a(i+2:i+2+1))
+ enddo
+
+ end subroutine test1
+Index: gcc/testsuite/gfortran.dg/goacc/loop-3-2.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/loop-3-2.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/loop-3-2.f95 (.../branches/gcc-6-branch)
+@@ -0,0 +1,58 @@
++! { dg-additional-options "-std=f2008" }
++! See also loop-3.f95.
++
++program test
++ call test1
++contains
++subroutine test1
++ implicit none
++ integer :: i, j
++
++ ! !$acc end loop not required by spec
++ !$acc loop
++ do i = 1,5
++ enddo
++ !$acc end loop ! { dg-warning "Redundant" }
++
++ !$acc loop
++ do i = 1,5
++ enddo
++ j = 1
++ !$acc end loop ! { dg-error "Unexpected" }
++
++ !$acc parallel
++ !$acc loop
++ do i = 1,5
++ enddo
++ !$acc end parallel
++ !$acc end loop ! { dg-error "Unexpected" }
++
++ ! OpenACC supports Fortran 2008 do concurrent statement
++ !$acc loop
++ do concurrent (i = 1:5)
++ end do
++
++ !$acc loop
++ outer_loop: do i = 1, 5
++ inner_loop: do j = 1,5
++ if (i .eq. j) cycle outer_loop
++ if (i .ne. j) exit outer_loop ! { dg-error "EXIT statement" }
++ end do inner_loop
++ end do outer_loop
++
++ outer_loop1: do i = 1, 5
++ !$acc loop
++ inner_loop1: do j = 1,5
++ if (i .eq. j) cycle outer_loop1 ! { dg-error "CYCLE statement" }
++ end do inner_loop1
++ end do outer_loop1
++
++ !$acc loop collapse(2)
++ outer_loop2: do i = 1, 5
++ inner_loop2: do j = 1,5
++ if (i .eq. j) cycle outer_loop2 ! { dg-error "CYCLE statement" }
++ if (i .ne. j) exit outer_loop2 ! { dg-error "EXIT statement" }
++ end do inner_loop2
++ end do outer_loop2
++end subroutine test1
++end program test
+Index: gcc/testsuite/gfortran.dg/goacc/loop-3.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/loop-3.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/loop-3.f95 (.../branches/gcc-6-branch)
+@@ -1,10 +1,10 @@
+-! { dg-do compile }
+ ! { dg-additional-options "-std=f2008" }
++! See also loop-3-2.f95.
+
+ subroutine test1
+ implicit none
+ integer :: i, j
+-
++
+ ! !$acc end loop not required by spec
+ !$acc loop
+ do i = 1,5
+@@ -23,7 +23,7 @@
+ enddo
+ !$acc end parallel
+ !$acc end loop ! { dg-error "Unexpected" }
+-
++
+ ! OpenACC supports Fortran 2008 do concurrent statement
+ !$acc loop
+ do concurrent (i = 1:5)
+@@ -35,7 +35,7 @@
+ if (i .eq. j) cycle outer_loop
+ if (i .ne. j) exit outer_loop ! { dg-error "EXIT statement" }
+ end do inner_loop
+- end do outer_loop
++ end do outer_loop
+
+ outer_loop1: do i = 1, 5
+ !$acc loop
+@@ -50,6 +50,5 @@
+ if (i .eq. j) cycle outer_loop2 ! { dg-error "CYCLE statement" }
+ if (i .ne. j) exit outer_loop2 ! { dg-error "EXIT statement" }
+ end do inner_loop2
+- end do outer_loop2
++ end do outer_loop2
+ end subroutine test1
+-
+Index: gcc/testsuite/gfortran.dg/goacc/cray.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/cray.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/cray.f95 (.../branches/gcc-6-branch)
+@@ -1,5 +1,5 @@
+-! { dg-do compile }
+ ! { dg-additional-options "-fcray-pointer" }
++! See also cray-2.f95.
+
+ module test
+ contains
+@@ -8,8 +8,8 @@
+ integer :: i
+ real :: pointee
+ pointer (ptr, pointee)
+- !$acc declare device_resident (pointee)
+- !$acc declare device_resident (ptr)
++ !$acc declare device_resident (pointee)
++ !$acc declare device_resident (ptr)
+ !$acc data copy (pointee) ! { dg-error "Cray pointee" }
+ !$acc end data
+ !$acc data deviceptr (pointee) ! { dg-error "Cray pointee" }
+@@ -44,7 +44,8 @@
+ !$acc end parallel loop
+ !$acc parallel loop
+ do i = 1,5
+- !$acc cache (ptr) ! TODO: This must fail, as in openacc-1_0-branch
++ !TODO: This must fail, as in openacc-1_0-branch.
++ !$acc cache (ptr) ! { dg-error "" "TODO" { xfail *-*-* } }
+ enddo
+ !$acc end parallel loop
+ !$acc update device (ptr)
+Index: gcc/testsuite/gfortran.dg/goacc/coarray.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/coarray.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/coarray.f95 (.../branches/gcc-6-branch)
+@@ -24,7 +24,7 @@
+ !$acc end parallel loop
+ !$acc parallel loop
+ do i = 1,5
+- !$acc cache (a)
++ !$acc cache (a) ! { dg-error "" "TODO" { xfail *-*-* } }
+ enddo
+ !$acc end parallel loop
+ !$acc update device (a)
+Index: gcc/testsuite/gfortran.dg/goacc/cache-1.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/cache-1.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/cache-1.f95 (.../branches/gcc-6-branch)
+@@ -1,4 +1,6 @@
+-! { dg-do compile }
++! OpenACC cache directive: valid usage.
++! For execution testing, this file is "#include"d from
++! libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95.
+ ! { dg-additional-options "-std=f2008" }
+
+ program test
+@@ -6,11 +8,8 @@
+ integer :: i, d(10), e(5,13)
+
+ do concurrent (i=1:5)
+- !$acc cache (d)
+ !$acc cache (d(1:3))
+ !$acc cache (d(i:i+2))
+-
+- !$acc cache (e)
+ !$acc cache (e(1:3,2:4))
+ !$acc cache (e(i:i+2,i+1:i+3))
+ enddo
+Index: gcc/testsuite/gfortran.dg/goacc/cache-2.f95
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/cache-2.f95 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/cache-2.f95 (.../branches/gcc-6-branch)
+@@ -0,0 +1,12 @@
++! OpenACC cache directive: invalid usage.
++! { dg-additional-options "-std=f2008" }
++
++program test
++ implicit none
++ integer :: i, d(10), e(5,13)
++
++ do concurrent (i=1:5)
++ !$acc cache (d) ! { dg-error "" "TODO" { xfail *-*-* } }
++ !$acc cache (e) ! { dg-error "" "TODO" { xfail *-*-* } }
++ enddo
++end
+Index: gcc/testsuite/gfortran.dg/goacc/combined-directives.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/goacc/combined-directives.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/goacc/combined-directives.f90 (.../branches/gcc-6-branch)
+@@ -143,7 +143,8 @@
+ ! { dg-final { scan-tree-dump-times "acc loop private.i. private.j. vector" 2 "gimple" } }
+ ! { dg-final { scan-tree-dump-times "acc loop private.i. private.j. seq" 2 "gimple" } }
+ ! { dg-final { scan-tree-dump-times "acc loop private.i. private.j. auto" 2 "gimple" } }
+-! { dg-final { scan-tree-dump-times "acc loop private.i. private.j. tile.2, 3" 2 "gimple" } }
++! XFAILed: OpenACC tile clauses are discarded during gimplification.
++! { dg-final { scan-tree-dump-times "acc loop private.i. private.j. tile.2, 3" 2 "gimple" { xfail *-*-* } } }
+ ! { dg-final { scan-tree-dump-times "acc loop private.i. independent" 2 "gimple" } }
+ ! { dg-final { scan-tree-dump-times "private.z" 2 "gimple" } }
+ ! { dg-final { scan-tree-dump-times "omp target oacc_\[^ \]+ map.force_tofrom:y" 2 "gimple" } }
+Index: gcc/testsuite/gfortran.dg/integer_exponentiation_6.F90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/integer_exponentiation_6.F90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/integer_exponentiation_6.F90 (.../branches/gcc-6-branch)
+@@ -1,4 +1,4 @@
+ ! { dg-options "-fno-range-check" }
+ program test
+- write (*), (2_8 ** 64009999_8) / 2
++ write (*,*) (2_8 ** 64009999_8) / 2
+ end program test
Index: gcc/testsuite/gfortran.dg/dec_union_4.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/dec_union_4.f90 (.../tags/gcc_6_1_0_release)
@@ -8216,6 +11186,33 @@ Index: gcc/testsuite/gfortran.dg/dec_structure_10.f90
+if ( j .ne. 1337 ) call abort()
+
+end
+Index: gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,9 @@
++! { dg-do compile }
++! { dg-options "-std=legacy" }
++! PR 60751
++! Contributed by Walter Spector <w6ws at earthlink.net>
++program extracomma
++ implicit none
++
++ write (*,*), 1, 2, 3
++end program
+Index: gcc/testsuite/gfortran.dg/graphite/pr38083.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/graphite/pr38083.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/graphite/pr38083.f90 (.../branches/gcc-6-branch)
+@@ -8,7 +8,7 @@
+ 10 IF (IL .GE. IH) GO TO 80
+ 20 NSEGS = (IH + IL) / 2
+ IF (NSEGS .GT. MAXSGS) THEN
+- WRITE (IOUNIT),MAXSGS
++ WRITE (IOUNIT) MAXSGS
+ ENDIF
+ 80 NSEGS = NSEGS - 1
+ 90 IF (IH - IL .GE. 11) GO TO 20
Index: gcc/testsuite/gfortran.dg/dec_structure_6.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/dec_structure_6.f90 (.../tags/gcc_6_1_0_release)
@@ -8276,6 +11273,19 @@ Index: gcc/testsuite/gfortran.dg/submodule_15.f08
if (a3(i) .ne. 11) call abort
end
+! { dg-final { cleanup-submodules "a at a_son" } }
+Index: gcc/testsuite/gfortran.dg/array_constructor_49.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_49.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_49.f90 (.../branches/gcc-6-branch)
+@@ -6,7 +6,7 @@
+ program t
+ integer :: ndim=2, ndfp=4, i
+ character (len=8) :: line
+- write (unit=line,fmt='(4I2)'), (/ ( i, i = 1, ndfp ) /) + ndim
++ write (unit=line,fmt='(4I2)') (/ ( i, i = 1, ndfp ) /) + ndim
+ if (line /= ' 3 4 5 6') call abort
+ end program t
+ ! { dg-final { scan-tree-dump-times "__var" 3 "original" } }
Index: gcc/testsuite/gfortran.dg/unexpected_eof.f
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/unexpected_eof.f (.../tags/gcc_6_1_0_release)
@@ -8464,6 +11474,19 @@ Index: gcc/testsuite/gfortran.dg/pr71047.f08
+!
+! { dg-final { scan-tree-dump "t_a\\.\\d+\\.f\\._vptr =" "original" } }
+!
+Index: gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,8 @@
++! { dg-do compile }
++! PR 60751
++! Contributed by Walter Spector <w6ws at earthlink.net>
++program extracomma
++ implicit none
++
++ write (*,*), 1, 2, 3 ! { dg-warning "Legacy Extension: Comma before i/o item list" }
++end program
Index: gcc/testsuite/gfortran.dg/dec_union_7.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/dec_union_7.f90 (.../tags/gcc_6_1_0_release)
@@ -8627,6 +11650,19 @@ Index: gcc/testsuite/gfortran.dg/dec_structure_9.f90
+l = .not. (3.14 .eq. r1.r)
+
+end
+Index: gcc/testsuite/gfortran.dg/guality/pr41558.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/guality/pr41558.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/guality/pr41558.f90 (.../branches/gcc-6-branch)
+@@ -5,7 +5,7 @@
+
+ subroutine f (s)
+ character(len=3) :: s
+- write (*,*), s ! { dg-final { gdb-test 7 "s" "'foo'" } }
++ write (*,*) s ! { dg-final { gdb-test 7 "s" "'foo'" } }
+ end
+ call f ('foo')
+ end
Index: gcc/testsuite/gfortran.dg/dec_union_2.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/dec_union_2.f90 (.../tags/gcc_6_1_0_release)
@@ -9258,6 +12294,66 @@ Index: gcc/testsuite/gfortran.dg/submodule_16.f08
+ recursive module subroutine f9
+ end subroutine
+end submodule
+Index: gcc/testsuite/gcc.c-torture/execute/pr71494.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.c-torture/execute/pr71494.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr71494.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,22 @@
++/* PR middle-end/71494 */
++
++int
++main ()
++{
++ void *label = &&out;
++ int i = 0;
++ void test (void)
++ {
++ label = &&out2;
++ goto *label;
++ out2:;
++ i++;
++ }
++ goto *label;
++ out:
++ i += 2;
++ test ();
++ if (i != 3)
++ __builtin_abort ();
++ return 0;
++}
+Index: gcc/testsuite/gcc.c-torture/execute/pr71554.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.c-torture/execute/pr71554.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr71554.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,28 @@
++/* PR target/71554 */
++
++int v;
++
++__attribute__ ((noinline, noclone)) void
++bar (void)
++{
++ v++;
++}
++
++__attribute__ ((noinline, noclone))
++void
++foo (unsigned int x)
++{
++ signed int y = ((-__INT_MAX__ - 1) / 2);
++ signed int r;
++ if (__builtin_mul_overflow (x, y, &r))
++ bar ();
++}
++
++int
++main ()
++{
++ foo (2);
++ if (v)
++ __builtin_abort ();
++ return 0;
++}
Index: gcc/testsuite/gcc.c-torture/compile/pr70916.c
===================================================================
--- a/src/gcc/testsuite/gcc.c-torture/compile/pr70916.c (.../tags/gcc_6_1_0_release)
@@ -9291,6 +12387,37 @@ Index: gcc/testsuite/gcc.c-torture/compile/pr70916.c
+ }
+ }
+}
+Index: gcc/testsuite/gnat.dg/renaming10.adb
+===================================================================
+--- a/src/gcc/testsuite/gnat.dg/renaming10.adb (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gnat.dg/renaming10.adb (.../branches/gcc-6-branch)
+@@ -0,0 +1,12 @@
++-- { dg-do compile }
++
++package body Renaming10 is
++
++ function F (Input : Rec) return Natural is
++ Position : Natural renames Input.Position;
++ Index : Natural renames Natural'Succ(Position);
++ begin
++ return Index;
++ end;
++
++end Renaming10;
+Index: gcc/testsuite/gnat.dg/renaming10.ads
+===================================================================
+--- a/src/gcc/testsuite/gnat.dg/renaming10.ads (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gnat.dg/renaming10.ads (.../branches/gcc-6-branch)
+@@ -0,0 +1,9 @@
++package Renaming10 is
++
++ type Rec is record
++ Position : Natural;
++ end record;
++
++ function F (Input : Rec) return Natural;
++
++end Renaming10;
Index: gcc/testsuite/gnat.dg/opt56.adb
===================================================================
--- a/src/gcc/testsuite/gnat.dg/opt56.adb (.../tags/gcc_6_1_0_release)
@@ -9323,6 +12450,30 @@ Index: gcc/testsuite/gnat.dg/opt56.ads
+ function F (Values : Vector) return Boolean;
+
+end Opt56;
+Index: gcc/testsuite/gnat.dg/case_character.adb
+===================================================================
+--- a/src/gcc/testsuite/gnat.dg/case_character.adb (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gnat.dg/case_character.adb (.../branches/gcc-6-branch)
+@@ -0,0 +1,19 @@
++-- { dg-do run }
++
++procedure Case_Character is
++
++ function Test (C : Character) return Integer is
++ begin
++ case C is
++ when ASCII.HT | ' ' .. Character'Last => return 1;
++ when others => return 0;
++ end case;
++ end;
++
++begin
++
++ if Test ('A') /= 1 then
++ raise Program_Error;
++ end if;
++
++end;
Index: gcc/testsuite/gnat.dg/debug5.adb
===================================================================
--- a/src/gcc/testsuite/gnat.dg/debug5.adb (.../tags/gcc_6_1_0_release)
@@ -9350,6 +12501,207 @@ Index: gcc/testsuite/gnat.dg/debug5.adb
+begin
+ Discard (R);
+end Debug5;
+Index: gcc/testsuite/gcc.dg/goacc/nested-function-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/goacc/nested-function-1.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.dg/goacc/nested-function-1.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,100 @@
++/* Exercise nested function decomposition, gcc/tree-nested.c. */
++/* See gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90 for the Fortran
++ version. */
++
++int main ()
++{
++#define N 100
++ int nonlocal_arg;
++ int nonlocal_a[N];
++ int nonlocal_i;
++ int nonlocal_j;
++
++ for (int i = 0; i < N; ++i)
++ nonlocal_a[i] = 5;
++ nonlocal_arg = 5;
++
++ void local ()
++ {
++ int local_i;
++ int local_arg;
++ int local_a[N];
++ int local_j;
++
++ for (int i = 0; i < N; ++i)
++ local_a[i] = 5;
++ local_arg = 5;
++
++#pragma acc kernels loop \
++ gang(num:local_arg) worker(local_arg) vector(local_arg) \
++ wait async(local_arg)
++ for (local_i = 0; local_i < N; ++local_i)
++ {
++#pragma acc cache (local_a[local_i:5])
++ local_a[local_i] = 100;
++#pragma acc loop seq tile(*)
++ for (local_j = 0; local_j < N; ++local_j)
++ ;
++#pragma acc loop auto independent tile(1)
++ for (local_j = 0; local_j < N; ++local_j)
++ ;
++ }
++
++#pragma acc kernels loop \
++ gang(static:local_arg) worker(local_arg) vector(local_arg) \
++ wait(local_arg, local_arg + 1, local_arg + 2) async
++ for (local_i = 0; local_i < N; ++local_i)
++ {
++#pragma acc cache (local_a[local_i:4])
++ local_a[local_i] = 100;
++#pragma acc loop seq tile(1)
++ for (local_j = 0; local_j < N; ++local_j)
++ ;
++#pragma acc loop auto independent tile(*)
++ for (local_j = 0; local_j < N; ++local_j)
++ ;
++ }
++ }
++
++ void nonlocal ()
++ {
++ for (int i = 0; i < N; ++i)
++ nonlocal_a[i] = 5;
++ nonlocal_arg = 5;
++
++#pragma acc kernels loop \
++ gang(num:nonlocal_arg) worker(nonlocal_arg) vector(nonlocal_arg) \
++ wait async(nonlocal_arg)
++ for (nonlocal_i = 0; nonlocal_i < N; ++nonlocal_i)
++ {
++#pragma acc cache (nonlocal_a[nonlocal_i:3])
++ nonlocal_a[nonlocal_i] = 100;
++#pragma acc loop seq tile(2)
++ for (nonlocal_j = 0; nonlocal_j < N; ++nonlocal_j)
++ ;
++#pragma acc loop auto independent tile(3)
++ for (nonlocal_j = 0; nonlocal_j < N; ++nonlocal_j)
++ ;
++ }
++
++#pragma acc kernels loop \
++ gang(static:nonlocal_arg) worker(nonlocal_arg) vector(nonlocal_arg) \
++ wait(nonlocal_arg, nonlocal_arg + 1, nonlocal_arg + 2) async
++ for (nonlocal_i = 0; nonlocal_i < N; ++nonlocal_i)
++ {
++#pragma acc cache (nonlocal_a[nonlocal_i:2])
++ nonlocal_a[nonlocal_i] = 100;
++#pragma acc loop seq tile(*)
++ for (nonlocal_j = 0; nonlocal_j < N; ++nonlocal_j)
++ ;
++#pragma acc loop auto independent tile(*)
++ for (nonlocal_j = 0; nonlocal_j < N; ++nonlocal_j)
++ ;
++ }
++ }
++
++ local ();
++ nonlocal ();
++
++ return 0;
++}
+Index: gcc/testsuite/gcc.dg/goacc/nested-function-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/goacc/nested-function-2.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.dg/goacc/nested-function-2.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,45 @@
++/* Exercise nested function decomposition, gcc/tree-nested.c. */
++
++int
++main (void)
++{
++ int j = 0, k = 6, l = 7, m = 8;
++ void simple (void)
++ {
++ int i;
++#pragma acc parallel
++ {
++#pragma acc loop
++ for (i = 0; i < m; i+= k)
++ j = (m + i - j) * l;
++ }
++ }
++ void collapse (void)
++ {
++ int x, y, z;
++#pragma acc parallel
++ {
++#pragma acc loop collapse (3)
++ for (x = 0; x < k; x++)
++ for (y = -5; y < l; y++)
++ for (z = 0; z < m; z++)
++ j += x + y + z;
++ }
++ }
++ void reduction (void)
++ {
++ int x, y, z;
++#pragma acc parallel reduction (+:j)
++ {
++#pragma acc loop reduction (+:j) collapse (3)
++ for (x = 0; x < k; x++)
++ for (y = -5; y < l; y++)
++ for (z = 0; z < m; z++)
++ j += x + y + z;
++ }
++ }
++ simple();
++ collapse();
++ reduction();
++ return 0;
++}
+Index: gcc/testsuite/gcc.dg/goacc/pr71373.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/goacc/pr71373.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.dg/goacc/pr71373.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,41 @@
++/* Unintentional nested function usage. */
++/* Due to missing right braces '}', the following functions are parsed as
++ nested functions. This ran into an ICE. */
++
++void foo (void)
++{
++ #pragma acc parallel
++ {
++ #pragma acc loop independent
++ for (int i = 0; i < 16; i++)
++ ;
++ // Note right brace '}' commented out here.
++ //}
++}
++void bar (void)
++{
++}
++
++// Adding right brace '}' here, to make this compile.
++}
++
++
++// ..., and the other way round:
++
++void BAR (void)
++{
++// Note right brace '}' commented out here.
++//}
++
++void FOO (void)
++{
++ #pragma acc parallel
++ {
++ #pragma acc loop independent
++ for (int i = 0; i < 16; i++)
++ ;
++ }
++}
++
++// Adding right brace '}' here, to make this compile.
++}
Index: gcc/testsuite/gcc.dg/ubsan/bounds-3.c
===================================================================
--- a/src/gcc/testsuite/gcc.dg/ubsan/bounds-3.c (.../tags/gcc_6_1_0_release)
@@ -9779,7 +13131,150 @@ Index: gcc/testsuite/ChangeLog
===================================================================
--- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,578 @@
+@@ -1,3 +1,721 @@
++2016-06-20 Ilya Enkovich <ilya.enkovich at intel.com>
++
++ Backport from mainline r237484.
++ 2016-06-15 Ilya Enkovich <ilya.enkovich at intel.com>
++
++ PR middle-end/71529
++ * gcc.target/i386/pr71529.C: New test.
++
++2016-06-20 Georg-Johann Lay <avr at gjlay.de>
++ Pitchumani Sivanupandi <pitchumani.s at atmel.com>
++
++ Backport from 2016-06-20 trunk r237589, r236558.
++
++ PR target/71103
++ * gcc.target/avr/pr71103.c: New test.
++ * gcc.target/avr/torture/pr71103-2.c: New test.
++
++2016-06-16 Bill Schmidt <wschmidt at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-06-14 Bill Schmidt <wschmidt at linux.vnet.ibm.com>
++ * gcc.target/powerpc/vsx-elemrev-2.c: Change effective target
++ requirements, and disable for AIX for now.
++ * gcc.target/powerpc/vsx-elemrev-4.c: Likewise.
++
++2016-06-16 Jakub Jelinek <jakub at redhat.com>
++
++ PR target/71554
++ * gcc.c-torture/execute/pr71554.c: New test.
++
++2016-06-14 Paolo Carlini <paolo.carlini at oracle.com>
++
++ PR c++/70572
++ * g++.dg/cpp1y/auto-fn31.C: New.
++
++2016-06-14 Jakub Jelinek <jakub at redhat.com>
++
++ PR c++/71516
++ * g++.dg/init/pr71516.C: New test.
++
++ Backported from mainline
++ 2016-06-10 Jakub Jelinek <jakub at redhat.com>
++
++ PR middle-end/71494
++ * gcc.c-torture/execute/pr71494.c: New test.
++
++ PR c/68657
++ * gcc.target/i386/pr68657.c: New test.
++
++ 2016-06-08 Jakub Jelinek <jakub at redhat.com>
++
++ PR c++/71448
++ * g++.dg/torture/pr71448.C: New test.
++
++ 2016-06-04 Jakub Jelinek <jakub at redhat.com>
++
++ PR tree-optimization/71405
++ * g++.dg/torture/pr71405.C: New test.
++
++2016-06-13 Jakub Jelinek <jakub at redhat.com>
++
++ PR sanitizer/71498
++ * c-c++-common/ubsan/bounds-13.c: New test.
++
++2016-06-13 Eric Botcazou <ebotcazou at adacore.com>
++
++ * gnat.dg/renaming10.ad[sb]: New test.
++
++2016-06-12 Dominique d'Humieres <dominiq at lps.ens.fr>
++
++ PR target/60751
++ * gfortran.dg/comma_IO_extension_1.f90: New test.
++ * gfortran.dg/comma_IO_extension_2.f90: Likewise.
++ * gfortran.dg/array_constructor_49.f90: Remove extra comma in WRITE
++ statement.
++ * gfortran.dg/graphite/pr38083.f90: Likewise.
++ * gfortran.dg/guality/pr41558.f90: Likewise.
++ * gfortran.dg/integer_exponentiation_6.F90: Likewise and add
++ missing format.
++
++2016-06-11 Eric Botcazou <ebotcazou at adacore.com>
++
++ * gnat.dg/case_character.adb: New test.
++
++2016-06-10 Thomas Schwinge <thomas at codesourcery.com>
++
++ PR middle-end/71373
++ Backport from trunk r237291:
++ 2016-06-10 Thomas Schwinge <thomas at codesourcery.com>
++ Cesar Philippidis <cesar at codesourcery.com>
++
++ * gcc.dg/goacc/nested-function-1.c: New file.
++ * gcc.dg/goacc/nested-function-2.c: Likewise.
++ * gcc.dg/goacc/pr71373.c: Likewise.
++ * gfortran.dg/goacc/cray-2.f95: Likewise.
++ * gfortran.dg/goacc/loop-1-2.f95: Likewise.
++ * gfortran.dg/goacc/loop-3-2.f95: Likewise.
++ * gfortran.dg/goacc/cray.f95: Update.
++ * gfortran.dg/goacc/loop-1.f95: Likewise.
++ * gfortran.dg/goacc/loop-3.f95: Likewise.
++ * gfortran.dg/goacc/subroutines.f90: Update, and rename to...
++ * gfortran.dg/goacc/nested-function-1.f90: ... this new file.
++
++ Backport from trunk r237291:
++ * c-c++-common/goacc/combined-directives.c: XFAIL tree scanning
++ for OpenACC tile clauses.
++ * gfortran.dg/goacc/combined-directives.f90: Likewise.
++
++ PR c/71381
++ Backport from trunk r237290:
++ * c-c++-common/goacc/cache-1.c: Update. Move invalid usage tests
++ to...
++ * c-c++-common/goacc/cache-2.c: ... this new file.
++ * gfortran.dg/goacc/cache-1.f95: Move invalid usage tests to...
++ * gfortran.dg/goacc/cache-2.f95: ... this new file.
++ * gfortran.dg/goacc/coarray.f95: Update OpenACC cache directive
++ usage.
++ * gfortran.dg/goacc/cray.f95: Likewise.
++ * gfortran.dg/goacc/loop-1.f95: Likewise.
++
++2016-06-09 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ Back port from trunk
++ 2016-05-31 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ * gcc.target/powerpc/p9-splat-4.c: New test.
++
++ Back port from trunk
++ 2016-05-31 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ PR target/71186
++ * gcc.target/powerpc/pr71186.c: New test.
++
++ Back port from trunk
++ 2016-05-18 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ * gcc.target/powerpc/p9-splat-1.c: New tests for ISA 3.0 word
++ splat operations and the XXSPLTIB instruction.
++ * gcc.target/powerpc/p9-splat-2.c: Likewise.
++ * gcc.target/powerpc/p9-splat-3.c: Likewise.
++ * gcc.target/powerpc/pr47755.c: Allow vspltisw in addition to
++ xxlxor to clear a register.
++
+2016-06-08 Jakub Jelinek <jakub at redhat.com>
+
+ PR c++/71442
@@ -10932,6 +14427,65 @@ Index: gcc/testsuite/g++.dg/torture/pr71002.C
+ }
+ return 0;
+}
+Index: gcc/testsuite/g++.dg/torture/pr71405.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/torture/pr71405.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/torture/pr71405.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,22 @@
++// PR tree-optimization/71405
++// { dg-do compile }
++
++struct C
++{
++ C () {}
++ int i;
++};
++
++void *
++operator new (__SIZE_TYPE__ x, void *y)
++{
++ return y;
++}
++
++int
++main ()
++{
++ int a;
++ new (&a) C;
++ return a;
++}
+Index: gcc/testsuite/g++.dg/torture/pr71448.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/torture/pr71448.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/torture/pr71448.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,27 @@
++// PR c++/71448
++// { dg-do compile }
++// { dg-additional-options "-std=c++11" }
++
++static constexpr const char foo[] = "foo";
++static constexpr const char *bar = "bar";
++
++static_assert ((foo + 3 - foo) == 3, "check");
++static_assert (foo + 2 != foo, "check");
++static_assert (foo + 2 >= foo, "check");
++static_assert (3 + foo >= foo, "check");
++static_assert (foo <= foo + 2, "check");
++static_assert (foo <= 3 + foo, "check");
++static_assert (foo + 2 > foo, "check");
++static_assert (3 + foo > foo, "check");
++static_assert (foo < 2 + foo, "check");
++static_assert (foo < foo + 3, "check");
++static_assert ((bar + 3 - bar) == 3, "check");
++static_assert (bar + 2 != bar, "check");
++static_assert (2 + bar >= bar, "check");
++static_assert (bar + 3 >= bar, "check");
++static_assert (bar <= bar + 2, "check");
++static_assert (bar <= 3 + bar, "check");
++static_assert (bar + 2 > bar, "check");
++static_assert (3 + bar > bar, "check");
++static_assert (bar < 2 + bar, "check");
++static_assert (bar < bar + 3, "check");
Index: gcc/testsuite/g++.dg/ipa/ipa-pta-2.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/ipa/ipa-pta-2.C (.../tags/gcc_6_1_0_release)
@@ -11099,6 +14653,18 @@ Index: gcc/testsuite/g++.dg/cpp1y/var-templ39a.C
+ // { dg-final { scan-assembler "_Z3fooIA2_A5_A3_dE" } }
+ assert(!foo<double[2][5][3]>);
+}
+Index: gcc/testsuite/g++.dg/cpp1y/auto-fn31.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/cpp1y/auto-fn31.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/cpp1y/auto-fn31.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,7 @@
++// PR c++/70572
++// { dg-do compile { target c++14 } }
++
++void foo ()
++{
++ decltype (auto) a = foo; // { dg-error "initializer" }
++}
Index: gcc/testsuite/g++.dg/cpp1y/var-templ39.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/cpp1y/var-templ39.C (.../tags/gcc_6_1_0_release)
@@ -11325,6 +14891,21 @@ Index: gcc/testsuite/g++.dg/gomp/declare-simd-6.C
+int f15 (S a);
+#pragma omp declare simd linear(a:1) // { dg-error "applied to non-integral non-pointer variable" }
+int f16 (S a);
+Index: gcc/testsuite/g++.dg/init/pr71516.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/init/pr71516.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/init/pr71516.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,10 @@
++// PR c++/71516
++// { dg-do compile }
++
++struct A; // { dg-message "forward declaration of" }
++struct B
++{
++ static A a;
++};
++A B::a = A(); // { dg-error "has initializer but incomplete type|invalid use of incomplete type" }
++struct A {};
Index: gcc/testsuite/g++.dg/other/i386-10.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/other/i386-10.C (.../tags/gcc_6_1_0_release)
@@ -11482,6 +15063,42 @@ Index: gcc/testsuite/g++.dg/template/pr70466-1.C
+ foo (&B::bar);
+ return 0;
+}
+Index: gcc/testsuite/c-c++-common/ubsan/bounds-13.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/ubsan/bounds-13.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/c-c++-common/ubsan/bounds-13.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,31 @@
++/* PR sanitizer/71498 */
++/* { dg-do run } */
++/* { dg-options "-fsanitize=bounds -Wno-array-bounds" } */
++
++struct S { int a[100]; int b, c; } s;
++
++__attribute__((noinline, noclone)) int
++foo (int x)
++{
++ return s.a[x];
++}
++
++__attribute__((noinline, noclone)) int
++bar (int x)
++{
++ static int *d = &s.a[99];
++ asm volatile ("" : : "r" (&d));
++ return s.a[x];
++}
++
++int
++main ()
++{
++ volatile int a = 0;
++ a += foo (100);
++ a += bar (100);
++ return 0;
++}
++
++/* { dg-output "index 100 out of bounds for type 'int \\\[100\\\]'\[^\n\r]*(\n|\r\n|\r)" } */
++/* { dg-output "\[^\n\r]*index 100 out of bounds for type 'int \\\[100\\\]'\[^\n\r]*(\n|\r\n|\r)" } */
Index: gcc/testsuite/c-c++-common/pr71372.c
===================================================================
--- a/src/gcc/testsuite/c-c++-common/pr71372.c (.../tags/gcc_6_1_0_release)
@@ -11678,6 +15295,68 @@ Index: gcc/testsuite/c-c++-common/gomp/clauses-1.c
#pragma omp teams distribute \
private(p) firstprivate (f) shared(s) default(shared) reduction(+:r) num_teams(nte) thread_limit(tl) \
collapse(1) dist_schedule(static, 16)
+Index: gcc/testsuite/c-c++-common/goacc/cache-2.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/goacc/cache-2.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/c-c++-common/goacc/cache-2.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,57 @@
++/* OpenACC cache directive: invalid usage. */
++
++int
++main (int argc, char **argv)
++{
++#define N 2
++ int a[N], b[N];
++ int i;
++
++ for (i = 0; i < N; i++)
++ {
++ a[i] = 3;
++ b[i] = 0;
++ }
++
++#pragma acc parallel copyin (a[0:N]) copyout (b[0:N])
++{
++ int ii;
++
++ for (ii = 0; ii < N; ii++)
++ {
++ const int idx = ii;
++ int n = 1;
++ const int len = n;
++
++#pragma acc cache /* { dg-error "expected '\\\(' before end of line" } */
++#pragma acc cache a[0:N] /* { dg-error "expected '\\\(' before 'a'" } */
++ /* { dg-bogus "expected end of line before 'a'" "" { xfail c++ } 27 } */
++#pragma acc cache (a) /* { dg-error "expected '\\\['" } */
++#pragma acc cache ( /* { dg-error "expected (identifier|unqualified-id) before end of line" } */
++#pragma acc cache () /* { dg-error "expected (identifier|unqualified-id) before '\\\)' token" } */
++#pragma acc cache (,) /* { dg-error "expected (identifier|unqualified-id) before '(,|\\\))' token" } */
++#pragma acc cache (a[0:N] /* { dg-error "expected '\\\)' before end of line" } */
++#pragma acc cache (a[0:N],) /* { dg-error "expected (identifier|unqualified-id) before '(,|\\\))' token" "" { xfail c } } */
++#pragma acc cache (a[0:N]) copyin (a[0:N]) /* { dg-error "expected end of line before 'copyin'" } */
++#pragma acc cache () /* { dg-error "expected (identifier|unqualified-id) before '\\\)' token" } */
++#pragma acc cache (a[0:N] b[0:N]) /* { dg-error "expected '\\\)' before 'b'" } */
++#pragma acc cache (a[0:N] b[0:N}) /* { dg-error "expected '\\\)' before 'b'" } */
++ /* { dg-bogus "expected end of line before '\\\}' token" "" { xfail c++ } 38 } */
++#pragma acc cache (a[0:N] /* { dg-error "expected '\\\)' before end of line" } */
++#pragma acc cache (a[0:N]) ( /* { dg-error "expected end of line before '\\(' token" } */
++#pragma acc cache (a[0:N]) ii /* { dg-error "expected end of line before 'ii'" } */
++#pragma acc cache (a[0:N] ii) /* { dg-error "expected '\\)' before 'ii'" } */
++
++ b[ii] = a[ii];
++ }
++}
++
++
++ for (i = 0; i < N; i++)
++ {
++ if (a[i] != b[i])
++ __builtin_abort ();
++ }
++
++ return 0;
++}
Index: gcc/testsuite/c-c++-common/goacc/combined-reduction.c
===================================================================
--- a/src/gcc/testsuite/c-c++-common/goacc/combined-reduction.c (.../tags/gcc_6_1_0_release)
@@ -11712,6 +15391,107 @@ Index: gcc/testsuite/c-c++-common/goacc/combined-reduction.c
+/* { dg-final { scan-tree-dump-times "acc loop reduction.+:v1. private.i." 1 "gimple" } } */
+/* { dg-final { scan-tree-dump-times "omp target oacc_kernels map.force_tofrom:n .len: 4.. map.force_tofrom:v1 .len: 4.." 1 "gimple" } } */
+/* { dg-final { scan-tree-dump-times "acc loop reduction.+:v1. private.i." 1 "gimple" } } */
+Index: gcc/testsuite/c-c++-common/goacc/cache-1.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/goacc/cache-1.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/c-c++-common/goacc/cache-1.c (.../branches/gcc-6-branch)
+@@ -1,3 +1,7 @@
++/* OpenACC cache directive: valid usage. */
++/* For execution testing, this file is "#include"d from
++ libgomp/testsuite/libgomp.oacc-c-c++-common/cache-1.c. */
++
+ int
+ main (int argc, char **argv)
+ {
+@@ -21,57 +25,31 @@
+ int n = 1;
+ const int len = n;
+
+-#pragma acc cache /* { dg-error "expected '\\\(' before end of line" } */
+-
+-#pragma acc cache a[0:N] /* { dg-error "expected '\\\(' before 'a'" } */
+- /* { dg-bogus "expected end of line before 'a'" "" { xfail c++ } 26 } */
+-
+-#pragma acc cache (a) /* { dg-error "expected '\\\['" } */
+-
+-#pragma acc cache ( /* { dg-error "expected (identifier|unqualified-id) before end of line" } */
+-
+-#pragma acc cache () /* { dg-error "expected (identifier|unqualified-id) before '\\\)' token" } */
+-
+-#pragma acc cache (,) /* { dg-error "expected (identifier|unqualified-id) before '(,|\\\))' token" } */
+-
+-#pragma acc cache (a[0:N] /* { dg-error "expected '\\\)' before end of line" } */
+-
+-#pragma acc cache (a[0:N],) /* { dg-error "expected (identifier|unqualified-id) before '(,|\\\))' token" "" { xfail c } } */
+-
+-#pragma acc cache (a[0:N]) copyin (a[0:N]) /* { dg-error "expected end of line before 'copyin'" } */
+-
+-#pragma acc cache () /* { dg-error "expected (identifier|unqualified-id) before '\\\)' token" } */
+-
+-#pragma acc cache (a[0:N] b[0:N]) /* { dg-error "expected '\\\)' before 'b'" } */
+-
+-#pragma acc cache (a[0:N] b[0:N}) /* { dg-error "expected '\\\)' before 'b'" } */
+- /* { dg-bogus "expected end of line before '\\\}' token" "" { xfail c++ } 47 } */
+-
+-#pragma acc cache (a[0:N] /* { dg-error "expected '\\\)' before end of line" } */
+-
+-#pragma acc cache (a[ii]) /* { dg-error "'ii' is not a constant" } */
+-
+-#pragma acc cache (a[idx:n]) /* { dg-error "'n' is not a constant" } */
+-
+-#pragma acc cache (a[0:N]) ( /* { dg-error "expected end of line before '\\(' token" } */
+-
+-#pragma acc cache (a[0:N]) ii /* { dg-error "expected end of line before 'ii'" } */
+-
+-#pragma acc cache (a[0:N] ii) /* { dg-error "expected '\\)' before 'ii'" } */
+-
++ /* Have at it, GCC! */
+ #pragma acc cache (a[0:N])
+-
+ #pragma acc cache (a[0:N], a[0:N])
+-
+ #pragma acc cache (a[0:N], b[0:N])
+-
+ #pragma acc cache (a[0])
+-
+ #pragma acc cache (a[0], a[1], b[0:N])
+-
++#pragma acc cache (a[i - 5])
++#pragma acc cache (a[i + 5:len])
++#pragma acc cache (a[i + 5:len - 1])
++#pragma acc cache (b[i])
++#pragma acc cache (b[i:len])
++#pragma acc cache (a[ii])
++#pragma acc cache (a[ii:len])
++#pragma acc cache (b[ii - 1])
++#pragma acc cache (b[ii - 1:len])
++#pragma acc cache (b[i - ii + 1])
++#pragma acc cache (b[i + ii - 1:len])
++#pragma acc cache (b[i * ii - 1:len + 1])
++#pragma acc cache (a[idx + 2])
++#pragma acc cache (a[idx:len + 2])
+ #pragma acc cache (a[idx])
+-
+ #pragma acc cache (a[idx:len])
++#pragma acc cache (a[idx + 2:len])
++#pragma acc cache (a[idx + 2 + i:len])
++#pragma acc cache (a[idx + 2 + i + ii:len])
+
+ b[ii] = a[ii];
+ }
+Index: gcc/testsuite/c-c++-common/goacc/combined-directives.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/goacc/combined-directives.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/c-c++-common/goacc/combined-directives.c (.../branches/gcc-6-branch)
+@@ -111,6 +111,7 @@
+ // { dg-final { scan-tree-dump-times "acc loop vector" 2 "gimple" } }
+ // { dg-final { scan-tree-dump-times "acc loop seq" 2 "gimple" } }
+ // { dg-final { scan-tree-dump-times "acc loop auto" 2 "gimple" } }
+-// { dg-final { scan-tree-dump-times "acc loop tile.2, 3" 2 "gimple" } }
++// XFAILed: OpenACC tile clauses are discarded during gimplification.
++// { dg-final { scan-tree-dump-times "acc loop tile.2, 3" 2 "gimple" { xfail *-*-* } } }
+ // { dg-final { scan-tree-dump-times "acc loop independent private.i" 2 "gimple" } }
+ // { dg-final { scan-tree-dump-times "private.z" 2 "gimple" } }
Index: gcc/cp/typeck.c
===================================================================
--- a/src/gcc/cp/typeck.c (.../tags/gcc_6_1_0_release)
@@ -11766,7 +15546,21 @@ Index: gcc/cp/decl.c
layout_decl (decl, 0);
if (!DECL_EXTERNAL (decl) && DECL_SIZE (decl) == NULL_TREE)
-@@ -11186,8 +11183,7 @@
+@@ -6633,6 +6630,13 @@
+ adc_variable_type);
+ if (type == error_mark_node)
+ return;
++ if (TREE_CODE (type) == FUNCTION_TYPE)
++ {
++ error ("initializer for %<decltype(auto) %D%> has function type "
++ "(did you forget the %<()%> ?)", decl);
++ TREE_TYPE (decl) = error_mark_node;
++ return;
++ }
+ cp_apply_type_quals_to_decl (cp_type_quals (type), decl);
+ }
+
+@@ -11186,8 +11190,7 @@
}
else if (!staticp && !dependent_type_p (type)
&& !COMPLETE_TYPE_P (complete_type (type))
@@ -11776,7 +15570,7 @@ Index: gcc/cp/decl.c
|| initialized == 0))
{
if (TREE_CODE (type) != ARRAY_TYPE
-@@ -13382,6 +13378,19 @@
+@@ -13382,6 +13385,19 @@
use_short_enum = flag_short_enums
|| lookup_attribute ("packed", TYPE_ATTRIBUTES (enumtype));
@@ -11796,6 +15590,18 @@ Index: gcc/cp/decl.c
for (itk = (use_short_enum ? itk_char : itk_int);
itk != itk_none;
itk++)
+@@ -14999,8 +15015,9 @@
+ tree var = iv->decl;
+ tree type = TREE_TYPE (var);
+
+- if (TYPE_MAIN_VARIANT (strip_array_types (type))
+- == iv->incomplete_type)
++ if (type != error_mark_node
++ && (TYPE_MAIN_VARIANT (strip_array_types (type))
++ == iv->incomplete_type))
+ {
+ /* Complete the type of the variable. The VAR_DECL itself
+ will be laid out in expand_expr. */
Index: gcc/cp/method.c
===================================================================
--- a/src/gcc/cp/method.c (.../tags/gcc_6_1_0_release)
@@ -11837,7 +15643,25 @@ Index: gcc/cp/ChangeLog
===================================================================
--- a/src/gcc/cp/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/cp/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,158 @@
+@@ -1,3 +1,176 @@
++2016-06-14 Paolo Carlini <paolo.carlini at oracle.com>
++
++ PR c++/70572
++ * decl.c (cp_finish_decl): Check do_auto_deduction return value
++ and return immediately in case of erroneous code.
++
++2016-06-14 Jakub Jelinek <jakub at redhat.com>
++
++ PR c++/71516
++ * decl.c (complete_vars): Handle gracefully type == error_mark_node.
++
++2016-06-10 Thomas Schwinge <thomas at codesourcery.com>
++
++ PR c/71381
++ Backport from trunk r237290:
++ * parser.c (cp_parser_omp_var_list_no_open) <OMP_CLAUSE__CACHE_>:
++ Loosen checking.
++
+2016-06-08 Jakub Jelinek <jakub at redhat.com>
+
+ PR c++/71442
@@ -12519,7 +16343,42 @@ Index: gcc/cp/parser.c
/*nonclass=*/0,
/*block_p=*/true, is_namespace, 0);
parser->qualifying_scope = NULL_TREE;
-@@ -33884,7 +33899,9 @@
+@@ -29949,6 +29964,8 @@
+ switch (kind)
+ {
+ case OMP_CLAUSE__CACHE_:
++ /* The OpenACC cache directive explicitly only allows "array
++ elements or subarrays". */
+ if (cp_lexer_peek_token (parser->lexer)->type != CPP_OPEN_SQUARE)
+ {
+ error_at (token->location, "expected %<[%>");
+@@ -30000,25 +30017,6 @@
+ RT_CLOSE_SQUARE))
+ goto skip_comma;
+
+- if (kind == OMP_CLAUSE__CACHE_)
+- {
+- if (TREE_CODE (low_bound) != INTEGER_CST
+- && !TREE_READONLY (low_bound))
+- {
+- error_at (token->location,
+- "%qD is not a constant", low_bound);
+- decl = error_mark_node;
+- }
+-
+- if (TREE_CODE (length) != INTEGER_CST
+- && !TREE_READONLY (length))
+- {
+- error_at (token->location,
+- "%qD is not a constant", length);
+- decl = error_mark_node;
+- }
+- }
+-
+ decl = tree_cons (low_bound, length, decl);
+ }
+ break;
+@@ -33884,7 +33882,9 @@
strcat (p_name, " for");
mask |= OMP_FOR_CLAUSE_MASK;
@@ -12530,7 +16389,7 @@ Index: gcc/cp/parser.c
mask &= ~(OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_NOWAIT);
/* Composite distribute parallel for{, simd} disallows ordered clause. */
if ((mask & (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_DIST_SCHEDULE)) != 0)
-@@ -34223,7 +34240,8 @@
+@@ -34223,7 +34223,8 @@
}
}
@@ -12540,7 +16399,7 @@ Index: gcc/cp/parser.c
if (cclauses)
{
cp_omp_split_clauses (loc, OMP_PARALLEL, mask, clauses, cclauses);
-@@ -35396,6 +35414,8 @@
+@@ -35396,6 +35397,8 @@
cp_parser_oacc_loop (cp_parser *parser, cp_token *pragma_tok, char *p_name,
omp_clause_mask mask, tree *cclauses, bool *if_p)
{
@@ -12549,7 +16408,7 @@ Index: gcc/cp/parser.c
strcat (p_name, " loop");
mask |= OACC_LOOP_CLAUSE_MASK;
-@@ -35403,7 +35423,7 @@
+@@ -35403,7 +35406,7 @@
cclauses == NULL);
if (cclauses)
{
@@ -12558,7 +16417,7 @@ Index: gcc/cp/parser.c
if (*cclauses)
*cclauses = finish_omp_clauses (*cclauses, false);
if (clauses)
-@@ -35496,8 +35516,6 @@
+@@ -35496,8 +35499,6 @@
if (strcmp (p, "loop") == 0)
{
cp_lexer_consume_token (parser->lexer);
@@ -13022,7 +16881,21 @@ Index: gcc/ada/ChangeLog
===================================================================
--- a/src/gcc/ada/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/ada/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,82 @@
+@@ -1,3 +1,96 @@
++2016-06-13 Eric Botcazou <ebotcazou at adacore.com>
++
++ * gcc-interface/decl.c (gnat_to_gnu_entity) <E_Variable>: Deal with
++ PLUS_EXPR in the expression of a renaming.
++
++2016-06-11 Eric Botcazou <ebotcazou at adacore.com>
++
++ * gcc-interface/trans.c (Case_Statement_to_gnu): Deal with characters.
++
++2016-06-11 Pierre-Marie de Rodat <derodat at adacore.com>
++
++ * gcc-interface/decl.c (gnat_to_gnu_entity): Do not clobber
++ gnat_entity_name with temporary names for XUP and XUT types.
++
+2016-06-06 Eric Botcazou <ebotcazou at adacore.com>
+
+ * gcc-interface/utils.c (gnat_internal_attribute_table): Add support
@@ -13321,6 +17194,52 @@ Index: gcc/ada/gcc-interface/Makefile.in
install-gnatlib: ../stamp-gnatlib-$(RTSDIR) install-gcc-specs
$(RMDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR)
+Index: gcc/ada/gcc-interface/decl.c
+===================================================================
+--- a/src/gcc/ada/gcc-interface/decl.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/ada/gcc-interface/decl.c (.../branches/gcc-6-branch)
+@@ -966,6 +966,7 @@
+ && !call_is_atomic_load (inner))
+ || TREE_CODE (inner) == ADDR_EXPR
+ || TREE_CODE (inner) == NULL_EXPR
++ || TREE_CODE (inner) == PLUS_EXPR
+ || TREE_CODE (inner) == CONSTRUCTOR
+ || CONSTANT_CLASS_P (inner)
+ /* We need to detect the case where a temporary is created to
+@@ -2321,10 +2322,12 @@
+ gnat_name = Packed_Array_Impl_Type (gnat_entity);
+ else
+ gnat_name = gnat_entity;
+- if (gnat_encodings != DWARF_GNAT_ENCODINGS_MINIMAL)
+- gnu_entity_name = create_concat_name (gnat_name, "XUP");
+- create_type_decl (gnu_entity_name, gnu_fat_type, artificial_p,
+- debug_info_p, gnat_entity);
++ tree xup_name
++ = (gnat_encodings == DWARF_GNAT_ENCODINGS_MINIMAL)
++ ? get_entity_name (gnat_name)
++ : create_concat_name (gnat_name, "XUP");
++ create_type_decl (xup_name, gnu_fat_type, artificial_p, debug_info_p,
++ gnat_entity);
+
+ /* Create the type to be designated by thin pointers: a record type for
+ the array and its template. We used to shift the fields to have the
+@@ -2334,11 +2337,11 @@
+ Note that GDB can handle standard DWARF information for them, so we
+ don't have to name them as a GNAT encoding, except if specifically
+ asked to. */
+- if (gnat_encodings != DWARF_GNAT_ENCODINGS_MINIMAL)
+- gnu_entity_name = create_concat_name (gnat_name, "XUT");
+- else
+- gnu_entity_name = get_entity_name (gnat_name);
+- tem = build_unc_object_type (gnu_template_type, tem, gnu_entity_name,
++ tree xut_name
++ = (gnat_encodings == DWARF_GNAT_ENCODINGS_MINIMAL)
++ ? get_entity_name (gnat_name)
++ : create_concat_name (gnat_name, "XUT");
++ tem = build_unc_object_type (gnu_template_type, tem, xut_name,
+ debug_info_p);
+
+ SET_TYPE_UNCONSTRAINED_ARRAY (tem, gnu_type);
Index: gcc/ada/gcc-interface/utils2.c
===================================================================
--- a/src/gcc/ada/gcc-interface/utils2.c (.../tags/gcc_6_1_0_release)
@@ -13338,7 +17257,48 @@ Index: gcc/ada/gcc-interface/trans.c
===================================================================
--- a/src/gcc/ada/gcc-interface/trans.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/ada/gcc-interface/trans.c (.../branches/gcc-6-branch)
-@@ -7635,10 +7635,11 @@
+@@ -2483,7 +2483,7 @@
+ static tree
+ Case_Statement_to_gnu (Node_Id gnat_node)
+ {
+- tree gnu_result, gnu_expr, gnu_label;
++ tree gnu_result, gnu_expr, gnu_type, gnu_label;
+ Node_Id gnat_when;
+ location_t end_locus;
+ bool may_fallthru = false;
+@@ -2490,6 +2490,8 @@
+
+ gnu_expr = gnat_to_gnu (Expression (gnat_node));
+ gnu_expr = convert (get_base_type (TREE_TYPE (gnu_expr)), gnu_expr);
++ gnu_expr = maybe_character_value (gnu_expr);
++ gnu_type = TREE_TYPE (gnu_expr);
+
+ /* We build a SWITCH_EXPR that contains the code with interspersed
+ CASE_LABEL_EXPRs for each label. */
+@@ -2559,6 +2561,11 @@
+ gcc_assert (!gnu_low || TREE_CODE (gnu_low) == INTEGER_CST);
+ gcc_assert (!gnu_high || TREE_CODE (gnu_high) == INTEGER_CST);
+
++ if (gnu_low && TREE_TYPE (gnu_low) != gnu_type)
++ gnu_low = convert (gnu_type, gnu_low);
++ if (gnu_high && TREE_TYPE (gnu_high) != gnu_type)
++ gnu_high = convert (gnu_type, gnu_high);
++
+ add_stmt_with_node (build_case_label (gnu_low, gnu_high, label),
+ gnat_choice);
+ choices_added_p = true;
+@@ -2590,8 +2597,8 @@
+ /* Now emit a definition of the label the cases branch to, if any. */
+ if (may_fallthru)
+ add_stmt (build1 (LABEL_EXPR, void_type_node, gnu_label));
+- gnu_result = build3 (SWITCH_EXPR, TREE_TYPE (gnu_expr), gnu_expr,
+- end_stmt_group (), NULL_TREE);
++ gnu_result
++ = build3 (SWITCH_EXPR, gnu_type, gnu_expr, end_stmt_group (), NULL_TREE);
+
+ return gnu_result;
+ }
+@@ -7635,10 +7642,11 @@
else
gnu_actual_obj_type = gnu_obj_type;
@@ -13353,7 +17313,7 @@ Index: gcc/ada/gcc-interface/trans.c
Procedure_To_Call (gnat_node),
Storage_Pool (gnat_node),
gnat_node);
-@@ -7719,16 +7720,22 @@
+@@ -7719,16 +7727,22 @@
N_Raise_Constraint_Error));
}
@@ -13444,6 +17404,21 @@ Index: gcc/ada/system-linux-ppc64.ads
type Name is (SYSTEM_NAME_GNAT);
System_Name : constant Name := SYSTEM_NAME_GNAT;
+Index: gcc/fortran/openmp.c
+===================================================================
+--- a/src/gcc/fortran/openmp.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/fortran/openmp.c (.../branches/gcc-6-branch)
+@@ -1623,6 +1623,10 @@
+ gfc_match_oacc_cache (void)
+ {
+ gfc_omp_clauses *c = gfc_get_omp_clauses ();
++ /* The OpenACC cache directive explicitly only allows "array elements or
++ subarrays", which we're currently not checking here. Either check this
++ after the call of gfc_match_omp_variable_list, or add something like a
++ only_sections variant next to its allow_sections parameter. */
+ match m = gfc_match_omp_variable_list (" (",
+ &c->lists[OMP_LIST_CACHE], true,
+ NULL, NULL, true);
Index: gcc/fortran/interface.c
===================================================================
--- a/src/gcc/fortran/interface.c (.../tags/gcc_6_1_0_release)
@@ -15271,7 +19246,18 @@ Index: gcc/fortran/ChangeLog
===================================================================
--- a/src/gcc/fortran/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,149 @@
+@@ -1,3 +1,160 @@
++2016-06-12 Dominique d'Humieres <dominiq at lps.ens.fr>
++
++ PR fortran/60751
++ * io.c (gfc_resolve_dt): Replace GFC_STD_GNU with GFC_STD_LEGACY.
++
++2016-06-10 Thomas Schwinge <thomas at codesourcery.com>
++
++ PR c/71381
++ Backport from trunk r237290:
++ * openmp.c (gfc_match_oacc_cache): Add comment.
++
+2016-06-05 Andre Vehreschild <vehre at gcc.gnu.org>
+
+ PR fortran/69659
@@ -15797,6 +19783,19 @@ Index: gcc/fortran/scanner.c
done:
if (c == '\n')
+Index: gcc/fortran/io.c
+===================================================================
+--- a/src/gcc/fortran/io.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/fortran/io.c (.../branches/gcc-6-branch)
+@@ -3007,7 +3007,7 @@
+ }
+
+ if (dt->extra_comma
+- && !gfc_notify_std (GFC_STD_GNU, "Comma before i/o item list at %L",
++ && !gfc_notify_std (GFC_STD_LEGACY, "Comma before i/o item list at %L",
+ &dt->extra_comma->where))
+ return false;
+
Index: gcc/fortran/frontend-passes.c
===================================================================
--- a/src/gcc/fortran/frontend-passes.c (.../tags/gcc_6_1_0_release)
@@ -18386,6 +22385,19 @@ Index: gcc/tree-vect-loop.c
mask_producers.safe_push (stmt_info);
bool_result = true;
+Index: gcc/tree-vect-data-refs.c
+===================================================================
+--- a/src/gcc/tree-vect-data-refs.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/tree-vect-data-refs.c (.../branches/gcc-6-branch)
+@@ -2751,7 +2751,7 @@
+ /* Sorting has ensured that DR_INIT (dra) <= DR_INIT (drb). */
+ HOST_WIDE_INT init_a = TREE_INT_CST_LOW (DR_INIT (dra));
+ HOST_WIDE_INT init_b = TREE_INT_CST_LOW (DR_INIT (drb));
+- gcc_assert (init_a < init_b);
++ gcc_assert (init_a <= init_b);
+
+ /* If init_b == init_a + the size of the type * k, we have an
+ interleaving, and DRA is accessed before DRB. */
Index: gcc/ipa-inline-analysis.c
===================================================================
--- a/src/gcc/ipa-inline-analysis.c (.../tags/gcc_6_1_0_release)
@@ -18778,7 +22790,21 @@ Index: gcc/gimplify.c
===================================================================
--- a/src/gcc/gimplify.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/gimplify.c (.../branches/gcc-6-branch)
-@@ -8785,7 +8785,10 @@
+@@ -8224,7 +8224,13 @@
+ case OMP_CLAUSE_VECTOR:
+ case OMP_CLAUSE_AUTO:
+ case OMP_CLAUSE_SEQ:
++ break;
++
+ case OMP_CLAUSE_TILE:
++ /* We're not yet making use of the information provided by OpenACC
++ tile clauses. Discard these here, to simplify later middle end
++ processing. */
++ remove = true;
+ break;
+
+ default:
+@@ -8785,7 +8791,10 @@
decl, false))
;
else if (outer->region_type != ORT_COMBINED_PARALLEL)
@@ -18790,7 +22816,7 @@ Index: gcc/gimplify.c
if (outer)
{
n = splay_tree_lookup (outer->variables,
-@@ -8868,7 +8871,10 @@
+@@ -8868,7 +8877,10 @@
decl, false))
;
else if (outer->region_type != ORT_COMBINED_PARALLEL)
@@ -18802,7 +22828,7 @@ Index: gcc/gimplify.c
if (outer)
{
n = splay_tree_lookup (outer->variables,
-@@ -8946,7 +8952,12 @@
+@@ -8946,7 +8958,12 @@
|| (ort == ORT_SIMD
&& TREE_VEC_LENGTH (OMP_FOR_INIT (for_stmt)) > 1))
{
@@ -799703,6 +803729,107 @@ Index: gcc/sched-deps.c
break;
case PREFETCH:
+Index: gcc/tree-nested.c
+===================================================================
+--- a/src/gcc/tree-nested.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/tree-nested.c (.../branches/gcc-6-branch)
+@@ -1114,6 +1114,8 @@
+ case OMP_CLAUSE_GANG:
+ case OMP_CLAUSE_WORKER:
+ case OMP_CLAUSE_VECTOR:
++ case OMP_CLAUSE_ASYNC:
++ case OMP_CLAUSE_WAIT:
+ /* Several OpenACC clauses have optional arguments. Check if they
+ are present. */
+ if (OMP_CLAUSE_OPERAND (clause, 0))
+@@ -1197,8 +1199,22 @@
+ case OMP_CLAUSE_SIMD:
+ case OMP_CLAUSE_DEFAULTMAP:
+ case OMP_CLAUSE_SEQ:
++ case OMP_CLAUSE_INDEPENDENT:
++ case OMP_CLAUSE_AUTO:
+ break;
+
++ case OMP_CLAUSE_TILE:
++ /* OpenACC tile clauses are discarded during gimplification, so we
++ don't expect to see anything here. */
++ gcc_unreachable ();
++
++ case OMP_CLAUSE__CACHE_:
++ /* These clauses belong to the OpenACC cache directive, which is
++ discarded during gimplification, so we don't expect to see
++ anything here. */
++ gcc_unreachable ();
++
++ case OMP_CLAUSE_DEVICE_RESIDENT:
+ default:
+ gcc_unreachable ();
+ }
+@@ -1332,7 +1348,7 @@
+ {
+ wi->val_only = true;
+ wi->is_lhs = false;
+- *handled_ops_p = true;
++ *handled_ops_p = false;
+ return NULL_TREE;
+ }
+ break;
+@@ -1790,6 +1806,8 @@
+ case OMP_CLAUSE_GANG:
+ case OMP_CLAUSE_WORKER:
+ case OMP_CLAUSE_VECTOR:
++ case OMP_CLAUSE_ASYNC:
++ case OMP_CLAUSE_WAIT:
+ /* Several OpenACC clauses have optional arguments. Check if they
+ are present. */
+ if (OMP_CLAUSE_OPERAND (clause, 0))
+@@ -1878,8 +1896,22 @@
+ case OMP_CLAUSE_SIMD:
+ case OMP_CLAUSE_DEFAULTMAP:
+ case OMP_CLAUSE_SEQ:
++ case OMP_CLAUSE_INDEPENDENT:
++ case OMP_CLAUSE_AUTO:
+ break;
+
++ case OMP_CLAUSE_TILE:
++ /* OpenACC tile clauses are discarded during gimplification, so we
++ don't expect to see anything here. */
++ gcc_unreachable ();
++
++ case OMP_CLAUSE__CACHE_:
++ /* These clauses belong to the OpenACC cache directive, which is
++ discarded during gimplification, so we don't expect to see
++ anything here. */
++ gcc_unreachable ();
++
++ case OMP_CLAUSE_DEVICE_RESIDENT:
+ default:
+ gcc_unreachable ();
+ }
+Index: gcc/tree-ssa.c
+===================================================================
+--- a/src/gcc/tree-ssa.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/tree-ssa.c (.../branches/gcc-6-branch)
+@@ -1590,9 +1590,16 @@
+ if (gimple_assign_lhs (stmt) != lhs
+ && !useless_type_conversion_p (TREE_TYPE (lhs),
+ TREE_TYPE (rhs)))
+- rhs = fold_build1 (VIEW_CONVERT_EXPR,
+- TREE_TYPE (lhs), rhs);
+-
++ {
++ if (gimple_clobber_p (stmt))
++ {
++ rhs = build_constructor (TREE_TYPE (lhs), NULL);
++ TREE_THIS_VOLATILE (rhs) = 1;
++ }
++ else
++ rhs = fold_build1 (VIEW_CONVERT_EXPR,
++ TREE_TYPE (lhs), rhs);
++ }
+ if (gimple_assign_lhs (stmt) != lhs)
+ gimple_assign_set_lhs (stmt, lhs);
+
Index: gcc/tree-vect-stmts.c
===================================================================
--- a/src/gcc/tree-vect-stmts.c (.../tags/gcc_6_1_0_release)
@@ -799854,6 +803981,20 @@ Index: gcc/config.gcc
# OK
;;
*)
+Index: gcc/gimple.c
+===================================================================
+--- a/src/gcc/gimple.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/gimple.c (.../branches/gcc-6-branch)
+@@ -1355,7 +1355,8 @@
+ if (gimple_call_internal_p (c1))
+ return (gimple_call_internal_p (c2)
+ && gimple_call_internal_fn (c1) == gimple_call_internal_fn (c2)
+- && !gimple_call_internal_unique_p (as_a <const gcall *> (c1)));
++ && (!gimple_call_internal_unique_p (as_a <const gcall *> (c1))
++ || c1 == c2));
+ else
+ return (gimple_call_fn (c1) == gimple_call_fn (c2)
+ || (gimple_call_fndecl (c1)
Index: gcc/tree-ssa-structalias.c
===================================================================
--- a/src/gcc/tree-ssa-structalias.c (.../tags/gcc_6_1_0_release)
@@ -800066,6 +804207,19 @@ Index: gcc/config/s390/s390.md
"@
ldebr\t%0,%1
ldeb\t%0,%1
+Index: gcc/config/s390/s390.c
+===================================================================
+--- a/src/gcc/config/s390/s390.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/s390/s390.c (.../branches/gcc-6-branch)
+@@ -791,7 +791,7 @@
+ machine_mode mode ATTRIBUTE_UNUSED,
+ int ignore ATTRIBUTE_UNUSED)
+ {
+-#define MAX_ARGS 5
++#define MAX_ARGS 6
+
+ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
+ unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
Index: gcc/config/sparc/driver-sparc.c
===================================================================
--- a/src/gcc/config/sparc/driver-sparc.c (.../tags/gcc_6_1_0_release)
@@ -801657,6 +805811,26 @@ Index: gcc/config/i386/i386.md
})
(define_insn "*bt<mode>"
+@@ -11859,8 +11856,7 @@
+ "(peep2_reg_dead_p (3, operands[1])
+ || operands_match_p (operands[1], operands[3]))
+ && ! reg_overlap_mentioned_p (operands[3], operands[0])
+- && ! (GET_CODE (operands[4]) == CLOBBER
+- && reg_mentioned_p (operands[3], operands[4]))"
++ && ! reg_set_p (operands[3], operands[4])"
+ [(parallel [(set (match_dup 5) (match_dup 0))
+ (match_dup 4)])
+ (set (strict_low_part (match_dup 6))
+@@ -11904,8 +11900,7 @@
+ "(peep2_reg_dead_p (3, operands[1])
+ || operands_match_p (operands[1], operands[3]))
+ && ! reg_overlap_mentioned_p (operands[3], operands[0])
+- && ! (GET_CODE (operands[4]) == CLOBBER
+- && reg_mentioned_p (operands[3], operands[4]))"
++ && ! reg_set_p (operands[3], operands[4])"
+ [(parallel [(set (match_dup 5) (match_dup 0))
+ (match_dup 4)])
+ (set (strict_low_part (match_dup 6))
Index: gcc/config/i386/constraints.md
===================================================================
--- a/src/gcc/config/i386/constraints.md (.../tags/gcc_6_1_0_release)
@@ -802208,6 +806382,32 @@ Index: gcc/config/microblaze/rtems.h
+ %{mbig-endian:-EB --oformat=elf32-microblaze} \
+ %{mlittle-endian:-EL --oformat=elf32-microblazeel} \
+ %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0}"
+Index: gcc/config/avr/avr.md
+===================================================================
+--- a/src/gcc/config/avr/avr.md (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/avr/avr.md (.../branches/gcc-6-branch)
+@@ -641,6 +641,21 @@
+ if (avr_mem_flash_p (dest))
+ DONE;
+
++ if (QImode == <MODE>mode
++ && SUBREG_P (src)
++ && CONSTANT_ADDRESS_P (SUBREG_REG (src)))
++ {
++ // store_bitfield may want to store a SYMBOL_REF or CONST in a
++ // structure that's represented as PSImode. As the upper 16 bits
++ // of PSImode cannot be expressed as an HImode subreg, the rhs is
++ // decomposed into QImode (word_mode) subregs of SYMBOL_REF,
++ // CONST or LABEL_REF; cf. PR71103.
++
++ rtx const_addr = SUBREG_REG (src);
++ operands[1] = src = copy_rtx (src);
++ SUBREG_REG (src) = copy_to_mode_reg (GET_MODE (const_addr), const_addr);
++ }
++
+ /* One of the operands has to be in a register. */
+ if (!register_operand (dest, <MODE>mode)
+ && !reg_or_0_operand (src, <MODE>mode))
Index: gcc/config/rtems.h
===================================================================
--- a/src/gcc/config/rtems.h (.../tags/gcc_6_1_0_release)
@@ -802289,10 +806489,27 @@ Index: gcc/config/rs6000/constraints.md
===================================================================
--- a/src/gcc/config/rs6000/constraints.md (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/config/rs6000/constraints.md (.../branches/gcc-6-branch)
-@@ -156,6 +156,11 @@
+@@ -140,6 +140,10 @@
+ (and (match_code "const_int")
+ (match_test "TARGET_VSX && (ival == VECTOR_ELEMENT_SCALAR_64BIT)")))
+
++(define_constraint "wE"
++ "Vector constant that can be loaded with the XXSPLTIB instruction."
++ (match_test "xxspltib_constant_nosplit (op, mode)"))
++
+ ;; Extended fusion store
+ (define_memory_constraint "wF"
+ "Memory operand suitable for power9 fusion load/stores"
+@@ -156,11 +160,26 @@
(and (match_test "TARGET_DIRECT_MOVE_128")
(match_test "(ival == VECTOR_ELEMENT_MFVSRLD_64BIT)"))))
++;; Generate the XXORC instruction to set a register to all 1's
++(define_constraint "wM"
++ "Match vector constant with all 1's if the XXLORC instruction is available"
++ (and (match_test "TARGET_P8_VECTOR")
++ (match_operand 0 "all_ones_constant")))
++
+;; ISA 3.0 vector d-form addresses
+(define_memory_constraint "wO"
+ "Memory operand suitable for the ISA 3.0 vector d-form instructions."
@@ -802301,11 +806518,77 @@ Index: gcc/config/rs6000/constraints.md
;; Lq/stq validates the address for load/store quad
(define_memory_constraint "wQ"
"Memory operand suitable for the load/store quad instructions"
+ (match_operand 0 "quad_memory_operand"))
+
++(define_constraint "wS"
++ "Vector constant that can be loaded with XXSPLTIB & sign extension."
++ (match_test "xxspltib_constant_split (op, mode)"))
++
+ ;; Altivec style load/store that ignores the bottom bits of the address
+ (define_memory_constraint "wZ"
+ "Indexed or indirect memory operand, ignoring the bottom 4 bits"
Index: gcc/config/rs6000/predicates.md
===================================================================
--- a/src/gcc/config/rs6000/predicates.md (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/config/rs6000/predicates.md (.../branches/gcc-6-branch)
-@@ -669,6 +669,11 @@
+@@ -572,6 +572,38 @@
+ }
+ })
+
++;; Return 1 if the operand is a CONST_VECTOR or VEC_DUPLICATE of a constant
++;; that can loaded with a XXSPLTIB instruction and then a VUPKHSB, VECSB2W or
++;; VECSB2D instruction.
++
++(define_predicate "xxspltib_constant_split"
++ (match_code "const_vector,vec_duplicate,const_int")
++{
++ int value = 256;
++ int num_insns = -1;
++
++ if (!xxspltib_constant_p (op, mode, &num_insns, &value))
++ return false;
++
++ return num_insns > 1;
++})
++
++
++;; Return 1 if the operand is a CONST_VECTOR that can loaded directly with a
++;; XXSPLTIB instruction.
++
++(define_predicate "xxspltib_constant_nosplit"
++ (match_code "const_vector,vec_duplicate,const_int")
++{
++ int value = 256;
++ int num_insns = -1;
++
++ if (!xxspltib_constant_p (op, mode, &num_insns, &value))
++ return false;
++
++ return num_insns == 1;
++})
++
+ ;; Return 1 if the operand is a CONST_VECTOR and can be loaded into a
+ ;; vector register without using memory.
+ (define_predicate "easy_vector_constant"
+@@ -590,9 +622,16 @@
+
+ if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode))
+ {
+- if (zero_constant (op, mode))
++ int value = 256;
++ int num_insns = -1;
++
++ if (zero_constant (op, mode) || all_ones_constant (op, mode))
+ return true;
+
++ if (TARGET_P9_VECTOR
++ && xxspltib_constant_p (op, mode, &num_insns, &value))
++ return true;
++
+ return easy_altivec_constant (op, mode);
+ }
+
+@@ -669,6 +708,11 @@
(and (match_code "const_int,const_double,const_wide_int,const_vector")
(match_test "op == CONST0_RTX (mode)")))
@@ -802317,7 +806600,7 @@ Index: gcc/config/rs6000/predicates.md
;; Return 1 if operand is 0.0.
(define_predicate "zero_fp_constant"
(and (match_code "const_double")
-@@ -698,48 +703,25 @@
+@@ -698,48 +742,25 @@
(define_predicate "quad_memory_operand"
(match_code "mem")
{
@@ -802380,7 +806663,18 @@ Index: gcc/config/rs6000/predicates.md
})
;; Return 1 if the operand is an indexed or indirect memory operand.
-@@ -1091,10 +1073,6 @@
+@@ -1054,6 +1075,10 @@
+ mode = V2DFmode;
+ else if (mode == DImode)
+ mode = V2DImode;
++ else if (mode == SImode && TARGET_P9_VECTOR)
++ mode = V4SImode;
++ else if (mode == SFmode && TARGET_P9_VECTOR)
++ mode = V4SFmode;
+ else
+ gcc_unreachable ();
+ return memory_address_addr_space_p (mode, XEXP (op, 0),
+@@ -1091,10 +1116,6 @@
(define_special_predicate "equality_operator"
(match_code "eq,ne"))
@@ -802391,7 +806685,7 @@ Index: gcc/config/rs6000/predicates.md
;; Return 1 if OP is a comparison operation that is valid for a branch
;; instruction. We check the opcode against the mode of the CC value.
;; validate_condition_mode is an assertion.
-@@ -1137,6 +1115,11 @@
+@@ -1137,6 +1158,11 @@
(and (match_operand 0 "branch_comparison_operator")
(match_code "ne,le,ge,leu,geu,ordered")))
@@ -802446,7 +806740,15 @@ Index: gcc/config/rs6000/rs6000-protos.h
===================================================================
--- a/src/gcc/config/rs6000/rs6000-protos.h (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/config/rs6000/rs6000-protos.h (.../branches/gcc-6-branch)
-@@ -86,6 +86,7 @@
+@@ -31,6 +31,7 @@
+ #endif /* TREE_CODE */
+
+ extern bool easy_altivec_constant (rtx, machine_mode);
++extern bool xxspltib_constant_p (rtx, machine_mode, int *, int *);
+ extern int vspltis_shifted (rtx);
+ extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int);
+ extern bool macho_lo_sum_memory_operand (rtx, machine_mode);
+@@ -86,6 +87,7 @@
extern int mems_ok_for_quad_peep (rtx, rtx);
extern bool gpr_or_gpr_p (rtx, rtx);
extern bool direct_move_p (rtx, rtx);
@@ -803193,7 +807495,253 @@ Index: gcc/config/rs6000/rs6000.c
/* Set -mallow-movmisalign to explicitly on if we have full ISA 2.07
support. If we only have ISA 2.06 support, and the user did not specify
the switch, leave it set to -1 so the movmisalign patterns are enabled,
-@@ -6572,21 +6671,29 @@
+@@ -6134,6 +6233,128 @@
+ gcc_unreachable ();
+ }
+
++/* Return true if OP is of the given MODE and can be synthesized with ISA 3.0
++ instructions (xxspltib, vupkhsb/vextsb2w/vextb2d).
++
++ Return the number of instructions needed (1 or 2) into the address pointed
++ via NUM_INSNS_PTR.
++
++ If NOSPLIT_P, only return true for constants that only generate the XXSPLTIB
++ instruction and can go in any VSX register. If !NOSPLIT_P, only return true
++ for constants that generate XXSPLTIB and need a sign extend operation, which
++ restricts us to the Altivec registers.
++
++ Allow either (vec_const [...]) or (vec_duplicate <const>). If OP is a valid
++ XXSPLTIB constant, return the constant being set via the CONST_PTR
++ pointer. */
++
++bool
++xxspltib_constant_p (rtx op,
++ machine_mode mode,
++ int *num_insns_ptr,
++ int *constant_ptr)
++{
++ size_t nunits = GET_MODE_NUNITS (mode);
++ size_t i;
++ HOST_WIDE_INT value;
++ rtx element;
++
++ /* Set the returned values to out of bound values. */
++ *num_insns_ptr = -1;
++ *constant_ptr = 256;
++
++ if (!TARGET_P9_VECTOR)
++ return false;
++
++ if (mode == VOIDmode)
++ mode = GET_MODE (op);
++
++ else if (mode != GET_MODE (op))
++ return false;
++
++ /* Handle (vec_duplicate <constant>). */
++ if (GET_CODE (op) == VEC_DUPLICATE)
++ {
++ if (mode != V16QImode && mode != V8HImode && mode != V4SImode
++ && mode != V2DImode)
++ return false;
++
++ element = XEXP (op, 0);
++ if (!CONST_INT_P (element))
++ return false;
++
++ value = INTVAL (element);
++ if (!IN_RANGE (value, -128, 127))
++ return false;
++ }
++
++ /* Handle (const_vector [...]). */
++ else if (GET_CODE (op) == CONST_VECTOR)
++ {
++ if (mode != V16QImode && mode != V8HImode && mode != V4SImode
++ && mode != V2DImode)
++ return false;
++
++ element = CONST_VECTOR_ELT (op, 0);
++ if (!CONST_INT_P (element))
++ return false;
++
++ value = INTVAL (element);
++ if (!IN_RANGE (value, -128, 127))
++ return false;
++
++ for (i = 1; i < nunits; i++)
++ {
++ element = CONST_VECTOR_ELT (op, i);
++ if (!CONST_INT_P (element))
++ return false;
++
++ if (value != INTVAL (element))
++ return false;
++ }
++
++ /* See if we could generate vspltisw/vspltish directly instead of
++ xxspltib + sign extend. Special case 0/-1 to allow getting
++ any VSX register instead of an Altivec register. */
++ if (!IN_RANGE (value, -1, 0) && EASY_VECTOR_15 (value)
++ && (mode == V4SImode || mode == V8HImode))
++ return false;
++ }
++
++ /* Handle integer constants being loaded into the upper part of the VSX
++ register as a scalar. If the value isn't 0/-1, only allow it if
++ the mode can go in Altivec registers. */
++ else if (CONST_INT_P (op))
++ {
++ if (!SCALAR_INT_MODE_P (mode))
++ return false;
++
++ value = INTVAL (op);
++ if (!IN_RANGE (value, -128, 127))
++ return false;
++
++ if (!IN_RANGE (value, -1, 0)
++ && (reg_addr[mode].addr_mask[RELOAD_REG_VMX] & RELOAD_REG_VALID) == 0)
++ return false;
++ }
++
++ else
++ return false;
++
++ /* Return # of instructions and the constant byte for XXSPLTIB. */
++ if (mode == V16QImode)
++ *num_insns_ptr = 1;
++
++ else if (IN_RANGE (value, -1, 0))
++ *num_insns_ptr = 1;
++
++ else
++ *num_insns_ptr = 2;
++
++ *constant_ptr = (int) value;
++ return true;
++}
++
+ const char *
+ output_vec_const_move (rtx *operands)
+ {
+@@ -6147,24 +6368,61 @@
+
+ if (TARGET_VSX)
+ {
++ bool dest_vmx_p = ALTIVEC_REGNO_P (REGNO (dest));
++ int xxspltib_value = 256;
++ int num_insns = -1;
++
+ if (zero_constant (vec, mode))
+- return "xxlxor %x0,%x0,%x0";
++ {
++ if (TARGET_P9_VECTOR)
++ return "xxspltib %x0,0";
+
+- if (TARGET_P8_VECTOR && vec == CONSTM1_RTX (mode))
+- return "xxlorc %x0,%x0,%x0";
++ else if (dest_vmx_p)
++ return "vspltisw %0,0";
+
+- if ((mode == V2DImode || mode == V1TImode)
+- && INTVAL (CONST_VECTOR_ELT (vec, 0)) == -1
+- && INTVAL (CONST_VECTOR_ELT (vec, 1)) == -1)
+- return (TARGET_P8_VECTOR) ? "xxlorc %x0,%x0,%x0" : "vspltisw %0,-1";
++ else
++ return "xxlxor %x0,%x0,%x0";
++ }
++
++ if (all_ones_constant (vec, mode))
++ {
++ if (TARGET_P9_VECTOR)
++ return "xxspltib %x0,255";
++
++ else if (dest_vmx_p)
++ return "vspltisw %0,-1";
++
++ else if (TARGET_P8_VECTOR)
++ return "xxlorc %x0,%x0,%x0";
++
++ else
++ gcc_unreachable ();
++ }
++
++ if (TARGET_P9_VECTOR
++ && xxspltib_constant_p (vec, mode, &num_insns, &xxspltib_value))
++ {
++ if (num_insns == 1)
++ {
++ operands[2] = GEN_INT (xxspltib_value & 0xff);
++ return "xxspltib %x0,%2";
++ }
++
++ return "#";
++ }
+ }
+
+ if (TARGET_ALTIVEC)
+ {
+ rtx splat_vec;
++
++ gcc_assert (ALTIVEC_REGNO_P (REGNO (dest)));
+ if (zero_constant (vec, mode))
+- return "vxor %0,%0,%0";
++ return "vspltisw %0,0";
+
++ if (all_ones_constant (vec, mode))
++ return "vspltisw %0,-1";
++
+ /* Do we need to construct a value using VSLDOI? */
+ shift = vspltis_shifted (vec);
+ if (shift != 0)
+@@ -6436,6 +6694,15 @@
+ return;
+ }
+
++ /* Word values on ISA 3.0 can use mtvsrws, lxvwsx, or vspltisw. V4SF is
++ complicated since scalars are stored as doubles in the registers. */
++ if (TARGET_P9_VECTOR && mode == V4SImode && all_same
++ && VECTOR_MEM_VSX_P (mode))
++ {
++ emit_insn (gen_vsx_splat_v4si (target, XVECEXP (vals, 0, 0)));
++ return;
++ }
++
+ /* With single precision floating point on VSX, know that internally single
+ precision is actually represented as a double, and either make 2 V2DF
+ vectors, and convert these vectors to single precision, or do one
+@@ -6444,14 +6711,23 @@
+ {
+ if (all_same)
+ {
+- rtx freg = gen_reg_rtx (V4SFmode);
+- rtx sreg = force_reg (SFmode, XVECEXP (vals, 0, 0));
+- rtx cvt = ((TARGET_XSCVDPSPN)
+- ? gen_vsx_xscvdpspn_scalar (freg, sreg)
+- : gen_vsx_xscvdpsp_scalar (freg, sreg));
++ rtx op0 = XVECEXP (vals, 0, 0);
+
+- emit_insn (cvt);
+- emit_insn (gen_vsx_xxspltw_v4sf_direct (target, freg, const0_rtx));
++ if (TARGET_P9_VECTOR)
++ emit_insn (gen_vsx_splat_v4sf (target, op0));
++
++ else
++ {
++ rtx freg = gen_reg_rtx (V4SFmode);
++ rtx sreg = force_reg (SFmode, op0);
++ rtx cvt = (TARGET_XSCVDPSPN
++ ? gen_vsx_xscvdpspn_scalar (freg, sreg)
++ : gen_vsx_xscvdpsp_scalar (freg, sreg));
++
++ emit_insn (cvt);
++ emit_insn (gen_vsx_xxspltw_v4sf_direct (target, freg,
++ const0_rtx));
++ }
+ }
+ else
+ {
+@@ -6572,21 +6848,29 @@
gen_rtvec (3, target, reg,
force_reg (V16QImode, x)),
UNSPEC_VPERM);
@@ -803236,7 +807784,7 @@ Index: gcc/config/rs6000/rs6000.c
}
emit_insn (gen_rtx_SET (target, x));
-@@ -6902,6 +7009,59 @@
+@@ -6902,6 +7186,59 @@
return false;
}
@@ -803296,7 +807844,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Return true if this is a load or store quad operation. This function does
not handle the atomic quad memory instructions. */
-@@ -6994,6 +7154,10 @@
+@@ -6994,6 +7331,10 @@
if (TARGET_POWERPC64 && (offset & 3) != 0)
return false;
@@ -803307,7 +807855,7 @@ Index: gcc/config/rs6000/rs6000.c
extra = GET_MODE_SIZE (mode) - UNITS_PER_WORD;
if (extra < 0)
extra = 0;
-@@ -7023,13 +7187,14 @@
+@@ -7023,13 +7364,14 @@
case TImode:
case TFmode:
case KFmode:
@@ -803328,7 +807876,7 @@ Index: gcc/config/rs6000/rs6000.c
break;
case V4HImode:
-@@ -7096,6 +7261,11 @@
+@@ -7096,6 +7438,11 @@
if (GET_CODE (op) != SYMBOL_REF)
return false;
@@ -803340,7 +807888,7 @@ Index: gcc/config/rs6000/rs6000.c
dsize = GET_MODE_SIZE (mode);
decl = SYMBOL_REF_DECL (op);
if (!decl)
-@@ -7250,6 +7420,9 @@
+@@ -7250,6 +7597,9 @@
return false;
if (!INT_REG_OK_FOR_BASE_P (XEXP (x, 0), strict))
return false;
@@ -803350,7 +807898,7 @@ Index: gcc/config/rs6000/rs6000.c
if (!reg_offset_addressing_ok_p (mode))
return virtual_stack_registers_memory_p (x);
if (legitimate_constant_pool_address_p (x, mode, strict || lra_in_progress))
-@@ -7388,6 +7561,9 @@
+@@ -7388,6 +7738,9 @@
return false;
if (!INT_REG_OK_FOR_BASE_P (XEXP (x, 0), strict))
return false;
@@ -803360,7 +807908,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Restrict addressing for DI because of our SUBREG hackery. */
if (TARGET_E500_DOUBLE && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
return false;
-@@ -7399,7 +7575,7 @@
+@@ -7399,7 +7752,7 @@
if (DEFAULT_ABI == ABI_V4 && flag_pic)
return false;
@@ -803369,7 +807917,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload from reload pass code. LEGITIMIZE_RELOAD_ADDRESS
recognizes some LO_SUM addresses as valid although this
function says opposite. In most cases, LRA through different
-@@ -7453,7 +7629,8 @@
+@@ -7453,7 +7806,8 @@
{
unsigned int extra;
@@ -803379,7 +807927,27 @@ Index: gcc/config/rs6000/rs6000.c
{
if (virtual_stack_registers_memory_p (x))
return x;
-@@ -8164,6 +8341,11 @@
+@@ -8149,12 +8503,16 @@
+ {
+ bool reg_offset_p = reg_offset_addressing_ok_p (mode);
+
+- /* Nasty hack for vsx_splat_V2DF/V2DI load from mem, which takes a
+- DFmode/DImode MEM. */
++ /* Nasty hack for vsx_splat_v2df/v2di load from mem, which takes a
++ DFmode/DImode MEM. Ditto for ISA 3.0 vsx_splat_v4sf/v4si. */
+ if (reg_offset_p
+ && opnum == 1
+ && ((mode == DFmode && recog_data.operand_mode[0] == V2DFmode)
+- || (mode == DImode && recog_data.operand_mode[0] == V2DImode)))
++ || (mode == DImode && recog_data.operand_mode[0] == V2DImode)
++ || (mode == SFmode && recog_data.operand_mode[0] == V4SFmode
++ && TARGET_P9_VECTOR)
++ || (mode == SImode && recog_data.operand_mode[0] == V4SImode
++ && TARGET_P9_VECTOR)))
+ reg_offset_p = false;
+
+ /* We must recognize output that we have already generated ourselves. */
+@@ -8164,6 +8522,11 @@
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
&& GET_CODE (XEXP (x, 1)) == CONST_INT)
{
@@ -803391,7 +807959,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8175,6 +8357,11 @@
+@@ -8175,6 +8538,11 @@
if (GET_CODE (x) == LO_SUM
&& GET_CODE (XEXP (x, 0)) == HIGH)
{
@@ -803403,7 +807971,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8207,6 +8394,11 @@
+@@ -8207,6 +8575,11 @@
{
rtx hi = gen_rtx_HIGH (Pmode, copy_rtx (x));
x = gen_rtx_LO_SUM (Pmode, hi, x);
@@ -803415,7 +807983,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8244,6 +8436,11 @@
+@@ -8244,6 +8617,11 @@
GEN_INT (high)),
GEN_INT (low));
@@ -803427,7 +807995,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8304,6 +8501,11 @@
+@@ -8304,6 +8682,11 @@
x = gen_rtx_LO_SUM (GET_MODE (x),
gen_rtx_HIGH (Pmode, x), x);
@@ -803439,7 +808007,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8337,9 +8539,16 @@
+@@ -8337,9 +8720,16 @@
{
x = create_TOC_reference (x, NULL_RTX);
if (TARGET_CMODEL != CMODEL_SMALL)
@@ -803459,7 +808027,7 @@ Index: gcc/config/rs6000/rs6000.c
*win = 1;
return x;
}
-@@ -8395,6 +8604,7 @@
+@@ -8395,6 +8785,7 @@
rs6000_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict)
{
bool reg_offset_p = reg_offset_addressing_ok_p (mode);
@@ -803467,7 +808035,7 @@ Index: gcc/config/rs6000/rs6000.c
/* If this is an unaligned stvx/ldvx type address, discard the outer AND. */
if (VECTOR_MEM_ALTIVEC_P (mode)
-@@ -8414,15 +8624,26 @@
+@@ -8414,15 +8805,26 @@
return 1;
if (virtual_stack_registers_memory_p (x))
return 1;
@@ -803502,7 +808070,7 @@ Index: gcc/config/rs6000/rs6000.c
/* For TImode, if we have load/store quad and TImode in VSX registers, only
allow register indirect addresses. This will allow the values to go in
either GPRs or VSX registers without reloading. The vector types would
-@@ -8461,7 +8682,8 @@
+@@ -8461,7 +8863,8 @@
&& legitimate_indexed_address_p (XEXP (x, 1), reg_ok_strict)))
&& rtx_equal_p (XEXP (XEXP (x, 1), 0), XEXP (x, 0)))
return 1;
@@ -803512,7 +808080,7 @@ Index: gcc/config/rs6000/rs6000.c
return 1;
return 0;
}
-@@ -12260,7 +12482,7 @@
+@@ -12260,7 +12663,7 @@
/* const function, function only depends on the inputs. */
TREE_READONLY (t) = 1;
TREE_NOTHROW (t) = 1;
@@ -803521,7 +808089,7 @@ Index: gcc/config/rs6000/rs6000.c
}
else if ((classify & RS6000_BTC_PURE) != 0)
{
-@@ -12268,7 +12490,7 @@
+@@ -12268,7 +12671,7 @@
external state. */
DECL_PURE_P (t) = 1;
TREE_NOTHROW (t) = 1;
@@ -803530,7 +808098,7 @@ Index: gcc/config/rs6000/rs6000.c
}
else if ((classify & RS6000_BTC_FP) != 0)
{
-@@ -12300,6 +12522,7 @@
+@@ -12300,6 +12703,7 @@
/* Simple ternary operations: VECd = foo (VECa, VECb, VECc). */
@@ -803538,7 +808106,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12312,6 +12535,7 @@
+@@ -12312,6 +12716,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803546,7 +808114,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \
-@@ -12333,6 +12557,7 @@
+@@ -12333,6 +12738,7 @@
/* DST operations: void foo (void *, const int, const char). */
@@ -803554,7 +808122,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12345,6 +12570,7 @@
+@@ -12345,6 +12751,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803562,7 +808130,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12366,6 +12592,7 @@
+@@ -12366,6 +12773,7 @@
/* Simple binary operations: VECc = foo (VECa, VECb). */
@@ -803570,7 +808138,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12378,6 +12605,7 @@
+@@ -12378,6 +12786,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803578,7 +808146,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \
{ MASK, ICODE, NAME, ENUM },
-@@ -12397,6 +12625,7 @@
+@@ -12397,6 +12806,7 @@
#include "rs6000-builtin.def"
};
@@ -803586,7 +808154,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12409,6 +12638,7 @@
+@@ -12409,6 +12819,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803594,7 +808162,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12431,6 +12661,7 @@
+@@ -12431,6 +12842,7 @@
};
/* SPE predicates. */
@@ -803602,7 +808170,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12443,6 +12674,7 @@
+@@ -12443,6 +12855,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803610,7 +808178,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12463,6 +12695,7 @@
+@@ -12463,6 +12876,7 @@
};
/* SPE evsel predicates. */
@@ -803618,7 +808186,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12475,6 +12708,7 @@
+@@ -12475,6 +12889,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803626,7 +808194,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12495,6 +12729,7 @@
+@@ -12495,6 +12910,7 @@
};
/* PAIRED predicates. */
@@ -803634,7 +808202,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12507,6 +12742,7 @@
+@@ -12507,6 +12923,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803642,7 +808210,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12528,6 +12764,7 @@
+@@ -12528,6 +12945,7 @@
/* ABS* operations. */
@@ -803650,7 +808218,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12540,6 +12777,7 @@
+@@ -12540,6 +12958,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803658,7 +808226,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12562,6 +12800,7 @@
+@@ -12562,6 +12981,7 @@
/* Simple unary operations: VECb = foo (unsigned literal) or VECb =
foo (VECa). */
@@ -803666,7 +808234,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12574,6 +12813,7 @@
+@@ -12574,6 +12994,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803674,7 +808242,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \
{ MASK, ICODE, NAME, ENUM },
-@@ -12593,7 +12833,43 @@
+@@ -12593,7 +13014,43 @@
#include "rs6000-builtin.def"
};
@@ -803718,7 +808286,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12606,6 +12882,7 @@
+@@ -12606,6 +13063,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -803726,7 +808294,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12625,6 +12902,7 @@
+@@ -12625,6 +13083,7 @@
#include "rs6000-builtin.def"
};
@@ -803734,7 +808302,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -14129,6 +14407,47 @@
+@@ -14129,6 +14588,47 @@
case VSX_BUILTIN_STXVW4X_V16QI:
return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v16qi, exp);
@@ -803782,7 +808350,7 @@ Index: gcc/config/rs6000/rs6000.c
case ALTIVEC_BUILTIN_MFVSCR:
icode = CODE_FOR_altivec_mfvscr;
tmode = insn_data[icode].operand[0].mode;
-@@ -14323,6 +14642,46 @@
+@@ -14323,6 +14823,46 @@
case VSX_BUILTIN_LXVW4X_V16QI:
return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v16qi,
exp, target, false);
@@ -803829,7 +808397,7 @@ Index: gcc/config/rs6000/rs6000.c
break;
default:
break;
-@@ -14792,6 +15151,8 @@
+@@ -14792,6 +15332,8 @@
error ("Builtin function %s requires the -mhard-dfp option", name);
else if ((fnmask & RS6000_BTM_P8_VECTOR) != 0)
error ("Builtin function %s requires the -mpower8-vector option", name);
@@ -803838,7 +808406,7 @@ Index: gcc/config/rs6000/rs6000.c
else if ((fnmask & (RS6000_BTM_HARD_FLOAT | RS6000_BTM_LDBL128))
== (RS6000_BTM_HARD_FLOAT | RS6000_BTM_LDBL128))
error ("Builtin function %s requires the -mhard-float and"
-@@ -14990,9 +15351,11 @@
+@@ -14990,9 +15532,11 @@
}
unsigned attr = rs6000_builtin_info[uns_fcode].attr & RS6000_BTC_TYPE_MASK;
@@ -803851,7 +808419,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Handle simple unary operations. */
d = bdesc_1arg;
-@@ -15012,6 +15375,12 @@
+@@ -15012,6 +15556,12 @@
if (d->code == fcode)
return rs6000_expand_ternop_builtin (d->icode, exp, target);
@@ -803864,7 +808432,7 @@ Index: gcc/config/rs6000/rs6000.c
gcc_unreachable ();
}
-@@ -15816,10 +16185,44 @@
+@@ -15816,10 +16366,44 @@
VSX_BUILTIN_STXVW4X_V8HI);
def_builtin ("__builtin_vsx_stxvw4x_v16qi", void_ftype_v16qi_long_pvoid,
VSX_BUILTIN_STXVW4X_V16QI);
@@ -803909,7 +808477,7 @@ Index: gcc/config/rs6000/rs6000.c
def_builtin ("__builtin_vec_step", int_ftype_opaque, ALTIVEC_BUILTIN_VEC_STEP);
def_builtin ("__builtin_vec_splats", opaque_ftype_opaque, ALTIVEC_BUILTIN_VEC_SPLATS);
-@@ -16351,10 +16754,6 @@
+@@ -16351,10 +16935,6 @@
while (num_args > 0 && h.mode[num_args] == VOIDmode)
num_args--;
@@ -803920,7 +808488,7 @@ Index: gcc/config/rs6000/rs6000.c
ret_type = builtin_mode_to_type[h.mode[0]][h.uns_p[0]];
if (!ret_type && h.uns_p[0])
ret_type = builtin_mode_to_type[h.mode[0]][0];
-@@ -16406,6 +16805,7 @@
+@@ -16406,6 +16986,7 @@
tree opaque_ftype_opaque = NULL_TREE;
tree opaque_ftype_opaque_opaque = NULL_TREE;
tree opaque_ftype_opaque_opaque_opaque = NULL_TREE;
@@ -803928,7 +808496,7 @@ Index: gcc/config/rs6000/rs6000.c
tree v2si_ftype_qi = NULL_TREE;
tree v2si_ftype_v2si_qi = NULL_TREE;
tree v2si_ftype_int_qi = NULL_TREE;
-@@ -16622,6 +17022,64 @@
+@@ -16622,6 +17203,64 @@
def_builtin (d->name, type, d->code);
}
@@ -803993,7 +808561,7 @@ Index: gcc/config/rs6000/rs6000.c
}
/* Set up AIX/Darwin/64-bit Linux quad floating point routines. */
-@@ -18152,6 +18610,16 @@
+@@ -18152,6 +18791,16 @@
}
}
@@ -804010,7 +808578,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Make sure the register class can handle offset addresses. */
else if (rs6000_legitimate_offset_address_p (mode, addr, false, true))
{
-@@ -18158,7 +18626,7 @@
+@@ -18158,7 +18807,7 @@
if ((addr_mask & RELOAD_REG_OFFSET) == 0)
{
extra_cost = 1;
@@ -804019,7 +808587,7 @@ Index: gcc/config/rs6000/rs6000.c
}
}
-@@ -18171,8 +18639,15 @@
+@@ -18171,8 +18820,15 @@
break;
case LO_SUM:
@@ -804036,7 +808604,7 @@ Index: gcc/config/rs6000/rs6000.c
fail_msg = "bad LO_SUM";
extra_cost = -1;
}
-@@ -18188,8 +18663,17 @@
+@@ -18188,8 +18844,17 @@
case CONST:
case SYMBOL_REF:
case LABEL_REF:
@@ -804056,7 +808624,7 @@ Index: gcc/config/rs6000/rs6000.c
break;
/* TOC references look like offsetable memory. */
-@@ -18200,6 +18684,12 @@
+@@ -18200,6 +18865,12 @@
extra_cost = -1;
}
@@ -804069,7 +808637,7 @@ Index: gcc/config/rs6000/rs6000.c
else if ((addr_mask & RELOAD_REG_OFFSET) == 0)
{
extra_cost = 1;
-@@ -18827,6 +19317,16 @@
+@@ -18827,6 +19498,16 @@
}
}
@@ -804086,7 +808654,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Make sure the register class can handle offset addresses. */
else if (rs6000_legitimate_offset_address_p (mode, addr, false, true))
{
-@@ -18857,6 +19357,13 @@
+@@ -18857,6 +19538,13 @@
}
}
@@ -804100,7 +808668,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Make sure the register class can handle offset addresses. */
else if (legitimate_lo_sum_address_p (mode, addr, false))
{
-@@ -19067,7 +19574,8 @@
+@@ -19067,7 +19755,8 @@
}
/* D-form addressing can easily reload the value. */
@@ -804110,7 +808678,7 @@ Index: gcc/config/rs6000/rs6000.c
return rclass;
/* If this is a scalar floating point value and we don't have D-form
-@@ -19483,8 +19991,16 @@
+@@ -19483,8 +20172,16 @@
else if (TARGET_VSX && dest_vsx_p)
{
@@ -804128,7 +808696,7 @@ Index: gcc/config/rs6000/rs6000.c
else
return "lxvd2x %x0,%y1";
}
-@@ -19513,8 +20029,16 @@
+@@ -19513,8 +20210,16 @@
else if (TARGET_VSX && src_vsx_p)
{
@@ -804146,7 +808714,20 @@ Index: gcc/config/rs6000/rs6000.c
else
return "stxvd2x %x1,%y0";
}
-@@ -21747,6 +22271,101 @@
+@@ -19536,10 +20241,8 @@
+ if (dest_gpr_p)
+ return "#";
+
+- else if (TARGET_VSX && dest_vsx_p && zero_constant (src, mode))
+- return "xxlxor %x0,%x0,%x0";
+-
+- else if (TARGET_ALTIVEC && dest_vmx_p)
++ else if ((dest_vmx_p && TARGET_ALTIVEC)
++ || (dest_vsx_p && TARGET_VSX))
+ return output_vec_const_move (operands);
+ }
+
+@@ -21747,6 +22450,101 @@
return 1;
}
@@ -804248,7 +808829,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Emit a conditional move: move TRUE_COND to DEST if OP of the
operands of the last comparison is nonzero/true, FALSE_COND if it
is zero/false. Return 0 if the hardware has no such operation. */
-@@ -21773,6 +22392,18 @@
+@@ -21773,6 +22571,18 @@
if (GET_MODE (false_cond) != result_mode)
return 0;
@@ -804267,7 +808848,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Don't allow using floating point comparisons for integer results for
now. */
if (FLOAT_MODE_P (compare_mode) && !FLOAT_MODE_P (result_mode))
-@@ -25949,7 +26580,7 @@
+@@ -25949,7 +26759,7 @@
if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
{
rtx areg, savereg, mem;
@@ -804276,7 +808857,7 @@ Index: gcc/config/rs6000/rs6000.c
offset = (info->altivec_save_offset + frame_off
+ 16 * (i - info->first_altivec_reg_save));
-@@ -25956,18 +26587,30 @@
+@@ -25956,18 +26766,30 @@
savereg = gen_rtx_REG (V4SImode, i);
@@ -804317,7 +808898,7 @@ Index: gcc/config/rs6000/rs6000.c
rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
areg, GEN_INT (offset));
-@@ -26687,23 +27330,35 @@
+@@ -26687,23 +27509,35 @@
for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
{
@@ -804367,7 +808948,7 @@ Index: gcc/config/rs6000/rs6000.c
}
}
-@@ -26890,23 +27545,35 @@
+@@ -26890,23 +27724,35 @@
for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
{
@@ -804417,7 +808998,7 @@ Index: gcc/config/rs6000/rs6000.c
}
}
-@@ -27724,6 +28391,11 @@
+@@ -27724,6 +28570,11 @@
const0_rtx, const0_rtx));
call_fusage = NULL_RTX;
use_reg (&call_fusage, r12);
@@ -804429,7 +809010,7 @@ Index: gcc/config/rs6000/rs6000.c
add_function_usage_to (insn, call_fusage);
emit_insn (gen_frame_load (r0, r1, info->lr_save_offset));
insn = emit_move_insn (lr, r0);
-@@ -33448,17 +34120,25 @@
+@@ -33448,17 +34299,25 @@
if (!REG_P (target))
tmp = gen_reg_rtx (mode);
@@ -804465,7 +809046,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Copy into target, possibly by way of a register. */
if (!REG_P (target))
-@@ -34056,7 +34736,7 @@
+@@ -34056,7 +34915,7 @@
static bool
rs6000_lra_p (void)
{
@@ -804474,7 +809055,7 @@ Index: gcc/config/rs6000/rs6000.c
}
/* Given FROM and TO register numbers, say whether this elimination is allowed.
-@@ -34417,7 +35097,8 @@
+@@ -34417,7 +35276,8 @@
{ "power8-fusion", OPTION_MASK_P8_FUSION, false, true },
{ "power8-fusion-sign", OPTION_MASK_P8_FUSION_SIGN, false, true },
{ "power8-vector", OPTION_MASK_P8_VECTOR, false, true },
@@ -804484,7 +809065,7 @@ Index: gcc/config/rs6000/rs6000.c
{ "power9-fusion", OPTION_MASK_P9_FUSION, false, true },
{ "power9-minmax", OPTION_MASK_P9_MINMAX, false, true },
{ "power9-vector", OPTION_MASK_P9_VECTOR, false, true },
-@@ -34474,6 +35155,7 @@
+@@ -34474,6 +35334,7 @@
{ "popcntd", RS6000_BTM_POPCNTD, false, false },
{ "cell", RS6000_BTM_CELL, false, false },
{ "power8-vector", RS6000_BTM_P8_VECTOR, false, false },
@@ -804492,7 +809073,7 @@ Index: gcc/config/rs6000/rs6000.c
{ "crypto", RS6000_BTM_CRYPTO, false, false },
{ "htm", RS6000_BTM_HTM, false, false },
{ "hard-dfp", RS6000_BTM_DFP, false, false },
-@@ -35049,7 +35731,9 @@
+@@ -35049,7 +35910,9 @@
size_t i;
size_t start_column = 0;
size_t cur_column;
@@ -804503,7 +809084,7 @@ Index: gcc/config/rs6000/rs6000.c
const char *comma = "";
if (indent)
-@@ -35067,27 +35751,45 @@
+@@ -35067,27 +35930,45 @@
cur_column = start_column;
for (i = 0; i < num_elements; i++)
{
@@ -804568,8 +809149,54 @@ Index: gcc/config/rs6000/vsx.md
===================================================================
--- a/src/gcc/config/rs6000/vsx.md (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/config/rs6000/vsx.md (.../branches/gcc-6-branch)
-@@ -301,24 +301,6 @@
+@@ -55,8 +55,7 @@
+ (KF "FLOAT128_VECTOR_P (KFmode)")
+ (TF "FLOAT128_VECTOR_P (TFmode)")])
+
+-;; Iterator for memory move. Handle TImode specially to allow
+-;; it to use gprs as well as vsx registers.
++;; Iterator for memory moves.
+ (define_mode_iterator VSX_M [V16QI
+ V8HI
+ V4SI
+@@ -65,19 +64,9 @@
+ V2DF
+ V1TI
+ (KF "FLOAT128_VECTOR_P (KFmode)")
+- (TF "FLOAT128_VECTOR_P (TFmode)")])
++ (TF "FLOAT128_VECTOR_P (TFmode)")
++ (TI "TARGET_VSX_TIMODE")])
+
+-(define_mode_iterator VSX_M2 [V16QI
+- V8HI
+- V4SI
+- V2DI
+- V4SF
+- V2DF
+- V1TI
+- (KF "FLOAT128_VECTOR_P (KFmode)")
+- (TF "FLOAT128_VECTOR_P (TFmode)")
+- (TI "TARGET_VSX_TIMODE")])
+-
+ ;; Map into the appropriate load/store name based on the type
+ (define_mode_attr VSm [(V16QI "vw4")
+ (V8HI "vw4")
+@@ -270,6 +259,10 @@
+ (define_mode_attr VS_64reg [(V2DF "ws")
+ (V2DI "wi")])
+
++;; Iterators for loading constants with xxspltib
++(define_mode_iterator VSINT_84 [V4SI V2DI])
++(define_mode_iterator VSINT_842 [V8HI V4SI V2DI])
++
+ ;; Constants for creating unspecs
+ (define_c_enum "unspec"
+ [UNSPEC_VSX_CONCAT
+@@ -299,26 +292,9 @@
+ UNSPEC_VSX_XVCVUXDDP
+ UNSPEC_VSX_XVCVDPSXDS
UNSPEC_VSX_XVCVDPUXDS
++ UNSPEC_VSX_SIGN_EXTEND
])
-;; VSX (P9) moves
@@ -804593,40 +809220,218 @@ Index: gcc/config/rs6000/vsx.md
;; VSX moves
;; The patterns for LE permuted loads and stores come before the general
-@@ -788,8 +770,8 @@
+@@ -787,93 +763,142 @@
+ (const_int 64)))]
"")
- (define_insn "*vsx_mov<mode>"
+-(define_insn "*vsx_mov<mode>"
- [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?<VSa>,?<VSa>,r,we,wQ,?&r,??Y,??r,??r,<VSr>,?<VSa>,*r,v,wZ,v")
- (match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,<VSa>,Z,<VSa>,we,b,r,wQ,r,Y,r,j,j,j,W,v,wZ"))]
-+ [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=ZwO,<VSr>,<VSr>,?ZwO,?<VSa>,?<VSa>,r,we,wQ,?&r,??Y,??r,??r,<VSr>,?<VSa>,*r,v,wZ,v")
-+ (match_operand:VSX_M 1 "input_operand" "<VSr>,ZwO,<VSr>,<VSa>,ZwO,<VSa>,we,b,r,wQ,r,Y,r,j,j,j,W,v,wZ"))]
- "VECTOR_MEM_VSX_P (<MODE>mode)
- && (register_operand (operands[0], <MODE>mode)
- || register_operand (operands[1], <MODE>mode))"
-@@ -803,8 +785,8 @@
- ;; use of TImode is for unions. However for plain data movement, slightly
- ;; favor the vector loads
- (define_insn "*vsx_movti_64bit"
+- "VECTOR_MEM_VSX_P (<MODE>mode)
+- && (register_operand (operands[0], <MODE>mode)
+- || register_operand (operands[1], <MODE>mode))"
++;; Vector constants that can be generated with XXSPLTIB that was added in ISA
++;; 3.0. Both (const_vector [..]) and (vec_duplicate ...) forms are recognized.
++(define_insn "xxspltib_v16qi"
++ [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")
++ (vec_duplicate:V16QI (match_operand:SI 1 "s8bit_cint_operand" "n")))]
++ "TARGET_P9_VECTOR"
+ {
+- return rs6000_output_move_128bit (operands);
++ operands[2] = GEN_INT (INTVAL (operands[1]) & 0xff);
++ return "xxspltib %x0,%2";
+ }
+- [(set_attr "type" "vecstore,vecload,vecsimple,vecstore,vecload,vecsimple,mffgpr,mftgpr,load,store,store,load, *,vecsimple,vecsimple,*, *,vecstore,vecload")
+- (set_attr "length" "4,4,4,4,4,4,8,4,12,12,12,12,16,4,4,*,16,4,4")])
++ [(set_attr "type" "vecperm")])
+
+-;; Unlike other VSX moves, allow the GPRs even for reloading, since a normal
+-;; use of TImode is for unions. However for plain data movement, slightly
+-;; favor the vector loads
+-(define_insn "*vsx_movti_64bit"
- [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,r,we,v,v,wZ,wQ,&r,Y,r,r,?r")
- (match_operand:TI 1 "input_operand" "wa,Z,wa,O,we,b,W,wZ,v,r,wQ,r,Y,r,n"))]
-+ [(set (match_operand:TI 0 "nonimmediate_operand" "=ZwO,wa,wa,wa,r,we,v,v,wZ,wQ,&r,Y,r,r,?r")
-+ (match_operand:TI 1 "input_operand" "wa,ZwO,wa,O,we,b,W,wZ,v,r,wQ,r,Y,r,n"))]
- "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)
- && (register_operand (operands[0], TImode)
- || register_operand (operands[1], TImode))"
-@@ -815,8 +797,8 @@
- (set_attr "length" "4,4,4,4,8,4,16,4,4,8,8,8,8,8,8")])
-
- (define_insn "*vsx_movti_32bit"
+- "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)
+- && (register_operand (operands[0], TImode)
+- || register_operand (operands[1], TImode))"
++(define_insn "xxspltib_<mode>_nosplit"
++ [(set (match_operand:VSINT_842 0 "vsx_register_operand" "=wa,wa")
++ (match_operand:VSINT_842 1 "xxspltib_constant_nosplit" "jwM,wE"))]
++ "TARGET_P9_VECTOR"
+ {
+- return rs6000_output_move_128bit (operands);
++ rtx op1 = operands[1];
++ int value = 256;
++ int num_insns = -1;
++
++ if (!xxspltib_constant_p (op1, <MODE>mode, &num_insns, &value)
++ || num_insns != 1)
++ gcc_unreachable ();
++
++ operands[2] = GEN_INT (value & 0xff);
++ return "xxspltib %x0,%2";
+ }
+- [(set_attr "type" "vecstore,vecload,vecsimple,vecsimple,mffgpr,mftgpr,vecsimple,vecstore,vecload,store,load,store,load,*,*")
+- (set_attr "length" "4,4,4,4,8,4,16,4,4,8,8,8,8,8,8")])
++ [(set_attr "type" "vecperm")])
+
+-(define_insn "*vsx_movti_32bit"
- [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,v, v,wZ,Q,Y,????r,????r,????r,r")
- (match_operand:TI 1 "input_operand" "wa, Z,wa, O,W,wZ, v,r,r, Q, Y, r,n"))]
-+ [(set (match_operand:TI 0 "nonimmediate_operand" "=ZwO,wa,wa,wa,v,v,wZ,Q,Y,????r,????r,????r,r")
-+ (match_operand:TI 1 "input_operand" "wa,ZwO,wa,O,W,wZ,v,r,r,Q,Y,r,n"))]
- "! TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)
- && (register_operand (operands[0], TImode)
- || register_operand (operands[1], TImode))"
-@@ -887,6 +869,140 @@
+- "! TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)
+- && (register_operand (operands[0], TImode)
+- || register_operand (operands[1], TImode))"
++(define_insn_and_split "*xxspltib_<mode>_split"
++ [(set (match_operand:VSINT_842 0 "altivec_register_operand" "=v")
++ (match_operand:VSINT_842 1 "xxspltib_constant_split" "wS"))]
++ "TARGET_P9_VECTOR"
++ "#"
++ "&& 1"
++ [(const_int 0)]
+ {
+- switch (which_alternative)
+- {
+- case 0:
+- return "stxvd2x %x1,%y0";
++ int value = 256;
++ int num_insns = -1;
++ rtx op0 = operands[0];
++ rtx op1 = operands[1];
++ rtx tmp = ((can_create_pseudo_p ())
++ ? gen_reg_rtx (V16QImode)
++ : gen_lowpart (V16QImode, op0));
+
+- case 1:
+- return "lxvd2x %x0,%y1";
++ if (!xxspltib_constant_p (op1, <MODE>mode, &num_insns, &value)
++ || num_insns != 2)
++ gcc_unreachable ();
+
+- case 2:
+- return "xxlor %x0,%x1,%x1";
++ emit_insn (gen_xxspltib_v16qi (tmp, GEN_INT (value)));
+
+- case 3:
+- return "xxlxor %x0,%x0,%x0";
++ if (<MODE>mode == V2DImode)
++ emit_insn (gen_vsx_sign_extend_qi_v2di (op0, tmp));
+
+- case 4:
+- return output_vec_const_move (operands);
++ else if (<MODE>mode == V4SImode)
++ emit_insn (gen_vsx_sign_extend_qi_v4si (op0, tmp));
+
+- case 5:
+- return "stvx %1,%y0";
++ else if (<MODE>mode == V8HImode)
++ emit_insn (gen_altivec_vupkhsb (op0, tmp));
+
+- case 6:
+- return "lvx %0,%y1";
++ else
++ gcc_unreachable ();
+
+- case 7:
+- if (TARGET_STRING)
+- return \"stswi %1,%P0,16\";
++ DONE;
++}
++ [(set_attr "type" "vecperm")
++ (set_attr "length" "8")])
+
+- case 8:
+- return \"#\";
+
+- case 9:
+- /* If the address is not used in the output, we can use lsi. Otherwise,
+- fall through to generating four loads. */
+- if (TARGET_STRING
+- && ! reg_overlap_mentioned_p (operands[0], operands[1]))
+- return \"lswi %0,%P1,16\";
+- /* ... fall through ... */
++;; Prefer using vector registers over GPRs. Prefer using ISA 3.0's XXSPLTISB
++;; or Altivec VSPLITW 0/-1 over XXLXOR/XXLORC to set a register to all 0's or
++;; all 1's, since the machine does not have to wait for the previous
++;; instruction using the register being set (such as a store waiting on a slow
++;; instruction). But generate XXLXOR/XXLORC if it will avoid a register move.
+
+- case 10:
+- case 11:
+- case 12:
+- return \"#\";
+- default:
+- gcc_unreachable ();
+- }
++;; VSX store VSX load VSX move VSX->GPR GPR->VSX LQ (GPR)
++;; STQ (GPR) GPR load GPR store GPR move XXSPLTIB VSPLTISW
++;; VSX 0/-1 GPR 0/-1 VMX const GPR const LVX (VMX) STVX (VMX)
++(define_insn "*vsx_mov<mode>_64bit"
++ [(set (match_operand:VSX_M 0 "nonimmediate_operand"
++ "=ZwO, <VSa>, <VSa>, r, we, ?wQ,
++ ?&r, ??r, ??Y, ??r, wo, v,
++ ?<VSa>, *r, v, ??r, wZ, v")
++
++ (match_operand:VSX_M 1 "input_operand"
++ "<VSa>, ZwO, <VSa>, we, r, r,
++ wQ, Y, r, r, wE, jwM,
++ ?jwM, jwM, W, W, v, wZ"))]
++
++ "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (<MODE>mode)
++ && (register_operand (operands[0], <MODE>mode)
++ || register_operand (operands[1], <MODE>mode))"
++{
++ return rs6000_output_move_128bit (operands);
+ }
+- [(set_attr "type" "vecstore,vecload,vecsimple,vecsimple,vecsimple,vecstore,vecload,store,store,load,load, *, *")
+- (set_attr "update" " *, *, *, *, *, *, *, yes, yes, yes, yes, *, *")
+- (set_attr "length" " 4, 4, 4, 4, 8, 4, 4, 16, 16, 16, 16,16,16")
+- (set (attr "cell_micro") (if_then_else (match_test "TARGET_STRING")
+- (const_string "always")
+- (const_string "conditional")))])
++ [(set_attr "type"
++ "vecstore, vecload, vecsimple, mffgpr, mftgpr, load,
++ store, load, store, *, vecsimple, vecsimple,
++ vecsimple, *, *, *, vecstore, vecload")
+
++ (set_attr "length"
++ "4, 4, 4, 8, 4, 8,
++ 8, 8, 8, 8, 4, 4,
++ 4, 8, 20, 20, 4, 4")])
++
++;; VSX store VSX load VSX move GPR load GPR store GPR move
++;; XXSPLTIB VSPLTISW VSX 0/-1 GPR 0/-1 VMX const GPR const
++;; LVX (VMX) STVX (VMX)
++(define_insn "*vsx_mov<mode>_32bit"
++ [(set (match_operand:VSX_M 0 "nonimmediate_operand"
++ "=ZwO, <VSa>, <VSa>, ??r, ??Y, ??r,
++ wo, v, ?<VSa>, *r, v, ??r,
++ wZ, v")
++
++ (match_operand:VSX_M 1 "input_operand"
++ "<VSa>, ZwO, <VSa>, Y, r, r,
++ wE, jwM, ?jwM, jwM, W, W,
++ v, wZ"))]
++
++ "!TARGET_POWERPC64 && VECTOR_MEM_VSX_P (<MODE>mode)
++ && (register_operand (operands[0], <MODE>mode)
++ || register_operand (operands[1], <MODE>mode))"
++{
++ return rs6000_output_move_128bit (operands);
++}
++ [(set_attr "type"
++ "vecstore, vecload, vecsimple, load, store, *,
++ vecsimple, vecsimple, vecsimple, *, *, *,
++ vecstore, vecload")
++
++ (set_attr "length"
++ "4, 4, 4, 16, 16, 16,
++ 4, 4, 4, 16, 20, 32,
++ 4, 4")])
++
+ ;; Explicit load/store expanders for the builtin functions
+ (define_expand "vsx_load_<mode>"
+ [(set (match_operand:VSX_M 0 "vsx_register_operand" "")
+@@ -887,6 +912,140 @@
"VECTOR_MEM_VSX_P (<MODE>mode)"
"")
@@ -804767,7 +809572,7 @@ Index: gcc/config/rs6000/vsx.md
;; VSX vector floating point arithmetic instructions. The VSX scalar
;; instructions are now combined with the insn for the traditional floating
-@@ -1583,10 +1699,15 @@
+@@ -1583,10 +1742,15 @@
{
rtx op0 = operands[0];
rtx op1 = operands[1];
@@ -804787,7 +809592,7 @@ Index: gcc/config/rs6000/vsx.md
emit_insn (gen_vsx_xvcvdpsxds (op0, tmp));
DONE;
})
-@@ -1607,10 +1728,15 @@
+@@ -1607,10 +1771,15 @@
{
rtx op0 = operands[0];
rtx op1 = operands[1];
@@ -804807,6 +809612,137 @@ Index: gcc/config/rs6000/vsx.md
emit_insn (gen_vsx_xvcvdpuxds (op0, tmp));
DONE;
})
+@@ -2215,20 +2384,62 @@
+
+ ;; V2DF/V2DI splat
+ (define_insn "vsx_splat_<mode>"
+- [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,wd,wd,?<VSa>,?<VSa>,?<VSa>")
++ [(set (match_operand:VSX_D 0 "vsx_register_operand" "=<VSa>,<VSa>,we")
+ (vec_duplicate:VSX_D
+- (match_operand:<VS_scalar> 1 "splat_input_operand" "<VS_64reg>,f,Z,<VSa>,<VSa>,Z")))]
++ (match_operand:<VS_scalar> 1 "splat_input_operand" "<VS_64reg>,Z,b")))]
+ "VECTOR_MEM_VSX_P (<MODE>mode)"
+ "@
+ xxpermdi %x0,%x1,%x1,0
+- xxpermdi %x0,%x1,%x1,0
+ lxvdsx %x0,%y1
+- xxpermdi %x0,%x1,%x1,0
+- xxpermdi %x0,%x1,%x1,0
+- lxvdsx %x0,%y1"
+- [(set_attr "type" "vecperm,vecperm,vecload,vecperm,vecperm,vecload")])
++ mtvsrdd %x0,%1,%1"
++ [(set_attr "type" "vecperm,vecload,mftgpr")])
+
+-;; V4SF/V4SI splat
++;; V4SI splat (ISA 3.0)
++;; When SI's are allowed in VSX registers, add XXSPLTW support
++(define_expand "vsx_splat_<mode>"
++ [(set (match_operand:VSX_W 0 "vsx_register_operand" "")
++ (vec_duplicate:VSX_W
++ (match_operand:<VS_scalar> 1 "splat_input_operand" "")))]
++ "TARGET_P9_VECTOR"
++{
++ if (MEM_P (operands[1]))
++ operands[1] = rs6000_address_for_fpconvert (operands[1]);
++ else if (!REG_P (operands[1]))
++ operands[1] = force_reg (<VS_scalar>mode, operands[1]);
++})
++
++(define_insn "*vsx_splat_v4si_internal"
++ [(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa")
++ (vec_duplicate:V4SI
++ (match_operand:SI 1 "splat_input_operand" "r,Z")))]
++ "TARGET_P9_VECTOR"
++ "@
++ mtvsrws %x0,%1
++ lxvwsx %x0,%y1"
++ [(set_attr "type" "mftgpr,vecload")])
++
++;; V4SF splat (ISA 3.0)
++(define_insn_and_split "*vsx_splat_v4sf_internal"
++ [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa,wa,wa")
++ (vec_duplicate:V4SF
++ (match_operand:SF 1 "splat_input_operand" "Z,wy,r")))]
++ "TARGET_P9_VECTOR"
++ "@
++ lxvwsx %x0,%y1
++ #
++ mtvsrws %x0,%1"
++ "&& reload_completed && vsx_register_operand (operands[1], SFmode)"
++ [(set (match_dup 0)
++ (unspec:V4SF [(match_dup 1)] UNSPEC_VSX_CVDPSPN))
++ (set (match_dup 0)
++ (vec_duplicate:V4SF
++ (vec_select:SF (match_dup 0)
++ (parallel [(const_int 0)]))))]
++ ""
++ [(set_attr "type" "vecload,vecperm,mftgpr")
++ (set_attr "length" "4,8,4")])
++
++;; V4SF/V4SI splat from a vector element
+ (define_insn "vsx_xxspltw_<mode>"
+ [(set (match_operand:VSX_W 0 "vsx_register_operand" "=wf,?<VSa>")
+ (vec_duplicate:VSX_W
+@@ -2471,11 +2682,11 @@
+ (define_peephole
+ [(set (match_operand:P 0 "base_reg_operand" "")
+ (match_operand:P 1 "short_cint_operand" ""))
+- (set (match_operand:VSX_M2 2 "vsx_register_operand" "")
+- (mem:VSX_M2 (plus:P (match_dup 0)
+- (match_operand:P 3 "int_reg_operand" ""))))]
++ (set (match_operand:VSX_M 2 "vsx_register_operand" "")
++ (mem:VSX_M (plus:P (match_dup 0)
++ (match_operand:P 3 "int_reg_operand" ""))))]
+ "TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR"
+- "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M2:VSm>x %x2,%0,%3"
++ "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M:VSm>x %x2,%0,%3"
+ [(set_attr "length" "8")
+ (set_attr "type" "vecload")])
+
+@@ -2482,10 +2693,39 @@
+ (define_peephole
+ [(set (match_operand:P 0 "base_reg_operand" "")
+ (match_operand:P 1 "short_cint_operand" ""))
+- (set (match_operand:VSX_M2 2 "vsx_register_operand" "")
+- (mem:VSX_M2 (plus:P (match_operand:P 3 "int_reg_operand" "")
+- (match_dup 0))))]
++ (set (match_operand:VSX_M 2 "vsx_register_operand" "")
++ (mem:VSX_M (plus:P (match_operand:P 3 "int_reg_operand" "")
++ (match_dup 0))))]
+ "TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR"
+- "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M2:VSm>x %x2,%0,%3"
++ "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M:VSm>x %x2,%0,%3"
+ [(set_attr "length" "8")
+ (set_attr "type" "vecload")])
++
++
++;; ISA 3.0 vector extend sign support
++
++(define_insn "vsx_sign_extend_qi_<mode>"
++ [(set (match_operand:VSINT_84 0 "vsx_register_operand" "=v")
++ (unspec:VSINT_84
++ [(match_operand:V16QI 1 "vsx_register_operand" "v")]
++ UNSPEC_VSX_SIGN_EXTEND))]
++ "TARGET_P9_VECTOR"
++ "vextsb2<wd> %0,%1"
++ [(set_attr "type" "vecsimple")])
++
++(define_insn "*vsx_sign_extend_hi_<mode>"
++ [(set (match_operand:VSINT_84 0 "vsx_register_operand" "=v")
++ (unspec:VSINT_84
++ [(match_operand:V8HI 1 "vsx_register_operand" "v")]
++ UNSPEC_VSX_SIGN_EXTEND))]
++ "TARGET_P9_VECTOR"
++ "vextsh2<wd> %0,%1"
++ [(set_attr "type" "vecsimple")])
++
++(define_insn "*vsx_sign_extend_si_v2di"
++ [(set (match_operand:V2DI 0 "vsx_register_operand" "=v")
++ (unspec:V2DI [(match_operand:V4SI 1 "vsx_register_operand" "v")]
++ UNSPEC_VSX_SIGN_EXTEND))]
++ "TARGET_P9_VECTOR"
++ "vextsw2d %0,%1"
++ [(set_attr "type" "vecsimple")])
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- a/src/gcc/config/rs6000/rs6000.h (.../tags/gcc_6_1_0_release)
@@ -805580,6 +810516,18 @@ Index: gcc/config/rs6000/sysv4.h
#define LINK_START_LINUX_SPEC ""
+Index: gcc/config/darwin.h
+===================================================================
+--- a/src/gcc/config/darwin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/darwin.h (.../branches/gcc-6-branch)
+@@ -179,6 +179,7 @@
+ %{L*} %(link_libgcc) %o %{fprofile-arcs|fprofile-generate*|coverage:-lgcov} \
+ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1): \
+ %{static|static-libgcc|static-libstdc++|static-libgfortran: libgomp.a%s; : -lgomp } } \
++ %{fcilkplus:%:include(libcilkrts.spec)%(link_cilkrts)} \
+ %{fgnu-tm: \
+ %{static|static-libgcc|static-libstdc++|static-libgfortran: libitm.a%s; : -litm } } \
+ %{!nostdlib:%{!nodefaultlibs:\
Index: gcc/config/arm/arm-builtins.c
===================================================================
--- a/src/gcc/config/arm/arm-builtins.c (.../tags/gcc_6_1_0_release)
@@ -805691,6 +810639,28 @@ Index: gcc/config/arm/arm.c
if (IS_INTERRUPT (func_type))
{
+Index: gcc/config/arm/freebsd.h
+===================================================================
+--- a/src/gcc/config/arm/freebsd.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/arm/freebsd.h (.../branches/gcc-6-branch)
+@@ -120,6 +120,9 @@
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm9
+ #endif
+
++/* FreeBSD 10 does not support unaligned access for armv6 and up.
++ Unaligned access support was added in FreeBSD 11. */
++#if FBSD_MAJOR < 11
+ #define SUBTARGET_OVERRIDE_INTERNAL_OPTIONS \
+ do { \
+ if (opts_set->x_unaligned_access == 1) \
+@@ -127,6 +130,7 @@
+ if (opts->x_unaligned_access) \
+ opts->x_unaligned_access = 0; \
+ } while (0)
++#endif
+
+ #undef MAX_SYNC_LIBFUNC_SIZE
+ #define MAX_SYNC_LIBFUNC_SIZE 4 /* UNITS_PER_WORD not defined yet. */
Index: gcc/config/visium/visium-protos.h
===================================================================
--- a/src/gcc/config/visium/visium-protos.h (.../tags/gcc_6_1_0_release)
@@ -815412,3 +820382,343 @@ Index: libcpp/po/zh_CN.po
#, c-format
msgid "invalid hash type %d in cpp_macro_definition"
msgstr "cpp_macro_definition 中有无效的散列类型 %d"
+Index: fixincludes/ChangeLog
+===================================================================
+--- a/src/fixincludes/ChangeLog (.../tags/gcc_6_1_0_release)
++++ b/src/fixincludes/ChangeLog (.../branches/gcc-6-branch)
+@@ -1,3 +1,18 @@
++2016-06-15 David Edelsohn <dje.gcc at gmail.com>
++
++ Backport from mainline
++ 2016-06-13 David Edelsohn <dje.gcc at gmail.com>
++
++ * inclhack.def (aix_stdlib_malloc): New fix.
++ (aix_stdlib_realloc): New fix.
++ (aix_stdlib_calloc): New fix.
++ (aix_stdlib_valloc): New fix.
++ * fixincl.x: Regenerate.
++ * tests/base/stdlib.h [AIX_STDLIB_MALLOC]: New test.
++ [AIX_STDLIB_REALLOC]: New test.
++ [AIX_STDLIB_CALLOC]: New test.
++ [AIX_STDLIB_VALLOC]: New test.
++
+ 2016-04-27 Release Manager
+
+ * GCC 6.1.0 released.
+Index: fixincludes/tests/base/stdlib.h
+===================================================================
+--- a/src/fixincludes/tests/base/stdlib.h (.../tags/gcc_6_1_0_release)
++++ b/src/fixincludes/tests/base/stdlib.h (.../branches/gcc-6-branch)
+@@ -9,6 +9,26 @@
+
+
+
++#if defined( AIX_STDLIB_MALLOC_CHECK )
++extern void *malloc(size_t) __asm__("__linux_malloc");
++#endif /* AIX_STDLIB_MALLOC_CHECK */
++
++
++#if defined( AIX_STDLIB_REALLOC_CHECK )
++extern void *realloc(void *, size_t) __asm__("__linux_realloc");
++#endif /* AIX_STDLIB_REALLOC_CHECK */
++
++
++#if defined( AIX_STDLIB_CALLOC_CHECK )
++extern void *calloc(size_t, size_t) __asm__("__linux_calloc");
++#endif /* AIX_STDLIB_CALLOC_CHECK */
++
++
++#if defined( AIX_STDLIB_VALLOC_CHECK )
++extern void *valloc(size_t) __asm__("__linux_valloc");
++#endif /* AIX_STDLIB_VALLOC_CHECK */
++
++
+ #if defined( AIX_STRTOF_CONST_CHECK )
+ extern float strtof(const char *, char **);
+ #endif /* AIX_STRTOF_CONST_CHECK */
+Index: fixincludes/fixincl.x
+===================================================================
+--- a/src/fixincludes/fixincl.x (.../tags/gcc_6_1_0_release)
++++ b/src/fixincludes/fixincl.x (.../branches/gcc-6-branch)
+@@ -2,11 +2,11 @@
+ *
+ * DO NOT EDIT THIS FILE (fixincl.x)
+ *
+- * It has been AutoGen-ed Sunday January 31, 2016 at 07:52:05 PM EST
++ * It has been AutoGen-ed June 10, 2016 at 12:56:52 PM by AutoGen 5.18.3
+ * From the definitions inclhack.def
+ * and the template file fixincl
+ */
+-/* DO NOT SVN-MERGE THIS FILE, EITHER Sun 31 Jan 2016 19:52:05 EST
++/* DO NOT SVN-MERGE THIS FILE, EITHER Fri Jun 10 12:56:52 UTC 2016
+ *
+ * You must regenerate it. Use the ./genfixes script.
+ *
+@@ -15,7 +15,7 @@
+ * certain ANSI-incompatible system header files which are fixed to work
+ * correctly with ANSI C and placed in a directory that GNU C will search.
+ *
+- * This file contains 231 fixup descriptions.
++ * This file contains 235 fixup descriptions.
+ *
+ * See README for more information.
+ *
+@@ -1547,6 +1547,154 @@
+
+ /* * * * * * * * * * * * * * * * * * * * * * * * * *
+ *
++ * Description of Aix_Stdlib_Malloc fix
++ */
++tSCC zAix_Stdlib_MallocName[] =
++ "aix_stdlib_malloc";
++
++/*
++ * File name selection pattern
++ */
++tSCC zAix_Stdlib_MallocList[] =
++ "stdlib.h\0";
++/*
++ * Machine/OS name selection pattern
++ */
++tSCC* apzAix_Stdlib_MallocMachs[] = {
++ "*-*-aix*",
++ (const char*)NULL };
++
++/*
++ * content selection pattern - do fix if pattern found
++ */
++tSCC zAix_Stdlib_MallocSelect0[] =
++ "#define[ \t]+malloc[ \t]+__linux_malloc";
++
++#define AIX_STDLIB_MALLOC_TEST_CT 1
++static tTestDesc aAix_Stdlib_MallocTests[] = {
++ { TT_EGREP, zAix_Stdlib_MallocSelect0, (regex_t*)NULL }, };
++
++/*
++ * Fix Command Arguments for Aix_Stdlib_Malloc
++ */
++static const char* apzAix_Stdlib_MallocPatch[] = {
++ "format",
++ "extern void *malloc(size_t) __asm__(\"__linux_malloc\");",
++ (char*)NULL };
++
++/* * * * * * * * * * * * * * * * * * * * * * * * * *
++ *
++ * Description of Aix_Stdlib_Realloc fix
++ */
++tSCC zAix_Stdlib_ReallocName[] =
++ "aix_stdlib_realloc";
++
++/*
++ * File name selection pattern
++ */
++tSCC zAix_Stdlib_ReallocList[] =
++ "stdlib.h\0";
++/*
++ * Machine/OS name selection pattern
++ */
++tSCC* apzAix_Stdlib_ReallocMachs[] = {
++ "*-*-aix*",
++ (const char*)NULL };
++
++/*
++ * content selection pattern - do fix if pattern found
++ */
++tSCC zAix_Stdlib_ReallocSelect0[] =
++ "#define[ \t]+realloc[ \t]+__linux_realloc";
++
++#define AIX_STDLIB_REALLOC_TEST_CT 1
++static tTestDesc aAix_Stdlib_ReallocTests[] = {
++ { TT_EGREP, zAix_Stdlib_ReallocSelect0, (regex_t*)NULL }, };
++
++/*
++ * Fix Command Arguments for Aix_Stdlib_Realloc
++ */
++static const char* apzAix_Stdlib_ReallocPatch[] = {
++ "format",
++ "extern void *realloc(void *, size_t) __asm__(\"__linux_realloc\");",
++ (char*)NULL };
++
++/* * * * * * * * * * * * * * * * * * * * * * * * * *
++ *
++ * Description of Aix_Stdlib_Calloc fix
++ */
++tSCC zAix_Stdlib_CallocName[] =
++ "aix_stdlib_calloc";
++
++/*
++ * File name selection pattern
++ */
++tSCC zAix_Stdlib_CallocList[] =
++ "stdlib.h\0";
++/*
++ * Machine/OS name selection pattern
++ */
++tSCC* apzAix_Stdlib_CallocMachs[] = {
++ "*-*-aix*",
++ (const char*)NULL };
++
++/*
++ * content selection pattern - do fix if pattern found
++ */
++tSCC zAix_Stdlib_CallocSelect0[] =
++ "#define[ \t]+calloc[ \t]+__linux_calloc";
++
++#define AIX_STDLIB_CALLOC_TEST_CT 1
++static tTestDesc aAix_Stdlib_CallocTests[] = {
++ { TT_EGREP, zAix_Stdlib_CallocSelect0, (regex_t*)NULL }, };
++
++/*
++ * Fix Command Arguments for Aix_Stdlib_Calloc
++ */
++static const char* apzAix_Stdlib_CallocPatch[] = {
++ "format",
++ "extern void *calloc(size_t, size_t) __asm__(\"__linux_calloc\");",
++ (char*)NULL };
++
++/* * * * * * * * * * * * * * * * * * * * * * * * * *
++ *
++ * Description of Aix_Stdlib_Valloc fix
++ */
++tSCC zAix_Stdlib_VallocName[] =
++ "aix_stdlib_valloc";
++
++/*
++ * File name selection pattern
++ */
++tSCC zAix_Stdlib_VallocList[] =
++ "stdlib.h\0";
++/*
++ * Machine/OS name selection pattern
++ */
++tSCC* apzAix_Stdlib_VallocMachs[] = {
++ "*-*-aix*",
++ (const char*)NULL };
++
++/*
++ * content selection pattern - do fix if pattern found
++ */
++tSCC zAix_Stdlib_VallocSelect0[] =
++ "#define[ \t]+valloc[ \t]+__linux_valloc";
++
++#define AIX_STDLIB_VALLOC_TEST_CT 1
++static tTestDesc aAix_Stdlib_VallocTests[] = {
++ { TT_EGREP, zAix_Stdlib_VallocSelect0, (regex_t*)NULL }, };
++
++/*
++ * Fix Command Arguments for Aix_Stdlib_Valloc
++ */
++static const char* apzAix_Stdlib_VallocPatch[] = {
++ "format",
++ "extern void *valloc(size_t) __asm__(\"__linux_valloc\");",
++ (char*)NULL };
++
++/* * * * * * * * * * * * * * * * * * * * * * * * * *
++ *
+ * Description of Aix_Strtof_Const fix
+ */
+ tSCC zAix_Strtof_ConstName[] =
+@@ -9485,9 +9633,9 @@
+ *
+ * List of all fixes
+ */
+-#define REGEX_COUNT 268
++#define REGEX_COUNT 272
+ #define MACH_LIST_SIZE_LIMIT 187
+-#define FIX_COUNT 231
++#define FIX_COUNT 235
+
+ /*
+ * Enumerate the fixes
+@@ -9525,6 +9673,10 @@
+ AIX_STDINT_4_FIXIDX,
+ AIX_STDINT_5_FIXIDX,
+ AIX_STDIO_INLINE_FIXIDX,
++ AIX_STDLIB_MALLOC_FIXIDX,
++ AIX_STDLIB_REALLOC_FIXIDX,
++ AIX_STDLIB_CALLOC_FIXIDX,
++ AIX_STDLIB_VALLOC_FIXIDX,
+ AIX_STRTOF_CONST_FIXIDX,
+ AIX_SYSMACHINE_FIXIDX,
+ AIX_SYSWAIT_2_FIXIDX,
+@@ -9887,6 +10039,26 @@
+ AIX_STDIO_INLINE_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
+ aAix_Stdio_InlineTests, apzAix_Stdio_InlinePatch, 0 },
+
++ { zAix_Stdlib_MallocName, zAix_Stdlib_MallocList,
++ apzAix_Stdlib_MallocMachs,
++ AIX_STDLIB_MALLOC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
++ aAix_Stdlib_MallocTests, apzAix_Stdlib_MallocPatch, 0 },
++
++ { zAix_Stdlib_ReallocName, zAix_Stdlib_ReallocList,
++ apzAix_Stdlib_ReallocMachs,
++ AIX_STDLIB_REALLOC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
++ aAix_Stdlib_ReallocTests, apzAix_Stdlib_ReallocPatch, 0 },
++
++ { zAix_Stdlib_CallocName, zAix_Stdlib_CallocList,
++ apzAix_Stdlib_CallocMachs,
++ AIX_STDLIB_CALLOC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
++ aAix_Stdlib_CallocTests, apzAix_Stdlib_CallocPatch, 0 },
++
++ { zAix_Stdlib_VallocName, zAix_Stdlib_VallocList,
++ apzAix_Stdlib_VallocMachs,
++ AIX_STDLIB_VALLOC_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
++ aAix_Stdlib_VallocTests, apzAix_Stdlib_VallocPatch, 0 },
++
+ { zAix_Strtof_ConstName, zAix_Strtof_ConstList,
+ apzAix_Strtof_ConstMachs,
+ AIX_STRTOF_CONST_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
+Index: fixincludes/inclhack.def
+===================================================================
+--- a/src/fixincludes/inclhack.def (.../tags/gcc_6_1_0_release)
++++ b/src/fixincludes/inclhack.def (.../branches/gcc-6-branch)
+@@ -911,7 +911,49 @@
+ test_text = "#ifdef __cplusplus\n}\n\n#ifdef ferror";
+ };
+
++/*
++ * stdlib.h on AIX uses #define on malloc and friends.
++ */
++fix = {
++ hackname = aix_stdlib_malloc;
++ mach = "*-*-aix*";
++ files = stdlib.h;
++ select = "#define[ \t]+malloc[ \t]+__linux_malloc";
++ c_fix = format;
++ c_fix_arg = "extern void *malloc(size_t) __asm__(\"__linux_malloc\");";
++ test_text = "#define malloc __linux_malloc";
++};
+
++fix = {
++ hackname = aix_stdlib_realloc;
++ mach = "*-*-aix*";
++ files = stdlib.h;
++ select = "#define[ \t]+realloc[ \t]+__linux_realloc";
++ c_fix = format;
++ c_fix_arg = "extern void *realloc(void *, size_t) __asm__(\"__linux_realloc\");";
++ test_text = "#define realloc __linux_realloc";
++};
++
++fix = {
++ hackname = aix_stdlib_calloc;
++ mach = "*-*-aix*";
++ files = stdlib.h;
++ select = "#define[ \t]+calloc[ \t]+__linux_calloc";
++ c_fix = format;
++ c_fix_arg = "extern void *calloc(size_t, size_t) __asm__(\"__linux_calloc\");";
++ test_text = "#define calloc __linux_calloc";
++};
++
++fix = {
++ hackname = aix_stdlib_valloc;
++ mach = "*-*-aix*";
++ files = stdlib.h;
++ select = "#define[ \t]+valloc[ \t]+__linux_valloc";
++ c_fix = format;
++ c_fix_arg = "extern void *valloc(size_t) __asm__(\"__linux_valloc\");";
++ test_text = "#define valloc __linux_valloc";
++};
++
+ /*
+ * stdlib.h on AIX 4.3 declares strtof() with a non-const first argument.
+ */
--
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