[gcc-6] 184/401: * Update to SVN 20160805 (r239167, 6.1.1) from the gcc-6-branch.

Ximin Luo infinity0 at debian.org
Wed Apr 5 15:49:04 UTC 2017


This is an automated email from the git hooks/post-receive script.

infinity0 pushed a commit to branch pu/reproducible_builds
in repository gcc-6.

commit f8b8a6274ea09b84adc6e04e5d2025b4c991b192
Author: doko <doko at 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca>
Date:   Fri Aug 5 13:09:19 2016 +0000

      * Update to SVN 20160805 (r239167, 6.1.1) from the gcc-6-branch.
    
    
    git-svn-id: svn://anonscm.debian.org/gcccvs/branches/sid/gcc-6@8945 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
---
 debian/changelog                |   6 +-
 debian/patches/svn-updates.diff | 564 +++++++++++++++++++++++++++++++++++-----
 2 files changed, 498 insertions(+), 72 deletions(-)

diff --git a/debian/changelog b/debian/changelog
index 50a5b04..2ae34e4 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,9 +1,13 @@
 gcc-6 (6.1.1-12) UNRELEASED; urgency=medium
 
+  * Update to SVN 20160805 (r239167, 6.1.1) from the gcc-6-branch.
+    Fix PR target/71869 (PPC), PR target/72805 (x86), PR target/70677 (AVR),
+    PR c++/72415.
+
   * Fix running the libjava testsuite.
   * Revert fix for PR target/55947, causing PR libstdc++/72813. LP: #1610220.
 
- -- Matthias Klose <doko at debian.org>  Fri, 05 Aug 2016 11:45:44 +0200
+ -- Matthias Klose <doko at debian.org>  Fri, 05 Aug 2016 15:06:19 +0200
 
 gcc-6 (6.1.1-11) unstable; urgency=medium
 
diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff
index b836b2c..92bd98e 100644
--- a/debian/patches/svn-updates.diff
+++ b/debian/patches/svn-updates.diff
@@ -1,10 +1,10 @@
-# DP: updates from the 6 branch upto 20160802 (r238981).
+# DP: updates from the 6 branch upto 20160805 (r239167).
 
 last_update()
 {
 	cat > ${dir}LAST_UPDATED <EOF
-Tue Aug  2 12:08:10 CEST 2016
-Tue Aug  2 10:08:10 UTC 2016 (revision 238981)
+Fri Aug  5 14:57:18 CEST 2016
+Fri Aug  5 12:57:18 UTC 2016 (revision 239167)
 EOF
 }
 
@@ -6560,7 +6560,7 @@ Index: gcc/DATESTAMP
 +++ b/src/gcc/DATESTAMP	(.../branches/gcc-6-branch)
 @@ -1 +1 @@
 -20160427
-+20160802
++20160805
 Index: gcc/tree-ssa-strlen.c
 ===================================================================
 --- a/src/gcc/tree-ssa-strlen.c	(.../tags/gcc_6_1_0_release)
@@ -7212,7 +7212,34 @@ Index: gcc/ChangeLog
 ===================================================================
 --- a/src/gcc/ChangeLog	(.../tags/gcc_6_1_0_release)
 +++ b/src/gcc/ChangeLog	(.../branches/gcc-6-branch)
-@@ -1,3 +1,2064 @@
+@@ -1,3 +1,2091 @@
++2016-08-04  Michael Meissner  <meissner at linux.vnet.ibm.com>
++
++	Backport from trunk
++	2016-07-26  Michael Meissner  <meissner at linux.vnet.ibm.com>
++
++	PR target/71869
++	* config/rs6000/rs6000.c (rs6000_generate_compare): Rework
++	__float128 support when we don't have hardware support, so that
++	the IEEE built-in functions like isgreater, first call __unordkf3
++	to make sure neither operand is a NaN, and if both operands are
++	ordered, do the normal comparison.
++
++2016-08-04  Uros Bizjak  <ubizjak at gmail.com>
++
++	PR target/72805
++	* config/i386/avx512fintrin.h (_mm512_cmp_epi32_mask) [!__OPTIMIZE__]:
++	Cast builtin function result to __mmask16 instead of __mmask8.
++	(_mm512_cmp_epu32_mask) [!__OPTIMIZE__]: Ditto.
++	(_mm512_mask_cmp_epi32_mask) [!__OPTIMIZE__]: Ditto.
++	(_mm512_mask_cmp_epu32_mask) [!__OPTIMIZE__]: Ditto.
++
++2016-08-03  Georg-Johann Lay  <avr at gjlay.de>
++
++	PR 70677
++	* common/config/avr/avr-common.c (avr_option_optimization_table)
++	[OPT_LEVELS_ALL]: Turn off -fcaller-saves.
++
 +2016-08-01  Georg-Johann Lay  <avr at gjlay.de>
 +
 +	Backport from 2016-08-01 trunk r238948.
@@ -7299,9 +7326,9 @@ Index: gcc/ChangeLog
 +
 +2016-07-20  Martin Jambor  <mjambor at suse.cz>
 +
-+        PR fortran/71688
-+        * trans-decl.c (gfc_generate_function_code): Use get_create rather
-+        than create to get a call graph node.
++	PR fortran/71688
++	* trans-decl.c (gfc_generate_function_code): Use get_create rather
++	than create to get a call graph node.
 +
 +2016-07-19  Jakub Jelinek  <jakub at redhat.com>
 +
@@ -7630,7 +7657,7 @@ Index: gcc/ChangeLog
 +	Backport from mainline
 +	2016-07-06  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj at atmel.com>
 +
-+	PR target/50739	
++	PR target/50739
 +	* config/avr/avr.c (avr_asm_select_section): Strip off
 +	SECTION_DECLARED from flags when calling get_section.
 +
@@ -9277,7 +9304,7 @@ Index: gcc/ChangeLog
  2016-04-27  Release Manager
  
  	* GCC 6.1.0 released.
-@@ -49,7 +2110,7 @@
+@@ -49,7 +2137,7 @@
  	constant boolean.
  
  2016-04-20  Andrew Pinski  <apinski at cavium.com>
@@ -14335,6 +14362,117 @@ Index: gcc/testsuite/gcc.target/powerpc/p9-splat-3.c
 +/* { dg-final { scan-assembler-not "lxv "         } } */
 +/* { dg-final { scan-assembler-not "lxvx"         } } */
 +/* { dg-final { scan-assembler-not "lvx"          } } */
+Index: gcc/testsuite/gcc.target/powerpc/float128-cmp.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/float128-cmp.c	(.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/float128-cmp.c	(.../branches/gcc-6-branch)
+@@ -0,0 +1,106 @@
++/* { dg-do run { target { powerpc*-*-linux* } } } */
++/* { dg-require-effective-target ppc_float128_sw } */
++/* { dg-options "-mvsx -O2 -mfloat128" } */
++
++#include <stddef.h>
++#include <stdlib.h>
++
++#ifndef TYPE
++#define TYPE __float128
++#define NAN __builtin_nanq ("")
++#define SNAN __builtin_nansq ("")
++#else
++#define NAN __builtin_nan ("")
++#define SNAN __builtin_nans ("")
++#endif
++
++extern void check (TYPE a,
++		   TYPE b,
++		   int eq,
++		   int ne,
++		   int lt,
++		   int le,
++		   int gt,
++		   int ge,
++		   int i_lt,
++		   int i_le,
++		   int i_gt,
++		   int i_ge,
++		   int i_lg,
++		   int i_un) __attribute__((__noinline__));
++
++void
++check (TYPE a,
++       TYPE b,
++       int eq,
++       int ne,
++       int lt,
++       int le,
++       int gt,
++       int ge,
++       int i_lt,
++       int i_le,
++       int i_gt,
++       int i_ge,
++       int i_lg,
++       int i_un)
++{
++  if (eq != (a == b))
++    abort ();
++
++  if (ne != (a != b))
++    abort ();
++
++  if (lt != (a < b))
++    abort ();
++
++  if (le != (a <= b))
++    abort ();
++
++  if (gt != (a > b))
++    abort ();
++
++  if (ge != (a >= b))
++    abort ();
++
++  if (i_lt != __builtin_isless (a, b))
++    abort ();
++
++  if (i_le != __builtin_islessequal (a, b))
++    abort ();
++
++  if (i_gt != __builtin_isgreater (a, b))
++    abort ();
++
++  if (i_ge != __builtin_isgreaterequal (a, b))
++    abort ();
++
++  if (i_lg != __builtin_islessgreater (a, b))
++    abort ();
++
++  if (i_un != __builtin_isunordered (a, b))
++    abort ();
++}
++
++int main (void)
++{
++  TYPE one   = (TYPE) +1.0;
++  TYPE two   = (TYPE) +2.0;
++  TYPE pzero = (TYPE) +0.0;
++  TYPE mzero = (TYPE) -0.0;
++  TYPE nan   = (TYPE) NAN;
++  TYPE snan  = (TYPE) SNAN;
++
++  check (one,   two,   0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 0);
++  check (one,   one,   1, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 0);
++  check (one,   pzero, 0, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0);
++  check (mzero, pzero, 1, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 0);
++  check (nan,   one,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
++  check (one,   nan,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
++  check (nan,   nan,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
++  check (snan,  one,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
++  check (one,   snan,  0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
++  check (snan,  nan,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
++  check (nan,   snan,  0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
++  return 0;
++}
 Index: gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c
 ===================================================================
 --- a/src/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c	(.../tags/gcc_6_1_0_release)
@@ -20979,7 +21117,17 @@ Index: gcc/testsuite/ChangeLog
 ===================================================================
 --- a/src/gcc/testsuite/ChangeLog	(.../tags/gcc_6_1_0_release)
 +++ b/src/gcc/testsuite/ChangeLog	(.../branches/gcc-6-branch)
-@@ -1,3 +1,1324 @@
+@@ -1,3 +1,1334 @@
++2016-08-04  Michael Meissner  <meissner at linux.vnet.ibm.com>
++
++	Backport from trunk
++	2016-07-26  Michael Meissner  <meissner at linux.vnet.ibm.com>
++
++	PR target/71869
++	* gcc.target/powerpc/float128-cmp.c: New test to make sure that
++	IEEE built-in functions handle quiet and signalling NaNs
++	correctly.
++
 +2016-08-01  Georg-Johann Lay  <avr at gjlay.de>
 +
 +	Backport from 2016-06-16 trunk r237536, r237910.
@@ -24492,6 +24640,32 @@ Index: gcc/testsuite/g++.dg/warn/Wno-narrowing1.C
 +short offsets[1] = {
 +  ((char*) &(((struct s*)16)->y) - (char *)16),  // { dg-bogus "note" }
 +};
+Index: gcc/testsuite/g++.dg/concepts/memfun2.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/concepts/memfun2.C	(.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/concepts/memfun2.C	(.../branches/gcc-6-branch)
+@@ -0,0 +1,21 @@
++// PR c++/72415
++// { dg-options "-std=c++1z -fconcepts" }
++
++template<int... Indices>
++struct indices {};
++
++template<typename Dummy>
++struct foo_type {
++    template<int... Indices>
++    static void impl(indices<Indices...>)
++        requires (... && (Indices, true));
++
++    static auto caller()
++    { return impl(indices<0, 1, 2> {}); }
++};
++
++int main()
++{
++    // internal compiler error: in satisfy_predicate_constraint, at cp/constraint.cc:2013
++    foo_type<void>::caller();
++}
 Index: gcc/testsuite/g++.dg/concepts/req5.C
 ===================================================================
 --- a/src/gcc/testsuite/g++.dg/concepts/req5.C	(.../tags/gcc_6_1_0_release)
@@ -26825,7 +26999,13 @@ Index: gcc/cp/ChangeLog
 ===================================================================
 --- a/src/gcc/cp/ChangeLog	(.../tags/gcc_6_1_0_release)
 +++ b/src/gcc/cp/ChangeLog	(.../branches/gcc-6-branch)
-@@ -1,3 +1,513 @@
+@@ -1,3 +1,519 @@
++2016-08-04  Jason Merrill  <jason at redhat.com>
++
++	PR c++/72415
++	* pt.c (tsubst_pack_expansion): Pull a single pack expansion out
++	of the TREE_VEC.
++
 +2016-07-29  Jason Merrill  <jason at redhat.com>
 +
 +	PR c++/72457
@@ -28078,7 +28258,20 @@ Index: gcc/cp/pt.c
    int n = TREE_VEC_LENGTH (pack);
    tree vec = make_tree_vec (n + 1);
    for (int i = 0; i < n; ++i)
-@@ -12285,6 +12330,14 @@
+@@ -11079,6 +11124,12 @@
+       local_specializations = saved_local_specializations;
+     }
+   
++  /* If the dependent pack arguments were such that we end up with only a
++     single pack expansion again, there's no need to keep it in a TREE_VEC.  */
++  if (len == 1 && TREE_CODE (result) == TREE_VEC
++      && PACK_EXPANSION_P (TREE_VEC_ELT (result, 0)))
++    return TREE_VEC_ELT (result, 0);
++
+   return result;
+ }
+ 
+@@ -12285,6 +12336,14 @@
  	    local_p = true;
  	    /* Subsequent calls to pushdecl will fill this in.  */
  	    ctx = NULL_TREE;
@@ -28093,7 +28286,7 @@ Index: gcc/cp/pt.c
  	    spec = retrieve_local_specialization (t);
  	  }
  	/* If we already have the specialization we need, there is
-@@ -13151,13 +13204,20 @@
+@@ -13151,13 +13210,20 @@
  
  		if (code == BOUND_TEMPLATE_TEMPLATE_PARM)
  		  {
@@ -28116,7 +28309,7 @@ Index: gcc/cp/pt.c
  		  }
  	      }
  	    break;
-@@ -13678,10 +13738,17 @@
+@@ -13678,10 +13744,17 @@
      if (!object_type)
        object_type = current_class_type;
  
@@ -28138,7 +28331,7 @@ Index: gcc/cp/pt.c
      return baselink;
  }
  
-@@ -13740,8 +13807,10 @@
+@@ -13740,8 +13813,10 @@
      {
        if (is_template)
  	expr = build_min_nt_loc (loc, TEMPLATE_ID_EXPR, expr, template_args);
@@ -28151,7 +28344,7 @@ Index: gcc/cp/pt.c
      }
  
    if (!BASELINK_P (name) && !DECL_P (expr))
-@@ -13821,6 +13890,9 @@
+@@ -13821,6 +13896,9 @@
        && TREE_CODE (expr) != OFFSET_REF)
      expr = convert_from_reference (expr);
  
@@ -28161,7 +28354,7 @@ Index: gcc/cp/pt.c
    return expr;
  }
  
-@@ -13996,7 +14068,8 @@
+@@ -13996,7 +14074,8 @@
      case FUNCTION_DECL:
        if (DECL_LANG_SPECIFIC (t) && DECL_TEMPLATE_INFO (t))
  	r = tsubst (t, args, complain, in_decl);
@@ -28171,7 +28364,7 @@ Index: gcc/cp/pt.c
  	{
  	  r = retrieve_local_specialization (t);
  	  if (r == NULL_TREE)
-@@ -14040,14 +14113,9 @@
+@@ -14040,14 +14119,9 @@
  		  gcc_assert (cp_unevaluated_operand || TREE_STATIC (r)
  			      || decl_constant_var_p (r)
  			      || errorcount || sorrycount);
@@ -28189,7 +28382,7 @@ Index: gcc/cp/pt.c
  		}
  	      /* Remember this for subsequent uses.  */
  	      if (local_specializations)
-@@ -14145,7 +14213,8 @@
+@@ -14145,7 +14219,8 @@
  	      len = TREE_VEC_LENGTH (expanded);
  	      /* Set TREE_USED for the benefit of -Wunused.  */
  	      for (int i = 0; i < len; i++)
@@ -28199,7 +28392,7 @@ Index: gcc/cp/pt.c
  	    }
  
  	  if (expanded == error_mark_node)
-@@ -17376,6 +17445,7 @@
+@@ -17376,6 +17451,7 @@
  
    tree pattern = DECL_TEMPLATE_RESULT (gen_tmpl);
  
@@ -28207,7 +28400,7 @@ Index: gcc/cp/pt.c
    if (VAR_P (pattern))
      {
        /* We need to determine if we're using a partial or explicit
-@@ -17387,14 +17457,16 @@
+@@ -17387,14 +17463,16 @@
  	pattern = error_mark_node;
        else if (elt)
  	{
@@ -28228,7 +28421,7 @@ Index: gcc/cp/pt.c
    if (DECL_CLASS_SCOPE_P (gen_tmpl))
      pop_nested_class ();
    pop_from_top_level ();
-@@ -20848,36 +20920,6 @@
+@@ -20848,36 +20926,6 @@
    return decl;
  }
  
@@ -28265,7 +28458,7 @@ Index: gcc/cp/pt.c
  /* Return the most specialized of the template partial specializations
     which can produce TARGET, a specialization of some class or variable
     template.  The value returned is actually a TREE_LIST; the TREE_VALUE is
-@@ -21379,14 +21421,12 @@
+@@ -21379,14 +21427,12 @@
     to instantiate the DECL, we regenerate it.  */
  
  static void
@@ -28281,7 +28474,7 @@ Index: gcc/cp/pt.c
    code_pattern = DECL_TEMPLATE_RESULT (tmpl);
  
    /* Make sure that we can see identifiers, and compute access
-@@ -21702,7 +21742,7 @@
+@@ -21702,7 +21748,7 @@
      return d;
  
    gen_tmpl = most_general_template (tmpl);
@@ -28290,7 +28483,7 @@ Index: gcc/cp/pt.c
  
    if (tmpl != gen_tmpl)
      /* We should already have the extra args.  */
-@@ -21721,6 +21761,20 @@
+@@ -21721,6 +21767,20 @@
    /* Set TD to the template whose DECL_TEMPLATE_RESULT is the pattern
       for the instantiation.  */
    td = template_for_substitution (d);
@@ -28311,7 +28504,7 @@ Index: gcc/cp/pt.c
    code_pattern = DECL_TEMPLATE_RESULT (td);
  
    /* We should never be trying to instantiate a member of a class
-@@ -21733,9 +21787,7 @@
+@@ -21733,9 +21793,7 @@
         outside the class, we may have too many arguments.  Drop the
         ones we don't need.  The same is true for specializations.  */
      args = get_innermost_template_args
@@ -28322,7 +28515,7 @@ Index: gcc/cp/pt.c
  
    if (TREE_CODE (d) == FUNCTION_DECL)
      {
-@@ -21748,7 +21800,10 @@
+@@ -21748,7 +21806,10 @@
    else
      {
        deleted_p = false;
@@ -28334,7 +28527,7 @@ Index: gcc/cp/pt.c
      }
  
    /* We may be in the middle of deferred access check.  Disable it now.  */
-@@ -21901,7 +21956,7 @@
+@@ -21901,7 +21962,7 @@
  
    /* Regenerate the declaration in case the template has been modified
       by a subsequent redeclaration.  */
@@ -28343,7 +28536,7 @@ Index: gcc/cp/pt.c
  
    /* We already set the file and line above.  Reset them now in case
       they changed as a result of calling regenerate_decl_from_template.  */
-@@ -23628,7 +23683,10 @@
+@@ -23628,7 +23689,10 @@
    if (0 && flag_checking && cxx_dialect >= cxx11
        /* Don't do this during nsdmi parsing as it can lead to
  	 unexpected recursive instantiations.  */
@@ -28355,7 +28548,7 @@ Index: gcc/cp/pt.c
      fold_non_dependent_expr (expr);
  
    /* Preserve OVERLOADs; the functions must be available to resolve
-@@ -23766,7 +23824,7 @@
+@@ -23766,7 +23830,7 @@
    else
      expr = build_concept_check (build_overload (tmpl, NULL_TREE), type, args);
  
@@ -28364,7 +28557,7 @@ Index: gcc/cp/pt.c
    PLACEHOLDER_TYPE_CONSTRAINTS (type) = constr;
  
    /* Our canonical type depends on the constraint.  */
-@@ -23918,8 +23976,11 @@
+@@ -23918,8 +23982,11 @@
  /* Replace occurrences of 'auto' in TYPE with the appropriate type deduced
     from INIT.  AUTO_NODE is the TEMPLATE_TYPE_PARM used for 'auto' in TYPE.
     The CONTEXT determines the context in which auto deduction is performed
@@ -28377,7 +28570,7 @@ Index: gcc/cp/pt.c
  tree
  do_auto_deduction (tree type, tree init, tree auto_node,
                     tsubst_flags_t complain, auto_deduction_context context)
-@@ -23965,8 +24026,10 @@
+@@ -23965,8 +24032,10 @@
  
    if (AUTO_IS_DECLTYPE (auto_node))
      {
@@ -28390,7 +28583,7 @@ Index: gcc/cp/pt.c
        targs = make_tree_vec (1);
        TREE_VEC_ELT (targs, 0)
  	= finish_decltype_type (init, id, tf_warning_or_error);
-@@ -24023,9 +24086,20 @@
+@@ -24023,9 +24092,20 @@
    if (flag_concepts && !processing_template_decl)
      if (tree constr = PLACEHOLDER_TYPE_CONSTRAINTS (auto_node))
        {
@@ -28413,7 +28606,7 @@ Index: gcc/cp/pt.c
              if (complain & tf_warning_or_error)
                {
                  switch (context)
-@@ -24344,18 +24418,6 @@
+@@ -24344,18 +24424,6 @@
  
  static GTY (()) hash_table<constr_hasher> *decl_constraints;
  
@@ -28432,7 +28625,7 @@ Index: gcc/cp/pt.c
  /* Returns the template constraints of declaration T. If T is not
     constrained, return NULL_TREE. Note that T must be non-null. */
  
-@@ -24362,6 +24424,9 @@
+@@ -24362,6 +24430,9 @@
  tree
  get_constraints (tree t)
  {
@@ -28442,7 +28635,7 @@ Index: gcc/cp/pt.c
    gcc_assert (DECL_P (t));
    if (TREE_CODE (t) == TEMPLATE_DECL)
      t = DECL_TEMPLATE_RESULT (t);
-@@ -24383,7 +24448,7 @@
+@@ -24383,7 +24454,7 @@
  {
    if (!ci)
      return;
@@ -28451,7 +28644,7 @@ Index: gcc/cp/pt.c
    if (TREE_CODE (t) == TEMPLATE_DECL)
      t = DECL_TEMPLATE_RESULT (t);
    gcc_assert (!get_constraints (t));
-@@ -24409,12 +24474,244 @@
+@@ -24409,12 +24480,244 @@
      decl_constraints->clear_slot (slot);
  }
  
@@ -32834,6 +33027,20 @@ Index: gcc/ada/system-linux-ppc64.ads
     type Name is (SYSTEM_NAME_GNAT);
     System_Name : constant Name := SYSTEM_NAME_GNAT;
  
+Index: gcc/common/config/avr/avr-common.c
+===================================================================
+--- a/src/gcc/common/config/avr/avr-common.c	(.../tags/gcc_6_1_0_release)
++++ b/src/gcc/common/config/avr/avr-common.c	(.../branches/gcc-6-branch)
+@@ -28,6 +28,9 @@
+ static const struct default_options avr_option_optimization_table[] =
+   {
+     { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
++    // The only effect of -fcaller-saves might be that it triggers
++    // a frame without need when it tries to be smart around calls.
++    { OPT_LEVELS_ALL, OPT_fcaller_saves, NULL, 0 },
+     { OPT_LEVELS_NONE, 0, NULL, 0 }
+   };
+ 
 Index: gcc/timevar.h
 ===================================================================
 --- a/src/gcc/timevar.h	(.../tags/gcc_6_1_0_release)
@@ -823434,6 +823641,111 @@ Index: gcc/config/i386/i386-builtin-types.def
  
  DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V2DF_V2DF, PTEST)
  DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V2DI_V2DI, PTEST)
+Index: gcc/config/i386/avx512fintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512fintrin.h	(.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512fintrin.h	(.../branches/gcc-6-branch)
+@@ -9130,9 +9130,9 @@
+ 					   (__mmask8)-1))
+ 
+ #define _mm512_cmp_epi32_mask(X, Y, P)					\
+-  ((__mmask8) __builtin_ia32_cmpd512_mask ((__v16si)(__m512i)(X),	\
+-					   (__v16si)(__m512i)(Y), (int)(P),\
+-					   (__mmask16)-1))
++  ((__mmask16) __builtin_ia32_cmpd512_mask ((__v16si)(__m512i)(X),	\
++					    (__v16si)(__m512i)(Y), (int)(P), \
++					    (__mmask16)-1))
+ 
+ #define _mm512_cmp_epu64_mask(X, Y, P)					\
+   ((__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di)(__m512i)(X),	\
+@@ -9140,66 +9140,66 @@
+ 					    (__mmask8)-1))
+ 
+ #define _mm512_cmp_epu32_mask(X, Y, P)					\
+-  ((__mmask8) __builtin_ia32_ucmpd512_mask ((__v16si)(__m512i)(X),	\
+-					    (__v16si)(__m512i)(Y), (int)(P),\
+-					    (__mmask16)-1))
++  ((__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si)(__m512i)(X),	\
++					     (__v16si)(__m512i)(Y), (int)(P), \
++					     (__mmask16)-1))
+ 
+-#define _mm512_cmp_round_pd_mask(X, Y, P, R)					\
++#define _mm512_cmp_round_pd_mask(X, Y, P, R)				\
+   ((__mmask8) __builtin_ia32_cmppd512_mask ((__v8df)(__m512d)(X),	\
+ 					    (__v8df)(__m512d)(Y), (int)(P),\
+ 					    (__mmask8)-1, R))
+ 
+-#define _mm512_cmp_round_ps_mask(X, Y, P, R)					\
++#define _mm512_cmp_round_ps_mask(X, Y, P, R)				\
+   ((__mmask16) __builtin_ia32_cmpps512_mask ((__v16sf)(__m512)(X),	\
+ 					     (__v16sf)(__m512)(Y), (int)(P),\
+ 					     (__mmask16)-1, R))
+ 
+-#define _mm512_mask_cmp_epi64_mask(M, X, Y, P)					\
++#define _mm512_mask_cmp_epi64_mask(M, X, Y, P)				\
+   ((__mmask8) __builtin_ia32_cmpq512_mask ((__v8di)(__m512i)(X),	\
+ 					   (__v8di)(__m512i)(Y), (int)(P),\
+ 					   (__mmask8)M))
+ 
+-#define _mm512_mask_cmp_epi32_mask(M, X, Y, P)					\
+-  ((__mmask8) __builtin_ia32_cmpd512_mask ((__v16si)(__m512i)(X),	\
+-					   (__v16si)(__m512i)(Y), (int)(P),\
+-					   (__mmask16)M))
++#define _mm512_mask_cmp_epi32_mask(M, X, Y, P)				\
++  ((__mmask16) __builtin_ia32_cmpd512_mask ((__v16si)(__m512i)(X),	\
++					    (__v16si)(__m512i)(Y), (int)(P), \
++					    (__mmask16)M))
+ 
+-#define _mm512_mask_cmp_epu64_mask(M, X, Y, P)					\
++#define _mm512_mask_cmp_epu64_mask(M, X, Y, P)				\
+   ((__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di)(__m512i)(X),	\
+ 					    (__v8di)(__m512i)(Y), (int)(P),\
+ 					    (__mmask8)M))
+ 
+-#define _mm512_mask_cmp_epu32_mask(M, X, Y, P)					\
+-  ((__mmask8) __builtin_ia32_ucmpd512_mask ((__v16si)(__m512i)(X),	\
+-					    (__v16si)(__m512i)(Y), (int)(P),\
+-					    (__mmask16)M))
++#define _mm512_mask_cmp_epu32_mask(M, X, Y, P)				\
++  ((__mmask16) __builtin_ia32_ucmpd512_mask ((__v16si)(__m512i)(X),	\
++					     (__v16si)(__m512i)(Y), (int)(P), \
++					     (__mmask16)M))
+ 
+-#define _mm512_mask_cmp_round_pd_mask(M, X, Y, P, R)					\
++#define _mm512_mask_cmp_round_pd_mask(M, X, Y, P, R)			\
+   ((__mmask8) __builtin_ia32_cmppd512_mask ((__v8df)(__m512d)(X),	\
+ 					    (__v8df)(__m512d)(Y), (int)(P),\
+ 					    (__mmask8)M, R))
+ 
+-#define _mm512_mask_cmp_round_ps_mask(M, X, Y, P, R)					\
++#define _mm512_mask_cmp_round_ps_mask(M, X, Y, P, R)			\
+   ((__mmask16) __builtin_ia32_cmpps512_mask ((__v16sf)(__m512)(X),	\
+ 					     (__v16sf)(__m512)(Y), (int)(P),\
+ 					     (__mmask16)M, R))
+ 
+-#define _mm_cmp_round_sd_mask(X, Y, P, R)					\
++#define _mm_cmp_round_sd_mask(X, Y, P, R)				\
+   ((__mmask8) __builtin_ia32_cmpsd_mask ((__v2df)(__m128d)(X),		\
+ 					 (__v2df)(__m128d)(Y), (int)(P),\
+ 					 (__mmask8)-1, R))
+ 
+-#define _mm_mask_cmp_round_sd_mask(M, X, Y, P, R)					\
++#define _mm_mask_cmp_round_sd_mask(M, X, Y, P, R)			\
+   ((__mmask8) __builtin_ia32_cmpsd_mask ((__v2df)(__m128d)(X),		\
+ 					 (__v2df)(__m128d)(Y), (int)(P),\
+ 					 (M), R))
+ 
+-#define _mm_cmp_round_ss_mask(X, Y, P, R)					\
++#define _mm_cmp_round_ss_mask(X, Y, P, R)				\
+   ((__mmask8) __builtin_ia32_cmpss_mask ((__v4sf)(__m128)(X),		\
+ 					 (__v4sf)(__m128)(Y), (int)(P), \
+ 					 (__mmask8)-1, R))
+ 
+-#define _mm_mask_cmp_round_ss_mask(M, X, Y, P, R)					\
++#define _mm_mask_cmp_round_ss_mask(M, X, Y, P, R)			\
+   ((__mmask8) __builtin_ia32_cmpss_mask ((__v4sf)(__m128)(X),		\
+ 					 (__v4sf)(__m128)(Y), (int)(P), \
+ 					 (M), R))
 Index: gcc/config/i386/driver-i386.c
 ===================================================================
 --- a/src/gcc/config/i386/driver-i386.c	(.../tags/gcc_6_1_0_release)
@@ -828265,7 +828577,117 @@ Index: gcc/config/rs6000/rs6000.c
  	return output_vec_const_move (operands);
      }
  
-@@ -21747,6 +22583,101 @@
+@@ -20732,8 +21568,8 @@
+   else if (!TARGET_FLOAT128_HW && FLOAT128_VECTOR_P (mode))
+     {
+       rtx libfunc = NULL_RTX;
+-      bool uneq_or_ltgt = false;
+-      rtx dest = gen_reg_rtx (SImode);
++      bool check_nan = false;
++      rtx dest;
+ 
+       switch (code)
+ 	{
+@@ -20760,21 +21596,23 @@
+ 
+ 	case UNGE:
+ 	case UNGT:
+-	  libfunc = optab_libfunc (le_optab, mode);
++	  check_nan = true;
++	  libfunc = optab_libfunc (ge_optab, mode);
+ 	  code = (code == UNGE) ? GE : GT;
+ 	  break;
+ 
+ 	case UNLE:
+ 	case UNLT:
+-	  libfunc = optab_libfunc (ge_optab, mode);
++	  check_nan = true;
++	  libfunc = optab_libfunc (le_optab, mode);
+ 	  code = (code == UNLE) ? LE : LT;
+ 	  break;
+ 
+ 	case UNEQ:
+ 	case LTGT:
+-	  libfunc = optab_libfunc (le_optab, mode);
+-	  uneq_or_ltgt = true;
+-	  code = (code = UNEQ) ? NE : EQ;
++	  check_nan = true;
++	  libfunc = optab_libfunc (eq_optab, mode);
++	  code = (code = UNEQ) ? EQ : NE;
+ 	  break;
+ 
+ 	default:
+@@ -20782,21 +21620,56 @@
+ 	}
+ 
+       gcc_assert (libfunc);
+-      dest = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
+-				      SImode, 2, op0, mode, op1, mode);
+ 
+-      /* If this is UNEQ or LTGT, we call __lekf2, which returns -1 for less
+-	 than, 0 for equal, +1 for greater, and +2 for nan.  We add 1, to give
+-	 a value of 0..3, and then do and AND immediate of 1 to isolate whether
+-	 it is 0/Nan (i.e. bottom bit is 0), or less than/greater than
+-	 (i.e. bottom bit is 1).  */
+-      if (uneq_or_ltgt)
++      if (!check_nan)
++	dest = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
++					SImode, 2, op0, mode, op1, mode);
++
++      /* The library signals an exception for signalling NaNs, so we need to
++	 handle isgreater, etc. by first checking isordered.  */
++      else
+ 	{
+-	  rtx add_result = gen_reg_rtx (SImode);
+-	  rtx and_result = gen_reg_rtx (SImode);
+-	  emit_insn (gen_addsi3 (add_result, dest, GEN_INT (1)));
+-	  emit_insn (gen_andsi3 (and_result, add_result, GEN_INT (1)));
+-	  dest = and_result;
++	  rtx ne_rtx, normal_dest, unord_dest;
++	  rtx unord_func = optab_libfunc (unord_optab, mode);
++	  rtx join_label = gen_label_rtx ();
++	  rtx join_ref = gen_rtx_LABEL_REF (VOIDmode, join_label);
++	  rtx unord_cmp = gen_reg_rtx (comp_mode);
++
++
++	  /* Test for either value being a NaN.  */
++	  gcc_assert (unord_func);
++	  unord_dest = emit_library_call_value (unord_func, NULL_RTX, LCT_CONST,
++						SImode, 2, op0, mode, op1,
++						mode);
++
++	  /* Set value (0) if either value is a NaN, and jump to the join
++	     label.  */
++	  dest = gen_reg_rtx (SImode);
++	  emit_move_insn (dest, const1_rtx);
++	  emit_insn (gen_rtx_SET (unord_cmp,
++				  gen_rtx_COMPARE (comp_mode, unord_dest,
++						   const0_rtx)));
++
++	  ne_rtx = gen_rtx_NE (comp_mode, unord_cmp, const0_rtx);
++	  emit_jump_insn (gen_rtx_SET (pc_rtx,
++				       gen_rtx_IF_THEN_ELSE (VOIDmode, ne_rtx,
++							     join_ref,
++							     pc_rtx)));
++
++	  /* Do the normal comparison, knowing that the values are not
++	     NaNs.  */
++	  normal_dest = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
++						 SImode, 2, op0, mode, op1,
++						 mode);
++
++	  emit_insn (gen_cstoresi4 (dest,
++				    gen_rtx_fmt_ee (code, SImode, normal_dest,
++						    const0_rtx),
++				    normal_dest, const0_rtx));
++
++	  /* Join NaN and non-Nan paths.  Compare dest against 0.  */
++	  emit_label (join_label);
++	  code = NE;
+ 	}
+ 
+       emit_insn (gen_rtx_SET (compare_result,
+@@ -21747,6 +22620,101 @@
    return 1;
  }
  
@@ -828367,7 +828789,7 @@ Index: gcc/config/rs6000/rs6000.c
  /* Emit a conditional move: move TRUE_COND to DEST if OP of the
     operands of the last comparison is nonzero/true, FALSE_COND if it
     is zero/false.  Return 0 if the hardware has no such operation.  */
-@@ -21773,6 +22704,18 @@
+@@ -21773,6 +22741,18 @@
    if (GET_MODE (false_cond) != result_mode)
      return 0;
  
@@ -828386,7 +828808,7 @@ Index: gcc/config/rs6000/rs6000.c
    /* Don't allow using floating point comparisons for integer results for
       now.  */
    if (FLOAT_MODE_P (compare_mode) && !FLOAT_MODE_P (result_mode))
-@@ -22034,6 +22977,48 @@
+@@ -22034,6 +23014,48 @@
      emit_move_insn (dest, target);
  }
  
@@ -828435,7 +828857,7 @@ Index: gcc/config/rs6000/rs6000.c
  /* A subroutine of the atomic operation splitters.  Jump to LABEL if
     COND is true.  Mark the jump as unlikely to be taken.  */
  
-@@ -25949,7 +26934,7 @@
+@@ -25949,7 +26971,7 @@
  	if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
  	  {
  	    rtx areg, savereg, mem;
@@ -828444,7 +828866,7 @@ Index: gcc/config/rs6000/rs6000.c
  
  	    offset = (info->altivec_save_offset + frame_off
  		      + 16 * (i - info->first_altivec_reg_save));
-@@ -25956,18 +26941,30 @@
+@@ -25956,18 +26978,30 @@
  
  	    savereg = gen_rtx_REG (V4SImode, i);
  
@@ -828485,7 +828907,7 @@ Index: gcc/config/rs6000/rs6000.c
  
  	    rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
  				  areg, GEN_INT (offset));
-@@ -26687,23 +27684,35 @@
+@@ -26687,23 +27721,35 @@
  	  for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
  	    if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
  	      {
@@ -828535,7 +828957,7 @@ Index: gcc/config/rs6000/rs6000.c
  	      }
  	}
  
-@@ -26890,23 +27899,35 @@
+@@ -26890,23 +27936,35 @@
  	  for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
  	    if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
  	      {
@@ -828585,7 +829007,7 @@ Index: gcc/config/rs6000/rs6000.c
  	      }
  	}
  
-@@ -27724,6 +28745,11 @@
+@@ -27724,6 +28782,11 @@
  				   const0_rtx, const0_rtx));
    call_fusage = NULL_RTX;
    use_reg (&call_fusage, r12);
@@ -828597,7 +829019,7 @@ Index: gcc/config/rs6000/rs6000.c
    add_function_usage_to (insn, call_fusage);
    emit_insn (gen_frame_load (r0, r1, info->lr_save_offset));
    insn = emit_move_insn (lr, r0);
-@@ -28763,7 +29789,7 @@
+@@ -28763,7 +29826,7 @@
  
  /* The following variable value is the last issued insn.  */
  
@@ -828606,7 +829028,7 @@ Index: gcc/config/rs6000/rs6000.c
  
  /* The following variable helps to balance issuing of load and
     store instructions */
-@@ -28770,6 +29796,13 @@
+@@ -28770,6 +29833,13 @@
  
  static int load_store_pendulum;
  
@@ -828620,7 +829042,7 @@ Index: gcc/config/rs6000/rs6000.c
  /* Power4 load update and store update instructions are cracked into a
     load or store and an integer insn which are executed in the same cycle.
     Branches have their own dispatch slot which does not count against the
-@@ -28844,7 +29877,7 @@
+@@ -28844,7 +29914,7 @@
  	   some cycles later.  */
  
  	/* Separate a load from a narrower, dependent store.  */
@@ -828629,7 +829051,7 @@ Index: gcc/config/rs6000/rs6000.c
  	    && GET_CODE (PATTERN (insn)) == SET
  	    && GET_CODE (PATTERN (dep_insn)) == SET
  	    && GET_CODE (XEXP (PATTERN (insn), 1)) == MEM
-@@ -29070,7 +30103,9 @@
+@@ -29070,7 +30140,9 @@
            switch (attr_type)
              {
              case TYPE_FP:
@@ -828640,7 +829062,7 @@ Index: gcc/config/rs6000/rs6000.c
                  return 1;
                break;
              case TYPE_FPLOAD:
-@@ -29082,6 +30117,8 @@
+@@ -29082,6 +30154,8 @@
                break;
              }
          }
@@ -828649,7 +829071,7 @@ Index: gcc/config/rs6000/rs6000.c
      case REG_DEP_ANTI:
        /* Anti dependency; DEP_INSN reads a register that INSN writes some
  	 cycles later.  */
-@@ -29454,8 +30491,9 @@
+@@ -29454,8 +30528,9 @@
    case CPU_POWER7:
      return 5;
    case CPU_POWER8:
@@ -828660,7 +829082,7 @@ Index: gcc/config/rs6000/rs6000.c
    default:
      return 1;
    }
-@@ -29613,6 +30651,28 @@
+@@ -29613,6 +30688,28 @@
    return is_store_insn1 (PATTERN (insn), str_mem);
  }
  
@@ -828689,7 +829111,7 @@ Index: gcc/config/rs6000/rs6000.c
  /* Returns whether the dependence between INSN and NEXT is considered
     costly by the given target.  */
  
-@@ -29689,6 +30749,229 @@
+@@ -29689,6 +30786,229 @@
    return insn;
  }
  
@@ -828919,7 +829341,7 @@ Index: gcc/config/rs6000/rs6000.c
  /* We are about to begin issuing insns for this clock cycle. */
  
  static int
-@@ -29920,6 +31203,11 @@
+@@ -29920,6 +31240,11 @@
          }
      }
  
@@ -828931,7 +829353,7 @@ Index: gcc/config/rs6000/rs6000.c
    return cached_can_issue_more;
  }
  
-@@ -30088,7 +31376,6 @@
+@@ -30088,7 +31413,6 @@
          }
        break;
      case PROCESSOR_POWER8:
@@ -828939,7 +829361,7 @@ Index: gcc/config/rs6000/rs6000.c
        type = get_attr_type (insn);
  
        switch (type)
-@@ -30219,7 +31506,6 @@
+@@ -30219,7 +31543,6 @@
      }
      break;
    case PROCESSOR_POWER8:
@@ -828947,7 +829369,7 @@ Index: gcc/config/rs6000/rs6000.c
      type = get_attr_type (insn);
  
      switch (type)
-@@ -30338,7 +31624,7 @@
+@@ -30338,7 +31661,7 @@
  
        /* Do we have a special group ending nop? */
        if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7
@@ -828956,7 +829378,7 @@ Index: gcc/config/rs6000/rs6000.c
  	{
  	  nop = gen_group_ending_nop ();
  	  emit_insn_before (nop, next_insn);
-@@ -30592,8 +31878,10 @@
+@@ -30592,8 +31915,10 @@
  		     int sched_verbose ATTRIBUTE_UNUSED,
  		     int max_ready ATTRIBUTE_UNUSED)
  {
@@ -828968,7 +829390,7 @@ Index: gcc/config/rs6000/rs6000.c
  }
  
  /* The following function is called at the end of scheduling BB.
-@@ -30634,14 +31922,16 @@
+@@ -30634,14 +31959,16 @@
      }
  }
  
@@ -828988,7 +829410,7 @@ Index: gcc/config/rs6000/rs6000.c
  typedef rs6000_sched_context_def *rs6000_sched_context_t;
  
  /* Allocate store for new scheduling context.  */
-@@ -30661,8 +31951,10 @@
+@@ -30661,8 +31988,10 @@
    if (clean_p)
      {
        sc->cached_can_issue_more = 0;
@@ -829000,7 +829422,7 @@ Index: gcc/config/rs6000/rs6000.c
      }
    else
      {
-@@ -30669,6 +31961,8 @@
+@@ -30669,6 +31998,8 @@
        sc->cached_can_issue_more = cached_can_issue_more;
        sc->last_scheduled_insn = last_scheduled_insn;
        sc->load_store_pendulum = load_store_pendulum;
@@ -829009,7 +829431,7 @@ Index: gcc/config/rs6000/rs6000.c
      }
  }
  
-@@ -30683,6 +31977,8 @@
+@@ -30683,6 +32014,8 @@
    cached_can_issue_more = sc->cached_can_issue_more;
    last_scheduled_insn = sc->last_scheduled_insn;
    load_store_pendulum = sc->load_store_pendulum;
@@ -829018,7 +829440,7 @@ Index: gcc/config/rs6000/rs6000.c
  }
  
  /* Free _SC.  */
-@@ -33448,17 +34744,25 @@
+@@ -33448,17 +34781,25 @@
    if (!REG_P (target))
      tmp = gen_reg_rtx (mode);
  
@@ -829054,7 +829476,7 @@ Index: gcc/config/rs6000/rs6000.c
  
    /* Copy into target, possibly by way of a register.  */
    if (!REG_P (target))
-@@ -33869,8 +35173,14 @@
+@@ -33869,8 +35210,14 @@
    machine_mode inner = GET_MODE_INNER (mode);
    unsigned int inner_bytes = GET_MODE_UNIT_SIZE (mode);
  
@@ -829070,7 +829492,7 @@ Index: gcc/config/rs6000/rs6000.c
    else
      {
        regno = GP_ARG_RETURN;
-@@ -33992,7 +35302,8 @@
+@@ -33992,7 +35339,8 @@
    if (DECIMAL_FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
      /* _Decimal128 must use an even/odd register pair.  */
      regno = (mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN;
@@ -829080,7 +829502,7 @@ Index: gcc/config/rs6000/rs6000.c
  	   && ((TARGET_SINGLE_FLOAT && (mode == SFmode)) || TARGET_DOUBLE_FLOAT))
      regno = FP_ARG_RETURN;
    else if (TREE_CODE (valtype) == COMPLEX_TYPE
-@@ -34056,7 +35367,7 @@
+@@ -34056,7 +35404,7 @@
  static bool
  rs6000_lra_p (void)
  {
@@ -829089,7 +829511,7 @@ Index: gcc/config/rs6000/rs6000.c
  }
  
  /* Given FROM and TO register numbers, say whether this elimination is allowed.
-@@ -34417,9 +35728,11 @@
+@@ -34417,9 +35765,11 @@
    { "power8-fusion",		OPTION_MASK_P8_FUSION,		false, true  },
    { "power8-fusion-sign",	OPTION_MASK_P8_FUSION_SIGN,	false, true  },
    { "power8-vector",		OPTION_MASK_P8_VECTOR,		false, true  },
@@ -829102,7 +829524,7 @@ Index: gcc/config/rs6000/rs6000.c
    { "power9-vector",		OPTION_MASK_P9_VECTOR,		false, true  },
    { "powerpc-gfxopt",		OPTION_MASK_PPC_GFXOPT,		false, true  },
    { "powerpc-gpopt",		OPTION_MASK_PPC_GPOPT,		false, true  },
-@@ -34474,11 +35787,14 @@
+@@ -34474,11 +35824,14 @@
    { "popcntd",		 RS6000_BTM_POPCNTD,	false, false },
    { "cell",		 RS6000_BTM_CELL,	false, false },
    { "power8-vector",	 RS6000_BTM_P8_VECTOR,	false, false },
@@ -829117,7 +829539,7 @@ Index: gcc/config/rs6000/rs6000.c
  };
  
  /* Option variables that we want to support inside attribute((target)) and
-@@ -35049,7 +36365,9 @@
+@@ -35049,7 +36402,9 @@
    size_t i;
    size_t start_column = 0;
    size_t cur_column;
@@ -829128,7 +829550,7 @@ Index: gcc/config/rs6000/rs6000.c
    const char *comma = "";
  
    if (indent)
-@@ -35067,27 +36385,45 @@
+@@ -35067,27 +36422,45 @@
    cur_column = start_column;
    for (i = 0; i < num_elements; i++)
      {

-- 
Alioth's /usr/local/bin/git-commit-notice on /srv/git.debian.org/git/reproducible/gcc-6.git



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