[gcc-6] 187/401: * GCC 6.2 release candidate 1. * Update to SVN 20160815 (r239482, 6.1.1) from the gcc-6-branch.
Ximin Luo
infinity0 at debian.org
Wed Apr 5 15:49:07 UTC 2017
This is an automated email from the git hooks/post-receive script.
infinity0 pushed a commit to branch pu/reproducible_builds
in repository gcc-6.
commit 2da0a4ca1f710e4a89cb21d6611c20d9df1fb440
Author: doko <doko at 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca>
Date: Mon Aug 15 15:53:15 2016 +0000
* GCC 6.2 release candidate 1.
* Update to SVN 20160815 (r239482, 6.1.1) from the gcc-6-branch.
git-svn-id: svn://anonscm.debian.org/gcccvs/branches/sid/gcc-6@8950 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
---
debian/changelog | 18 +-
debian/patches/gccgo-test-linking.diff | 57 -
debian/patches/pr68273.diff | 18 -
debian/patches/svn-updates.diff | 7974 +++++++++++++++++++++++++++++++-
debian/rules.patch | 2 -
5 files changed, 7752 insertions(+), 317 deletions(-)
diff --git a/debian/changelog b/debian/changelog
index 841d5aa..a844a72 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,10 +1,20 @@
gcc-6 (6.1.1-12) UNRELEASED; urgency=medium
- [ Matthias Klose ]
- * Update to SVN 20160805 (r239167, 6.1.1) from the gcc-6-branch.
+ * GCC 6.2 release candidate 1.
+ * Update to SVN 20160815 (r239482, 6.1.1) from the gcc-6-branch.
Fix PR target/71869 (PPC), PR target/72805 (x86), PR target/70677 (AVR),
- PR c++/72415.
+ PR c++/72415, PR sanitizer/71042, PR libstdc++/71964, PR libstdc++/70940,
+ PR c/67410, PR c/72816, PR driver/72765, PR debug/71906,
+ PR tree-optimization/73434, PR tree-optimization/72824, PR target/76342,
+ PR target/72843, PR c/71512, PR tree-optimization/71083, PR target/72819,
+ PR target/72853, PR tree-optimization/72824, PR ipa/71981, PR ipa/68273,
+ PR tree-optimization/71881, PR target/72802, PR target/72802,
+ PR rtl-optimization/71976, PR c++/71972, PR c++/72868, PR c++/73456,
+ PR c++/72800, PR c++/68724, PR debug/71906, PR fortran/71936,
+ PR fortran/72698, PR fortran/70524, PR fortran/71795, PR libgfortran/71123,
+ PR libgfortran/73142.
+ [ Matthias Klose ]
* Fix running the libjava testsuite.
* Revert fix for PR target/55947, causing PR libstdc++/72813. LP: #1610220.
* Update the Linaro support to the 6-2016.07 snapshot.
@@ -13,7 +23,7 @@ gcc-6 (6.1.1-12) UNRELEASED; urgency=medium
* Replace proposed fix for PR ipa/68273 by the corresponding patch taken
from trunk.
- -- Matthias Klose <doko at debian.org> Fri, 05 Aug 2016 15:06:19 +0200
+ -- Matthias Klose <doko at debian.org> Mon, 15 Aug 2016 17:51:10 +0200
gcc-6 (6.1.1-11) unstable; urgency=medium
diff --git a/debian/patches/gccgo-test-linking.diff b/debian/patches/gccgo-test-linking.diff
deleted file mode 100644
index 75eb6e8..0000000
--- a/debian/patches/gccgo-test-linking.diff
+++ /dev/null
@@ -1,57 +0,0 @@
-# DP: cmd/go: deduplicate gccgo afiles by package path, not *Package.
-
---- a/src/libgo/go/cmd/go/build.go
-+++ b/src/libgo/go/cmd/go/build.go
-@@ -2632,10 +2632,9 @@
- func (tools gccgoToolchain) ld(b *builder, root *action, out string, allactions []*action, mainpkg string, ofiles []string) error {
- // gccgo needs explicit linking with all package dependencies,
- // and all LDFLAGS from cgo dependencies.
-- apackagesSeen := make(map[*Package]bool)
-+ apackagePathsSeen := make(map[string]bool)
- afiles := []string{}
- shlibs := []string{}
-- xfiles := []string{}
- ldflags := b.gccArchArgs()
- cgoldflags := []string{}
- usesCgo := false
-@@ -2714,10 +2713,10 @@
- // rather than the 'build' location (which may not exist any
- // more). We still need to traverse the dependencies of the
- // build action though so saying
-- // if apackagesSeen[a.p] { return }
-+ // if apackagePathsSeen[a.p.ImportPath] { return }
- // doesn't work.
-- if !apackagesSeen[a.p] {
-- apackagesSeen[a.p] = true
-+ if !apackagePathsSeen[a.p.ImportPath] {
-+ apackagePathsSeen[a.p.ImportPath] = true
- target := a.target
- if len(a.p.CgoFiles) > 0 {
- target, err = readAndRemoveCgoFlags(target)
-@@ -2725,17 +2724,7 @@
- return
- }
- }
-- if a.p.fake && a.p.external {
-- // external _tests, if present must come before
-- // internal _tests. Store these on a separate list
-- // and place them at the head after this loop.
-- xfiles = append(xfiles, target)
-- } else if a.p.fake {
-- // move _test files to the top of the link order
-- afiles = append([]string{target}, afiles...)
-- } else {
-- afiles = append(afiles, target)
-- }
-+ afiles = append(afiles, target)
- }
- }
- if strings.HasSuffix(a.target, ".so") {
-@@ -2755,7 +2744,6 @@
- return err
- }
- }
-- afiles = append(xfiles, afiles...)
-
- for _, a := range allactions {
- // Gather CgoLDFLAGS, but not from standard packages.
diff --git a/debian/patches/pr68273.diff b/debian/patches/pr68273.diff
deleted file mode 100644
index 2aed63b..0000000
--- a/debian/patches/pr68273.diff
+++ /dev/null
@@ -1,18 +0,0 @@
-2016-08-09 Richard Biener <rguenther at suse.de>
-
- PR ipa/68273
- * ipa-prop.c (ipa_modify_formal_parameters): Build
- parameter types with natural alignment also for the
- over-aligned case.
-
---- a/src/gcc/ipa-prop.c
-+++ b/src/gcc/ipa-prop.c
-@@ -3910,7 +3910,7 @@ ipa_modify_formal_parameters (tree fndecl, ipa_parm_adjustment_vec adjustments)
- if (is_gimple_reg_type (ptype))
- {
- unsigned malign = GET_MODE_ALIGNMENT (TYPE_MODE (ptype));
-- if (TYPE_ALIGN (ptype) < malign)
-+ if (TYPE_ALIGN (ptype) != malign)
- ptype = build_aligned_type (ptype, malign);
- }
- }
diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff
index 92bd98e..3e8360a 100644
--- a/debian/patches/svn-updates.diff
+++ b/debian/patches/svn-updates.diff
@@ -1,10 +1,10 @@
-# DP: updates from the 6 branch upto 20160805 (r239167).
+# DP: updates from the 6 branch upto 20160815 (r239482).
last_update()
{
cat > ${dir}LAST_UPDATED <EOF
-Fri Aug 5 14:57:18 CEST 2016
-Fri Aug 5 12:57:18 UTC 2016 (revision 239167)
+Mon Aug 15 17:27:59 CEST 2016
+Mon Aug 15 15:27:59 UTC 2016 (revision 239482)
EOF
}
@@ -1634,7 +1634,13 @@ Index: libsanitizer/ChangeLog
===================================================================
--- a/src/libsanitizer/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/libsanitizer/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,12 @@
+@@ -1,3 +1,18 @@
++2016-08-12 Jakub Jelinek <jakub at redhat.com>
++
++ PR sanitizer/71042
++ * tsan/tsan_platform_linux.cc: Cherry-pick upstream r278292.
++ * tsan/tsan_rtl_aarch64.S: Likewise.
++
+2016-05-18 Jakub Jelinek <jakub at redhat.com>
+
+ Backported from mainline
@@ -1647,6 +1653,151 @@ Index: libsanitizer/ChangeLog
2016-04-27 Release Manager
* GCC 6.1.0 released.
+Index: libsanitizer/tsan/tsan_rtl_aarch64.S
+===================================================================
+--- a/src/libsanitizer/tsan/tsan_rtl_aarch64.S (.../tags/gcc_6_1_0_release)
++++ b/src/libsanitizer/tsan/tsan_rtl_aarch64.S (.../branches/gcc-6-branch)
+@@ -1,4 +1,62 @@
+ #include "sanitizer_common/sanitizer_asm.h"
++
++.section .bss
++.type __tsan_pointer_chk_guard, %object
++.size __tsan_pointer_chk_guard, 8
++__tsan_pointer_chk_guard:
++.zero 8
++
++.section .text
++
++// GLIBC mangles the function pointers in jmp_buf (used in {set,long}*jmp
++// functions) by XORing them with a random guard pointer. For AArch64 it is a
++// global variable rather than a TCB one (as for x86_64/powerpc) and althought
++// its value is exported by the loader, it lies within a private GLIBC
++// namespace (meaning it should be only used by GLIBC itself and the ABI is
++// not stable). So InitializeGuardPtr obtains the pointer guard value by
++// issuing a setjmp and checking the resulting pointers values against the
++// original ones.
++.hidden _Z18InitializeGuardPtrv
++.global _Z18InitializeGuardPtrv
++.type _Z18InitializeGuardPtrv, @function
++_Z18InitializeGuardPtrv:
++ CFI_STARTPROC
++ // Allocates a jmp_buf for the setjmp call.
++ stp x29, x30, [sp, -336]!
++ CFI_DEF_CFA_OFFSET (336)
++ CFI_OFFSET (29, -336)
++ CFI_OFFSET (30, -328)
++ add x29, sp, 0
++ CFI_DEF_CFA_REGISTER (29)
++ add x0, x29, 24
++
++ // Call libc setjmp that mangle the stack pointer value
++ adrp x1, :got:_ZN14__interception12real__setjmpE
++ ldr x1, [x1, #:got_lo12:_ZN14__interception12real__setjmpE]
++ ldr x1, [x1]
++ blr x1
++
++ // glibc setjmp mangles both the frame pointer (FP, pc+4 on blr) and the
++ // stack pointer (SP). FP will be placed on ((uintptr*)jmp_buf)[11] and
++ // SP at ((uintptr*)jmp_buf)[13].
++ // The mangle operation is just 'value' xor 'pointer guard value' and
++ // if we know the original value (SP) and the expected one, we can derive
++ // the guard pointer value.
++ mov x0, sp
++
++ // Loads the mangled SP pointer.
++ ldr x1, [x29, 128]
++ eor x0, x0, x1
++ adrp x2, __tsan_pointer_chk_guard
++ str x0, [x2, #:lo12:__tsan_pointer_chk_guard]
++ ldp x29, x30, [sp], 336
++ CFI_RESTORE (30)
++ CFI_RESTORE (19)
++ CFI_DEF_CFA (31, 0)
++ ret
++ CFI_ENDPROC
++.size _Z18InitializeGuardPtrv, .-_Z18InitializeGuardPtrv
++
+ .hidden __tsan_setjmp
+ .comm _ZN14__interception11real_setjmpE,8,8
+ .type setjmp, @function
+@@ -21,10 +79,9 @@
+ mov x19, x0
+
+ // SP pointer mangling (see glibc setjmp)
+- adrp x2, :got:__pointer_chk_guard
+- ldr x2, [x2, #:got_lo12:__pointer_chk_guard]
++ adrp x2, __tsan_pointer_chk_guard
++ ldr x2, [x2, #:lo12:__tsan_pointer_chk_guard]
+ add x0, x29, 32
+- ldr x2, [x2]
+ eor x1, x2, x0
+
+ // call tsan interceptor
+@@ -69,10 +126,9 @@
+ mov x19, x0
+
+ // SP pointer mangling (see glibc setjmp)
+- adrp x2, :got:__pointer_chk_guard
+- ldr x2, [x2, #:got_lo12:__pointer_chk_guard]
++ adrp x2, __tsan_pointer_chk_guard
++ ldr x2, [x2, #:lo12:__tsan_pointer_chk_guard]
+ add x0, x29, 32
+- ldr x2, [x2]
+ eor x1, x2, x0
+
+ // call tsan interceptor
+@@ -119,10 +175,9 @@
+ mov x19, x0
+
+ // SP pointer mangling (see glibc setjmp)
+- adrp x2, :got:__pointer_chk_guard
+- ldr x2, [x2, #:got_lo12:__pointer_chk_guard]
++ adrp x2, __tsan_pointer_chk_guard
++ ldr x2, [x2, #:lo12:__tsan_pointer_chk_guard]
+ add x0, x29, 32
+- ldr x2, [x2]
+ eor x1, x2, x0
+
+ // call tsan interceptor
+@@ -171,10 +226,9 @@
+ mov x19, x0
+
+ // SP pointer mangling (see glibc setjmp)
+- adrp x2, :got:__pointer_chk_guard
+- ldr x2, [x2, #:got_lo12:__pointer_chk_guard]
++ adrp x2, __tsan_pointer_chk_guard
++ ldr x2, [x2, #:lo12:__tsan_pointer_chk_guard]
+ add x0, x29, 32
+- ldr x2, [x2]
+ eor x1, x2, x0
+
+ // call tsan interceptor
+Index: libsanitizer/tsan/tsan_platform_linux.cc
+===================================================================
+--- a/src/libsanitizer/tsan/tsan_platform_linux.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libsanitizer/tsan/tsan_platform_linux.cc (.../branches/gcc-6-branch)
+@@ -60,6 +60,10 @@
+ void *__libc_stack_end = 0;
+ #endif
+
++#if SANITIZER_LINUX && defined(__aarch64__)
++void InitializeGuardPtr() __attribute__((visibility("hidden")));
++#endif
++
+ namespace __tsan {
+
+ static uptr g_data_start;
+@@ -261,6 +265,10 @@
+ SetAddressSpaceUnlimited();
+ reexec = true;
+ }
++#if SANITIZER_LINUX && defined(__aarch64__)
++ // Initialize the guard pointer used in {sig}{set,long}jump.
++ InitializeGuardPtr();
++#endif
+ if (reexec)
+ ReExec();
+ }
Index: libstdc++-v3/src/filesystem/ops.cc
===================================================================
--- a/src/libstdc++-v3/src/filesystem/ops.cc (.../tags/gcc_6_1_0_release)
@@ -1993,6 +2144,151 @@ Index: libstdc++-v3/doc/xml/manual/abi.xml
</itemizedlist>
</listitem>
+Index: libstdc++-v3/doc/xml/manual/status_cxx2011.xml
+===================================================================
+--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml (.../branches/gcc-6-branch)
+@@ -27,8 +27,7 @@
+ </para>
+
+ <para>
+-This page describes the C++11 support in mainline GCC SVN, not in any
+-particular release.
++This page describes the C++11 support in the GCC 6 series.
+ </para>
+
+ <!-- Status is Yes or No, Broken/Partial-->
+Index: libstdc++-v3/doc/xml/manual/status_cxx2014.xml
+===================================================================
+--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2014.xml (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/doc/xml/manual/status_cxx2014.xml (.../branches/gcc-6-branch)
+@@ -20,8 +20,7 @@
+ </para>
+
+ <para>
+-This page describes the C++14 and library TS support in mainline GCC SVN,
+-not in any particular release.
++This page describes the C++14 and library TS support in the GCC 6 series.
+ </para>
+
+ <table frame="all" xml:id="table.cxx14_status">
+@@ -234,7 +233,7 @@
+ </row>
+
+ <row>
+- <?dbhtml bgcolor="#C8B0B0" ?>
++ <?dbhtml bgcolor="#B0B0B0" ?>
+ <entry>
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/JTC1/sc22/WG21/docs/papers/2013/n3644.pdf">
+ N3644
+@@ -338,7 +337,7 @@
+ </row>
+
+ <row>
+- <?dbhtml bgcolor="#C8B0B0" ?>
++ <?dbhtml bgcolor="#B0B0B0" ?>
+ <entry>
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3916.pdf">
+ N3916
+@@ -345,12 +344,11 @@
+ </link>
+ </entry>
+ <entry>Polymorphic memory resources</entry>
+- <entry>N</entry>
++ <entry>Partial</entry>
+ <entry>Library Fundamentals TS</entry>
+ </row>
+
+ <row>
+- <?dbhtml bgcolor="#C8B0B0" ?>
+ <entry>
+ <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3920.html">
+ N3920
+@@ -357,7 +355,7 @@
+ </link>
+ </entry>
+ <entry>Extending shared_ptr to support arrays</entry>
+- <entry>N</entry>
++ <entry>Y</entry>
+ <entry>Library Fundamentals TS</entry>
+ </row>
+
+Index: libstdc++-v3/doc/xml/manual/status_cxx2017.xml
+===================================================================
+--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2017.xml (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/doc/xml/manual/status_cxx2017.xml (.../branches/gcc-6-branch)
+@@ -20,8 +20,7 @@
+ </para>
+
+ <para>
+-This page describes the C++1z and library TS support in mainline GCC SVN,
+-not in any particular release.
++This page describes the C++1z and library TS support in the GCC 6 series.
+ </para>
+
+ <table frame="all" xml:id="table.cxx1z_status">
+Index: libstdc++-v3/doc/html/manual/status.html
+===================================================================
+--- a/src/libstdc++-v3/doc/html/manual/status.html (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/doc/html/manual/status.html (.../branches/gcc-6-branch)
+@@ -156,8 +156,7 @@
+ <code class="constant">__cplusplus</code> is used to check for the
+ presence of the required flag.
+ </p><p>
+-This page describes the C++11 support in mainline GCC SVN, not in any
+-particular release.
++This page describes the C++11 support in the GCC 6 series.
+ </p><div class="table"><a id="table.cxx11_status"></a><p class="title"><strong>Table 1.2. C++ 2011 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 2011 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Section</th><th align="left">Description</th><th align="left">Status</th><th align="left">Comments [...]
+ <span class="emphasis"><em>18</em></span>
+ </td><td colspan="3" align="left">
+@@ -335,8 +334,7 @@
+ <code class="constant">__cplusplus</code> is used to check for the
+ presence of the required flag.
+ </p><p>
+-This page describes the C++14 and library TS support in mainline GCC SVN,
+-not in any particular release.
++This page describes the C++14 and library TS support in the GCC 6 series.
+ </p><div class="table"><a id="table.cxx14_status"></a><p class="title"><strong>Table 1.3. C++ 2014 Implementation Status</strong></p><div class="table-contents"><table summary="C++ 2014 Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Paper</th><th align="left">Title</th><th align="left">Status</th><th align="left">Comments</th></t [...]
+ <a class="link" href="http://www.open-std.org/JTC1/sc22/WG21/docs/papers/2013/n3669.pdf" target="_top">
+ N3669
+@@ -405,7 +403,7 @@
+ <a class="link" href="http://www.open-std.org/JTC1/sc22/WG21/docs/papers/2013/n3655.pdf" target="_top">
+ N3655
+ </a>
+- </td><td align="left">TransformationTraits Redux</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">
++ </td><td align="left">TransformationTraits Redux</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">
+ <a class="link" href="http://www.open-std.org/JTC1/sc22/WG21/docs/papers/2013/n3644.pdf" target="_top">
+ N3644
+ </a>
+@@ -433,15 +431,15 @@
+ <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3915.pdf" target="_top">
+ N3915
+ </a>
+- </td><td align="left">apply() call a function with arguments from a tuple</td><td align="left">Y</td><td align="left">Library Fundamentals TS</td></tr><tr bgcolor="#C8B0B0"><td align="left">
++ </td><td align="left">apply() call a function with arguments from a tuple</td><td align="left">Y</td><td align="left">Library Fundamentals TS</td></tr><tr bgcolor="#B0B0B0"><td align="left">
+ <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3916.pdf" target="_top">
+ N3916
+ </a>
+- </td><td align="left">Polymorphic memory resources</td><td align="left">N</td><td align="left">Library Fundamentals TS</td></tr><tr bgcolor="#C8B0B0"><td align="left">
++ </td><td align="left">Polymorphic memory resources</td><td align="left">Partial</td><td align="left">Library Fundamentals TS</td></tr><tr><td align="left">
+ <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3920.html" target="_top">
+ N3920
+ </a>
+- </td><td align="left">Extending shared_ptr to support arrays</td><td align="left">N</td><td align="left">Library Fundamentals TS</td></tr><tr><td align="left">
++ </td><td align="left">Extending shared_ptr to support arrays</td><td align="left">Y</td><td align="left">Library Fundamentals TS</td></tr><tr><td align="left">
+ <a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3921.html" target="_top">
+ N3921
+ </a>
+@@ -470,8 +468,7 @@
+ <code class="constant">__cplusplus</code> is used to check for the
+ presence of the required flag.
+ </p><p>
+-This page describes the C++1z and library TS support in mainline GCC SVN,
+-not in any particular release.
++This page describes the C++1z and library TS support in the GCC 6 series.
+ </p><div class="table"><a id="table.cxx1z_status"></a><p class="title"><strong>Table 1.5. C++ 201z Implementation Status</strong></p><div class="table-contents"><table summary="C++ 201z Implementation Status" border="1"><colgroup><col align="left" class="c1" /><col align="left" class="c2" /><col align="left" class="c3" /><col align="left" class="c4" /></colgroup><thead><tr><th align="left">Paper</th><th align="left">Title</th><th align="left">Status</th><th align="left">Comments</th></t [...]
+ <a class="link" href="http://www.open-std.org/JTC1/sc22/WG21/docs/papers/2014/n4259.pdf" target="_top">
+ N4259
Index: libstdc++-v3/doc/html/manual/abi.html
===================================================================
--- a/src/libstdc++-v3/doc/html/manual/abi.html (.../tags/gcc_6_1_0_release)
@@ -2006,6 +2302,19 @@ Index: libstdc++-v3/doc/html/manual/abi.html
__GXX_ABI_VERSION. This macro is defined as the version of the
compiler v3 ABI, with g++ 3.0 being version 100. This macro will
be automatically defined whenever g++ is used (the curious can
+Index: libstdc++-v3/include/std/shared_mutex
+===================================================================
+--- a/src/libstdc++-v3/include/std/shared_mutex (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/std/shared_mutex (.../branches/gcc-6-branch)
+@@ -52,7 +52,7 @@
+ #ifdef _GLIBCXX_HAS_GTHREADS
+
+ #if __cplusplus > 201402L
+-// TODO: #define __cpp_lib_shared_mutex 201505
++#define __cpp_lib_shared_mutex 201505
+ class shared_mutex;
+ #endif
+
Index: libstdc++-v3/include/std/tuple
===================================================================
--- a/src/libstdc++-v3/include/std/tuple (.../tags/gcc_6_1_0_release)
@@ -2061,6 +2370,32 @@ Index: libstdc++-v3/include/std/tuple
_MoveConstructibleTuple<_UElements...>()
&& !_TMC<_UElements...>::template
_ImplicitlyMoveConvertibleTuple<_UElements...>()
+Index: libstdc++-v3/include/std/type_traits
+===================================================================
+--- a/src/libstdc++-v3/include/std/type_traits (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/std/type_traits (.../branches/gcc-6-branch)
+@@ -156,7 +156,7 @@
+
+ #if __cplusplus > 201402L
+
+-#define __cpp_lib_logical_traits 201511
++#define __cpp_lib_logical_traits 201510
+
+ template<typename... _Bn>
+ struct conjunction
+Index: libstdc++-v3/include/std/functional
+===================================================================
+--- a/src/libstdc++-v3/include/std/functional (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/std/functional (.../branches/gcc-6-branch)
+@@ -1847,7 +1847,7 @@
+ typedef _Res _Signature_type(_ArgTypes...);
+
+ template<typename _Func,
+- typename _Res2 = typename result_of<_Func(_ArgTypes...)>::type>
++ typename _Res2 = typename result_of<_Func&(_ArgTypes...)>::type>
+ struct _Callable : __check_func_return_type<_Res2, _Res> { };
+
+ // Used so the return type convertibility checks aren't done when
Index: libstdc++-v3/include/parallel/compiletime_settings.h
===================================================================
--- a/src/libstdc++-v3/include/parallel/compiletime_settings.h (.../tags/gcc_6_1_0_release)
@@ -2093,6 +2428,63 @@ Index: libstdc++-v3/include/parallel/balanced_quicksort.h
namespace __gnu_parallel
{
+Index: libstdc++-v3/include/experimental/memory_resource
+===================================================================
+--- a/src/libstdc++-v3/include/experimental/memory_resource (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/experimental/memory_resource (.../branches/gcc-6-branch)
+@@ -282,7 +282,7 @@
+ size_t __new_size = _S_aligned_size(__bytes,
+ _S_supported(__alignment) ?
+ __alignment : _S_max_align);
+- return _Aligned_alloc().allocate(__new_size);
++ return _Aligned_alloc(_M_alloc).allocate(__new_size);
+ }
+
+ virtual void
+@@ -292,9 +292,9 @@
+ size_t __new_size = _S_aligned_size(__bytes,
+ _S_supported(__alignment) ?
+ __alignment : _S_max_align);
+- _Aligned_alloc().deallocate(static_cast<typename
+- _Aligned_alloc::pointer>(__p),
+- __new_size);
++ using _Ptr = typename allocator_traits<_Aligned_alloc>::pointer;
++ _Aligned_alloc(_M_alloc).deallocate(static_cast<_Ptr>(__p),
++ __new_size);
+ }
+
+ virtual bool
+@@ -306,8 +306,8 @@
+
+ private:
+ // Calculate Aligned Size
+- // Returns a size that is larger than or equal to __size and divided by
+- // __alignment, where __alignment is required to be the power of 2.
++ // Returns a size that is larger than or equal to __size and divisible
++ // by __alignment, where __alignment is required to be the power of 2.
+ static size_t
+ _S_aligned_size(size_t __size, size_t __alignment)
+ { return ((__size - 1)|(__alignment - 1)) + 1; }
+@@ -342,16 +342,16 @@
+ {
+ protected:
+ void*
+- do_allocate(size_t __bytes, size_t __alignment)
++ do_allocate(size_t, size_t)
+ { std::__throw_bad_alloc(); }
+
+ void
+- do_deallocate(void* __p, size_t __bytes, size_t __alignment)
++ do_deallocate(void*, size_t, size_t) noexcept
+ { }
+
+ bool
+ do_is_equal(const memory_resource& __other) const noexcept
+- { }
++ { return this == &__other; }
+
+ friend memory_resource* null_memory_resource() noexcept;
+ };
Index: libstdc++-v3/include/experimental/optional
===================================================================
--- a/src/libstdc++-v3/include/experimental/optional (.../tags/gcc_6_1_0_release)
@@ -2341,6 +2733,121 @@ Index: libstdc++-v3/include/experimental/any
// @}
template<typename _Tp>
+Index: libstdc++-v3/include/experimental/propagate_const
+===================================================================
+--- a/src/libstdc++-v3/include/experimental/propagate_const (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/experimental/propagate_const (.../branches/gcc-6-branch)
+@@ -116,7 +116,7 @@
+ is_convertible<_Up&&, _Tp>>::value, bool
+ >::type=true>
+ constexpr propagate_const(propagate_const<_Up>&& __pu)
+- : __t(move(get_underlying(__pu)))
++ : _M_t(std::move(get_underlying(__pu)))
+ {}
+ template <typename _Up, typename
+ enable_if<__and_<is_constructible<_Tp, _Up&&>,
+@@ -123,7 +123,7 @@
+ __not_<is_convertible<_Up&&, _Tp>>>::value,
+ bool>::type=false>
+ constexpr explicit propagate_const(propagate_const<_Up>&& __pu)
+- : __t(move(get_underlying(__pu)))
++ : _M_t(std::move(get_underlying(__pu)))
+ {}
+ template <typename _Up, typename
+ enable_if<__and_<is_constructible<_Tp, _Up&&>,
+@@ -132,7 +132,7 @@
+ typename decay<_Up>::type>>
+ >::value, bool>::type=true>
+ constexpr propagate_const(_Up&& __u)
+- : __t(forward<_Up>(__u))
++ : _M_t(std::forward<_Up>(__u))
+ {}
+ template <typename _Up, typename
+ enable_if<__and_<is_constructible<_Tp, _Up&&>,
+@@ -141,7 +141,7 @@
+ typename decay<_Up>::type>>
+ >::value, bool>::type=false>
+ constexpr explicit propagate_const(_Up&& __u)
+- : __t(forward<_Up>(__u))
++ : _M_t(std::forward<_Up>(__u))
+ {}
+
+ // [propagate_const.assignment], assignment
+@@ -152,7 +152,7 @@
+ typename enable_if<is_convertible<_Up&&, _Tp>::value>::type>
+ constexpr propagate_const& operator=(propagate_const<_Up>&& __pu)
+ {
+- __t = move(get_underlying(__pu));
++ _M_t = std::move(get_underlying(__pu));
+ }
+
+ template <typename _Up, typename =
+@@ -162,13 +162,13 @@
+ >::value>::type>
+ constexpr propagate_const& operator=(_Up&& __u)
+ {
+- __t = forward<_Up>(__u);
++ _M_t = std::forward<_Up>(__u);
+ }
+
+ // [propagate_const.const_observers], const observers
+ explicit constexpr operator bool() const
+ {
+- return bool(__t);
++ return bool(_M_t);
+ }
+
+ constexpr const element_type* operator->() const
+@@ -193,7 +193,7 @@
+
+ constexpr const element_type* get() const
+ {
+- return __to_raw_pointer(__t);
++ return __to_raw_pointer(_M_t);
+ }
+
+ // [propagate_const.non_const_observers], non-const observers
+@@ -219,7 +219,7 @@
+
+ constexpr element_type* get()
+ {
+- return __to_raw_pointer(__t);
++ return __to_raw_pointer(_M_t);
+ }
+
+ // [propagate_const.modifiers], modifiers
+@@ -227,11 +227,11 @@
+ swap(propagate_const& __pt) noexcept(__is_nothrow_swappable<_Tp>::value)
+ {
+ using std::swap;
+- swap(__t, get_underlying(__pt));
++ swap(_M_t, get_underlying(__pt));
+ }
+
+ private:
+- _Tp __t; //exposition only
++ _Tp _M_t;
+ };
+
+ // [propagate_const.relational], relational operators
+@@ -408,7 +408,7 @@
+ constexpr const _Tp&
+ get_underlying(const propagate_const<_Tp>& __pt) noexcept
+ {
+- return __pt.__t;
++ return __pt._M_t;
+ }
+
+ template <typename _Tp>
+@@ -415,7 +415,7 @@
+ constexpr _Tp&
+ get_underlying(propagate_const<_Tp>& __pt) noexcept
+ {
+- return __pt.__t;
++ return __pt._M_t;
+ }
+
+ // @} group propagate_const
Index: libstdc++-v3/include/experimental/bits/fs_dir.h
===================================================================
--- a/src/libstdc++-v3/include/experimental/bits/fs_dir.h (.../tags/gcc_6_1_0_release)
@@ -2758,11 +3265,143 @@ Index: libstdc++-v3/include/bits/c++config
#endif
// Disable std::string explicit instantiation declarations in order to assert.
+Index: libstdc++-v3/include/bits/stl_function.h
+===================================================================
+--- a/src/libstdc++-v3/include/bits/stl_function.h (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/bits/stl_function.h (.../branches/gcc-6-branch)
+@@ -225,7 +225,6 @@
+ #if __cplusplus > 201103L
+
+ #define __cpp_lib_transparent_operators 201210
+-//#define __cpp_lib_generic_associative_lookup 201304
+
+ template<>
+ struct plus<void>
+Index: libstdc++-v3/include/bits/allocator.h
+===================================================================
+--- a/src/libstdc++-v3/include/bits/allocator.h (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/bits/allocator.h (.../branches/gcc-6-branch)
+@@ -49,6 +49,8 @@
+ #include <type_traits>
+ #endif
+
++#define __cpp_lib_incomplete_container_elements 201505
++
+ namespace std _GLIBCXX_VISIBILITY(default)
+ {
+ _GLIBCXX_BEGIN_NAMESPACE_VERSION
+Index: libstdc++-v3/include/bits/stl_tree.h
+===================================================================
+--- a/src/libstdc++-v3/include/bits/stl_tree.h (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/include/bits/stl_tree.h (.../branches/gcc-6-branch)
+@@ -73,6 +73,10 @@
+ {
+ _GLIBCXX_BEGIN_NAMESPACE_VERSION
+
++#if __cplusplus > 201103L
++# define __cpp_lib_generic_associative_lookup 201304
++#endif
++
+ // Red-black tree class, designed for use in implementing STL
+ // associative containers (set, multiset, map, and multimap). The
+ // insertion and deletion algorithms are based on those in Cormen,
+@@ -851,7 +855,8 @@
+ }
+
+ _Rb_tree(_Rb_tree&& __x)
+- : _M_impl(__x._M_impl._M_key_compare, __x._M_get_Node_allocator())
++ : _M_impl(__x._M_impl._M_key_compare,
++ std::move(__x._M_get_Node_allocator()))
+ {
+ if (__x._M_root() != 0)
+ _M_move_data(__x, std::true_type());
Index: libstdc++-v3/ChangeLog
===================================================================
--- a/src/libstdc++-v3/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/libstdc++-v3/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,219 @@
+@@ -1,3 +1,301 @@
++2016-08-06 Jonathan Wakely <jwakely at redhat.com>
++
++ Backport from mainline
++ 2016-08-05 Jonathan Wakely <jwakely at redhat.com>
++
++ * include/std/functional (function::_Callable): Use lvalue in
++ result_of expression.
++ * testsuite/20_util/function/cons/refqual.cc: New test.
++
++ Backport from mainline
++ 2016-07-22 Jonathan Wakely <jwakely at redhat.com>
++
++ PR libstdc++/71964
++ * include/bits/stl_tree.h (_Rb_tree(_Rb_tree&&)): Move allocator.
++ * testsuite/23_containers/set/allocator/71964.cc: New test.
++
++ Backport from mainline
++ 2016-08-02 Jonathan Wakely <jwakely at redhat.com>
++
++ * testsuite/21_strings/basic_string/allocator/wchar_t/copy.cc:
++ Remove reundant check for _GLIBCXX_USE_WCHAR_T and fix char type.
++ * testsuite/21_strings/basic_string/allocator/wchar_t/copy_assign.cc:
++ Likewise.
++ * testsuite/21_strings/basic_string/allocator/wchar_t/minimal.cc:
++ Likewise.
++ * testsuite/21_strings/basic_string/allocator/wchar_t/move.cc:
++ Likewise.
++ * testsuite/21_strings/basic_string/allocator/wchar_t/move_assign.cc:
++ Likewise.
++ * testsuite/21_strings/basic_string/allocator/wchar_t/noexcept.cc:
++ Likewise.
++ * testsuite/21_strings/basic_string/allocator/wchar_t/swap.cc:
++ Likewise.
++
++ Backport from mainline
++ 2016-05-04 Jonathan Wakely <jwakely at redhat.com>
++
++ PR libstdc++/70940
++ * include/experimental/memory_resource
++ (__resource_adaptor_imp::do_allocate): Do not default-construct
++ rebound allocator.
++ (__resource_adaptor_imp::do_deallocate): Likewise. Use
++ allocator_traits to get pointer type.
++ (__null_memory_resource::do_allocate): Remove unused parameters.
++ (__null_memory_resource::do_deallocate): Likewise.
++ (__null_memory_resource::do_is_equal): Likewise. Add return statement.
++ * testsuite/experimental/type_erased_allocator/1.cc: Combine with ...
++ * testsuite/experimental/type_erased_allocator/1_neg.cc: This, and
++ move to ...
++ * testsuite/experimental/memory_resource/1.cc: Here.
++ * testsuite/experimental/memory_resource/null_memory_resource.cc: New.
++ * testsuite/experimental/memory_resource/resource_adaptor.cc: New.
++
++ Backport from mainline
++ 2016-08-03 Jonathan Wakely <jwakely at redhat.com>
++
++ * include/bits/allocator.h (__cpp_lib_incomplete_container_elements):
++ Define feature-test macro.
++ * include/std/shared_mutex (__cpp_lib_shared_mutex): Uncomment.
++ * include/std/type_traits (__cpp_lib_logical_traits): Fix value.
++
++ Backport from mainline
++ 2016-08-03 Jonathan Wakely <jwakely at redhat.com>
++
++ * include/bits/stl_function.h: Remove commented-out macro.
++ * include/bits/stl_tree.h (__cpp_lib_generic_associative_lookup):
++ Define feature-test macro.
++ * testsuite/experimental/feat-cxx14.cc: Add tests for more macros.
++
++ * testsuite/lib/libstdc++.exp (check_v3_target_filesystem_ts): Improve
++ comments.
++
++ * doc/xml/manual/status_cxx2011.xml: Change "mainline GCC SVN" to
++ refer to the release series.
++ * doc/xml/manual/status_cxx2014.xml: Likewise. Update TS status.
++ * doc/xml/manual/status_cxx2017.xml: Likewise.
++ * doc/html/manual/status.html: Regenerate.
++
++ * include/experimental/propagate_const (propagate_const::__t): Rename
++ to _M_t and remove comment. Qualify std::move and std::forward.
++ * testsuite/experimental/propagate_const/cons/default.cc: Fix test.
++
+2016-08-02 Jonathan Wakely <jwakely at redhat.com>
+
+ * testsuite/lib/libstdc++.exp (v3-build_support): Add
@@ -3536,6 +4175,532 @@ Index: libstdc++-v3/testsuite/lib/libstdc++.exp
!= "" } {
error "could not compile $f"
}
+@@ -1923,6 +1924,8 @@
+ return $et_little_endian
+ }
+
++# Return 1 if the Filesystem TS is supported, 0 otherwise.
++# Cache the result.
+ proc check_v3_target_filesystem_ts { } {
+ global cxxflags
+ global DEFAULT_CXXFLAGS
+@@ -1950,7 +1953,7 @@
+ set et_filesystem_ts 0
+
+ # Set up and preprocess a C++ test program that depends
+- # on debug mode activated.
++ # on the Filesystem TS feature-test macro being defined.
+ set src filesystem_ts[pid].cc
+
+ set f [open $src "w"]
+Index: libstdc++-v3/testsuite/23_containers/set/allocator/71964.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/23_containers/set/allocator/71964.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/23_containers/set/allocator/71964.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,71 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-options "-std=gnu++11" }
++
++#include <set>
++#include <testsuite_hooks.h>
++
++template<typename T>
++ struct mv_allocator
++ {
++ using value_type = T;
++ using size_type = unsigned;
++
++ mv_allocator()
++ : moved_to(false), moved_from(false) { }
++
++ template<typename U>
++ mv_allocator(const mv_allocator<U> & a)
++ : moved_to(a.moved_to), moved_from(a.moved_from) { }
++
++ mv_allocator(const mv_allocator &) = default;
++
++ mv_allocator(mv_allocator && a) noexcept : moved_to(true)
++ {
++ a.moved_from = true;
++ }
++
++ T* allocate(unsigned n) { return std::allocator<T>{}.allcoate(n); }
++ void deallocate(T* p, unsigned n) { std::allocator<T>{}.deallocate(p, n); }
++
++ bool moved_to;
++ bool moved_from;
++ };
++
++template<typename T, typename U>
++bool
++operator==(const mv_allocator<T>&, const mv_allocator<U>&) { return true; }
++
++template<typename T, typename U>
++bool
++operator!=(const mv_allocator<T>&, const mv_allocator<U>&) { return false; }
++
++void
++test01()
++{
++ std::set<int, std::less<int>, mv_allocator<int>> s;
++ auto t = std::move(s);
++ VERIFY( s.get_allocator().moved_from );
++ VERIFY( t.get_allocator().moved_to );
++}
++
++int
++main()
++{
++ test01();
++}
+Index: libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/copy_assign.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/copy_assign.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/copy_assign.cc (.../branches/gcc-6-branch)
+@@ -21,9 +21,9 @@
+ #include <testsuite_hooks.h>
+ #include <testsuite_allocator.h>
+
+-#if _GLIBCXX_USE_CXX11_ABI && defined(_GLIBCXX_USE_WCHAR_T)
+-using C = char;
+-const C c = 'a';
++#if _GLIBCXX_USE_CXX11_ABI
++using C = wchar_t;
++const C c = L'a';
+ using traits = std::char_traits<C>;
+
+ using __gnu_test::propagating_allocator;
+Index: libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/noexcept.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/noexcept.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/noexcept.cc (.../branches/gcc-6-branch)
+@@ -21,9 +21,9 @@
+ #include <string>
+ #include <testsuite_allocator.h>
+
+-#if _GLIBCXX_USE_CXX11_ABI && defined(_GLIBCXX_USE_WCHAR_T)
+-using C = char;
+-const C c = 'a';
++#if _GLIBCXX_USE_CXX11_ABI
++using C = wchar_t;
++const C c = L'a';
+ using traits = std::char_traits<C>;
+
+ using __gnu_test::propagating_allocator;
+Index: libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/minimal.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/minimal.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/minimal.cc (.../branches/gcc-6-branch)
+@@ -22,7 +22,7 @@
+ #include <testsuite_hooks.h>
+ #include <testsuite_allocator.h>
+
+-#if _GLIBCXX_USE_CXX11_ABI && defined(_GLIBCXX_USE_WCHAR_T)
++#if _GLIBCXX_USE_CXX11_ABI
+ using C = wchar_t;
+ const C c = L'a';
+ using traits = std::char_traits<C>;
+Index: libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/move.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/move.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/move.cc (.../branches/gcc-6-branch)
+@@ -21,9 +21,9 @@
+ #include <testsuite_hooks.h>
+ #include <testsuite_allocator.h>
+
+-#if _GLIBCXX_USE_CXX11_ABI && defined(_GLIBCXX_USE_WCHAR_T)
+-using C = char;
+-const C c = 'a';
++#if _GLIBCXX_USE_CXX11_ABI
++using C = wchar_t;
++const C c = L'a';
+ using traits = std::char_traits<C>;
+
+ using __gnu_test::uneq_allocator;
+Index: libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/copy.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/copy.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/copy.cc (.../branches/gcc-6-branch)
+@@ -21,9 +21,9 @@
+ #include <testsuite_hooks.h>
+ #include <testsuite_allocator.h>
+
+-#if _GLIBCXX_USE_CXX11_ABI && defined(_GLIBCXX_USE_WCHAR_T)
+-using C = char;
+-const C c = 'a';
++#if _GLIBCXX_USE_CXX11_ABI
++using C = wchar_t;
++const C c = L'a';
+ using traits = std::char_traits<C>;
+
+ using __gnu_test::propagating_allocator;
+Index: libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/move_assign.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/move_assign.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/move_assign.cc (.../branches/gcc-6-branch)
+@@ -21,9 +21,9 @@
+ #include <testsuite_hooks.h>
+ #include <testsuite_allocator.h>
+
+-#if _GLIBCXX_USE_CXX11_ABI && defined(_GLIBCXX_USE_WCHAR_T)
+-using C = char;
+-const C c = 'a';
++#if _GLIBCXX_USE_CXX11_ABI
++using C = wchar_t;
++const C c = L'a';
+ using traits = std::char_traits<C>;
+
+ using __gnu_test::propagating_allocator;
+Index: libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/swap.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/swap.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/allocator/wchar_t/swap.cc (.../branches/gcc-6-branch)
+@@ -21,9 +21,9 @@
+ #include <testsuite_hooks.h>
+ #include <testsuite_allocator.h>
+
+-#if _GLIBCXX_USE_CXX11_ABI && defined(_GLIBCXX_USE_WCHAR_T)
+-using C = char;
+-const C c = 'a';
++#if _GLIBCXX_USE_CXX11_ABI
++using C = wchar_t;
++const C c = L'a';
+ using traits = std::char_traits<C>;
+
+ using __gnu_test::propagating_allocator;
+Index: libstdc++-v3/testsuite/experimental/memory_resource/1.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/experimental/memory_resource/1.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/experimental/memory_resource/1.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,162 @@
++// { dg-options "-std=gnu++14" }
++// { dg-require-atomic-builtins "" }
++
++// Copyright (C) 2015-2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++#include <experimental/memory_resource>
++#include <vector>
++#include <cstdlib>
++#include <testsuite_hooks.h>
++#include <testsuite_allocator.h>
++
++using std::experimental::pmr::polymorphic_allocator;
++using std::experimental::pmr::memory_resource;
++using std::experimental::pmr::new_delete_resource;
++using std::experimental::pmr::get_default_resource;
++using std::experimental::pmr::set_default_resource;
++
++struct A
++{
++ A() { ++ctor_count; }
++ ~A() { ++dtor_count; }
++ static int ctor_count;
++ static int dtor_count;
++};
++
++int A::ctor_count = 0;
++int A::dtor_count = 0;
++
++struct CountedResource : public memory_resource
++{
++public:
++ CountedResource() = default;
++ ~CountedResource() = default;
++
++ static size_t get_alloc_count() { return alloc_count; }
++ static size_t get_dalloc_count() { return dalloc_count; }
++
++ static size_t alloc_count;
++ static size_t dalloc_count;
++protected:
++ void* do_allocate(size_t bytes, size_t alignment)
++ {
++ alloc_count += bytes;
++ if (auto ptr = std::malloc(bytes))
++ return ptr;
++ throw std::bad_alloc();
++ }
++
++ void do_deallocate(void *p, size_t bytes, size_t alignment)
++ {
++ dalloc_count += bytes;
++ std::free(p);
++ }
++
++ bool do_is_equal(const memory_resource& __other) const noexcept
++ { return this == &__other; }
++};
++
++size_t CountedResource::alloc_count = 0;
++size_t CountedResource::dalloc_count = 0;
++
++void clear()
++{
++ CountedResource::alloc_count = 0;
++ CountedResource::dalloc_count = 0;
++ A::ctor_count = 0;
++ A::dtor_count = 0;
++}
++
++// memory resource
++void
++test01()
++{
++ bool test __attribute((unused)) = false;
++
++ memory_resource* r = new_delete_resource();
++ VERIFY(get_default_resource() == r);
++ void *p = get_default_resource()->allocate(5);
++ VERIFY(p);
++ get_default_resource()->deallocate(p, 5);
++
++ clear();
++ CountedResource* cr = new CountedResource();
++ set_default_resource(cr);
++ VERIFY(get_default_resource() == cr);
++ void *pc = get_default_resource()->allocate(5);
++ VERIFY(pc);
++ get_default_resource()->deallocate(pc, 5);
++ VERIFY(CountedResource::get_alloc_count() == 5);
++ VERIFY(CountedResource::get_dalloc_count() == 5);
++}
++
++// polymorphic_allocator
++void
++test02()
++{
++ bool test __attribute((unused)) = false;
++
++ clear();
++ {
++ CountedResource cr;
++ polymorphic_allocator<A> pa(&cr);
++ std::vector<A, polymorphic_allocator<A>> v(5, A(), pa);
++ }
++ VERIFY(A::ctor_count == 1);
++ VERIFY(A::dtor_count == 6);
++ VERIFY(CountedResource::get_alloc_count() == 5);
++ VERIFY(CountedResource::get_dalloc_count() == 5);
++}
++
++void
++test03()
++{
++ bool test __attribute((unused)) = false;
++
++ clear();
++ CountedResource cr;
++ polymorphic_allocator<A> pa(&cr);
++ A* p = pa.allocate(1);
++ pa.construct(p);
++ pa.destroy(p);
++ pa.deallocate(p, 1);
++ VERIFY(A::ctor_count == 1);
++ VERIFY(A::dtor_count == 1);
++ VERIFY(CountedResource::get_alloc_count() == 1);
++ VERIFY(CountedResource::get_dalloc_count() == 1);
++}
++
++void
++test04()
++{
++ bool test __attribute((unused)) = false;
++
++ polymorphic_allocator<A> pa1(get_default_resource());
++ polymorphic_allocator<A> pa2(get_default_resource());
++ VERIFY(pa1 == pa2);
++ polymorphic_allocator<A> pa3 = pa2.select_on_container_copy_construction();
++ VERIFY(pa1 == pa3);
++}
++
++int main()
++{
++ test01();
++ test02();
++ test03();
++ test04();
++}
+Index: libstdc++-v3/testsuite/experimental/memory_resource/resource_adaptor.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/experimental/memory_resource/resource_adaptor.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/experimental/memory_resource/resource_adaptor.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,87 @@
++// { dg-options "-std=gnu++14" }
++
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++#include <experimental/memory_resource>
++#include <testsuite_hooks.h>
++#include <testsuite_allocator.h>
++
++using std::experimental::pmr::memory_resource;
++using std::experimental::pmr::resource_adaptor;
++
++template<typename T>
++ struct Allocator : __gnu_test::SimpleAllocator<T>
++ {
++ Allocator(int) { } // not default constructible
++
++ template<typename U>
++ Allocator(const Allocator<U>&) { }
++ };
++
++template<typename T>
++ bool aligned(void* p)
++ {
++ return (reinterpret_cast<std::uintptr_t>(p) % alignof(T)) == 0;
++ }
++
++// resource_adaptor
++void
++test05()
++{
++ bool test __attribute((unused)) = false;
++ using std::max_align_t;
++ using std::uintptr_t;
++ void* p = nullptr;
++
++ Allocator<int> a1(1), a2(2); // minimal interface allocators
++ resource_adaptor<decltype(a1)> r1(a1), r2(a2);
++ VERIFY( r1 == r1 );
++ VERIFY( r1 == r2 );
++ p = r1.allocate(1);
++ VERIFY( aligned<max_align_t>(p) );
++ r1.deallocate(p, 1);
++ p = r1.allocate(1, alignof(short));
++ VERIFY( aligned<short>(p) );
++ r1.deallocate(p, 1, alignof(short));
++ p = r1.allocate(1, alignof(long));
++ VERIFY( aligned<long>(p) );
++ r1.deallocate(p, 1, alignof(long));
++
++ __gnu_test::uneq_allocator<double> a3(3), a4(4); // non-equal allocators
++ resource_adaptor<decltype(a3)> r3(a3), r4(a4);
++ VERIFY( r3 == r3 );
++ VERIFY( r4 == r4 );
++ VERIFY( r3 != r4 );
++ p = r3.allocate(1);
++ VERIFY( aligned<max_align_t>(p) );
++ r3.deallocate(p, 1);
++ p = r3.allocate(1, alignof(short));
++ VERIFY( aligned<short>(p) );
++ r3.deallocate(p, 1, alignof(short));
++ p = r3.allocate(1, alignof(long));
++ VERIFY( aligned<long>(p) );
++ r3.deallocate(p, 1, alignof(long));
++
++ // TODO test with an allocator that doesn't use new or malloc, so
++ // returns pointers that are not suitably aligned for any type.
++}
++
++int main()
++{
++ test05();
++}
+Index: libstdc++-v3/testsuite/experimental/memory_resource/null_memory_resource.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/experimental/memory_resource/null_memory_resource.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/experimental/memory_resource/null_memory_resource.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,53 @@
++// { dg-options "-std=gnu++14" }
++
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++#include <experimental/memory_resource>
++#include <bits/uses_allocator.h>
++#include <testsuite_hooks.h>
++
++using std::experimental::pmr::memory_resource;
++using std::experimental::pmr::null_memory_resource;
++using std::experimental::pmr::new_delete_resource;
++
++// null_memory_resource
++void
++test06()
++{
++ bool test __attribute((unused)) = false;
++
++ memory_resource* r = null_memory_resource();
++ bool caught = false;
++
++ void* p = nullptr;
++ try {
++ p = r->allocate(1);
++ } catch (const std::bad_alloc&) {
++ caught = true;
++ }
++ VERIFY( caught );
++
++ VERIFY( *r == *r );
++ VERIFY( r->is_equal(*r) );
++ VERIFY( !r->is_equal(*new_delete_resource()) );
++}
++
++int main()
++{
++ test06();
++}
Index: libstdc++-v3/testsuite/experimental/filesystem/operations/permissions.cc
===================================================================
--- a/src/libstdc++-v3/testsuite/experimental/filesystem/operations/permissions.cc (.../tags/gcc_6_1_0_release)
@@ -4329,6 +5494,20 @@ Index: libstdc++-v3/testsuite/experimental/any/misc/any_cast_neg.cc
- any_cast<int&>(y); // { dg-error "qualifiers" "" { target { *-*-* } } 353 }
+ any_cast<int&>(y); // { dg-error "qualifiers" "" { target { *-*-* } } 368 }
}
+Index: libstdc++-v3/testsuite/experimental/propagate_const/cons/default.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/experimental/propagate_const/cons/default.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/experimental/propagate_const/cons/default.cc (.../branches/gcc-6-branch)
+@@ -27,6 +27,7 @@
+ {
+ constexpr propagate_const<int*> test1{};
+ static_assert(!test1.get(), "");
+- propagate_const<int*> test2;
+- VERIFY(!test2.get());
++ propagate_const<int*> test2; // wrapped pointer is not initialized
++ propagate_const<int*> test3{};
++ VERIFY(!test3.get());
+ }
Index: libstdc++-v3/testsuite/experimental/functional/searchers.cc
===================================================================
--- a/src/libstdc++-v3/testsuite/experimental/functional/searchers.cc (.../tags/gcc_6_1_0_release)
@@ -4341,6 +5520,246 @@ Index: libstdc++-v3/testsuite/experimental/functional/searchers.cc
#include <testsuite_hooks.h>
using std::experimental::make_default_searcher;
+Index: libstdc++-v3/testsuite/experimental/type_erased_allocator/1.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/experimental/type_erased_allocator/1.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/experimental/type_erased_allocator/1.cc (.../branches/gcc-6-branch)
+@@ -1,147 +0,0 @@
+-// { dg-options "-std=gnu++14" }
+-
+-// Copyright (C) 2015-2016 Free Software Foundation, Inc.
+-//
+-// This file is part of the GNU ISO C++ Library. This library is free
+-// software; you can redistribute it and/or modify it under the
+-// terms of the GNU General Public License as published by the
+-// Free Software Foundation; either version 3, or (at your option)
+-// any later version.
+-
+-// This library is distributed in the hope that it will be useful,
+-// but WITHOUT ANY WARRANTY; without even the implied warranty of
+-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-// GNU General Public License for more details.
+-
+-// You should have received a copy of the GNU General Public License along
+-// with this library; see the file COPYING3. If not see
+-// <http://www.gnu.org/licenses/>.
+-
+-#include <memory>
+-#include <experimental/memory_resource>
+-#include <vector>
+-#include <bits/uses_allocator.h>
+-#include <testsuite_hooks.h>
+-#include <testsuite_allocator.h>
+-
+-using std::experimental::pmr::polymorphic_allocator;
+-using std::experimental::pmr::memory_resource;
+-using std::experimental::pmr::new_delete_resource;
+-using std::experimental::pmr::get_default_resource;
+-using std::experimental::pmr::set_default_resource;
+-
+-struct A
+-{
+- A() { ++ctor_count; }
+- ~A() { ++dtor_count; }
+- static int ctor_count;
+- static int dtor_count;
+-};
+-int A::ctor_count = 0;
+-int A::dtor_count = 0;
+-
+-struct CountedResource : public memory_resource
+-{
+-public:
+- CountedResource() = default;
+- ~ CountedResource() = default;
+-
+- static size_t get_alloc_count() { return alloc_count; }
+- static size_t get_dalloc_count() { return dalloc_count; }
+-
+- static size_t alloc_count;
+- static size_t dalloc_count;
+-protected:
+- void* do_allocate(size_t bytes, size_t alignment)
+- {
+- alloc_count += bytes;
+- if (auto ptr = std::malloc(bytes)) {
+- return ptr;
+- }
+- throw std::bad_alloc();
+- }
+-
+- void do_deallocate(void *p, size_t bytes, size_t alignment)
+- {
+- dalloc_count += bytes;
+- free(p);
+- }
+-
+- bool do_is_equal(const memory_resource& __other) const noexcept
+- { return this == &__other; }
+-};
+- size_t CountedResource::alloc_count = 0;
+- size_t CountedResource::dalloc_count = 0;
+-
+-void clear()
+-{
+- CountedResource::alloc_count = 0;
+- CountedResource::dalloc_count = 0;
+- A::ctor_count = 0;
+- A::dtor_count = 0;
+-}
+-
+-// memory resource
+-void test01()
+-{
+- memory_resource* r = new_delete_resource();
+- VERIFY(get_default_resource() == r);
+- void *p = get_default_resource()->allocate(5);
+- VERIFY(p);
+- get_default_resource()->deallocate(p, 5);
+-
+- clear();
+- CountedResource* cr = new CountedResource();
+- set_default_resource(cr);
+- VERIFY(get_default_resource() == cr);
+- void *pc = get_default_resource()->allocate(5);
+- VERIFY(pc);
+- get_default_resource()->deallocate(pc, 5);
+- VERIFY(CountedResource::get_alloc_count() == 5);
+- VERIFY(CountedResource::get_dalloc_count() == 5);
+-}
+-
+-// polymorphic_allocator
+-void test02()
+-{
+- clear();
+- {
+- CountedResource cr;
+- polymorphic_allocator<A> pa(&cr);
+- std::vector<A, polymorphic_allocator<A>> v(5, A(), pa);
+- }
+- VERIFY(A::ctor_count == 1);
+- VERIFY(A::dtor_count == 6);
+- VERIFY(CountedResource::get_alloc_count() == 5);
+- VERIFY(CountedResource::get_dalloc_count() == 5);
+-}
+-
+-void test03() {
+- clear();
+- CountedResource cr;
+- polymorphic_allocator<A> pa(&cr);
+- A* p = pa.allocate(1);
+- pa.construct(p);
+- pa.destroy(p);
+- pa.deallocate(p, 1);
+- VERIFY(A::ctor_count == 1);
+- VERIFY(A::dtor_count == 1);
+- VERIFY(CountedResource::get_alloc_count() == 1);
+- VERIFY(CountedResource::get_dalloc_count() == 1);
+-}
+-
+-void test04() {
+- polymorphic_allocator<A> pa1(get_default_resource());
+- polymorphic_allocator<A> pa2(get_default_resource());
+- VERIFY(pa1 == pa2);
+- polymorphic_allocator<A> pa3 = pa2.select_on_container_copy_construction();
+- VERIFY(pa1 == pa3);
+-}
+-
+-int main() {
+- test01();
+- test02();
+- test03();
+- test04();
+- return 0;
+-}
+Index: libstdc++-v3/testsuite/experimental/type_erased_allocator/1_neg.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/experimental/type_erased_allocator/1_neg.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/experimental/type_erased_allocator/1_neg.cc (.../branches/gcc-6-branch)
+@@ -1,37 +0,0 @@
+-// { dg-do run { xfail *-*-* } }
+-// { dg-options "-std=gnu++14" }
+-
+-// Copyright (C) 2015-2016 Free Software Foundation, Inc.
+-//
+-// This file is part of the GNU ISO C++ Library. This library is free
+-// software; you can redistribute it and/or modify it under the
+-// terms of the GNU General Public License as published by the
+-// Free Software Foundation; either version 3, or (at your option)
+-// any later version.
+-
+-// This library is distributed in the hope that it will be useful,
+-// but WITHOUT ANY WARRANTY; without even the implied warranty of
+-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-// GNU General Public License for more details.
+-
+-// You should have received a copy of the GNU General Public License along
+-// with this library; see the file COPYING3. If not see
+-// <http://www.gnu.org/licenses/>.
+-
+-#include <experimental/memory_resource>
+-#include <bits/uses_allocator.h>
+-#include <testsuite_hooks.h>
+-#include <testsuite_allocator.h>
+-
+-using std::experimental::pmr::polymorphic_allocator;
+-using std::experimental::pmr::null_memory_resource;
+-using std::experimental::pmr::memory_resource;
+-
+-void test01() {
+- memory_resource* r = null_memory_resource();
+- auto p = r->allocate(1);
+-}
+-
+-int main() {
+- test01();
+-}
+Index: libstdc++-v3/testsuite/experimental/feat-cxx14.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/experimental/feat-cxx14.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/experimental/feat-cxx14.cc (.../branches/gcc-6-branch)
+@@ -11,6 +11,8 @@
+ #include <complex>
+ #include <iomanip>
+ #include <shared_mutex>
++#include <map>
++#include <set>
+
+ #ifndef __cpp_lib_integer_sequence
+ # error "__cpp_lib_integer_sequence"
+@@ -78,11 +80,11 @@
+ # error "__cpp_lib_complex_udls != 201309"
+ #endif
+
+-//#ifndef __cpp_lib_generic_associative_lookup
+-//# error "__cpp_lib_generic_associative_lookup"
+-//#elif __cpp_lib_generic_associative_lookup != 201304
+-//# error "__cpp_lib_generic_associative_lookup != 201304"
+-//#endif
++#ifndef __cpp_lib_generic_associative_lookup
++# error "__cpp_lib_generic_associative_lookup"
++#elif __cpp_lib_generic_associative_lookup != 201304
++# error "__cpp_lib_generic_associative_lookup != 201304"
++#endif
+
+ //#ifndef __cpp_lib_null_iterators
+ //# error "__cpp_lib_null_iterators"
+@@ -119,3 +121,15 @@
+ #elif __cpp_lib_is_final != 201402
+ # error "__cpp_lib_is_final != 201402"
+ #endif
++
++#ifndef __cpp_lib_is_null_pointer
++# error "__cpp_lib_is_null_pointer"
++#elif __cpp_lib_is_null_pointer != 201309
++# error "__cpp_lib_is_null_pointer != 201309"
++#endif
++
++#ifndef __cpp_lib_make_reverse_iterator
++# error "__cpp_lib_make_reverse_iterator"
++#elif __cpp_lib_make_reverse_iterator != 201402
++# error "__cpp_lib_make_reverse_iterator != 201402"
++#endif
Index: libstdc++-v3/testsuite/util/testsuite_iterators.h
===================================================================
--- a/src/libstdc++-v3/testsuite/util/testsuite_iterators.h (.../tags/gcc_6_1_0_release)
@@ -4379,6 +5798,42 @@ Index: libstdc++-v3/testsuite/util/testsuite_fs.h
p = buf;
#endif
return p;
+Index: libstdc++-v3/testsuite/20_util/function/cons/refqual.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/20_util/function/cons/refqual.cc (.../tags/gcc_6_1_0_release)
++++ b/src/libstdc++-v3/testsuite/20_util/function/cons/refqual.cc (.../branches/gcc-6-branch)
+@@ -0,0 +1,31 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-options "-std=gnu++11" }
++
++#include <functional>
++
++struct F {
++ void operator()() && { }
++ int operator()() & { return 0; }
++};
++
++int main() {
++ F f;
++ std::function<int()> ff{f};
++ return ff();
++}
Index: libstdc++-v3/testsuite/20_util/tuple/cons/element_accepts_anything_byval.cc
===================================================================
--- a/src/libstdc++-v3/testsuite/20_util/tuple/cons/element_accepts_anything_byval.cc (.../tags/gcc_6_1_0_release)
@@ -5964,6 +7419,103 @@ Index: gcc/c-family/c-common.h
extern void c_omp_split_clauses (location_t, enum tree_code, omp_clause_mask,
tree, tree *);
extern tree c_omp_declare_simd_clauses_to_numbers (tree, tree);
+Index: gcc/tree-loop-distribution.c
+===================================================================
+--- a/src/gcc/tree-loop-distribution.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/tree-loop-distribution.c (.../branches/gcc-6-branch)
+@@ -749,12 +749,40 @@
+ int i, len;
+
+ if (integer_zerop (val)
+- || real_zerop (val)
+ || (TREE_CODE (val) == CONSTRUCTOR
+ && !TREE_CLOBBER_P (val)
+ && CONSTRUCTOR_NELTS (val) == 0))
+ return 0;
+
++ if (real_zerop (val))
++ {
++ /* Only return 0 for +0.0, not for -0.0, which doesn't have
++ an all bytes same memory representation. Don't transform
++ -0.0 stores into +0.0 even for !HONOR_SIGNED_ZEROS. */
++ switch (TREE_CODE (val))
++ {
++ case REAL_CST:
++ if (!real_isneg (TREE_REAL_CST_PTR (val)))
++ return 0;
++ break;
++ case COMPLEX_CST:
++ if (!const_with_all_bytes_same (TREE_REALPART (val))
++ && !const_with_all_bytes_same (TREE_IMAGPART (val)))
++ return 0;
++ break;
++ case VECTOR_CST:
++ unsigned int j;
++ for (j = 0; j < VECTOR_CST_NELTS (val); ++j)
++ if (const_with_all_bytes_same (VECTOR_CST_ELT (val, j)))
++ break;
++ if (j == VECTOR_CST_NELTS (val))
++ return 0;
++ break;
++ default:
++ break;
++ }
++ }
++
+ if (CHAR_BIT != 8 || BITS_PER_UNIT != 8)
+ return -1;
+
+@@ -887,7 +915,8 @@
+ cancel_loop_tree (loop);
+ rescan_loop_exit (exit, false, true);
+
+- for (i = 0; i < nbbs; i++)
++ i = nbbs;
++ do
+ {
+ /* We have made sure to not leave any dangling uses of SSA
+ names defined in the loop. With the exception of virtuals.
+@@ -894,6 +923,7 @@
+ Make sure we replace all uses of virtual defs that will remain
+ outside of the loop with the bare symbol as delete_basic_block
+ will release them. */
++ --i;
+ for (gphi_iterator gsi = gsi_start_phis (bbs[i]); !gsi_end_p (gsi);
+ gsi_next (&gsi))
+ {
+@@ -911,6 +941,8 @@
+ }
+ delete_basic_block (bbs[i]);
+ }
++ while (i != 0);
++
+ free (bbs);
+
+ set_immediate_dominator (CDI_DOMINATORS, dest,
+Index: gcc/ipa-polymorphic-call.c
+===================================================================
+--- a/src/gcc/ipa-polymorphic-call.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/ipa-polymorphic-call.c (.../branches/gcc-6-branch)
+@@ -1544,6 +1544,11 @@
+ if (!maybe_in_construction && !maybe_derived_type)
+ return false;
+
++ /* If we are in fact not looking at any object object or the instance is
++ some placement new into a random load, give up straight away. */
++ if (TREE_CODE (instance) == MEM_REF)
++ return false;
++
+ /* We need to obtain refernce to virtual table pointer. It is better
+ to look it up in the code rather than build our own. This require bit
+ of pattern matching, but we end up verifying that what we found is
+@@ -1664,7 +1669,6 @@
+ tci.offset = instance_offset;
+ tci.instance = instance;
+ tci.vtbl_ptr_ref = instance_ref;
+- gcc_assert (TREE_CODE (instance) != MEM_REF);
+ tci.known_current_type = NULL_TREE;
+ tci.known_current_offset = 0;
+ tci.otr_type = otr_type;
Index: gcc/tree-ssa-loop-unswitch.c
===================================================================
--- a/src/gcc/tree-ssa-loop-unswitch.c (.../tags/gcc_6_1_0_release)
@@ -6043,7 +7595,25 @@ Index: gcc/c/ChangeLog
===================================================================
--- a/src/gcc/c/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/c/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,44 @@
+@@ -1,3 +1,62 @@
++2016-08-12 Jakub Jelinek <jakub at redhat.com>
++ Martin Liska <mliska at suse.cz>
++
++ PR c/67410
++ * c-typeck.c (set_nonincremental_init_from_string): Use / instead of
++ % to determine val element to change. Assert that
++ wchar_bytes * charwidth fits into val array.
++
++2016-08-11 Jakub Jelinek <jakub at redhat.com>
++
++ Backported from mainline
++ 2016-08-11 Jakub Jelinek <jakub at redhat.com>
++
++ PR c/72816
++ * c-decl.c (grokdeclarator): When adding TYPE_DOMAIN for flexible
++ array member through typedef, for orig_qual_indirect == 0 clear
++ orig_qual_type.
++
+2016-07-02 Jakub Jelinek <jakub at redhat.com>
+
+ Backported from mainline
@@ -6497,7 +8067,25 @@ Index: gcc/c/c-typeck.c
if (location != UNKNOWN_LOCATION)
protected_set_expr_location (result.value, location);
-@@ -13533,7 +13538,8 @@
+@@ -8480,6 +8485,8 @@
+
+ wchar_bytes = TYPE_PRECISION (TREE_TYPE (TREE_TYPE (str))) / BITS_PER_UNIT;
+ charwidth = TYPE_PRECISION (char_type_node);
++ gcc_assert ((size_t) wchar_bytes * charwidth
++ <= ARRAY_SIZE (val) * HOST_BITS_PER_WIDE_INT);
+ type = TREE_TYPE (constructor_type);
+ p = TREE_STRING_POINTER (str);
+ end = p + TREE_STRING_LENGTH (str);
+@@ -8505,7 +8512,7 @@
+ bitpos = (wchar_bytes - byte - 1) * charwidth;
+ else
+ bitpos = byte * charwidth;
+- val[bitpos % HOST_BITS_PER_WIDE_INT]
++ val[bitpos / HOST_BITS_PER_WIDE_INT]
+ |= ((unsigned HOST_WIDE_INT) ((unsigned char) *p++))
+ << (bitpos % HOST_BITS_PER_WIDE_INT);
+ }
+@@ -13533,7 +13540,8 @@
: build_qualified_type (type, type_quals));
/* A variant type does not inherit the list of incomplete vars from the
type main variant. */
@@ -6527,6 +8115,19 @@ Index: gcc/c/c-tree.h
};
/* Type alias for struct c_expr. This allows to use the structure
+Index: gcc/c/c-decl.c
+===================================================================
+--- a/src/gcc/c/c-decl.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/c/c-decl.c (.../branches/gcc-6-branch)
+@@ -6563,6 +6563,8 @@
+ type = build_distinct_type_copy (TYPE_MAIN_VARIANT (type));
+ TYPE_DOMAIN (type) = build_range_type (sizetype, size_zero_node,
+ NULL_TREE);
++ if (orig_qual_indirect == 0)
++ orig_qual_type = NULL_TREE;
+ }
+ type = c_build_qualified_type (type, type_quals, orig_qual_type,
+ orig_qual_indirect);
Index: gcc/cgraph.c
===================================================================
--- a/src/gcc/cgraph.c (.../tags/gcc_6_1_0_release)
@@ -6560,7 +8161,7 @@ Index: gcc/DATESTAMP
+++ b/src/gcc/DATESTAMP (.../branches/gcc-6-branch)
@@ -1 +1 @@
-20160427
-+20160805
++20160815
Index: gcc/tree-ssa-strlen.c
===================================================================
--- a/src/gcc/tree-ssa-strlen.c (.../tags/gcc_6_1_0_release)
@@ -6744,7 +8345,19 @@ Index: gcc/gcc.c
===================================================================
--- a/src/gcc/gcc.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/gcc.c (.../branches/gcc-6-branch)
-@@ -7667,12 +7667,14 @@
+@@ -5387,8 +5387,9 @@
+ if (files_differ)
+ #endif
+ {
+- temp_filename = save_string (temp_filename,
+- temp_filename_length + 1);
++ temp_filename
++ = save_string (temp_filename,
++ temp_filename_length - 1);
+ obstack_grow (&obstack, temp_filename,
+ temp_filename_length);
+ arg_going = 1;
+@@ -7667,12 +7668,14 @@
for (unsigned j = 0; e->values[j].arg != NULL; j++)
{
char *with_arg = concat (opt_text, e->values[j].arg, NULL);
@@ -6761,7 +8374,7 @@ Index: gcc/gcc.c
break;
case OPT_fsanitize_:
-@@ -7696,7 +7698,8 @@
+@@ -7696,7 +7699,8 @@
/* Add with_arg and all of its variant spellings e.g.
"-fno-sanitize=address" to candidates (albeit without
leading dashes). */
@@ -7185,7 +8798,26 @@ Index: gcc/tree-ssa-sccvn.c
===================================================================
--- a/src/gcc/tree-ssa-sccvn.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/tree-ssa-sccvn.c (.../branches/gcc-6-branch)
-@@ -1976,11 +1976,7 @@
+@@ -1217,6 +1217,18 @@
+ {
+ auto_vec<vn_reference_op_s, 32> tem;
+ copy_reference_ops_from_ref (TREE_OPERAND (addr, 0), &tem);
++ /* Make sure to preserve TBAA info. The only objects not
++ wrapped in MEM_REFs that can have their address taken are
++ STRING_CSTs. */
++ if (tem.length () >= 2
++ && tem[tem.length () - 2].opcode == MEM_REF)
++ {
++ vn_reference_op_t new_mem_op = &tem[tem.length () - 2];
++ new_mem_op->op0 = fold_convert (TREE_TYPE (mem_op->op0),
++ new_mem_op->op0);
++ }
++ else
++ gcc_assert (tem.last ().opcode == STRING_CST);
+ ops->pop ();
+ ops->pop ();
+ ops->safe_splice (tem);
+@@ -1976,11 +1988,7 @@
/* We need to pre-pend vr->operands[0..i] to rhs. */
vec<vn_reference_op_s> old = vr->operands;
if (i + 1 + rhs.length () > vr->operands.length ())
@@ -7198,7 +8830,7 @@ Index: gcc/tree-ssa-sccvn.c
else
vr->operands.truncate (i + 1 + rhs.length ());
FOR_EACH_VEC_ELT (rhs, j, vro)
-@@ -2131,8 +2127,7 @@
+@@ -2131,8 +2139,7 @@
{
vec<vn_reference_op_s> old = vr->operands;
vr->operands.safe_grow_cleared (2);
@@ -7212,7 +8844,229 @@ Index: gcc/ChangeLog
===================================================================
--- a/src/gcc/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,2091 @@
+@@ -1,3 +1,2313 @@
++2016-08-15 Martin Liska <mliska at suse.cz>
++
++ Backported from mainline
++ 2016-08-15 Martin Liska <mliska at suse.cz>
++
++ PR driver/72765
++ * gcc.c (do_spec_1): Call save_string with the right size.
++
++2016-08-15 Jakub Jelinek <jakub at redhat.com>
++
++ PR debug/71906
++ * dwarf2out.c (string_types): New variable.
++ (gen_array_type_die): Change early_dwarf handling of
++ DW_AT_string_length, create DW_OP_call4 referencing the
++ length var temporarily. Handle parameters that are pointers
++ to string length.
++ (adjust_string_types): New function.
++ (gen_subprogram_die): Temporarily set string_types to local var,
++ call adjust_string_types if needed.
++ (non_dwarf_expression, copy_deref_exprloc, optimize_string_length):
++ New functions.
++ (resolve_addr): Adjust DW_AT_string_length if it is DW_OP_call4.
++
++2016-08-15 Richard Biener <rguenther at suse.de>
++
++ PR tree-optimization/73434
++ * tree-ssa-sccvn.c (vn_reference_maybe_forwprop_address): Preserve
++ TBAA info on the base when forwarding a non-invariant address.
++
++2016-08-15 Eric Botcazou <ebotcazou at adacore.com>
++
++ * doc/install.texi (*-*-solaris2*): Fix version number and document
++ requirement on GNU make for building libjava with the Solaris linker.
++
++2016-08-15 Martin Liska <mliska at suse.cz>
++ Jakub Jelinek <jakub at redhat.com>
++
++ PR tree-optimization/72824
++ * tree-loop-distribution.c (const_with_all_bytes_same)
++ <case VECTOR_CST>: Fix a typo.
++
++2016-08-14 Uros Bizjak <ubizjak at gmail.com>
++
++ Backport from mainline
++ 2016-08-14 Uros Bizjak <ubizjak at gmail.com>
++
++ PR target/76342
++ * config/i386/avx512fintrin.h (_mm512_undefined_epi32):
++ Renamed from _mm512_undefined_si512.
++ (_mm_undefined_si512): New definition.
++
++ Backport from mainline:
++ 2016-08-09 David Wohlferd <dw at LimeGreenSocks.com>
++
++ * config/i3836/avx512fintrin.h (_mm512_cvtsepi64_epi32): Remove
++ unused variable __O.
++
++ Backport from mainline:
++ 2016-08-09 Uros Bizjak <ubizjak at gmail.com>
++
++ PR target/72843
++ * config/i386/i386.md (*movtf_internal): Use
++ lra_in_progress || reload_completed instead of !can_create_pseudo_p
++ in the insn constraint.
++ (*movxf_internal): Ditto.
++ (*movdf_internal): Ditto.
++ (*movsf_internal): Ditto.
++
++2016-08-12 Jakub Jelinek <jakub at redhat.com>
++
++ PR c/71512
++ * ubsan.c (instrument_si_overflow): Pass true instead of false
++ to gsi_replace.
++ (pass_ubsan::execute): Call gimple_purge_dead_eh_edges at the end
++ of bbs. Return TODO_cleanup_cfg if any returned true.
++
++2016-08-12 Bernd Edlinger <bernd.edlinger at hotmail.de>
++
++ Backport from mainline
++ 2016-08-11 Bernd Edlinger <bernd.edlinger at hotmail.de>
++
++ PR tree-optimization/71083
++ * tree-predcom.c (ref_at_iteration): Correctly align the
++ reference type.
++
++2016-08-12 James Greenhalgh <james.greenhalgh at arm.com
++
++ Backport from mainline
++ 2016-08-05 James Greenhalgh <james.greenhalgh at arm.com>
++
++ PR Target/72819
++ * config/aarch64/aarch64.h (aarch64_fp16_type_node): Declare.
++ (aarch64_fp16_ptr_type_node): Likewise.
++ * config/aarch64/aarch64-simd-builtins.c
++ (aarch64_fp16_ptr_type_node): Define.
++ (aarch64_init_fp16_types): New, refactored out of...
++ (aarch64_init_builtins): ...here, update to call
++ aarch64_init_fp16_types.
++ * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr): Handle
++ HFmode.
++ (aapcs_vfp_sub_candidate): Likewise.
++
++2016-08-11 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-08-11 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ * config/s390/s390-builtin-types.def: Add INT128 types.
++ * config/s390/s390-builtins.def: Add INT128 variants for the add
++ sub low-level builtins dealing with TImode.
++ * config/s390/s390.c (s390_expand_builtin): Allow mode conversions
++ via subreg when expanding a builtin.
++ * config/s390/s390.md: Remove UNSPEC_VEC_ADDC_U128,
++ UNSPEC_VEC_SUB_U128, and UNSPEC_VEC_SUBC_U128 constants.
++ Fix comment.
++ * config/s390/vecintrin.h: Adjust builtin names accordingly.
++ * config/s390/vx-builtins.md ("vec_add_u128"): Remove expander.
++ ("vec_addc<mode>", "vec_addc_u128"): Merge to
++ "vacc<bhfgq>_<mode>".
++ ("vec_adde_u128"): Rename to "vacq". Change mode to TImode.
++ ("vec_addec_u128"): Rename to "vacccq". Change mode to TImode.
++ ("vec_subc<mode>", "vec_subc_u128"): Merge to
++ "vscbi<bhfgq>_<mode>".
++ ("vec_sube_u128"): Rename to "vsbiq". Change mode to TImode.
++ ("vec_subec_u128"): Rename to "vsbcbiq". Change mode to TImode.
++
++2016-08-11 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-08-11 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ * config/s390/s390-builtins.def: Mark last operand of s390_vlvg*
++ and s390_vlgv* builtins as element selector.
++
++2016-08-11 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-07-06 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ * config/s390/s390.c (s390_expand_vec_init): Force initializer
++ element to register if it doesn't match general_operand.
++
++2016-08-11 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-06-13 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ * config/s390/vecintrin.h: Fix file description in comment.
++
++2016-08-11 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-06-13 Andreas Krebbel <krebbel at linux.vnet.ibm.com>
++
++ * config/s390/s390-builtin-types.def: Change builtin type naming
++ scheme to match builtin-types.def.
++
++2016-08-10 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-08-10 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ PR target/72853
++ * config/rs6000/rs6000.c (mem_operand_ds_form): Add check for op
++ being an offsettable address.
++
++2016-08-10 Jakub Jelinek <jakub at redhat.com>
++
++ Backported from mainline
++ 2016-08-09 Jakub Jelinek <jakub at redhat.com>
++
++ PR tree-optimization/72824
++ * tree-loop-distribution.c (const_with_all_bytes_same): Verify
++ real_zerop is not negative.
++
++2016-08-09 Martin Jambor <mjambor at suse.cz>
++
++ PR ipa/71981
++ * ipa-polymorphic-call.c (get_dynamic_type): Bail out gracefully
++ if instance is a MEM_REF.
++
++2016-08-09 Richard Biener <rguenther at suse.de>
++
++ Backport from mainline
++ 2016-08-09 Richard Biener <rguenther at suse.de>
++
++ PR ipa/68273
++ * ipa-prop.c (ipa_modify_formal_parameters): Build
++ parameter types with natural alignment also for the
++ over-aligned case.
++
++ 2016-07-15 Richard Biener <rguenther at suse.de>
++
++ PR tree-optimization/71881
++ * tree-loop-distribution.c (destroy_loop): Remove blocks in
++ reverse DOM order to make debug temp generation happy.
++
++2016-08-09 Alan Modra <amodra at gmail.com>
++
++ PR target/72802
++ * config/rs6000/rs6000.md (mov<mode>_hardfloat): Sort
++ alternatives. Put loads first, then stores, and reg/reg moves
++ within same class later. Delete attr length.
++
++2016-08-09 Alan Modra <amodra at gmail.com>
++
++ PR target/72802
++ * config/rs6000/rs6000.c (mem_operand_gpr): Remove vsx dform test.
++ (mem_operand_ds_form): New predicate.
++ * config/rs6000/rs6000-protos.h (mem_operand_ds_form): Declare.
++ * config/rs6000/constraints.md (wY): New constraint.
++ * config/rs6000/rs6000.md (f32_lm2, f32_sm2): Use wY for SF.
++ (extendsfdf2_fpr): Replace o constraint with wY.
++
++2016-08-08 Georg-Johann Lay <avr at gjlay.de>
++
++ Backport from 2016-07-29 trunk r238863.
++
++ PR rtl-optimization/71976
++ * combine.c (get_last_value): Return 0 if the argument for which
++ the function is called has a wider mode than the recorded value.
++
+2016-08-04 Michael Meissner <meissner at linux.vnet.ibm.com>
+
+ Backport from trunk
@@ -9304,7 +11158,7 @@ Index: gcc/ChangeLog
2016-04-27 Release Manager
* GCC 6.1.0 released.
-@@ -49,7 +2137,7 @@
+@@ -49,7 +2359,7 @@
constant boolean.
2016-04-20 Andrew Pinski <apinski at cavium.com>
@@ -10511,6 +12365,119 @@ Index: gcc/testsuite/gcc.target/powerpc/vadsdub-1.c
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
+Index: gcc/testsuite/gcc.target/powerpc/pr72853.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr72853.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr72853.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,108 @@
++/* { dg-do compile { target { powerpc*-*-* } } } */
++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O3 -mupper-regs-df -mupper-regs-sf -funroll-loops" } */
++
++/* derived from 20021120-1.c, compiled for -mcpu=power9. */
++
++extern void abort (void);
++extern void exit (int);
++
++volatile double gd[32];
++volatile float gf[32];
++
++void
++foo (int n)
++{
++ double d00, d10, d20, d30, d01, d11, d21, d31, d02, d12, d22, d32, d03, d13,
++ d23, d33, d04, d14, d24, d34, d05, d15, d25, d35, d06, d16, d26, d36, d07,
++ d17, d27, d37;
++ float f00, f10, f20, f30, f01, f11, f21, f31, f02, f12, f22, f32, f03, f13,
++ f23, f33, f04, f14, f24, f34, f05, f15, f25, f35, f06, f16, f26, f36, f07,
++ f17, f27, f37;
++ volatile double *pd;
++ volatile float *pf;
++ int i;
++
++ pd = gd;
++ d00 = *(pd++), d10 = *(pd++), d20 = *(pd++), d30 = *(pd++), d01 =
++ *(pd++), d11 = *(pd++), d21 = *(pd++), d31 = *(pd++), d02 = *(pd++), d12 =
++ *(pd++), d22 = *(pd++), d32 = *(pd++), d03 = *(pd++), d13 = *(pd++), d23 =
++ *(pd++), d33 = *(pd++), d04 = *(pd++), d14 = *(pd++), d24 = *(pd++), d34 =
++ *(pd++), d05 = *(pd++), d15 = *(pd++), d25 = *(pd++), d35 = *(pd++), d06 =
++ *(pd++), d16 = *(pd++), d26 = *(pd++), d36 = *(pd++), d07 = *(pd++), d17 =
++ *(pd++), d27 = *(pd++), d37 = *(pd++);
++ for (i = 0; i < n; i++)
++ {
++ pf = gf;
++ f00 = *(pf++), f10 = *(pf++), f20 = *(pf++), f30 = *(pf++), f01 =
++ *(pf++), f11 = *(pf++), f21 = *(pf++), f31 = *(pf++), f02 =
++ *(pf++), f12 = *(pf++), f22 = *(pf++), f32 = *(pf++), f03 =
++ *(pf++), f13 = *(pf++), f23 = *(pf++), f33 = *(pf++), f04 =
++ *(pf++), f14 = *(pf++), f24 = *(pf++), f34 = *(pf++), f05 =
++ *(pf++), f15 = *(pf++), f25 = *(pf++), f35 = *(pf++), f06 =
++ *(pf++), f16 = *(pf++), f26 = *(pf++), f36 = *(pf++), f07 =
++ *(pf++), f17 = *(pf++), f27 = *(pf++), f37 = *(pf++);
++ pd = gd;
++ d00 += *(pd++), d10 += *(pd++), d20 += *(pd++), d30 += *(pd++), d01 +=
++ *(pd++), d11 += *(pd++), d21 += *(pd++), d31 += *(pd++), d02 +=
++ *(pd++), d12 += *(pd++), d22 += *(pd++), d32 += *(pd++), d03 +=
++ *(pd++), d13 += *(pd++), d23 += *(pd++), d33 += *(pd++), d04 +=
++ *(pd++), d14 += *(pd++), d24 += *(pd++), d34 += *(pd++), d05 +=
++ *(pd++), d15 += *(pd++), d25 += *(pd++), d35 += *(pd++), d06 +=
++ *(pd++), d16 += *(pd++), d26 += *(pd++), d36 += *(pd++), d07 +=
++ *(pd++), d17 += *(pd++), d27 += *(pd++), d37 += *(pd++);
++ pd = gd;
++ d00 += *(pd++), d10 += *(pd++), d20 += *(pd++), d30 += *(pd++), d01 +=
++ *(pd++), d11 += *(pd++), d21 += *(pd++), d31 += *(pd++), d02 +=
++ *(pd++), d12 += *(pd++), d22 += *(pd++), d32 += *(pd++), d03 +=
++ *(pd++), d13 += *(pd++), d23 += *(pd++), d33 += *(pd++), d04 +=
++ *(pd++), d14 += *(pd++), d24 += *(pd++), d34 += *(pd++), d05 +=
++ *(pd++), d15 += *(pd++), d25 += *(pd++), d35 += *(pd++), d06 +=
++ *(pd++), d16 += *(pd++), d26 += *(pd++), d36 += *(pd++), d07 +=
++ *(pd++), d17 += *(pd++), d27 += *(pd++), d37 += *(pd++);
++ pd = gd;
++ d00 += *(pd++), d10 += *(pd++), d20 += *(pd++), d30 += *(pd++), d01 +=
++ *(pd++), d11 += *(pd++), d21 += *(pd++), d31 += *(pd++), d02 +=
++ *(pd++), d12 += *(pd++), d22 += *(pd++), d32 += *(pd++), d03 +=
++ *(pd++), d13 += *(pd++), d23 += *(pd++), d33 += *(pd++), d04 +=
++ *(pd++), d14 += *(pd++), d24 += *(pd++), d34 += *(pd++), d05 +=
++ *(pd++), d15 += *(pd++), d25 += *(pd++), d35 += *(pd++), d06 +=
++ *(pd++), d16 += *(pd++), d26 += *(pd++), d36 += *(pd++), d07 +=
++ *(pd++), d17 += *(pd++), d27 += *(pd++), d37 += *(pd++);
++ pf = gf;
++ *(pf++) = f00, *(pf++) = f10, *(pf++) = f20, *(pf++) = f30, *(pf++) =
++ f01, *(pf++) = f11, *(pf++) = f21, *(pf++) = f31, *(pf++) =
++ f02, *(pf++) = f12, *(pf++) = f22, *(pf++) = f32, *(pf++) =
++ f03, *(pf++) = f13, *(pf++) = f23, *(pf++) = f33, *(pf++) =
++ f04, *(pf++) = f14, *(pf++) = f24, *(pf++) = f34, *(pf++) =
++ f05, *(pf++) = f15, *(pf++) = f25, *(pf++) = f35, *(pf++) =
++ f06, *(pf++) = f16, *(pf++) = f26, *(pf++) = f36, *(pf++) =
++ f07, *(pf++) = f17, *(pf++) = f27, *(pf++) = f37;
++ }
++ pd = gd;
++ *(pd++) = d00, *(pd++) = d10, *(pd++) = d20, *(pd++) = d30, *(pd++) =
++ d01, *(pd++) = d11, *(pd++) = d21, *(pd++) = d31, *(pd++) = d02, *(pd++) =
++ d12, *(pd++) = d22, *(pd++) = d32, *(pd++) = d03, *(pd++) = d13, *(pd++) =
++ d23, *(pd++) = d33, *(pd++) = d04, *(pd++) = d14, *(pd++) = d24, *(pd++) =
++ d34, *(pd++) = d05, *(pd++) = d15, *(pd++) = d25, *(pd++) = d35, *(pd++) =
++ d06, *(pd++) = d16, *(pd++) = d26, *(pd++) = d36, *(pd++) = d07, *(pd++) =
++ d17, *(pd++) = d27, *(pd++) = d37;
++}
++
++int
++main ()
++{
++ int i;
++
++ for (i = 0; i < 32; i++)
++ gd[i] = i, gf[i] = i;
++ foo (1);
++ for (i = 0; i < 32; i++)
++ if (gd[i] != i * 4 || gf[i] != i)
++ abort ();
++ exit (0);
++}
++
++/* { dg-final { scan-assembler-not "stxsd \[0-9\]+,\[0-9\]+,\[0-9\]" } } */
Index: gcc/testsuite/gcc.target/powerpc/vsrv-0.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/powerpc/vsrv-0.c (.../tags/gcc_6_1_0_release)
@@ -15540,6 +17507,289 @@ Index: gcc/testsuite/gcc.target/aarch64/pr70809_1.c
+}
+
+/* { dg-final { scan-assembler-not "fmls\tv.*" } } */
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-16.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-16.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-16.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,28 @@
++/* Test AAPCS64 layout and __builtin_va_arg.
++
++ This test is focused particularly on __fp16 unnamed homogeneous
++ floating-point aggregate types which should be passed in fp/simd
++ registers until we run out of those, then the stack. */
++
++/* { dg-do run { target aarch64*-*-* } } */
++
++#ifndef IN_FRAMEWORK
++#define AAPCS64_TEST_STDARG
++#define TESTFILE "va_arg-16.c"
++#include "type-def.h"
++
++struct hfa_f16x1_t hfa_f16x1 = {2.0f};
++struct hfa_f16x2_t hfa_f16x2 = {4.0f, 8.0f};
++struct hfa_f16x3_t hfa_f16x3 = {16.0f, 32.0f, 64.0f};
++
++#include "abitest.h"
++#else
++ ARG (int, 1, W0, LAST_NAMED_ARG_ID)
++ DOTS
++ ANON (struct hfa_f16x1_t, hfa_f16x1, H0 , 0)
++ ANON (struct hfa_f16x2_t, hfa_f16x2, H1 , 1)
++ ANON (struct hfa_f16x3_t, hfa_f16x3, H3 , 2)
++ ANON (struct hfa_f16x2_t, hfa_f16x2, H6 , 3)
++ ANON (struct hfa_f16x1_t, hfa_f16x1, STACK , 4)
++ LAST_ANON(double , 1.0 , STACK+8, 5)
++#endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c (.../branches/gcc-6-branch)
+@@ -19,6 +19,8 @@
+ signed int ss_promoted = 0xffffcba9;
+ float fp = 65432.12345f;
+ double fp_promoted = (double)65432.12345f;
++__fp16 fp16 = 2.0f;
++__fp16 fp16_promoted = (double)2.0f;
+
+ #define HAS_DATA_INIT_FUNC
+ void init_data ()
+@@ -46,9 +48,13 @@
+ ANON ( long double , 98765432123456789.987654321L, Q2, 12)
+ ANON ( vf2_t, vf2 , D3, 13)
+ ANON ( vi4_t, vi4 , Q4, 14)
++ /* 7.2: For unprototyped (i.e. pre- ANSI or K&R C) and variadic functions,
++ in addition to the normal conversions and promotions, arguments of
++ type __fp16 are converted to type double. */
++ ANON_PROMOTED( __fp16, fp16 , double, fp16_promoted, D5, 15)
+ #ifndef __AAPCS64_BIG_ENDIAN__
+- LAST_ANON ( int , 0xeeee, STACK+32,15)
++ LAST_ANON ( int , 0xeeee, STACK+32,16)
+ #else
+- LAST_ANON ( int , 0xeeee, STACK+36,15)
++ LAST_ANON ( int , 0xeeee, STACK+36,16)
+ #endif
+ #endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c (.../branches/gcc-6-branch)
+@@ -17,6 +17,8 @@
+ struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012};
+ struct hfa_ffs_t hfa_ffs;
+ union hfa_union_t hfa_union;
++struct hfa_f16x2_t hfa_f16x2 = {2.0f, 4.0f};
++struct hfa_f16x3_t hfa_f16x3 = {2.0f, 4.0f, 8.0f};
+
+ #define HAS_DATA_INIT_FUNC
+ void init_data ()
+@@ -43,5 +45,8 @@
+ ANON (struct hfa_fx1_t , hfa_fx1 , STACK+24, 4)
+ ANON (struct hfa_fx2_t , hfa_fx2 , STACK+32, 5)
+ ANON (struct hfa_dx2_t , hfa_dx2 , STACK+40, 6)
+- LAST_ANON(double , 1.0 , STACK+56, 7)
++ /* HFA of __fp16 passed on stack, directed __fp16 test is va_arg-10.c. */
++ ANON (struct hfa_f16x2_t, hfa_f16x2, STACK+56, 7)
++ ANON (struct hfa_f16x3_t, hfa_f16x3, STACK+64, 8)
++ LAST_ANON(double , 1.0 , STACK+72, 9)
+ #endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c (.../branches/gcc-6-branch)
+@@ -44,4 +44,5 @@
+ FUNC_VAL_CHECK (13, vi4_t, vi4, Q0, i32in128)
+ FUNC_VAL_CHECK (14, int *, int_ptr, X0, flat)
+ FUNC_VAL_CHECK (15, vlf1_t, vlf1, Q0, flat)
++FUNC_VAL_CHECK (16, __fp16, 0xabcd, H0, flat)
+ #endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h (.../branches/gcc-6-branch)
+@@ -44,6 +44,24 @@
+ float c;
+ };
+
++struct hfa_f16x1_t
++{
++ __fp16 a;
++};
++
++struct hfa_f16x2_t
++{
++ __fp16 a;
++ __fp16 b;
++};
++
++struct hfa_f16x3_t
++{
++ __fp16 a;
++ __fp16 b;
++ __fp16 c;
++};
++
+ struct hfa_dx2_t
+ {
+ double a;
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h (.../branches/gcc-6-branch)
+@@ -57,8 +57,18 @@
+ #define X8 320
+ #define X9 328
+
+-#define STACK 336
++#define H0 336
++#define H1 338
++#define H2 340
++#define H3 342
++#define H4 344
++#define H5 346
++#define H6 348
++#define H7 350
+
++
++#define STACK 352
++
+ /* The type of test. 'myfunc' in abitest.S needs to know which kind of
+ test it is running to decide what to do at the runtime. Keep the
+ related code in abitest.S synchronized if anything is changed here. */
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S (.../branches/gcc-6-branch)
+@@ -13,8 +13,13 @@
+ myfunc:
+ mov x16, sp
+ mov x17, sp
+- sub sp, sp, 352 // 336 for registers and 16 for old sp and lr
++ sub sp, sp, 368 // 352 for registers and 16 for old sp and lr
+
++ sub x17, x17, 8
++ st4 { v4.h, v5.h, v6.h, v7.h }[0], [x17] //344
++ sub x17, x17, 8
++ st4 { v0.h, v1.h, v2.h, v3.h }[0], [x17] //336
++
+ stp x8, x9, [x17, #-16]! //320
+
+ stp q6, q7, [x17, #-32]! //288
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c (.../branches/gcc-6-branch)
+@@ -19,6 +19,8 @@
+ signed int ss_promoted = 0xffffcba9;
+ float fp = 65432.12345f;
+ double fp_promoted = (double)65432.12345f;
++__fp16 fp16 = 2.0f;
++__fp16 fp16_promoted = (double)2.0f;
+
+ #define HAS_DATA_INIT_FUNC
+ void init_data ()
+@@ -64,9 +66,10 @@
+ ANON ( long double , 98765432123456789.987654321L, STACK+80, 20)
+ ANON ( vf2_t, vf2 , STACK+96, 21)
+ ANON ( vi4_t, vi4 , STACK+112,22)
++ ANON_PROMOTED( __fp16 , fp16 , double, fp16_promoted, STACK+128,23)
+ #ifndef __AAPCS64_BIG_ENDIAN__
+- LAST_ANON ( int , 0xeeee, STACK+128,23)
++ LAST_ANON ( int , 0xeeee, STACK+136,24)
+ #else
+- LAST_ANON ( int , 0xeeee, STACK+132,23)
++ LAST_ANON ( int , 0xeeee, STACK+140,24)
+ #endif
+ #endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c (.../branches/gcc-6-branch)
+@@ -12,5 +12,6 @@
+ ARG(double, 4.0, D1)
+ ARG(float, 2.0f, S2)
+ ARG(double, 5.0, D3)
++ ARG(__fp16, 8.0f, H4)
+ LAST_ARG(int, 3, W0)
+ #endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c (.../branches/gcc-6-branch)
+@@ -29,6 +29,8 @@
+ struct non_hfa_fffd_t non_hfa_fffd = {33.f, 34.f, 35.f, 36.0};
+ union hfa_union_t hfa_union;
+ union non_hfa_union_t non_hfa_union;
++struct hfa_f16x2_t hfa_f16x2 = {2.0f, 4.0f};
++struct hfa_f16x3_t hfa_f16x3 = {2.0f, 4.0f, 8.0f};
+
+ #define HAS_DATA_INIT_FUNC
+ void init_data ()
+@@ -89,9 +91,12 @@
+ PTR_ANON (struct non_hfa_ffs_t , non_hfa_ffs , STACK+120, 18)
+ ANON (struct non_hfa_ffs_2_t, non_hfa_ffs_2, STACK+128, 19)
+ ANON (union non_hfa_union_t, non_hfa_union, STACK+144, 20)
++ /* HFA of __fp16 passed on stack, directed __fp16 test is va_arg-10.c. */
++ ANON (struct hfa_f16x2_t , hfa_f16x2 , STACK+152, 21)
++ ANON (struct hfa_f16x3_t , hfa_f16x3 , STACK+160, 22)
+ #ifndef __AAPCS64_BIG_ENDIAN__
+- LAST_ANON(int , 2 , STACK+152, 30)
++ LAST_ANON(int , 2 , STACK+168, 30)
+ #else
+- LAST_ANON(int , 2 , STACK+156, 30)
++ LAST_ANON(int , 2 , STACK+172, 30)
+ #endif
+ #endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/test_27.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_27.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_27.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,46 @@
++/* Test AAPCS64 layout
++
++ Test named homogeneous floating-point aggregates of __fp16 data,
++ which should be passed in SIMD/FP registers or via the stack. */
++
++/* { dg-do run { target aarch64*-*-* } } */
++
++#ifndef IN_FRAMEWORK
++#define TESTFILE "test_27.c"
++
++struct x0
++{
++ __fp16 v[1];
++} f16x1;
++
++struct x1
++{
++ __fp16 v[2];
++} f16x2;
++
++struct x2
++{
++ __fp16 v[3];
++} f16x3;
++
++#define HAS_DATA_INIT_FUNC
++void init_data ()
++{
++ f16x1.v[0] = 2.0f;
++ f16x2.v[0] = 4.0f;
++ f16x2.v[1] = 8.0f;
++ f16x3.v[0] = 16.0f;
++ f16x3.v[1] = 32.0f;
++ f16x3.v[2] = 64.0f;
++}
++
++#include "abitest.h"
++#else
++ARG (struct x0, f16x1, H0)
++ARG (struct x1, f16x2, H1)
++ARG (struct x2, f16x3, H3)
++ARG (struct x1, f16x2, H6)
++ARG (struct x0, f16x1, STACK)
++ARG (int, 0xdeadbeef, W0)
++LAST_ARG (double, 456.789, STACK+8)
++#endif
Index: gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c (.../tags/gcc_6_1_0_release)
@@ -16726,6 +18976,22 @@ Index: gcc/testsuite/gcc.target/i386/pr68657.c
+
+/* { dg-message "The ABI for passing parameters with 64-byte alignment has changed" "" { target *-*-* } 6 } */
+/* { dg-message "some warnings being treated as errors" "" { target *-*-* } 0 } */
+Index: gcc/testsuite/gcc.target/i386/pr76342.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr76342.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr76342.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,11 @@
++/* PR target/76342 */
++/* { dg-do compile } */
++/* { dg-options "-mavx512f" } */
++
++#include <immintrin.h>
++
++__m512i
++test()
++{
++ return _mm512_undefined_epi32 ();
++}
Index: gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c (.../tags/gcc_6_1_0_release)
@@ -17214,6 +19480,39 @@ Index: gcc/testsuite/gfortran.dg/gomp/pr71687.f90
+ x(1:n) = x(n:1:-1)
+!$omp end parallel
+end
+Index: gcc/testsuite/gfortran.dg/namelist_90.f
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/namelist_90.f (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/namelist_90.f (.../branches/gcc-6-branch)
+@@ -0,0 +1,28 @@
++! { dg-do run }
++! PR71123 Namelist read failure on Windows
++ implicit none
++ integer :: i, ierr
++ real(8), dimension(30) :: senid, res
++ character(2) :: crlf = char(13) // char(10)
++ namelist /fith/ senid
++ do i=1,30
++ res(i) = i
++ enddo
++ senid = 99.0
++ open(unit=7,file='test.out',form='formatted',
++ * status='new',action='readwrite', access='stream')
++ write(7,'(a)') "&fith" // crlf
++ write(7,'(a)') "senid= 1.0 , 2.0 , 3.0 , 4.0 , 5.0 ," // crlf
++ write(7,'(a)') "6.0 , 7.0 , 8.0 , 9.0 , 10.0 , 11.0 ," // crlf
++ write(7,'(a)') "12.0 , 13.0 , 14.0 , 15.0 , 16.0 , 17.0 ," // crlf
++ write(7,'(a)') "18.0 , 19.0 , 20.0 , 21.0 , 22.0 , 23.0 ," // crlf
++ write(7,'(a)') "24.0 , 25.0 , 26.0 , 27.0 , 28.0 , 29.0 ," // crlf
++ write(7,'(a)') "30.0 ," // crlf
++ write(7,'(a)') "/" // crlf
++ close(7)
++ open(unit=7,file='test.out',form='formatted')
++ read(7,nml=fith, iostat=ierr)
++ close(7, status="delete")
++ if (ierr.ne.0) call abort
++ if (any(senid.ne.res)) call abort
++ end
Index: gcc/testsuite/gfortran.dg/goacc/subroutines.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/goacc/subroutines.f90 (.../tags/gcc_6_1_0_release)
@@ -18722,6 +21021,30 @@ Index: gcc/testsuite/gfortran.dg/pr71047.f08
+!
+! { dg-final { scan-tree-dump "t_a\\.\\d+\\.f\\._vptr =" "original" } }
+!
+Index: gcc/testsuite/gfortran.dg/pr70040.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/pr70040.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/pr70040.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,19 @@
++! { dg-do compile }
++! PR 70040 - used to cause an ICE.
++! Test case by Martin Reinecke
++program bugrep
++ implicit none
++ type :: string
++ character (len=:), allocatable :: s
++ end type
++
++ integer l
++ type(string), allocatable, dimension(:) :: foo
++ character(len=:),allocatable ::tmp
++ allocate(foo(20))
++ do l= 1, 20
++ tmp = foo(5)%s
++ foo(5)%s = foo(l)%s
++ foo(l)%s = tmp
++ enddo
++end program
Index: gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90 (.../tags/gcc_6_1_0_release)
@@ -18911,6 +21234,32 @@ Index: gcc/testsuite/gfortran.dg/guality/pr41558.f90
end
call f ('foo')
end
+Index: gcc/testsuite/gfortran.dg/array_constructor_50.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_50.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_50.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,21 @@
++! { dg-do run }
++! PR 71795 - wrong result when putting an array constructor
++! instide an iterator.
++ program test
++
++ implicit none
++ integer :: i,n
++ logical, dimension(1) :: ra
++ logical :: rs
++ integer, allocatable :: a(:)
++
++ allocate ( a(1) )
++
++ n = 1
++ a = 2
++
++ ra = (/ (any(a(i).eq.(/1,2,3/)) ,i=1,n) /)
++ if (.not. all(ra)) call abort
++ rs = any ( (/ (any(a(i).eq.(/1,2,3/)) ,i=1,n) /) )
++ if (.not. rs) call abort
++ end program test
Index: gcc/testsuite/gfortran.dg/dec_union_2.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/dec_union_2.f90 (.../tags/gcc_6_1_0_release)
@@ -19129,6 +21478,37 @@ Index: gcc/testsuite/gfortran.dg/dec_union_6.f90
+call sub1()
+
+end
+Index: gcc/testsuite/gfortran.dg/dependency_48.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/dependency_48.f90 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/dependency_48.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,26 @@
++! { dg-do compile }
++! { dg-options "-frepack-arrays -Warray-temporaries -O" }
++
++! Same as dependency_35 but with repack-arrays
++
++module foo
++ implicit none
++contains
++ pure function bar(i,j) ! { dg-warning "Creating array temporary at \\(1\\)" }
++ integer, intent(in) :: i,j
++ integer, dimension(2,2) :: bar
++ bar = 33
++ end function bar
++end module foo
++
++program main
++ use foo
++ implicit none
++ integer a(2,2), b(2,2),c(2,2), d(2,2), e(2)
++
++ read (*,*) b, c, d
++ a = matmul(b,c) + d
++ a = b + bar(3,4)
++ a = bar(3,4)*5 + b
++ e = sum(b,1) + 3
++end program main
Index: gcc/testsuite/gfortran.dg/dec_structure_4.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/dec_structure_4.f90 (.../tags/gcc_6_1_0_release)
@@ -19195,6 +21575,63 @@ Index: gcc/testsuite/gfortran.dg/pr71688.f90
+ x = 2
+ end
+end
+Index: gcc/testsuite/gfortran.dg/allocate_with_source_21.f03
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/allocate_with_source_21.f03 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/allocate_with_source_21.f03 (.../branches/gcc-6-branch)
+@@ -0,0 +1,52 @@
++! { dg-do compile }
++
++! Check fix for pr71936.
++! Contributed by Gerhard Steinmetz
++
++program p
++ type t
++ end type
++
++ call test2()
++ call test4()
++ call test1()
++ call test3()
++contains
++ function f_p()
++ class(t), pointer :: f_p(:)
++ nullify(f_p)
++ end
++
++ function f_a()
++ class(t), allocatable :: f_a(:)
++ end
++
++ subroutine test1()
++ class(t), allocatable :: x(:)
++ allocate (x, mold=f_a())
++ deallocate (x)
++ allocate (x, source=f_a())
++ end subroutine
++
++ subroutine test2()
++ class(t), pointer :: x(:)
++ allocate (x, mold=f_p())
++ deallocate (x)
++ allocate (x, source=f_p())
++ end
++
++ subroutine test3()
++ class(t), pointer :: x(:)
++ allocate (x, mold=f_a())
++ deallocate (x)
++ allocate (x, source=f_a())
++ end
++
++ subroutine test4()
++ class(t), allocatable :: x(:)
++ allocate (x, mold=f_p())
++ deallocate (x)
++ allocate (x, source=f_p())
++ end subroutine
++end
++
Index: gcc/testsuite/gfortran.dg/dec_structure_8.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/dec_structure_8.f90 (.../tags/gcc_6_1_0_release)
@@ -19559,6 +21996,32 @@ Index: gcc/testsuite/gfortran.dg/dec_structure_11.f90
+j = .i ! { dg-error "Invalid character in name" }
+
+end
+Index: gcc/testsuite/gfortran.dg/allocate_with_source_20.f03
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/allocate_with_source_20.f03 (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/allocate_with_source_20.f03 (.../branches/gcc-6-branch)
+@@ -0,0 +1,21 @@
++! { dg-do run }
++
++! Check that PR72698 is fixed.
++! Contributed by Gerhard Steinmetz
++
++module m
++contains
++ integer function f()
++ f = 4
++ end
++end
++program p
++ use m
++ character(3), parameter :: c = 'abc'
++ character(:), allocatable :: z
++ allocate (z, source=repeat(c(2:1), f()))
++ if (len(z) /= 0) call abort()
++ if (z /= "") call abort()
++end
++
++
Index: gcc/testsuite/gfortran.dg/pr71764.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/pr71764.f90 (.../tags/gcc_6_1_0_release)
@@ -19787,6 +22250,104 @@ Index: gcc/testsuite/gcc.c-torture/execute/pr71626-1.c
+ __builtin_abort ();
+ return 0;
+}
+Index: gcc/testsuite/gcc.c-torture/execute/pr71083.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.c-torture/execute/pr71083.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr71083.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,43 @@
++struct lock_chain {
++ unsigned int irq_context: 2,
++ depth: 6,
++ base: 24;
++};
++
++__attribute__((noinline, noclone))
++struct lock_chain * foo (struct lock_chain *chain)
++{
++ int i;
++ for (i = 0; i < 100; i++)
++ {
++ chain[i+1].base = chain[i].base;
++ }
++ return chain;
++}
++
++struct lock_chain1 {
++ char x;
++ unsigned short base;
++} __attribute__((packed));
++
++__attribute__((noinline, noclone))
++struct lock_chain1 * bar (struct lock_chain1 *chain)
++{
++ int i;
++ for (i = 0; i < 100; i++)
++ {
++ chain[i+1].base = chain[i].base;
++ }
++ return chain;
++}
++
++struct lock_chain test [101];
++struct lock_chain1 test1 [101];
++
++int
++main ()
++{
++ foo (test);
++ bar (test1);
++ return 0;
++}
+Index: gcc/testsuite/gcc.c-torture/execute/ieee/pr72824-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824-2.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824-2.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,21 @@
++/* PR tree-optimization/72824 */
++
++typedef float V __attribute__((vector_size (4 * sizeof (float))));
++
++static inline void
++foo (V *x, V value)
++{
++ int i;
++ for (i = 0; i < 32; ++i)
++ x[i] = value;
++}
++
++int
++main ()
++{
++ V x[32];
++ foo (x, (V) { 0.f, -0.f, 0.f, -0.f });
++ if (__builtin_copysignf (1.0, x[3][1]) != -1.0f)
++ __builtin_abort ();
++ return 0;
++}
+Index: gcc/testsuite/gcc.c-torture/execute/ieee/pr72824.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,19 @@
++/* PR tree-optimization/72824 */
++
++static inline void
++foo (float *x, float value)
++{
++ int i;
++ for (i = 0; i < 32; ++i)
++ x[i] = value;
++}
++
++int
++main ()
++{
++ float x[32];
++ foo (x, -0.f);
++ if (__builtin_copysignf (1.0, x[3]) != -1.0f)
++ __builtin_abort ();
++ return 0;
++}
Index: gcc/testsuite/gcc.c-torture/execute/pr71626-2.c
===================================================================
--- a/src/gcc/testsuite/gcc.c-torture/execute/pr71626-2.c (.../tags/gcc_6_1_0_release)
@@ -19870,6 +22431,222 @@ Index: gcc/testsuite/gcc.c-torture/compile/pr71916.c
+ ;
+ }
+}
+Index: gcc/testsuite/gcc.c-torture/compile/pr72802.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.c-torture/compile/pr72802.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.c-torture/compile/pr72802.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,211 @@
++static a[];
++static b, h, m, n, o, p, q, t, u, v, t5, t6, t16, t17, t18, t25;
++c;
++static volatile d;
++static volatile e;
++static volatile f;
++static volatile g;
++j;
++static volatile k;
++static volatile l;
++static volatile r;
++const volatile s;
++static volatile w;
++static volatile x;
++const volatile y;
++static volatile z;
++static volatile t1;
++static volatile t2;
++const t3;
++t4;
++const volatile t8;
++const volatile t9;
++const volatile t10;
++static volatile t11;
++static volatile t12;
++static volatile t13;
++static volatile t14;
++const volatile t15;
++static volatile t19;
++static volatile t20;
++const volatile t21;
++static volatile t22;
++static volatile t23;
++const volatile t24;
++*t29;
++fn1() { b = 5; }
++fn2(long);
++#pragma pack(1)
++struct S0 {
++ short f3;
++ float f4;
++ signed f5
++};
++const struct S0 t7[] = {};
++static fn3() {
++ int t26[] = {};
++ int t27[10] = {};
++ --t25;
++ if (fn4()) {
++ t5++;
++ fn5();
++ int t28[] = {t26, t27};
++ return;
++ }
++}
++fn6() {
++ int i, t30 = 0;
++ if (fn6 == 2)
++ t30 = 1;
++ {
++ int t31, i = 0;
++ for (; i < 256; i++) {
++ t31 = i;
++ if (i & 1)
++ t31 = 0;
++ a[i] = t31;
++ }
++ i = 0;
++ for (; i < 3; i++)
++ t29[i] = t6;
++ fn7();
++ fn3();
++ t4 = c = j = 0;
++ }
++ fn2(h);
++ if (t30)
++ printf(b);
++ g;
++ fn2(g);
++ printf(b);
++ f;
++ fn2(f);
++ if (t30)
++ printf(b);
++ e;
++ fn2(e);
++ printf(b);
++ fn8();
++ d;
++ fn2(d);
++ if (t30)
++ printf(b);
++ l;
++ fn2(l);
++ printf(b);
++ k;
++ fn2(k);
++ if (t30)
++ printf(b);
++ printf(b);
++ for (; i; i++) {
++ y;
++ fn2(y);
++ printf(b);
++ x;
++ fn2(x);
++ if (t30)
++ printf(b);
++ w;
++ fn2(w);
++ printf(b);
++ fn2(v);
++ printf(b);
++ fn2(u);
++ if (t30)
++ printf(b);
++ fn2(t);
++ printf(b);
++ s;
++ fn2(s);
++ if (t30)
++ printf(b);
++ r;
++ fn2(r);
++ printf(b);
++ fn2(q);
++ if (t30)
++ printf(b);
++ fn2(p);
++ printf("", b);
++ fn2(o);
++ printf(b);
++ fn2(n);
++ if (t30)
++ printf(b);
++ fn2(m);
++ printf(b);
++ }
++ fn2(z);
++ if (t30)
++ printf(b);
++ printf("", t3);
++ t2;
++ fn2(t2);
++ printf(b);
++ t1;
++ fn2(t1);
++ if (t30)
++ printf(b);
++ for (; i < 6; i++) {
++ t10;
++ fn2(t10);
++ printf(b);
++ t9;
++ fn2(t9);
++ if (t30)
++ printf(b);
++ t8;
++ fn2(t8);
++ printf(b);
++ fn2(t7[i].f3);
++ if (t30)
++ printf(b);
++ fn2(t7[i].f4);
++ printf(b);
++ fn2(t7[i].f5);
++ if (t30)
++ printf(b);
++ t15;
++ fn2(t15);
++ printf(b);
++ t14;
++ fn2(t14);
++ if (t30)
++ printf(b);
++ t13;
++ fn2(t13);
++ printf(b);
++ t12;
++ fn2(t12);
++ if (t30)
++ printf(b);
++ t11;
++ fn2(t11);
++ printf(b);
++ t21;
++ fn2(t21);
++ if (t30)
++ printf(b);
++ t20;
++ fn2(t20);
++ fn2(t19);
++ if (t30)
++ printf(b);
++ fn2(t18);
++ printf(b);
++ fn2(t17);
++ printf(b);
++ fn2(t16);
++ printf(b);
++ }
++ t24;
++ t24;
++ if (t30)
++ printf(b);
++ printf(t23);
++ t22;
++ t22;
++ if (t30)
++ printf(b);
++}
Index: gcc/testsuite/gcc.c-torture/compile/pr71693.c
===================================================================
--- a/src/gcc/testsuite/gcc.c-torture/compile/pr71693.c (.../tags/gcc_6_1_0_release)
@@ -19969,6 +22746,25 @@ Index: gcc/testsuite/gnat.dg/opt56.adb
+ end;
+
+end Opt56;
+Index: gcc/testsuite/gnat.dg/loop_optimization23.adb
+===================================================================
+--- a/src/gcc/testsuite/gnat.dg/loop_optimization23.adb (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gnat.dg/loop_optimization23.adb (.../branches/gcc-6-branch)
+@@ -0,0 +1,14 @@
++-- { dg-do run }
++-- { dg-options "-O3" }
++-- PR tree-optimization/71083
++with Loop_Optimization23_Pkg;
++use Loop_Optimization23_Pkg;
++procedure Loop_Optimization23 is
++ Test : ArrayOfStructB;
++begin
++ Test (0).b.b := 9999;
++ Foo (Test);
++ if Test (100).b.b /= 9999 then
++ raise Program_Error;
++ end if;
++end;
Index: gcc/testsuite/gnat.dg/opt56.ads
===================================================================
--- a/src/gcc/testsuite/gnat.dg/opt56.ads (.../tags/gcc_6_1_0_release)
@@ -20005,6 +22801,44 @@ Index: gcc/testsuite/gnat.dg/case_character.adb
+ end if;
+
+end;
+Index: gcc/testsuite/gnat.dg/loop_optimization23_pkg.adb
+===================================================================
+--- a/src/gcc/testsuite/gnat.dg/loop_optimization23_pkg.adb (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gnat.dg/loop_optimization23_pkg.adb (.../branches/gcc-6-branch)
+@@ -0,0 +1,11 @@
++-- { dg-do compile }
++-- { dg-options "-O3" }
++-- PR tree-optimization/71083
++package body Loop_Optimization23_Pkg is
++ procedure Foo (X : in out ArrayOfStructB) is
++ begin
++ for K in 0..99 loop
++ X (K+1).b.b := X (K).b.b;
++ end loop;
++ end Foo;
++end Loop_Optimization23_Pkg;
+Index: gcc/testsuite/gnat.dg/loop_optimization23_pkg.ads
+===================================================================
+--- a/src/gcc/testsuite/gnat.dg/loop_optimization23_pkg.ads (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gnat.dg/loop_optimization23_pkg.ads (.../branches/gcc-6-branch)
+@@ -0,0 +1,17 @@
++-- PR tree-optimization/71083
++package Loop_Optimization23_Pkg is
++ type Nibble is mod 2**4;
++ type Int24 is mod 2**24;
++ type StructA is record
++ a : Nibble;
++ b : Int24;
++ end record;
++ pragma Pack(StructA);
++ type StructB is record
++ a : Nibble;
++ b : StructA;
++ end record;
++ pragma Pack(StructB);
++ type ArrayOfStructB is array(0..100) of StructB;
++ procedure Foo (X : in out ArrayOfStructB);
++end Loop_Optimization23_Pkg;
Index: gcc/testsuite/gnat.dg/debug5.adb
===================================================================
--- a/src/gcc/testsuite/gnat.dg/debug5.adb (.../tags/gcc_6_1_0_release)
@@ -20032,6 +22866,20 @@ Index: gcc/testsuite/gnat.dg/debug5.adb
+begin
+ Discard (R);
+end Debug5;
+Index: gcc/testsuite/gcc.dg/pr72816.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/pr72816.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.dg/pr72816.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,9 @@
++/* PR c/72816 */
++/* { dg-do compile } */
++/* { dg-options "-std=gnu11" } */
++
++typedef const int A[];
++struct S {
++ int a;
++ A b;
++};
Index: gcc/testsuite/gcc.dg/guality/param-5.c
===================================================================
--- a/src/gcc/testsuite/gcc.dg/guality/param-5.c (.../tags/gcc_6_1_0_release)
@@ -20075,6 +22923,26 @@ Index: gcc/testsuite/gcc.dg/guality/param-5.c
+
+/* { dg-final { gdb-test 26 "str.pa" "31415927" } } */
+/* { dg-final { gdb-test 26 "str.pb" "27182818" } } */
+Index: gcc/testsuite/gcc.dg/pr67410.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/pr67410.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.dg/pr67410.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,15 @@
++/* PR c/67410 */
++/* { dg-do run } */
++/* { dg-options "-std=gnu11" } */
++
++struct {
++ __CHAR16_TYPE__ s[2];
++} a[] = { u"ff", [0].s[0] = u'x', [1] = u"\u1234\u4567", [1].s[0] = u'\u89ab' };
++
++int
++main ()
++{
++ if (a[0].s[0] != u'x' || a[0].s[1] != u'f' || a[1].s[0] != u'\u89ab' || a[1].s[1] != u'\u4567')
++ __builtin_abort ();
++ return 0;
++}
Index: gcc/testsuite/gcc.dg/goacc/nested-function-1.c
===================================================================
--- a/src/gcc/testsuite/gcc.dg/goacc/nested-function-1.c (.../tags/gcc_6_1_0_release)
@@ -20589,6 +23457,36 @@ Index: gcc/testsuite/gcc.dg/torture/float128-extend-nan.c
#include <fenv.h>
#include <float.h>
+Index: gcc/testsuite/gcc.dg/torture/pr71881.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/torture/pr71881.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.dg/torture/pr71881.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,25 @@
++/* { dg-do compile } */
++/* { dg-additional-options "-g" } */
++
++int a, b, c, d, *e, f, g;
++
++int fn1 ()
++{
++ char h[2];
++ int i = 0;
++ for (; i < 2; i++)
++ {
++ if (c)
++ for (*e = 0; *e;)
++ {
++ int j[f];
++ i = *e;
++ }
++ h[i] = 0;
++ }
++ for (; a;)
++ return h[0];
++ for (b = 0; b;)
++ i = g = (1 & i) < d;
++ return 0;
++}
Index: gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-2.c
===================================================================
--- a/src/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-2.c (.../tags/gcc_6_1_0_release)
@@ -20728,6 +23626,30 @@ Index: gcc/testsuite/gcc.dg/torture/pr71606.c
+void fn1 (__complex__ long double p1) {
+ __imag__ p1 = 6.0L;
+}
+Index: gcc/testsuite/gcc.dg/torture/pr73434.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/torture/pr73434.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.dg/torture/pr73434.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,19 @@
++/* { dg-do run } */
++
++typedef struct { unsigned char x; } A;
++typedef struct { unsigned char x; } B;
++
++int idx = 0;
++
++A objs[1] = {{0}};
++
++int main()
++{
++ B *b = (B*)&objs[idx];
++ b->x++;
++ if (b->x)
++ b->x = 0;
++ if (b->x)
++ __builtin_abort ();
++ return 0;
++}
Index: gcc/testsuite/gcc.dg/torture/pr70941.c
===================================================================
--- a/src/gcc/testsuite/gcc.dg/torture/pr70941.c (.../tags/gcc_6_1_0_release)
@@ -20929,6 +23851,21 @@ Index: gcc/testsuite/gcc.dg/ipa/pr70646.c
+
+ return 0;
+}
+Index: gcc/testsuite/gcc.dg/ipa/pr71981.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/ipa/pr71981.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/gcc.dg/ipa/pr71981.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -w" } */
++
++int **a;
++static void fn1(char **p1) {
++ char s = *p1, b = &s;
++ while (*fn2()[a])
++ ;
++}
++int main() { fn1(""); return 0; }
Index: gcc/testsuite/gcc.dg/const-float128-ped.c
===================================================================
--- a/src/gcc/testsuite/gcc.dg/const-float128-ped.c (.../tags/gcc_6_1_0_release)
@@ -21117,7 +24054,172 @@ Index: gcc/testsuite/ChangeLog
===================================================================
--- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,1334 @@
+@@ -1,3 +1,1499 @@
++2016-08-15 Richard Biener <rguenther at suse.de>
++
++ PR tree-optimization/73434
++ * gcc.dg/torture/pr73434.c: New testcase.
++
++2016-08-15 Jakub Jelinek <jakub at redhat.com>
++
++ PR tree-optimization/72824
++ * gcc.c-torture/execute/ieee/pr72824-2.c: New test.
++
++2016-08-14 Uros Bizjak <ubizjak at gmail.com>
++
++ Backport from mainline
++ 2016-08-14 Uros Bizjak <ubizjak at gmail.com>
++
++ PR target/76342
++ * gcc.target/i386/pr76342.c: New test.
++
++2016-08-12 Jakub Jelinek <jakub at redhat.com>
++
++ PR c/71512
++ * g++.dg/ubsan/pr71512.C: New test.
++ * c-c++-common/ubsan/pr71512-1.c: New test.
++ * c-c++-common/ubsan/pr71512-2.c: New test.
++
++2016-08-12 Bernd Edlinger <bernd.edlinger at hotmail.de>
++
++ Backport from mainline
++ 2016-08-11 Bernd Edlinger <bernd.edlinger at hotmail.de>
++
++ PR tree-optimization/71083
++ * gcc.c-torture/execute/pr71083.c: New test.
++ * gnat.dg/loop_optimization23.adb: New test.
++ * gnat.dg/loop_optimization23_pkg.ads: New test.
++ * gnat.dg/loop_optimization23_pkg.adb: New test.
++
++2016-08-12 Jakub Jelinek <jakub at redhat.com>
++
++ PR c/67410
++ * gcc.dg/pr67410.c: New test.
++
++2016-08-12 James Greenhalgh <james.greenhalgh at arm.com>
++
++ Backport from mainline
++ 2016-08-05 James Greenhalgh <james.greenhalgh at arm.com>
++
++ PR Target/72819
++ * gcc.target/aarch64/aapcs64/abitest-common.h: Define half-precision
++ registers.
++ * gcc.target/aarch64/aapcs64/abitest.S (dumpregs): Add assembly for
++ saving the half-precision registers.
++ * gcc.target/aarch64/aapcs64/func-ret-1.c: Test that an __fp16
++ value is returned in h0.
++ * gcc.target/aarch64/aapcs64/test_2.c: Check that __FP16 arguments
++ are passed in FP/SIMD registers.
++ * gcc.target/aarch64/aapcs64/test_27.c: New, test that __fp16 HFA
++ passing works corrcetly.
++ * gcc.target/aarch64/aapcs64/type-def.h (hfa_f16x1_t): New.
++ (hfa_f16x2_t): Likewise.
++ (hfa_f16x3_t): Likewise.
++ * gcc.target/aarch64/aapcs64/va_arg-1.c: Check that __fp16 values
++ are promoted to double and passed in a double register.
++ * gcc.target/aarch64/aapcs64/va_arg-2.c: Check that __fp16 values
++ are promoted to double and stacked.
++ * gcc.target/aarch64/aapcs64/va_arg-4.c: Check stacking of HFA of
++ __fp16 data types.
++ * gcc.target/aarch64/aapcs64/va_arg-5.c: Likewise.
++ * gcc.target/aarch64/aapcs64/va_arg-16.c: New, check HFAs of
++ __fp16 first get passed in FP/SIMD registers, then stacked.
++
++2016-08-11 Jerry DeLisle <jvdelisle at gcc.gnu.org>
++
++ Backport from trunk.
++ PR fortran/71123
++ * gfortran.dg/namelist_90.f: New test
++
++2016-08-11 Jakub Jelinek <jakub at redhat.com>
++
++ PR c++/72868
++ * constexpr.c (label_matches): Handle case range expressions.
++
++ Backported from mainline
++ 2016-08-11 Jakub Jelinek <jakub at redhat.com>
++
++ PR c/72816
++ * gcc.dg/pr72816.c: Remove dg-error.
++
++ 2016-08-07 Jakub Jelinek <jakub at redhat.com>
++
++ PR c/72816
++ * gcc.dg/pr72816.c: New test.
++
++2016-08-11 Andre Vehreschild <vehre at gcc.gnu.org>
++
++ Backport from trunk:
++ PR fortran/71936
++ * gfortran.dg/allocate_with_source_21.f03: New test.
++
++2016-08-11 Andre Vehreschild <vehre at gcc.gnu.org>
++
++ Backport from trunk:
++ PR fortran/72698
++ * gfortran.dg/allocate_with_source_20.f03: New test.
++
++2016-08-10 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ Backport from mainline
++ 2016-08-10 Michael Meissner <meissner at linux.vnet.ibm.com>
++
++ PR target/72853
++ * gcc.target/powerpc/pr72853.c: New test.
++
++2016-08-10 Jakub Jelinek <jakub at redhat.com>
++
++ Backported from mainline
++ 2016-08-09 Jakub Jelinek <jakub at redhat.com>
++
++ PR tree-optimization/72824
++ * gcc.c-torture/execute/ieee/pr72824.c: New test.
++
++2016-08-09 Martin Jambor <mjambor at suse.cz>
++
++ PR ipa/71981
++ * gcc.dg/ipa/pr71981.c: New test.
++
++2016-08-09 Richard Biener <rguenther at suse.de>
++
++ Backport from mainline
++ 2016-07-15 Richard Biener <rguenther at suse.de>
++
++ PR tree-optimization/71881
++ * gcc.dg/torture/pr71881.c: New testcase.
++
++2016-08-09 Alan Modra <amodra at gmail.com>
++
++ * gcc.c-torture/compile/pr72802.c: New.
++
++2016-08-08 Paolo Carlini <paolo.carlini at oracle.com>
++
++ PR c++/72800
++ * g++.dg/cpp1y/lambda-ice1.C: New.
++
++2016-07-25 Andre Vehreschild <vehre at gcc.gnu.org>
++
++ Backport from trunk:
++ PR fortran/70524
++ * gfortran.dg/dependency_48.f90: New test.
++
++2016-08-07 Thomas Koenig <tkoenig at gcc.gnu.org>
++
++ PR fortran/71795
++ Backport from trunk
++ * gfortran.dg/array_constructor_50.f90: New test.
++
++2016-08-07 Thomas Koenig <tkoenig at gcc.gnu.org>
++
++ PR fortran/70040
++ Backport from trunk
++ * gfortran.dg/pr70040.f90: New testcase.
++
++2016-08-05 Nathan Sidwell <nathan at acm.org>
++
++ PR c++/68724
++ * g++.dg/cpp0x/pr68724.C: New.
++
+2016-08-04 Michael Meissner <meissner at linux.vnet.ibm.com>
+
+ Backport from trunk
@@ -22671,6 +25773,31 @@ Index: gcc/testsuite/g++.dg/pr71184.C
+++ b/src/gcc/testsuite/g++.dg/pr71184.C (.../branches/gcc-6-branch)
@@ -0,0 +1 @@
+operator new[ // { dg-error "expected type-specifier before 'new'" }
+Index: gcc/testsuite/g++.dg/ubsan/pr71512.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/ubsan/pr71512.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/ubsan/pr71512.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,20 @@
++/* PR c/71512 */
++/* { dg-do compile } */
++/* { dg-options "-O2 -ftrapv -fnon-call-exceptions -fsanitize=undefined" } */
++
++bool
++foo (int *x, int *y, int *z)
++{
++ try
++ {
++ x[0] = y[0] + z[0];
++ x[1] = y[1] - z[1];
++ x[2] = y[2] * z[2];
++ x[3] = -y[3];
++ }
++ catch (...)
++ {
++ return true;
++ }
++ return false;
++}
Index: gcc/testsuite/g++.dg/ubsan/pr71393.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/ubsan/pr71393.C (.../tags/gcc_6_1_0_release)
@@ -23010,6 +26137,26 @@ Index: gcc/testsuite/g++.dg/cpp0x/variadic-nested1.C
+};
+
+A <>::B < int > e;
+Index: gcc/testsuite/g++.dg/cpp0x/pr68724.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/cpp0x/pr68724.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/cpp0x/pr68724.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,15 @@
++// PR 68724 ICE in unificiation
++// { dg-do compile { target c++11 } }
++
++template <typename _Tp, _Tp>
++struct integral_constant
++{
++};
++
++integral_constant<bool, true> inst;
++
++template <typename _Tp>
++struct integral_constant<bool, __is_enum(_Tp)> // { dg-error "" }
++{
++};
++
Index: gcc/testsuite/g++.dg/cpp0x/rv-bitfield3.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/cpp0x/rv-bitfield3.C (.../tags/gcc_6_1_0_release)
@@ -24103,6 +27250,38 @@ Index: gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C
#endif
#ifndef __cpp_variadic_templates
+Index: gcc/testsuite/g++.dg/cpp1y/constexpr-switch4.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/cpp1y/constexpr-switch4.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/cpp1y/constexpr-switch4.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,27 @@
++// PR c++/72868
++// { dg-do compile }
++// { dg-options "-std=gnu++14" }
++
++constexpr int
++foo (int i)
++{
++ switch (i)
++ {
++ case 11 ... 12:
++ return 4;
++ case 0 ... 9:
++ return 3;
++ default:
++ return 7;
++ }
++}
++
++#define SA(X) static_assert((X),#X)
++SA (foo (-1) == 7);
++SA (foo (0) == 3);
++SA (foo (3) == 3);
++SA (foo (9) == 3);
++SA (foo (10) == 7);
++SA (foo (11) == 4);
++SA (foo (12) == 4);
++SA (foo (13) == 7);
Index: gcc/testsuite/g++.dg/cpp1y/auto-fn32.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/cpp1y/auto-fn32.C (.../tags/gcc_6_1_0_release)
@@ -24141,6 +27320,24 @@ Index: gcc/testsuite/g++.dg/cpp1y/auto-fn32.C
+ same_type<decltype(a.f<0>()), int>();
+ same_type<decltype(a.g<0>()), int&>();
+}
+Index: gcc/testsuite/g++.dg/cpp1y/constexpr-array5.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/cpp1y/constexpr-array5.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/cpp1y/constexpr-array5.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,13 @@
++// PR c++/71972
++// { dg-do compile { target c++14 } }
++
++typedef int size_t;
++template <int N> struct S {
++ template <size_t M> constexpr S(const char (&)[M]) : data{} {
++ data[0] = data[0];
++ }
++ char data[N];
++};
++int main() {
++ constexpr S<1> s1("");
++}
Index: gcc/testsuite/g++.dg/cpp1y/lambda-generic-static1.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/cpp1y/lambda-generic-static1.C (.../tags/gcc_6_1_0_release)
@@ -24159,6 +27356,18 @@ Index: gcc/testsuite/g++.dg/cpp1y/lambda-generic-static1.C
+ if (f(0) != 1)
+ __builtin_abort();
+}
+Index: gcc/testsuite/g++.dg/cpp1y/lambda-ice1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/cpp1y/lambda-ice1.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/cpp1y/lambda-ice1.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,7 @@
++// PR c++/72800
++// { dg-do compile { target c++14 } }
++
++void foo ()
++{
++ [n {}] {}; // { dg-error "one element|deducing" }
++}
Index: gcc/testsuite/g++.dg/cpp1y/lambda-generic-static2.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/cpp1y/lambda-generic-static2.C (.../tags/gcc_6_1_0_release)
@@ -24640,6 +27849,31 @@ Index: gcc/testsuite/g++.dg/warn/Wno-narrowing1.C
+short offsets[1] = {
+ ((char*) &(((struct s*)16)->y) - (char *)16), // { dg-bogus "note" }
+};
+Index: gcc/testsuite/g++.dg/concepts/variadic4.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/concepts/variadic4.C (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/g++.dg/concepts/variadic4.C (.../branches/gcc-6-branch)
+@@ -0,0 +1,20 @@
++// PR c++/73456
++// { dg-options "-std=c++1z -fconcepts" }
++
++template<typename...> struct list {};
++
++template<typename Seq>
++concept bool Sequence = true;
++
++template<Sequence... Seqs>
++struct zip;
++
++template<Sequence... Seqs>
++ requires requires { typename list<Seqs...>; }
++// main.cpp:12:8: internal compiler error: in non_atomic_constraint_p, at cp/logic.cc:315
++struct zip<Seqs...> {};
++
++int main()
++{
++ zip<list<>, list<int>> {};
++}
Index: gcc/testsuite/g++.dg/concepts/memfun2.C
===================================================================
--- a/src/gcc/testsuite/g++.dg/concepts/memfun2.C (.../tags/gcc_6_1_0_release)
@@ -25071,6 +28305,26 @@ Index: gcc/testsuite/g++.dg/template/dtor10.C
+ foo < 0 > ();
+ return 0;
+}
+Index: gcc/testsuite/c-c++-common/ubsan/pr71512-1.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/ubsan/pr71512-1.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/c-c++-common/ubsan/pr71512-1.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,5 @@
++/* PR c/71512 */
++/* { dg-do compile } */
++/* { dg-options "-O2 -fnon-call-exceptions -ftrapv -fexceptions -fsanitize=undefined" } */
++
++#include "../../gcc.dg/pr44545.c"
+Index: gcc/testsuite/c-c++-common/ubsan/pr71512-2.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/ubsan/pr71512-2.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/testsuite/c-c++-common/ubsan/pr71512-2.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,5 @@
++/* PR c/71512 */
++/* { dg-do compile } */
++/* { dg-options "-O -fexceptions -fnon-call-exceptions -ftrapv -fsanitize=undefined" } */
++
++#include "../../gcc.dg/pr47086.c"
Index: gcc/testsuite/c-c++-common/ubsan/bounds-13.c
===================================================================
--- a/src/gcc/testsuite/c-c++-common/ubsan/bounds-13.c (.../tags/gcc_6_1_0_release)
@@ -25818,7 +29072,94 @@ Index: gcc/cp/constexpr.c
}
if (r == NULL_TREE)
-@@ -3714,6 +3739,19 @@
+@@ -2024,40 +2049,47 @@
+ else
+ found = (i < len);
+
+- if (!found)
++ if (found)
+ {
+- if (TREE_CODE (ary) == CONSTRUCTOR
+- && CONSTRUCTOR_NO_IMPLICIT_ZERO (ary))
++ tree r;
++ if (TREE_CODE (ary) == CONSTRUCTOR)
++ r = (*CONSTRUCTOR_ELTS (ary))[i].value;
++ else if (elem_nchars == 1)
++ r = build_int_cst (cv_unqualified (TREE_TYPE (TREE_TYPE (ary))),
++ TREE_STRING_POINTER (ary)[i]);
++ else
+ {
+- /* 'ary' is part of the aggregate initializer we're currently
+- building; if there's no initializer for this element yet,
+- that's an error. */
+- if (!ctx->quiet)
+- error ("accessing uninitialized array element");
+- *non_constant_p = true;
+- return t;
++ tree type = cv_unqualified (TREE_TYPE (TREE_TYPE (ary)));
++ r = native_interpret_expr (type, (const unsigned char *)
++ TREE_STRING_POINTER (ary)
++ + i * elem_nchars, elem_nchars);
+ }
++ if (r)
++ /* Don't VERIFY_CONSTANT here. */
++ return r;
+
+- /* If it's within the array bounds but doesn't have an explicit
+- initializer, it's value-initialized. */
+- tree val = build_value_init (elem_type, tf_warning_or_error);
+- return cxx_eval_constant_expression (ctx, val, lval, non_constant_p,
+- overflow_p);
++ /* Otherwise the element doesn't have a value yet. */
+ }
+
+- if (TREE_CODE (ary) == CONSTRUCTOR)
+- return (*CONSTRUCTOR_ELTS (ary))[i].value;
+- else if (elem_nchars == 1)
+- return build_int_cst (cv_unqualified (TREE_TYPE (TREE_TYPE (ary))),
+- TREE_STRING_POINTER (ary)[i]);
+- else
++ /* Not found. */
++
++ if (TREE_CODE (ary) == CONSTRUCTOR
++ && CONSTRUCTOR_NO_IMPLICIT_ZERO (ary))
+ {
+- tree type = cv_unqualified (TREE_TYPE (TREE_TYPE (ary)));
+- return native_interpret_expr (type, (const unsigned char *)
+- TREE_STRING_POINTER (ary)
+- + i * elem_nchars, elem_nchars);
++ /* 'ary' is part of the aggregate initializer we're currently
++ building; if there's no initializer for this element yet,
++ that's an error. */
++ if (!ctx->quiet)
++ error ("accessing uninitialized array element");
++ *non_constant_p = true;
++ return t;
+ }
+- /* Don't VERIFY_CONSTANT here. */
++
++ /* If it's within the array bounds but doesn't have an explicit
++ initializer, it's value-initialized. */
++ tree val = build_value_init (elem_type, tf_warning_or_error);
++ return cxx_eval_constant_expression (ctx, val, lval, non_constant_p,
++ overflow_p);
+ }
+
+ /* Subroutine of cxx_eval_constant_expression.
+@@ -3282,6 +3314,12 @@
+ {
+ if (!CASE_LOW (stmt))
+ default_label = i;
++ else if (CASE_HIGH (stmt))
++ {
++ if (tree_int_cst_le (CASE_LOW (stmt), *jump_target)
++ && tree_int_cst_le (*jump_target, CASE_HIGH (stmt)))
++ return true;
++ }
+ else if (tree_int_cst_equal (*jump_target, CASE_LOW (stmt)))
+ return true;
+ }
+@@ -3714,6 +3752,19 @@
case REALPART_EXPR:
case IMAGPART_EXPR:
@@ -25838,7 +29179,7 @@ Index: gcc/cp/constexpr.c
case CONJ_EXPR:
case FIX_TRUNC_EXPR:
case FLOAT_EXPR:
-@@ -5140,10 +5178,12 @@
+@@ -5140,10 +5191,12 @@
case GOTO_EXPR:
{
tree *target = &TREE_OPERAND (t, 0);
@@ -25855,7 +29196,7 @@ Index: gcc/cp/constexpr.c
}
default:
-@@ -5151,7 +5191,7 @@
+@@ -5151,7 +5204,7 @@
return false;
sorry ("unexpected AST of kind %s", get_tree_code_name (TREE_CODE (t)));
@@ -26271,7 +29612,7 @@ Index: gcc/cp/logic.cc
inline proof_state::iterator
proof_state::branch (iterator i)
{
-@@ -211,258 +258,519 @@
+@@ -211,258 +258,522 @@
return insert (++i, g);
}
@@ -26333,6 +29674,9 @@ Index: gcc/cp/logic.cc
+ case ICONV_CONSTR:
+ case DEDUCT_CONSTR:
+ case EXCEPT_CONSTR:
++ /* A pack expansion isn't atomic, but it can't decompose to prove an
++ atom, so it shouldn't cause analyze_atom to return undecided. */
++ case EXPR_PACK_EXPANSION:
+ return false;
+ case CHECK_CONSTR:
+ case PARM_CONSTR:
@@ -26968,7 +30312,7 @@ Index: gcc/cp/logic.cc
bool
subsumes_constraints_nonnull (tree left, tree right)
{
-@@ -469,20 +777,17 @@
+@@ -469,20 +780,17 @@
gcc_assert (check_constraint_info (left));
gcc_assert (check_constraint_info (right));
@@ -26999,7 +30343,34 @@ Index: gcc/cp/ChangeLog
===================================================================
--- a/src/gcc/cp/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/cp/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,519 @@
+@@ -1,3 +1,546 @@
++2016-08-13 Jason Merrill <jason at redhat.com>
++
++ PR c++/71972
++ * constexpr.c (cxx_eval_array_reference): Handle looking for the
++ value of an element we're currently modifying.
++
++2016-08-11 Jakub Jelinek <jakub at redhat.com>
++
++ PR c++/72868
++ * constexpr.c (label_matches): Handle case range expressions.
++
++2016-08-11 Jason Merrill <jason at redhat.com>
++
++ PR c++/73456
++ * logic.cc (non_atomic_constraint_p): Handle EXPR_PACK_EXPANSION.
++
++2016-08-08 Paolo Carlini <paolo.carlini at oracle.com>
++
++ PR c++/72800
++ * lambda.c (add_capture): Check lambda_capture_field_type return
++ value for error_mark_node.
++
++2016-08-05 Nathan Sidwell <nathan at acm.org>
++
++ PR c++/68724
++ * pt.c (unify): TRAIT_EXPR is an expr.
++
+2016-08-04 Jason Merrill <jason at redhat.com>
+
+ PR c++/72415
@@ -28421,6 +31792,15 @@ Index: gcc/cp/pt.c
if (DECL_CLASS_SCOPE_P (gen_tmpl))
pop_nested_class ();
pop_from_top_level ();
+@@ -20107,7 +20185,7 @@
+ /* An unresolved overload is a nondeduced context. */
+ if (is_overloaded_fn (parm) || type_unknown_p (parm))
+ return unify_success (explain_p);
+- gcc_assert (EXPR_P (parm));
++ gcc_assert (EXPR_P (parm) || TREE_CODE (parm) == TRAIT_EXPR);
+ expr:
+ /* We must be looking at an expression. This can happen with
+ something like:
@@ -20848,36 +20926,6 @@
return decl;
}
@@ -31735,7 +35115,16 @@ Index: gcc/cp/lambda.c
===================================================================
--- a/src/gcc/cp/lambda.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/cp/lambda.c (.../branches/gcc-6-branch)
-@@ -871,8 +871,10 @@
+@@ -485,6 +485,8 @@
+ else
+ {
+ type = lambda_capture_field_type (initializer, explicit_init_p);
++ if (type == error_mark_node)
++ return error_mark_node;
+ if (by_reference_p)
+ {
+ type = build_reference_type (type);
+@@ -871,8 +873,10 @@
bool nested = (cfun != NULL);
bool nested_def = decl_function_context (TYPE_MAIN_DECL (type));
tree callop = lambda_function (type);
@@ -31747,7 +35136,7 @@ Index: gcc/cp/lambda.c
return;
if (processing_template_decl)
-@@ -901,6 +903,8 @@
+@@ -901,6 +905,8 @@
tree optype = TREE_TYPE (callop);
tree fn_result = TREE_TYPE (optype);
@@ -31756,7 +35145,7 @@ Index: gcc/cp/lambda.c
if (generic_lambda_p)
{
/* Prepare the dependent member call for the static member function
-@@ -908,7 +912,8 @@
+@@ -908,7 +914,8 @@
return expression for a deduced return call op to allow for simple
implementation of the conversion operator. */
@@ -31766,7 +35155,7 @@ Index: gcc/cp/lambda.c
tree objfn = build_min (COMPONENT_REF, NULL_TREE,
instance, DECL_NAME (callop), NULL_TREE);
int nargs = list_length (DECL_ARGUMENTS (callop)) - 1;
-@@ -920,9 +925,7 @@
+@@ -920,9 +927,7 @@
else
{
direct_argvec = make_tree_vector ();
@@ -32123,7 +35512,18 @@ Index: gcc/dwarf2out.c
===================================================================
--- a/src/gcc/dwarf2out.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/dwarf2out.c (.../branches/gcc-6-branch)
-@@ -15573,7 +15573,7 @@
+@@ -3126,6 +3126,10 @@
+
+ static vec<dw_die_ref> base_types;
+
++/* Pointer to vector of DW_TAG_string_type DIEs that need finalization
++ once all arguments are parsed. */
++static vec<dw_die_ref> *string_types;
++
+ /* Flags to represent a set of attribute classes for attributes that represent
+ a scalar value (bounds, pointers, ...). */
+ enum dw_scalar_form
+@@ -15573,7 +15577,7 @@
if (stack_usage == NULL)
return false;
@@ -32132,7 +35532,7 @@ Index: gcc/dwarf2out.c
break;
}
-@@ -17805,7 +17805,7 @@
+@@ -17805,7 +17809,7 @@
fieldsize = tree_to_shwi (DECL_SIZE_UNIT (field));
pos = int_byte_position (field);
gcc_assert (pos + fieldsize <= size);
@@ -32141,7 +35541,124 @@ Index: gcc/dwarf2out.c
&& !native_encode_initializer (val, array + pos, fieldsize))
return false;
}
-@@ -19401,11 +19401,13 @@
+@@ -19201,19 +19205,71 @@
+ if (size >= 0)
+ add_AT_unsigned (array_die, DW_AT_byte_size, size);
+ else if (TYPE_DOMAIN (type) != NULL_TREE
+- && TYPE_MAX_VALUE (TYPE_DOMAIN (type)) != NULL_TREE
+- && DECL_P (TYPE_MAX_VALUE (TYPE_DOMAIN (type))))
++ && TYPE_MAX_VALUE (TYPE_DOMAIN (type)) != NULL_TREE)
+ {
+ tree szdecl = TYPE_MAX_VALUE (TYPE_DOMAIN (type));
+- dw_loc_list_ref loc = loc_list_from_tree (szdecl, 2, NULL);
++ tree rszdecl = szdecl;
++ HOST_WIDE_INT rsize = 0;
+
+ size = int_size_in_bytes (TREE_TYPE (szdecl));
+- if (loc && size > 0)
++ if (!DECL_P (szdecl))
+ {
+- add_AT_location_description (array_die, DW_AT_string_length, loc);
+- if (size != DWARF2_ADDR_SIZE)
+- add_AT_unsigned (array_die, DW_AT_byte_size, size);
++ if (TREE_CODE (szdecl) == INDIRECT_REF
++ && DECL_P (TREE_OPERAND (szdecl, 0)))
++ {
++ rszdecl = TREE_OPERAND (szdecl, 0);
++ rsize = int_size_in_bytes (TREE_TYPE (rszdecl));
++ if (rsize <= 0)
++ size = 0;
++ }
++ else
++ size = 0;
+ }
++ if (size > 0)
++ {
++ dw_loc_list_ref loc = loc_list_from_tree (szdecl, 2, NULL);
++ if (loc == NULL
++ && early_dwarf
++ && current_function_decl
++ && DECL_CONTEXT (rszdecl) == current_function_decl)
++ {
++ dw_die_ref ref = lookup_decl_die (rszdecl);
++ dw_loc_descr_ref l = NULL;
++ if (ref)
++ {
++ l = new_loc_descr (DW_OP_call4, 0, 0);
++ l->dw_loc_oprnd1.val_class = dw_val_class_die_ref;
++ l->dw_loc_oprnd1.v.val_die_ref.die = ref;
++ l->dw_loc_oprnd1.v.val_die_ref.external = 0;
++ }
++ else if (TREE_CODE (rszdecl) == PARM_DECL
++ && string_types)
++ {
++ l = new_loc_descr (DW_OP_call4, 0, 0);
++ l->dw_loc_oprnd1.val_class = dw_val_class_decl_ref;
++ l->dw_loc_oprnd1.v.val_decl_ref = rszdecl;
++ string_types->safe_push (array_die);
++ }
++ if (l && rszdecl != szdecl)
++ {
++ if (rsize == DWARF2_ADDR_SIZE)
++ add_loc_descr (&l, new_loc_descr (DW_OP_deref,
++ 0, 0));
++ else
++ add_loc_descr (&l, new_loc_descr (DW_OP_deref_size,
++ rsize, 0));
++ }
++ if (l)
++ loc = new_loc_list (l, NULL, NULL, NULL);
++ }
++ if (loc)
++ {
++ add_AT_location_description (array_die, DW_AT_string_length,
++ loc);
++ if (size != DWARF2_ADDR_SIZE)
++ add_AT_unsigned (array_die, DW_AT_byte_size, size);
++ }
++ }
+ }
+ return;
+ }
+@@ -19278,6 +19334,37 @@
+ add_pubtype (type, array_die);
+ }
+
++/* After all arguments are created, adjust any DW_TAG_string_type
++ DIEs DW_AT_string_length attributes. */
++
++static void
++adjust_string_types (void)
++{
++ dw_die_ref array_die;
++ unsigned int i;
++ FOR_EACH_VEC_ELT (*string_types, i, array_die)
++ {
++ dw_attr_node *a = get_AT (array_die, DW_AT_string_length);
++ if (a == NULL)
++ continue;
++ dw_loc_descr_ref loc = AT_loc (a);
++ gcc_assert (loc->dw_loc_opc == DW_OP_call4
++ && loc->dw_loc_oprnd1.val_class == dw_val_class_decl_ref);
++ dw_die_ref ref = lookup_decl_die (loc->dw_loc_oprnd1.v.val_decl_ref);
++ if (ref)
++ {
++ loc->dw_loc_oprnd1.val_class = dw_val_class_die_ref;
++ loc->dw_loc_oprnd1.v.val_die_ref.die = ref;
++ loc->dw_loc_oprnd1.v.val_die_ref.external = 0;
++ }
++ else
++ {
++ remove_AT (array_die, DW_AT_string_length);
++ remove_AT (array_die, DW_AT_byte_size);
++ }
++ }
++}
++
+ /* This routine generates DIE for array with hidden descriptor, details
+ are filled into *info by a langhook. */
+
+@@ -19401,11 +19488,13 @@
static void
retry_incomplete_types (void)
{
@@ -32155,7 +35672,17 @@ Index: gcc/dwarf2out.c
}
/* Determine what tag to use for a record type. */
-@@ -20724,14 +20726,17 @@
+@@ -20673,6 +20762,9 @@
+ tree generic_decl_parm = generic_decl
+ ? DECL_ARGUMENTS (generic_decl)
+ : NULL;
++ auto_vec<dw_die_ref> string_types_vec;
++ if (string_types == NULL)
++ string_types = &string_types_vec;
+
+ /* Now we want to walk the list of parameters of the function and
+ emit their relevant DIEs.
+@@ -20724,14 +20816,25 @@
void_type_node 2) an unprototyped function declaration (not a
definition). This just means that we have no info about the
parameters at all. */
@@ -32175,10 +35702,251 @@ Index: gcc/dwarf2out.c
}
- else if (DECL_INITIAL (decl) == NULL_TREE)
- gen_unspecified_parameters_die (decl, subr_die);
++
++ /* Adjust DW_TAG_string_type DIEs if needed, now that all arguments
++ have DIEs. */
++ if (string_types == &string_types_vec)
++ {
++ adjust_string_types ();
++ string_types = NULL;
++ }
}
if (subr_die != old_die)
-@@ -27382,10 +27387,6 @@
+@@ -26574,6 +26677,175 @@
+ }
+ }
+
++/* Return NULL if l is a DWARF expression, or first op that is not
++ valid DWARF expression. */
++
++static dw_loc_descr_ref
++non_dwarf_expression (dw_loc_descr_ref l)
++{
++ while (l)
++ {
++ if (l->dw_loc_opc >= DW_OP_reg0 && l->dw_loc_opc <= DW_OP_reg31)
++ return l;
++ switch (l->dw_loc_opc)
++ {
++ case DW_OP_regx:
++ case DW_OP_implicit_value:
++ case DW_OP_stack_value:
++ case DW_OP_GNU_implicit_pointer:
++ case DW_OP_GNU_parameter_ref:
++ case DW_OP_piece:
++ case DW_OP_bit_piece:
++ return l;
++ default:
++ break;
++ }
++ l = l->dw_loc_next;
++ }
++ return NULL;
++}
++
++/* Return adjusted copy of EXPR:
++ If it is empty DWARF expression, return it.
++ If it is valid non-empty DWARF expression,
++ return copy of EXPR with copy of DEREF appended to it.
++ If it is DWARF expression followed by DW_OP_reg{N,x}, return
++ copy of the DWARF expression with DW_OP_breg{N,x} <0> appended
++ and no DEREF.
++ If it is DWARF expression followed by DW_OP_stack_value, return
++ copy of the DWARF expression without anything appended.
++ Otherwise, return NULL. */
++
++static dw_loc_descr_ref
++copy_deref_exprloc (dw_loc_descr_ref expr, dw_loc_descr_ref deref)
++{
++
++ if (expr == NULL)
++ return NULL;
++
++ dw_loc_descr_ref l = non_dwarf_expression (expr);
++ if (l && l->dw_loc_next)
++ return NULL;
++
++ if (l)
++ {
++ if (l->dw_loc_opc >= DW_OP_reg0 && l->dw_loc_opc <= DW_OP_reg31)
++ deref = new_loc_descr ((enum dwarf_location_atom)
++ (DW_OP_breg0 + (l->dw_loc_opc - DW_OP_reg0)),
++ 0, 0);
++ else
++ switch (l->dw_loc_opc)
++ {
++ case DW_OP_regx:
++ deref = new_loc_descr (DW_OP_bregx,
++ l->dw_loc_oprnd1.v.val_unsigned, 0);
++ break;
++ case DW_OP_stack_value:
++ deref = NULL;
++ break;
++ default:
++ return NULL;
++ }
++ }
++ else
++ deref = new_loc_descr (deref->dw_loc_opc,
++ deref->dw_loc_oprnd1.v.val_int, 0);
++
++ dw_loc_descr_ref ret = NULL, *p = &ret;
++ while (expr != l)
++ {
++ *p = new_loc_descr (expr->dw_loc_opc, 0, 0);
++ (*p)->dw_loc_oprnd1 = expr->dw_loc_oprnd1;
++ (*p)->dw_loc_oprnd2 = expr->dw_loc_oprnd2;
++ p = &(*p)->dw_loc_next;
++ expr = expr->dw_loc_next;
++ }
++ *p = deref;
++ return ret;
++}
++
++/* For DW_AT_string_length attribute with DW_OP_call4 reference to a variable
++ or argument, adjust it if needed and return:
++ -1 if the DW_AT_string_length attribute and DW_AT_byte_size attribute
++ if present should be removed
++ 0 keep the attribute as is if the referenced var or argument has
++ only DWARF expression that covers all ranges
++ 1 if the attribute has been successfully adjusted. */
++
++static int
++optimize_string_length (dw_attr_node *a)
++{
++ dw_loc_descr_ref l = AT_loc (a), lv;
++ dw_die_ref die = l->dw_loc_oprnd1.v.val_die_ref.die;
++ dw_attr_node *av = get_AT (die, DW_AT_location);
++ dw_loc_list_ref d;
++ bool non_dwarf_expr = false;
++
++ if (av == NULL)
++ return -1;
++ switch (AT_class (av))
++ {
++ case dw_val_class_loc_list:
++ for (d = AT_loc_list (av); d != NULL; d = d->dw_loc_next)
++ if (d->expr && non_dwarf_expression (d->expr))
++ non_dwarf_expr = true;
++ break;
++ case dw_val_class_loc:
++ lv = AT_loc (av);
++ if (lv == NULL)
++ return -1;
++ if (non_dwarf_expression (lv))
++ non_dwarf_expr = true;
++ break;
++ default:
++ return -1;
++ }
++
++ /* If it is safe to keep DW_OP_call4 in, keep it. */
++ if (!non_dwarf_expr
++ && (l->dw_loc_next == NULL || AT_class (av) == dw_val_class_loc))
++ return 0;
++
++ /* If not dereferencing the DW_OP_call4 afterwards, we can just
++ copy over the DW_AT_location attribute from die to a. */
++ if (l->dw_loc_next == NULL)
++ {
++ a->dw_attr_val = av->dw_attr_val;
++ return 1;
++ }
++
++ dw_loc_list_ref list, *p;
++ switch (AT_class (av))
++ {
++ case dw_val_class_loc_list:
++ p = &list;
++ list = NULL;
++ for (d = AT_loc_list (av); d != NULL; d = d->dw_loc_next)
++ {
++ lv = copy_deref_exprloc (d->expr, l->dw_loc_next);
++ if (lv)
++ {
++ *p = new_loc_list (lv, d->begin, d->end, d->section);
++ p = &(*p)->dw_loc_next;
++ }
++ }
++ if (list == NULL)
++ return -1;
++ a->dw_attr_val.val_class = dw_val_class_loc_list;
++ gen_llsym (list);
++ *AT_loc_list_ptr (a) = list;
++ return 1;
++ case dw_val_class_loc:
++ lv = copy_deref_exprloc (AT_loc (av), l->dw_loc_next);
++ if (lv == NULL)
++ return -1;
++ a->dw_attr_val.v.val_loc = lv;
++ return 1;
++ default:
++ gcc_unreachable ();
++ }
++}
++
+ /* Resolve DW_OP_addr and DW_AT_const_value CONST_STRING arguments to
+ an address in .rodata section if the string literal is emitted there,
+ or remove the containing location list or replace DW_AT_const_value
+@@ -26588,6 +26860,7 @@
+ dw_attr_node *a;
+ dw_loc_list_ref *curr, *start, loc;
+ unsigned ix;
++ bool remove_AT_byte_size = false;
+
+ FOR_EACH_VEC_SAFE_ELT (die->die_attr, ix, a)
+ switch (AT_class (a))
+@@ -26648,6 +26921,38 @@
+ case dw_val_class_loc:
+ {
+ dw_loc_descr_ref l = AT_loc (a);
++ /* Using DW_OP_call4 or DW_OP_call4 DW_OP_deref in
++ DW_AT_string_length is only a rough approximation; unfortunately
++ DW_AT_string_length can't be a reference to a DIE. DW_OP_call4
++ needs a DWARF expression, while DW_AT_location of the referenced
++ variable or argument might be any location description. */
++ if (a->dw_attr == DW_AT_string_length
++ && l
++ && l->dw_loc_opc == DW_OP_call4
++ && l->dw_loc_oprnd1.val_class == dw_val_class_die_ref
++ && (l->dw_loc_next == NULL
++ || (l->dw_loc_next->dw_loc_next == NULL
++ && (l->dw_loc_next->dw_loc_opc == DW_OP_deref
++ || l->dw_loc_next->dw_loc_opc != DW_OP_deref_size))))
++ {
++ switch (optimize_string_length (a))
++ {
++ case -1:
++ remove_AT (die, a->dw_attr);
++ ix--;
++ /* For DWARF4 and earlier, if we drop DW_AT_string_length,
++ we need to drop also DW_AT_byte_size. */
++ remove_AT_byte_size = true;
++ continue;
++ default:
++ break;
++ case 1:
++ /* Even if we keep the optimized DW_AT_string_length,
++ it might have changed AT_class, so process it again. */
++ ix--;
++ continue;
++ }
++ }
+ /* For -gdwarf-2 don't attempt to optimize
+ DW_AT_data_member_location containing
+ DW_OP_plus_uconst - older consumers might
+@@ -26732,6 +27037,9 @@
+ break;
+ }
+
++ if (remove_AT_byte_size)
++ remove_AT (die, DW_AT_byte_size);
++
+ FOR_EACH_CHILD (die, c, resolve_addr (c));
+ }
+
+@@ -27382,10 +27690,6 @@
resolve_addr (comp_unit_die ());
move_marked_base_types ();
@@ -32189,7 +35957,7 @@ Index: gcc/dwarf2out.c
if (flag_eliminate_unused_debug_types)
prune_unused_types ();
-@@ -27686,6 +27687,10 @@
+@@ -27686,6 +27990,10 @@
static void
dwarf2out_early_finish (void)
{
@@ -33796,7 +37564,41 @@ Index: gcc/fortran/trans-array.c
===================================================================
--- a/src/gcc/fortran/trans-array.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/fortran/trans-array.c (.../branches/gcc-6-branch)
-@@ -6376,7 +6376,12 @@
+@@ -5421,12 +5421,19 @@
+
+ if (ref->u.ar.type == AR_FULL && expr3 != NULL)
+ {
++ gfc_ref *old_ref = ref;
+ /* F08:C633: Array shape from expr3. */
+ ref = expr3->ref;
+
+ /* Find the last reference in the chain. */
+ if (!retrieve_last_ref (&ref, &prev_ref))
+- return false;
++ {
++ if (expr3->expr_type == EXPR_FUNCTION
++ && gfc_expr_attr (expr3).dimension)
++ ref = old_ref;
++ else
++ return false;
++ }
+ alloc_w_e3_arr_spec = true;
+ }
+
+@@ -6093,7 +6100,12 @@
+ return;
+ }
+
++ loc.nextc = NULL;
+ gfc_save_backend_locus (&loc);
++ /* loc.nextc is not set by save_backend_locus but the location routines
++ depend on it. */
++ if (loc.nextc == NULL)
++ loc.nextc = loc.lb->line;
+ gfc_set_backend_locus (&sym->declared_at);
+
+ /* Descriptor type. */
+@@ -6376,7 +6388,12 @@
stmtCleanup = gfc_finish_block (&cleanup);
/* Only do the cleanup if the array was repacked. */
@@ -35205,7 +39007,44 @@ Index: gcc/fortran/ChangeLog
===================================================================
--- a/src/gcc/fortran/ChangeLog (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,273 @@
+@@ -1,3 +1,310 @@
++2016-08-15 Jakub Jelinek <jakub at redhat.com>
++
++ PR debug/71906
++ * trans-decl.c (gfc_get_symbol_decl): Call gfc_finish_var_decl
++ for decl's character length before gfc_finish_var_decl on the
++ decl itself.
++
++2016-08-11 Andre Vehreschild <vehre at gcc.gnu.org>
++
++ Backport from trunk:
++ PR fortran/71936
++ * trans-array.c (gfc_array_allocate): When SOURCE= is a function
++ stick with the ref of the object to allocate.
++
++2016-08-11 Andre Vehreschild <vehre at gcc.gnu.org>
++
++ Backport from trunk
++ PR fortran/72698
++ * trans-stmt.c (gfc_trans_allocate): Prevent generating code for
++ copy of zero sized string and with it an ICE.
++
++2016-08-08 Andre Vehreschild <vehre at gcc.gnu.org>
++
++ Backport from trunk:
++ PR fortran/70524
++ * trans-array.c (gfc_trans_dummy_array_bias): Ensure that the
++ location information is correctly set.
++ * trans-decl.c (gfc_trans_deferred_vars): Set the locus of the
++ current construct early.
++
++2016-08-07 Thomas Koenig <tkoenig at gcc.gnu.org>
++
++ PR fortran/71795
++ Backport from trunk
++ * frontend-passes.c (combine_array_constructor): Don't
++ do anything if the expression is inside an array iterator.
++
+2016-07-28 Steven G. Kargl <kargl at gcc.gnu.org>
+ Thomas Koenig <tkoenig at gcc.gnu.org>
+
@@ -35483,7 +39322,42 @@ Index: gcc/fortran/trans-stmt.c
===================================================================
--- a/src/gcc/fortran/trans-stmt.c (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/fortran/trans-stmt.c (.../branches/gcc-6-branch)
-@@ -5694,9 +5694,11 @@
+@@ -5439,9 +5439,19 @@
+ }
+ gfc_add_block_to_block (&block, &se.pre);
+ gfc_add_block_to_block (&post, &se.post);
++
++ /* Special case when string in expr3 is zero. */
++ if (code->expr3->ts.type == BT_CHARACTER
++ && integer_zerop (se.string_length))
++ {
++ gfc_init_se (&se, NULL);
++ temp_var_needed = false;
++ expr3_len = integer_zero_node;
++ e3_is = E3_MOLD;
++ }
+ /* Prevent aliasing, i.e., se.expr may be already a
+ variable declaration. */
+- if (se.expr != NULL_TREE && temp_var_needed)
++ else if (se.expr != NULL_TREE && temp_var_needed)
+ {
+ tree var, desc;
+ tmp = GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (se.expr)) || is_coarray ?
+@@ -5670,11 +5680,8 @@
+ gcc_assert (expr3_esize);
+ expr3_esize = fold_convert (sizetype, expr3_esize);
+ if (e3_is == E3_MOLD)
+- {
+- /* The expr3 is no longer valid after this point. */
+- expr3 = NULL_TREE;
+- e3_is = E3_UNSET;
+- }
++ /* The expr3 is no longer valid after this point. */
++ expr3 = NULL_TREE;
+ }
+ else if (code->ext.alloc.ts.type != BT_UNKNOWN)
+ {
+@@ -5694,9 +5701,11 @@
tmp = gfc_get_char_type (code->ext.alloc.ts.kind);
tmp = TYPE_SIZE_UNIT (tmp);
tmp = fold_convert (TREE_TYPE (se_sz.expr), tmp);
@@ -35495,7 +39369,7 @@ Index: gcc/fortran/trans-stmt.c
}
}
-@@ -5895,6 +5897,7 @@
+@@ -5895,6 +5904,7 @@
source= or mold= expression. */
gfc_init_se (&se_sz, NULL);
gfc_conv_expr (&se_sz, code->ext.alloc.ts.u.cl->length);
@@ -35503,7 +39377,7 @@ Index: gcc/fortran/trans-stmt.c
gfc_add_modify (&block, al_len,
fold_convert (TREE_TYPE (al_len),
se_sz.expr));
-@@ -5979,11 +5982,19 @@
+@@ -5979,11 +5989,19 @@
specified by a type spec for deferred length character
arrays or unlimited polymorphic objects without a
source= or mold= expression. */
@@ -35528,7 +39402,16 @@ Index: gcc/fortran/trans-stmt.c
}
else
/* No length information needed, because type to allocate
-@@ -6275,7 +6286,7 @@
+@@ -5992,7 +6010,7 @@
+ fold_convert (TREE_TYPE (al_len),
+ integer_zero_node));
+ }
+- if (code->expr3 && !code->expr3->mold)
++ if (code->expr3 && !code->expr3->mold && e3_is != E3_MOLD)
+ {
+ /* Initialization via SOURCE block (or static default initializer).
+ Classes need some special handling, so catch them first. */
+@@ -6275,7 +6293,7 @@
{
gfc_ref *ref;
@@ -35970,7 +39853,19 @@ Index: gcc/fortran/frontend-passes.c
else
symbol->attr.allocatable = 1;
}
-@@ -2812,6 +2824,12 @@
+@@ -1248,6 +1260,11 @@
+ if (forall_level > 0)
+ return false;
+
++ /* Inside an iterator, things can get hairy; we are likely to create
++ an invalid temporary variable. */
++ if (iterator_level > 0)
++ return false;
++
+ op1 = e->value.op.op1;
+ op2 = e->value.op.op2;
+
+@@ -2812,6 +2829,12 @@
if (in_where)
return 0;
@@ -37213,7 +41108,47 @@ Index: gcc/fortran/trans-decl.c
gfc_copy_dt_decls_ifequal (s, sym, true);
return true;
}
-@@ -2384,7 +2400,7 @@
+@@ -1623,26 +1639,23 @@
+ && !(sym->attr.use_assoc && !intrinsic_array_parameter)))
+ gfc_defer_symbol_init (sym);
+
++ /* Associate names can use the hidden string length variable
++ of their associated target. */
++ if (sym->ts.type == BT_CHARACTER
++ && TREE_CODE (length) != INTEGER_CST)
++ {
++ gfc_finish_var_decl (length, sym);
++ gcc_assert (!sym->value);
++ }
++
+ gfc_finish_var_decl (decl, sym);
+
+ if (sym->ts.type == BT_CHARACTER)
+- {
+- /* Character variables need special handling. */
+- gfc_allocate_lang_decl (decl);
+-
+- /* Associate names can use the hidden string length variable
+- of their associated target. */
+- if (TREE_CODE (length) != INTEGER_CST)
+- {
+- gfc_finish_var_decl (length, sym);
+- gcc_assert (!sym->value);
+- }
+- }
++ /* Character variables need special handling. */
++ gfc_allocate_lang_decl (decl);
+ else if (sym->attr.subref_array_pointer)
+- {
+- /* We need the span for these beasts. */
+- gfc_allocate_lang_decl (decl);
+- }
++ /* We need the span for these beasts. */
++ gfc_allocate_lang_decl (decl);
+
+ if (sym->attr.subref_array_pointer)
+ {
+@@ -2384,7 +2397,7 @@
Thus, we will use a hidden argument in that case. */
else if (f->sym->attr.optional && f->sym->attr.value
&& !f->sym->attr.dimension && f->sym->ts.type != BT_CLASS
@@ -37222,7 +41157,25 @@ Index: gcc/fortran/trans-decl.c
{
tree tmp;
strcpy (&name[1], f->sym->name);
-@@ -4596,7 +4612,7 @@
+@@ -4034,6 +4047,8 @@
+ else if (proc_sym->as)
+ {
+ tree result = TREE_VALUE (current_fake_result_decl);
++ gfc_save_backend_locus (&loc);
++ gfc_set_backend_locus (&proc_sym->declared_at);
+ gfc_trans_dummy_array_bias (proc_sym, result, block);
+
+ /* An automatic character length, pointer array result. */
+@@ -4043,8 +4058,6 @@
+ tmp = NULL;
+ if (proc_sym->ts.deferred)
+ {
+- gfc_save_backend_locus (&loc);
+- gfc_set_backend_locus (&proc_sym->declared_at);
+ gfc_start_block (&init);
+ tmp = gfc_null_and_pass_deferred_len (proc_sym, &init, &loc);
+ gfc_add_init_cleanup (block, gfc_finish_block (&init), tmp);
+@@ -4596,7 +4609,7 @@
&& sym->ts.type == BT_DERIVED)
sym->backend_decl = gfc_typenode_for_spec (&(sym->ts));
@@ -37231,7 +41184,7 @@ Index: gcc/fortran/trans-decl.c
&& sym->backend_decl
&& TREE_CODE (sym->backend_decl) == RECORD_TYPE)
{
-@@ -4839,7 +4855,7 @@
+@@ -4839,7 +4852,7 @@
}
else switch (ts->type)
{
@@ -37240,7 +41193,7 @@ Index: gcc/fortran/trans-decl.c
if (expr->expr_type != EXPR_STRUCTURE)
return false;
cm = expr->ts.u.derived->components;
-@@ -6260,7 +6276,7 @@
+@@ -6260,7 +6273,7 @@
gfc_finish_block (&cleanup));
/* Add all the decls we created during processing. */
@@ -37249,7 +41202,7 @@ Index: gcc/fortran/trans-decl.c
while (decl)
{
tree next;
-@@ -6319,7 +6335,7 @@
+@@ -6319,7 +6332,7 @@
function has already called cgraph_create_node, which also created
the cgraph node for this function. */
if (!has_coarray_vars || flag_coarray != GFC_FCOARRAY_LIB)
@@ -37258,7 +41211,7 @@ Index: gcc/fortran/trans-decl.c
}
else
cgraph_node::finalize_function (fndecl, true);
-@@ -6452,7 +6468,7 @@
+@@ -6452,7 +6465,7 @@
if (flag_coarray == GFC_FCOARRAY_LIB && has_coarray_vars)
generate_coarray_init (ns);
@@ -39874,6 +43827,42 @@ Index: gcc/tree-sra.c
seq = gsi_seq (gsi);
if (seq)
+Index: gcc/tree-predcom.c
+===================================================================
+--- a/src/gcc/tree-predcom.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/tree-predcom.c (.../branches/gcc-6-branch)
+@@ -213,6 +213,7 @@
+ #include "tree-scalar-evolution.h"
+ #include "params.h"
+ #include "tree-affine.h"
++#include "builtins.h"
+
+ /* The maximum number of iterations between the considered memory
+ references. */
+@@ -1381,6 +1382,8 @@
+ addr = force_gimple_operand_1 (unshare_expr (addr), stmts,
+ is_gimple_mem_ref_addr, NULL_TREE);
+ tree alias_ptr = fold_convert (reference_alias_ptr_type (DR_REF (dr)), coff);
++ tree type = build_aligned_type (TREE_TYPE (DR_REF (dr)),
++ get_object_alignment (DR_REF (dr)));
+ /* While data-ref analysis punts on bit offsets it still handles
+ bitfield accesses at byte boundaries. Cope with that. Note that
+ we cannot simply re-apply the outer COMPONENT_REF because the
+@@ -1392,12 +1395,11 @@
+ {
+ tree field = TREE_OPERAND (DR_REF (dr), 1);
+ return build3 (BIT_FIELD_REF, TREE_TYPE (DR_REF (dr)),
+- build2 (MEM_REF, DECL_BIT_FIELD_TYPE (field),
+- addr, alias_ptr),
++ build2 (MEM_REF, type, addr, alias_ptr),
+ DECL_SIZE (field), bitsize_zero_node);
+ }
+ else
+- return fold_build2 (MEM_REF, TREE_TYPE (DR_REF (dr)), addr, alias_ptr);
++ return fold_build2 (MEM_REF, type, addr, alias_ptr);
+ }
+
+ /* Get the initialization expression for the INDEX-th temporary variable
Index: gcc/ubsan.c
===================================================================
--- a/src/gcc/ubsan.c (.../tags/gcc_6_1_0_release)
@@ -39886,6 +43875,44 @@ Index: gcc/ubsan.c
if (TREE_CODE (type) == REAL_TYPE)
return tree_to_uhwi (TYPE_SIZE (type));
else if (INTEGRAL_TYPE_P (type))
+@@ -1293,7 +1292,7 @@
+ ? IFN_UBSAN_CHECK_SUB
+ : IFN_UBSAN_CHECK_MUL, 2, a, b);
+ gimple_call_set_lhs (g, lhs);
+- gsi_replace (&gsi, g, false);
++ gsi_replace (&gsi, g, true);
+ break;
+ case NEGATE_EXPR:
+ /* Represent i = -u;
+@@ -1303,7 +1302,7 @@
+ b = gimple_assign_rhs1 (stmt);
+ g = gimple_build_call_internal (IFN_UBSAN_CHECK_SUB, 2, a, b);
+ gimple_call_set_lhs (g, lhs);
+- gsi_replace (&gsi, g, false);
++ gsi_replace (&gsi, g, true);
+ break;
+ case ABS_EXPR:
+ /* Transform i = ABS_EXPR<u>;
+@@ -1956,6 +1955,7 @@
+ {
+ basic_block bb;
+ gimple_stmt_iterator gsi;
++ unsigned int ret = 0;
+
+ initialize_sanitizer_builtins ();
+
+@@ -2014,8 +2014,10 @@
+
+ gsi_next (&gsi);
+ }
++ if (gimple_purge_dead_eh_edges (bb))
++ ret = TODO_cleanup_cfg;
+ }
+- return 0;
++ return ret;
+ }
+
+ } // anon namespace
Index: gcc/ipa-prop.c
===================================================================
--- a/src/gcc/ipa-prop.c (.../tags/gcc_6_1_0_release)
@@ -39900,6 +43927,15 @@ Index: gcc/ipa-prop.c
/* The function operates in three stages. First, we prepare check_ref, r,
arg_base and arg_offset based on what is actually passed as an actual
argument. */
+@@ -3764,7 +3767,7 @@
+ if (is_gimple_reg_type (ptype))
+ {
+ unsigned malign = GET_MODE_ALIGNMENT (TYPE_MODE (ptype));
+- if (TYPE_ALIGN (ptype) < malign)
++ if (TYPE_ALIGN (ptype) != malign)
+ ptype = build_aligned_type (ptype, malign);
+ }
+ }
Index: gcc/po/es.po
===================================================================
--- a/src/gcc/po/es.po (.../tags/gcc_6_1_0_release)
@@ -821438,6 +825474,23 @@ Index: gcc/tree-object-size.c
static tree compute_object_offset (const_tree, const_tree);
static unsigned HOST_WIDE_INT addr_object_size (struct object_size_info *,
+Index: gcc/combine.c
+===================================================================
+--- a/src/gcc/combine.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/combine.c (.../branches/gcc-6-branch)
+@@ -13179,6 +13179,12 @@
+ && DF_INSN_LUID (rsp->last_set) >= subst_low_luid)
+ return 0;
+
++ /* If fewer bits were set than what we are asked for now, we cannot use
++ the value. */
++ if (GET_MODE_PRECISION (rsp->last_set_mode)
++ < GET_MODE_PRECISION (GET_MODE (x)))
++ return 0;
++
+ /* If the value has all its registers valid, return it. */
+ if (get_last_value_validate (&value, rsp->last_set, rsp->last_set_label, 0))
+ return value;
Index: gcc/hsa-gen.c
===================================================================
--- a/src/gcc/hsa-gen.c (.../tags/gcc_6_1_0_release)
@@ -821731,11 +825784,79 @@ Index: gcc/config/alpha/alpha.md
else
return "ldgp $29,0($26)";
}
+Index: gcc/config/s390/vecintrin.h
+===================================================================
+--- a/src/gcc/config/s390/vecintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/s390/vecintrin.h (.../branches/gcc-6-branch)
+@@ -1,4 +1,4 @@
+-/* GNU compiler hardware transactional execution intrinsics
++/* GNU compiler vector extension intrinsics
+ Copyright (C) 2015-2016 Free Software Foundation, Inc.
+ Contributed by Andreas Krebbel (Andreas.Krebbel at de.ibm.com)
+
+@@ -73,17 +73,9 @@
+ #define vec_splat_s32 __builtin_s390_vec_splat_s32
+ #define vec_splat_u64 __builtin_s390_vec_splat_u64
+ #define vec_splat_s64 __builtin_s390_vec_splat_s64
+-#define vec_add_u128 __builtin_s390_vaq
+-#define vec_addc_u128 __builtin_s390_vaccq
+-#define vec_adde_u128 __builtin_s390_vacq
+-#define vec_addec_u128 __builtin_s390_vacccq
+ #define vec_checksum __builtin_s390_vcksm
+ #define vec_gfmsum_128 __builtin_s390_vgfmg
+ #define vec_gfmsum_accum_128 __builtin_s390_vgfmag
+-#define vec_sub_u128 __builtin_s390_vsq
+-#define vec_subc_u128 __builtin_s390_vscbiq
+-#define vec_sube_u128 __builtin_s390_vsbiq
+-#define vec_subec_u128 __builtin_s390_vsbcbiq
+ #define vec_ceil(X) __builtin_s390_vfidb((X), 4, 6)
+ #define vec_roundp(X) __builtin_s390_vfidb((X), 4, 6)
+ #define vec_floor(X) __builtin_s390_vfidb((X), 4, 7)
+@@ -169,6 +161,10 @@
+ #define vec_unpackh __builtin_s390_vec_unpackh
+ #define vec_unpackl __builtin_s390_vec_unpackl
+ #define vec_addc __builtin_s390_vec_addc
++#define vec_add_u128 __builtin_s390_vec_add_u128
++#define vec_addc_u128 __builtin_s390_vec_addc_u128
++#define vec_adde_u128 __builtin_s390_vec_adde_u128
++#define vec_addec_u128 __builtin_s390_vec_addec_u128
+ #define vec_and __builtin_s390_vec_and
+ #define vec_andc __builtin_s390_vec_andc
+ #define vec_avg __builtin_s390_vec_avg
+@@ -219,6 +215,10 @@
+ #define vec_srl __builtin_s390_vec_srl
+ #define vec_srb __builtin_s390_vec_srb
+ #define vec_subc __builtin_s390_vec_subc
++#define vec_sub_u128 __builtin_s390_vec_sub_u128
++#define vec_subc_u128 __builtin_s390_vec_subc_u128
++#define vec_sube_u128 __builtin_s390_vec_sube_u128
++#define vec_subec_u128 __builtin_s390_vec_subec_u128
+ #define vec_sum2 __builtin_s390_vec_sum2
+ #define vec_sum_u128 __builtin_s390_vec_sum_u128
+ #define vec_sum4 __builtin_s390_vec_sum4
Index: gcc/config/s390/s390.md
===================================================================
--- a/src/gcc/config/s390/s390.md (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/config/s390/s390.md (.../branches/gcc-6-branch)
-@@ -1295,7 +1295,7 @@
+@@ -174,7 +174,6 @@
+ UNSPEC_VEC_UNPACKL
+ UNSPEC_VEC_UNPACKL_L
+ UNSPEC_VEC_ADDC
+- UNSPEC_VEC_ADDC_U128
+ UNSPEC_VEC_ADDE_U128
+ UNSPEC_VEC_ADDEC_U128
+ UNSPEC_VEC_AVG
+@@ -198,9 +197,7 @@
+ UNSPEC_VEC_SRL
+ UNSPEC_VEC_SRLB
+
+- UNSPEC_VEC_SUB_U128
+ UNSPEC_VEC_SUBC
+- UNSPEC_VEC_SUBC_U128
+ UNSPEC_VEC_SUBE_U128
+ UNSPEC_VEC_SUBEC_U128
+
+@@ -1295,7 +1292,7 @@
(compare:VFCMP (match_operand:DF 0 "register_operand" "v")
(match_operand:DF 1 "register_operand" "v")))
(clobber (match_scratch:V2DI 2 "=v"))]
@@ -821744,7 +825865,7 @@ Index: gcc/config/s390/s390.md
"wfc<asm_fcmp>dbs\t%v2,%v0,%v1"
[(set_attr "op_type" "VRR")])
-@@ -4649,7 +4649,7 @@
+@@ -4649,7 +4646,7 @@
(unsigned_fix:DI (match_operand:DF 1 "register_operand" "f,v")))
(unspec:DI [(match_operand:DI 2 "immediate_operand" "K,K")] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))]
@@ -821753,7 +825874,7 @@ Index: gcc/config/s390/s390.md
"@
clgdbr\t%0,%h2,%1,0
wclgdb\t%v0,%v1,0,%h2"
-@@ -4664,7 +4664,7 @@
+@@ -4664,7 +4661,7 @@
(unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))]
"TARGET_Z196 && TARGET_HARD_FLOAT
@@ -821762,7 +825883,7 @@ Index: gcc/config/s390/s390.md
"cl<GPR:gf><FP:xde><FP:bt>r\t%0,%h2,%1,0"
[(set_attr "op_type" "RRF")
(set_attr "type" "ftoi")])
-@@ -4684,7 +4684,7 @@
+@@ -4684,7 +4681,7 @@
(fix:DI (match_operand:DF 1 "register_operand" "f,v")))
(unspec:DI [(match_operand:DI 2 "immediate_operand" "K,K")] UNSPEC_ROUND)
(clobber (reg:CC CC_REGNUM))]
@@ -821771,7 +825892,7 @@ Index: gcc/config/s390/s390.md
"@
cgdbr\t%0,%h2,%1
wcgdb\t%v0,%v1,0,%h2"
-@@ -4792,7 +4792,7 @@
+@@ -4792,7 +4789,7 @@
(define_insn "*floatunsdidf2_z13"
[(set (match_operand:DF 0 "register_operand" "=f,v")
(unsigned_float:DF (match_operand:DI 1 "register_operand" "d,v")))]
@@ -821780,7 +825901,7 @@ Index: gcc/config/s390/s390.md
"@
cdlgbr\t%0,0,%1,0
wcdlgb\t%v0,%v1,0,0"
-@@ -4896,7 +4896,7 @@
+@@ -4896,7 +4893,7 @@
(define_insn "*extendsfdf2_z13"
[(set (match_operand:DF 0 "register_operand" "=f,f,v")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,R,v")))]
@@ -821789,6 +825910,489 @@ Index: gcc/config/s390/s390.md
"@
ldebr\t%0,%1
ldeb\t%0,%1
+@@ -5651,7 +5648,7 @@
+ (clobber (reg:CC CC_REGNUM))])]
+ "TARGET_ZARCH"
+ {
+- /* For z13 we have vaq which doesn't set CC. */
++ /* For z13 we have vsq which doesn't set CC. */
+ if (TARGET_VX)
+ {
+ emit_insn (gen_rtx_SET (operands[0],
+Index: gcc/config/s390/s390-builtin-types.def
+===================================================================
+--- a/src/gcc/config/s390/s390-builtin-types.def (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/s390/s390-builtin-types.def (.../branches/gcc-6-branch)
+@@ -19,22 +19,22 @@
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+-#define DEF_FN_TYPE_1(FN_TYPE, FLAGS, T1) \
++#define DEF_FN_TYPE_0(FN_TYPE, FLAGS, T1) \
+ DEF_FN_TYPE (FN_TYPE, \
+ FLAGS, \
+ s390_builtin_types[T1])
+-#define DEF_FN_TYPE_2(FN_TYPE, FLAGS, T1, T2) \
++#define DEF_FN_TYPE_1(FN_TYPE, FLAGS, T1, T2) \
+ DEF_FN_TYPE (FN_TYPE, \
+ FLAGS, \
+ s390_builtin_types[T1], \
+ s390_builtin_types[T2])
+-#define DEF_FN_TYPE_3(FN_TYPE, FLAGS, T1, T2, T3) \
++#define DEF_FN_TYPE_2(FN_TYPE, FLAGS, T1, T2, T3) \
+ DEF_FN_TYPE (FN_TYPE, \
+ FLAGS, \
+ s390_builtin_types[T1], \
+ s390_builtin_types[T2], \
+ s390_builtin_types[T3])
+-#define DEF_FN_TYPE_4(FN_TYPE, FLAGS, T1, T2, T3, T4) \
++#define DEF_FN_TYPE_3(FN_TYPE, FLAGS, T1, T2, T3, T4) \
+ DEF_FN_TYPE (FN_TYPE, \
+ FLAGS, \
+ s390_builtin_types[T1], \
+@@ -41,7 +41,7 @@
+ s390_builtin_types[T2], \
+ s390_builtin_types[T3], \
+ s390_builtin_types[T4])
+-#define DEF_FN_TYPE_5(FN_TYPE, FLAGS, T1, T2, T3, T4, T5) \
++#define DEF_FN_TYPE_4(FN_TYPE, FLAGS, T1, T2, T3, T4, T5) \
+ DEF_FN_TYPE (FN_TYPE, \
+ FLAGS, \
+ s390_builtin_types[T1], \
+@@ -49,7 +49,7 @@
+ s390_builtin_types[T3], \
+ s390_builtin_types[T4], \
+ s390_builtin_types[T5])
+-#define DEF_FN_TYPE_6(FN_TYPE, FLAGS, T1, T2, T3, T4, T5, T6) \
++#define DEF_FN_TYPE_5(FN_TYPE, FLAGS, T1, T2, T3, T4, T5, T6) \
+ DEF_FN_TYPE (FN_TYPE, \
+ FLAGS, \
+ s390_builtin_types[T1], \
+@@ -66,6 +66,7 @@
+ DEF_TYPE (BT_UINT, 0, unsigned_type_node, 0)
+ DEF_TYPE (BT_VOIDCONST, B_VX, void_type_node, 1)
+ DEF_TYPE (BT_ULONG, B_VX, long_unsigned_type_node, 0)
++DEF_TYPE (BT_INT128, B_VX, intTI_type_node, 0)
+ DEF_TYPE (BT_USHORTCONST, B_VX, short_unsigned_type_node, 1)
+ DEF_TYPE (BT_SHORTCONST, B_VX, short_integer_type_node, 1)
+ DEF_TYPE (BT_INTCONST, B_VX, integer_type_node, 1)
+@@ -126,210 +127,212 @@
+ DEF_OPAQUE_VECTOR_TYPE (BT_BV4SI, B_VX, BT_BINT, 4)
+ DEF_OPAQUE_VECTOR_TYPE (BT_BV2DI, B_VX, BT_BLONGLONG, 2)
+ DEF_OPAQUE_VECTOR_TYPE (BT_BV8HI, B_VX, BT_BSHORT, 8)
+-DEF_FN_TYPE_1 (BT_FN_INT, B_HTM, BT_INT)
+-DEF_FN_TYPE_1 (BT_FN_UINT, 0, BT_UINT)
+-DEF_FN_TYPE_2 (BT_FN_INT_INT, B_VX, BT_INT, BT_INT)
+-DEF_FN_TYPE_2 (BT_FN_INT_VOIDPTR, B_HTM, BT_INT, BT_VOIDPTR)
+-DEF_FN_TYPE_2 (BT_FN_OV4SI_INT, B_VX, BT_OV4SI, BT_INT)
+-DEF_FN_TYPE_2 (BT_FN_OV4SI_INTCONSTPTR, B_VX, BT_OV4SI, BT_INTCONSTPTR)
+-DEF_FN_TYPE_2 (BT_FN_OV4SI_OV4SI, B_VX, BT_OV4SI, BT_OV4SI)
+-DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHAR, B_VX, BT_UV16QI, BT_UCHAR)
+-DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHARCONSTPTR, B_VX, BT_UV16QI, BT_UCHARCONSTPTR)
+-DEF_FN_TYPE_2 (BT_FN_UV16QI_USHORT, B_VX, BT_UV16QI, BT_USHORT)
+-DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI, B_VX, BT_UV16QI, BT_UV16QI)
+-DEF_FN_TYPE_2 (BT_FN_UV2DI_ULONGLONG, B_VX, BT_UV2DI, BT_ULONGLONG)
+-DEF_FN_TYPE_2 (BT_FN_UV2DI_ULONGLONGCONSTPTR, B_VX, BT_UV2DI, BT_ULONGLONGCONSTPTR)
+-DEF_FN_TYPE_2 (BT_FN_UV2DI_USHORT, B_VX, BT_UV2DI, BT_USHORT)
+-DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI, B_VX, BT_UV2DI, BT_UV2DI)
+-DEF_FN_TYPE_2 (BT_FN_UV2DI_UV4SI, B_VX, BT_UV2DI, BT_UV4SI)
+-DEF_FN_TYPE_2 (BT_FN_UV4SI_UINT, B_VX, BT_UV4SI, BT_UINT)
+-DEF_FN_TYPE_2 (BT_FN_UV4SI_UINTCONSTPTR, B_VX, BT_UV4SI, BT_UINTCONSTPTR)
+-DEF_FN_TYPE_2 (BT_FN_UV4SI_USHORT, B_VX, BT_UV4SI, BT_USHORT)
+-DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI, B_VX, BT_UV4SI, BT_UV4SI)
+-DEF_FN_TYPE_2 (BT_FN_UV4SI_UV8HI, B_VX, BT_UV4SI, BT_UV8HI)
+-DEF_FN_TYPE_2 (BT_FN_UV8HI_USHORT, B_VX, BT_UV8HI, BT_USHORT)
+-DEF_FN_TYPE_2 (BT_FN_UV8HI_USHORTCONSTPTR, B_VX, BT_UV8HI, BT_USHORTCONSTPTR)
+-DEF_FN_TYPE_2 (BT_FN_UV8HI_UV16QI, B_VX, BT_UV8HI, BT_UV16QI)
+-DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI, B_VX, BT_UV8HI, BT_UV8HI)
+-DEF_FN_TYPE_2 (BT_FN_V16QI_SCHAR, B_VX, BT_V16QI, BT_SCHAR)
+-DEF_FN_TYPE_2 (BT_FN_V16QI_UCHAR, B_VX, BT_V16QI, BT_UCHAR)
+-DEF_FN_TYPE_2 (BT_FN_V16QI_V16QI, B_VX, BT_V16QI, BT_V16QI)
+-DEF_FN_TYPE_2 (BT_FN_V2DF_DBL, B_VX, BT_V2DF, BT_DBL)
+-DEF_FN_TYPE_2 (BT_FN_V2DF_FLTCONSTPTR, B_VX, BT_V2DF, BT_FLTCONSTPTR)
+-DEF_FN_TYPE_2 (BT_FN_V2DF_V2DF, B_VX, BT_V2DF, BT_V2DF)
+-DEF_FN_TYPE_2 (BT_FN_V2DI_SHORT, B_VX, BT_V2DI, BT_SHORT)
+-DEF_FN_TYPE_2 (BT_FN_V2DI_V16QI, B_VX, BT_V2DI, BT_V16QI)
+-DEF_FN_TYPE_2 (BT_FN_V2DI_V2DI, B_VX, BT_V2DI, BT_V2DI)
+-DEF_FN_TYPE_2 (BT_FN_V2DI_V4SI, B_VX, BT_V2DI, BT_V4SI)
+-DEF_FN_TYPE_2 (BT_FN_V2DI_V8HI, B_VX, BT_V2DI, BT_V8HI)
+-DEF_FN_TYPE_2 (BT_FN_V4SI_SHORT, B_VX, BT_V4SI, BT_SHORT)
+-DEF_FN_TYPE_2 (BT_FN_V4SI_V4SI, B_VX, BT_V4SI, BT_V4SI)
+-DEF_FN_TYPE_2 (BT_FN_V4SI_V8HI, B_VX, BT_V4SI, BT_V8HI)
+-DEF_FN_TYPE_2 (BT_FN_V8HI_SHORT, B_VX, BT_V8HI, BT_SHORT)
+-DEF_FN_TYPE_2 (BT_FN_V8HI_V16QI, B_VX, BT_V8HI, BT_V16QI)
+-DEF_FN_TYPE_2 (BT_FN_V8HI_V8HI, B_VX, BT_V8HI, BT_V8HI)
+-DEF_FN_TYPE_2 (BT_FN_VOID_INT, B_HTM, BT_VOID, BT_INT)
+-DEF_FN_TYPE_2 (BT_FN_VOID_UINT, 0, BT_VOID, BT_UINT)
+-DEF_FN_TYPE_3 (BT_FN_DBL_V2DF_INT, B_VX, BT_DBL, BT_V2DF, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_INT_OV4SI_INT, B_VX, BT_INT, BT_OV4SI, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_INT_OV4SI_OV4SI, B_VX, BT_INT, BT_OV4SI, BT_OV4SI)
+-DEF_FN_TYPE_3 (BT_FN_INT_UV16QI_UV16QI, B_VX, BT_INT, BT_UV16QI, BT_UV16QI)
+-DEF_FN_TYPE_3 (BT_FN_INT_UV2DI_UV2DI, B_VX, BT_INT, BT_UV2DI, BT_UV2DI)
+-DEF_FN_TYPE_3 (BT_FN_INT_UV4SI_UV4SI, B_VX, BT_INT, BT_UV4SI, BT_UV4SI)
+-DEF_FN_TYPE_3 (BT_FN_INT_UV8HI_UV8HI, B_VX, BT_INT, BT_UV8HI, BT_UV8HI)
+-DEF_FN_TYPE_3 (BT_FN_INT_V16QI_V16QI, B_VX, BT_INT, BT_V16QI, BT_V16QI)
+-DEF_FN_TYPE_3 (BT_FN_INT_V2DF_V2DF, B_VX, BT_INT, BT_V2DF, BT_V2DF)
+-DEF_FN_TYPE_3 (BT_FN_INT_V2DI_V2DI, B_VX, BT_INT, BT_V2DI, BT_V2DI)
+-DEF_FN_TYPE_3 (BT_FN_INT_V4SI_V4SI, B_VX, BT_INT, BT_V4SI, BT_V4SI)
+-DEF_FN_TYPE_3 (BT_FN_INT_V8HI_V8HI, B_VX, BT_INT, BT_V8HI, BT_V8HI)
+-DEF_FN_TYPE_3 (BT_FN_INT_VOIDPTR_INT, B_HTM, BT_INT, BT_VOIDPTR, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_OV2DI_LONGLONG_LONGLONG, B_VX, BT_OV2DI, BT_LONGLONG, BT_LONGLONG)
+-DEF_FN_TYPE_3 (BT_FN_OV4SI_INTCONSTPTR_INT, B_VX, BT_OV4SI, BT_INTCONSTPTR, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_OV4SI_INTCONSTPTR_UINT, B_VX, BT_OV4SI, BT_INTCONSTPTR, BT_UINT)
+-DEF_FN_TYPE_3 (BT_FN_OV4SI_INT_INT, B_VX, BT_OV4SI, BT_INT, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_INTPTR, B_VX, BT_OV4SI, BT_OV4SI, BT_INTPTR)
+-DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI)
+-DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_UCHAR, B_VX, BT_OV4SI, BT_OV4SI, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_ULONG, B_VX, BT_OV4SI, BT_OV4SI, BT_ULONG)
+-DEF_FN_TYPE_3 (BT_FN_UCHAR_UV16QI_INT, B_VX, BT_UCHAR, BT_UV16QI, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_UINT_UV4SI_INT, B_VX, BT_UINT, BT_UV4SI, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_UINT_VOIDCONSTPTR_INT, B_VX, BT_UINT, BT_VOIDCONSTPTR, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_ULONGLONG_UV2DI_INT, B_VX, BT_ULONGLONG, BT_UV2DI, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_USHORT_UV8HI_INT, B_VX, BT_USHORT, BT_UV8HI, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UCHARCONSTPTR_USHORT, B_VX, BT_UV16QI, BT_UCHARCONSTPTR, BT_USHORT)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UCHAR_INT, B_VX, BT_UV16QI, BT_UCHAR, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UCHAR_UCHAR, B_VX, BT_UV16QI, BT_UCHAR, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_INTPTR, B_VX, BT_UV16QI, BT_UV16QI, BT_INTPTR)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UCHAR, B_VX, BT_UV16QI, BT_UV16QI, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UINT, B_VX, BT_UV16QI, BT_UV16QI, BT_UINT)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UV16QI, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UV2DI_UV2DI, B_VX, BT_UV16QI, BT_UV2DI, BT_UV2DI)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UV4SI_UV4SI, B_VX, BT_UV16QI, BT_UV4SI, BT_UV4SI)
+-DEF_FN_TYPE_3 (BT_FN_UV16QI_UV8HI_UV8HI, B_VX, BT_UV16QI, BT_UV8HI, BT_UV8HI)
+-DEF_FN_TYPE_3 (BT_FN_UV2DI_UCHAR_UCHAR, B_VX, BT_UV2DI, BT_UCHAR, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_UV2DI_ULONGLONG_INT, B_VX, BT_UV2DI, BT_ULONGLONG, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_UCHAR, B_VX, BT_UV2DI, BT_UV2DI, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_UINT, B_VX, BT_UV2DI, BT_UV2DI, BT_UINT)
+-DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_UV2DI, B_VX, BT_UV2DI, BT_UV2DI, BT_UV2DI)
+-DEF_FN_TYPE_3 (BT_FN_UV2DI_UV4SI_UV4SI, B_VX, BT_UV2DI, BT_UV4SI, BT_UV4SI)
+-DEF_FN_TYPE_3 (BT_FN_UV2DI_UV8HI_UV8HI, B_VX, BT_UV2DI, BT_UV8HI, BT_UV8HI)
+-DEF_FN_TYPE_3 (BT_FN_UV2DI_V2DF_INT, B_VX, BT_UV2DI, BT_V2DF, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UCHAR_UCHAR, B_VX, BT_UV4SI, BT_UCHAR, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UINT_INT, B_VX, BT_UV4SI, BT_UINT, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UV16QI_UV16QI, B_VX, BT_UV4SI, BT_UV16QI, BT_UV16QI)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UV2DI_UV2DI, B_VX, BT_UV4SI, BT_UV2DI, BT_UV2DI)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_INTPTR, B_VX, BT_UV4SI, BT_UV4SI, BT_INTPTR)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UCHAR, B_VX, BT_UV4SI, BT_UV4SI, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UINT, B_VX, BT_UV4SI, BT_UV4SI, BT_UINT)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UV4SI, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI)
+-DEF_FN_TYPE_3 (BT_FN_UV4SI_UV8HI_UV8HI, B_VX, BT_UV4SI, BT_UV8HI, BT_UV8HI)
+-DEF_FN_TYPE_3 (BT_FN_UV8HI_UCHAR_UCHAR, B_VX, BT_UV8HI, BT_UCHAR, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_UV8HI_USHORT_INT, B_VX, BT_UV8HI, BT_USHORT, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_UV8HI_UV16QI_UV16QI, B_VX, BT_UV8HI, BT_UV16QI, BT_UV16QI)
+-DEF_FN_TYPE_3 (BT_FN_UV8HI_UV4SI_UV4SI, B_VX, BT_UV8HI, BT_UV4SI, BT_UV4SI)
+-DEF_FN_TYPE_3 (BT_FN_UV8HI_UV8HI_INTPTR, B_VX, BT_UV8HI, BT_UV8HI, BT_INTPTR)
+-DEF_FN_TYPE_3 (BT_FN_UV8HI_UV8HI_UCHAR, B_VX, BT_UV8HI, BT_UV8HI, BT_UCHAR)
+-DEF_FN_TYPE_3 (BT_FN_UV8HI_UV8HI_UINT, B_VX, BT_UV8HI, BT_UV8HI, BT_UINT)
+-DEF_FN_TYPE_3 (BT_FN_UV8HI_UV8HI_UV8HI, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI)
+-DEF_FN_TYPE_3 (BT_FN_V16QI_BV16QI_V16QI, B_VX, BT_V16QI, BT_BV16QI, BT_V16QI)
+-DEF_FN_TYPE_3 (BT_FN_V16QI_UINT_VOIDCONSTPTR, B_VX, BT_V16QI, BT_UINT, BT_VOIDCONSTPTR)
+-DEF_FN_TYPE_3 (BT_FN_V16QI_UV16QI_UV16QI, B_VX, BT_V16QI, BT_UV16QI, BT_UV16QI)
+-DEF_FN_TYPE_3 (BT_FN_V16QI_V16QI_V16QI, B_VX, BT_V16QI, BT_V16QI, BT_V16QI)
+-DEF_FN_TYPE_3 (BT_FN_V16QI_V8HI_V8HI, B_VX, BT_V16QI, BT_V8HI, BT_V8HI)
+-DEF_FN_TYPE_3 (BT_FN_V2DF_DBL_INT, B_VX, BT_V2DF, BT_DBL, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_V2DF_UV2DI_INT, B_VX, BT_V2DF, BT_UV2DI, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_V2DF_UV4SI_INT, B_VX, BT_V2DF, BT_UV4SI, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_V2DF, B_VX, BT_V2DF, BT_V2DF, BT_V2DF)
+-DEF_FN_TYPE_3 (BT_FN_V2DF_V2DI_INT, B_VX, BT_V2DF, BT_V2DI, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_V2DI_BV2DI_V2DI, B_VX, BT_V2DI, BT_BV2DI, BT_V2DI)
+-DEF_FN_TYPE_3 (BT_FN_V2DI_UV2DI_UV2DI, B_VX, BT_V2DI, BT_UV2DI, BT_UV2DI)
+-DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_INT, B_VX, BT_V2DI, BT_V2DF, BT_INT)
+-DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_V2DF, B_VX, BT_V2DI, BT_V2DF, BT_V2DF)
+-DEF_FN_TYPE_3 (BT_FN_V2DI_V2DI_V2DI, B_VX, BT_V2DI, BT_V2DI, BT_V2DI)
+-DEF_FN_TYPE_3 (BT_FN_V2DI_V4SI_V4SI, B_VX, BT_V2DI, BT_V4SI, BT_V4SI)
+-DEF_FN_TYPE_3 (BT_FN_V4SI_BV4SI_V4SI, B_VX, BT_V4SI, BT_BV4SI, BT_V4SI)
+-DEF_FN_TYPE_3 (BT_FN_V4SI_INT_VOIDPTR, B_VX, BT_V4SI, BT_INT, BT_VOIDPTR)
+-DEF_FN_TYPE_3 (BT_FN_V4SI_UV4SI_UV4SI, B_VX, BT_V4SI, BT_UV4SI, BT_UV4SI)
+-DEF_FN_TYPE_3 (BT_FN_V4SI_V2DI_V2DI, B_VX, BT_V4SI, BT_V2DI, BT_V2DI)
+-DEF_FN_TYPE_3 (BT_FN_V4SI_V4SI_V4SI, B_VX, BT_V4SI, BT_V4SI, BT_V4SI)
+-DEF_FN_TYPE_3 (BT_FN_V4SI_V8HI_V8HI, B_VX, BT_V4SI, BT_V8HI, BT_V8HI)
+-DEF_FN_TYPE_3 (BT_FN_V8HI_BV8HI_V8HI, B_VX, BT_V8HI, BT_BV8HI, BT_V8HI)
+-DEF_FN_TYPE_3 (BT_FN_V8HI_UV8HI_UV8HI, B_VX, BT_V8HI, BT_UV8HI, BT_UV8HI)
+-DEF_FN_TYPE_3 (BT_FN_V8HI_V16QI_V16QI, B_VX, BT_V8HI, BT_V16QI, BT_V16QI)
+-DEF_FN_TYPE_3 (BT_FN_V8HI_V4SI_V4SI, B_VX, BT_V8HI, BT_V4SI, BT_V4SI)
+-DEF_FN_TYPE_3 (BT_FN_V8HI_V8HI_V8HI, B_VX, BT_V8HI, BT_V8HI, BT_V8HI)
+-DEF_FN_TYPE_3 (BT_FN_VOID_UINT64PTR_UINT64, B_HTM, BT_VOID, BT_UINT64PTR, BT_UINT64)
+-DEF_FN_TYPE_3 (BT_FN_VOID_V2DF_FLTPTR, B_VX, BT_VOID, BT_V2DF, BT_FLTPTR)
+-DEF_FN_TYPE_4 (BT_FN_INT_OV4SI_OV4SI_INTPTR, B_VX, BT_INT, BT_OV4SI, BT_OV4SI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_OV4SI_INT_OV4SI_INT, B_VX, BT_OV4SI, BT_INT, BT_OV4SI, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OV4SI_INT, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OV4SI_INTPTR, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OV4SI_OV4SI, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_OV4SI)
+-DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OV4SI_UCHAR, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_UCHAR)
+-DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OV4SI_ULONGLONG, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_ULONGLONG)
+-DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UCHAR_INT, B_VX, BT_UV16QI, BT_UV16QI, BT_UCHAR, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UV16QI_INT, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UV16QI_INTPTR, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI)
+-DEF_FN_TYPE_4 (BT_FN_UV16QI_UV2DI_UV2DI_UV16QI, B_VX, BT_UV16QI, BT_UV2DI, BT_UV2DI, BT_UV16QI)
+-DEF_FN_TYPE_4 (BT_FN_UV16QI_UV8HI_UV8HI_INTPTR, B_VX, BT_UV16QI, BT_UV8HI, BT_UV8HI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_UV2DI_UV2DI_ULONGLONG_INT, B_VX, BT_UV2DI, BT_UV2DI, BT_ULONGLONG, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_UV2DI_UV2DI_UV2DI_INT, B_VX, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_UV2DI_UV4SI_UV4SI_UV2DI, B_VX, BT_UV2DI, BT_UV4SI, BT_UV4SI, BT_UV2DI)
+-DEF_FN_TYPE_4 (BT_FN_UV4SI_UV2DI_UV2DI_INTPTR, B_VX, BT_UV4SI, BT_UV2DI, BT_UV2DI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UINT_INT, B_VX, BT_UV4SI, BT_UV4SI, BT_UINT, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UV4SI_INT, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UV4SI_INTPTR, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UV4SI_UV4SI, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI)
+-DEF_FN_TYPE_4 (BT_FN_UV4SI_UV8HI_UV8HI_UV4SI, B_VX, BT_UV4SI, BT_UV8HI, BT_UV8HI, BT_UV4SI)
+-DEF_FN_TYPE_4 (BT_FN_UV8HI_UV16QI_UV16QI_UV8HI, B_VX, BT_UV8HI, BT_UV16QI, BT_UV16QI, BT_UV8HI)
+-DEF_FN_TYPE_4 (BT_FN_UV8HI_UV4SI_UV4SI_INTPTR, B_VX, BT_UV8HI, BT_UV4SI, BT_UV4SI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_UV8HI_UV8HI_USHORT_INT, B_VX, BT_UV8HI, BT_UV8HI, BT_USHORT, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_UV8HI_UV8HI_UV8HI_INT, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_UV8HI_UV8HI_UV8HI_INTPTR, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_UV8HI_UV8HI_UV8HI_UV8HI, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_UV8HI)
+-DEF_FN_TYPE_4 (BT_FN_V16QI_UV16QI_UV16QI_INTPTR, B_VX, BT_V16QI, BT_UV16QI, BT_UV16QI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V16QI_V16QI_V16QI_INTPTR, B_VX, BT_V16QI, BT_V16QI, BT_V16QI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V16QI_V16QI_V16QI_V16QI, B_VX, BT_V16QI, BT_V16QI, BT_V16QI, BT_V16QI)
+-DEF_FN_TYPE_4 (BT_FN_V16QI_V8HI_V8HI_INTPTR, B_VX, BT_V16QI, BT_V8HI, BT_V8HI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V2DF_V2DF_DBL_INT, B_VX, BT_V2DF, BT_V2DF, BT_DBL, BT_INT)
+-DEF_FN_TYPE_4 (BT_FN_V2DF_V2DF_UCHAR_UCHAR, B_VX, BT_V2DF, BT_V2DF, BT_UCHAR, BT_UCHAR)
+-DEF_FN_TYPE_4 (BT_FN_V2DF_V2DF_V2DF_V2DF, B_VX, BT_V2DF, BT_V2DF, BT_V2DF, BT_V2DF)
+-DEF_FN_TYPE_4 (BT_FN_V2DI_UV2DI_UV2DI_INTPTR, B_VX, BT_V2DI, BT_UV2DI, BT_UV2DI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V2DI_V2DF_INT_INTPTR, B_VX, BT_V2DI, BT_V2DF, BT_INT, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V2DI_V2DF_V2DF_INTPTR, B_VX, BT_V2DI, BT_V2DF, BT_V2DF, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V2DI_V2DI_V2DI_INTPTR, B_VX, BT_V2DI, BT_V2DI, BT_V2DI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V2DI_V4SI_V4SI_V2DI, B_VX, BT_V2DI, BT_V4SI, BT_V4SI, BT_V2DI)
+-DEF_FN_TYPE_4 (BT_FN_V4SI_UV4SI_UV4SI_INTPTR, B_VX, BT_V4SI, BT_UV4SI, BT_UV4SI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V4SI_V2DI_V2DI_INTPTR, B_VX, BT_V4SI, BT_V2DI, BT_V2DI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V4SI_V4SI_V4SI_INTPTR, B_VX, BT_V4SI, BT_V4SI, BT_V4SI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V4SI_V4SI_V4SI_V4SI, B_VX, BT_V4SI, BT_V4SI, BT_V4SI, BT_V4SI)
+-DEF_FN_TYPE_4 (BT_FN_V4SI_V8HI_V8HI_V4SI, B_VX, BT_V4SI, BT_V8HI, BT_V8HI, BT_V4SI)
+-DEF_FN_TYPE_4 (BT_FN_V8HI_UV8HI_UV8HI_INTPTR, B_VX, BT_V8HI, BT_UV8HI, BT_UV8HI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V8HI_V16QI_V16QI_V8HI, B_VX, BT_V8HI, BT_V16QI, BT_V16QI, BT_V8HI)
+-DEF_FN_TYPE_4 (BT_FN_V8HI_V4SI_V4SI_INTPTR, B_VX, BT_V8HI, BT_V4SI, BT_V4SI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V8HI_V8HI_V8HI_INTPTR, B_VX, BT_V8HI, BT_V8HI, BT_V8HI, BT_INTPTR)
+-DEF_FN_TYPE_4 (BT_FN_V8HI_V8HI_V8HI_V8HI, B_VX, BT_V8HI, BT_V8HI, BT_V8HI, BT_V8HI)
+-DEF_FN_TYPE_4 (BT_FN_VOID_OV4SI_INT_VOIDPTR, B_VX, BT_VOID, BT_OV4SI, BT_INT, BT_VOIDPTR)
+-DEF_FN_TYPE_4 (BT_FN_VOID_OV4SI_VOIDPTR_UINT, B_VX, BT_VOID, BT_OV4SI, BT_VOIDPTR, BT_UINT)
+-DEF_FN_TYPE_4 (BT_FN_VOID_V16QI_UINT_VOIDPTR, B_VX, BT_VOID, BT_V16QI, BT_UINT, BT_VOIDPTR)
+-DEF_FN_TYPE_5 (BT_FN_OV4SI_OV4SI_OUV4SI_INTCONSTPTR_UCHAR, B_VX, BT_OV4SI, BT_OV4SI, BT_OUV4SI, BT_INTCONSTPTR, BT_UCHAR)
+-DEF_FN_TYPE_5 (BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INTPTR)
+-DEF_FN_TYPE_5 (BT_FN_UV16QI_UV16QI_UV16QI_INT_INTPTR, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT, BT_INTPTR)
+-DEF_FN_TYPE_5 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INT, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT)
+-DEF_FN_TYPE_5 (BT_FN_UV2DI_UV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR, B_VX, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_ULONGLONGCONSTPTR, BT_UCHAR)
+-DEF_FN_TYPE_5 (BT_FN_UV2DI_UV2DI_UV2DI_UV2DI_INT, B_VX, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT)
+-DEF_FN_TYPE_5 (BT_FN_UV4SI_UV4SI_UV4SI_INT_INTPTR, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT, BT_INTPTR)
+-DEF_FN_TYPE_5 (BT_FN_UV4SI_UV4SI_UV4SI_UINTCONSTPTR_UCHAR, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_UINTCONSTPTR, BT_UCHAR)
+-DEF_FN_TYPE_5 (BT_FN_UV4SI_UV4SI_UV4SI_UV4SI_INT, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT)
+-DEF_FN_TYPE_5 (BT_FN_UV8HI_UV8HI_UV8HI_INT_INTPTR, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INT, BT_INTPTR)
+-DEF_FN_TYPE_5 (BT_FN_UV8HI_UV8HI_UV8HI_UV8HI_INT, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INT)
+-DEF_FN_TYPE_5 (BT_FN_VOID_UV2DI_UV2DI_ULONGLONGPTR_ULONGLONG, B_VX, BT_VOID, BT_UV2DI, BT_UV2DI, BT_ULONGLONGPTR, BT_ULONGLONG)
+-DEF_FN_TYPE_5 (BT_FN_VOID_UV4SI_UV4SI_UINTPTR_ULONGLONG, B_VX, BT_VOID, BT_UV4SI, BT_UV4SI, BT_UINTPTR, BT_ULONGLONG)
+-DEF_FN_TYPE_5 (BT_FN_VOID_V4SI_V4SI_INTPTR_ULONGLONG, B_VX, BT_VOID, BT_V4SI, BT_V4SI, BT_INTPTR, BT_ULONGLONG)
+-DEF_FN_TYPE_6 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INT_INTPTR, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT, BT_INTPTR)
+-DEF_FN_TYPE_6 (BT_FN_UV4SI_UV4SI_UV4SI_UV4SI_INT_INTPTR, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT, BT_INTPTR)
+-DEF_FN_TYPE_6 (BT_FN_UV8HI_UV8HI_UV8HI_UV8HI_INT_INTPTR, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INT, BT_INTPTR)
++DEF_FN_TYPE_0 (BT_FN_INT, B_HTM, BT_INT)
++DEF_FN_TYPE_0 (BT_FN_UINT, 0, BT_UINT)
++DEF_FN_TYPE_1 (BT_FN_INT_INT, B_VX, BT_INT, BT_INT)
++DEF_FN_TYPE_1 (BT_FN_INT_VOIDPTR, B_HTM, BT_INT, BT_VOIDPTR)
++DEF_FN_TYPE_1 (BT_FN_OV4SI_INT, B_VX, BT_OV4SI, BT_INT)
++DEF_FN_TYPE_1 (BT_FN_OV4SI_INTCONSTPTR, B_VX, BT_OV4SI, BT_INTCONSTPTR)
++DEF_FN_TYPE_1 (BT_FN_OV4SI_OV4SI, B_VX, BT_OV4SI, BT_OV4SI)
++DEF_FN_TYPE_1 (BT_FN_UV16QI_UCHAR, B_VX, BT_UV16QI, BT_UCHAR)
++DEF_FN_TYPE_1 (BT_FN_UV16QI_UCHARCONSTPTR, B_VX, BT_UV16QI, BT_UCHARCONSTPTR)
++DEF_FN_TYPE_1 (BT_FN_UV16QI_USHORT, B_VX, BT_UV16QI, BT_USHORT)
++DEF_FN_TYPE_1 (BT_FN_UV16QI_UV16QI, B_VX, BT_UV16QI, BT_UV16QI)
++DEF_FN_TYPE_1 (BT_FN_UV2DI_ULONGLONG, B_VX, BT_UV2DI, BT_ULONGLONG)
++DEF_FN_TYPE_1 (BT_FN_UV2DI_ULONGLONGCONSTPTR, B_VX, BT_UV2DI, BT_ULONGLONGCONSTPTR)
++DEF_FN_TYPE_1 (BT_FN_UV2DI_USHORT, B_VX, BT_UV2DI, BT_USHORT)
++DEF_FN_TYPE_1 (BT_FN_UV2DI_UV2DI, B_VX, BT_UV2DI, BT_UV2DI)
++DEF_FN_TYPE_1 (BT_FN_UV2DI_UV4SI, B_VX, BT_UV2DI, BT_UV4SI)
++DEF_FN_TYPE_1 (BT_FN_UV4SI_UINT, B_VX, BT_UV4SI, BT_UINT)
++DEF_FN_TYPE_1 (BT_FN_UV4SI_UINTCONSTPTR, B_VX, BT_UV4SI, BT_UINTCONSTPTR)
++DEF_FN_TYPE_1 (BT_FN_UV4SI_USHORT, B_VX, BT_UV4SI, BT_USHORT)
++DEF_FN_TYPE_1 (BT_FN_UV4SI_UV4SI, B_VX, BT_UV4SI, BT_UV4SI)
++DEF_FN_TYPE_1 (BT_FN_UV4SI_UV8HI, B_VX, BT_UV4SI, BT_UV8HI)
++DEF_FN_TYPE_1 (BT_FN_UV8HI_USHORT, B_VX, BT_UV8HI, BT_USHORT)
++DEF_FN_TYPE_1 (BT_FN_UV8HI_USHORTCONSTPTR, B_VX, BT_UV8HI, BT_USHORTCONSTPTR)
++DEF_FN_TYPE_1 (BT_FN_UV8HI_UV16QI, B_VX, BT_UV8HI, BT_UV16QI)
++DEF_FN_TYPE_1 (BT_FN_UV8HI_UV8HI, B_VX, BT_UV8HI, BT_UV8HI)
++DEF_FN_TYPE_1 (BT_FN_V16QI_SCHAR, B_VX, BT_V16QI, BT_SCHAR)
++DEF_FN_TYPE_1 (BT_FN_V16QI_UCHAR, B_VX, BT_V16QI, BT_UCHAR)
++DEF_FN_TYPE_1 (BT_FN_V16QI_V16QI, B_VX, BT_V16QI, BT_V16QI)
++DEF_FN_TYPE_1 (BT_FN_V2DF_DBL, B_VX, BT_V2DF, BT_DBL)
++DEF_FN_TYPE_1 (BT_FN_V2DF_FLTCONSTPTR, B_VX, BT_V2DF, BT_FLTCONSTPTR)
++DEF_FN_TYPE_1 (BT_FN_V2DF_V2DF, B_VX, BT_V2DF, BT_V2DF)
++DEF_FN_TYPE_1 (BT_FN_V2DI_SHORT, B_VX, BT_V2DI, BT_SHORT)
++DEF_FN_TYPE_1 (BT_FN_V2DI_V16QI, B_VX, BT_V2DI, BT_V16QI)
++DEF_FN_TYPE_1 (BT_FN_V2DI_V2DI, B_VX, BT_V2DI, BT_V2DI)
++DEF_FN_TYPE_1 (BT_FN_V2DI_V4SI, B_VX, BT_V2DI, BT_V4SI)
++DEF_FN_TYPE_1 (BT_FN_V2DI_V8HI, B_VX, BT_V2DI, BT_V8HI)
++DEF_FN_TYPE_1 (BT_FN_V4SI_SHORT, B_VX, BT_V4SI, BT_SHORT)
++DEF_FN_TYPE_1 (BT_FN_V4SI_V4SI, B_VX, BT_V4SI, BT_V4SI)
++DEF_FN_TYPE_1 (BT_FN_V4SI_V8HI, B_VX, BT_V4SI, BT_V8HI)
++DEF_FN_TYPE_1 (BT_FN_V8HI_SHORT, B_VX, BT_V8HI, BT_SHORT)
++DEF_FN_TYPE_1 (BT_FN_V8HI_V16QI, B_VX, BT_V8HI, BT_V16QI)
++DEF_FN_TYPE_1 (BT_FN_V8HI_V8HI, B_VX, BT_V8HI, BT_V8HI)
++DEF_FN_TYPE_1 (BT_FN_VOID_INT, B_HTM, BT_VOID, BT_INT)
++DEF_FN_TYPE_1 (BT_FN_VOID_UINT, 0, BT_VOID, BT_UINT)
++DEF_FN_TYPE_2 (BT_FN_DBL_V2DF_INT, B_VX, BT_DBL, BT_V2DF, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_INT128_INT128_INT128, B_VX, BT_INT128, BT_INT128, BT_INT128)
++DEF_FN_TYPE_2 (BT_FN_INT_OV4SI_INT, B_VX, BT_INT, BT_OV4SI, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_INT_OV4SI_OV4SI, B_VX, BT_INT, BT_OV4SI, BT_OV4SI)
++DEF_FN_TYPE_2 (BT_FN_INT_UV16QI_UV16QI, B_VX, BT_INT, BT_UV16QI, BT_UV16QI)
++DEF_FN_TYPE_2 (BT_FN_INT_UV2DI_UV2DI, B_VX, BT_INT, BT_UV2DI, BT_UV2DI)
++DEF_FN_TYPE_2 (BT_FN_INT_UV4SI_UV4SI, B_VX, BT_INT, BT_UV4SI, BT_UV4SI)
++DEF_FN_TYPE_2 (BT_FN_INT_UV8HI_UV8HI, B_VX, BT_INT, BT_UV8HI, BT_UV8HI)
++DEF_FN_TYPE_2 (BT_FN_INT_V16QI_V16QI, B_VX, BT_INT, BT_V16QI, BT_V16QI)
++DEF_FN_TYPE_2 (BT_FN_INT_V2DF_V2DF, B_VX, BT_INT, BT_V2DF, BT_V2DF)
++DEF_FN_TYPE_2 (BT_FN_INT_V2DI_V2DI, B_VX, BT_INT, BT_V2DI, BT_V2DI)
++DEF_FN_TYPE_2 (BT_FN_INT_V4SI_V4SI, B_VX, BT_INT, BT_V4SI, BT_V4SI)
++DEF_FN_TYPE_2 (BT_FN_INT_V8HI_V8HI, B_VX, BT_INT, BT_V8HI, BT_V8HI)
++DEF_FN_TYPE_2 (BT_FN_INT_VOIDPTR_INT, B_HTM, BT_INT, BT_VOIDPTR, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_OV2DI_LONGLONG_LONGLONG, B_VX, BT_OV2DI, BT_LONGLONG, BT_LONGLONG)
++DEF_FN_TYPE_2 (BT_FN_OV4SI_INTCONSTPTR_INT, B_VX, BT_OV4SI, BT_INTCONSTPTR, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_OV4SI_INTCONSTPTR_UINT, B_VX, BT_OV4SI, BT_INTCONSTPTR, BT_UINT)
++DEF_FN_TYPE_2 (BT_FN_OV4SI_INT_INT, B_VX, BT_OV4SI, BT_INT, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_OV4SI_OV4SI_INTPTR, B_VX, BT_OV4SI, BT_OV4SI, BT_INTPTR)
++DEF_FN_TYPE_2 (BT_FN_OV4SI_OV4SI_OV4SI, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI)
++DEF_FN_TYPE_2 (BT_FN_OV4SI_OV4SI_UCHAR, B_VX, BT_OV4SI, BT_OV4SI, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_OV4SI_OV4SI_ULONG, B_VX, BT_OV4SI, BT_OV4SI, BT_ULONG)
++DEF_FN_TYPE_2 (BT_FN_UCHAR_UV16QI_INT, B_VX, BT_UCHAR, BT_UV16QI, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_UINT_UV4SI_INT, B_VX, BT_UINT, BT_UV4SI, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_UINT_VOIDCONSTPTR_INT, B_VX, BT_UINT, BT_VOIDCONSTPTR, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_ULONGLONG_UV2DI_INT, B_VX, BT_ULONGLONG, BT_UV2DI, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_USHORT_UV8HI_INT, B_VX, BT_USHORT, BT_UV8HI, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHARCONSTPTR_USHORT, B_VX, BT_UV16QI, BT_UCHARCONSTPTR, BT_USHORT)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHAR_INT, B_VX, BT_UV16QI, BT_UCHAR, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHAR_UCHAR, B_VX, BT_UV16QI, BT_UCHAR, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI_INTPTR, B_VX, BT_UV16QI, BT_UV16QI, BT_INTPTR)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI_UCHAR, B_VX, BT_UV16QI, BT_UV16QI, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI_UINT, B_VX, BT_UV16QI, BT_UV16QI, BT_UINT)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI_UV16QI, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UV2DI_UV2DI, B_VX, BT_UV16QI, BT_UV2DI, BT_UV2DI)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UV4SI_UV4SI, B_VX, BT_UV16QI, BT_UV4SI, BT_UV4SI)
++DEF_FN_TYPE_2 (BT_FN_UV16QI_UV8HI_UV8HI, B_VX, BT_UV16QI, BT_UV8HI, BT_UV8HI)
++DEF_FN_TYPE_2 (BT_FN_UV2DI_UCHAR_UCHAR, B_VX, BT_UV2DI, BT_UCHAR, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_UV2DI_ULONGLONG_INT, B_VX, BT_UV2DI, BT_ULONGLONG, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UCHAR, B_VX, BT_UV2DI, BT_UV2DI, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UINT, B_VX, BT_UV2DI, BT_UV2DI, BT_UINT)
++DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UV2DI, B_VX, BT_UV2DI, BT_UV2DI, BT_UV2DI)
++DEF_FN_TYPE_2 (BT_FN_UV2DI_UV4SI_UV4SI, B_VX, BT_UV2DI, BT_UV4SI, BT_UV4SI)
++DEF_FN_TYPE_2 (BT_FN_UV2DI_UV8HI_UV8HI, B_VX, BT_UV2DI, BT_UV8HI, BT_UV8HI)
++DEF_FN_TYPE_2 (BT_FN_UV2DI_V2DF_INT, B_VX, BT_UV2DI, BT_V2DF, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UCHAR_UCHAR, B_VX, BT_UV4SI, BT_UCHAR, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UINT_INT, B_VX, BT_UV4SI, BT_UINT, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UV16QI_UV16QI, B_VX, BT_UV4SI, BT_UV16QI, BT_UV16QI)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UV2DI_UV2DI, B_VX, BT_UV4SI, BT_UV2DI, BT_UV2DI)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI_INTPTR, B_VX, BT_UV4SI, BT_UV4SI, BT_INTPTR)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI_UCHAR, B_VX, BT_UV4SI, BT_UV4SI, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI_UINT, B_VX, BT_UV4SI, BT_UV4SI, BT_UINT)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI_UV4SI, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI)
++DEF_FN_TYPE_2 (BT_FN_UV4SI_UV8HI_UV8HI, B_VX, BT_UV4SI, BT_UV8HI, BT_UV8HI)
++DEF_FN_TYPE_2 (BT_FN_UV8HI_UCHAR_UCHAR, B_VX, BT_UV8HI, BT_UCHAR, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_UV8HI_USHORT_INT, B_VX, BT_UV8HI, BT_USHORT, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_UV8HI_UV16QI_UV16QI, B_VX, BT_UV8HI, BT_UV16QI, BT_UV16QI)
++DEF_FN_TYPE_2 (BT_FN_UV8HI_UV4SI_UV4SI, B_VX, BT_UV8HI, BT_UV4SI, BT_UV4SI)
++DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI_INTPTR, B_VX, BT_UV8HI, BT_UV8HI, BT_INTPTR)
++DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI_UCHAR, B_VX, BT_UV8HI, BT_UV8HI, BT_UCHAR)
++DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI_UINT, B_VX, BT_UV8HI, BT_UV8HI, BT_UINT)
++DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI_UV8HI, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI)
++DEF_FN_TYPE_2 (BT_FN_V16QI_BV16QI_V16QI, B_VX, BT_V16QI, BT_BV16QI, BT_V16QI)
++DEF_FN_TYPE_2 (BT_FN_V16QI_UINT_VOIDCONSTPTR, B_VX, BT_V16QI, BT_UINT, BT_VOIDCONSTPTR)
++DEF_FN_TYPE_2 (BT_FN_V16QI_UV16QI_UV16QI, B_VX, BT_V16QI, BT_UV16QI, BT_UV16QI)
++DEF_FN_TYPE_2 (BT_FN_V16QI_V16QI_V16QI, B_VX, BT_V16QI, BT_V16QI, BT_V16QI)
++DEF_FN_TYPE_2 (BT_FN_V16QI_V8HI_V8HI, B_VX, BT_V16QI, BT_V8HI, BT_V8HI)
++DEF_FN_TYPE_2 (BT_FN_V2DF_DBL_INT, B_VX, BT_V2DF, BT_DBL, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_V2DF_UV2DI_INT, B_VX, BT_V2DF, BT_UV2DI, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_V2DF_UV4SI_INT, B_VX, BT_V2DF, BT_UV4SI, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_V2DF_V2DF_V2DF, B_VX, BT_V2DF, BT_V2DF, BT_V2DF)
++DEF_FN_TYPE_2 (BT_FN_V2DF_V2DI_INT, B_VX, BT_V2DF, BT_V2DI, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_V2DI_BV2DI_V2DI, B_VX, BT_V2DI, BT_BV2DI, BT_V2DI)
++DEF_FN_TYPE_2 (BT_FN_V2DI_UV2DI_UV2DI, B_VX, BT_V2DI, BT_UV2DI, BT_UV2DI)
++DEF_FN_TYPE_2 (BT_FN_V2DI_V2DF_INT, B_VX, BT_V2DI, BT_V2DF, BT_INT)
++DEF_FN_TYPE_2 (BT_FN_V2DI_V2DF_V2DF, B_VX, BT_V2DI, BT_V2DF, BT_V2DF)
++DEF_FN_TYPE_2 (BT_FN_V2DI_V2DI_V2DI, B_VX, BT_V2DI, BT_V2DI, BT_V2DI)
++DEF_FN_TYPE_2 (BT_FN_V2DI_V4SI_V4SI, B_VX, BT_V2DI, BT_V4SI, BT_V4SI)
++DEF_FN_TYPE_2 (BT_FN_V4SI_BV4SI_V4SI, B_VX, BT_V4SI, BT_BV4SI, BT_V4SI)
++DEF_FN_TYPE_2 (BT_FN_V4SI_INT_VOIDPTR, B_VX, BT_V4SI, BT_INT, BT_VOIDPTR)
++DEF_FN_TYPE_2 (BT_FN_V4SI_UV4SI_UV4SI, B_VX, BT_V4SI, BT_UV4SI, BT_UV4SI)
++DEF_FN_TYPE_2 (BT_FN_V4SI_V2DI_V2DI, B_VX, BT_V4SI, BT_V2DI, BT_V2DI)
++DEF_FN_TYPE_2 (BT_FN_V4SI_V4SI_V4SI, B_VX, BT_V4SI, BT_V4SI, BT_V4SI)
++DEF_FN_TYPE_2 (BT_FN_V4SI_V8HI_V8HI, B_VX, BT_V4SI, BT_V8HI, BT_V8HI)
++DEF_FN_TYPE_2 (BT_FN_V8HI_BV8HI_V8HI, B_VX, BT_V8HI, BT_BV8HI, BT_V8HI)
++DEF_FN_TYPE_2 (BT_FN_V8HI_UV8HI_UV8HI, B_VX, BT_V8HI, BT_UV8HI, BT_UV8HI)
++DEF_FN_TYPE_2 (BT_FN_V8HI_V16QI_V16QI, B_VX, BT_V8HI, BT_V16QI, BT_V16QI)
++DEF_FN_TYPE_2 (BT_FN_V8HI_V4SI_V4SI, B_VX, BT_V8HI, BT_V4SI, BT_V4SI)
++DEF_FN_TYPE_2 (BT_FN_V8HI_V8HI_V8HI, B_VX, BT_V8HI, BT_V8HI, BT_V8HI)
++DEF_FN_TYPE_2 (BT_FN_VOID_UINT64PTR_UINT64, B_HTM, BT_VOID, BT_UINT64PTR, BT_UINT64)
++DEF_FN_TYPE_2 (BT_FN_VOID_V2DF_FLTPTR, B_VX, BT_VOID, BT_V2DF, BT_FLTPTR)
++DEF_FN_TYPE_3 (BT_FN_INT128_INT128_INT128_INT128, B_VX, BT_INT128, BT_INT128, BT_INT128, BT_INT128)
++DEF_FN_TYPE_3 (BT_FN_INT_OV4SI_OV4SI_INTPTR, B_VX, BT_INT, BT_OV4SI, BT_OV4SI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_OV4SI_INT_OV4SI_INT, B_VX, BT_OV4SI, BT_INT, BT_OV4SI, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI_INT, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI_INTPTR, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI_OV4SI, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_OV4SI)
++DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI_UCHAR, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_UCHAR)
++DEF_FN_TYPE_3 (BT_FN_OV4SI_OV4SI_OV4SI_ULONGLONG, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_ULONGLONG)
++DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UCHAR_INT, B_VX, BT_UV16QI, BT_UV16QI, BT_UCHAR, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UV16QI_INT, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UV16QI_INTPTR, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI)
++DEF_FN_TYPE_3 (BT_FN_UV16QI_UV2DI_UV2DI_UV16QI, B_VX, BT_UV16QI, BT_UV2DI, BT_UV2DI, BT_UV16QI)
++DEF_FN_TYPE_3 (BT_FN_UV16QI_UV8HI_UV8HI_INTPTR, B_VX, BT_UV16QI, BT_UV8HI, BT_UV8HI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_ULONGLONG_INT, B_VX, BT_UV2DI, BT_UV2DI, BT_ULONGLONG, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_UV2DI_UV2DI_UV2DI_INT, B_VX, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_UV2DI_UV4SI_UV4SI_UV2DI, B_VX, BT_UV2DI, BT_UV4SI, BT_UV4SI, BT_UV2DI)
++DEF_FN_TYPE_3 (BT_FN_UV4SI_UV2DI_UV2DI_INTPTR, B_VX, BT_UV4SI, BT_UV2DI, BT_UV2DI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UINT_INT, B_VX, BT_UV4SI, BT_UV4SI, BT_UINT, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UV4SI_INT, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UV4SI_INTPTR, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_UV4SI_UV4SI_UV4SI_UV4SI, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI)
++DEF_FN_TYPE_3 (BT_FN_UV4SI_UV8HI_UV8HI_UV4SI, B_VX, BT_UV4SI, BT_UV8HI, BT_UV8HI, BT_UV4SI)
++DEF_FN_TYPE_3 (BT_FN_UV8HI_UV16QI_UV16QI_UV8HI, B_VX, BT_UV8HI, BT_UV16QI, BT_UV16QI, BT_UV8HI)
++DEF_FN_TYPE_3 (BT_FN_UV8HI_UV4SI_UV4SI_INTPTR, B_VX, BT_UV8HI, BT_UV4SI, BT_UV4SI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_UV8HI_UV8HI_USHORT_INT, B_VX, BT_UV8HI, BT_UV8HI, BT_USHORT, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_UV8HI_UV8HI_UV8HI_INT, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_UV8HI_UV8HI_UV8HI_INTPTR, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_UV8HI_UV8HI_UV8HI_UV8HI, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_UV8HI)
++DEF_FN_TYPE_3 (BT_FN_V16QI_UV16QI_UV16QI_INTPTR, B_VX, BT_V16QI, BT_UV16QI, BT_UV16QI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V16QI_V16QI_V16QI_INTPTR, B_VX, BT_V16QI, BT_V16QI, BT_V16QI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V16QI_V16QI_V16QI_V16QI, B_VX, BT_V16QI, BT_V16QI, BT_V16QI, BT_V16QI)
++DEF_FN_TYPE_3 (BT_FN_V16QI_V8HI_V8HI_INTPTR, B_VX, BT_V16QI, BT_V8HI, BT_V8HI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_DBL_INT, B_VX, BT_V2DF, BT_V2DF, BT_DBL, BT_INT)
++DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_UCHAR_UCHAR, B_VX, BT_V2DF, BT_V2DF, BT_UCHAR, BT_UCHAR)
++DEF_FN_TYPE_3 (BT_FN_V2DF_V2DF_V2DF_V2DF, B_VX, BT_V2DF, BT_V2DF, BT_V2DF, BT_V2DF)
++DEF_FN_TYPE_3 (BT_FN_V2DI_UV2DI_UV2DI_INTPTR, B_VX, BT_V2DI, BT_UV2DI, BT_UV2DI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_INT_INTPTR, B_VX, BT_V2DI, BT_V2DF, BT_INT, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V2DI_V2DF_V2DF_INTPTR, B_VX, BT_V2DI, BT_V2DF, BT_V2DF, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V2DI_V2DI_V2DI_INTPTR, B_VX, BT_V2DI, BT_V2DI, BT_V2DI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V2DI_V4SI_V4SI_V2DI, B_VX, BT_V2DI, BT_V4SI, BT_V4SI, BT_V2DI)
++DEF_FN_TYPE_3 (BT_FN_V4SI_UV4SI_UV4SI_INTPTR, B_VX, BT_V4SI, BT_UV4SI, BT_UV4SI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V4SI_V2DI_V2DI_INTPTR, B_VX, BT_V4SI, BT_V2DI, BT_V2DI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V4SI_V4SI_V4SI_INTPTR, B_VX, BT_V4SI, BT_V4SI, BT_V4SI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V4SI_V4SI_V4SI_V4SI, B_VX, BT_V4SI, BT_V4SI, BT_V4SI, BT_V4SI)
++DEF_FN_TYPE_3 (BT_FN_V4SI_V8HI_V8HI_V4SI, B_VX, BT_V4SI, BT_V8HI, BT_V8HI, BT_V4SI)
++DEF_FN_TYPE_3 (BT_FN_V8HI_UV8HI_UV8HI_INTPTR, B_VX, BT_V8HI, BT_UV8HI, BT_UV8HI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V8HI_V16QI_V16QI_V8HI, B_VX, BT_V8HI, BT_V16QI, BT_V16QI, BT_V8HI)
++DEF_FN_TYPE_3 (BT_FN_V8HI_V4SI_V4SI_INTPTR, B_VX, BT_V8HI, BT_V4SI, BT_V4SI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V8HI_V8HI_V8HI_INTPTR, B_VX, BT_V8HI, BT_V8HI, BT_V8HI, BT_INTPTR)
++DEF_FN_TYPE_3 (BT_FN_V8HI_V8HI_V8HI_V8HI, B_VX, BT_V8HI, BT_V8HI, BT_V8HI, BT_V8HI)
++DEF_FN_TYPE_3 (BT_FN_VOID_OV4SI_INT_VOIDPTR, B_VX, BT_VOID, BT_OV4SI, BT_INT, BT_VOIDPTR)
++DEF_FN_TYPE_3 (BT_FN_VOID_OV4SI_VOIDPTR_UINT, B_VX, BT_VOID, BT_OV4SI, BT_VOIDPTR, BT_UINT)
++DEF_FN_TYPE_3 (BT_FN_VOID_V16QI_UINT_VOIDPTR, B_VX, BT_VOID, BT_V16QI, BT_UINT, BT_VOIDPTR)
++DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OUV4SI_INTCONSTPTR_UCHAR, B_VX, BT_OV4SI, BT_OV4SI, BT_OUV4SI, BT_INTCONSTPTR, BT_UCHAR)
++DEF_FN_TYPE_4 (BT_FN_OV4SI_OV4SI_OV4SI_OV4SI_INTPTR, B_VX, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_OV4SI, BT_INTPTR)
++DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UV16QI_INT_INTPTR, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT, BT_INTPTR)
++DEF_FN_TYPE_4 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INT, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT)
++DEF_FN_TYPE_4 (BT_FN_UV2DI_UV2DI_UV2DI_ULONGLONGCONSTPTR_UCHAR, B_VX, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_ULONGLONGCONSTPTR, BT_UCHAR)
++DEF_FN_TYPE_4 (BT_FN_UV2DI_UV2DI_UV2DI_UV2DI_INT, B_VX, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI, BT_INT)
++DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UV4SI_INT_INTPTR, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT, BT_INTPTR)
++DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UV4SI_UINTCONSTPTR_UCHAR, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_UINTCONSTPTR, BT_UCHAR)
++DEF_FN_TYPE_4 (BT_FN_UV4SI_UV4SI_UV4SI_UV4SI_INT, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT)
++DEF_FN_TYPE_4 (BT_FN_UV8HI_UV8HI_UV8HI_INT_INTPTR, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INT, BT_INTPTR)
++DEF_FN_TYPE_4 (BT_FN_UV8HI_UV8HI_UV8HI_UV8HI_INT, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INT)
++DEF_FN_TYPE_4 (BT_FN_VOID_UV2DI_UV2DI_ULONGLONGPTR_ULONGLONG, B_VX, BT_VOID, BT_UV2DI, BT_UV2DI, BT_ULONGLONGPTR, BT_ULONGLONG)
++DEF_FN_TYPE_4 (BT_FN_VOID_UV4SI_UV4SI_UINTPTR_ULONGLONG, B_VX, BT_VOID, BT_UV4SI, BT_UV4SI, BT_UINTPTR, BT_ULONGLONG)
++DEF_FN_TYPE_4 (BT_FN_VOID_V4SI_V4SI_INTPTR_ULONGLONG, B_VX, BT_VOID, BT_V4SI, BT_V4SI, BT_INTPTR, BT_ULONGLONG)
++DEF_FN_TYPE_5 (BT_FN_UV16QI_UV16QI_UV16QI_UV16QI_INT_INTPTR, B_VX, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI, BT_INT, BT_INTPTR)
++DEF_FN_TYPE_5 (BT_FN_UV4SI_UV4SI_UV4SI_UV4SI_INT_INTPTR, B_VX, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI, BT_INT, BT_INTPTR)
++DEF_FN_TYPE_5 (BT_FN_UV8HI_UV8HI_UV8HI_UV8HI_INT_INTPTR, B_VX, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_UV8HI, BT_INT, BT_INTPTR)
+ DEF_OV_TYPE (BT_OV_BV16QI_BV16QI, BT_BV16QI, BT_BV16QI)
+ DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_BV16QI, BT_BV16QI, BT_BV16QI, BT_BV16QI)
+ DEF_OV_TYPE (BT_OV_BV16QI_BV16QI_BV16QI_BV16QI, BT_BV16QI, BT_BV16QI, BT_BV16QI, BT_BV16QI)
Index: gcc/config/s390/s390.c
===================================================================
--- a/src/gcc/config/s390/s390.c (.../tags/gcc_6_1_0_release)
@@ -821802,7 +826406,59 @@ Index: gcc/config/s390/s390.c
tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
-@@ -12405,17 +12405,13 @@
+@@ -875,6 +875,7 @@
+ arity = 0;
+ FOR_EACH_CALL_EXPR_ARG (arg, iter, exp)
+ {
++ rtx tmp_rtx;
+ const struct insn_operand_data *insn_op;
+ unsigned int op_flags = all_op_flags & ((1 << O_SHIFT) - 1);
+
+@@ -950,6 +951,20 @@
+ copy_to_mode_reg (Pmode,
+ XEXP (op[arity], 0)));
+ }
++ /* Some of the builtins require different modes/types than the
++ pattern in order to implement a specific API. Instead of
++ adding many expanders which do the mode change we do it here.
++ E.g. s390_vec_add_u128 required to have vector unsigned char
++ arguments is mapped to addti3. */
++ else if (insn_op->mode != VOIDmode
++ && GET_MODE (op[arity]) != VOIDmode
++ && GET_MODE (op[arity]) != insn_op->mode
++ && ((tmp_rtx = simplify_gen_subreg (insn_op->mode, op[arity],
++ GET_MODE (op[arity]), 0))
++ != NULL_RTX))
++ {
++ op[arity] = tmp_rtx;
++ }
+ else if (GET_MODE (op[arity]) == insn_op->mode
+ || GET_MODE (op[arity]) == VOIDmode
+ || (insn_op->predicate == address_operand
+@@ -6442,11 +6457,17 @@
+ /* Unfortunately the vec_init expander is not allowed to fail. So
+ we have to implement the fallback ourselves. */
+ for (i = 0; i < n_elts; i++)
+- emit_insn (gen_rtx_SET (target,
+- gen_rtx_UNSPEC (mode,
+- gen_rtvec (3, XVECEXP (vals, 0, i),
+- GEN_INT (i), target),
+- UNSPEC_VEC_SET)));
++ {
++ rtx elem = XVECEXP (vals, 0, i);
++ if (!general_operand (elem, GET_MODE (elem)))
++ elem = force_reg (inner_mode, elem);
++
++ emit_insn (gen_rtx_SET (target,
++ gen_rtx_UNSPEC (mode,
++ gen_rtvec (3, elem,
++ GEN_INT (i), target),
++ UNSPEC_VEC_SET)));
++ }
+ }
+
+ /* Structure to hold the initial parameters for a compare_and_swap operation
+@@ -12405,17 +12426,13 @@
{
/* Store the alignment to be able to check if we can use
a larl/load-relative instruction. We only handle the cases
@@ -821825,7 +826481,7 @@ Index: gcc/config/s390/s390.c
}
/* Literal pool references don't have a decl so they are handled
-@@ -12423,18 +12419,14 @@
+@@ -12423,18 +12440,14 @@
entry to decide upon the alignment. */
if (MEM_P (rtl)
&& GET_CODE (XEXP (rtl, 0)) == SYMBOL_REF
@@ -821849,6 +826505,285 @@ Index: gcc/config/s390/s390.c
}
}
+Index: gcc/config/s390/s390-builtins.def
+===================================================================
+--- a/src/gcc/config/s390/s390-builtins.def (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/s390/s390-builtins.def (.../branches/gcc-6-branch)
+@@ -386,11 +386,11 @@
+ OB_DEF_VAR (s390_vec_insert_b64, s390_vlvgg, O3_ELEM, BT_OV_UV2DI_ULONGLONG_BV2DI_INT)
+ OB_DEF_VAR (s390_vec_insert_dbl, s390_vlvgg_dbl, O3_ELEM, BT_OV_V2DF_DBL_V2DF_INT)
+
+-B_DEF (s390_vlvgb, vec_insertv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UCHAR_INT)
+-B_DEF (s390_vlvgh, vec_insertv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_USHORT_INT)
+-B_DEF (s390_vlvgf, vec_insertv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UINT_INT)
+-B_DEF (s390_vlvgg, vec_insertv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_ULONGLONG_INT)
+-B_DEF (s390_vlvgg_dbl, vec_insertv2df, 0, B_VX | B_INT, 0, BT_FN_V2DF_V2DF_DBL_INT)
++B_DEF (s390_vlvgb, vec_insertv16qi, 0, B_VX, O3_ELEM, BT_FN_UV16QI_UV16QI_UCHAR_INT)
++B_DEF (s390_vlvgh, vec_insertv8hi, 0, B_VX, O3_ELEM, BT_FN_UV8HI_UV8HI_USHORT_INT)
++B_DEF (s390_vlvgf, vec_insertv4si, 0, B_VX, O3_ELEM, BT_FN_UV4SI_UV4SI_UINT_INT)
++B_DEF (s390_vlvgg, vec_insertv2di, 0, B_VX, O3_ELEM, BT_FN_UV2DI_UV2DI_ULONGLONG_INT)
++B_DEF (s390_vlvgg_dbl, vec_insertv2df, 0, B_VX | B_INT, O3_ELEM, BT_FN_V2DF_V2DF_DBL_INT)
+
+ OB_DEF (s390_vec_promote, s390_vec_promote_s8,s390_vec_promote_dbl,B_VX, BT_FN_OV4SI_INT_INT)
+ OB_DEF_VAR (s390_vec_promote_s8, s390_vlvgb_noin, O2_ELEM, BT_OV_V16QI_SCHAR_INT) /* vlvgb */
+@@ -424,11 +424,11 @@
+ OB_DEF_VAR (s390_vec_extract_b64, s390_vlgvg, O2_ELEM, BT_OV_ULONGLONG_BV2DI_INT)
+ OB_DEF_VAR (s390_vec_extract_dbl, s390_vlgvg_dbl, O2_ELEM, BT_OV_DBL_V2DF_INT) /* vlgvg */
+
+-B_DEF (s390_vlgvb, vec_extractv16qi, 0, B_VX, 0, BT_FN_UCHAR_UV16QI_INT)
+-B_DEF (s390_vlgvh, vec_extractv8hi, 0, B_VX, 0, BT_FN_USHORT_UV8HI_INT)
+-B_DEF (s390_vlgvf, vec_extractv4si, 0, B_VX, 0, BT_FN_UINT_UV4SI_INT)
+-B_DEF (s390_vlgvg, vec_extractv2di, 0, B_VX, 0, BT_FN_ULONGLONG_UV2DI_INT)
+-B_DEF (s390_vlgvg_dbl, vec_extractv2df, 0, B_VX | B_INT, 0, BT_FN_DBL_V2DF_INT)
++B_DEF (s390_vlgvb, vec_extractv16qi, 0, B_VX, O2_ELEM, BT_FN_UCHAR_UV16QI_INT)
++B_DEF (s390_vlgvh, vec_extractv8hi, 0, B_VX, O2_ELEM, BT_FN_USHORT_UV8HI_INT)
++B_DEF (s390_vlgvf, vec_extractv4si, 0, B_VX, O2_ELEM, BT_FN_UINT_UV4SI_INT)
++B_DEF (s390_vlgvg, vec_extractv2di, 0, B_VX, O2_ELEM, BT_FN_ULONGLONG_UV2DI_INT)
++B_DEF (s390_vlgvg_dbl, vec_extractv2df, 0, B_VX | B_INT, O2_ELEM, BT_FN_DBL_V2DF_INT)
+
+ OB_DEF (s390_vec_insert_and_zero, s390_vec_insert_and_zero_s8,s390_vec_insert_and_zero_dbl,B_VX,BT_FN_OV4SI_INTCONSTPTR)
+ OB_DEF_VAR (s390_vec_insert_and_zero_s8,s390_vllezb, 0, BT_OV_V16QI_SCHARCONSTPTR)
+@@ -741,7 +741,6 @@
+ B_DEF (s390_vupllh, vec_unpackl_lv8hi, 0, B_VX, 0, BT_FN_UV4SI_UV8HI)
+ B_DEF (s390_vuplf, vec_unpacklv4si, 0, B_VX, 0, BT_FN_V2DI_V4SI)
+ B_DEF (s390_vupllf, vec_unpackl_lv4si, 0, B_VX, 0, BT_FN_UV2DI_UV4SI)
+-B_DEF (s390_vaq, vec_add_u128, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+
+ OB_DEF (s390_vec_addc, s390_vec_addc_u8, s390_vec_addc_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+ OB_DEF_VAR (s390_vec_addc_u8, s390_vaccb, 0, BT_OV_UV16QI_UV16QI_UV16QI)
+@@ -749,14 +748,21 @@
+ OB_DEF_VAR (s390_vec_addc_u32, s390_vaccf, 0, BT_OV_UV4SI_UV4SI_UV4SI)
+ OB_DEF_VAR (s390_vec_addc_u64, s390_vaccg, 0, BT_OV_UV2DI_UV2DI_UV2DI)
+
+-B_DEF (s390_vaccb, vec_addcv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+-B_DEF (s390_vacch, vec_addcv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI)
+-B_DEF (s390_vaccf, vec_addcv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
+-B_DEF (s390_vaccg, vec_addcv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
+-B_DEF (s390_vaccq, vec_addc_u128, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+-B_DEF (s390_vacq, vec_adde_u128, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
+-B_DEF (s390_vacccq, vec_addec_u128, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vaccb, vaccb_v16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vacch, vacch_v8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI)
++B_DEF (s390_vaccf, vaccf_v4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
++B_DEF (s390_vaccg, vaccg_v2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
+
++B_DEF (s390_vec_add_u128, addti3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vec_addc_u128, vaccq_ti, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vec_adde_u128, vacq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vec_addec_u128, vacccq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
++
++B_DEF (s390_vaq, addti3, 0, B_VX, 0, BT_FN_INT128_INT128_INT128)
++B_DEF (s390_vaccq, vaccq_ti, 0, B_VX, 0, BT_FN_INT128_INT128_INT128)
++B_DEF (s390_vacq, vacq, 0, B_VX, 0, BT_FN_INT128_INT128_INT128_INT128)
++B_DEF (s390_vacccq, vacccq, 0, B_VX, 0, BT_FN_INT128_INT128_INT128_INT128)
++
+ OB_DEF (s390_vec_and, s390_vec_and_b8, s390_vec_and_dbl_c, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+ OB_DEF_VAR (s390_vec_and_b8, s390_vn, 0, BT_OV_BV16QI_BV16QI_BV16QI)
+ OB_DEF_VAR (s390_vec_and_s8_a, s390_vn, 0, BT_OV_V16QI_BV16QI_V16QI)
+@@ -2051,7 +2057,6 @@
+ OB_DEF_VAR (s390_vec_srb_dbl_s64, s390_vsrlb, 0, BT_OV_V2DF_V2DF_V2DI)
+
+ B_DEF (s390_vsrlb, vec_srbv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+-B_DEF (s390_vsq, vec_sub_u128, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+
+ OB_DEF (s390_vec_subc, s390_vec_subc_u8, s390_vec_subc_u64, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+ OB_DEF_VAR (s390_vec_subc_u8, s390_vscbib, 0, BT_OV_UV16QI_UV16QI_UV16QI)
+@@ -2059,14 +2064,26 @@
+ OB_DEF_VAR (s390_vec_subc_u32, s390_vscbif, 0, BT_OV_UV4SI_UV4SI_UV4SI)
+ OB_DEF_VAR (s390_vec_subc_u64, s390_vscbig, 0, BT_OV_UV2DI_UV2DI_UV2DI)
+
+-B_DEF (s390_vscbib, vec_subcv16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+-B_DEF (s390_vscbih, vec_subcv8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI)
+-B_DEF (s390_vscbif, vec_subcv4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
+-B_DEF (s390_vscbig, vec_subcv2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
+-B_DEF (s390_vscbiq, vec_subc_u128, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
+-B_DEF (s390_vsbiq, vec_sube_u128, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
+-B_DEF (s390_vsbcbiq, vec_subec_u128, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vscbib, vscbib_v16qi, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vscbih, vscbih_v8hi, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UV8HI)
++B_DEF (s390_vscbif, vscbif_v4si, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UV4SI)
++B_DEF (s390_vscbig, vscbig_v2di, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
+
++/* The builtin definitions requires these to use vector unsigned char.
++ But we want the GCC low-level builtins and the insn patterns to
++ allow int128_t and TImode. So we rely on s390_expand_builtin to
++ switch modes. */
++
++B_DEF (s390_vec_sub_u128, subti3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vec_subc_u128, vscbiq_ti, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vec_sube_u128, vsbiq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
++B_DEF (s390_vec_subec_u128, vsbcbiq, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UV16QI_UV16QI)
++
++B_DEF (s390_vsq, subti3, 0, B_VX, 0, BT_FN_INT128_INT128_INT128)
++B_DEF (s390_vscbiq, vscbiq_ti, 0, B_VX, 0, BT_FN_INT128_INT128_INT128)
++B_DEF (s390_vsbiq, vsbiq, 0, B_VX, 0, BT_FN_INT128_INT128_INT128_INT128)
++B_DEF (s390_vsbcbiq, vsbcbiq, 0, B_VX, 0, BT_FN_INT128_INT128_INT128_INT128)
++
+ OB_DEF (s390_vec_sum2, s390_vec_sum2_u16, s390_vec_sum2_u32, B_VX, BT_FN_OV4SI_OV4SI_OV4SI)
+ OB_DEF_VAR (s390_vec_sum2_u16, s390_vsumgh, 0, BT_OV_UV2DI_UV8HI_UV8HI)
+ OB_DEF_VAR (s390_vec_sum2_u32, s390_vsumgf, 0, BT_OV_UV2DI_UV4SI_UV4SI)
+Index: gcc/config/s390/vx-builtins.md
+===================================================================
+--- a/src/gcc/config/s390/vx-builtins.md (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/s390/vx-builtins.md (.../branches/gcc-6-branch)
+@@ -550,56 +550,25 @@
+
+ ; Vector add
+
+-; vaq
+-
+-; zvector builtins uses V16QI operands. So replace the modes in order
+-; to map this to a TImode add. We have to keep the V16QI mode
+-; operands in the expander in order to allow some operand type
+-; checking when expanding the builtin.
+-(define_expand "vec_add_u128"
+- [(match_operand:V16QI 0 "register_operand" "")
+- (match_operand:V16QI 1 "register_operand" "")
+- (match_operand:V16QI 2 "register_operand" "")]
+- "TARGET_VX"
+-{
+- rtx op0 = gen_rtx_SUBREG (TImode, operands[0], 0);
+- rtx op1 = gen_rtx_SUBREG (TImode, operands[1], 0);
+- rtx op2 = gen_rtx_SUBREG (TImode, operands[2], 0);
+-
+- emit_insn (gen_rtx_SET (op0,
+- gen_rtx_PLUS (TImode, op1, op2)));
+- DONE;
+-})
+-
+ ; Vector add compute carry
+
+-(define_insn "vec_addc<mode>"
+- [(set (match_operand:VI_HW 0 "register_operand" "=v")
+- (unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "%v")
+- (match_operand:VI_HW 2 "register_operand" "v")]
+- UNSPEC_VEC_ADDC))]
++(define_insn "vacc<bhfgq>_<mode>"
++ [(set (match_operand:VIT_HW 0 "register_operand" "=v")
++ (unspec:VIT_HW [(match_operand:VIT_HW 1 "register_operand" "%v")
++ (match_operand:VIT_HW 2 "register_operand" "v")]
++ UNSPEC_VEC_ADDC))]
+ "TARGET_VX"
+ "vacc<bhfgq>\t%v0,%v1,%v2"
+ [(set_attr "op_type" "VRR")])
+
+-(define_insn "vec_addc_u128"
+- [(set (match_operand:V16QI 0 "register_operand" "=v")
+- (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "%v")
+- (match_operand:V16QI 2 "register_operand" "v")]
+- UNSPEC_VEC_ADDC_U128))]
+- "TARGET_VX"
+- "vaccq\t%v0,%v1,%v2"
+- [(set_attr "op_type" "VRR")])
+-
+-
+ ; Vector add with carry
+
+-(define_insn "vec_adde_u128"
+- [(set (match_operand:V16QI 0 "register_operand" "=v")
+- (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "%v")
+- (match_operand:V16QI 2 "register_operand" "v")
+- (match_operand:V16QI 3 "register_operand" "v")]
+- UNSPEC_VEC_ADDE_U128))]
++(define_insn "vacq"
++ [(set (match_operand:TI 0 "register_operand" "=v")
++ (unspec:TI [(match_operand:TI 1 "register_operand" "%v")
++ (match_operand:TI 2 "register_operand" "v")
++ (match_operand:TI 3 "register_operand" "v")]
++ UNSPEC_VEC_ADDE_U128))]
+ "TARGET_VX"
+ "vacq\t%v0,%v1,%v2,%v3"
+ [(set_attr "op_type" "VRR")])
+@@ -607,12 +576,12 @@
+
+ ; Vector add with carry compute carry
+
+-(define_insn "vec_addec_u128"
+- [(set (match_operand:V16QI 0 "register_operand" "=v")
+- (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "%v")
+- (match_operand:V16QI 2 "register_operand" "v")
+- (match_operand:V16QI 3 "register_operand" "v")]
+- UNSPEC_VEC_ADDEC_U128))]
++(define_insn "vacccq"
++ [(set (match_operand:TI 0 "register_operand" "=v")
++ (unspec:TI [(match_operand:TI 1 "register_operand" "%v")
++ (match_operand:TI 2 "register_operand" "v")
++ (match_operand:TI 3 "register_operand" "v")]
++ UNSPEC_VEC_ADDEC_U128))]
+ "TARGET_VX"
+ "vacccq\t%v0,%v1,%v2,%v3"
+ [(set_attr "op_type" "VRR")])
+@@ -1145,44 +1114,24 @@
+
+ ; Vector subtract
+
+-(define_insn "vec_sub_u128"
+- [(set (match_operand:V16QI 0 "register_operand" "=v")
+- (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
+- (match_operand:V16QI 2 "register_operand" "v")]
+- UNSPEC_VEC_SUB_U128))]
+- "TARGET_VX"
+- "vsq\t%v0,%v1,%v2"
+- [(set_attr "op_type" "VRR")])
+-
+-
+ ; Vector subtract compute borrow indication
+
+-(define_insn "vec_subc<mode>"
+- [(set (match_operand:VI_HW 0 "register_operand" "=v")
+- (unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v")
+- (match_operand:VI_HW 2 "register_operand" "v")]
++(define_insn "vscbi<bhfgq>_<mode>"
++ [(set (match_operand:VIT_HW 0 "register_operand" "=v")
++ (unspec:VIT_HW [(match_operand:VIT_HW 1 "register_operand" "v")
++ (match_operand:VIT_HW 2 "register_operand" "v")]
+ UNSPEC_VEC_SUBC))]
+ "TARGET_VX"
+ "vscbi<bhfgq>\t%v0,%v1,%v2"
+ [(set_attr "op_type" "VRR")])
+
+-(define_insn "vec_subc_u128"
+- [(set (match_operand:V16QI 0 "register_operand" "=v")
+- (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
+- (match_operand:V16QI 2 "register_operand" "v")]
+- UNSPEC_VEC_SUBC_U128))]
+- "TARGET_VX"
+- "vscbiq\t%v0,%v1,%v2"
+- [(set_attr "op_type" "VRR")])
+-
+-
+ ; Vector subtract with borrow indication
+
+-(define_insn "vec_sube_u128"
+- [(set (match_operand:V16QI 0 "register_operand" "=v")
+- (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
+- (match_operand:V16QI 2 "register_operand" "v")
+- (match_operand:V16QI 3 "register_operand" "v")]
++(define_insn "vsbiq"
++ [(set (match_operand:TI 0 "register_operand" "=v")
++ (unspec:TI [(match_operand:TI 1 "register_operand" "v")
++ (match_operand:TI 2 "register_operand" "v")
++ (match_operand:TI 3 "register_operand" "v")]
+ UNSPEC_VEC_SUBE_U128))]
+ "TARGET_VX"
+ "vsbiq\t%v0,%v1,%v2,%v3"
+@@ -1191,11 +1140,11 @@
+
+ ; Vector subtract with borrow compute and borrow indication
+
+-(define_insn "vec_subec_u128"
+- [(set (match_operand:V16QI 0 "register_operand" "=v")
+- (unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
+- (match_operand:V16QI 2 "register_operand" "v")
+- (match_operand:V16QI 3 "register_operand" "v")]
++(define_insn "vsbcbiq"
++ [(set (match_operand:TI 0 "register_operand" "=v")
++ (unspec:TI [(match_operand:TI 1 "register_operand" "v")
++ (match_operand:TI 2 "register_operand" "v")
++ (match_operand:TI 3 "register_operand" "v")]
+ UNSPEC_VEC_SUBEC_U128))]
+ "TARGET_VX"
+ "vsbcbiq\t%v0,%v1,%v2,%v3"
Index: gcc/config/sparc/driver-sparc.c
===================================================================
--- a/src/gcc/config/sparc/driver-sparc.c (.../tags/gcc_6_1_0_release)
@@ -823325,10 +828260,70 @@ Index: gcc/config/i386/i386.h
#define TARGET_FUSE_CMP_AND_BRANCH_32 \
ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32]
#define TARGET_FUSE_CMP_AND_BRANCH_64 \
+Index: gcc/config/i386/avx512vbmivlintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512vbmivlintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512vbmivlintrin.h (.../branches/gcc-6-branch)
+@@ -173,8 +173,7 @@
+ /* idx */ ,
+ (__v32qi) __A,
+ (__v32qi) __B,
+- (__mmask32) -
+- 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __m256i
+@@ -224,8 +223,7 @@
+ /* idx */ ,
+ (__v16qi) __A,
+ (__v16qi) __B,
+- (__mmask16) -
+- 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __m128i
Index: gcc/config/i386/i386.md
===================================================================
--- a/src/gcc/config/i386/i386.md (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/config/i386/i386.md (.../branches/gcc-6-branch)
+@@ -3089,7 +3089,7 @@
+ (match_operand:TF 1 "general_operand" "C ,xm,x,*roF,*rC"))]
+ "(TARGET_64BIT || TARGET_SSE)
+ && !(MEM_P (operands[0]) && MEM_P (operands[1]))
+- && (!can_create_pseudo_p ()
++ && (lra_in_progress || reload_completed
+ || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
+ || !CONST_DOUBLE_P (operands[1])
+ || (optimize_function_for_size_p (cfun)
+@@ -3167,7 +3167,7 @@
+ (match_operand:XF 1 "general_operand"
+ "fm,f,G,roF,r , *roF,*r,F ,C,roF,rF"))]
+ "!(MEM_P (operands[0]) && MEM_P (operands[1]))
+- && (!can_create_pseudo_p ()
++ && (lra_in_progress || reload_completed
+ || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
+ || !CONST_DOUBLE_P (operands[1])
+ || (optimize_function_for_size_p (cfun)
+@@ -3240,7 +3240,7 @@
+ (match_operand:DF 1 "general_operand"
+ "Yf*fm,Yf*f,G ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x,Yj,r ,roF,rF,rmF,rC"))]
+ "!(MEM_P (operands[0]) && MEM_P (operands[1]))
+- && (!can_create_pseudo_p ()
++ && (lra_in_progress || reload_completed
+ || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
+ || !CONST_DOUBLE_P (operands[1])
+ || (optimize_function_for_size_p (cfun)
+@@ -3442,7 +3442,7 @@
+ (match_operand:SF 1 "general_operand"
+ "Yf*fm,Yf*f,G ,rmF,rF,C,v,m,v,Yj,r ,*y ,m ,*y,*Yn,r ,rmF,rF"))]
+ "!(MEM_P (operands[0]) && MEM_P (operands[1]))
+- && (!can_create_pseudo_p ()
++ && (lra_in_progress || reload_completed
+ || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
+ || !CONST_DOUBLE_P (operands[1])
+ || (optimize_function_for_size_p (cfun)
@@ -9332,7 +9332,7 @@
})
@@ -823460,6 +828455,60 @@ Index: gcc/config/i386/i386.md
[(parallel [(set (match_dup 5) (match_dup 0))
(match_dup 4)])
(set (strict_low_part (match_dup 6))
+Index: gcc/config/i386/avx512vbmiintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512vbmiintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512vbmiintrin.h (.../branches/gcc-6-branch)
+@@ -62,7 +62,7 @@
+ return (__m512i) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
+ (__v64qi) __Y,
+ (__v64qi)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask64) -1);
+ }
+
+@@ -73,7 +73,7 @@
+ return (__m512i) __builtin_ia32_permvarqi512_mask ((__v64qi) __B,
+ (__v64qi) __A,
+ (__v64qi)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask64) -1);
+ }
+
+@@ -108,8 +108,7 @@
+ /* idx */ ,
+ (__v64qi) __A,
+ (__v64qi) __B,
+- (__mmask64) -
+- 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __m512i
+Index: gcc/config/i386/avx512ifmaintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512ifmaintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512ifmaintrin.h (.../branches/gcc-6-branch)
+@@ -41,7 +41,7 @@
+ return (__m512i) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
+ (__v8di) __Y,
+ (__v8di) __Z,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m512i
+@@ -51,7 +51,7 @@
+ return (__m512i) __builtin_ia32_vpmadd52huq512_mask ((__v8di) __X,
+ (__v8di) __Y,
+ (__v8di) __Z,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m512i
Index: gcc/config/i386/constraints.md
===================================================================
--- a/src/gcc/config/i386/constraints.md (.../tags/gcc_6_1_0_release)
@@ -823491,6 +828540,713 @@ Index: gcc/config/i386/predicates.md
(and (match_test "TARGET_X32 && Pmode == DImode")
(match_operand 0 "GOT_memory_operand")))))
+Index: gcc/config/i386/avx512vlbwintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512vlbwintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512vlbwintrin.h (.../branches/gcc-6-branch)
+@@ -575,8 +575,7 @@
+ /* idx */ ,
+ (__v16hi) __A,
+ (__v16hi) __B,
+- (__mmask16) -
+- 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __m256i
+@@ -626,8 +625,7 @@
+ /* idx */ ,
+ (__v8hi) __A,
+ (__v8hi) __B,
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
+@@ -2009,7 +2007,7 @@
+ {
+ return (__mmask32) __builtin_ia32_cmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 4,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2018,7 +2016,7 @@
+ {
+ return (__mmask32) __builtin_ia32_cmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 1,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2027,7 +2025,7 @@
+ {
+ return (__mmask32) __builtin_ia32_cmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 5,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2036,7 +2034,7 @@
+ {
+ return (__mmask32) __builtin_ia32_cmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 2,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2045,7 +2043,7 @@
+ {
+ return (__mmask16) __builtin_ia32_cmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 4,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2054,7 +2052,7 @@
+ {
+ return (__mmask16) __builtin_ia32_cmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 1,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2063,7 +2061,7 @@
+ {
+ return (__mmask16) __builtin_ia32_cmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 5,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2072,7 +2070,7 @@
+ {
+ return (__mmask16) __builtin_ia32_cmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 2,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2081,7 +2079,7 @@
+ {
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 4,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2090,7 +2088,7 @@
+ {
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 1,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2099,7 +2097,7 @@
+ {
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 5,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2108,7 +2106,7 @@
+ {
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 2,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask8
+@@ -2117,7 +2115,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -2126,7 +2124,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -2135,7 +2133,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -2144,7 +2142,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2153,7 +2151,7 @@
+ {
+ return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 4,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2162,7 +2160,7 @@
+ {
+ return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 1,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2171,7 +2169,7 @@
+ {
+ return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 5,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -2180,7 +2178,7 @@
+ {
+ return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 2,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask8
+@@ -2189,7 +2187,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -2198,7 +2196,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -2207,7 +2205,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -2216,7 +2214,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -3609,7 +3607,7 @@
+ {
+ return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 4,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -3618,7 +3616,7 @@
+ {
+ return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 1,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -3627,7 +3625,7 @@
+ {
+ return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 5,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -3636,7 +3634,7 @@
+ {
+ return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 2,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask16
+@@ -3645,7 +3643,7 @@
+ {
+ return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 4,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -3654,7 +3652,7 @@
+ {
+ return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 1,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -3663,7 +3661,7 @@
+ {
+ return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 5,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __mmask16
+@@ -3672,7 +3670,7 @@
+ {
+ return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 2,
+- (__mmask16) - 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline void
+Index: gcc/config/i386/avx512bwintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512bwintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512bwintrin.h (.../branches/gcc-6-branch)
+@@ -270,9 +270,8 @@
+ _mm512_broadcastb_epi8 (__m128i __A)
+ {
+ return (__m512i) __builtin_ia32_pbroadcastb512_mask ((__v16qi) __A,
+- (__v64qi)_mm512_undefined_si512(),
+- (__mmask64) -
+- 1);
++ (__v64qi)_mm512_undefined_epi32(),
++ (__mmask64) -1);
+ }
+
+ extern __inline __m512i
+@@ -318,8 +317,8 @@
+ _mm512_broadcastw_epi16 (__m128i __A)
+ {
+ return (__m512i) __builtin_ia32_pbroadcastw512_mask ((__v8hi) __A,
+- (__v32hi)_mm512_undefined_si512(),
+- (__mmask32)-1);
++ (__v32hi)_mm512_undefined_epi32(),
++ (__mmask32) -1);
+ }
+
+ extern __inline __m512i
+@@ -588,8 +587,7 @@
+ /* idx */ ,
+ (__v32hi) __A,
+ (__v32hi) __B,
+- (__mmask32) -
+- 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __m512i
+@@ -2284,7 +2282,7 @@
+ {
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 4,
+- (__mmask64) - 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __mmask64
+@@ -2293,7 +2291,7 @@
+ {
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 1,
+- (__mmask64) - 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __mmask64
+@@ -2302,7 +2300,7 @@
+ {
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 5,
+- (__mmask64) - 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __mmask64
+@@ -2311,7 +2309,7 @@
+ {
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 2,
+- (__mmask64) - 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2320,7 +2318,7 @@
+ {
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 4,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2329,7 +2327,7 @@
+ {
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 1,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2338,7 +2336,7 @@
+ {
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 5,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2347,7 +2345,7 @@
+ {
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 2,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask64
+@@ -2356,7 +2354,7 @@
+ {
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 4,
+- (__mmask64) - 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __mmask64
+@@ -2365,7 +2363,7 @@
+ {
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 1,
+- (__mmask64) - 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __mmask64
+@@ -2374,7 +2372,7 @@
+ {
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 5,
+- (__mmask64) - 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __mmask64
+@@ -2383,7 +2381,7 @@
+ {
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 2,
+- (__mmask64) - 1);
++ (__mmask64) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2392,7 +2390,7 @@
+ {
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 4,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2401,7 +2399,7 @@
+ {
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 1,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2410,7 +2408,7 @@
+ {
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 5,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ extern __inline __mmask32
+@@ -2419,7 +2417,7 @@
+ {
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 2,
+- (__mmask32) - 1);
++ (__mmask32) -1);
+ }
+
+ #ifdef __OPTIMIZE__
+Index: gcc/config/i386/avx512vldqintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512vldqintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512vldqintrin.h (.../branches/gcc-6-branch)
+@@ -389,8 +389,7 @@
+ return (__m256d) __builtin_ia32_broadcastf64x2_256_mask ((__v2df)
+ __A,
+ (__v4df)_mm256_undefined_pd(),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256d
+@@ -421,8 +420,7 @@
+ return (__m256i) __builtin_ia32_broadcasti64x2_256_mask ((__v2di)
+ __A,
+ (__v4di)_mm256_undefined_si256(),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -452,8 +450,7 @@
+ {
+ return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A,
+ (__v8sf)_mm256_undefined_ps(),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256
+@@ -482,8 +479,7 @@
+ return (__m256i) __builtin_ia32_broadcasti32x2_256_mask ((__v4si)
+ __A,
+ (__v8si)_mm256_undefined_si256(),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -514,8 +510,7 @@
+ return (__m128i) __builtin_ia32_broadcasti32x2_128_mask ((__v4si)
+ __A,
+ (__v4si)_mm_undefined_si128(),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
+@@ -1351,8 +1346,7 @@
+ __imm,
+ (__v2df)
+ _mm_setzero_pd (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128d
+@@ -1388,8 +1382,7 @@
+ __imm,
+ (__v2di)
+ _mm_setzero_di (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
+@@ -1743,8 +1736,7 @@
+ __imm,
+ (__v4di)
+ _mm256_setzero_si256 (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -1783,8 +1775,7 @@
+ __imm,
+ (__v4df)
+ _mm256_setzero_pd (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256d
+Index: gcc/config/i386/avx512dqintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512dqintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512dqintrin.h (.../branches/gcc-6-branch)
+@@ -41,8 +41,7 @@
+ return (__m512d) __builtin_ia32_broadcastf64x2_512_mask ((__v2df)
+ __A,
+ _mm512_undefined_pd(),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m512d
+@@ -72,9 +71,8 @@
+ {
+ return (__m512i) __builtin_ia32_broadcasti64x2_512_mask ((__v2di)
+ __A,
+- _mm512_undefined_si512(),
+- (__mmask8) -
+- 1);
++ _mm512_undefined_epi32(),
++ (__mmask8) -1);
+ }
+
+ extern __inline __m512i
+@@ -104,8 +102,7 @@
+ {
+ return (__m512) __builtin_ia32_broadcastf32x2_512_mask ((__v4sf) __A,
+ (__v16sf)_mm512_undefined_ps(),
+- (__mmask16) -
+- 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __m512
+@@ -133,9 +130,8 @@
+ {
+ return (__m512i) __builtin_ia32_broadcasti32x2_512_mask ((__v4si)
+ __A,
+- (__v16si)_mm512_undefined_si512(),
+- (__mmask16)
+- -1);
++ (__v16si)_mm512_undefined_epi32(),
++ (__mmask16) -1);
+ }
+
+ extern __inline __m512i
+@@ -165,8 +161,7 @@
+ {
+ return (__m512) __builtin_ia32_broadcastf32x8_512_mask ((__v8sf) __A,
+ _mm512_undefined_ps(),
+- (__mmask16) -
+- 1);
++ (__mmask16) -1);
+ }
+
+ extern __inline __m512
+@@ -194,9 +189,8 @@
+ {
+ return (__m512i) __builtin_ia32_broadcasti32x8_512_mask ((__v8si)
+ __A,
+- (__v16si)_mm512_undefined_si512(),
+- (__mmask16)
+- -1);
++ (__v16si)_mm512_undefined_epi32(),
++ (__mmask16) -1);
+ }
+
+ extern __inline __m512i
+@@ -1569,8 +1563,7 @@
+ __imm,
+ (__v2df)
+ _mm_setzero_pd (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128d
+@@ -1640,8 +1633,7 @@
+ __imm,
+ (__v2di)
+ _mm_setzero_di (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
+@@ -1829,8 +1821,7 @@
+ __imm,
+ (__v8di)
+ _mm512_setzero_si512 (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m512i
+@@ -1869,8 +1860,7 @@
+ __imm,
+ (__v8df)
+ _mm512_setzero_pd (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m512d
+@@ -1933,8 +1923,7 @@
+ {
+ return (__mmask16) __builtin_ia32_fpclassps512_mask ((__v16sf) __A,
+ __imm,
+- (__mmask16) -
+- 1);
++ (__mmask16) -1);
+ }
+
+ #else
Index: gcc/config/i386/sse.md
===================================================================
--- a/src/gcc/config/i386/sse.md (.../tags/gcc_6_1_0_release)
@@ -823641,11 +829397,849 @@ Index: gcc/config/i386/i386-builtin-types.def
DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V2DF_V2DF, PTEST)
DEF_FUNCTION_TYPE_ALIAS (INT_FTYPE_V2DI_V2DI, PTEST)
+Index: gcc/config/i386/avx512ifmavlintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512ifmavlintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512ifmavlintrin.h (.../branches/gcc-6-branch)
+@@ -41,7 +41,7 @@
+ return (__m128i) __builtin_ia32_vpmadd52luq128_mask ((__v2di) __X,
+ (__v2di) __Y,
+ (__v2di) __Z,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
+@@ -51,7 +51,7 @@
+ return (__m128i) __builtin_ia32_vpmadd52huq128_mask ((__v2di) __X,
+ (__v2di) __Y,
+ (__v2di) __Z,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -61,7 +61,7 @@
+ return (__m256i) __builtin_ia32_vpmadd52luq256_mask ((__v4di) __X,
+ (__v4di) __Y,
+ (__v4di) __Z,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -71,7 +71,7 @@
+ return (__m256i) __builtin_ia32_vpmadd52huq256_mask ((__v4di) __X,
+ (__v4di) __Y,
+ (__v4di) __Z,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
Index: gcc/config/i386/avx512fintrin.h
===================================================================
--- a/src/gcc/config/i386/avx512fintrin.h (.../tags/gcc_6_1_0_release)
+++ b/src/gcc/config/i386/avx512fintrin.h (.../branches/gcc-6-branch)
-@@ -9130,9 +9130,9 @@
+@@ -130,12 +130,14 @@
+
+ extern __inline __m512i
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+-_mm512_undefined_si512 (void)
++_mm512_undefined_epi32 (void)
+ {
+ __m512i __Y = __Y;
+ return __Y;
+ }
+
++#define _mm512_undefined_si512 _mm512_undefined_epi32
++
+ extern __inline __m512i
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_set1_epi8 (char __A)
+@@ -549,7 +551,7 @@
+ return (__m512i) __builtin_ia32_psllv16si_mask ((__v16si) __X,
+ (__v16si) __Y,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -581,7 +583,7 @@
+ return (__m512i) __builtin_ia32_psrav16si_mask ((__v16si) __X,
+ (__v16si) __Y,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -613,7 +615,7 @@
+ return (__m512i) __builtin_ia32_psrlv16si_mask ((__v16si) __X,
+ (__v16si) __Y,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -733,7 +735,7 @@
+ return (__m512i) __builtin_ia32_psrav8di_mask ((__v8di) __X,
+ (__v8di) __Y,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -765,7 +767,7 @@
+ return (__m512i) __builtin_ia32_psrlv8di_mask ((__v8di) __X,
+ (__v8di) __Y,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -825,7 +827,7 @@
+ return (__m512i) __builtin_ia32_pmuldq512_mask ((__v16si) __X,
+ (__v16si) __Y,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -884,7 +886,7 @@
+ return (__m512i) __builtin_ia32_pmuludq512_mask ((__v16si) __X,
+ (__v16si) __Y,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -915,7 +917,7 @@
+ {
+ return (__m512i) __builtin_ia32_psllqi512_mask ((__v8di) __A, __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -941,7 +943,7 @@
+ #else
+ #define _mm512_slli_epi64(X, C) \
+ ((__m512i) __builtin_ia32_psllqi512_mask ((__v8di)(__m512i)(X), (int)(C),\
+- (__v8di)(__m512i)_mm512_undefined_si512 (),\
++ (__v8di)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask8)-1))
+
+ #define _mm512_mask_slli_epi64(W, U, X, C) \
+@@ -962,7 +964,7 @@
+ return (__m512i) __builtin_ia32_psllq512_mask ((__v8di) __A,
+ (__v2di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -994,7 +996,7 @@
+ {
+ return (__m512i) __builtin_ia32_psrlqi512_mask ((__v8di) __A, __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -1020,7 +1022,7 @@
+ #else
+ #define _mm512_srli_epi64(X, C) \
+ ((__m512i) __builtin_ia32_psrlqi512_mask ((__v8di)(__m512i)(X), (int)(C),\
+- (__v8di)(__m512i)_mm512_undefined_si512 (),\
++ (__v8di)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask8)-1))
+
+ #define _mm512_mask_srli_epi64(W, U, X, C) \
+@@ -1041,7 +1043,7 @@
+ return (__m512i) __builtin_ia32_psrlq512_mask ((__v8di) __A,
+ (__v2di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -1073,7 +1075,7 @@
+ {
+ return (__m512i) __builtin_ia32_psraqi512_mask ((__v8di) __A, __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -1099,7 +1101,7 @@
+ #else
+ #define _mm512_srai_epi64(X, C) \
+ ((__m512i) __builtin_ia32_psraqi512_mask ((__v8di)(__m512i)(X), (int)(C),\
+- (__v8di)(__m512i)_mm512_undefined_si512 (),\
++ (__v8di)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask8)-1))
+
+ #define _mm512_mask_srai_epi64(W, U, X, C) \
+@@ -1120,7 +1122,7 @@
+ return (__m512i) __builtin_ia32_psraq512_mask ((__v8di) __A,
+ (__v2di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -1152,7 +1154,7 @@
+ {
+ return (__m512i) __builtin_ia32_pslldi512_mask ((__v16si) __A, __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1178,7 +1180,7 @@
+ #else
+ #define _mm512_slli_epi32(X, C) \
+ ((__m512i) __builtin_ia32_pslldi512_mask ((__v16si)(__m512i)(X), (int)(C),\
+- (__v16si)(__m512i)_mm512_undefined_si512 (),\
++ (__v16si)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask16)-1))
+
+ #define _mm512_mask_slli_epi32(W, U, X, C) \
+@@ -1199,7 +1201,7 @@
+ return (__m512i) __builtin_ia32_pslld512_mask ((__v16si) __A,
+ (__v4si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1231,7 +1233,7 @@
+ {
+ return (__m512i) __builtin_ia32_psrldi512_mask ((__v16si) __A, __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1257,7 +1259,7 @@
+ #else
+ #define _mm512_srli_epi32(X, C) \
+ ((__m512i) __builtin_ia32_psrldi512_mask ((__v16si)(__m512i)(X), (int)(C),\
+- (__v16si)(__m512i)_mm512_undefined_si512 (),\
++ (__v16si)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask16)-1))
+
+ #define _mm512_mask_srli_epi32(W, U, X, C) \
+@@ -1278,7 +1280,7 @@
+ return (__m512i) __builtin_ia32_psrld512_mask ((__v16si) __A,
+ (__v4si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1310,7 +1312,7 @@
+ {
+ return (__m512i) __builtin_ia32_psradi512_mask ((__v16si) __A, __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1336,7 +1338,7 @@
+ #else
+ #define _mm512_srai_epi32(X, C) \
+ ((__m512i) __builtin_ia32_psradi512_mask ((__v16si)(__m512i)(X), (int)(C),\
+- (__v16si)(__m512i)_mm512_undefined_si512 (),\
++ (__v16si)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask16)-1))
+
+ #define _mm512_mask_srai_epi32(W, U, X, C) \
+@@ -1357,7 +1359,7 @@
+ return (__m512i) __builtin_ia32_psrad512_mask ((__v16si) __A,
+ (__v4si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1778,7 +1780,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovsxbd512_mask ((__v16qi) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1807,7 +1809,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovsxbq512_mask ((__v16qi) __A,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -1836,7 +1838,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovsxwd512_mask ((__v16hi) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1865,7 +1867,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovsxwq512_mask ((__v8hi) __A,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -1894,7 +1896,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovsxdq512_mask ((__v8si) __X,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -1923,7 +1925,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovzxbd512_mask ((__v16qi) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -1952,7 +1954,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovzxbq512_mask ((__v16qi) __A,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -1981,7 +1983,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovzxwd512_mask ((__v16hi) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -2010,7 +2012,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovzxwq512_mask ((__v8hi) __A,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -2039,7 +2041,7 @@
+ {
+ return (__m512i) __builtin_ia32_pmovzxdq512_mask ((__v8si) __X,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -3407,7 +3409,7 @@
+ {
+ return (__m512i) __builtin_ia32_pabsq512_mask ((__v8di) __A,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -3436,7 +3438,7 @@
+ {
+ return (__m512i) __builtin_ia32_pabsd512_mask ((__v16si) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -3521,7 +3523,7 @@
+ {
+ return (__m512i) __builtin_ia32_pbroadcastd512 ((__v4si) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -3549,7 +3551,7 @@
+ {
+ return (__m512i) __builtin_ia32_pbroadcastd512_gpr_mask (__A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16)(-1));
+ }
+
+@@ -3577,7 +3579,7 @@
+ {
+ return (__m512i) __builtin_ia32_pbroadcastq512 ((__v2di) __A,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -3605,7 +3607,7 @@
+ {
+ return (__m512i) __builtin_ia32_pbroadcastq512_gpr_mask (__A,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8)(-1));
+ }
+
+@@ -3662,7 +3664,7 @@
+ {
+ return (__m512i) __builtin_ia32_broadcasti32x4_512 ((__v4si) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -3720,7 +3722,7 @@
+ {
+ return (__m512i) __builtin_ia32_broadcasti64x4_512 ((__v4di) __A,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -3841,7 +3843,7 @@
+ return (__m512i) __builtin_ia32_pshufd512_mask ((__v16si) __A,
+ __mask,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -3874,7 +3876,7 @@
+ return (__m512i) __builtin_ia32_shuf_i64x2_mask ((__v8di) __A,
+ (__v8di) __B, __imm,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -3909,7 +3911,7 @@
+ (__v16si) __B,
+ __imm,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -4009,7 +4011,7 @@
+ #else
+ #define _mm512_shuffle_epi32(X, C) \
+ ((__m512i) __builtin_ia32_pshufd512_mask ((__v16si)(__m512i)(X), (int)(C),\
+- (__v16si)(__m512i)_mm512_undefined_si512 (),\
++ (__v16si)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask16)-1))
+
+ #define _mm512_mask_shuffle_epi32(W, U, X, C) \
+@@ -4025,7 +4027,7 @@
+ #define _mm512_shuffle_i64x2(X, Y, C) \
+ ((__m512i) __builtin_ia32_shuf_i64x2_mask ((__v8di)(__m512i)(X), \
+ (__v8di)(__m512i)(Y), (int)(C),\
+- (__v8di)(__m512i)_mm512_undefined_si512 (),\
++ (__v8di)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask8)-1))
+
+ #define _mm512_mask_shuffle_i64x2(W, U, X, Y, C) \
+@@ -4043,7 +4045,7 @@
+ #define _mm512_shuffle_i32x4(X, Y, C) \
+ ((__m512i) __builtin_ia32_shuf_i32x4_mask ((__v16si)(__m512i)(X), \
+ (__v16si)(__m512i)(Y), (int)(C),\
+- (__v16si)(__m512i)_mm512_undefined_si512 (),\
++ (__v16si)(__m512i)_mm512_undefined_epi32 (),\
+ (__mmask16)-1))
+
+ #define _mm512_mask_shuffle_i32x4(W, U, X, Y, C) \
+@@ -4102,7 +4104,7 @@
+ return (__m512i) __builtin_ia32_prolvd512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -4134,7 +4136,7 @@
+ return (__m512i) __builtin_ia32_prorvd512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -4166,7 +4168,7 @@
+ return (__m512i) __builtin_ia32_prolvq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -4198,7 +4200,7 @@
+ return (__m512i) __builtin_ia32_prorvq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -4390,7 +4392,7 @@
+ {
+ return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1, __R);
+ }
+
+@@ -4420,7 +4422,7 @@
+ {
+ return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1, __R);
+ }
+
+@@ -4445,7 +4447,7 @@
+ }
+ #else
+ #define _mm512_cvtt_roundps_epi32(A, B) \
+- ((__m512i)__builtin_ia32_cvttps2dq512_mask(A, (__v16si)_mm512_undefined_si512 (), -1, B))
++ ((__m512i)__builtin_ia32_cvttps2dq512_mask(A, (__v16si)_mm512_undefined_epi32 (), -1, B))
+
+ #define _mm512_mask_cvtt_roundps_epi32(W, U, A, B) \
+ ((__m512i)__builtin_ia32_cvttps2dq512_mask(A, (__v16si)(W), U, B))
+@@ -4454,7 +4456,7 @@
+ ((__m512i)__builtin_ia32_cvttps2dq512_mask(A, (__v16si)_mm512_setzero_si512 (), U, B))
+
+ #define _mm512_cvtt_roundps_epu32(A, B) \
+- ((__m512i)__builtin_ia32_cvttps2udq512_mask(A, (__v16si)_mm512_undefined_si512 (), -1, B))
++ ((__m512i)__builtin_ia32_cvttps2udq512_mask(A, (__v16si)_mm512_undefined_epi32 (), -1, B))
+
+ #define _mm512_mask_cvtt_roundps_epu32(W, U, A, B) \
+ ((__m512i)__builtin_ia32_cvttps2udq512_mask(A, (__v16si)(W), U, B))
+@@ -4470,7 +4472,7 @@
+ {
+ return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1, __R);
+ }
+
+@@ -4500,7 +4502,7 @@
+ {
+ return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1, __R);
+ }
+
+@@ -4525,7 +4527,7 @@
+ }
+ #else
+ #define _mm512_cvt_roundps_epi32(A, B) \
+- ((__m512i)__builtin_ia32_cvtps2dq512_mask(A, (__v16si)_mm512_undefined_si512 (), -1, B))
++ ((__m512i)__builtin_ia32_cvtps2dq512_mask(A, (__v16si)_mm512_undefined_epi32 (), -1, B))
+
+ #define _mm512_mask_cvt_roundps_epi32(W, U, A, B) \
+ ((__m512i)__builtin_ia32_cvtps2dq512_mask(A, (__v16si)(W), U, B))
+@@ -4534,7 +4536,7 @@
+ ((__m512i)__builtin_ia32_cvtps2dq512_mask(A, (__v16si)_mm512_setzero_si512 (), U, B))
+
+ #define _mm512_cvt_roundps_epu32(A, B) \
+- ((__m512i)__builtin_ia32_cvtps2udq512_mask(A, (__v16si)_mm512_undefined_si512 (), -1, B))
++ ((__m512i)__builtin_ia32_cvtps2udq512_mask(A, (__v16si)_mm512_undefined_epi32 (), -1, B))
+
+ #define _mm512_mask_cvt_roundps_epu32(W, U, A, B) \
+ ((__m512i)__builtin_ia32_cvtps2udq512_mask(A, (__v16si)(W), U, B))
+@@ -4903,7 +4905,6 @@
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_cvtsepi64_epi32 (__m512i __A)
+ {
+- __v8si __O;
+ return (__m256i) __builtin_ia32_pmovsqd512_mask ((__v8di) __A,
+ (__v8si)
+ _mm256_undefined_si256 (),
+@@ -5556,7 +5557,7 @@
+ (__v4di) __B,
+ __imm,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -5651,7 +5652,7 @@
+ #define _mm512_inserti64x4(X, Y, C) \
+ ((__m512i) __builtin_ia32_inserti64x4_mask ((__v8di)(__m512i) (X), \
+ (__v4di)(__m256i) (Y), (int) (C), \
+- (__v8di)(__m512i)_mm512_undefined_si512 (), \
++ (__v8di)(__m512i)_mm512_undefined_epi32 (), \
+ (__mmask8)-1))
+
+ #define _mm512_mask_inserti64x4(W, U, X, Y, C) \
+@@ -6177,7 +6178,7 @@
+ {
+ return (__m512i) __builtin_ia32_permdi512_mask ((__v8di) __X, __I,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) (-1));
+ }
+
+@@ -6248,7 +6249,7 @@
+ ((__m512i) __builtin_ia32_permdi512_mask ((__v8di)(__m512i)(X), \
+ (int)(I), \
+ (__v8di)(__m512i) \
+- (_mm512_undefined_si512 ()),\
++ (_mm512_undefined_epi32 ()),\
+ (__mmask8)(-1)))
+
+ #define _mm512_maskz_permutex_epi64(M, X, I) \
+@@ -6283,7 +6284,7 @@
+ return (__m512i) __builtin_ia32_permvardi512_mask ((__v8di) __Y,
+ (__v8di) __X,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -6316,7 +6317,7 @@
+ return (__m512i) __builtin_ia32_permvarsi512_mask ((__v16si) __Y,
+ (__v16si) __X,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -6891,7 +6892,7 @@
+ {
+ return (__m512i) __builtin_ia32_prold512_mask ((__v16si) __A, __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -6920,7 +6921,7 @@
+ {
+ return (__m512i) __builtin_ia32_prord512_mask ((__v16si) __A, __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -6949,7 +6950,7 @@
+ {
+ return (__m512i) __builtin_ia32_prolq512_mask ((__v8di) __A, __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -6978,7 +6979,7 @@
+ {
+ return (__m512i) __builtin_ia32_prorq512_mask ((__v8di) __A, __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -7005,7 +7006,7 @@
+ #define _mm512_rol_epi32(A, B) \
+ ((__m512i)__builtin_ia32_prold512_mask ((__v16si)(__m512i)(A), \
+ (int)(B), \
+- (__v16si)_mm512_undefined_si512 (), \
++ (__v16si)_mm512_undefined_epi32 (), \
+ (__mmask16)(-1)))
+ #define _mm512_mask_rol_epi32(W, U, A, B) \
+ ((__m512i)__builtin_ia32_prold512_mask ((__v16si)(__m512i)(A), \
+@@ -7020,7 +7021,7 @@
+ #define _mm512_ror_epi32(A, B) \
+ ((__m512i)__builtin_ia32_prord512_mask ((__v16si)(__m512i)(A), \
+ (int)(B), \
+- (__v16si)_mm512_undefined_si512 (), \
++ (__v16si)_mm512_undefined_epi32 (), \
+ (__mmask16)(-1)))
+ #define _mm512_mask_ror_epi32(W, U, A, B) \
+ ((__m512i)__builtin_ia32_prord512_mask ((__v16si)(__m512i)(A), \
+@@ -7035,7 +7036,7 @@
+ #define _mm512_rol_epi64(A, B) \
+ ((__m512i)__builtin_ia32_prolq512_mask ((__v8di)(__m512i)(A), \
+ (int)(B), \
+- (__v8di)_mm512_undefined_si512 (), \
++ (__v8di)_mm512_undefined_epi32 (), \
+ (__mmask8)(-1)))
+ #define _mm512_mask_rol_epi64(W, U, A, B) \
+ ((__m512i)__builtin_ia32_prolq512_mask ((__v8di)(__m512i)(A), \
+@@ -7051,7 +7052,7 @@
+ #define _mm512_ror_epi64(A, B) \
+ ((__m512i)__builtin_ia32_prorq512_mask ((__v8di)(__m512i)(A), \
+ (int)(B), \
+- (__v8di)_mm512_undefined_si512 (), \
++ (__v8di)_mm512_undefined_epi32 (), \
+ (__mmask8)(-1)))
+ #define _mm512_mask_ror_epi64(W, U, A, B) \
+ ((__m512i)__builtin_ia32_prorq512_mask ((__v8di)(__m512i)(A), \
+@@ -7134,7 +7135,7 @@
+ return (__m512i) __builtin_ia32_pandnd512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -7145,7 +7146,7 @@
+ return (__m512i) __builtin_ia32_pandnd512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -7177,7 +7178,7 @@
+ return (__m512i) __builtin_ia32_pandnq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -7275,7 +7276,7 @@
+ return (__m512i) __builtin_ia32_punpckhdq512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -7308,7 +7309,7 @@
+ return (__m512i) __builtin_ia32_punpckhqdq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -7340,7 +7341,7 @@
+ return (__m512i) __builtin_ia32_punpckldq512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -7373,7 +7374,7 @@
+ return (__m512i) __builtin_ia32_punpcklqdq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -8512,7 +8513,7 @@
+ return (__m512i) __builtin_ia32_alignd512_mask ((__v16si) __A,
+ (__v16si) __B, __imm,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -8546,7 +8547,7 @@
+ return (__m512i) __builtin_ia32_alignq512_mask ((__v8di) __A,
+ (__v8di) __B, __imm,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -8575,7 +8576,7 @@
+ #else
+ #define _mm512_alignr_epi32(X, Y, C) \
+ ((__m512i)__builtin_ia32_alignd512_mask ((__v16si)(__m512i)(X), \
+- (__v16si)(__m512i)(Y), (int)(C), (__v16si)_mm512_undefined_si512 (),\
++ (__v16si)(__m512i)(Y), (int)(C), (__v16si)_mm512_undefined_epi32 (),\
+ (__mmask16)-1))
+
+ #define _mm512_mask_alignr_epi32(W, U, X, Y, C) \
+@@ -8590,7 +8591,7 @@
+
+ #define _mm512_alignr_epi64(X, Y, C) \
+ ((__m512i)__builtin_ia32_alignq512_mask ((__v8di)(__m512i)(X), \
+- (__v8di)(__m512i)(Y), (int)(C), (__v8di)_mm512_undefined_si512 (), \
++ (__v8di)(__m512i)(Y), (int)(C), (__v8di)_mm512_undefined_epi32 (), \
+ (__mmask8)-1))
+
+ #define _mm512_mask_alignr_epi64(W, U, X, Y, C) \
+@@ -9130,9 +9131,9 @@
(__mmask8)-1))
#define _mm512_cmp_epi32_mask(X, Y, P) \
@@ -823658,7 +830252,7 @@ Index: gcc/config/i386/avx512fintrin.h
#define _mm512_cmp_epu64_mask(X, Y, P) \
((__mmask8) __builtin_ia32_ucmpq512_mask ((__v8di)(__m512i)(X), \
-@@ -9140,66 +9140,66 @@
+@@ -9140,66 +9141,66 @@
(__mmask8)-1))
#define _mm512_cmp_epu32_mask(X, Y, P) \
@@ -823746,6 +830340,570 @@ Index: gcc/config/i386/avx512fintrin.h
((__mmask8) __builtin_ia32_cmpss_mask ((__v4sf)(__m128)(X), \
(__v4sf)(__m128)(Y), (int)(P), \
(M), R))
+@@ -9306,7 +9307,7 @@
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_i32gather_epi32 (__m512i __index, int const *__addr, int __scale)
+ {
+- __m512i v1_old = _mm512_undefined_si512 ();
++ __m512i v1_old = _mm512_undefined_epi32 ();
+ __mmask16 mask = 0xFFFF;
+
+ return (__m512i) __builtin_ia32_gathersiv16si ((__v16si) v1_old,
+@@ -9330,7 +9331,7 @@
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_i32gather_epi64 (__m256i __index, long long const *__addr, int __scale)
+ {
+- __m512i v1_old = _mm512_undefined_si512 ();
++ __m512i v1_old = _mm512_undefined_epi32 ();
+ __mmask8 mask = 0xFF;
+
+ return (__m512i) __builtin_ia32_gathersiv8di ((__v8di) v1_old,
+@@ -9379,7 +9380,7 @@
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+ _mm512_i64gather_epi64 (__m512i __index, long long const *__addr, int __scale)
+ {
+- __m512i v1_old = _mm512_undefined_si512 ();
++ __m512i v1_old = _mm512_undefined_epi32 ();
+ __mmask8 mask = 0xFF;
+
+ return (__m512i) __builtin_ia32_gatherdiv8di ((__v8di) v1_old,
+@@ -9591,7 +9592,7 @@
+ (__mmask8)MASK, (int)SCALE)
+
+ #define _mm512_i32gather_epi32(INDEX, ADDR, SCALE) \
+- (__m512i) __builtin_ia32_gathersiv16si ((__v16si)_mm512_undefined_si512 (), \
++ (__m512i) __builtin_ia32_gathersiv16si ((__v16si)_mm512_undefined_epi32 (), \
+ (int const *)ADDR, \
+ (__v16si)(__m512i)INDEX, \
+ (__mmask16)0xFFFF, (int)SCALE)
+@@ -9603,7 +9604,7 @@
+ (__mmask16)MASK, (int)SCALE)
+
+ #define _mm512_i32gather_epi64(INDEX, ADDR, SCALE) \
+- (__m512i) __builtin_ia32_gathersiv8di ((__v8di)_mm512_undefined_si512 (), \
++ (__m512i) __builtin_ia32_gathersiv8di ((__v8di)_mm512_undefined_epi32 (), \
+ (long long const *)ADDR, \
+ (__v8si)(__m256i)INDEX, \
+ (__mmask8)0xFF, (int)SCALE)
+@@ -9627,7 +9628,7 @@
+ (__mmask8)MASK, (int)SCALE)
+
+ #define _mm512_i64gather_epi64(INDEX, ADDR, SCALE) \
+- (__m512i) __builtin_ia32_gatherdiv8di ((__v8di)_mm512_undefined_si512 (), \
++ (__m512i) __builtin_ia32_gatherdiv8di ((__v8di)_mm512_undefined_epi32 (), \
+ (long long const *)ADDR, \
+ (__v8di)(__m512i)INDEX, \
+ (__mmask8)0xFF, (int)SCALE)
+@@ -10123,7 +10124,7 @@
+ return (__m512i) __builtin_ia32_pmaxsq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -10154,7 +10155,7 @@
+ return (__m512i) __builtin_ia32_pminsq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -10185,7 +10186,7 @@
+ return (__m512i) __builtin_ia32_pmaxuq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -10216,7 +10217,7 @@
+ return (__m512i) __builtin_ia32_pminuq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask8) -1);
+ }
+
+@@ -10247,7 +10248,7 @@
+ return (__m512i) __builtin_ia32_pmaxsd512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -10278,7 +10279,7 @@
+ return (__m512i) __builtin_ia32_pminsd512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -10309,7 +10310,7 @@
+ return (__m512i) __builtin_ia32_pmaxud512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -10340,7 +10341,7 @@
+ return (__m512i) __builtin_ia32_pminud512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1);
+ }
+
+@@ -11804,7 +11805,7 @@
+ {
+ return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1,
+ _MM_FROUND_CUR_DIRECTION);
+ }
+@@ -11836,7 +11837,7 @@
+ {
+ return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1,
+ _MM_FROUND_CUR_DIRECTION);
+ }
+@@ -11868,7 +11869,7 @@
+ {
+ return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1,
+ _MM_FROUND_CUR_DIRECTION);
+ }
+@@ -11900,7 +11901,7 @@
+ {
+ return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
+ (__v16si)
+- _mm512_undefined_si512 (),
++ _mm512_undefined_epi32 (),
+ (__mmask16) -1,
+ _MM_FROUND_CUR_DIRECTION);
+ }
+Index: gcc/config/i386/avx512vlintrin.h
+===================================================================
+--- a/src/gcc/config/i386/avx512vlintrin.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/i386/avx512vlintrin.h (.../branches/gcc-6-branch)
+@@ -2698,8 +2698,7 @@
+ {
+ return (__m256) __builtin_ia32_broadcastf32x4_256_mask ((__v4sf) __A,
+ (__v8sf)_mm256_undefined_pd (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256
+@@ -2728,8 +2727,7 @@
+ return (__m256i) __builtin_ia32_broadcasti32x4_256_mask ((__v4si)
+ __A,
+ (__v8si)_mm256_undefined_si256 (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -6293,8 +6291,7 @@
+ /* idx */ ,
+ (__v4df) __A,
+ (__v4df) __B,
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256d
+@@ -6584,8 +6581,7 @@
+ /* idx */ ,
+ (__v2df) __A,
+ (__v2df) __B,
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128d
+@@ -8259,8 +8255,7 @@
+ return (__m256i) __builtin_ia32_vpconflictdi_256_mask ((__v4di) __A,
+ (__v4di)
+ _mm256_setzero_si256 (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -8291,8 +8286,7 @@
+ return (__m256i) __builtin_ia32_vpconflictsi_256_mask ((__v8si) __A,
+ (__v8si)
+ _mm256_setzero_si256 (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -8381,8 +8375,7 @@
+ return (__m128i) __builtin_ia32_vpconflictdi_128_mask ((__v2di) __A,
+ (__v2di)
+ _mm_setzero_di (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
+@@ -8413,8 +8406,7 @@
+ return (__m128i) __builtin_ia32_vpconflictsi_128_mask ((__v4si) __A,
+ (__v4si)
+ _mm_setzero_si128 (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
+@@ -9291,8 +9283,7 @@
+ __imm,
+ (__v8si)
+ _mm256_setzero_si256 (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m256i
+@@ -9367,8 +9358,7 @@
+ __imm,
+ (__v4si)
+ _mm_setzero_si128 (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128i
+@@ -9404,8 +9394,7 @@
+ __imm,
+ (__v4sf)
+ _mm_setzero_ps (),
+- (__mmask8) -
+- 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __m128
+@@ -11797,7 +11786,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11815,7 +11804,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11833,7 +11822,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11851,7 +11840,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11869,7 +11858,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11887,7 +11876,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11905,7 +11894,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11923,7 +11912,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11941,7 +11930,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11959,7 +11948,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11977,7 +11966,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -11995,7 +11984,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12013,7 +12002,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12031,7 +12020,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12049,7 +12038,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12067,7 +12056,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12085,7 +12074,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12103,7 +12092,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12121,7 +12110,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12139,7 +12128,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12157,7 +12146,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12175,7 +12164,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12193,7 +12182,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12211,7 +12200,7 @@
+ {
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12229,7 +12218,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12247,7 +12236,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12265,7 +12254,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12283,7 +12272,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12301,7 +12290,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 4,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12319,7 +12308,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 1,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12337,7 +12326,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 5,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ extern __inline __mmask8
+@@ -12355,7 +12344,7 @@
+ {
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 2,
+- (__mmask8) - 1);
++ (__mmask8) -1);
+ }
+
+ #else
Index: gcc/config/i386/driver-i386.c
===================================================================
--- a/src/gcc/config/i386/driver-i386.c (.../tags/gcc_6_1_0_release)
@@ -824492,6 +831650,65 @@ Index: gcc/config/aarch64/arm_neon.h
}
/* vminv */
+Index: gcc/config/aarch64/aarch64-builtins.c
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64-builtins.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/aarch64/aarch64-builtins.c (.../branches/gcc-6-branch)
+@@ -434,13 +434,15 @@
+ };
+ #undef ENTRY
+
+-/* This type is not SIMD-specific; it is the user-visible __fp16. */
+-static tree aarch64_fp16_type_node = NULL_TREE;
+-
+ static tree aarch64_simd_intOI_type_node = NULL_TREE;
+ static tree aarch64_simd_intCI_type_node = NULL_TREE;
+ static tree aarch64_simd_intXI_type_node = NULL_TREE;
+
++/* The user-visible __fp16 type, and a pointer to that type. Used
++ across the back-end. */
++tree aarch64_fp16_type_node = NULL_TREE;
++tree aarch64_fp16_ptr_type_node = NULL_TREE;
++
+ static const char *
+ aarch64_mangle_builtin_scalar_type (const_tree type)
+ {
+@@ -874,6 +876,21 @@
+ }
+ }
+
++/* Initialize the backend types that support the user-visible __fp16
++ type, also initialize a pointer to that type, to be used when
++ forming HFAs. */
++
++static void
++aarch64_init_fp16_types (void)
++{
++ aarch64_fp16_type_node = make_node (REAL_TYPE);
++ TYPE_PRECISION (aarch64_fp16_type_node) = 16;
++ layout_type (aarch64_fp16_type_node);
++
++ (*lang_hooks.types.register_builtin_type) (aarch64_fp16_type_node, "__fp16");
++ aarch64_fp16_ptr_type_node = build_pointer_type (aarch64_fp16_type_node);
++}
++
+ void
+ aarch64_init_builtins (void)
+ {
+@@ -895,12 +912,8 @@
+ = add_builtin_function ("__builtin_aarch64_set_fpsr", ftype_set_fpr,
+ AARCH64_BUILTIN_SET_FPSR, BUILT_IN_MD, NULL, NULL_TREE);
+
+- aarch64_fp16_type_node = make_node (REAL_TYPE);
+- TYPE_PRECISION (aarch64_fp16_type_node) = 16;
+- layout_type (aarch64_fp16_type_node);
++ aarch64_init_fp16_types ();
+
+- (*lang_hooks.types.register_builtin_type) (aarch64_fp16_type_node, "__fp16");
+-
+ if (TARGET_SIMD)
+ aarch64_init_simd_builtins ();
+
Index: gcc/config/aarch64/aarch64-simd.md
===================================================================
--- a/src/gcc/config/aarch64/aarch64-simd.md (.../tags/gcc_6_1_0_release)
@@ -824537,6 +831754,62 @@ Index: gcc/config/aarch64/aarch64-simd-builtins.def
/* Implemented by aarch64_<maxmin_uns>p<mode>. */
BUILTIN_VDQ_BHSI (BINOP, smaxp, 0)
BUILTIN_VDQ_BHSI (BINOP, sminp, 0)
+Index: gcc/config/aarch64/aarch64.c
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64.c (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/aarch64/aarch64.c (.../branches/gcc-6-branch)
+@@ -9771,15 +9771,10 @@
+ field_t = long_double_type_node;
+ field_ptr_t = long_double_ptr_type_node;
+ break;
+-/* The half precision and quad precision are not fully supported yet. Enable
+- the following code after the support is complete. Need to find the correct
+- type node for __fp16 *. */
+-#if 0
+ case HFmode:
+- field_t = float_type_node;
+- field_ptr_t = float_ptr_type_node;
++ field_t = aarch64_fp16_type_node;
++ field_ptr_t = aarch64_fp16_ptr_type_node;
+ break;
+-#endif
+ case V2SImode:
+ case V4SImode:
+ {
+@@ -9934,7 +9929,8 @@
+ {
+ case REAL_TYPE:
+ mode = TYPE_MODE (type);
+- if (mode != DFmode && mode != SFmode && mode != TFmode)
++ if (mode != DFmode && mode != SFmode
++ && mode != TFmode && mode != HFmode)
+ return -1;
+
+ if (*modep == VOIDmode)
+@@ -9947,7 +9943,8 @@
+
+ case COMPLEX_TYPE:
+ mode = TYPE_MODE (TREE_TYPE (type));
+- if (mode != DFmode && mode != SFmode && mode != TFmode)
++ if (mode != DFmode && mode != SFmode
++ && mode != TFmode && mode != HFmode)
+ return -1;
+
+ if (*modep == VOIDmode)
+Index: gcc/config/aarch64/aarch64.h
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64.h (.../tags/gcc_6_1_0_release)
++++ b/src/gcc/config/aarch64/aarch64.h (.../branches/gcc-6-branch)
+@@ -930,4 +930,9 @@
+
+ #define ASM_OUTPUT_POOL_EPILOGUE aarch64_asm_output_pool_epilogue
+
++/* This type is the user-visible __fp16, and a pointer to that type. We
++ need it in many places in the backend. Defined in aarch64-builtins.c. */
++extern tree aarch64_fp16_type_node;
++extern tree aarch64_fp16_ptr_type_node;
++
+ #endif /* GCC_AARCH64_H */
Index: gcc/config/rs6000/476.md
===================================================================
--- a/src/gcc/config/rs6000/476.md (.../tags/gcc_6_1_0_release)
@@ -824724,7 +831997,7 @@ Index: gcc/config/rs6000/constraints.md
;; Extended fusion store
(define_memory_constraint "wF"
"Memory operand suitable for power9 fusion load/stores"
-@@ -156,11 +160,26 @@
+@@ -156,11 +160,35 @@
(and (match_test "TARGET_DIRECT_MOVE_128")
(match_test "(ival == VECTOR_ELEMENT_MFVSRLD_64BIT)"))))
@@ -824748,6 +832021,15 @@ Index: gcc/config/rs6000/constraints.md
+ "Vector constant that can be loaded with XXSPLTIB & sign extension."
+ (match_test "xxspltib_constant_split (op, mode)"))
+
++;; ISA 3.0 DS-form instruction that has the bottom 2 bits 0 and no update form.
++;; Used by LXSD/STXSD/LXSSP/STXSSP. In contrast to "Y", the multiple-of-four
++;; offset is enforced for 32-bit too.
++(define_memory_constraint "wY"
++ "Offsettable memory operand, with bottom 2 bits 0"
++ (and (match_code "mem")
++ (not (match_test "update_address_mem (op, mode)"))
++ (match_test "mem_operand_ds_form (op, mode)")))
++
;; Altivec style load/store that ignores the bottom bits of the address
(define_memory_constraint "wZ"
"Indexed or indirect memory operand, ignoring the bottom 4 bits"
@@ -825594,7 +832876,15 @@ Index: gcc/config/rs6000/rs6000-protos.h
extern int vspltis_shifted (rtx);
extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int);
extern bool macho_lo_sum_memory_operand (rtx, machine_mode);
-@@ -86,6 +87,7 @@
+@@ -38,6 +39,7 @@
+ extern int num_insns_constant_wide (HOST_WIDE_INT);
+ extern int small_data_operand (rtx, machine_mode);
+ extern bool mem_operand_gpr (rtx, machine_mode);
++extern bool mem_operand_ds_form (rtx, machine_mode);
+ extern bool toc_relative_expr_p (const_rtx, bool);
+ extern bool invalid_e500_subreg (rtx, machine_mode);
+ extern void validate_condition_mode (enum rtx_code, machine_mode);
+@@ -86,6 +88,7 @@
extern int mems_ok_for_quad_peep (rtx, rtx);
extern bool gpr_or_gpr_p (rtx, rtx);
extern bool direct_move_p (rtx, rtx);
@@ -825602,7 +832892,7 @@ Index: gcc/config/rs6000/rs6000-protos.h
extern bool quad_load_store_p (rtx, rtx);
extern bool fusion_gpr_load_p (rtx, rtx, rtx, rtx);
extern void expand_fusion_gpr_load (rtx *);
-@@ -133,6 +135,7 @@
+@@ -133,6 +136,7 @@
extern int rs6000_emit_cmove (rtx, rtx, rtx, rtx);
extern int rs6000_emit_vector_cond_expr (rtx, rtx, rtx, rtx, rtx, rtx);
extern void rs6000_emit_minmax (rtx, enum rtx_code, rtx, rtx);
@@ -827250,18 +834540,47 @@ Index: gcc/config/rs6000/rs6000.c
/* Return true if this is a load or store quad operation. This function does
not handle the atomic quad memory instructions. */
-@@ -6994,6 +7309,10 @@
- if (TARGET_POWERPC64 && (offset & 3) != 0)
- return false;
+@@ -7005,6 +7320,39 @@
-+ if (mode_supports_vsx_dform_quad (mode)
-+ && !quad_address_offset_p (offset))
+ return offset + 0x8000 < 0x10000u - extra;
+ }
++
++/* As above, but for DS-FORM VSX insns. Unlike mem_operand_gpr,
++ enforce an offset divisible by 4 even for 32-bit. */
++
++bool
++mem_operand_ds_form (rtx op, machine_mode mode)
++{
++ unsigned HOST_WIDE_INT offset;
++ int extra;
++ rtx addr = XEXP (op, 0);
++
++ if (!offsettable_address_p (false, mode, addr))
+ return false;
+
- extra = GET_MODE_SIZE (mode) - UNITS_PER_WORD;
- if (extra < 0)
- extra = 0;
-@@ -7023,13 +7342,14 @@
++ op = address_offset (addr);
++ if (op == NULL_RTX)
++ return true;
++
++ offset = INTVAL (op);
++ if ((offset & 3) != 0)
++ return false;
++
++ extra = GET_MODE_SIZE (mode) - UNITS_PER_WORD;
++ if (extra < 0)
++ extra = 0;
++
++ if (GET_CODE (addr) == LO_SUM)
++ /* For lo_sum addresses, we must allow any offset except one that
++ causes a wrap, so test only the low 16 bits. */
++ offset = ((offset & 0xffff) ^ 0x8000) - 0x8000;
++
++ return offset + 0x8000 < 0x10000u - extra;
++}
+
+ /* Subroutines of rs6000_legitimize_address and rs6000_legitimate_address_p. */
+
+@@ -7023,13 +7371,14 @@
case TImode:
case TFmode:
case KFmode:
@@ -827282,7 +834601,7 @@ Index: gcc/config/rs6000/rs6000.c
break;
case V4HImode:
-@@ -7096,6 +7416,11 @@
+@@ -7096,6 +7445,11 @@
if (GET_CODE (op) != SYMBOL_REF)
return false;
@@ -827294,7 +834613,7 @@ Index: gcc/config/rs6000/rs6000.c
dsize = GET_MODE_SIZE (mode);
decl = SYMBOL_REF_DECL (op);
if (!decl)
-@@ -7250,6 +7575,8 @@
+@@ -7250,6 +7604,8 @@
return false;
if (!INT_REG_OK_FOR_BASE_P (XEXP (x, 0), strict))
return false;
@@ -827303,7 +834622,7 @@ Index: gcc/config/rs6000/rs6000.c
if (!reg_offset_addressing_ok_p (mode))
return virtual_stack_registers_memory_p (x);
if (legitimate_constant_pool_address_p (x, mode, strict || lra_in_progress))
-@@ -7388,6 +7715,9 @@
+@@ -7388,6 +7744,9 @@
return false;
if (!INT_REG_OK_FOR_BASE_P (XEXP (x, 0), strict))
return false;
@@ -827313,7 +834632,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Restrict addressing for DI because of our SUBREG hackery. */
if (TARGET_E500_DOUBLE && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
return false;
-@@ -7399,7 +7729,7 @@
+@@ -7399,7 +7758,7 @@
if (DEFAULT_ABI == ABI_V4 && flag_pic)
return false;
@@ -827322,7 +834641,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload from reload pass code. LEGITIMIZE_RELOAD_ADDRESS
recognizes some LO_SUM addresses as valid although this
function says opposite. In most cases, LRA through different
-@@ -7453,7 +7783,8 @@
+@@ -7453,7 +7812,8 @@
{
unsigned int extra;
@@ -827332,7 +834651,7 @@ Index: gcc/config/rs6000/rs6000.c
{
if (virtual_stack_registers_memory_p (x))
return x;
-@@ -8148,13 +8479,18 @@
+@@ -8148,13 +8508,18 @@
int ind_levels ATTRIBUTE_UNUSED, int *win)
{
bool reg_offset_p = reg_offset_addressing_ok_p (mode);
@@ -827354,7 +834673,7 @@ Index: gcc/config/rs6000/rs6000.c
reg_offset_p = false;
/* We must recognize output that we have already generated ourselves. */
-@@ -8164,6 +8500,11 @@
+@@ -8164,6 +8529,11 @@
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
&& GET_CODE (XEXP (x, 1)) == CONST_INT)
{
@@ -827366,7 +834685,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8175,6 +8516,11 @@
+@@ -8175,6 +8545,11 @@
if (GET_CODE (x) == LO_SUM
&& GET_CODE (XEXP (x, 0)) == HIGH)
{
@@ -827378,7 +834697,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8203,10 +8549,16 @@
+@@ -8203,10 +8578,16 @@
if (TARGET_CMODEL != CMODEL_SMALL
&& reg_offset_p
@@ -827395,7 +834714,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8215,14 +8567,14 @@
+@@ -8215,14 +8596,14 @@
}
if (GET_CODE (x) == PLUS
@@ -827413,7 +834732,7 @@ Index: gcc/config/rs6000/rs6000.c
{
HOST_WIDE_INT val = INTVAL (XEXP (x, 1));
HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;
-@@ -8229,8 +8581,10 @@
+@@ -8229,8 +8610,10 @@
HOST_WIDE_INT high
= (((val - low) & 0xffffffff) ^ 0x80000000) - 0x80000000;
@@ -827426,7 +834745,7 @@ Index: gcc/config/rs6000/rs6000.c
{
*win = 0;
return x;
-@@ -8244,6 +8598,11 @@
+@@ -8244,6 +8627,11 @@
GEN_INT (high)),
GEN_INT (low));
@@ -827438,7 +834757,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8253,6 +8612,7 @@
+@@ -8253,6 +8641,7 @@
if (GET_CODE (x) == SYMBOL_REF
&& reg_offset_p
@@ -827446,7 +834765,7 @@ Index: gcc/config/rs6000/rs6000.c
&& (!VECTOR_MODE_P (mode) || VECTOR_MEM_NONE_P (mode))
&& !SPE_VECTOR_MODE (mode)
#if TARGET_MACHO
-@@ -8304,6 +8664,11 @@
+@@ -8304,6 +8693,11 @@
x = gen_rtx_LO_SUM (GET_MODE (x),
gen_rtx_HIGH (Pmode, x), x);
@@ -827458,7 +834777,7 @@ Index: gcc/config/rs6000/rs6000.c
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
opnum, (enum reload_type) type);
-@@ -8332,14 +8697,22 @@
+@@ -8332,14 +8726,22 @@
if (TARGET_TOC
&& reg_offset_p
@@ -827484,7 +834803,7 @@ Index: gcc/config/rs6000/rs6000.c
*win = 1;
return x;
}
-@@ -8395,6 +8768,7 @@
+@@ -8395,6 +8797,7 @@
rs6000_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict)
{
bool reg_offset_p = reg_offset_addressing_ok_p (mode);
@@ -827492,7 +834811,7 @@ Index: gcc/config/rs6000/rs6000.c
/* If this is an unaligned stvx/ldvx type address, discard the outer AND. */
if (VECTOR_MEM_ALTIVEC_P (mode)
-@@ -8412,17 +8786,27 @@
+@@ -8412,17 +8815,27 @@
&& mode_supports_pre_incdec_p (mode)
&& legitimate_indirect_address_p (XEXP (x, 0), reg_ok_strict))
return 1;
@@ -827529,7 +834848,7 @@ Index: gcc/config/rs6000/rs6000.c
/* For TImode, if we have load/store quad and TImode in VSX registers, only
allow register indirect addresses. This will allow the values to go in
either GPRs or VSX registers without reloading. The vector types would
-@@ -8461,7 +8845,8 @@
+@@ -8461,7 +8874,8 @@
&& legitimate_indexed_address_p (XEXP (x, 1), reg_ok_strict)))
&& rtx_equal_p (XEXP (XEXP (x, 1), 0), XEXP (x, 0)))
return 1;
@@ -827539,7 +834858,7 @@ Index: gcc/config/rs6000/rs6000.c
return 1;
return 0;
}
-@@ -10044,6 +10429,35 @@
+@@ -10044,6 +10458,35 @@
return must_pass_in_stack_var_size_or_pad (mode, type);
}
@@ -827575,7 +834894,7 @@ Index: gcc/config/rs6000/rs6000.c
/* If defined, a C expression which determines whether, and in which
direction, to pad out an argument with extra space. The value
should be of type `enum direction': either `upward' to pad above
-@@ -10128,6 +10542,7 @@
+@@ -10128,6 +10571,7 @@
&& (GET_MODE_SIZE (mode) == 8
|| (TARGET_HARD_FLOAT
&& TARGET_FPRS
@@ -827583,7 +834902,7 @@ Index: gcc/config/rs6000/rs6000.c
&& FLOAT128_2REG_P (mode))))
return 64;
else if (FLOAT128_VECTOR_P (mode))
-@@ -10507,11 +10922,7 @@
+@@ -10507,11 +10951,7 @@
}
else if (DEFAULT_ABI == ABI_V4)
{
@@ -827596,7 +834915,7 @@ Index: gcc/config/rs6000/rs6000.c
{
/* _Decimal128 must use an even/odd register pair. This assumes
that the register number is odd when fregno is odd. */
-@@ -11168,11 +11579,7 @@
+@@ -11168,11 +11608,7 @@
else if (abi == ABI_V4)
{
@@ -827609,7 +834928,7 @@ Index: gcc/config/rs6000/rs6000.c
{
/* _Decimal128 must use an even/odd register pair. This assumes
that the register number is odd when fregno is odd. */
-@@ -12093,12 +12500,8 @@
+@@ -12093,12 +12529,8 @@
rsize = (size + 3) / 4;
align = 1;
@@ -827624,7 +834943,7 @@ Index: gcc/config/rs6000/rs6000.c
{
/* FP args go in FP registers, if present. */
reg = fpr;
-@@ -12105,7 +12508,7 @@
+@@ -12105,7 +12537,7 @@
n_reg = (size + 7) / 8;
sav_ofs = ((TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT) ? 8 : 4) * 4;
sav_scale = ((TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT) ? 8 : 4);
@@ -827633,7 +834952,7 @@ Index: gcc/config/rs6000/rs6000.c
align = 8;
}
else
-@@ -12125,7 +12528,7 @@
+@@ -12125,7 +12557,7 @@
addr = create_tmp_var (ptr_type_node, "addr");
/* AltiVec vectors never go in registers when -mabi=altivec. */
@@ -827642,7 +834961,7 @@ Index: gcc/config/rs6000/rs6000.c
align = 16;
else
{
-@@ -12146,7 +12549,7 @@
+@@ -12146,7 +12578,7 @@
}
/* _Decimal128 is passed in even/odd fpr pairs; the stored
reg number is 0 for f1, so we want to make it odd. */
@@ -827651,7 +834970,7 @@ Index: gcc/config/rs6000/rs6000.c
{
t = build2 (BIT_IOR_EXPR, TREE_TYPE (reg), unshare_expr (reg),
build_int_cst (TREE_TYPE (reg), 1));
-@@ -12173,7 +12576,7 @@
+@@ -12173,7 +12605,7 @@
FP register for 32-bit binaries. */
if (TARGET_32BIT
&& TARGET_HARD_FLOAT && TARGET_FPRS
@@ -827660,7 +834979,7 @@ Index: gcc/config/rs6000/rs6000.c
t = fold_build_pointer_plus_hwi (t, size);
gimplify_assign (addr, t, pre_p);
-@@ -12260,7 +12663,7 @@
+@@ -12260,7 +12692,7 @@
/* const function, function only depends on the inputs. */
TREE_READONLY (t) = 1;
TREE_NOTHROW (t) = 1;
@@ -827669,7 +834988,7 @@ Index: gcc/config/rs6000/rs6000.c
}
else if ((classify & RS6000_BTC_PURE) != 0)
{
-@@ -12268,7 +12671,7 @@
+@@ -12268,7 +12700,7 @@
external state. */
DECL_PURE_P (t) = 1;
TREE_NOTHROW (t) = 1;
@@ -827678,7 +834997,7 @@ Index: gcc/config/rs6000/rs6000.c
}
else if ((classify & RS6000_BTC_FP) != 0)
{
-@@ -12300,6 +12703,7 @@
+@@ -12300,6 +12732,7 @@
/* Simple ternary operations: VECd = foo (VECa, VECb, VECc). */
@@ -827686,7 +835005,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12312,6 +12716,7 @@
+@@ -12312,6 +12745,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827694,7 +835013,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \
-@@ -12333,6 +12738,7 @@
+@@ -12333,6 +12767,7 @@
/* DST operations: void foo (void *, const int, const char). */
@@ -827702,7 +835021,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12345,6 +12751,7 @@
+@@ -12345,6 +12780,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827710,7 +835029,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12366,6 +12773,7 @@
+@@ -12366,6 +12802,7 @@
/* Simple binary operations: VECc = foo (VECa, VECb). */
@@ -827718,7 +835037,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12378,6 +12786,7 @@
+@@ -12378,6 +12815,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827726,7 +835045,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \
{ MASK, ICODE, NAME, ENUM },
-@@ -12397,6 +12806,7 @@
+@@ -12397,6 +12835,7 @@
#include "rs6000-builtin.def"
};
@@ -827734,7 +835053,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12409,6 +12819,7 @@
+@@ -12409,6 +12848,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827742,7 +835061,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12431,6 +12842,7 @@
+@@ -12431,6 +12871,7 @@
};
/* SPE predicates. */
@@ -827750,7 +835069,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12443,6 +12855,7 @@
+@@ -12443,6 +12884,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827758,7 +835077,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12463,6 +12876,7 @@
+@@ -12463,6 +12905,7 @@
};
/* SPE evsel predicates. */
@@ -827766,7 +835085,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12475,6 +12889,7 @@
+@@ -12475,6 +12918,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827774,7 +835093,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12495,6 +12910,7 @@
+@@ -12495,6 +12939,7 @@
};
/* PAIRED predicates. */
@@ -827782,7 +835101,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12507,6 +12923,7 @@
+@@ -12507,6 +12952,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827790,7 +835109,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12528,6 +12945,7 @@
+@@ -12528,6 +12974,7 @@
/* ABS* operations. */
@@ -827798,7 +835117,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12540,6 +12958,7 @@
+@@ -12540,6 +12987,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827806,7 +835125,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12562,6 +12981,7 @@
+@@ -12562,6 +13010,7 @@
/* Simple unary operations: VECb = foo (unsigned literal) or VECb =
foo (VECa). */
@@ -827814,7 +835133,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12574,6 +12994,7 @@
+@@ -12574,6 +13023,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827822,7 +835141,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \
{ MASK, ICODE, NAME, ENUM },
-@@ -12593,7 +13014,43 @@
+@@ -12593,7 +13043,43 @@
#include "rs6000-builtin.def"
};
@@ -827866,7 +835185,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12606,6 +13063,7 @@
+@@ -12606,6 +13092,7 @@
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
@@ -827874,7 +835193,7 @@ Index: gcc/config/rs6000/rs6000.c
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -12625,6 +13083,7 @@
+@@ -12625,6 +13112,7 @@
#include "rs6000-builtin.def"
};
@@ -827882,7 +835201,7 @@ Index: gcc/config/rs6000/rs6000.c
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
-@@ -12845,6 +13304,24 @@
+@@ -12845,6 +13333,24 @@
return const0_rtx;
}
}
@@ -827907,7 +835226,7 @@ Index: gcc/config/rs6000/rs6000.c
if (target == 0
|| GET_MODE (target) != tmode
-@@ -13768,6 +14245,7 @@
+@@ -13768,6 +14274,7 @@
break;
case ALTIVEC_BUILTIN_LD_INTERNAL_2di:
icode = CODE_FOR_vector_altivec_load_v2di;
@@ -827915,7 +835234,7 @@ Index: gcc/config/rs6000/rs6000.c
case ALTIVEC_BUILTIN_LD_INTERNAL_1ti:
icode = CODE_FOR_vector_altivec_load_v1ti;
break;
-@@ -13829,6 +14307,7 @@
+@@ -13829,6 +14336,7 @@
break;
case ALTIVEC_BUILTIN_ST_INTERNAL_2di:
icode = CODE_FOR_vector_altivec_store_v2di;
@@ -827923,7 +835242,7 @@ Index: gcc/config/rs6000/rs6000.c
case ALTIVEC_BUILTIN_ST_INTERNAL_1ti:
icode = CODE_FOR_vector_altivec_store_v1ti;
break;
-@@ -14129,6 +14608,47 @@
+@@ -14129,6 +14637,47 @@
case VSX_BUILTIN_STXVW4X_V16QI:
return altivec_expand_stv_builtin (CODE_FOR_vsx_store_v16qi, exp);
@@ -827971,7 +835290,7 @@ Index: gcc/config/rs6000/rs6000.c
case ALTIVEC_BUILTIN_MFVSCR:
icode = CODE_FOR_altivec_mfvscr;
tmode = insn_data[icode].operand[0].mode;
-@@ -14323,6 +14843,46 @@
+@@ -14323,6 +14872,46 @@
case VSX_BUILTIN_LXVW4X_V16QI:
return altivec_expand_lv_builtin (CODE_FOR_vsx_load_v16qi,
exp, target, false);
@@ -828018,7 +835337,7 @@ Index: gcc/config/rs6000/rs6000.c
break;
default:
break;
-@@ -14792,6 +15352,14 @@
+@@ -14792,6 +15381,14 @@
error ("Builtin function %s requires the -mhard-dfp option", name);
else if ((fnmask & RS6000_BTM_P8_VECTOR) != 0)
error ("Builtin function %s requires the -mpower8-vector option", name);
@@ -828033,7 +835352,7 @@ Index: gcc/config/rs6000/rs6000.c
else if ((fnmask & (RS6000_BTM_HARD_FLOAT | RS6000_BTM_LDBL128))
== (RS6000_BTM_HARD_FLOAT | RS6000_BTM_LDBL128))
error ("Builtin function %s requires the -mhard-float and"
-@@ -14798,11 +15366,57 @@
+@@ -14798,11 +15395,57 @@
" -mlong-double-128 options", name);
else if ((fnmask & RS6000_BTM_HARD_FLOAT) != 0)
error ("Builtin function %s requires the -mhard-float option", name);
@@ -828091,7 +835410,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Expand an expression EXP that calls a built-in function,
with result going to TARGET if that's convenient
(and in mode MODE if that's convenient).
-@@ -14990,9 +15604,11 @@
+@@ -14990,9 +15633,11 @@
}
unsigned attr = rs6000_builtin_info[uns_fcode].attr & RS6000_BTC_TYPE_MASK;
@@ -828104,7 +835423,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Handle simple unary operations. */
d = bdesc_1arg;
-@@ -15012,6 +15628,12 @@
+@@ -15012,6 +15657,12 @@
if (d->code == fcode)
return rs6000_expand_ternop_builtin (d->icode, exp, target);
@@ -828117,7 +835436,7 @@ Index: gcc/config/rs6000/rs6000.c
gcc_unreachable ();
}
-@@ -15049,6 +15671,10 @@
+@@ -15049,6 +15700,10 @@
opaque_p_V2SI_type_node = build_pointer_type (opaque_V2SI_type_node);
opaque_V4SI_type_node = build_opaque_vector_type (intSI_type_node, 4);
@@ -828128,7 +835447,7 @@ Index: gcc/config/rs6000/rs6000.c
/* We use V1TI mode as a special container to hold __int128_t items that
must live in VSX registers. */
if (intTI_type_node)
-@@ -15111,6 +15737,12 @@
+@@ -15111,6 +15766,12 @@
lang_hooks.types.register_builtin_type (ibm128_float_type_node,
"__ibm128");
}
@@ -828141,7 +835460,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Initialize the modes for builtin_function_type, mapping a machine mode to
tree type node. */
-@@ -15252,6 +15884,15 @@
+@@ -15252,6 +15913,15 @@
if (TARGET_EXTRA_BUILTINS || TARGET_SPE || TARGET_PAIRED_FLOAT)
rs6000_common_init_builtins ();
@@ -828157,7 +835476,7 @@ Index: gcc/config/rs6000/rs6000.c
ftype = builtin_function_type (DFmode, DFmode, DFmode, VOIDmode,
RS6000_BUILTIN_RECIP, "__builtin_recipdiv");
def_builtin ("__builtin_recipdiv", ftype, RS6000_BUILTIN_RECIP);
-@@ -15816,10 +16457,44 @@
+@@ -15816,10 +16486,44 @@
VSX_BUILTIN_STXVW4X_V8HI);
def_builtin ("__builtin_vsx_stxvw4x_v16qi", void_ftype_v16qi_long_pvoid,
VSX_BUILTIN_STXVW4X_V16QI);
@@ -828202,7 +835521,7 @@ Index: gcc/config/rs6000/rs6000.c
def_builtin ("__builtin_vec_step", int_ftype_opaque, ALTIVEC_BUILTIN_VEC_STEP);
def_builtin ("__builtin_vec_splats", opaque_ftype_opaque, ALTIVEC_BUILTIN_VEC_SPLATS);
-@@ -16351,10 +17026,6 @@
+@@ -16351,10 +17055,6 @@
while (num_args > 0 && h.mode[num_args] == VOIDmode)
num_args--;
@@ -828213,7 +835532,7 @@ Index: gcc/config/rs6000/rs6000.c
ret_type = builtin_mode_to_type[h.mode[0]][h.uns_p[0]];
if (!ret_type && h.uns_p[0])
ret_type = builtin_mode_to_type[h.mode[0]][0];
-@@ -16406,6 +17077,7 @@
+@@ -16406,6 +17106,7 @@
tree opaque_ftype_opaque = NULL_TREE;
tree opaque_ftype_opaque_opaque = NULL_TREE;
tree opaque_ftype_opaque_opaque_opaque = NULL_TREE;
@@ -828221,7 +835540,7 @@ Index: gcc/config/rs6000/rs6000.c
tree v2si_ftype_qi = NULL_TREE;
tree v2si_ftype_v2si_qi = NULL_TREE;
tree v2si_ftype_int_qi = NULL_TREE;
-@@ -16622,6 +17294,64 @@
+@@ -16622,6 +17323,64 @@
def_builtin (d->name, type, d->code);
}
@@ -828286,7 +835605,7 @@ Index: gcc/config/rs6000/rs6000.c
}
/* Set up AIX/Darwin/64-bit Linux quad floating point routines. */
-@@ -18006,25 +18736,33 @@
+@@ -18006,25 +18765,33 @@
addr_mask = (reg_addr[mode].addr_mask[RELOAD_REG_VMX]
& ~RELOAD_REG_AND_M16);
@@ -828331,7 +835650,7 @@ Index: gcc/config/rs6000/rs6000.c
return -1;
}
-@@ -18152,6 +18890,16 @@
+@@ -18152,6 +18919,16 @@
}
}
@@ -828348,7 +835667,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Make sure the register class can handle offset addresses. */
else if (rs6000_legitimate_offset_address_p (mode, addr, false, true))
{
-@@ -18158,7 +18906,7 @@
+@@ -18158,7 +18935,7 @@
if ((addr_mask & RELOAD_REG_OFFSET) == 0)
{
extra_cost = 1;
@@ -828357,7 +835676,7 @@ Index: gcc/config/rs6000/rs6000.c
}
}
-@@ -18171,8 +18919,15 @@
+@@ -18171,8 +18948,15 @@
break;
case LO_SUM:
@@ -828374,7 +835693,7 @@ Index: gcc/config/rs6000/rs6000.c
fail_msg = "bad LO_SUM";
extra_cost = -1;
}
-@@ -18188,8 +18943,17 @@
+@@ -18188,8 +18972,17 @@
case CONST:
case SYMBOL_REF:
case LABEL_REF:
@@ -828394,7 +835713,7 @@ Index: gcc/config/rs6000/rs6000.c
break;
/* TOC references look like offsetable memory. */
-@@ -18200,6 +18964,12 @@
+@@ -18200,6 +18993,12 @@
extra_cost = -1;
}
@@ -828407,7 +835726,7 @@ Index: gcc/config/rs6000/rs6000.c
else if ((addr_mask & RELOAD_REG_OFFSET) == 0)
{
extra_cost = 1;
-@@ -18256,7 +19026,8 @@
+@@ -18256,7 +19055,8 @@
simple move insns are issued. At present, 32-bit integers are not allowed
in FPR/VSX registers. Single precision binary floating is not a simple
move because we need to convert to the single precision memory layout.
@@ -828417,7 +835736,7 @@ Index: gcc/config/rs6000/rs6000.c
size = GET_MODE_SIZE (mode);
if (TARGET_DIRECT_MOVE
&& ((mode == SDmode) || (TARGET_POWERPC64 && size == 8))
-@@ -18264,7 +19035,7 @@
+@@ -18264,7 +19064,7 @@
|| (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)))
return true;
@@ -828426,7 +835745,7 @@ Index: gcc/config/rs6000/rs6000.c
&& ((to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)
|| (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)))
return true;
-@@ -18460,6 +19231,7 @@
+@@ -18460,6 +19260,7 @@
&& MEM_P (SUBREG_REG (x))));
sri->icode = CODE_FOR_nothing;
@@ -828434,7 +835753,7 @@ Index: gcc/config/rs6000/rs6000.c
sri->extra_cost = 0;
icode = ((in_p)
? reg_addr[mode].reload_load
-@@ -18653,6 +19425,9 @@
+@@ -18653,6 +19454,9 @@
fprintf (stderr, ", reload func = %s, extra cost = %d",
insn_data[sri->icode].name, sri->extra_cost);
@@ -828444,7 +835763,7 @@ Index: gcc/config/rs6000/rs6000.c
fputs ("\n", stderr);
debug_rtx (x);
}
-@@ -18827,6 +19602,16 @@
+@@ -18827,6 +19631,16 @@
}
}
@@ -828461,7 +835780,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Make sure the register class can handle offset addresses. */
else if (rs6000_legitimate_offset_address_p (mode, addr, false, true))
{
-@@ -18857,6 +19642,13 @@
+@@ -18857,6 +19671,13 @@
}
}
@@ -828475,7 +835794,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Make sure the register class can handle offset addresses. */
else if (legitimate_lo_sum_address_p (mode, addr, false))
{
-@@ -19046,6 +19838,16 @@
+@@ -19046,6 +19867,16 @@
machine_mode mode = GET_MODE (x);
bool is_constant = CONSTANT_P (x);
@@ -828492,7 +835811,7 @@ Index: gcc/config/rs6000/rs6000.c
/* For VSX, see if we should prefer FLOAT_REGS or ALTIVEC_REGS. Do not allow
the reloading of address expressions using PLUS into floating point
registers. */
-@@ -19067,7 +19869,8 @@
+@@ -19067,7 +19898,8 @@
}
/* D-form addressing can easily reload the value. */
@@ -828502,7 +835821,7 @@ Index: gcc/config/rs6000/rs6000.c
return rclass;
/* If this is a scalar floating point value and we don't have D-form
-@@ -19095,6 +19898,25 @@
+@@ -19095,6 +19927,25 @@
return NO_REGS;
}
@@ -828528,7 +835847,7 @@ Index: gcc/config/rs6000/rs6000.c
if (GET_MODE_CLASS (mode) == MODE_INT && rclass == NON_SPECIAL_REGS)
return GENERAL_REGS;
-@@ -19483,8 +20305,16 @@
+@@ -19483,8 +20334,16 @@
else if (TARGET_VSX && dest_vsx_p)
{
@@ -828546,7 +835865,7 @@ Index: gcc/config/rs6000/rs6000.c
else
return "lxvd2x %x0,%y1";
}
-@@ -19513,8 +20343,16 @@
+@@ -19513,8 +20372,16 @@
else if (TARGET_VSX && src_vsx_p)
{
@@ -828564,7 +835883,7 @@ Index: gcc/config/rs6000/rs6000.c
else
return "stxvd2x %x1,%y0";
}
-@@ -19536,10 +20374,8 @@
+@@ -19536,10 +20403,8 @@
if (dest_gpr_p)
return "#";
@@ -828577,7 +835896,7 @@ Index: gcc/config/rs6000/rs6000.c
return output_vec_const_move (operands);
}
-@@ -20732,8 +21568,8 @@
+@@ -20732,8 +21597,8 @@
else if (!TARGET_FLOAT128_HW && FLOAT128_VECTOR_P (mode))
{
rtx libfunc = NULL_RTX;
@@ -828588,7 +835907,7 @@ Index: gcc/config/rs6000/rs6000.c
switch (code)
{
-@@ -20760,21 +21596,23 @@
+@@ -20760,21 +21625,23 @@
case UNGE:
case UNGT:
@@ -828617,7 +835936,7 @@ Index: gcc/config/rs6000/rs6000.c
break;
default:
-@@ -20782,21 +21620,56 @@
+@@ -20782,21 +21649,56 @@
}
gcc_assert (libfunc);
@@ -828687,7 +836006,7 @@ Index: gcc/config/rs6000/rs6000.c
}
emit_insn (gen_rtx_SET (compare_result,
-@@ -21747,6 +22620,101 @@
+@@ -21747,6 +22649,101 @@
return 1;
}
@@ -828789,7 +836108,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Emit a conditional move: move TRUE_COND to DEST if OP of the
operands of the last comparison is nonzero/true, FALSE_COND if it
is zero/false. Return 0 if the hardware has no such operation. */
-@@ -21773,6 +22741,18 @@
+@@ -21773,6 +22770,18 @@
if (GET_MODE (false_cond) != result_mode)
return 0;
@@ -828808,7 +836127,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Don't allow using floating point comparisons for integer results for
now. */
if (FLOAT_MODE_P (compare_mode) && !FLOAT_MODE_P (result_mode))
-@@ -22034,6 +23014,48 @@
+@@ -22034,6 +23043,48 @@
emit_move_insn (dest, target);
}
@@ -828857,7 +836176,7 @@ Index: gcc/config/rs6000/rs6000.c
/* A subroutine of the atomic operation splitters. Jump to LABEL if
COND is true. Mark the jump as unlikely to be taken. */
-@@ -25949,7 +26971,7 @@
+@@ -25949,7 +27000,7 @@
if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
{
rtx areg, savereg, mem;
@@ -828866,7 +836185,7 @@ Index: gcc/config/rs6000/rs6000.c
offset = (info->altivec_save_offset + frame_off
+ 16 * (i - info->first_altivec_reg_save));
-@@ -25956,18 +26978,30 @@
+@@ -25956,18 +27007,30 @@
savereg = gen_rtx_REG (V4SImode, i);
@@ -828907,7 +836226,7 @@ Index: gcc/config/rs6000/rs6000.c
rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
areg, GEN_INT (offset));
-@@ -26687,23 +27721,35 @@
+@@ -26687,23 +27750,35 @@
for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
{
@@ -828957,7 +836276,7 @@ Index: gcc/config/rs6000/rs6000.c
}
}
-@@ -26890,23 +27936,35 @@
+@@ -26890,23 +27965,35 @@
for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
{
@@ -829007,7 +836326,7 @@ Index: gcc/config/rs6000/rs6000.c
}
}
-@@ -27724,6 +28782,11 @@
+@@ -27724,6 +28811,11 @@
const0_rtx, const0_rtx));
call_fusage = NULL_RTX;
use_reg (&call_fusage, r12);
@@ -829019,7 +836338,7 @@ Index: gcc/config/rs6000/rs6000.c
add_function_usage_to (insn, call_fusage);
emit_insn (gen_frame_load (r0, r1, info->lr_save_offset));
insn = emit_move_insn (lr, r0);
-@@ -28763,7 +29826,7 @@
+@@ -28763,7 +29855,7 @@
/* The following variable value is the last issued insn. */
@@ -829028,7 +836347,7 @@ Index: gcc/config/rs6000/rs6000.c
/* The following variable helps to balance issuing of load and
store instructions */
-@@ -28770,6 +29833,13 @@
+@@ -28770,6 +29862,13 @@
static int load_store_pendulum;
@@ -829042,7 +836361,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Power4 load update and store update instructions are cracked into a
load or store and an integer insn which are executed in the same cycle.
Branches have their own dispatch slot which does not count against the
-@@ -28844,7 +29914,7 @@
+@@ -28844,7 +29943,7 @@
some cycles later. */
/* Separate a load from a narrower, dependent store. */
@@ -829051,7 +836370,7 @@ Index: gcc/config/rs6000/rs6000.c
&& GET_CODE (PATTERN (insn)) == SET
&& GET_CODE (PATTERN (dep_insn)) == SET
&& GET_CODE (XEXP (PATTERN (insn), 1)) == MEM
-@@ -29070,7 +30140,9 @@
+@@ -29070,7 +30169,9 @@
switch (attr_type)
{
case TYPE_FP:
@@ -829062,7 +836381,7 @@ Index: gcc/config/rs6000/rs6000.c
return 1;
break;
case TYPE_FPLOAD:
-@@ -29082,6 +30154,8 @@
+@@ -29082,6 +30183,8 @@
break;
}
}
@@ -829071,7 +836390,7 @@ Index: gcc/config/rs6000/rs6000.c
case REG_DEP_ANTI:
/* Anti dependency; DEP_INSN reads a register that INSN writes some
cycles later. */
-@@ -29454,8 +30528,9 @@
+@@ -29454,8 +30557,9 @@
case CPU_POWER7:
return 5;
case CPU_POWER8:
@@ -829082,7 +836401,7 @@ Index: gcc/config/rs6000/rs6000.c
default:
return 1;
}
-@@ -29613,6 +30688,28 @@
+@@ -29613,6 +30717,28 @@
return is_store_insn1 (PATTERN (insn), str_mem);
}
@@ -829111,7 +836430,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Returns whether the dependence between INSN and NEXT is considered
costly by the given target. */
-@@ -29689,6 +30786,229 @@
+@@ -29689,6 +30815,229 @@
return insn;
}
@@ -829341,7 +836660,7 @@ Index: gcc/config/rs6000/rs6000.c
/* We are about to begin issuing insns for this clock cycle. */
static int
-@@ -29920,6 +31240,11 @@
+@@ -29920,6 +31269,11 @@
}
}
@@ -829353,7 +836672,7 @@ Index: gcc/config/rs6000/rs6000.c
return cached_can_issue_more;
}
-@@ -30088,7 +31413,6 @@
+@@ -30088,7 +31442,6 @@
}
break;
case PROCESSOR_POWER8:
@@ -829361,7 +836680,7 @@ Index: gcc/config/rs6000/rs6000.c
type = get_attr_type (insn);
switch (type)
-@@ -30219,7 +31543,6 @@
+@@ -30219,7 +31572,6 @@
}
break;
case PROCESSOR_POWER8:
@@ -829369,7 +836688,7 @@ Index: gcc/config/rs6000/rs6000.c
type = get_attr_type (insn);
switch (type)
-@@ -30338,7 +31661,7 @@
+@@ -30338,7 +31690,7 @@
/* Do we have a special group ending nop? */
if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7
@@ -829378,7 +836697,7 @@ Index: gcc/config/rs6000/rs6000.c
{
nop = gen_group_ending_nop ();
emit_insn_before (nop, next_insn);
-@@ -30592,8 +31915,10 @@
+@@ -30592,8 +31944,10 @@
int sched_verbose ATTRIBUTE_UNUSED,
int max_ready ATTRIBUTE_UNUSED)
{
@@ -829390,7 +836709,7 @@ Index: gcc/config/rs6000/rs6000.c
}
/* The following function is called at the end of scheduling BB.
-@@ -30634,14 +31959,16 @@
+@@ -30634,14 +31988,16 @@
}
}
@@ -829410,7 +836729,7 @@ Index: gcc/config/rs6000/rs6000.c
typedef rs6000_sched_context_def *rs6000_sched_context_t;
/* Allocate store for new scheduling context. */
-@@ -30661,8 +31988,10 @@
+@@ -30661,8 +32017,10 @@
if (clean_p)
{
sc->cached_can_issue_more = 0;
@@ -829422,7 +836741,7 @@ Index: gcc/config/rs6000/rs6000.c
}
else
{
-@@ -30669,6 +31998,8 @@
+@@ -30669,6 +32027,8 @@
sc->cached_can_issue_more = cached_can_issue_more;
sc->last_scheduled_insn = last_scheduled_insn;
sc->load_store_pendulum = load_store_pendulum;
@@ -829431,7 +836750,7 @@ Index: gcc/config/rs6000/rs6000.c
}
}
-@@ -30683,6 +32014,8 @@
+@@ -30683,6 +32043,8 @@
cached_can_issue_more = sc->cached_can_issue_more;
last_scheduled_insn = sc->last_scheduled_insn;
load_store_pendulum = sc->load_store_pendulum;
@@ -829440,7 +836759,7 @@ Index: gcc/config/rs6000/rs6000.c
}
/* Free _SC. */
-@@ -33448,17 +34781,25 @@
+@@ -33448,17 +34810,25 @@
if (!REG_P (target))
tmp = gen_reg_rtx (mode);
@@ -829476,7 +836795,7 @@ Index: gcc/config/rs6000/rs6000.c
/* Copy into target, possibly by way of a register. */
if (!REG_P (target))
-@@ -33869,8 +35210,14 @@
+@@ -33869,8 +35239,14 @@
machine_mode inner = GET_MODE_INNER (mode);
unsigned int inner_bytes = GET_MODE_UNIT_SIZE (mode);
@@ -829492,7 +836811,7 @@ Index: gcc/config/rs6000/rs6000.c
else
{
regno = GP_ARG_RETURN;
-@@ -33992,7 +35339,8 @@
+@@ -33992,7 +35368,8 @@
if (DECIMAL_FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
/* _Decimal128 must use an even/odd register pair. */
regno = (mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN;
@@ -829502,7 +836821,7 @@ Index: gcc/config/rs6000/rs6000.c
&& ((TARGET_SINGLE_FLOAT && (mode == SFmode)) || TARGET_DOUBLE_FLOAT))
regno = FP_ARG_RETURN;
else if (TREE_CODE (valtype) == COMPLEX_TYPE
-@@ -34056,7 +35404,7 @@
+@@ -34056,7 +35433,7 @@
static bool
rs6000_lra_p (void)
{
@@ -829511,7 +836830,7 @@ Index: gcc/config/rs6000/rs6000.c
}
/* Given FROM and TO register numbers, say whether this elimination is allowed.
-@@ -34417,9 +35765,11 @@
+@@ -34417,9 +35794,11 @@
{ "power8-fusion", OPTION_MASK_P8_FUSION, false, true },
{ "power8-fusion-sign", OPTION_MASK_P8_FUSION_SIGN, false, true },
{ "power8-vector", OPTION_MASK_P8_VECTOR, false, true },
@@ -829524,7 +836843,7 @@ Index: gcc/config/rs6000/rs6000.c
{ "power9-vector", OPTION_MASK_P9_VECTOR, false, true },
{ "powerpc-gfxopt", OPTION_MASK_PPC_GFXOPT, false, true },
{ "powerpc-gpopt", OPTION_MASK_PPC_GPOPT, false, true },
-@@ -34474,11 +35824,14 @@
+@@ -34474,11 +35853,14 @@
{ "popcntd", RS6000_BTM_POPCNTD, false, false },
{ "cell", RS6000_BTM_CELL, false, false },
{ "power8-vector", RS6000_BTM_P8_VECTOR, false, false },
@@ -829539,7 +836858,7 @@ Index: gcc/config/rs6000/rs6000.c
};
/* Option variables that we want to support inside attribute((target)) and
-@@ -35049,7 +36402,9 @@
+@@ -35049,7 +36431,9 @@
size_t i;
size_t start_column = 0;
size_t cur_column;
@@ -829550,7 +836869,7 @@ Index: gcc/config/rs6000/rs6000.c
const char *comma = "";
if (indent)
-@@ -35067,27 +36422,45 @@
+@@ -35067,27 +36451,45 @@
cur_column = start_column;
for (i = 0; i < num_elements; i++)
{
@@ -831288,6 +838607,24 @@ Index: gcc/config/rs6000/rs6000.md
(include "cell.md")
(include "xfpu.md")
(include "a2.md")
+@@ -442,7 +446,7 @@
+ (define_mode_attr f32_lr [(SF "f") (SD "wz")])
+ (define_mode_attr f32_lr2 [(SF "wb") (SD "wn")])
+ (define_mode_attr f32_lm [(SF "m") (SD "Z")])
+-(define_mode_attr f32_lm2 [(SF "o") (SD "wn")])
++(define_mode_attr f32_lm2 [(SF "wY") (SD "wn")])
+ (define_mode_attr f32_li [(SF "lfs%U1%X1 %0,%1") (SD "lfiwzx %0,%y1")])
+ (define_mode_attr f32_li2 [(SF "lxssp %0,%1") (SD "lfiwzx %0,%y1")])
+ (define_mode_attr f32_lv [(SF "lxsspx %x0,%y1") (SD "lxsiwzx %x0,%y1")])
+@@ -451,7 +455,7 @@
+ (define_mode_attr f32_sr [(SF "f") (SD "wx")])
+ (define_mode_attr f32_sr2 [(SF "wb") (SD "wn")])
+ (define_mode_attr f32_sm [(SF "m") (SD "Z")])
+-(define_mode_attr f32_sm2 [(SF "o") (SD "wn")])
++(define_mode_attr f32_sm2 [(SF "wY") (SD "wn")])
+ (define_mode_attr f32_si [(SF "stfs%U0%X0 %1,%0") (SD "stfiwx %1,%y0")])
+ (define_mode_attr f32_si2 [(SF "stxssp %1,%0") (SD "stfiwx %1,%y0")])
+ (define_mode_attr f32_sv [(SF "stxsspx %x1,%y0") (SD "stxsiwzx %x1,%y0")])
@@ -489,6 +493,10 @@
; Iterator for just SF/DF
(define_mode_iterator SFDF [SF DF])
@@ -831376,6 +838713,15 @@ Index: gcc/config/rs6000/rs6000.md
(set_attr "fp_type" "fp_addsub_<Fs>")])
(define_expand "add<mode>3"
+@@ -4478,7 +4504,7 @@
+
+ (define_insn_and_split "*extendsfdf2_fpr"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=d,?d,d,ws,?ws,wu,wb")
+- (float_extend:DF (match_operand:SF 1 "reg_or_mem_operand" "0,f,m,0,wy,Z,o")))]
++ (float_extend:DF (match_operand:SF 1 "reg_or_mem_operand" "0,f,m,0,wy,Z,wY")))]
+ "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"
+ "@
+ #
@@ -4494,7 +4520,7 @@
emit_note (NOTE_INSN_DELETED);
DONE;
@@ -831771,16 +839117,56 @@ Index: gcc/config/rs6000/rs6000.md
(const_string "integer")))
(set (attr "length")
(if_then_else
-@@ -6505,7 +6540,7 @@
+@@ -6481,32 +6516,37 @@
+ }")
+
+ (define_insn "mov<mode>_hardfloat"
+- [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "=!r,!r,m,f,<f32_vsx>,<f32_vsx>,!r,<f32_lr>,<f32_lr2>,<f32_sm>,<f32_sm2>,<f32_av>,Z,?<f32_dm>,?r,*c*l,!r,*h")
+- (match_operand:FMOVE32 1 "input_operand" "r,m,r,f,<f32_vsx>,<zero_fp>,<zero_fp>,<f32_lm>,<f32_lm2>,<f32_sr>,<f32_sr2>,Z,<f32_av>,r,<f32_dm>,r,h,0"))]
++ [(set (match_operand:FMOVE32 0 "nonimmediate_operand"
++ "=!r, <f32_lr>, <f32_lr2>, <f32_av>, m, <f32_sm>,
++ <f32_sm2>, Z, <f32_vsx>, !r, ?<f32_dm>, ?r,
++ f, <f32_vsx>, !r, *c*l, !r, *h")
++ (match_operand:FMOVE32 1 "input_operand"
++ "m, <f32_lm>, <f32_lm2>, Z, r, <f32_sr>,
++ <f32_sr2>, <f32_av>, <zero_fp>, <zero_fp>, r, <f32_dm>,
++ f, <f32_vsx>, r, r, *h, 0"))]
+ "(gpc_reg_operand (operands[0], <MODE>mode)
+ || gpc_reg_operand (operands[1], <MODE>mode))
+ && (TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT)"
+ "@
+- mr %0,%1
+ lwz%U1%X1 %0,%1
+- stw%U0%X0 %1,%0
+- fmr %0,%1
+- xscpsgndp %x0,%x1,%x1
+- xxlxor %x0,%x0,%x0
+- li %0,0
+ <f32_li>
+ <f32_li2>
++ <f32_lv>
++ stw%U0%X0 %1,%0
+ <f32_si>
+ <f32_si2>
+- <f32_lv>
+ <f32_sv>
++ xxlxor %x0,%x0,%x0
++ li %0,0
+ mtvsrwz %x0,%1
+ mfvsrwz %0,%x1
++ fmr %0,%1
++ xscpsgndp %x0,%x1,%x1
++ mr %0,%1
mt%0 %1
mf%1 %0
nop"
- [(set_attr "type" "*,load,store,fp,fp,vecsimple,integer,fpload,fpload,fpstore,fpstore,fpload,fpstore,mffgpr,mftgpr,mtjmpr,mfjmpr,*")
-+ [(set_attr "type" "*,load,store,fpsimple,fpsimple,veclogical,integer,fpload,fpload,fpstore,fpstore,fpload,fpstore,mffgpr,mftgpr,mtjmpr,mfjmpr,*")
- (set_attr "length" "4")])
+- (set_attr "length" "4")])
++ [(set_attr "type" "load,fpload,fpload,fpload,store,fpstore,fpstore,fpstore,veclogical,integer,mffgpr,mftgpr,fpsimple,fpsimple,*,mtjmpr,mfjmpr,*")])
(define_insn "*mov<mode>_softfloat"
-@@ -6640,7 +6675,8 @@
+ [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "=r,cl,r,r,m,r,r,r,r,*h")
+@@ -6640,7 +6680,8 @@
#
#
#"
@@ -831790,7 +839176,7 @@ Index: gcc/config/rs6000/rs6000.md
(set_attr "length" "4,4,4,4,4,4,4,4,4,8,8,8,8")])
(define_insn "*mov<mode>_softfloat32"
-@@ -6685,7 +6721,8 @@
+@@ -6685,7 +6726,8 @@
mffgpr %0,%1
mfvsrd %0,%x1
mtvsrd %x0,%1"
@@ -831800,7 +839186,7 @@ Index: gcc/config/rs6000/rs6000.md
(set_attr "length" "4")])
(define_insn "*mov<mode>_softfloat64"
-@@ -6896,7 +6933,7 @@
+@@ -6896,7 +6938,7 @@
emit_note (NOTE_INSN_DELETED);
DONE;
}
@@ -831809,7 +839195,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "trunc<mode>df2_internal2"
[(set (match_operand:DF 0 "gpc_reg_operand" "=d")
-@@ -7129,7 +7166,7 @@
+@@ -7129,7 +7171,7 @@
else
return \"fneg %0,%1\;fneg %L0,%L1\";
}"
@@ -831818,7 +839204,7 @@ Index: gcc/config/rs6000/rs6000.md
(set_attr "length" "8")])
(define_expand "abs<mode>2"
-@@ -7264,7 +7301,7 @@
+@@ -7264,7 +7306,7 @@
(use (match_operand:V16QI 2 "register_operand" "v"))]
"TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
"xxlxor %x0,%x1,%x2"
@@ -831827,7 +839213,7 @@ Index: gcc/config/rs6000/rs6000.md
;; IEEE 128-bit absolute value
(define_insn_and_split "ieee_128bit_vsx_abs<mode>2"
-@@ -7293,7 +7330,7 @@
+@@ -7293,7 +7335,7 @@
(use (match_operand:V16QI 2 "register_operand" "v"))]
"TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
"xxlandc %x0,%x1,%x2"
@@ -831836,7 +839222,7 @@ Index: gcc/config/rs6000/rs6000.md
;; IEEE 128-bit negative absolute value
(define_insn_and_split "*ieee_128bit_vsx_nabs<mode>2"
-@@ -7326,7 +7363,7 @@
+@@ -7326,7 +7368,7 @@
(use (match_operand:V16QI 2 "register_operand" "v"))]
"TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
"xxlor %x0,%x1,%x2"
@@ -831845,7 +839231,7 @@ Index: gcc/config/rs6000/rs6000.md
;; Float128 conversion functions. These expand to library function calls.
;; We use expand to convert from IBM double double to IEEE 128-bit
-@@ -7482,7 +7519,7 @@
+@@ -7482,7 +7524,7 @@
UNSPEC_P8V_FMRGOW))]
"!TARGET_POWERPC64 && TARGET_DIRECT_MOVE"
"fmrgow %0,%1,%2"
@@ -831854,7 +839240,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "p8_mtvsrwz"
[(set (match_operand:DF 0 "register_operand" "=d")
-@@ -7705,7 +7742,8 @@
+@@ -7705,7 +7747,8 @@
lfd%U1%X1 %0,%1
fmr %0,%1
#"
@@ -831864,7 +839250,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_split
[(set (match_operand:DI 0 "gpc_reg_operand" "")
-@@ -7759,7 +7797,8 @@
+@@ -7759,7 +7802,8 @@
mfvsrd %0,%x1
mtvsrd %x0,%1
xxlxor %x0,%x0,%x0"
@@ -831874,7 +839260,7 @@ Index: gcc/config/rs6000/rs6000.md
(set_attr "length" "4,4,4,4,4,20,4,4,4,4,4,4,4,4,4,4,4")])
; Some DImode loads are best done as a load of -1 followed by a mask
-@@ -8767,7 +8806,8 @@
+@@ -8767,7 +8811,8 @@
lfdu %3,%2(%0)"
[(set_attr "type" "fpload")
(set_attr "update" "yes")
@@ -831884,7 +839270,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*movdf_update2"
[(set (mem:DF (plus:SI (match_operand:SI 1 "gpc_reg_operand" "0,0")
-@@ -11902,6 +11942,7 @@
+@@ -11902,6 +11947,7 @@
(set (match_dup 0)
(plus:P (match_dup 0)
(const_int -1)))
@@ -831892,7 +839278,7 @@ Index: gcc/config/rs6000/rs6000.md
(clobber (match_scratch:CC 2 ""))
(clobber (match_scratch:P 3 ""))])]
""
-@@ -11912,6 +11953,7 @@
+@@ -11912,6 +11958,7 @@
;; JUMP_INSNs.
;; For the length attribute to be calculated correctly, the
;; label MUST be operand 0.
@@ -831900,7 +839286,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*ctr<mode>_internal1"
[(set (pc)
-@@ -11919,9 +11961,10 @@
+@@ -11919,9 +11966,10 @@
(const_int 1))
(label_ref (match_operand 0 "" ""))
(pc)))
@@ -831912,7 +839298,7 @@ Index: gcc/config/rs6000/rs6000.md
(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:P 4 "=X,X,&r,r"))]
""
-@@ -11943,9 +11986,10 @@
+@@ -11943,9 +11991,10 @@
(const_int 1))
(pc)
(label_ref (match_operand 0 "" ""))))
@@ -831924,7 +839310,7 @@ Index: gcc/config/rs6000/rs6000.md
(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:P 4 "=X,X,&r,r"))]
""
-@@ -11969,9 +12013,10 @@
+@@ -11969,9 +12018,10 @@
(const_int 1))
(label_ref (match_operand 0 "" ""))
(pc)))
@@ -831936,7 +839322,7 @@ Index: gcc/config/rs6000/rs6000.md
(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:P 4 "=X,X,&r,r"))]
""
-@@ -11993,9 +12038,10 @@
+@@ -11993,9 +12043,10 @@
(const_int 1))
(pc)
(label_ref (match_operand 0 "" ""))))
@@ -831948,7 +839334,7 @@ Index: gcc/config/rs6000/rs6000.md
(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:P 4 "=X,X,&r,r"))]
""
-@@ -12022,6 +12068,7 @@
+@@ -12022,6 +12073,7 @@
(match_operand 6 "" "")))
(set (match_operand:P 0 "int_reg_operand" "")
(plus:P (match_dup 1) (const_int -1)))
@@ -831956,7 +839342,7 @@ Index: gcc/config/rs6000/rs6000.md
(clobber (match_scratch:CC 3 ""))
(clobber (match_scratch:P 4 ""))]
"reload_completed"
-@@ -12047,6 +12094,7 @@
+@@ -12047,6 +12099,7 @@
(match_operand 6 "" "")))
(set (match_operand:P 0 "nonimmediate_operand" "")
(plus:P (match_dup 1) (const_int -1)))
@@ -831964,7 +839350,7 @@ Index: gcc/config/rs6000/rs6000.md
(clobber (match_scratch:CC 3 ""))
(clobber (match_scratch:P 4 ""))]
"reload_completed && ! gpc_reg_operand (operands[0], SImode)"
-@@ -12563,8 +12611,10 @@
+@@ -12563,8 +12616,10 @@
(set_attr "indexed" "no")])
;; A return instruction which the middle-end doesn't see.
@@ -831976,7 +839362,7 @@ Index: gcc/config/rs6000/rs6000.md
""
"blr"
[(set_attr "type" "jmpreg")])
-@@ -13166,7 +13216,7 @@
+@@ -13166,7 +13221,7 @@
operands[3] = gen_rtx_REG (<FP128_64>mode, dest_hi);
operands[4] = gen_rtx_REG (<FP128_64>mode, dest_lo);
}
@@ -831985,7 +839371,7 @@ Index: gcc/config/rs6000/rs6000.md
(set_attr "length" "4,8")])
(define_insn "unpack<mode>"
-@@ -13205,7 +13255,8 @@
+@@ -13205,7 +13260,8 @@
(match_operand:IEEE128 2 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsaddqp %0,%1,%2"
@@ -831995,7 +839381,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "sub<mode>3"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13214,7 +13265,8 @@
+@@ -13214,7 +13270,8 @@
(match_operand:IEEE128 2 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xssubqp %0,%1,%2"
@@ -832005,7 +839391,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "mul<mode>3"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13223,7 +13275,8 @@
+@@ -13223,7 +13280,8 @@
(match_operand:IEEE128 2 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmulqp %0,%1,%2"
@@ -832015,7 +839401,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "div<mode>3"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13232,7 +13285,8 @@
+@@ -13232,7 +13290,8 @@
(match_operand:IEEE128 2 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsdivqp %0,%1,%2"
@@ -832025,7 +839411,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "sqrt<mode>2"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13240,9 +13294,28 @@
+@@ -13240,9 +13299,28 @@
(match_operand:IEEE128 1 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xssqrtqp %0,%1"
@@ -832056,7 +839442,7 @@ Index: gcc/config/rs6000/rs6000.md
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
[(match_operand:IEEE128 1 "altivec_register_operand" "v")
-@@ -13250,8 +13323,21 @@
+@@ -13250,8 +13328,21 @@
UNSPEC_COPYSIGN))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscpsgnqp %0,%2,%1"
@@ -832079,7 +839465,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "neg<mode>2_hw"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(neg:IEEE128
-@@ -13258,7 +13344,8 @@
+@@ -13258,7 +13349,8 @@
(match_operand:IEEE128 1 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsnegqp %0,%1"
@@ -832089,7 +839475,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "abs<mode>2_hw"
-@@ -13267,7 +13354,8 @@
+@@ -13267,7 +13359,8 @@
(match_operand:IEEE128 1 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsabsqp %0,%1"
@@ -832099,7 +839485,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*nabs<mode>2_hw"
-@@ -13277,7 +13365,8 @@
+@@ -13277,7 +13370,8 @@
(match_operand:IEEE128 1 "altivec_register_operand" "v"))))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsnabsqp %0,%1"
@@ -832109,7 +839495,7 @@ Index: gcc/config/rs6000/rs6000.md
;; Initially don't worry about doing fusion
(define_insn "*fma<mode>4_hw"
-@@ -13288,7 +13377,8 @@
+@@ -13288,7 +13382,8 @@
(match_operand:IEEE128 3 "altivec_register_operand" "0")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmaddqp %0,%1,%2"
@@ -832119,7 +839505,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*fms<mode>4_hw"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13299,7 +13389,8 @@
+@@ -13299,7 +13394,8 @@
(match_operand:IEEE128 3 "altivec_register_operand" "0"))))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmsubqp %0,%1,%2"
@@ -832129,7 +839515,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*nfma<mode>4_hw"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13310,7 +13401,8 @@
+@@ -13310,7 +13406,8 @@
(match_operand:IEEE128 3 "altivec_register_operand" "0"))))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsnmaddqp %0,%1,%2"
@@ -832139,7 +839525,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*nfms<mode>4_hw"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13322,7 +13414,8 @@
+@@ -13322,7 +13419,8 @@
(match_operand:IEEE128 3 "altivec_register_operand" "0")))))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsnmsubqp %0,%1,%2"
@@ -832149,7 +839535,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "extend<SFDF:mode><IEEE128:mode>2_hw"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13330,7 +13423,8 @@
+@@ -13330,7 +13428,8 @@
(match_operand:SFDF 1 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<IEEE128:MODE>mode)"
"xscvdpqp %0,%1"
@@ -832159,7 +839545,7 @@ Index: gcc/config/rs6000/rs6000.md
;; Conversion between KFmode and TFmode if TFmode is ieee 128-bit floating
;; point is a simple copy.
-@@ -13347,7 +13441,7 @@
+@@ -13347,7 +13446,7 @@
emit_note (NOTE_INSN_DELETED);
DONE;
}
@@ -832168,7 +839554,7 @@ Index: gcc/config/rs6000/rs6000.md
(set_attr "length" "0,4")])
(define_insn_and_split "trunctfkf2"
-@@ -13363,7 +13457,7 @@
+@@ -13363,7 +13462,7 @@
emit_note (NOTE_INSN_DELETED);
DONE;
}
@@ -832177,7 +839563,7 @@ Index: gcc/config/rs6000/rs6000.md
(set_attr "length" "0,4")])
(define_insn "trunc<mode>df2_hw"
-@@ -13372,7 +13466,8 @@
+@@ -13372,7 +13471,8 @@
(match_operand:IEEE128 1 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscvqpdp %0,%1"
@@ -832187,7 +839573,7 @@ Index: gcc/config/rs6000/rs6000.md
;; There is no KFmode -> SFmode instruction. Preserve the accuracy by doing
;; the KFmode -> DFmode conversion using round to odd rather than the normal
-@@ -13469,7 +13564,8 @@
+@@ -13469,7 +13569,8 @@
UNSPEC_IEEE128_CONVERT))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscvqp<su>wz %0,%1"
@@ -832197,7 +839583,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*xscvqp<su>dz_<mode>"
[(set (match_operand:V2DI 0 "altivec_register_operand" "=v")
-@@ -13479,7 +13575,8 @@
+@@ -13479,7 +13580,8 @@
UNSPEC_IEEE128_CONVERT))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscvqp<su>dz %0,%1"
@@ -832207,7 +839593,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*xscv<su>dqp_<mode>"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-@@ -13488,7 +13585,8 @@
+@@ -13488,7 +13590,8 @@
UNSPEC_IEEE128_CONVERT)))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscv<su>dqp %0,%1"
@@ -832217,7 +839603,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*ieee128_mfvsrd_64bit"
[(set (match_operand:DI 0 "reg_or_indexed_operand" "=wr,Z,wi")
-@@ -13499,7 +13597,7 @@
+@@ -13499,7 +13602,7 @@
mfvsrd %0,%x1
stxsdx %x1,%y0
xxlor %x0,%x1,%x1"
@@ -832226,7 +839612,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*ieee128_mfvsrd_32bit"
-@@ -13510,7 +13608,7 @@
+@@ -13510,7 +13613,7 @@
"@
stxsdx %x1,%y0
xxlor %x0,%x1,%x1"
@@ -832235,7 +839621,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*ieee128_mfvsrwz"
[(set (match_operand:SI 0 "reg_or_indexed_operand" "=r,Z")
-@@ -13546,7 +13644,7 @@
+@@ -13546,7 +13649,7 @@
mtvsrd %x0,%1
lxsdx %x0,%y1
xxlor %x0,%x1,%x1"
@@ -832244,7 +839630,7 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn "*ieee128_mtvsrd_32bit"
[(set (match_operand:V2DI 0 "altivec_register_operand" "=v,v")
-@@ -13556,7 +13654,7 @@
+@@ -13556,7 +13659,7 @@
"@
lxsdx %x0,%y1
xxlor %x0,%x1,%x1"
@@ -832253,7 +839639,7 @@ Index: gcc/config/rs6000/rs6000.md
;; IEEE 128-bit instructions with round to odd semantics
(define_insn "*trunc<mode>df2_odd"
-@@ -13565,7 +13663,8 @@
+@@ -13565,7 +13668,8 @@
UNSPEC_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscvqpdpo %0,%1"
@@ -832263,7 +839649,7 @@ Index: gcc/config/rs6000/rs6000.md
;; IEEE 128-bit comparisons
(define_insn "*cmp<mode>_hw"
-@@ -13574,7 +13673,8 @@
+@@ -13574,7 +13678,8 @@
(match_operand:IEEE128 2 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscmpuqp %0,%1,%2"
@@ -833270,6 +840656,84 @@ Index: gcc/lto-streamer.h
typedef unsigned char lto_decl_flags_t;
+Index: libgo/go/cmd/go/build.go
+===================================================================
+--- a/src/libgo/go/cmd/go/build.go (.../tags/gcc_6_1_0_release)
++++ b/src/libgo/go/cmd/go/build.go (.../branches/gcc-6-branch)
+@@ -2632,10 +2632,9 @@
+ func (tools gccgoToolchain) ld(b *builder, root *action, out string, allactions []*action, mainpkg string, ofiles []string) error {
+ // gccgo needs explicit linking with all package dependencies,
+ // and all LDFLAGS from cgo dependencies.
+- apackagesSeen := make(map[*Package]bool)
++ apackagePathsSeen := make(map[string]bool)
+ afiles := []string{}
+ shlibs := []string{}
+- xfiles := []string{}
+ ldflags := b.gccArchArgs()
+ cgoldflags := []string{}
+ usesCgo := false
+@@ -2647,9 +2646,18 @@
+ if err != nil {
+ return err
+ }
++ const ldflagsPrefix = "_CGO_LDFLAGS="
+ for _, line := range strings.Split(string(flags), "\n") {
+- if strings.HasPrefix(line, "_CGO_LDFLAGS=") {
+- cgoldflags = append(cgoldflags, strings.Fields(line[13:])...)
++ if strings.HasPrefix(line, ldflagsPrefix) {
++ newFlags := strings.Fields(line[len(ldflagsPrefix):])
++ for _, flag := range newFlags {
++ // Every _cgo_flags file has -g and -O2 in _CGO_LDFLAGS
++ // but they don't mean anything to the linker so filter
++ // them out.
++ if flag != "-g" && !strings.HasPrefix(flag, "-O") {
++ cgoldflags = append(cgoldflags, flag)
++ }
++ }
+ }
+ }
+ return nil
+@@ -2714,10 +2722,10 @@
+ // rather than the 'build' location (which may not exist any
+ // more). We still need to traverse the dependencies of the
+ // build action though so saying
+- // if apackagesSeen[a.p] { return }
++ // if apackagePathsSeen[a.p.ImportPath] { return }
+ // doesn't work.
+- if !apackagesSeen[a.p] {
+- apackagesSeen[a.p] = true
++ if !apackagePathsSeen[a.p.ImportPath] {
++ apackagePathsSeen[a.p.ImportPath] = true
+ target := a.target
+ if len(a.p.CgoFiles) > 0 {
+ target, err = readAndRemoveCgoFlags(target)
+@@ -2725,17 +2733,7 @@
+ return
+ }
+ }
+- if a.p.fake && a.p.external {
+- // external _tests, if present must come before
+- // internal _tests. Store these on a separate list
+- // and place them at the head after this loop.
+- xfiles = append(xfiles, target)
+- } else if a.p.fake {
+- // move _test files to the top of the link order
+- afiles = append([]string{target}, afiles...)
+- } else {
+- afiles = append(afiles, target)
+- }
++ afiles = append(afiles, target)
+ }
+ }
+ if strings.HasSuffix(a.target, ".so") {
+@@ -2755,7 +2753,6 @@
+ return err
+ }
+ }
+- afiles = append(xfiles, afiles...)
+
+ for _, a := range allactions {
+ // Gather CgoLDFLAGS, but not from standard packages.
Index: libvtv/Makefile.in
===================================================================
--- a/src/libvtv/Makefile.in (.../tags/gcc_6_1_0_release)
@@ -833361,6 +840825,34 @@ Index: libvtv/Makefile.am
vtv_headers = \
vtv_map.h \
+Index: libgfortran/ChangeLog
+===================================================================
+--- a/src/libgfortran/ChangeLog (.../tags/gcc_6_1_0_release)
++++ b/src/libgfortran/ChangeLog (.../branches/gcc-6-branch)
+@@ -1,3 +1,10 @@
++2016-08-11 Jerry DeLisle <jvdelisle at gcc.gnu.org>
++
++ Backport from trunk
++ PR libgfortran/71123
++ PR libgfortran/73142
++ * io/list_read (eat_spaces): Eat '\r' as part of spaces.
++
+ 2016-04-27 Release Manager
+
+ * GCC 6.1.0 released.
+Index: libgfortran/io/list_read.c
+===================================================================
+--- a/src/libgfortran/io/list_read.c (.../tags/gcc_6_1_0_release)
++++ b/src/libgfortran/io/list_read.c (.../branches/gcc-6-branch)
+@@ -418,7 +418,7 @@
+ /* Now skip spaces, EOF and EOL are handled in next_char. */
+ do
+ c = next_char (dtp);
+- while (c != EOF && (c == ' ' || c == '\t'));
++ while (c != EOF && (c == ' ' || c == '\r' || c == '\t'));
+
+ unget_char (dtp, c);
+ return c;
Index: libffi/ChangeLog
===================================================================
--- a/src/libffi/ChangeLog (.../tags/gcc_6_1_0_release)
@@ -842917,3 +850409,13 @@ Index: fixincludes/inclhack.def
/*
* stdlib.h on AIX 4.3 declares strtof() with a non-const first argument.
*/
+Index: .
+===================================================================
+--- a/src/. (.../tags/gcc_6_1_0_release)
++++ b/src/. (.../branches/gcc-6-branch)
+
+Property changes on: .
+___________________________________________________________________
+Added: svn:mergeinfo
+## -0,0 +0,1 ##
+ Merged /trunk:r239173
diff --git a/debian/rules.patch b/debian/rules.patch
index abff61b..5b2e84f 100644
--- a/debian/rules.patch
+++ b/debian/rules.patch
@@ -82,7 +82,6 @@ debian_patches += \
pr67590 \
ada-gnattools-ldflags \
libjit-ldflags \
- gccgo-test-linking \
gcc-SOURCE_DATE_EPOCH \
gcc-SOURCE_DATE_EPOCH-2 \
cmd-go-combine-gccgo-s-ld-and-ldShared-methods \
@@ -90,7 +89,6 @@ debian_patches += \
vulcan-costs \
libjava-mips64el \
PR55947-revert \
- pr68273 \
# vulcan-cpu$(if $(with_linaro_branch),-linaro) \
# this is still needed on powerpc, e.g. firefox and insighttoolkit4 will ftbfs.
--
Alioth's /usr/local/bin/git-commit-notice on /srv/git.debian.org/git/reproducible/gcc-6.git
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