[gcc-6] 191/401: * Update to SVN 20160824 (r239726, 6.2.1) from the gcc-6-branch.

Ximin Luo infinity0 at debian.org
Wed Apr 5 15:49:17 UTC 2017


This is an automated email from the git hooks/post-receive script.

infinity0 pushed a commit to branch pu/reproducible_builds
in repository gcc-6.

commit e24b38052b8f94a920c10ca4457c0e1f1d4f933a
Author: doko <doko at 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca>
Date:   Wed Aug 24 06:08:13 2016 +0000

      * Update to SVN 20160824 (r239726, 6.2.1) from the gcc-6-branch.
    
    
    git-svn-id: svn://anonscm.debian.org/gcccvs/branches/sid/gcc-6@8955 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
---
 debian/changelog                      |    5 +-
 debian/patches/libstdc++-doclink.diff |   19 +-
 debian/patches/svn-updates.diff       | 1405 ++++++++++++++++++++++++++++++++-
 debian/rules.patch                    |    1 +
 4 files changed, 1421 insertions(+), 9 deletions(-)

diff --git a/debian/changelog b/debian/changelog
index c475508..d4f89fc 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,8 +1,11 @@
 gcc-6 (6.2.0-2) UNRELEASED; urgency=medium
 
+  * Update to SVN 20160824 (r239726, 6.2.1) from the gcc-6-branch.
+    - Fix PR libstdc++/77334, PR tree-optimization/76783,
+      PR tree-optimization/72851, PR target/72867 (x86), PR middle-end/71700, 
   * Call default_file_start from s390_asm_file_start, taken from the trunk.
 
- -- Matthias Klose <doko at debian.org>  Wed, 24 Aug 2016 07:37:36 +0200
+ -- Matthias Klose <doko at debian.org>  Wed, 24 Aug 2016 08:07:34 +0200
 
 gcc-6 (6.2.0-1) unstable; urgency=medium
 
diff --git a/debian/patches/libstdc++-doclink.diff b/debian/patches/libstdc++-doclink.diff
index 30a8d31..c402fc9 100644
--- a/debian/patches/libstdc++-doclink.diff
+++ b/debian/patches/libstdc++-doclink.diff
@@ -47,9 +47,16 @@ Index: b/src/libstdc++-v3/doc/html/api.html
  </p><p>
 +<a class="link" href="user/index.html">The API documentation, rendered into HTML, can be viewed offline.</a>
 +</p><p>
-   The API documentation, rendered into HTML, can be viewed online:
- </p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>
-       <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-3.4/index.html" target="_top">for the 3.4 release
+   The API documentation, rendered into HTML, can be viewed online
+   <a class="link" href="http://gcc.gnu.org/onlinedocs/" target="_top">for each GCC release</a>
+   and
+@@ -38,4 +40,4 @@
+ </p><p>
+   In addition, a rendered set of man pages are available in the same
+   location specified above. Start with C++Intro(3).
+-</p></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="bk02.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="bk02.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="bk03.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top"> </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" val [...]
+\ No newline at end of file
++</p></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="bk02.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="bk02.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="bk03.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top"> </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" val [...]
 Index: b/src/libstdc++-v3/doc/xml/api.xml
 ===================================================================
 --- a/src/libstdc++-v3/doc/xml/api.xml
@@ -63,6 +70,6 @@ Index: b/src/libstdc++-v3/doc/xml/api.xml
 +</para>
 +
 +<para>
-   The API documentation, rendered into HTML, can be viewed online:
- </para>
- 
+   The API documentation, rendered into HTML, can be viewed online
+   <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/">for each GCC release</link>
+   and
diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff
index 50d8fae..32705c0 100644
--- a/debian/patches/svn-updates.diff
+++ b/debian/patches/svn-updates.diff
@@ -1,10 +1,10 @@
-# DP: updates from the 6 branch upto 201608xx (r239482).
+# DP: updates from the 6 branch upto 20160824 (r239726).
 
 last_update()
 {
 	cat > ${dir}LAST_UPDATED <EOF
 Mon Aug 15 17:27:59 CEST 2016
-Mon Aug 15 15:27:59 UTC 2016 (revision 239482)
+Mon Aug 15 15:27:59 UTC 2016 (revision 239726)
 EOF
 }
 
@@ -12,3 +12,1404 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_6_2_0_release svn://gcc.gnu.o
 	| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \
 	| awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0'
 
+Index: libstdc++-v3/doc/xml/api.xml
+===================================================================
+--- a/src/libstdc++-v3/doc/xml/api.xml	(.../tags/gcc_6_2_0_release)
++++ b/src/libstdc++-v3/doc/xml/api.xml	(.../branches/gcc-6-branch)
+@@ -40,79 +40,15 @@
+ </para>
+ 
+ <para>
+-  The API documentation, rendered into HTML, can be viewed online:
++  The API documentation, rendered into HTML, can be viewed online
++  <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/">for each GCC release</link>
++  and
++  <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/latest-doxygen/index.html">
++  for the main development tree
++  </link>
++  (see the date on the first page).
+ </para>
+ 
+-<itemizedlist>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-3.4/index.html">for the 3.4 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-4.1/index.html">for the 4.1 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-4.2/index.html">for the 4.2 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-4.3/index.html">for the 4.3 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-4.4/index.html">for the 4.4 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-api-4.5/index.html">for the 4.5 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-api-4.6/index.html">for the 4.6 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/gcc-4.7.4/libstdc++/api/">for the 4.7.4 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/gcc-4.8.3/libstdc++/api/">for the 4.8.3 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/gcc-4.9.0/libstdc++/api/">for the 4.9.0 release
+-      </link>
+-    </para>
+-  </listitem>
+-  <listitem>
+-    <para>
+-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://gcc.gnu.org/onlinedocs/libstdc++/latest-doxygen/index.html">"the latest collection"
+-      </link>
+-      (For the main development tree; see the date on the first page.)
+-    </para>
+-  </listitem>
+-</itemizedlist>
+-
+ <para>
+   The rendered HTML, as above, is also available for download on the
+   gcc.gnu.org site in a directory located at
+Index: libstdc++-v3/doc/html/api.html
+===================================================================
+--- a/src/libstdc++-v3/doc/html/api.html	(.../tags/gcc_6_2_0_release)
++++ b/src/libstdc++-v3/doc/html/api.html	(.../branches/gcc-6-branch)
+@@ -20,42 +20,14 @@
+   member functions for the library classes, finding out what is in a
+   particular include file, looking at inheritance diagrams, etc.
+ </p><p>
+-  The API documentation, rendered into HTML, can be viewed online:
+-</p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-3.4/index.html" target="_top">for the 3.4 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-4.1/index.html" target="_top">for the 4.1 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-4.2/index.html" target="_top">for the 4.2 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-4.3/index.html" target="_top">for the 4.3 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-4.4/index.html" target="_top">for the 4.4 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-api-4.5/index.html" target="_top">for the 4.5 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-api-4.6/index.html" target="_top">for the 4.6 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/gcc-4.7.4/libstdc++/api/" target="_top">for the 4.7.4 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/gcc-4.8.3/libstdc++/api/" target="_top">for the 4.8.3 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/gcc-4.9.0/libstdc++/api/" target="_top">for the 4.9.0 release
+-      </a>
+-    </p></li><li class="listitem"><p>
+-      <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/latest-doxygen/index.html" target="_top">"the latest collection"
+-      </a>
+-      (For the main development tree; see the date on the first page.)
+-    </p></li></ul></div><p>
++  The API documentation, rendered into HTML, can be viewed online
++  <a class="link" href="http://gcc.gnu.org/onlinedocs/" target="_top">for each GCC release</a>
++  and
++  <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/latest-doxygen/index.html" target="_top">
++  for the main development tree
++  </a>
++  (see the date on the first page).
++</p><p>
+   The rendered HTML, as above, is also available for download on the
+   gcc.gnu.org site in a directory located at
+    <code class="literal"><URL:ftp://gcc.gnu.org/pub/gcc/libstdc++/doxygen/></code>.
+Index: libstdc++-v3/include/bits/stl_iterator.h
+===================================================================
+--- a/src/libstdc++-v3/include/bits/stl_iterator.h	(.../tags/gcc_6_2_0_release)
++++ b/src/libstdc++-v3/include/bits/stl_iterator.h	(.../branches/gcc-6-branch)
+@@ -324,9 +324,16 @@
+     { return !(__x < __y); }
+ 
+   template<typename _Iterator>
++#if __cplusplus < 201103L
+     inline typename reverse_iterator<_Iterator>::difference_type
+     operator-(const reverse_iterator<_Iterator>& __x,
+ 	      const reverse_iterator<_Iterator>& __y)
++#else
++    inline auto
++    operator-(const reverse_iterator<_Iterator>& __x,
++	      const reverse_iterator<_Iterator>& __y)
++    -> decltype(__x.base() - __y.base())
++#endif
+     { return __y.base() - __x.base(); }
+ 
+   template<typename _Iterator>
+Index: libstdc++-v3/include/bits/stl_tree.h
+===================================================================
+--- a/src/libstdc++-v3/include/bits/stl_tree.h	(.../tags/gcc_6_2_0_release)
++++ b/src/libstdc++-v3/include/bits/stl_tree.h	(.../branches/gcc-6-branch)
+@@ -1264,6 +1264,15 @@
+       // which might result in a copy not a move.
+       void
+       _M_move_data(_Rb_tree&, std::false_type);
++
++      // Move assignment from container with equal allocator.
++      void
++      _M_move_assign(_Rb_tree&, std::true_type);
++
++      // Move assignment from container with possibly non-equal allocator,
++      // which might result in a copy not a move.
++      void
++      _M_move_assign(_Rb_tree&, std::false_type);
+ #endif
+     };
+ 
+@@ -1379,25 +1388,26 @@
+ 
+   template<typename _Key, typename _Val, typename _KeyOfValue,
+            typename _Compare, typename _Alloc>
+-    _Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>&
++    inline void
+     _Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>::
+-    operator=(_Rb_tree&& __x)
+-    noexcept(_Alloc_traits::_S_nothrow_move()
+-	     && is_nothrow_move_assignable<_Compare>::value)
++    _M_move_assign(_Rb_tree& __x, true_type)
+     {
+-      _M_impl._M_key_compare = __x._M_impl._M_key_compare;
+-      if (_Alloc_traits::_S_propagate_on_move_assign()
+-	  || _Alloc_traits::_S_always_equal()
+-	  || _M_get_Node_allocator() == __x._M_get_Node_allocator())
+-	{
+-	  clear();
+-	  if (__x._M_root() != nullptr)
+-	    _M_move_data(__x, std::true_type());
+-	  std::__alloc_on_move(_M_get_Node_allocator(),
+-			       __x._M_get_Node_allocator());
+-	  return *this;
+-	}
++      clear();
++      if (__x._M_root() != nullptr)
++	_M_move_data(__x, std::true_type());
++      std::__alloc_on_move(_M_get_Node_allocator(),
++			   __x._M_get_Node_allocator());
++    }
+ 
++  template<typename _Key, typename _Val, typename _KeyOfValue,
++           typename _Compare, typename _Alloc>
++    void
++    _Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>::
++    _M_move_assign(_Rb_tree& __x, false_type)
++    {
++      if (_M_get_Node_allocator() == __x._M_get_Node_allocator())
++	return _M_move_assign(__x, true_type{});
++
+       // Try to move each node reusing existing nodes and copying __x nodes
+       // structure.
+       _Reuse_or_alloc_node __roan(*this);
+@@ -1416,6 +1426,21 @@
+ 	  _M_impl._M_node_count = __x._M_impl._M_node_count;
+ 	  __x.clear();
+ 	}
++    }
++
++  template<typename _Key, typename _Val, typename _KeyOfValue,
++           typename _Compare, typename _Alloc>
++    inline _Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>&
++    _Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>::
++    operator=(_Rb_tree&& __x)
++    noexcept(_Alloc_traits::_S_nothrow_move()
++	     && is_nothrow_move_assignable<_Compare>::value)
++    {
++      _M_impl._M_key_compare = __x._M_impl._M_key_compare;
++      constexpr bool __move_storage =
++	  _Alloc_traits::_S_propagate_on_move_assign()
++	  || _Alloc_traits::_S_always_equal();
++      _M_move_assign(__x, __bool_constant<__move_storage>());
+       return *this;
+     }
+ 
+Index: libstdc++-v3/ChangeLog
+===================================================================
+--- a/src/libstdc++-v3/ChangeLog	(.../tags/gcc_6_2_0_release)
++++ b/src/libstdc++-v3/ChangeLog	(.../branches/gcc-6-branch)
+@@ -1,3 +1,23 @@
++2016-08-23  Jonathan Wakely  <jwakely at redhat.com>
++
++	* testsuite/23_containers/map/77334.cc: Use dg-options for C++11.
++
++2016-08-23  Jonathan Wakely  <jwakely at redhat.com>
++
++	PR libstdc++/77334
++	* include/bits/stl_tree.h (_Rb_tree::_M_move_assign): New functions.
++	(_Rb_tree::operator=(_Rb_tree&&)): Dispatch to _M_move_assign.
++	* testsuite/23_containers/map/77334.cc: New test.
++
++	* doc/xml/api.xml: Replace hardcoded links for specific versions with
++	link to docs for all releases.
++	* doc/html/*: Regenerate.
++
++	* include/bits/stl_iterator.h
++	(operator-(reverse_iterator<Iter>, reverse_iterator<Iter>): Constrain
++	for C++11 and later.
++	* testsuite/24_iterators/reverse_iterator/71771.cc: New test.
++
+ 2016-08-22  Release Manager
+ 
+ 	* GCC 6.2.0 released.
+Index: libstdc++-v3/testsuite/24_iterators/reverse_iterator/71771.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/24_iterators/reverse_iterator/71771.cc	(.../tags/gcc_6_2_0_release)
++++ b/src/libstdc++-v3/testsuite/24_iterators/reverse_iterator/71771.cc	(.../branches/gcc-6-branch)
+@@ -0,0 +1,43 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library.  This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3.  If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-do compile { target c++11 } }
++
++#include <iterator>
++#include <testsuite_iterators.h>
++
++// PR libstdc++/71771
++
++template<typename Iter>
++auto
++diff2(std::reverse_iterator<Iter> it1, std::reverse_iterator<Iter> it2)
++-> decltype(it1 - it2)
++{ return it1 - it2; }
++
++template<typename Iter>
++void
++diff2(Iter, Iter)
++{ }
++
++void
++test01()
++{
++  int i[2];
++  __gnu_test::test_container<int, __gnu_test::bidirectional_iterator_wrapper>
++    c(i);
++  diff2(std::rbegin(c), std::rend(c));
++}
+Index: libstdc++-v3/testsuite/23_containers/map/77334.cc
+===================================================================
+--- a/src/libstdc++-v3/testsuite/23_containers/map/77334.cc	(.../tags/gcc_6_2_0_release)
++++ b/src/libstdc++-v3/testsuite/23_containers/map/77334.cc	(.../branches/gcc-6-branch)
+@@ -0,0 +1,29 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library.  This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3.  If not see
++// <http://www.gnu.org/licenses/>.
++
++// { dg-options "-std=gnu++11" }
++// { dg-do compile }
++
++#include <map>
++
++struct A { A(A&&) = delete; };
++
++void test01()
++{
++   std::map<int, A> m1, m2;
++   m2 = std::move(m1);
++}
+Index: gcc/DATESTAMP
+===================================================================
+--- a/src/gcc/DATESTAMP	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/DATESTAMP	(.../branches/gcc-6-branch)
+@@ -1 +1 @@
+-20160822
++20160824
+Index: gcc/ChangeLog
+===================================================================
+--- a/src/gcc/ChangeLog	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/ChangeLog	(.../branches/gcc-6-branch)
+@@ -1,3 +1,70 @@
++2016-08-23  Richard Biener  <rguenther at suse.de>
++
++	Backport from mainline
++	2016-08-16  Richard Biener  <rguenther at suse.de>
++
++	PR tree-optimization/76783
++	* tree-ssa-propagate.c (ssa_prop_init): Use RPO order.  Clear
++	BB visited flags at start.
++
++	2016-08-12  Richard Biener  <rguenther at suse.de>
++
++	PR tree-optimization/72851
++	* tree-ssa-propagate.c: Include cfganal.h.  Rewrite block and stmt
++	worklists to use bitmaps indexed in execution order.
++	(executable_blocks, cfg_blocks_num, cfg_blocks_tail, cfg_blocks_head,
++	bb_in_list, interesting_ssa_edges, varying_ssa_edges): Remove.
++	(cfg_blocks): Make a bitmap.
++	(bb_to_cfg_order, cfg_order_to_bb, ssa_edge_worklist, uid_to_stmt):
++	New globals.
++	(cfg_blocks_empty_p): Adjust.
++	(cfg_blocks_add): Likewise.
++	(cfg_blocks_get): Likewise.
++	(add_ssa_edge): Likewise.
++	(add_control_edge): Likewise.
++	(simulate_stmt): Likewise.
++	(process_ssa_edge_worklist): Likewise.
++	(simulate_block): Likewise.
++	(ssa_prop_init): Compute PRE order and stmt UIDs.
++	(ssa_prop_fini): Adjust.
++	(ssa_propagate): Adjust.
++
++2016-08-22  Uros Bizjak  <ubizjak at gmail.com>
++
++	Backport from mainline
++	2016-08-15  Uros Bizjak  <ubizjak at gmail.com>
++
++	PR target/72867
++	* config/i386/sse.md (<code><mode>3<mask_name><round_saeonly_name>):
++	Emit ieee_<ieee_maxmin><mode>3<mask_name><round_saeonly_name>
++	for !flag_finite_math_only or flag_signed_zeros.
++	(*<code><mode>3<mask_name><round_saeonly_name>): Rename from
++	*<code><mode>3_finite<mask_name><round_saeonly_name>.  Do not
++	depend on flag_finite_math_only.
++	(ieee_<ieee_maxmin><mode>3<mask_name><round_saeonly_name>):
++	New insn pattern.
++	(*<code><mode>3<mask_name><round_saeonly_name>): Remove.
++	(*ieee_smin<mode>3): Ditto.
++	(*ieee_smax<mode>3): Ditto.
++	* config/i386/mmx.md (mmx_<code>v2sf3): Emit
++	mmx_ieee_<ieee_maxmin>v2sf3 for !flag_finite_math_only or
++	flag_signed_zeros.
++	(*mmx_<code>v2sf3): Rename from *mmx_<code>v2sf3_finite.  Do not
++	depend on flag_finite_math_only.
++	(mmx_ieee_<ieee_maxmin>v2sf3): New insn pattern.
++	(*mmx_<code>v2sf3): Remove.
++	* config/i386/subst.md (round_saeonly_mask_arg3): New subst attribute.
++	* config/i386/i386.c (ix86_expand_sse_fp_mimnax): Check
++	flag_signed_zeros instead of !flag_unsafe_math_optimizations.
++
++2016-08-22  Kyrylo Tkachov  <kyrylo.tkachov at arm.com>
++
++	Backport from mainline
++	2016-07-12  Kyrylo Tkachov  <kyrylo.tkachov at arm.com>
++
++	PR middle-end/71700
++	* expr.c (store_constructor): Mask sign-extended bits when widening
++	sub-word constructor element at the start of a word.
+ 2016-08-22  Release Manager
+ 
+ 	* GCC 6.2.0 released.
+Index: gcc/testsuite/gcc.target/i386/pr72867.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr72867.c	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr72867.c	(.../branches/gcc-6-branch)
+@@ -0,0 +1,23 @@
++/* PR target/72867 */
++/* { dg-do run } */
++/* { dg-options "-O2 -msse" } */
++/* { dg-require-effective-target sse } */
++
++#include "sse-check.h"
++#include <xmmintrin.h>
++
++static void
++sse_test (void)
++{
++  float nan = __builtin_nanf ("");
++  
++  __m128 x = _mm_min_ps(_mm_set1_ps(nan), _mm_set1_ps(1.0f));
++
++  if (x[0] != 1.0f)
++    abort ();
++
++  x = _mm_min_ps(_mm_set1_ps(1.f), _mm_set1_ps(nan));
++
++  if (!__builtin_isnan (x[0]))
++    abort ();
++}
+Index: gcc/testsuite/gcc.c-torture/execute/pr71700.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.c-torture/execute/pr71700.c	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr71700.c	(.../branches/gcc-6-branch)
+@@ -0,0 +1,19 @@
++struct S
++{
++  signed f0 : 16;
++  unsigned f1 : 1;
++};
++
++int b;
++static struct S c[] = {{-1, 0}, {-1, 0}};
++struct S d;
++
++int
++main ()
++{
++  struct S e = c[0];
++  d = e;
++  if (d.f1 != 0)
++    __builtin_abort ();
++  return 0;
++}
+Index: gcc/testsuite/gcc.dg/pr76783.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/pr76783.c	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gcc.dg/pr76783.c	(.../branches/gcc-6-branch)
+@@ -0,0 +1,28 @@
++/* { dg-do run } */
++/* { dg-require-effective-target int128 } */
++/* { dg-options "-Og -w -Wno-psabi" } */
++
++typedef unsigned __int128 u128;
++typedef unsigned __int128 v64u128 __attribute__ ((vector_size (64)));
++
++u128 __attribute__ ((noinline, noclone))
++foo (unsigned c, v64u128 v)
++{
++  v64u128 u;
++  if (c) {
++    u = (v64u128){(u128)0, (u128)0};
++  } else {
++    u = (v64u128){(u128)0, (u128)1};
++  }
++  u += v;
++  return u[1];
++}
++
++int
++main ()
++{
++  u128 x = foo (0, (v64u128){ });
++  if (x != 1)
++    __builtin_abort();
++  return 0;
++}
+Index: gcc/testsuite/gcc.dg/torture/pr72851.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/torture/pr72851.c	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gcc.dg/torture/pr72851.c	(.../branches/gcc-6-branch)
+@@ -0,0 +1,30 @@
++/* { dg-do compile } */
++
++typedef unsigned char uint8_t;
++typedef unsigned long int uint64_t;
++union unaligned_64 {
++    uint64_t l;
++}
++__attribute__((packed)) __attribute__((may_alias));
++typedef struct AVDES {
++    uint64_t round_keys[3][16];
++} AVDES;
++static const uint8_t PC1_shuffle[] = {
++    64-57,64-49,64-41,64-33,64-25,64-17,64-9,     64-1,64-58,64-50,64-42,64-34,64-26,64-18,     64-10,64-2,64-59,64-51,64-43,64-35,64-27,     64-19,64-11,64-3,64-60,64-52,64-44,64-36,     64-63,64-55,64-47,64-39,64-31,64-23,64-15,     64-7,64-62,64-54,64-46,64-38,64-30,64-22,     64-14,64-6,64-61,64-53,64-45,64-37,64-29,     64-21,64-13,64-5,64-28,64-20,64-12,64-4 };
++static const uint8_t PC2_shuffle[] = {
++    56-14,56-17,56-11,56-24,56-1,56-5,     56-3,56-28,56-15,56-6,56-21,56-10,     56-23,56-19,56-12,56-4,56-26,56-8,     56-16,56-7,56-27,56-20,56-13,56-2,     56-41,56-52,56-31,56-37,56-47,56-55,     56-30,56-40,56-51,56-45,56-33,56-48,     56-44,56-49,56-39,56-56,56-34,56-53,     56-46,56-42,56-50,56-36,56-29,56-32 };
++static uint64_t shuffle(uint64_t in, const uint8_t *shuffle, int shuffle_len)
++{
++  int i;
++  uint64_t res = 0;
++  for (i = 0; i < shuffle_len; i++)
++    res += res + ((in >> *shuffle++) & 1);
++  return res;
++}
++void gen_roundkeys(uint64_t K[16], uint64_t key)
++{
++  int i;
++  uint64_t CDn = shuffle(key, PC1_shuffle, sizeof(PC1_shuffle));
++  for (i = 0; i < 16; i++)
++    K[i] = shuffle(CDn, PC2_shuffle, sizeof(PC2_shuffle));
++}
+Index: gcc/testsuite/gcc.dg/tree-ssa/pr69270-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr69270-2.c	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr69270-2.c	(.../branches/gcc-6-branch)
+@@ -1,17 +1,9 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-dom3-details -w" } */
++/* { dg-options "-O2 -fdump-tree-dce2 -w" } */
+ 
+-/* There should be a reference to usecount that turn into
+-   constants.  */
+-/* { dg-final { scan-tree-dump-times "Replaced .usecount_\[0-9\]+. with constant .1." 1 "dom3"} } */
++/* The arithmetic using usecount should be gone.  */
++/* { dg-final { scan-tree-dump-times "usecount_\[0-9\]+ = usecount_\[0-9\]+ . 1;" 0 "dce2"} } */
+ 
+-/* And an assignment using usecount ought to fold down to constants.  */
+-/* { dg-final { scan-tree-dump-times "Folded to: usecount_\[0-9\]+ = 2;" 1 "dom3"} } */
+-
+-/* The arithmetic using usecount should be gone, except for the one in the
+-   details debugging.  */
+-/* { dg-final { scan-tree-dump-times "usecount_\[0-9\]+ = usecount_\[0-9\]+ . 1;" 1 "dom3"} } */
+-
+ typedef union tree_node *tree;
+ typedef union gimple_statement_d *gimple;
+ extern const int tree_code_type[];
+Index: gcc/testsuite/ChangeLog
+===================================================================
+--- a/src/gcc/testsuite/ChangeLog	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/ChangeLog	(.../branches/gcc-6-branch)
+@@ -1,3 +1,39 @@
++2016-08-23  Richard Biener  <rguenther at suse.de>
++
++	Backport from mainline
++	2016-08-16  Richard Biener  <rguenther at suse.de>
++
++	PR tree-optimization/76783
++	* gcc.dg/pr76783.c: New testcase.
++	* gcc.dg/tree-ssa/pr69270-2.c: Adjust.
++
++	2016-08-12  Richard Biener  <rguenther at suse.de>
++
++	PR tree-optimization/72851
++	* gcc.dg/torture/pr72851.c: New testcase.
++
++2016-08-22  Uros Bizjak  <ubizjak at gmail.com>
++
++	Backport from mainline
++	2016-08-16  Jakub Jelinek  <jakub at redhat.com>
++
++	PR target/72867
++	* gcc.target/i386/pr72867.c: Add -msse to dg-options.
++
++	Backport from mainline
++	2016-08-15  Uros Bizjak  <ubizjak at gmail.com>
++
++	PR target/72867
++	* gcc.target/i386/pr72867.c: New test.
++
++2016-08-22  Kyrylo Tkachov  <kyrylo.tkachov at arm.com>
++
++	Backport from mainline
++	2016-07-12  Kyrylo Tkachov  <kyrylo.tkachov at arm.com>
++
++	PR middle-end/71700
++	* gcc.c-torture/execute/pr71700.c: New test.
++
+ 2016-08-22  Release Manager
+ 
+ 	* GCC 6.2.0 released.
+Index: gcc/tree-ssa-propagate.c
+===================================================================
+--- a/src/gcc/tree-ssa-propagate.c	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/tree-ssa-propagate.c	(.../branches/gcc-6-branch)
+@@ -37,6 +37,7 @@
+ #include "domwalk.h"
+ #include "cfgloop.h"
+ #include "tree-cfgcleanup.h"
++#include "cfganal.h"
+ 
+ /* This file implements a generic value propagation engine based on
+    the same propagation used by the SSA-CCP algorithm [1].
+@@ -83,14 +84,9 @@
+ 	    Blocks are added to this list if their incoming edges are
+ 	    found executable.
+ 
+-	VARYING_SSA_EDGES contains the list of statements that feed
+-	    from statements that produce an SSA_PROP_VARYING result.
+-	    These are simulated first to speed up processing.
++	SSA_EDGE_WORKLIST contains the list of statements that we 
++	    need to revisit.
+ 
+-	INTERESTING_SSA_EDGES contains the list of statements that
+-	    feed from statements that produce an SSA_PROP_INTERESTING
+-	    result.
+-
+    5- Simulation terminates when all three work lists are drained.
+ 
+    Before calling ssa_propagate, it is important to clear
+@@ -116,109 +112,38 @@
+ static ssa_prop_visit_stmt_fn ssa_prop_visit_stmt;
+ static ssa_prop_visit_phi_fn ssa_prop_visit_phi;
+ 
+-/* Keep track of statements that have been added to one of the SSA
+-   edges worklists.  This flag is used to avoid visiting statements
+-   unnecessarily when draining an SSA edge worklist.  If while
+-   simulating a basic block, we find a statement with
+-   STMT_IN_SSA_EDGE_WORKLIST set, we clear it to prevent SSA edge
+-   processing from visiting it again.
++/* Worklist of control flow edge destinations.  This contains
++   the CFG order number of the blocks so we can iterate in CFG
++   order by visiting in bit-order.  */
++static bitmap cfg_blocks;
++static int *bb_to_cfg_order;
++static int *cfg_order_to_bb;
+ 
+-   NOTE: users of the propagation engine are not allowed to use
+-   the GF_PLF_1 flag.  */
+-#define STMT_IN_SSA_EDGE_WORKLIST	GF_PLF_1
+-
+-/* A bitmap to keep track of executable blocks in the CFG.  */
+-static sbitmap executable_blocks;
+-
+-/* Array of control flow edges on the worklist.  */
+-static vec<basic_block> cfg_blocks;
+-
+-static unsigned int cfg_blocks_num = 0;
+-static int cfg_blocks_tail;
+-static int cfg_blocks_head;
+-
+-static sbitmap bb_in_list;
+-
+ /* Worklist of SSA edges which will need reexamination as their
+    definition has changed.  SSA edges are def-use edges in the SSA
+    web.  For each D-U edge, we store the target statement or PHI node
+-   U.  */
+-static vec<gimple *> interesting_ssa_edges;
++   UID in a bitmap.  UIDs order stmts in execution order.   */
++static bitmap ssa_edge_worklist;
++static vec<gimple *> uid_to_stmt;
+ 
+-/* Identical to INTERESTING_SSA_EDGES.  For performance reasons, the
+-   list of SSA edges is split into two.  One contains all SSA edges
+-   who need to be reexamined because their lattice value changed to
+-   varying (this worklist), and the other contains all other SSA edges
+-   to be reexamined (INTERESTING_SSA_EDGES).
+-
+-   Since most values in the program are VARYING, the ideal situation
+-   is to move them to that lattice value as quickly as possible.
+-   Thus, it doesn't make sense to process any other type of lattice
+-   value until all VARYING values are propagated fully, which is one
+-   thing using the VARYING worklist achieves.  In addition, if we
+-   don't use a separate worklist for VARYING edges, we end up with
+-   situations where lattice values move from
+-   UNDEFINED->INTERESTING->VARYING instead of UNDEFINED->VARYING.  */
+-static vec<gimple *> varying_ssa_edges;
+-
+-
+ /* Return true if the block worklist empty.  */
+ 
+ static inline bool
+ cfg_blocks_empty_p (void)
+ {
+-  return (cfg_blocks_num == 0);
++  return bitmap_empty_p (cfg_blocks);
+ }
+ 
+ 
+-/* Add a basic block to the worklist.  The block must not be already
+-   in the worklist, and it must not be the ENTRY or EXIT block.  */
++/* Add a basic block to the worklist.  The block must not be the ENTRY
++   or EXIT block.  */
+ 
+ static void
+ cfg_blocks_add (basic_block bb)
+ {
+-  bool head = false;
+-
+   gcc_assert (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun)
+ 	      && bb != EXIT_BLOCK_PTR_FOR_FN (cfun));
+-  gcc_assert (!bitmap_bit_p (bb_in_list, bb->index));
+-
+-  if (cfg_blocks_empty_p ())
+-    {
+-      cfg_blocks_tail = cfg_blocks_head = 0;
+-      cfg_blocks_num = 1;
+-    }
+-  else
+-    {
+-      cfg_blocks_num++;
+-      if (cfg_blocks_num > cfg_blocks.length ())
+-	{
+-	  /* We have to grow the array now.  Adjust to queue to occupy
+-	     the full space of the original array.  We do not need to
+-	     initialize the newly allocated portion of the array
+-	     because we keep track of CFG_BLOCKS_HEAD and
+-	     CFG_BLOCKS_HEAD.  */
+-	  cfg_blocks_tail = cfg_blocks.length ();
+-	  cfg_blocks_head = 0;
+-	  cfg_blocks.safe_grow (2 * cfg_blocks_tail);
+-	}
+-      /* Minor optimization: we prefer to see blocks with more
+-	 predecessors later, because there is more of a chance that
+-	 the incoming edges will be executable.  */
+-      else if (EDGE_COUNT (bb->preds)
+-	       >= EDGE_COUNT (cfg_blocks[cfg_blocks_head]->preds))
+-	cfg_blocks_tail = ((cfg_blocks_tail + 1) % cfg_blocks.length ());
+-      else
+-	{
+-	  if (cfg_blocks_head == 0)
+-	    cfg_blocks_head = cfg_blocks.length ();
+-	  --cfg_blocks_head;
+-	  head = true;
+-	}
+-    }
+-
+-  cfg_blocks[head ? cfg_blocks_head : cfg_blocks_tail] = bb;
+-  bitmap_set_bit (bb_in_list, bb->index);
++  bitmap_set_bit (cfg_blocks, bb_to_cfg_order[bb->index]);
+ }
+ 
+ 
+@@ -227,18 +152,10 @@
+ static basic_block
+ cfg_blocks_get (void)
+ {
+-  basic_block bb;
+-
+-  bb = cfg_blocks[cfg_blocks_head];
+-
+   gcc_assert (!cfg_blocks_empty_p ());
+-  gcc_assert (bb);
+-
+-  cfg_blocks_head = ((cfg_blocks_head + 1) % cfg_blocks.length ());
+-  --cfg_blocks_num;
+-  bitmap_clear_bit (bb_in_list, bb->index);
+-
+-  return bb;
++  int order_index = bitmap_first_set_bit (cfg_blocks);
++  bitmap_clear_bit (cfg_blocks, order_index);
++  return BASIC_BLOCK_FOR_FN (cfun, cfg_order_to_bb [order_index]);
+ }
+ 
+ 
+@@ -247,7 +164,7 @@
+    them to INTERESTING_SSA_EDGES.  */
+ 
+ static void
+-add_ssa_edge (tree var, bool is_varying)
++add_ssa_edge (tree var)
+ {
+   imm_use_iterator iter;
+   use_operand_p use_p;
+@@ -256,28 +173,20 @@
+     {
+       gimple *use_stmt = USE_STMT (use_p);
+ 
++      /* If we did not yet simulate the block wait for this to happen
++         and do not add the stmt to the SSA edge worklist.  */
++      if (! (gimple_bb (use_stmt)->flags & BB_VISITED))
++	continue;
++
+       if (prop_simulate_again_p (use_stmt)
+-	  && !gimple_plf (use_stmt, STMT_IN_SSA_EDGE_WORKLIST))
++	  && bitmap_set_bit (ssa_edge_worklist, gimple_uid (use_stmt)))
+ 	{
+-	  gimple_set_plf (use_stmt, STMT_IN_SSA_EDGE_WORKLIST, true);
+-	  if (is_varying)
++	  uid_to_stmt[gimple_uid (use_stmt)] = use_stmt;
++	  if (dump_file && (dump_flags & TDF_DETAILS))
+ 	    {
+-	      if (dump_file && (dump_flags & TDF_DETAILS))
+-		{
+-		  fprintf (dump_file, "varying_ssa_edges: adding SSA use in ");
+-		  print_gimple_stmt (dump_file, use_stmt, 0, TDF_SLIM);
+-		}
+-	      varying_ssa_edges.safe_push (use_stmt);
++	      fprintf (dump_file, "ssa_edge_worklist: adding SSA use in ");
++	      print_gimple_stmt (dump_file, use_stmt, 0, TDF_SLIM);
+ 	    }
+-	  else
+-	    {
+-	      if (dump_file && (dump_flags & TDF_DETAILS))
+-		{
+-		  fprintf (dump_file, "interesting_ssa_edges: adding SSA use in ");
+-		  print_gimple_stmt (dump_file, use_stmt, 0, TDF_SLIM);
+-		}
+-	      interesting_ssa_edges.safe_push (use_stmt);
+-	    }
+ 	}
+     }
+ }
+@@ -298,10 +207,6 @@
+ 
+   e->flags |= EDGE_EXECUTABLE;
+ 
+-  /* If the block is already in the list, we're done.  */
+-  if (bitmap_bit_p (bb_in_list, bb->index))
+-    return;
+-
+   cfg_blocks_add (bb);
+ 
+   if (dump_file && (dump_flags & TDF_DETAILS))
+@@ -319,6 +224,9 @@
+   edge taken_edge = NULL;
+   tree output_name = NULL_TREE;
+ 
++  /* Pull the stmt off the SSA edge worklist.  */
++  bitmap_clear_bit (ssa_edge_worklist, gimple_uid (stmt));
++
+   /* Don't bother visiting statements that are already
+      considered varying by the propagator.  */
+   if (!prop_simulate_again_p (stmt))
+@@ -339,7 +247,7 @@
+       /* If the statement produced a new varying value, add the SSA
+ 	 edges coming out of OUTPUT_NAME.  */
+       if (output_name)
+-	add_ssa_edge (output_name, true);
++	add_ssa_edge (output_name);
+ 
+       /* If STMT transfers control out of its basic block, add
+ 	 all outgoing edges to the work list.  */
+@@ -358,7 +266,7 @@
+       /* If the statement produced new value, add the SSA edges coming
+ 	 out of OUTPUT_NAME.  */
+       if (output_name)
+-	add_ssa_edge (output_name, false);
++	add_ssa_edge (output_name);
+ 
+       /* If we know which edge is going to be taken out of this block,
+ 	 add it to the CFG work list.  */
+@@ -413,54 +321,24 @@
+    when an SSA edge is added to it in simulate_stmt.  Return true if a stmt
+    was simulated.  */
+ 
+-static bool 
+-process_ssa_edge_worklist (vec<gimple *> *worklist, const char *edge_list_name)
++static void
++process_ssa_edge_worklist ()
+ {
+   /* Process the next entry from the worklist.  */
+-  while (worklist->length () > 0)
+-    {
+-      basic_block bb;
++  unsigned stmt_uid = bitmap_first_set_bit (ssa_edge_worklist);
++  bitmap_clear_bit (ssa_edge_worklist, stmt_uid);
++  gimple *stmt = uid_to_stmt[stmt_uid];
+ 
+-      /* Pull the statement to simulate off the worklist.  */
+-      gimple *stmt = worklist->pop ();
++  /* We should not have stmts in not yet simulated BBs on the worklist.  */
++  gcc_assert (gimple_bb (stmt)->flags & BB_VISITED);
+ 
+-      /* If this statement was already visited by simulate_block, then
+-	 we don't need to visit it again here.  */
+-      if (!gimple_plf (stmt, STMT_IN_SSA_EDGE_WORKLIST))
+-	continue;
+-
+-      /* STMT is no longer in a worklist.  */
+-      gimple_set_plf (stmt, STMT_IN_SSA_EDGE_WORKLIST, false);
+-
+-      bb = gimple_bb (stmt);
+-
+-      /* Visit the statement only if its block is marked executable.
+-         If it is not executable then it will be visited when we simulate
+-	 all statements in the block as soon as an incoming edge gets
+-	 marked executable.  */
+-      if (!bitmap_bit_p (executable_blocks, bb->index))
+-	{
+-	  if (dump_file && (dump_flags & TDF_DETAILS))
+-	    {
+-	      fprintf (dump_file, "\nDropping statement from SSA worklist: ");
+-	      print_gimple_stmt (dump_file, stmt, 0, dump_flags);
+-	    }
+-	  continue;
+-	}
+-
+-      if (dump_file && (dump_flags & TDF_DETAILS))
+-	{
+-	  fprintf (dump_file, "\nSimulating statement (from %s): ",
+-		   edge_list_name);
+-	  print_gimple_stmt (dump_file, stmt, 0, dump_flags);
+-	}
+-
+-      simulate_stmt (stmt);
+-
+-      return true;
++  if (dump_file && (dump_flags & TDF_DETAILS))
++    {
++      fprintf (dump_file, "\nSimulating statement: ");
++      print_gimple_stmt (dump_file, stmt, 0, dump_flags);
+     }
+ 
+-  return false;
++  simulate_stmt (stmt);
+ }
+ 
+ 
+@@ -486,7 +364,7 @@
+ 
+   /* If this is the first time we've simulated this block, then we
+      must simulate each of its statements.  */
+-  if (!bitmap_bit_p (executable_blocks, block->index))
++  if (! (block->flags & BB_VISITED))
+     {
+       gimple_stmt_iterator j;
+       unsigned int normal_edge_count;
+@@ -493,24 +371,12 @@
+       edge e, normal_edge;
+       edge_iterator ei;
+ 
+-      /* Note that we have simulated this block.  */
+-      bitmap_set_bit (executable_blocks, block->index);
+-
+       for (j = gsi_start_bb (block); !gsi_end_p (j); gsi_next (&j))
+-	{
+-	  gimple *stmt = gsi_stmt (j);
++	simulate_stmt (gsi_stmt (j));
+ 
+-	  /* If this statement is already in the worklist then
+-	     "cancel" it.  The reevaluation implied by the worklist
+-	     entry will produce the same value we generate here and
+-	     thus reevaluating it again from the worklist is
+-	     pointless.  */
+-	  if (gimple_plf (stmt, STMT_IN_SSA_EDGE_WORKLIST))
+-	    gimple_set_plf (stmt, STMT_IN_SSA_EDGE_WORKLIST, false);
++      /* Note that we have simulated this block.  */
++      block->flags |= BB_VISITED;
+ 
+-	  simulate_stmt (stmt);
+-	}
+-
+       /* We can not predict when abnormal and EH edges will be executed, so
+ 	 once a block is considered executable, we consider any
+ 	 outgoing abnormal edges as executable.
+@@ -551,41 +417,55 @@
+   basic_block bb;
+ 
+   /* Worklists of SSA edges.  */
+-  interesting_ssa_edges.create (20);
+-  varying_ssa_edges.create (20);
++  ssa_edge_worklist = BITMAP_ALLOC (NULL);
+ 
+-  executable_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun));
+-  bitmap_clear (executable_blocks);
++  /* Worklist of basic-blocks.  */
++  bb_to_cfg_order = XNEWVEC (int, last_basic_block_for_fn (cfun) + 1);
++  cfg_order_to_bb = XNEWVEC (int, n_basic_blocks_for_fn (cfun));
++  int n = pre_and_rev_post_order_compute_fn (cfun, NULL,
++					     cfg_order_to_bb, false);
++  for (int i = 0; i < n; ++i)
++    bb_to_cfg_order[cfg_order_to_bb[i]] = i;
++  cfg_blocks = BITMAP_ALLOC (NULL);
+ 
+-  bb_in_list = sbitmap_alloc (last_basic_block_for_fn (cfun));
+-  bitmap_clear (bb_in_list);
+-
+   if (dump_file && (dump_flags & TDF_DETAILS))
+     dump_immediate_uses (dump_file);
+ 
+-  cfg_blocks.create (20);
+-  cfg_blocks.safe_grow_cleared (20);
+-
+   /* Initially assume that every edge in the CFG is not executable.
+-     (including the edges coming out of the entry block).  */
+-  FOR_ALL_BB_FN (bb, cfun)
++     (including the edges coming out of the entry block).  Mark blocks
++     as not visited, blocks not yet visited will have all their statements
++     simulated once an incoming edge gets executable.  */
++  set_gimple_stmt_max_uid (cfun, 0);
++  for (int i = 0; i < n; ++i)
+     {
+       gimple_stmt_iterator si;
++      bb = BASIC_BLOCK_FOR_FN (cfun, cfg_order_to_bb[i]);
+ 
++      for (si = gsi_start_phis (bb); !gsi_end_p (si); gsi_next (&si))
++	{
++	  gimple *stmt = gsi_stmt (si);
++	  gimple_set_uid (stmt, inc_gimple_stmt_max_uid (cfun));
++	}
++
+       for (si = gsi_start_bb (bb); !gsi_end_p (si); gsi_next (&si))
+-	gimple_set_plf (gsi_stmt (si), STMT_IN_SSA_EDGE_WORKLIST, false);
++	{
++	  gimple *stmt = gsi_stmt (si);
++	  gimple_set_uid (stmt, inc_gimple_stmt_max_uid (cfun));
++	}
+ 
+-      for (si = gsi_start_phis (bb); !gsi_end_p (si); gsi_next (&si))
+-	gimple_set_plf (gsi_stmt (si), STMT_IN_SSA_EDGE_WORKLIST, false);
+-
++      bb->flags &= ~BB_VISITED;
+       FOR_EACH_EDGE (e, ei, bb->succs)
+ 	e->flags &= ~EDGE_EXECUTABLE;
+     }
++  uid_to_stmt.safe_grow (gimple_stmt_max_uid (cfun));
+ 
+   /* Seed the algorithm by adding the successors of the entry block to the
+      edge worklist.  */
+   FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
+-    add_control_edge (e);
++    {
++      e->flags &= ~EDGE_EXECUTABLE;
++      add_control_edge (e);
++    }
+ }
+ 
+ 
+@@ -594,11 +474,14 @@
+ static void
+ ssa_prop_fini (void)
+ {
+-  interesting_ssa_edges.release ();
+-  varying_ssa_edges.release ();
+-  cfg_blocks.release ();
+-  sbitmap_free (bb_in_list);
+-  sbitmap_free (executable_blocks);
++  BITMAP_FREE (cfg_blocks);
++  free (bb_to_cfg_order);
++  free (cfg_order_to_bb);
++  BITMAP_FREE (ssa_edge_worklist);
++  uid_to_stmt.release ();
++  basic_block bb;
++  FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR_FOR_FN (cfun), NULL, next_bb)
++    bb->flags &= ~BB_VISITED;
+ }
+ 
+ 
+@@ -917,11 +800,11 @@
+   ssa_prop_init ();
+ 
+   /* Iterate until the worklists are empty.  */
+-  while (!cfg_blocks_empty_p ()
+-	 || interesting_ssa_edges.length () > 0
+-	 || varying_ssa_edges.length () > 0)
++  while (! cfg_blocks_empty_p ()
++	 || ! bitmap_empty_p (ssa_edge_worklist))
+     {
+-      if (!cfg_blocks_empty_p ())
++      /* First simulate whole blocks.  */
++      if (! cfg_blocks_empty_p ())
+ 	{
+ 	  /* Pull the next block to simulate off the worklist.  */
+ 	  basic_block dest_block = cfg_blocks_get ();
+@@ -929,14 +812,8 @@
+ 	  continue;
+ 	}
+ 
+-      /* In order to move things to varying as quickly as
+-	 possible,process the VARYING_SSA_EDGES worklist first.  */
+-      if (process_ssa_edge_worklist (&varying_ssa_edges, "varying_ssa_edges"))
+-	continue;
+-
+-      /* Now process the INTERESTING_SSA_EDGES worklist.  */
+-      process_ssa_edge_worklist (&interesting_ssa_edges,
+-				 "interesting_ssa_edges");
++      /* Then simulate from the SSA edge worklist.  */
++      process_ssa_edge_worklist ();
+     }
+ 
+   ssa_prop_fini ();
+Index: gcc/expr.c
+===================================================================
+--- a/src/gcc/expr.c	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/expr.c	(.../branches/gcc-6-branch)
+@@ -6139,6 +6139,13 @@
+ 		    type = lang_hooks.types.type_for_mode
+ 		      (word_mode, TYPE_UNSIGNED (type));
+ 		    value = fold_convert (type, value);
++		    /* Make sure the bits beyond the original bitsize are zero
++		       so that we can correctly avoid extra zeroing stores in
++		       later constructor elements.  */
++		    tree bitsize_mask
++		      = wide_int_to_tree (type, wi::mask (bitsize, false,
++							   BITS_PER_WORD));
++		    value = fold_build2 (BIT_AND_EXPR, type, value, bitsize_mask);
+ 		  }
+ 
+ 		if (BYTES_BIG_ENDIAN)
+Index: gcc/config/i386/i386.md
+===================================================================
+--- a/src/gcc/config/i386/i386.md	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/config/i386/i386.md	(.../branches/gcc-6-branch)
+@@ -886,6 +886,14 @@
+ 			      (umax "maxu") (umin "minu")])
+ (define_code_attr maxmin_float [(smax "max") (smin "min")])
+ 
++(define_int_iterator IEEE_MAXMIN
++	[UNSPEC_IEEE_MAX
++	 UNSPEC_IEEE_MIN])
++
++(define_int_attr ieee_maxmin
++	[(UNSPEC_IEEE_MAX "max")
++	 (UNSPEC_IEEE_MIN "min")])
++
+ ;; Mapping of logic operators
+ (define_code_iterator any_logic [and ior xor])
+ (define_code_iterator any_or [ior xor])
+@@ -17383,14 +17391,6 @@
+ ;; Their operands are not commutative, and thus they may be used in the
+ ;; presence of -0.0 and NaN.
+ 
+-(define_int_iterator IEEE_MAXMIN
+-	[UNSPEC_IEEE_MAX
+-	 UNSPEC_IEEE_MIN])
+-
+-(define_int_attr ieee_maxmin
+-	[(UNSPEC_IEEE_MAX "max")
+-	 (UNSPEC_IEEE_MIN "min")])
+-
+ (define_insn "*ieee_s<ieee_maxmin><mode>3"
+   [(set (match_operand:MODEF 0 "register_operand" "=x,v")
+ 	(unspec:MODEF
+Index: gcc/config/i386/mmx.md
+===================================================================
+--- a/src/gcc/config/i386/mmx.md	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/config/i386/mmx.md	(.../branches/gcc-6-branch)
+@@ -296,10 +296,6 @@
+    (set_attr "prefix_extra" "1")
+    (set_attr "mode" "V2SF")])
+ 
+-;; ??? For !flag_finite_math_only, the representation with SMIN/SMAX
+-;; isn't really correct, as those rtl operators aren't defined when
+-;; applied to NaNs.  Hopefully the optimizers won't get too smart on us.
+-
+ (define_expand "mmx_<code>v2sf3"
+   [(set (match_operand:V2SF 0 "register_operand")
+         (smaxmin:V2SF
+@@ -307,30 +303,47 @@
+ 	  (match_operand:V2SF 2 "nonimmediate_operand")))]
+   "TARGET_3DNOW"
+ {
+-  if (!flag_finite_math_only)
+-    operands[1] = force_reg (V2SFmode, operands[1]);
+-  ix86_fixup_binary_operands_no_copy (<CODE>, V2SFmode, operands);
++  if (!flag_finite_math_only || flag_signed_zeros)
++    {
++      operands[1] = force_reg (V2SFmode, operands[1]);
++      emit_insn (gen_mmx_ieee_<maxmin_float>v2sf3
++		 (operands[0], operands[1], operands[2]));
++      DONE;
++    }
++  else
++    ix86_fixup_binary_operands_no_copy (<CODE>, V2SFmode, operands);
+ })
+ 
+-(define_insn "*mmx_<code>v2sf3_finite"
++;; These versions of the min/max patterns are intentionally ignorant of
++;; their behavior wrt -0.0 and NaN (via the commutative operand mark).
++;; Since both the tree-level MAX_EXPR and the rtl-level SMAX operator
++;; are undefined in this condition, we're certain this is correct.
++
++(define_insn "*mmx_<code>v2sf3"
+   [(set (match_operand:V2SF 0 "register_operand" "=y")
+         (smaxmin:V2SF
+ 	  (match_operand:V2SF 1 "nonimmediate_operand" "%0")
+ 	  (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
+-  "TARGET_3DNOW && flag_finite_math_only
+-   && ix86_binary_operator_ok (<CODE>, V2SFmode, operands)"
++  "TARGET_3DNOW && ix86_binary_operator_ok (<CODE>, V2SFmode, operands)"
+   "pf<maxmin_float>\t{%2, %0|%0, %2}"
+   [(set_attr "type" "mmxadd")
+    (set_attr "prefix_extra" "1")
+    (set_attr "mode" "V2SF")])
+ 
+-(define_insn "*mmx_<code>v2sf3"
++;; These versions of the min/max patterns implement exactly the operations
++;;   min = (op1 < op2 ? op1 : op2)
++;;   max = (!(op1 < op2) ? op1 : op2)
++;; Their operands are not commutative, and thus they may be used in the
++;; presence of -0.0 and NaN.
++
++(define_insn "mmx_ieee_<ieee_maxmin>v2sf3"
+   [(set (match_operand:V2SF 0 "register_operand" "=y")
+-        (smaxmin:V2SF
+-	  (match_operand:V2SF 1 "register_operand" "0")
+-	  (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
++        (unspec:V2SF
++	  [(match_operand:V2SF 1 "register_operand" "0")
++	   (match_operand:V2SF 2 "nonimmediate_operand" "ym")]
++	  IEEE_MAXMIN))]
+   "TARGET_3DNOW"
+-  "pf<maxmin_float>\t{%2, %0|%0, %2}"
++  "pf<ieee_maxmin>\t{%2, %0|%0, %2}"
+   [(set_attr "type" "mmxadd")
+    (set_attr "prefix_extra" "1")
+    (set_attr "mode" "V2SF")])
+Index: gcc/config/i386/sse.md
+===================================================================
+--- a/src/gcc/config/i386/sse.md	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/config/i386/sse.md	(.../branches/gcc-6-branch)
+@@ -1945,10 +1945,6 @@
+    (set_attr "prefix" "orig,vex")
+    (set_attr "mode" "SF")])
+ 
+-;; ??? For !flag_finite_math_only, the representation with SMIN/SMAX
+-;; isn't really correct, as those rtl operators aren't defined when
+-;; applied to NaNs.  Hopefully the optimizers won't get too smart on us.
+-
+ (define_expand "<code><mode>3<mask_name><round_saeonly_name>"
+   [(set (match_operand:VF 0 "register_operand")
+ 	(smaxmin:VF
+@@ -1956,18 +1952,30 @@
+ 	  (match_operand:VF 2 "<round_saeonly_nimm_predicate>")))]
+   "TARGET_SSE && <mask_mode512bit_condition> && <round_saeonly_mode512bit_condition>"
+ {
+-  if (!flag_finite_math_only)
+-    operands[1] = force_reg (<MODE>mode, operands[1]);
+-  ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);
++  if (!flag_finite_math_only || flag_signed_zeros)
++    {
++      operands[1] = force_reg (<MODE>mode, operands[1]);
++      emit_insn (gen_ieee_<maxmin_float><mode>3<mask_name><round_saeonly_name>
++		 (operands[0], operands[1], operands[2]
++		  <mask_operand_arg34>
++		  <round_saeonly_mask_arg3>));
++      DONE;
++    }
++  else
++    ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);
+ })
+ 
+-(define_insn "*<code><mode>3_finite<mask_name><round_saeonly_name>"
++;; These versions of the min/max patterns are intentionally ignorant of
++;; their behavior wrt -0.0 and NaN (via the commutative operand mark).
++;; Since both the tree-level MAX_EXPR and the rtl-level SMAX operator
++;; are undefined in this condition, we're certain this is correct.
++
++(define_insn "*<code><mode>3<mask_name><round_saeonly_name>"
+   [(set (match_operand:VF 0 "register_operand" "=x,v")
+ 	(smaxmin:VF
+ 	  (match_operand:VF 1 "<round_saeonly_nimm_predicate>" "%0,v")
+ 	  (match_operand:VF 2 "<round_saeonly_nimm_predicate>" "xBm,<round_saeonly_constraint>")))]
+-  "TARGET_SSE && flag_finite_math_only
+-   && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
++  "TARGET_SSE && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
+    && <mask_mode512bit_condition> && <round_saeonly_mode512bit_condition>"
+   "@
+    <maxmin_float><ssemodesuffix>\t{%2, %0|%0, %2}
+@@ -1978,16 +1986,23 @@
+    (set_attr "prefix" "<mask_prefix3>")
+    (set_attr "mode" "<MODE>")])
+ 
+-(define_insn "*<code><mode>3<mask_name><round_saeonly_name>"
++;; These versions of the min/max patterns implement exactly the operations
++;;   min = (op1 < op2 ? op1 : op2)
++;;   max = (!(op1 < op2) ? op1 : op2)
++;; Their operands are not commutative, and thus they may be used in the
++;; presence of -0.0 and NaN.
++
++(define_insn "ieee_<ieee_maxmin><mode>3<mask_name><round_saeonly_name>"
+   [(set (match_operand:VF 0 "register_operand" "=x,v")
+-	(smaxmin:VF
+-	  (match_operand:VF 1 "register_operand" "0,v")
+-	  (match_operand:VF 2 "<round_saeonly_nimm_predicate>" "xBm,<round_saeonly_constraint>")))]
+-  "TARGET_SSE && !flag_finite_math_only
++	(unspec:VF
++	  [(match_operand:VF 1 "register_operand" "0,v")
++	   (match_operand:VF 2 "<round_saeonly_nimm_predicate>" "xBm,<round_saeonly_constraint>")]
++	  IEEE_MAXMIN))]
++  "TARGET_SSE
+    && <mask_mode512bit_condition> && <round_saeonly_mode512bit_condition>"
+   "@
+-   <maxmin_float><ssemodesuffix>\t{%2, %0|%0, %2}
+-   v<maxmin_float><ssemodesuffix>\t{<round_saeonly_mask_op3>%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2<round_saeonly_mask_op3>}"
++   <ieee_maxmin><ssemodesuffix>\t{%2, %0|%0, %2}
++   v<ieee_maxmin><ssemodesuffix>\t{<round_saeonly_mask_op3>%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2<round_saeonly_mask_op3>}"
+   [(set_attr "isa" "noavx,avx")
+    (set_attr "type" "sseadd")
+    (set_attr "btver2_sse_attr" "maxmin")
+@@ -2012,42 +2027,6 @@
+    (set_attr "prefix" "<round_saeonly_prefix>")
+    (set_attr "mode" "<ssescalarmode>")])
+ 
+-;; These versions of the min/max patterns implement exactly the operations
+-;;   min = (op1 < op2 ? op1 : op2)
+-;;   max = (!(op1 < op2) ? op1 : op2)
+-;; Their operands are not commutative, and thus they may be used in the
+-;; presence of -0.0 and NaN.
+-
+-(define_insn "*ieee_smin<mode>3"
+-  [(set (match_operand:VF 0 "register_operand" "=x,v")
+-	(unspec:VF
+-	  [(match_operand:VF 1 "register_operand" "0,v")
+-	   (match_operand:VF 2 "vector_operand" "xBm,vm")]
+-	 UNSPEC_IEEE_MIN))]
+-  "TARGET_SSE"
+-  "@
+-   min<ssemodesuffix>\t{%2, %0|%0, %2}
+-   vmin<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+-  [(set_attr "isa" "noavx,avx")
+-   (set_attr "type" "sseadd")
+-   (set_attr "prefix" "orig,vex")
+-   (set_attr "mode" "<MODE>")])
+-
+-(define_insn "*ieee_smax<mode>3"
+-  [(set (match_operand:VF 0 "register_operand" "=x,v")
+-	(unspec:VF
+-	  [(match_operand:VF 1 "register_operand" "0,v")
+-	   (match_operand:VF 2 "vector_operand" "xBm,vm")]
+-	 UNSPEC_IEEE_MAX))]
+-  "TARGET_SSE"
+-  "@
+-   max<ssemodesuffix>\t{%2, %0|%0, %2}
+-   vmax<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+-  [(set_attr "isa" "noavx,avx")
+-   (set_attr "type" "sseadd")
+-   (set_attr "prefix" "orig,vex")
+-   (set_attr "mode" "<MODE>")])
+-
+ (define_insn "avx_addsubv4df3"
+   [(set (match_operand:V4DF 0 "register_operand" "=x")
+ 	(vec_merge:V4DF
+Index: gcc/config/i386/subst.md
+===================================================================
+--- a/src/gcc/config/i386/subst.md	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/config/i386/subst.md	(.../branches/gcc-6-branch)
+@@ -161,6 +161,7 @@
+ (define_subst_attr "round_saeonly_mask_op4" "round_saeonly" "" "<round_saeonly_mask_operand4>")
+ (define_subst_attr "round_saeonly_mask_scalar_merge_op4" "round_saeonly" "" "<round_saeonly_mask_scalar_merge_operand4>")
+ (define_subst_attr "round_saeonly_sd_mask_op5" "round_saeonly" "" "<round_saeonly_sd_mask_operand5>")
++(define_subst_attr "round_saeonly_mask_arg3" "round_saeonly" "" ", operands[<mask_expand_op3>]")
+ (define_subst_attr "round_saeonly_constraint" "round_saeonly" "vm" "v")
+ (define_subst_attr "round_saeonly_constraint2" "round_saeonly" "m" "v")
+ (define_subst_attr "round_saeonly_nimm_predicate" "round_saeonly" "vector_operand" "register_operand")
+Index: gcc/config/i386/i386.c
+===================================================================
+--- a/src/gcc/config/i386/i386.c	(.../tags/gcc_6_2_0_release)
++++ b/src/gcc/config/i386/i386.c	(.../branches/gcc-6-branch)
+@@ -22671,7 +22671,7 @@
+ 
+   /* We want to check HONOR_NANS and HONOR_SIGNED_ZEROS here,
+      but MODE may be a vector mode and thus not appropriate.  */
+-  if (!flag_finite_math_only || !flag_unsafe_math_optimizations)
++  if (!flag_finite_math_only || flag_signed_zeros)
+     {
+       int u = is_min ? UNSPEC_IEEE_MIN : UNSPEC_IEEE_MAX;
+       rtvec v;
diff --git a/debian/rules.patch b/debian/rules.patch
index a195d26..512a04a 100644
--- a/debian/rules.patch
+++ b/debian/rules.patch
@@ -13,6 +13,7 @@ series_file	?= $(patchdir)/series
 # which patches should be applied?
 
 debian_patches = \
+	svn-updates \
 	$(if $(with_linaro_branch),gcc-linaro) \
 	$(if $(with_linaro_branch),gcc-linaro-no-macros) \
 

-- 
Alioth's /usr/local/bin/git-commit-notice on /srv/git.debian.org/git/reproducible/gcc-6.git



More information about the Reproducible-commits mailing list