[gcc-6] 243/401: * Update to SVN 20161027 (r241619, 6.2.1) from the gcc-6-branch.
Ximin Luo
infinity0 at debian.org
Wed Apr 5 15:49:50 UTC 2017
This is an automated email from the git hooks/post-receive script.
infinity0 pushed a commit to branch pu/reproducible_builds
in repository gcc-6.
commit eee10ba3439568de7bbc868becb45057d7333ad6
Author: doko <doko at 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca>
Date: Thu Oct 27 13:27:49 2016 +0000
* Update to SVN 20161027 (r241619, 6.2.1) from the gcc-6-branch.
git-svn-id: svn://anonscm.debian.org/gcccvs/branches/sid/gcc-6@9018 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
---
debian/changelog | 7 +-
debian/patches/svn-updates.diff | 944 ++++++++++++++++++++++++++++++++++++++--
2 files changed, 907 insertions(+), 44 deletions(-)
diff --git a/debian/changelog b/debian/changelog
index 0acf29b..e1f118f 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,10 +1,11 @@
gcc-6 (6.2.0-10) UNRELEASED; urgency=medium
- * Update to SVN 20161026 (r241546, 6.2.1) from the gcc-6-branch.
+ * Update to SVN 20161027 (r241619, 6.2.1) from the gcc-6-branch.
- Fix PR libstdc++/77288, PR libstdc++/77727, PR libstdc++/78052,
PR tree-optimization/77550, PR tree-optimization/77916,
PR fortran/71895, PR fortran/77763, PR fortran/61420, PR fortran/78013,
- PR fortran/78021, PR fortran/72832.
+ PR fortran/78021, PR fortran/72832, PR fortran/78092, PR fortran/78108,
+ PR target/78057 (x86), PR target/78037 (x86).
* Include go-relocation-test-gcc620-sparc64.obj.uue to fix libgo's
debug/elf TestDWARFRelocations test case (James Clark).
* Reapply fix for PR c++/71912, apply proposed fix for PR c++/78039.
@@ -12,7 +13,7 @@ gcc-6 (6.2.0-10) UNRELEASED; urgency=medium
* Don't install alternatives for go and gofmt. The preferred way to do that
is to install the golang-any package.
- -- Matthias Klose <doko at debian.org> Wed, 26 Oct 2016 11:19:44 +0200
+ -- Matthias Klose <doko at debian.org> Thu, 27 Oct 2016 15:27:07 +0200
gcc-6 (6.2.0-9) unstable; urgency=medium
diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff
index b7ce70f..376f11b 100644
--- a/debian/patches/svn-updates.diff
+++ b/debian/patches/svn-updates.diff
@@ -1,10 +1,10 @@
-# DP: updates from the 6 branch upto 20161026 (r241546).
+# DP: updates from the 6 branch upto 20161027 (r241619).
last_update()
{
cat > ${dir}LAST_UPDATED <EOF
-Wed Oct 26 11:25:03 CEST 2016
-Wed Oct 26 09:25:03 UTC 2016 (revision 241546)
+Thu Oct 27 15:18:00 CEST 2016
+Thu Oct 27 13:18:00 UTC 2016 (revision 241619)
EOF
}
@@ -5292,7 +5292,7 @@ Index: gcc/DATESTAMP
+++ b/src/gcc/DATESTAMP (.../branches/gcc-6-branch)
@@ -1 +1 @@
-20160822
-+20161026
++20161027
Index: gcc/tree.c
===================================================================
--- a/src/gcc/tree.c (.../tags/gcc_6_2_0_release)
@@ -5541,7 +5541,53 @@ Index: gcc/ChangeLog
===================================================================
--- a/src/gcc/ChangeLog (.../tags/gcc_6_2_0_release)
+++ b/src/gcc/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,594 @@
+@@ -1,3 +1,640 @@
++2016-10-26 Uros Bizjak <ubizjak at gmail.com>
++
++ Backport from mainline
++ 2016-10-21 Jakub Jelinek <jakub at redhat.com>
++
++ PR target/78057
++ * config/i386/i386.c: Include fold-const-call.h, tree-vrp.h
++ and tree-ssanames.h.
++ (ix86_fold_builtin): Fold IX86_BUILTIN_[LT]ZCNT{16,32,64}
++ with INTEGER_CST argument.
++ (ix86_gimple_fold_builtin): New function.
++ (TARGET_GIMPLE_FOLD_BUILTIN): Define.
++
++ Backport from mainline
++ 2016-10-20 Uros Bizjak <ubizjak at gmail.com>
++
++ PR target/78037
++ * config/i386/bmiintrin.h (__tzcnt_u16): Call __builtin_ia32_tzcnt_u16.
++ (__tzcnt_u32, _tzcnt_u32): Call __builtin_ia32_tzcnt_u32.
++ (__tzcnt_u64, _tzcnt_u64): Call __builtin_ia32_tzcnt_u64.
++ * config/i386/lzcntintrin.h (__lzcnt_u16): Call
++ __builtin_ia32_lzcnt_u16.
++ (__lzcnt_u32, _lzcnt_u32): Call __builtin_ia32_lzcnt_u32.
++ (__lzcnt_u64, _lzcnt_u64): Call __builtin_ia32_lzcnt_u64.
++ * config/i386/i386.md (UNSPEC_LZCNT, UNSPEC_TZCNT): New unspecs.
++ (ctz<mode>2, *ctz<mode>2): Use SWI48 mode iterator.
++ (bmi_tzcnt_<mode>): New expander.
++ (*bmi_tzcnt_<mode>_falsedep_1): New define_insn_and_split pattern.
++ (*bmi_tzcnt_<mode>_falsedep, *bmi_tzcnt_<mode>): New insn patterns.
++ (clz<mode>2_lzcnt, *clz<mode>2_lzcnt): Use SWI48 mode iterator.
++ (lzcnt_<mode>): New expander.
++ (*lzcnt_<mode>_falsedep_1): New define_insn_and_split pattern.
++ (*lzcnt_<mode>_falsedep, *lzcnt_<mode>): New insn patterns.
++ * config/i386/i386-builtin-types.def (UINT_FTYPE_UINT): New.
++ (UINT64_FTYPE_UINT64): New.
++ * config/i386/i386-builtin.def (__builtin_clzs): Remove description.
++ (__builtin_ia32_lzcnt_u16): New description.
++ (__builtin_ia32_lzcnt_u32): Ditto.
++ (__builtin_ia32_lzcnt_u64): Ditto.
++ (__builtin_ctzs): Remove description.
++ (__builtin_ia32_tzcnt_u16): New description.
++ (__builtin_ia32_tzcnt_u32): Ditto.
++ (__builtin_ia32_tzcnt_u64): Ditto.
++ * config/i386/i386.c (ix86_expand_args_builtin): Handle
++ UINT_FTYPE_UINT and UINT64_FTYPE_UINT64.
++
+2016-10-25 Eric Botcazou <ebotcazou at adacore.com>
+
+ * tree.h (wi::fits_to_tree_p): Accept only 0 and 1 for boolean types.
@@ -6136,7 +6182,7 @@ Index: gcc/ChangeLog
2016-08-22 Release Manager
* GCC 6.2.0 released.
-@@ -205,9 +800,9 @@
+@@ -205,9 +846,9 @@
2016-08-09 Martin Jambor <mjambor at suse.cz>
@@ -6478,6 +6524,53 @@ Index: gcc/testsuite/gcc.target/i386/pr77756.c
+
+ return 0;
+}
+Index: gcc/testsuite/gcc.target/i386/pr78057.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr78057.c (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr78057.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,42 @@
++/* PR target/78057 */
++/* { dg-do compile } */
++/* { dg-options "-O2 -mbmi -mlzcnt -fdump-tree-optimized" } */
++
++extern void link_error (void);
++
++int
++foo (int x)
++{
++ if (__builtin_ia32_tzcnt_u16 (16) != 4
++ || __builtin_ia32_tzcnt_u16 (0) != 16
++ || __builtin_ia32_lzcnt_u16 (0x1ff) != 7
++ || __builtin_ia32_lzcnt_u16 (0) != 16
++ || __builtin_ia32_tzcnt_u32 (8) != 3
++ || __builtin_ia32_tzcnt_u32 (0) != 32
++ || __builtin_ia32_lzcnt_u32 (0x3fffffff) != 2
++ || __builtin_ia32_lzcnt_u32 (0) != 32
++#ifdef __x86_64__
++ || __builtin_ia32_tzcnt_u64 (4) != 2
++ || __builtin_ia32_tzcnt_u64 (0) != 64
++ || __builtin_ia32_lzcnt_u64 (0x1fffffff) != 35
++ || __builtin_ia32_lzcnt_u64 (0) != 64
++#endif
++ )
++ link_error ();
++ x += 2;
++ if (x == 0)
++ return 5;
++ return __builtin_ia32_tzcnt_u32 (x)
++ + __builtin_ia32_lzcnt_u32 (x)
++#ifdef __x86_64__
++ + __builtin_ia32_tzcnt_u64 (x)
++ + __builtin_ia32_lzcnt_u64 (x)
++#endif
++ ;
++}
++
++/* { dg-final { scan-tree-dump-not "link_error" "optimized" } } */
++/* { dg-final { scan-tree-dump-not "__builtin_ia32_\[lt]zcnt" "optimized" } } */
++/* { dg-final { scan-tree-dump-times "__builtin_ctz " 1 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "__builtin_clz " 1 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "__builtin_ctzll " 1 "optimized" { target lp64 } } } */
Index: gcc/testsuite/gcc.target/i386/pr69255-1.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/i386/pr69255-1.c (.../tags/gcc_6_2_0_release)
@@ -6565,6 +6658,32 @@ Index: gcc/testsuite/gcc.target/i386/sse-23.c
+#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,clwb,mwaitx,clzero,pku")
#include <x86intrin.h>
+Index: gcc/testsuite/gcc.target/i386/pr78037.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr78037.c (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr78037.c (.../branches/gcc-6-branch)
+@@ -0,0 +1,21 @@
++/* { dg-do run } */
++/* { dg-require-effective-target bmi } */
++/* { dg-options "-O2 -mbmi" } */
++
++#include <x86intrin.h>
++
++#include "bmi-check.h"
++
++int
++__attribute__((noinline, noclone))
++foo (int x)
++{
++ return __tzcnt_u32 (x) & 0x1f;
++}
++
++static void
++bmi_test ()
++{
++ if (foo (0) != 0)
++ abort ();
++}
Index: gcc/testsuite/gcc.target/i386/pr69255-3.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/i386/pr69255-3.c (.../tags/gcc_6_2_0_release)
@@ -6648,6 +6767,16 @@ Index: gcc/testsuite/gcc.target/i386/pr77991.c
+
+ __atomic_store(&x->waiting, &val, 0);
+}
+Index: gcc/testsuite/gcc.target/i386/bmi-6.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/bmi-6.c (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gcc.target/i386/bmi-6.c (.../branches/gcc-6-branch)
+@@ -1,4 +1,5 @@
+ /* { dg-do link } */
++/* { dg-xfail-if "PR 78057" { "*-*-*" } { "*" } { "" } } */
+ /* { dg-options "-O2 -mbmi" } */
+
+ #include <x86intrin.h>
Index: gcc/testsuite/gcc.target/i386/sse-12.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/i386/sse-12.c (.../tags/gcc_6_2_0_release)
@@ -7414,6 +7543,70 @@ Index: gcc/testsuite/gfortran.dg/allocate_with_source_23.f03
+end program allocate_source
+
+
+Index: gcc/testsuite/gfortran.dg/submodule_19.f08
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/submodule_19.f08 (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/submodule_19.f08 (.../branches/gcc-6-branch)
+@@ -0,0 +1,59 @@
++! { dg-do compile }
++!
++! Tests the fix for PR78108 in which an error was triggered by the
++! generic operator being resolved more than once in submodules. This
++! test checks that the error is triggered when the specific procedure
++! really is inserted more than once in the interface.
++!
++! Note that adding the extra interface to the module produces two
++! errors; the one below and 'Duplicate EXTERNAL attribute specified at (1)'
++!
++! Contributed by Damian Rouson <damian at sourceryinstitute.org>
++!
++module foo_interface
++ implicit none
++ type foo
++ integer :: x
++ contains
++ procedure :: add
++ generic :: operator(+) => add
++ procedure :: mult
++ generic :: operator(*) => mult
++ end type
++ interface
++ integer module function add(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ end function
++ integer module function mult(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ end function
++ end interface
++end module
++submodule(foo_interface) foo_implementation
++ interface operator (+)
++ integer module function add(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ end function ! { dg-error "is already present in the interface" }
++ end interface
++contains
++ integer module function add(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ add = lhs % x + rhs % x
++ end function
++ integer module function mult(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ mult = lhs % x * rhs % x
++ end function
++end submodule
++
++ use foo_interface
++ type(foo) :: a = foo (42)
++ type(foo) :: b = foo (99)
++ if (a + b .ne. 141) call abort
++ if (a * b .ne. 4158) call abort
++end
Index: gcc/testsuite/gfortran.dg/pr77420_4.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/pr77420_4.f90 (.../tags/gcc_6_2_0_release)
@@ -7676,6 +7869,60 @@ Index: gcc/testsuite/gfortran.dg/coarray_collectives_1.f90
call co_max(cmplx(1.0,0.0)) ! { dg-error "shall be of type integer, real or character" }
call co_min(cmplx(0.0,1.0)) ! { dg-error "shall be of type integer, real or character" }
+Index: gcc/testsuite/gfortran.dg/submodule_18.f08
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/submodule_18.f08 (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/submodule_18.f08 (.../branches/gcc-6-branch)
+@@ -0,0 +1,49 @@
++! { dg-do run }
++!
++! Tests the fix for PR78108 in which an error was
++! triggered by the module procedures being added twice
++! to the operator interfaces.
++!
++! Contributed by Damian Rouson <damian at sourceryinstitute.org>
++!
++module foo_interface
++ implicit none
++ type foo
++ integer :: x
++ contains
++ procedure :: add
++ generic :: operator(+) => add
++ procedure :: mult
++ generic :: operator(*) => mult
++ end type
++ interface
++ integer module function add(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ end function
++ integer module function mult(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ end function
++ end interface
++end module
++submodule(foo_interface) foo_implementation
++contains
++ integer module function add(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ add = lhs % x + rhs % x
++ end function
++ integer module function mult(lhs,rhs)
++ implicit none
++ class(foo), intent(in) :: lhs,rhs
++ mult = lhs % x * rhs % x
++ end function
++end submodule
++
++ use foo_interface
++ type(foo) :: a = foo (42)
++ type(foo) :: b = foo (99)
++ if (a + b .ne. 141) call abort
++ if (a * b .ne. 4158) call abort
++end
Index: gcc/testsuite/gfortran.dg/pr77420_3.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/pr77420_3.f90 (.../tags/gcc_6_2_0_release)
@@ -7703,6 +7950,32 @@ Index: gcc/testsuite/gfortran.dg/c_assoc_2.f03
call abort()
end if
+Index: gcc/testsuite/gfortran.dg/pr78092.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/pr78092.f90 (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/testsuite/gfortran.dg/pr78092.f90 (.../branches/gcc-6-branch)
+@@ -0,0 +1,21 @@
++! { dg-do run }
++program test_stuff
++
++ implicit none
++
++ integer :: ivar1(2,3), ivar2
++
++ ivar1 = 6
++ call poly_sizeof(ivar1, ivar2)
++
++ if (ivar2 /= 4) call abort
++
++ contains
++
++ subroutine poly_sizeof(arg1,arg2)
++ class(*), intent(in) :: arg1(:,:)
++ integer, intent(out) :: arg2
++ arg2 = sizeof(arg1(1,1))
++ end subroutine
++
++end program test_stuff
Index: gcc/testsuite/gfortran.dg/pr77260_1.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/pr77260_1.f90 (.../tags/gcc_6_2_0_release)
@@ -9226,7 +9499,35 @@ Index: gcc/testsuite/ChangeLog
===================================================================
--- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_6_2_0_release)
+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,593 @@
+@@ -1,3 +1,621 @@
++2016-10-26 Steven G. Kargl <kargl at gcc.gnu.org>
++
++ PR fortran/78092
++ * gfortran.dg/pr78092.f90: New test.
++
++2016-10-26 Paul Thomas <pault at gcc.gnu.org>
++
++ Backport from trunk
++ PR fortran/78108
++ * gfortran.dg/submodule_18.f08: New test.
++ * gfortran.dg/submodule_19.f08: New test.
++
++2016-10-26 Uros Bizjak <ubizjak at gmail.com>
++
++ * gcc.target/i386/bmi-6.c: XFAIL.
++
++ Backport from mainline
++ 2016-10-21 Jakub Jelinek <jakub at redhat.com>
++
++ PR target/78057
++ * gcc.target/i386/pr78057.c: New test.
++
++ Backport from mainline
++ 2016-10-20 Uros Bizjak <ubizjak at gmail.com>
++
++ PR target/78037
++ * gcc.target/i386/pr78037.c: New test.
++
+2016-10-25 Eric Botcazou <ebotcazou at adacore.com>
+
+ * gnat.dg/opt59.adb: New test.
@@ -9820,7 +10121,7 @@ Index: gcc/testsuite/ChangeLog
2016-08-22 Release Manager
* GCC 6.2.0 released.
-@@ -150,8 +740,8 @@
+@@ -150,8 +768,8 @@
2016-08-09 Martin Jambor <mjambor at suse.cz>
@@ -9831,7 +10132,7 @@ Index: gcc/testsuite/ChangeLog
2016-08-09 Richard Biener <rguenther at suse.de>
-@@ -276,8 +866,8 @@
+@@ -276,8 +894,8 @@
2016-07-20 Martin Jambor <mjambor at suse.cz>
@@ -9842,7 +10143,7 @@ Index: gcc/testsuite/ChangeLog
2016-07-19 Jakub Jelinek <jakub at redhat.com>
-@@ -418,7 +1008,7 @@
+@@ -418,7 +1036,7 @@
2016-07-06 Yuri Rumyantsev <ysrumyan at gmail.com>
PR tree-optimization/71518
@@ -13720,7 +14021,21 @@ Index: gcc/fortran/ChangeLog
===================================================================
--- a/src/gcc/fortran/ChangeLog (.../tags/gcc_6_2_0_release)
+++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-6-branch)
-@@ -1,3 +1,222 @@
+@@ -1,3 +1,236 @@
++2016-10-26 Steven G. Kargl <kargl at gcc.gnu.org>
++
++ PR fortran/78092
++ * trans-intrinsic.c (gfc_conv_intrinsic_sizeof): Fix reference to an
++ array element of type CLASS.
++
++2016-10-26 Paul Thomas <pault at gcc.gnu.org>
++
++ Backport from trunk
++ PR fortran/78108
++ * resolve.c (resolve_typebound_intrinsic_op): For submodules
++ suppress the error and return if the same procedure symbol
++ is added more than once to the interface.
++
+2016-10-24 Steven G. Kargl <kargl at gcc.gnu.org>
+
+ PR fortran/71895
@@ -14178,7 +14493,26 @@ Index: gcc/fortran/resolve.c
if (iface == NULL)
goto check_formal;
-@@ -13640,6 +13692,10 @@
+@@ -12475,7 +12527,17 @@
+ && p->access != ACCESS_PRIVATE && derived->ns == gfc_current_ns)
+ {
+ gfc_interface *head, *intr;
+- if (!gfc_check_new_interface (derived->ns->op[op], target_proc, p->where))
++
++ /* Preempt 'gfc_check_new_interface' for submodules, where the
++ mechanism for handling module procedures winds up resolving
++ operator interfaces twice and would otherwise cause an error. */
++ for (intr = derived->ns->op[op]; intr; intr = intr->next)
++ if (intr->sym == target_proc
++ && target_proc->attr.used_in_submodule)
++ return true;
++
++ if (!gfc_check_new_interface (derived->ns->op[op],
++ target_proc, p->where))
+ return false;
+ head = derived->ns->op[op];
+ intr = gfc_get_interface ();
+@@ -13640,6 +13702,10 @@
return false;
}
@@ -14189,7 +14523,7 @@ Index: gcc/fortran/resolve.c
/* Make sure a parameter that has been implicitly typed still
matches the implicit type, since PARAMETER statements can precede
IMPLICIT statements. */
-@@ -15660,7 +15716,8 @@
+@@ -15660,7 +15726,8 @@
/* As gfc_resolve can be called during resolution of an OpenMP construct
body, we should clear any state associated to it, so that say NS's
DO loops are not interpreted as OpenMP loops. */
@@ -14199,7 +14533,7 @@ Index: gcc/fortran/resolve.c
resolve_types (ns);
component_assignment_level = 0;
-@@ -15672,5 +15729,6 @@
+@@ -15672,5 +15739,6 @@
gfc_run_passes (ns);
@@ -14650,6 +14984,17 @@ Index: gcc/fortran/trans-intrinsic.c
gfc_add_block_to_block (&se->pre, &argse.pre);
gfc_add_block_to_block (&se->post, &argse.post);
arg1 = gfc_evaluate_now (argse.expr, &se->pre);
+@@ -5967,7 +5978,9 @@
+ TREE_OPERAND (argse.expr, 0), 0)))
+ || GFC_DECL_CLASS (TREE_OPERAND (argse.expr, 0)))))
+ byte_size = gfc_class_vtab_size_get (TREE_OPERAND (argse.expr, 0));
+- else if (arg->rank > 0)
++ else if (arg->rank > 0
++ || (arg->rank == 0
++ && arg->ref && arg->ref->type == REF_COMPONENT))
+ /* The scalarizer added an additional temp. To get the class' vptr
+ one has to look at the original backend_decl. */
+ byte_size = gfc_class_vtab_size_get (
Index: gcc/fortran/simplify.c
===================================================================
--- a/src/gcc/fortran/simplify.c (.../tags/gcc_6_2_0_release)
@@ -581297,11 +581642,68 @@ Index: gcc/config/i386/i386.h
#define TARGET_CLWB TARGET_ISA_CLWB
#define TARGET_CLWB_P(x) TARGET_ISA_CLWB_P(x)
#define TARGET_MWAITX TARGET_ISA_MWAITX
+Index: gcc/config/i386/bmiintrin.h
+===================================================================
+--- a/src/gcc/config/i386/bmiintrin.h (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/config/i386/bmiintrin.h (.../branches/gcc-6-branch)
+@@ -37,7 +37,7 @@
+ extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ __tzcnt_u16 (unsigned short __X)
+ {
+- return __builtin_ctzs (__X);
++ return __builtin_ia32_tzcnt_u16 (__X);
+ }
+
+ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+@@ -97,13 +97,13 @@
+ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ __tzcnt_u32 (unsigned int __X)
+ {
+- return __builtin_ctz (__X);
++ return __builtin_ia32_tzcnt_u32 (__X);
+ }
+
+ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _tzcnt_u32 (unsigned int __X)
+ {
+- return __builtin_ctz (__X);
++ return __builtin_ia32_tzcnt_u32 (__X);
+ }
+
+
+@@ -165,13 +165,13 @@
+ extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ __tzcnt_u64 (unsigned long long __X)
+ {
+- return __builtin_ctzll (__X);
++ return __builtin_ia32_tzcnt_u64 (__X);
+ }
+
+ extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _tzcnt_u64 (unsigned long long __X)
+ {
+- return __builtin_ctzll (__X);
++ return __builtin_ia32_tzcnt_u64 (__X);
+ }
+
+ #endif /* __x86_64__ */
Index: gcc/config/i386/i386.md
===================================================================
--- a/src/gcc/config/i386/i386.md (.../tags/gcc_6_2_0_release)
+++ b/src/gcc/config/i386/i386.md (.../branches/gcc-6-branch)
-@@ -255,9 +255,6 @@
+@@ -174,7 +174,11 @@
+ ;; For CRC32 support
+ UNSPEC_CRC32
+
++ ;; For LZCNT suppoprt
++ UNSPEC_LZCNT
++
+ ;; For BMI support
++ UNSPEC_TZCNT
+ UNSPEC_BEXTR
+
+ ;; For BMI2 support
+@@ -255,9 +259,6 @@
;; For CLWB support
UNSPECV_CLWB
@@ -581311,7 +581713,7 @@ Index: gcc/config/i386/i386.md
;; For CLFLUSHOPT support
UNSPECV_CLFLUSHOPT
-@@ -886,6 +883,14 @@
+@@ -886,6 +887,14 @@
(umax "maxu") (umin "minu")])
(define_code_attr maxmin_float [(smax "max") (smin "min")])
@@ -581326,7 +581728,208 @@ Index: gcc/config/i386/i386.md
;; Mapping of logic operators
(define_code_iterator any_logic [and ior xor])
(define_code_iterator any_or [ior xor])
-@@ -17383,14 +17388,6 @@
+@@ -12805,9 +12814,9 @@
+
+ (define_expand "ctz<mode>2"
+ [(parallel
+- [(set (match_operand:SWI248 0 "register_operand")
+- (ctz:SWI248
+- (match_operand:SWI248 1 "nonimmediate_operand")))
++ [(set (match_operand:SWI48 0 "register_operand")
++ (ctz:SWI48
++ (match_operand:SWI48 1 "nonimmediate_operand")))
+ (clobber (reg:CC FLAGS_REG))])])
+
+ ; False dependency happens when destination is only updated by tzcnt,
+@@ -12855,8 +12864,8 @@
+ (set_attr "mode" "<MODE>")])
+
+ (define_insn "*ctz<mode>2"
+- [(set (match_operand:SWI248 0 "register_operand" "=r")
+- (ctz:SWI248 (match_operand:SWI248 1 "nonimmediate_operand" "rm")))
++ [(set (match_operand:SWI48 0 "register_operand" "=r")
++ (ctz:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
+ (clobber (reg:CC FLAGS_REG))]
+ ""
+ {
+@@ -12881,15 +12890,78 @@
+ (const_string "0")))
+ (set_attr "mode" "<MODE>")])
+
++;; Version of tzcnt that is expanded from intrinsics. This version provides
++;; operand size as output when source operand is zero.
++
++(define_expand "bmi_tzcnt_<mode>"
++ [(parallel
++ [(set (match_operand:SWI248 0 "register_operand")
++ (unspec:SWI248
++ [(match_operand:SWI248 1 "nonimmediate_operand")]
++ UNSPEC_TZCNT))
++ (clobber (reg:CC FLAGS_REG))])]
++ "TARGET_BMI")
++
++; False dependency happens when destination is only updated by tzcnt,
++; lzcnt or popcnt. There is no false dependency when destination is
++; also used in source.
++(define_insn_and_split "*bmi_tzcnt_<mode>_falsedep_1"
++ [(set (match_operand:SWI48 0 "register_operand" "=r")
++ (unspec:SWI48
++ [(match_operand:SWI48 1 "nonimmediate_operand" "rm")]
++ UNSPEC_TZCNT))
++ (clobber (reg:CC FLAGS_REG))]
++ "TARGET_BMI
++ && TARGET_AVOID_FALSE_DEP_FOR_BMI && optimize_function_for_speed_p (cfun)"
++ "#"
++ "&& reload_completed"
++ [(parallel
++ [(set (match_dup 0)
++ (unspec:SWI48 [(match_dup 1)] UNSPEC_TZCNT))
++ (unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP)
++ (clobber (reg:CC FLAGS_REG))])]
++{
++ if (!reg_mentioned_p (operands[0], operands[1]))
++ ix86_expand_clear (operands[0]);
++})
++
++(define_insn "*bmi_tzcnt_<mode>_falsedep"
++ [(set (match_operand:SWI48 0 "register_operand" "=r")
++ (unspec:SWI48
++ [(match_operand:SWI48 1 "nonimmediate_operand" "rm")]
++ UNSPEC_TZCNT))
++ (unspec [(match_operand:SWI48 2 "register_operand" "0")]
++ UNSPEC_INSN_FALSE_DEP)
++ (clobber (reg:CC FLAGS_REG))]
++ "TARGET_BMI"
++ "tzcnt{<imodesuffix>}\t{%1, %0|%0, %1}"
++ [(set_attr "type" "alu1")
++ (set_attr "prefix_0f" "1")
++ (set_attr "prefix_rep" "1")
++ (set_attr "mode" "<MODE>")])
++
++(define_insn "*bmi_tzcnt_<mode>"
++ [(set (match_operand:SWI248 0 "register_operand" "=r")
++ (unspec:SWI248
++ [(match_operand:SWI248 1 "nonimmediate_operand" "rm")]
++ UNSPEC_TZCNT))
++ (clobber (reg:CC FLAGS_REG))]
++ "TARGET_BMI"
++ "tzcnt{<imodesuffix>}\t{%1, %0|%0, %1}"
++ [(set_attr "type" "alu1")
++ (set_attr "prefix_0f" "1")
++ (set_attr "prefix_rep" "1")
++ (set_attr "mode" "<MODE>")])
++
+ (define_expand "clz<mode>2"
+ [(parallel
+- [(set (match_operand:SWI248 0 "register_operand")
+- (minus:SWI248
++ [(set (match_operand:SWI48 0 "register_operand")
++ (minus:SWI48
+ (match_dup 2)
+- (clz:SWI248 (match_operand:SWI248 1 "nonimmediate_operand"))))
++ (clz:SWI48 (match_operand:SWI48 1 "nonimmediate_operand"))))
+ (clobber (reg:CC FLAGS_REG))])
+ (parallel
+- [(set (match_dup 0) (xor:SWI248 (match_dup 0) (match_dup 2)))
++ [(set (match_dup 0) (xor:SWI48 (match_dup 0) (match_dup 2)))
+ (clobber (reg:CC FLAGS_REG))])]
+ ""
+ {
+@@ -12903,9 +12975,9 @@
+
+ (define_expand "clz<mode>2_lzcnt"
+ [(parallel
+- [(set (match_operand:SWI248 0 "register_operand")
+- (clz:SWI248
+- (match_operand:SWI248 1 "nonimmediate_operand")))
++ [(set (match_operand:SWI48 0 "register_operand")
++ (clz:SWI48
++ (match_operand:SWI48 1 "nonimmediate_operand")))
+ (clobber (reg:CC FLAGS_REG))])]
+ "TARGET_LZCNT")
+
+@@ -12942,8 +13014,8 @@
+ (set_attr "mode" "<MODE>")])
+
+ (define_insn "*clz<mode>2_lzcnt"
+- [(set (match_operand:SWI248 0 "register_operand" "=r")
+- (clz:SWI248 (match_operand:SWI248 1 "nonimmediate_operand" "rm")))
++ [(set (match_operand:SWI48 0 "register_operand" "=r")
++ (clz:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
+ (clobber (reg:CC FLAGS_REG))]
+ "TARGET_LZCNT"
+ "lzcnt{<imodesuffix>}\t{%1, %0|%0, %1}"
+@@ -12951,6 +13023,69 @@
+ (set_attr "type" "bitmanip")
+ (set_attr "mode" "<MODE>")])
+
++;; Version of lzcnt that is expanded from intrinsics. This version provides
++;; operand size as output when source operand is zero.
++
++(define_expand "lzcnt_<mode>"
++ [(parallel
++ [(set (match_operand:SWI248 0 "register_operand")
++ (unspec:SWI248
++ [(match_operand:SWI248 1 "nonimmediate_operand")]
++ UNSPEC_LZCNT))
++ (clobber (reg:CC FLAGS_REG))])]
++ "TARGET_LZCNT")
++
++; False dependency happens when destination is only updated by tzcnt,
++; lzcnt or popcnt. There is no false dependency when destination is
++; also used in source.
++(define_insn_and_split "*lzcnt_<mode>_falsedep_1"
++ [(set (match_operand:SWI48 0 "register_operand" "=r")
++ (unspec:SWI48
++ [(match_operand:SWI48 1 "nonimmediate_operand" "rm")]
++ UNSPEC_LZCNT))
++ (clobber (reg:CC FLAGS_REG))]
++ "TARGET_LZCNT
++ && TARGET_AVOID_FALSE_DEP_FOR_BMI && optimize_function_for_speed_p (cfun)"
++ "#"
++ "&& reload_completed"
++ [(parallel
++ [(set (match_dup 0)
++ (unspec:SWI48 [(match_dup 1)] UNSPEC_LZCNT))
++ (unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP)
++ (clobber (reg:CC FLAGS_REG))])]
++{
++ if (!reg_mentioned_p (operands[0], operands[1]))
++ ix86_expand_clear (operands[0]);
++})
++
++(define_insn "*lzcnt_<mode>_falsedep"
++ [(set (match_operand:SWI48 0 "register_operand" "=r")
++ (unspec:SWI48
++ [(match_operand:SWI48 1 "nonimmediate_operand" "rm")]
++ UNSPEC_LZCNT))
++ (unspec [(match_operand:SWI48 2 "register_operand" "0")]
++ UNSPEC_INSN_FALSE_DEP)
++ (clobber (reg:CC FLAGS_REG))]
++ "TARGET_LZCNT"
++ "lzcnt{<imodesuffix>}\t{%1, %0|%0, %1}"
++ [(set_attr "type" "alu1")
++ (set_attr "prefix_0f" "1")
++ (set_attr "prefix_rep" "1")
++ (set_attr "mode" "<MODE>")])
++
++(define_insn "*lzcnt_<mode>"
++ [(set (match_operand:SWI248 0 "register_operand" "=r")
++ (unspec:SWI248
++ [(match_operand:SWI248 1 "nonimmediate_operand" "rm")]
++ UNSPEC_LZCNT))
++ (clobber (reg:CC FLAGS_REG))]
++ "TARGET_LZCNT"
++ "lzcnt{<imodesuffix>}\t{%1, %0|%0, %1}"
++ [(set_attr "type" "alu1")
++ (set_attr "prefix_0f" "1")
++ (set_attr "prefix_rep" "1")
++ (set_attr "mode" "<MODE>")])
++
+ ;; BMI instructions.
+ (define_insn "*bmi_andn_<mode>"
+ [(set (match_operand:SWI48 0 "register_operand" "=r,r")
+@@ -17383,14 +17518,6 @@
;; Their operands are not commutative, and thus they may be used in the
;; presence of -0.0 and NaN.
@@ -581341,7 +581944,7 @@ Index: gcc/config/i386/i386.md
(define_insn "*ieee_s<ieee_maxmin><mode>3"
[(set (match_operand:MODEF 0 "register_operand" "=x,v")
(unspec:MODEF
-@@ -18530,7 +18527,7 @@
+@@ -18530,7 +18657,7 @@
[(prefetch (match_operand 0 "address_operand")
(match_operand:SI 1 "const_int_operand")
(match_operand:SI 2 "const_int_operand"))]
@@ -581350,7 +581953,7 @@ Index: gcc/config/i386/i386.md
{
bool write = INTVAL (operands[1]) != 0;
int locality = INTVAL (operands[2]);
-@@ -18538,15 +18535,36 @@
+@@ -18538,15 +18665,36 @@
gcc_assert (IN_RANGE (locality, 0, 3));
/* Use 3dNOW prefetch in case we are asking for write prefetch not
@@ -581395,7 +581998,7 @@ Index: gcc/config/i386/i386.md
})
(define_insn "*prefetch_sse"
-@@ -18574,7 +18592,7 @@
+@@ -18574,7 +18722,7 @@
[(prefetch (match_operand 0 "address_operand" "p")
(match_operand:SI 1 "const_int_operand" "n")
(const_int 3))]
@@ -581404,7 +582007,7 @@ Index: gcc/config/i386/i386.md
{
if (INTVAL (operands[1]) == 0)
return "prefetch\t%a0";
-@@ -19231,13 +19249,6 @@
+@@ -19231,13 +19379,6 @@
[(set_attr "type" "other")
(set_attr "length" "3")])
@@ -581492,6 +582095,49 @@ Index: gcc/config/i386/mmx.md
[(set_attr "type" "mmxadd")
(set_attr "prefix_extra" "1")
(set_attr "mode" "V2SF")])
+Index: gcc/config/i386/lzcntintrin.h
+===================================================================
+--- a/src/gcc/config/i386/lzcntintrin.h (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/config/i386/lzcntintrin.h (.../branches/gcc-6-branch)
+@@ -38,19 +38,19 @@
+ extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ __lzcnt16 (unsigned short __X)
+ {
+- return __builtin_clzs (__X);
++ return __builtin_ia32_lzcnt_u16 (__X);
+ }
+
+ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ __lzcnt32 (unsigned int __X)
+ {
+- return __builtin_clz (__X);
++ return __builtin_ia32_lzcnt_u32 (__X);
+ }
+
+ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _lzcnt_u32 (unsigned int __X)
+ {
+- return __builtin_clz (__X);
++ return __builtin_ia32_lzcnt_u32 (__X);
+ }
+
+ #ifdef __x86_64__
+@@ -57,13 +57,13 @@
+ extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ __lzcnt64 (unsigned long long __X)
+ {
+- return __builtin_clzll (__X);
++ return __builtin_ia32_lzcnt_u64 (__X);
+ }
+
+ extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+ _lzcnt_u64 (unsigned long long __X)
+ {
+- return __builtin_clzll (__X);
++ return __builtin_ia32_lzcnt_u64 (__X);
+ }
+ #endif
+
Index: gcc/config/i386/cpuid.h
===================================================================
--- a/src/gcc/config/i386/cpuid.h (.../tags/gcc_6_2_0_release)
@@ -581768,6 +582414,23 @@ Index: gcc/config/i386/i386.opt
mfxsr
Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
+Index: gcc/config/i386/i386-builtin-types.def
+===================================================================
+--- a/src/gcc/config/i386/i386-builtin-types.def (.../tags/gcc_6_2_0_release)
++++ b/src/gcc/config/i386/i386-builtin-types.def (.../branches/gcc-6-branch)
+@@ -201,9 +201,11 @@
+ DEF_FUNCTION_TYPE (INT64, INT64)
+ DEF_FUNCTION_TYPE (INT64, V2DF)
+ DEF_FUNCTION_TYPE (INT64, V4SF)
++DEF_FUNCTION_TYPE (UINT, UINT)
++DEF_FUNCTION_TYPE (UINT16, UINT16)
+ DEF_FUNCTION_TYPE (UINT64, INT)
+-DEF_FUNCTION_TYPE (UINT16, UINT16)
+ DEF_FUNCTION_TYPE (UINT64, PUNSIGNED)
++DEF_FUNCTION_TYPE (UINT64, UINT64)
+ DEF_FUNCTION_TYPE (V16QI, PCCHAR)
+ DEF_FUNCTION_TYPE (V16QI, V16QI)
+ DEF_FUNCTION_TYPE (V2DF, PCDOUBLE)
Index: gcc/config/i386/t-i386
===================================================================
--- a/src/gcc/config/i386/t-i386 (.../tags/gcc_6_2_0_release)
@@ -581872,7 +582535,16 @@ Index: gcc/config/i386/i386.c
===================================================================
--- a/src/gcc/config/i386/i386.c (.../tags/gcc_6_2_0_release)
+++ b/src/gcc/config/i386/i386.c (.../branches/gcc-6-branch)
-@@ -3784,7 +3784,6 @@
+@@ -76,6 +76,8 @@
+ #include "case-cfn-macros.h"
+ #include "regrename.h"
+ #include "dojump.h"
++#include "fold-const-call.h"
++#include "tree-ssanames.h"
+
+ /* This file should be included last. */
+ #include "target-def.h"
+@@ -3784,7 +3786,6 @@
{ "-mxsaves", OPTION_MASK_ISA_XSAVES },
{ "-mmpx", OPTION_MASK_ISA_MPX },
{ "-mclwb", OPTION_MASK_ISA_CLWB },
@@ -581880,7 +582552,7 @@ Index: gcc/config/i386/i386.c
{ "-mmwaitx", OPTION_MASK_ISA_MWAITX },
{ "-mclzero", OPTION_MASK_ISA_CLZERO },
{ "-mpku", OPTION_MASK_ISA_PKU },
-@@ -4339,11 +4338,10 @@
+@@ -4339,11 +4340,10 @@
#define PTA_AVX512IFMA (HOST_WIDE_INT_1 << 53)
#define PTA_AVX512VBMI (HOST_WIDE_INT_1 << 54)
#define PTA_CLWB (HOST_WIDE_INT_1 << 55)
@@ -581896,7 +582568,7 @@ Index: gcc/config/i386/i386.c
#define PTA_CORE2 \
(PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 \
-@@ -4391,8 +4389,8 @@
+@@ -4391,8 +4391,8 @@
{"lakemont", PROCESSOR_LAKEMONT, CPU_PENTIUM, PTA_NO_80387},
{"pentium-mmx", PROCESSOR_PENTIUM, CPU_PENTIUM, PTA_MMX},
{"winchip-c6", PROCESSOR_I486, CPU_NONE, PTA_MMX},
@@ -581907,7 +582579,7 @@ Index: gcc/config/i386/i386.c
{"c3-2", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO,
PTA_MMX | PTA_SSE | PTA_FXSR},
{"i686", PROCESSOR_PENTIUMPRO, CPU_PENTIUMPRO, 0},
-@@ -4437,43 +4435,43 @@
+@@ -4437,43 +4437,43 @@
{"knl", PROCESSOR_KNL, CPU_SLM, PTA_KNL},
{"intel", PROCESSOR_INTEL, CPU_SLM, PTA_NEHALEM},
{"geode", PROCESSOR_GEODE, CPU_GEODE,
@@ -581966,7 +582638,7 @@ Index: gcc/config/i386/i386.c
{"amdfam10", PROCESSOR_AMDFAM10, CPU_AMDFAM10,
PTA_64BIT | PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE | PTA_SSE2
| PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_PRFCHW | PTA_FXSR},
-@@ -4927,9 +4925,6 @@
+@@ -4927,9 +4927,6 @@
if (processor_alias_table[i].flags & PTA_PREFETCHWT1
&& !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PREFETCHWT1))
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1;
@@ -581976,7 +582648,7 @@ Index: gcc/config/i386/i386.c
if (processor_alias_table[i].flags & PTA_CLWB
&& !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_CLWB))
opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB;
-@@ -5183,15 +5178,11 @@
+@@ -5183,15 +5180,11 @@
/* Enable SSE prefetch. */
if (TARGET_SSE_P (opts->x_ix86_isa_flags)
@@ -581995,7 +582667,7 @@ Index: gcc/config/i386/i386.c
/* Enable popcnt instruction for -msse4.2 or -mabm. */
if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags)
|| TARGET_ABM_P (opts->x_ix86_isa_flags))
-@@ -5476,11 +5467,12 @@
+@@ -5476,11 +5469,12 @@
if (!(opts_set->x_target_flags & MASK_STV))
opts->x_target_flags |= MASK_STV;
/* Disable STV if -mpreferred-stack-boundary={2,3} or
@@ -582010,7 +582682,7 @@ Index: gcc/config/i386/i386.c
opts->x_target_flags &= ~MASK_STV;
if (!ix86_tune_features[X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL]
&& !(opts_set->x_target_flags & MASK_AVX256_SPLIT_UNALIGNED_LOAD))
-@@ -5978,7 +5970,6 @@
+@@ -5978,7 +5972,6 @@
IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
IX86_ATTR_ISA ("clwb", OPT_mclwb),
@@ -582018,7 +582690,7 @@ Index: gcc/config/i386/i386.c
IX86_ATTR_ISA ("mwaitx", OPT_mmwaitx),
IX86_ATTR_ISA ("clzero", OPT_mclzero),
IX86_ATTR_ISA ("pku", OPT_mpku),
-@@ -9916,6 +9907,9 @@
+@@ -9916,6 +9909,9 @@
layout_type (record);
@@ -582028,7 +582700,7 @@ Index: gcc/config/i386/i386.c
/* The correct type is an array type of one element. */
return build_array_type (record, build_index_type (size_zero_node));
}
-@@ -9928,17 +9922,36 @@
+@@ -9928,17 +9924,36 @@
{
if (TARGET_64BIT)
{
@@ -582072,7 +582744,7 @@ Index: gcc/config/i386/i386.c
}
else
{
-@@ -15494,7 +15507,9 @@
+@@ -15494,7 +15509,9 @@
base = get_thread_pointer (tp_mode,
for_mov || !TARGET_TLS_DIRECT_SEG_REFS);
off = force_reg (tp_mode, off);
@@ -582083,7 +582755,7 @@ Index: gcc/config/i386/i386.c
}
else
{
-@@ -22671,7 +22686,7 @@
+@@ -22671,7 +22688,7 @@
/* We want to check HONOR_NANS and HONOR_SIGNED_ZEROS here,
but MODE may be a vector mode and thus not appropriate. */
@@ -582092,7 +582764,7 @@ Index: gcc/config/i386/i386.c
{
int u = is_min ? UNSPEC_IEEE_MIN : UNSPEC_IEEE_MAX;
rtvec v;
-@@ -32141,9 +32156,6 @@
+@@ -32141,9 +32158,6 @@
/* CLWB instructions. */
IX86_BUILTIN_CLWB,
@@ -582102,7 +582774,30 @@ Index: gcc/config/i386/i386.c
/* CLFLUSHOPT instructions. */
IX86_BUILTIN_CLFLUSHOPT,
-@@ -32947,9 +32959,6 @@
+@@ -32344,7 +32358,10 @@
+ IX86_BUILTIN_LWPINS32,
+ IX86_BUILTIN_LWPINS64,
+
+- IX86_BUILTIN_CLZS,
++ /* LZCNT */
++ IX86_BUILTIN_LZCNT16,
++ IX86_BUILTIN_LZCNT32,
++ IX86_BUILTIN_LZCNT64,
+
+ /* RTM */
+ IX86_BUILTIN_XBEGIN,
+@@ -32368,7 +32385,9 @@
+ /* BMI instructions. */
+ IX86_BUILTIN_BEXTR32,
+ IX86_BUILTIN_BEXTR64,
+- IX86_BUILTIN_CTZS,
++ IX86_BUILTIN_TZCNT16,
++ IX86_BUILTIN_TZCNT32,
++ IX86_BUILTIN_TZCNT64,
+
+ /* TBM instructions. */
+ IX86_BUILTIN_BEXTRI32,
+@@ -32947,9 +32966,6 @@
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_us_truncatev8siv8hi2_mask_store, "__builtin_ia32_pmovusdw256mem_mask", IX86_BUILTIN_PMOVUSDW256_MEM, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8SI_UQI },
{ OPTION_MASK_ISA_AVX512VL, CODE_FOR_avx512vl_us_truncatev4siv4hi2_mask_store, "__builtin_ia32_pmovusdw128mem_mask", IX86_BUILTIN_PMOVUSDW128_MEM, UNKNOWN, (int) VOID_FTYPE_PV8HI_V4SI_UQI },
@@ -582112,7 +582807,164 @@ Index: gcc/config/i386/i386.c
/* RDPKRU and WRPKRU. */
{ OPTION_MASK_ISA_PKU, CODE_FOR_rdpkru, "__builtin_ia32_rdpkru", IX86_BUILTIN_RDPKRU, UNKNOWN, (int) UNSIGNED_FTYPE_VOID },
{ OPTION_MASK_ISA_PKU, CODE_FOR_wrpkru, "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED }
-@@ -40361,7 +40370,7 @@
+@@ -33759,13 +33775,19 @@
+ { OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_lshrvv8si, "__builtin_ia32_psrlv8si", IX86_BUILTIN_PSRLVV8SI, UNKNOWN, (int) V8SI_FTYPE_V8SI_V8SI },
+ { OPTION_MASK_ISA_AVX2, CODE_FOR_avx2_lshrvv4si, "__builtin_ia32_psrlv4si", IX86_BUILTIN_PSRLVV4SI, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI },
+
+- { OPTION_MASK_ISA_LZCNT, CODE_FOR_clzhi2_lzcnt, "__builtin_clzs", IX86_BUILTIN_CLZS, UNKNOWN, (int) UINT16_FTYPE_UINT16 },
++ /* LZCNT */
++ { OPTION_MASK_ISA_LZCNT, CODE_FOR_lzcnt_hi, "__builtin_ia32_lzcnt_u16", IX86_BUILTIN_LZCNT16, UNKNOWN, (int) UINT16_FTYPE_UINT16 },
++ { OPTION_MASK_ISA_LZCNT, CODE_FOR_lzcnt_si, "__builtin_ia32_lzcnt_u32", IX86_BUILTIN_LZCNT32, UNKNOWN, (int) UINT_FTYPE_UINT },
++ { OPTION_MASK_ISA_LZCNT | OPTION_MASK_ISA_64BIT, CODE_FOR_lzcnt_di, "__builtin_ia32_lzcnt_u64", IX86_BUILTIN_LZCNT64, UNKNOWN, (int) UINT64_FTYPE_UINT64 },
+
+ /* BMI */
+ { OPTION_MASK_ISA_BMI, CODE_FOR_bmi_bextr_si, "__builtin_ia32_bextr_u32", IX86_BUILTIN_BEXTR32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
+ { OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi_bextr_di, "__builtin_ia32_bextr_u64", IX86_BUILTIN_BEXTR64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
+- { OPTION_MASK_ISA_BMI, CODE_FOR_ctzhi2, "__builtin_ctzs", IX86_BUILTIN_CTZS, UNKNOWN, (int) UINT16_FTYPE_UINT16 },
+
++ { OPTION_MASK_ISA_BMI, CODE_FOR_bmi_tzcnt_hi, "__builtin_ia32_tzcnt_u16", IX86_BUILTIN_TZCNT16, UNKNOWN, (int) UINT16_FTYPE_UINT16 },
++ { OPTION_MASK_ISA_BMI, CODE_FOR_bmi_tzcnt_si, "__builtin_ia32_tzcnt_u32", IX86_BUILTIN_TZCNT32, UNKNOWN, (int) UINT_FTYPE_UINT },
++ { OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_64BIT, CODE_FOR_bmi_tzcnt_di, "__builtin_ia32_tzcnt_u64", IX86_BUILTIN_TZCNT64, UNKNOWN, (int) UINT64_FTYPE_UINT64 },
++
+ /* TBM */
+ { OPTION_MASK_ISA_TBM, CODE_FOR_tbm_bextri_si, "__builtin_ia32_bextri_u32", IX86_BUILTIN_BEXTRI32, UNKNOWN, (int) UINT_FTYPE_UINT_UINT },
+ { OPTION_MASK_ISA_TBM | OPTION_MASK_ISA_64BIT, CODE_FOR_tbm_bextri_di, "__builtin_ia32_bextri_u64", IX86_BUILTIN_BEXTRI64, UNKNOWN, (int) UINT64_FTYPE_UINT64_UINT64 },
+@@ -37537,11 +37559,49 @@
+ {
+ enum ix86_builtins fn_code = (enum ix86_builtins)
+ DECL_FUNCTION_CODE (fndecl);
+- if (fn_code == IX86_BUILTIN_CPU_IS
+- || fn_code == IX86_BUILTIN_CPU_SUPPORTS)
++ switch (fn_code)
+ {
++ case IX86_BUILTIN_CPU_IS:
++ case IX86_BUILTIN_CPU_SUPPORTS:
+ gcc_assert (n_args == 1);
+ return fold_builtin_cpu (fndecl, args);
++
++ case IX86_BUILTIN_TZCNT16:
++ case IX86_BUILTIN_TZCNT32:
++ case IX86_BUILTIN_TZCNT64:
++ gcc_assert (n_args == 1);
++ if (TREE_CODE (args[0]) == INTEGER_CST)
++ {
++ tree type = TREE_TYPE (TREE_TYPE (fndecl));
++ tree arg = args[0];
++ if (fn_code == IX86_BUILTIN_TZCNT16)
++ arg = fold_convert (short_unsigned_type_node, arg);
++ if (integer_zerop (arg))
++ return build_int_cst (type, TYPE_PRECISION (TREE_TYPE (arg)));
++ else
++ return fold_const_call (CFN_CTZ, type, arg);
++ }
++ break;
++
++ case IX86_BUILTIN_LZCNT16:
++ case IX86_BUILTIN_LZCNT32:
++ case IX86_BUILTIN_LZCNT64:
++ gcc_assert (n_args == 1);
++ if (TREE_CODE (args[0]) == INTEGER_CST)
++ {
++ tree type = TREE_TYPE (TREE_TYPE (fndecl));
++ tree arg = args[0];
++ if (fn_code == IX86_BUILTIN_LZCNT16)
++ arg = fold_convert (short_unsigned_type_node, arg);
++ if (integer_zerop (arg))
++ return build_int_cst (type, TYPE_PRECISION (TREE_TYPE (arg)));
++ else
++ return fold_const_call (CFN_CLZ, type, arg);
++ }
++ break;
++
++ default:
++ break;
+ }
+ }
+
+@@ -37552,6 +37612,70 @@
+ return NULL_TREE;
+ }
+
++/* Fold a MD builtin (use ix86_fold_builtin for folding into
++ constant) in GIMPLE. */
++
++bool
++ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi)
++{
++ gimple *stmt = gsi_stmt (*gsi);
++ tree fndecl = gimple_call_fndecl (stmt);
++ gcc_checking_assert (fndecl && DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_MD);
++ int n_args = gimple_call_num_args (stmt);
++ enum ix86_builtins fn_code = (enum ix86_builtins) DECL_FUNCTION_CODE (fndecl);
++ tree decl = NULL_TREE;
++ tree arg0;
++
++ switch (fn_code)
++ {
++ case IX86_BUILTIN_TZCNT32:
++ decl = builtin_decl_implicit (BUILT_IN_CTZ);
++ goto fold_tzcnt_lzcnt;
++
++ case IX86_BUILTIN_TZCNT64:
++ decl = builtin_decl_implicit (BUILT_IN_CTZLL);
++ goto fold_tzcnt_lzcnt;
++
++ case IX86_BUILTIN_LZCNT32:
++ decl = builtin_decl_implicit (BUILT_IN_CLZ);
++ goto fold_tzcnt_lzcnt;
++
++ case IX86_BUILTIN_LZCNT64:
++ decl = builtin_decl_implicit (BUILT_IN_CLZLL);
++ goto fold_tzcnt_lzcnt;
++
++ fold_tzcnt_lzcnt:
++ gcc_assert (n_args == 1);
++ arg0 = gimple_call_arg (stmt, 0);
++ if (TREE_CODE (arg0) == SSA_NAME && decl && gimple_call_lhs (stmt))
++ {
++ int prec = TYPE_PRECISION (TREE_TYPE (arg0));
++ /* If arg0 is provably non-zero, optimize into generic
++ __builtin_c[tl]z{,ll} function the middle-end handles
++ better. */
++ if (!expr_not_equal_to (arg0, wi::zero (prec)))
++ return false;
++
++ location_t loc = gimple_location (stmt);
++ gimple *g = gimple_build_call (decl, 1, arg0);
++ gimple_set_location (g, loc);
++ tree lhs = make_ssa_name (integer_type_node);
++ gimple_call_set_lhs (g, lhs);
++ gsi_insert_before (gsi, g, GSI_SAME_STMT);
++ g = gimple_build_assign (gimple_call_lhs (stmt), NOP_EXPR, lhs);
++ gimple_set_location (g, loc);
++ gsi_replace (gsi, g, true);
++ return true;
++ }
++ break;
++
++ default:
++ break;
++ }
++
++ return false;
++}
++
+ /* Make builtins to detect cpu type and features supported. NAME is
+ the builtin name, CODE is the builtin code, and FTYPE is the function
+ type of the builtin. */
+@@ -38513,8 +38637,10 @@
+ case FLOAT128_FTYPE_FLOAT128:
+ case FLOAT_FTYPE_FLOAT:
+ case INT_FTYPE_INT:
++ case UINT_FTYPE_UINT:
++ case UINT16_FTYPE_UINT16:
+ case UINT64_FTYPE_INT:
+- case UINT16_FTYPE_UINT16:
++ case UINT64_FTYPE_UINT64:
+ case INT64_FTYPE_INT64:
+ case INT64_FTYPE_V4SF:
+ case INT64_FTYPE_V2DF:
+@@ -40361,7 +40487,7 @@
error ("%qE needs isa option %s", fndecl, opts);
free (opts);
}
@@ -582121,7 +582973,7 @@ Index: gcc/config/i386/i386.c
}
switch (fcode)
-@@ -48848,6 +48857,8 @@
+@@ -48848,6 +48974,8 @@
/* ms_abi and sysv_abi calling convention function attributes. */
{ "ms_abi", 0, 0, false, true, true, ix86_handle_abi_attribute, true },
{ "sysv_abi", 0, 0, false, true, true, ix86_handle_abi_attribute, true },
@@ -582130,7 +582982,7 @@ Index: gcc/config/i386/i386.c
{ "ms_hook_prologue", 0, 0, true, false, false, ix86_handle_fndecl_attribute,
false },
{ "callee_pop_aggregate_return", 1, 1, false, true, true,
-@@ -52690,8 +52701,6 @@
+@@ -52690,8 +52818,6 @@
static tree
ix86_canonical_va_list_type (tree type)
{
@@ -582139,7 +582991,7 @@ Index: gcc/config/i386/i386.c
/* Resolve references and pointers to va_list type. */
if (TREE_CODE (type) == MEM_REF)
type = TREE_TYPE (type);
-@@ -52700,64 +52709,25 @@
+@@ -52700,64 +52826,25 @@
else if (POINTER_TYPE_P (type) && TREE_CODE (TREE_TYPE (type)) == ARRAY_TYPE)
type = TREE_TYPE (type);
@@ -582218,7 +583070,7 @@ Index: gcc/config/i386/i386.c
return std_canonical_va_list_type (type);
}
-@@ -53662,9 +53632,7 @@
+@@ -53662,9 +53749,7 @@
return V4SFmode;
case DFmode:
@@ -582229,7 +583081,7 @@ Index: gcc/config/i386/i386.c
return V8DFmode;
else if (TARGET_AVX && !TARGET_PREFER_AVX128)
return V4DFmode;
-@@ -53749,9 +53717,14 @@
+@@ -53749,9 +53834,14 @@
tree vectype = stmt_info ? stmt_vectype (stmt_info) : NULL_TREE;
int stmt_cost = ix86_builtin_vectorization_cost (kind, vectype, misalign);
@@ -582245,6 +583097,16 @@ Index: gcc/config/i386/i386.c
if (where == vect_body && stmt_info && stmt_in_inner_loop_p (stmt_info))
count *= 50; /* FIXME. */
+@@ -54615,6 +54705,9 @@
+ #undef TARGET_FOLD_BUILTIN
+ #define TARGET_FOLD_BUILTIN ix86_fold_builtin
+
++#undef TARGET_GIMPLE_FOLD_BUILTIN
++#define TARGET_GIMPLE_FOLD_BUILTIN ix86_gimple_fold_builtin
++
+ #undef TARGET_COMPARE_VERSION_PRIORITY
+ #define TARGET_COMPARE_VERSION_PRIORITY ix86_compare_version_priority
+
Index: gcc/config/avr/gen-avr-mmcu-texi.c
===================================================================
--- a/src/gcc/config/avr/gen-avr-mmcu-texi.c (.../tags/gcc_6_2_0_release)
--
Alioth's /usr/local/bin/git-commit-notice on /srv/git.debian.org/git/reproducible/gcc-6.git
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