[gcc-7] 321/354: * Update the Linaro support to the 7-2017.10 snapshot.
Ximin Luo
infinity0 at debian.org
Thu Nov 23 15:51:33 UTC 2017
This is an automated email from the git hooks/post-receive script.
infinity0 pushed a commit to branch master
in repository gcc-7.
commit 50fe4dc8b3452a0f0d4de3769b4026525ff0ceff
Author: doko <doko at 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca>
Date: Tue Oct 17 12:43:02 2017 +0000
* Update the Linaro support to the 7-2017.10 snapshot.
git-svn-id: svn+ssh://svn.debian.org/svn/gcccvs/branches/sid/gcc-7@9750 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
---
debian/changelog | 3 +-
debian/patches/gcc-linaro-doc.diff | 17 +---
debian/patches/gcc-linaro-no-macros.diff | 2 +-
debian/patches/gcc-linaro.diff | 134 ++++++++-----------------------
4 files changed, 40 insertions(+), 116 deletions(-)
diff --git a/debian/changelog b/debian/changelog
index 4361031..6bd69e2 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -5,8 +5,9 @@ gcc-7 (7.2.0-11) UNRELEASED; urgency=medium
PR fortran/82121, PR fortran/67543, PR fortran/78152, PR fortran/81048.
- Fix libgo bootstrap on s390x and alpha, introduced by the mips backport.
* Mask __float128 from CUDA compilers. LP: #1717257.
+ * Update the Linaro support to the 7-2017.10 snapshot.
- -- Matthias Klose <doko at debian.org> Mon, 16 Oct 2017 19:01:11 +0200
+ -- Matthias Klose <doko at debian.org> Tue, 17 Oct 2017 14:42:35 +0200
gcc-7 (7.2.0-10) unstable; urgency=medium
diff --git a/debian/patches/gcc-linaro-doc.diff b/debian/patches/gcc-linaro-doc.diff
index 37ac4c9..4e0beb5 100644
--- a/debian/patches/gcc-linaro-doc.diff
+++ b/debian/patches/gcc-linaro-doc.diff
@@ -1,4 +1,4 @@
-# DP: Changes for the Linaro 7-2017.09 snapshot (documentation).
+# DP: Changes for the Linaro 7-2017.10 snapshot (documentation).
--- a/src/gcc/doc/install.texi
+++ b/src/gcc/doc/install.texi
@@ -89,20 +89,7 @@
--- a/src/gcc/doc/sourcebuild.texi
+++ b/src/gcc/doc/sourcebuild.texi
-@@ -1570,6 +1570,12 @@ Test system supports executing NEON v2 instructions.
- ARM Target supports @code{-mfpu=neon -mfloat-abi=softfp} or compatible
- options. Some multilibs may be incompatible with these options.
-
-+ at item arm_neon_ok_no_float_abi
-+ at anchor{arm_neon_ok_no_float_abi}
-+ARM Target supports NEON with @code{-mfpu=neon}, but without any
-+-mfloat-abi= option. Some multilibs may be incompatible with this
-+option.
-+
- @item arm_neonv2_ok
- @anchor{arm_neonv2_ok}
- ARM Target supports @code{-mfpu=neon-vfpv4 -mfloat-abi=softfp} or compatible
-@@ -2274,6 +2280,11 @@ the codeset to convert to.
+@@ -2280,6 +2280,11 @@ the codeset to convert to.
Skip the test if the target does not support profiling with option
@var{profopt}.
diff --git a/debian/patches/gcc-linaro-no-macros.diff b/debian/patches/gcc-linaro-no-macros.diff
index c94dbe8..ea58aa5 100644
--- a/debian/patches/gcc-linaro-no-macros.diff
+++ b/debian/patches/gcc-linaro-no-macros.diff
@@ -89,4 +89,4 @@ Index: b/src/gcc/LINARO-VERSION
--- a/src/gcc/LINARO-VERSION
+++ /dev/null
@@ -1,1 +0,0 @@
--Snapshot 7.2-2017.09
+-Snapshot 7.2-2017.10
diff --git a/debian/patches/gcc-linaro.diff b/debian/patches/gcc-linaro.diff
index 9bbc4e7..5b2ec2c 100644
--- a/debian/patches/gcc-linaro.diff
+++ b/debian/patches/gcc-linaro.diff
@@ -1,16 +1,24 @@
-# DP: Changes for the Linaro 7-2017.09 snapshot.
+# DP: Changes for the Linaro 7-2017.10 snapshot.
MSG=$(git log origin/linaro/gcc-7-branch --format=format:"%s" -n 1 --grep "Merge branches"); SVN=${MSG##* }; git log origin/gcc-7-branch --format=format:"%H" -n 1 --grep "gcc-7-branch@${SVN%.}"
-LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e382610b087a72d0d07103f815458cec0 \
+LANG=C git diff --no-renames ce6909f3d9ba9402c614d5e3e62c7c3a5d8ee5e0 6ac37d6dc1e9705886fdc8ef75782ba4062058f5 \
| egrep -v '^(diff|index) ' \
| filterdiff --strip=1 --addoldprefix=a/src/ --addnewprefix=b/src/ \
| sed 's,a/src//dev/null,/dev/null,'
--- /dev/null
++++ b/src/.gitreview
+@@ -0,0 +1,5 @@
++[gerrit]
++host=review.linaro.org
++port=29418
++project=toolchain/gcc
++defaultbranch=linaro-local/gcc-7-integration-branch
+--- /dev/null
+++ b/src/gcc/LINARO-VERSION
@@ -0,0 +1 @@
-+Snapshot 7.2-2017.09
++Snapshot 7.2-2017.10
--- a/src/gcc/Makefile.in
+++ b/src/gcc/Makefile.in
@@ -845,10 +845,12 @@ BASEVER := $(srcdir)/BASE-VER # 4.x.y
@@ -360,7 +368,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
#endif /* GCC_CCMP_H */
--- a/src/gcc/config.gcc
+++ b/src/gcc/config.gcc
-@@ -3796,34 +3796,19 @@ case "${target}" in
+@@ -3801,34 +3801,19 @@ case "${target}" in
# Add extra multilibs
if test "x$with_multilib_list" != x; then
arm_multilibs=`echo $with_multilib_list | sed -e 's/,/ /g'`
@@ -408,7 +416,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
if test "x${tmake_profile_file}" != x ; then
# arm/t-aprofile and arm/t-rmprofile are only
-@@ -3840,6 +3825,7 @@ case "${target}" in
+@@ -3845,6 +3830,7 @@ case "${target}" in
fi
tmake_file="${tmake_file} ${tmake_profile_file}"
@@ -1733,10 +1741,11 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
return !targetm.cannot_force_const_mem (mode, x);
if (GET_CODE (x) == HIGH
-@@ -11275,23 +11649,6 @@ aarch64_mask_from_zextract_ops (rtx width, rtx pos)
+@@ -11274,23 +11648,6 @@ aarch64_mask_from_zextract_ops (rtx width, rtx pos)
+ return GEN_INT (mask << UINTVAL (pos));
}
- bool
+-bool
-aarch64_simd_imm_scalar_p (rtx x, machine_mode mode ATTRIBUTE_UNUSED)
-{
- HOST_WIDE_INT imm = INTVAL (x);
@@ -1753,11 +1762,10 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
- return true;
-}
-
--bool
+ bool
aarch64_mov_operand_p (rtx x, machine_mode mode)
{
- if (GET_CODE (x) == HIGH
-@@ -11647,6 +12004,57 @@ aarch64_expand_vector_init (rtx target, rtx vals)
+@@ -11637,6 +11994,57 @@ aarch64_expand_vector_init (rtx target, rtx vals)
return;
}
@@ -1815,7 +1823,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
/* Initialise a vector which is part-variable. We want to first try
to build those lanes which are constant in the most efficient way we
can. */
-@@ -11680,10 +12088,6 @@ aarch64_expand_vector_init (rtx target, rtx vals)
+@@ -11670,10 +12078,6 @@ aarch64_expand_vector_init (rtx target, rtx vals)
}
/* Insert the variable lanes directly. */
@@ -1826,7 +1834,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
for (int i = 0; i < n_elts; i++)
{
rtx x = XVECEXP (vals, 0, i);
-@@ -12049,6 +12453,17 @@ aarch64_split_compare_and_swap (rtx operands[])
+@@ -12039,6 +12443,17 @@ aarch64_split_compare_and_swap (rtx operands[])
mode = GET_MODE (mem);
model = memmodel_from_int (INTVAL (model_rtx));
@@ -1844,7 +1852,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
label1 = NULL;
if (!is_weak)
{
-@@ -12065,11 +12480,21 @@ aarch64_split_compare_and_swap (rtx operands[])
+@@ -12055,11 +12470,21 @@ aarch64_split_compare_and_swap (rtx operands[])
else
aarch64_emit_load_exclusive (mode, rval, mem, model_rtx);
@@ -1871,7 +1879,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
aarch64_emit_store_exclusive (mode, scratch, mem, newval, model_rtx);
-@@ -12088,7 +12513,15 @@ aarch64_split_compare_and_swap (rtx operands[])
+@@ -12078,7 +12503,15 @@ aarch64_split_compare_and_swap (rtx operands[])
}
emit_label (label2);
@@ -1888,7 +1896,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
/* Emit any final barrier needed for a __sync operation. */
if (is_mm_sync (model))
aarch64_emit_post_barrier (model);
-@@ -12608,15 +13041,28 @@ aarch64_output_simd_mov_immediate (rtx const_vector,
+@@ -12598,15 +13031,28 @@ aarch64_output_simd_mov_immediate (rtx const_vector,
}
char*
@@ -1921,7 +1929,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
}
/* Split operands into moves from op[1] + op[2] into op[0]. */
-@@ -13981,13 +14427,66 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
+@@ -13971,13 +14417,66 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
{
enum attr_type prev_type = get_attr_type (prev);
@@ -6485,28 +6493,6 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
+/* Ensure there is no IT block with more than 2 instructions, ie. we only allow
+ IT, ITT and ITE. */
+/* { dg-final { scan-assembler-not "\\sit\[te\]{2}" } } */
---- a/src/gcc/testsuite/gcc.target/arm/lto/pr65837-attr_0.c
-+++ b/src/gcc/testsuite/gcc.target/arm/lto/pr65837-attr_0.c
-@@ -1,6 +1,7 @@
- /* { dg-lto-do run } */
- /* { dg-require-effective-target arm_neon_hw } */
--/* { dg-lto-options {{-flto}} } */
-+/* { dg-require-effective-target arm_neon_ok_no_float_abi } */
-+/* { dg-lto-options {{-flto -mfpu=neon}} } */
-
- #include "arm_neon.h"
-
---- a/src/gcc/testsuite/gcc.target/arm/lto/pr65837_0.c
-+++ b/src/gcc/testsuite/gcc.target/arm/lto/pr65837_0.c
-@@ -1,7 +1,7 @@
- /* { dg-lto-do run } */
- /* { dg-require-effective-target arm_neon_hw } */
-+/* { dg-require-effective-target arm_neon_ok_no_float_abi } */
- /* { dg-lto-options {{-flto -mfpu=neon}} } */
--/* { dg-suppress-ld-options {-mfpu=neon} } */
-
- #include "arm_neon.h"
-
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/arm/movdi_movt.c
@@ -0,0 +1,18 @@
@@ -7054,57 +7040,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
}
# Add the options needed for ARMv8.2 with the scalar FP16 extension.
-@@ -3428,8 +3439,9 @@ proc check_effective_target_arm_neon_ok_nocache { } {
- global et_arm_neon_flags
- set et_arm_neon_flags ""
- if { [check_effective_target_arm32] } {
-- foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
-+ foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
- if { [check_no_compiler_messages_nocache arm_neon_ok object {
-+ #include <arm_neon.h>
- int dummy;
- #ifndef __ARM_NEON__
- #error not NEON
-@@ -3454,6 +3466,38 @@ proc check_effective_target_arm_neon_ok { } {
- check_effective_target_arm_neon_ok_nocache]
- }
-
-+# Return 1 if this is an ARM target supporting -mfpu=neon without any
-+# -mfloat-abi= option. Useful in tests where add_options is not
-+# supported (such as lto tests).
-+
-+proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
-+ if { [check_effective_target_arm32] } {
-+ foreach flags {"-mfpu=neon"} {
-+ if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
-+ #include <arm_neon.h>
-+ int dummy;
-+ #ifndef __ARM_NEON__
-+ #error not NEON
-+ #endif
-+ /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
-+ configured for -mcpu=arm926ej-s, for example. */
-+ #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
-+ #error Architecture does not support NEON.
-+ #endif
-+ } "$flags"] } {
-+ return 1
-+ }
-+ }
-+ }
-+
-+ return 0
-+}
-+
-+proc check_effective_target_arm_neon_ok_no_float_abi { } {
-+ return [check_cached_effective_target arm_neon_ok_no_float_abi \
-+ check_effective_target_arm_neon_ok_no_float_abi_nocache]
-+}
-+
- proc check_effective_target_arm_crc_ok_nocache { } {
- global et_arm_crc_flags
- set et_arm_crc_flags "-march=armv8-a+crc"
-@@ -3769,12 +3813,13 @@ proc check_effective_target_arm_fp16_hw { } {
+@@ -3802,12 +3813,13 @@ proc check_effective_target_arm_fp16_hw { } {
# can be selected and a routine to give the flags to select that architecture
# Note: Extra flags may be added to disable options from newer compilers
# (Thumb in particular - but others may be added in the future).
@@ -7121,7 +7057,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
v4 "-march=armv4 -marm" __ARM_ARCH_4__
v4t "-march=armv4t" __ARM_ARCH_4T__
v5 "-march=armv5 -marm" __ARM_ARCH_5__
-@@ -3789,20 +3834,23 @@ foreach { armfunc armflag armdef } {
+@@ -3822,20 +3834,23 @@ foreach { armfunc armflag armdef } {
v7r "-march=armv7-r" __ARM_ARCH_7R__
v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
@@ -7149,7 +7085,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
#endif
} "FLAG" ]
}
-@@ -3823,26 +3871,6 @@ foreach { armfunc armflag armdef } {
+@@ -3856,26 +3871,6 @@ foreach { armfunc armflag armdef } {
}]
}
@@ -7176,7 +7112,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
# Return 1 if GCC was configured with --with-mode=
proc check_effective_target_default_mode { } {
-@@ -4038,13 +4066,15 @@ proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
+@@ -4071,13 +4066,15 @@ proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
# since AArch64 only needs the -march setting.
foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
"-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
@@ -7428,7 +7364,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu)
tmake_file="$tmake_file t-crtstuff-pic t-libgcc-pic t-eh-dw2-dip t-slibgcc t-slibgcc-gld t-slibgcc-elf-ver t-linux"
extra_parts="crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o"
-@@ -342,6 +346,10 @@ aarch64*-*-freebsd*)
+@@ -343,6 +347,10 @@ aarch64*-*-freebsd*)
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm"
md_unwind_header=aarch64/freebsd-unwind.h
;;
@@ -7439,7 +7375,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
aarch64*-*-linux*)
extra_parts="$extra_parts crtfastmath.o"
md_unwind_header=aarch64/linux-unwind.h
-@@ -394,6 +402,12 @@ arm*-*-freebsd*) # ARM FreeBSD EABI
+@@ -395,6 +403,12 @@ arm*-*-freebsd*) # ARM FreeBSD EABI
unwind_header=config/arm/unwind-arm.h
tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
;;
@@ -7452,7 +7388,7 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
arm*-*-netbsdelf*)
tmake_file="$tmake_file arm/t-arm arm/t-netbsd t-slibgcc-gld-nover"
;;
-@@ -588,6 +602,9 @@ i[34567]86-*-elf*)
+@@ -589,6 +603,9 @@ i[34567]86-*-elf*)
x86_64-*-elf* | x86_64-*-rtems*)
tmake_file="$tmake_file i386/t-crtstuff t-crtstuff-pic t-libgcc-pic"
;;
@@ -7755,15 +7691,15 @@ LANG=C git diff --no-renames bb85d61e6bfbadee4494e034a5d8187cf0626aed 1604249e38
+#endif // _EXT_OPT_RANDOM_H
--- a/src/libstdc++-v3/include/ext/random
+++ b/src/libstdc++-v3/include/ext/random
-@@ -184,6 +184,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
+@@ -183,6 +183,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
+ {
#ifdef __SSE2__
__m128i _M_state[_M_nstate];
- #endif
++#endif
+#ifdef __ARM_NEON
+#ifdef __aarch64__
+ __Uint32x4_t _M_state[_M_nstate];
+#endif
-+#endif
+ #endif
uint32_t _M_state32[_M_nstate32];
result_type _M_stateT[state_size];
- } __attribute__ ((__aligned__ (16)));
--
Alioth's /usr/local/bin/git-commit-notice on /srv/git.debian.org/git/reproducible/gcc-7.git
More information about the Reproducible-commits
mailing list