[tbb] 37/64: Imported Debian patch 4.1~20130613-1.1~exp1
Graham Inggs
ginggs at moszumanska.debian.org
Mon Jul 3 12:28:00 UTC 2017
This is an automated email from the git hooks/post-receive script.
ginggs pushed a commit to branch master
in repository tbb.
commit 4b57e9028837a2d5b90d6476c4acf00a58258146
Merge: 07deee8 5143d74
Author: Mathieu Malaterre <malat at debian.org>
Date: Sat Jul 6 15:01:19 2013 +0200
Imported Debian patch 4.1~20130613-1.1~exp1
CHANGES | 27 ++
Makefile | 2 +-
README | 2 +-
build/FreeBSD.gcc.inc | 2 +-
build/Makefile.test | 74 ++++--
build/android.gcc.inc | 2 +-
build/common_rules.inc | 19 +-
build/generate_tbbvars.sh | 25 +-
build/linux.gcc.inc | 4 +-
build/linux.icc.inc | 5 +-
build/macos.icc.inc | 2 +-
build/macos.inc | 2 +-
build/mic.icc.inc | 2 +-
build/mic.linux.inc | 2 +-
build/windows.icl.inc | 2 +-
build/windows.inc | 5 +-
debian/changelog | 8 +
debian/patches/series | 2 +
.../tbb40_20120613oss-0001-Endianness.patch | 42 +++
.../tbb40_20120613oss-0002-ARM-support.patch | 240 +++++++++++++++++
...s-0003-Add-machine_fetchadd-48-intrinsics.patch | 157 +++++++++++
debian/patches/toto | 11 +
doc/html/a00031.html | 4 +
doc/html/a00169.html | 1 +
doc/html/a00268.html | 3 +
doc/html/a00285.html | 17 ++
doc/html/a00428.html | 2 +-
doc/html/functions_0x61.html | 2 +-
doc/html/functions_0x6f.html | 2 +-
doc/html/functions_func.html | 2 +-
doc/html/functions_func_0x6f.html | 2 +-
.../GettingStarted/sub_string_finder/index.html | 2 +-
examples/common/copy_libraries.bat | 25 +-
examples/common/gui/Makefile.gmake | 4 +-
.../concurrent_hash_map/count_strings/index.html | 2 +-
.../concurrent_priority_queue/shortpath/index.html | 2 +-
examples/graph/binpack/index.html | 2 +-
examples/graph/dining_philosophers/index.html | 2 +-
examples/graph/logic_sim/index.html | 2 +-
examples/index.html | 18 +-
examples/parallel_do/parallel_preorder/index.html | 2 +-
examples/parallel_for/game_of_life/index.html | 2 +-
examples/parallel_for/polygon_overlay/Makefile | 6 +-
examples/parallel_for/polygon_overlay/index.html | 2 +-
examples/parallel_for/seismic/Makefile | 6 +-
examples/parallel_for/seismic/index.html | 4 +-
examples/parallel_for/tachyon/Makefile | 2 +-
examples/parallel_for/tachyon/index.html | 2 +-
examples/parallel_reduce/convex_hull/index.html | 2 +-
examples/parallel_reduce/primes/index.html | 2 +-
examples/pipeline/square/index.html | 2 +-
examples/task/tree_sum/index.html | 2 +-
examples/task_group/sudoku/index.html | 2 +-
examples/task_priority/fractal/Makefile | 6 +-
examples/task_priority/fractal/index.html | 2 +-
examples/test_all/fibonacci/index.html | 2 +-
include/tbb/compat/tuple | 294 ++++++++++-----------
include/tbb/concurrent_hash_map.h | 9 +-
include/tbb/concurrent_priority_queue.h | 38 ++-
include/tbb/flow_graph.h | 47 ++--
include/tbb/internal/_concurrent_queue_impl.h | 10 +-
include/tbb/internal/_flow_graph_node_impl.h | 4 +
include/tbb/machine/linux_ia32.h | 2 +-
include/tbb/machine/macos_common.h | 8 +-
include/tbb/machine/mic_common.h | 2 +-
include/tbb/machine/windows_ia32.h | 2 +-
include/tbb/memory_pool.h | 2 +-
include/tbb/partitioner.h | 2 +-
include/tbb/tbb_config.h | 2 +-
include/tbb/tbb_machine.h | 37 ++-
include/tbb/tbb_stddef.h | 4 +-
src/Makefile | 4 +
src/index.html | 2 +-
src/old/concurrent_queue_v2.cpp | 13 +-
src/old/concurrent_vector_v2.cpp | 8 +-
src/old/spin_rw_mutex_v2.cpp | 8 +-
src/rml/server/irml.rc | 2 +-
src/rml/server/rml_server.cpp | 18 +-
src/rml/test/test_thread_monitor.cpp | 2 +-
src/tbb/cilk-tbb-interop.h | 3 +-
src/tbb/concurrent_queue.cpp | 15 +-
src/tbb/dynamic_link.h | 2 +-
src/tbb/governor.cpp | 2 +-
src/tbb/index.html | 2 +-
src/tbb/mac32-tbb-export.lst | 2 +-
src/tbb/mac64-tbb-export.lst | 2 +-
src/tbb/mailbox.h | 3 +-
src/tbb/queuing_rw_mutex.cpp | 4 +-
src/tbb/scheduler.cpp | 45 ++--
src/tbb/spin_rw_mutex.cpp | 6 +-
src/tbb/tbb_assert_impl.h | 3 +-
src/tbb/tbb_misc.cpp | 14 +-
src/tbb/tbb_resource.rc | 2 +-
src/tbb/tools_api/ittnotify.h | 3 +-
src/tbb/tools_api/ittnotify_config.h | 2 +-
src/tbbmalloc/MapMemory.h | 2 +-
src/tbbmalloc/backend.cpp | 13 -
src/tbbmalloc/frontend.cpp | 31 ++-
src/tbbmalloc/tbbmalloc.cpp | 12 +-
src/tbbmalloc/tbbmalloc_internal.h | 135 +++++-----
src/test/harness.h | 105 ++++++--
src/test/harness_allocator.h | 2 +-
src/test/harness_concurrency.h | 113 ++++++++
src/test/harness_defs.h | 8 +-
src/test/harness_graph.h | 4 +-
src/test/harness_inject_scheduler.h | 12 +
src/test/harness_memory.h | 2 +-
src/test/test_atomic.cpp | 24 +-
src/test/test_cilk_dynamic_load.cpp | 8 +-
src/test/test_concurrent_hash_map.cpp | 4 +-
src/test/test_concurrent_priority_queue.cpp | 98 ++++++-
src/test/test_concurrent_unordered.cpp | 9 +-
src/test/test_concurrent_vector.cpp | 35 +--
src/test/test_fast_random.cpp | 20 +-
src/test/test_hw_concurrency.cpp | 59 +----
src/test/test_initializer_list.h | 71 +++++
src/test/test_intrusive_list.cpp | 2 +-
src/test/test_malloc_compliance.cpp | 8 +-
src/test/test_runtime_loader.cpp | 2 +-
src/test/test_task_assertions.cpp | 20 +-
src/test/test_task_enqueue.cpp | 2 +-
src/test/test_task_group.cpp | 8 +
src/test/test_task_leaks.cpp | 17 +-
src/test/test_task_priority.cpp | 14 +-
src/test/test_tbb_header.cpp | 6 +
src/test/test_tbb_version.cpp | 2 +-
126 files changed, 1530 insertions(+), 725 deletions(-)
diff --cc debian/changelog
index bbd2ff1,0000000..f644654
mode 100644,000000..100644
--- a/debian/changelog
+++ b/debian/changelog
@@@ -1,174 -1,0 +1,182 @@@
++tbb (4.1~20130613-1.1~exp1) experimental; urgency=low
++
++ * Non-maintainer upload.
++ * Upload 4.1, update 4
++ * Import patches for armhf (from 4.0+r233+update5-0.2)
++
++ -- Mathieu Malaterre <malat at debian.org> Sat, 06 Jul 2013 15:01:19 +0200
++
+tbb (4.1~20130516-1.1~exp1) experimental; urgency=low
+
+ * Non-maintainer upload.
+ * Upload 4.1, update 3. Closes: #695683
+ * Switch to dh/9. Get harderning compilation
+ * Add d/watch. Closes: #695683
+ * Use d/rules to generate version. Closes: #712146
+ * Build PowerPC/SPE. Closes: #695685
+ * Use new d/rules. Bump Std-Vers: 3.9.4
+
+ -- Mathieu Malaterre <malat at debian.org> Fri, 05 Jul 2013 09:06:21 +0200
+
+tbb (4.0+r233+update5-0.2) unstable; urgency=low
+
+ * Non-maintainer upload.
+ * Add armhf to the list of supported arches in debian/control, now that
+ ARMv7 support is there. Not (yet) worth doing for armel.
+
+ -- Steve McIntyre <steve.mcintyre at linaro.org> Mon, 24 Jun 2013 17:05:45 +0100
+
+tbb (4.0+r233+update5-0.1) unstable; urgency=low
+
+ * Non-maintainer upload.
+ * Updated to upstream 4.0 Update 5 release.
+ + Added 64-bit PowerPC support
+ * Applied ARMv7-A support patches from linaro. (Closes: #692033)
+
+ -- Andrew Lee (李健秋) <ajqlee at debian.org> Wed, 12 Jun 2013 13:57:09 +0800
+
+tbb (4.0+r233-1) unstable; urgency=low
+
+ * New upstream release
+ + Add 32-bit PowerPC support
+ * Update to Standards-Version 3.9.2 (no changes)
+ * Add note to package descriptions that Pentium4-compatible and higher is
+ supported for i386 architecture users (Closes: #642248)
+ * Do not run test suite when DEB_BUILD_OPTIONS=nocheck (Closes: #642251)
+ * Do not ignore 'make clean' errors (Closes: #642242)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sat, 24 Sep 2011 17:16:45 -0400
+
+tbb (3.0+r147-1) unstable; urgency=low
+
+ * New upstream release
+ * debian/copyright: update years
+ * debian/control: Add ppc64 to the Architecture fields
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Thu, 31 Mar 2011 15:02:52 -0400
+
+tbb (3.0+r035-2) unstable; urgency=low
+
+ * Make examples build properly (Closes: #608347)
+ + Ship common Makefile snippets from upstream
+ + Document that upstream's _debug library versions are not shipped
+ * Update to Standards-Version 3.9.1 (no changes)
+
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Fri, 31 Dec 2010 15:21:02 -0500
+
+tbb (3.0+r035-1) unstable; urgency=low
+
+ * New upstream release
+ * Update to Standards-Version 3.9.0 (no changes)
+ * Switch to dpkg-source 3.0 (quilt) format
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Mon, 28 Jun 2010 19:29:45 -0400
+
+tbb (3.0+r018-1) unstable; urgency=low
+
+ * New upstream release (Closes: #581614)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sat, 15 May 2010 07:58:17 -0400
+
+tbb (2.2+r013-1) unstable; urgency=low
+
+ * New upstream release
+ * debian/copyright: update years
+ * Update to Standards-Version 3.8.4 (no changes)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sat, 20 Feb 2010 12:22:19 -0500
+
+tbb (2.2+r012-1) unstable; urgency=low
+
+ * New upstream release
+ * Update pkg-config metadata file
+ * Add ${misc:Depends} as recommended by lintian
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Wed, 27 Jan 2010 09:50:16 -0500
+
+tbb (2.2+r009-1) unstable; urgency=low
+
+ * New upstream release
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sun, 18 Oct 2009 14:50:25 -0400
+
+tbb (2.2+r004-1) unstable; urgency=low
+
+ * New upstream release (Closes: #545702)
+ * Update to Standards-Version 3.8.3 (no changes)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Wed, 09 Sep 2009 17:22:22 -0400
+
+tbb (2.1r017-1) unstable; urgency=low
+
+ * New upstream release
+ * Change libtbb2-dbg to section debug for new archive layout
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sun, 10 May 2009 21:15:34 -0400
+
+tbb (2.1r015-1) unstable; urgency=low
+
+ * New upstream release
+ * 02_replace_arch_command.dpatch: merged upstream
+ * Remove build dependency on dpatch and modify debian-rules accordingly
+ * Add .pc file to help when building against the library
+ * Update to Standards-Version 3.8.1 (no changes)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Tue, 17 Mar 2009 15:52:47 -0400
+
+tbb (2.1~20080605-1) unstable; urgency=low
+
+ * New upstream release
+ * Drop patches
+ - 01_add_soname: suitable fascimile implemented upstream
+ - 03_ias_patch: upstream now using as instead of ias
+ * Update to Standards-Version 3.8.0 (no changes)
+ * Add new upstream Doxygen documentation (in libtbb-doc package)
+ * Register new documentation with doc-base
+ * debian/copyright: Update years of copyright
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Tue, 08 Jul 2008 18:51:22 -0400
+
+tbb (2.0r020-1) unstable; urgency=low
+
+ * New upstream release.
+ * debian/patches/04_g++-4.3.dpatch: Removed, integrated upstream
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Tue, 29 Apr 2008 15:31:09 -0400
+
+tbb (2.0r017-1) unstable; urgency=low
+
+ * New upstream release.
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Sat, 08 Mar 2008 22:15:13 -0500
+
+tbb (2.0r014-4) unstable; urgency=low
+
+ * Make tbb-examples recommend libtbb-dev.
+ * Make libtbb-dev suggest tbb-examples.
+ * Patch to allow building with g++-4.3 (Closes: #462415)
+ * Only conditionally create symlink (Closes: #465617)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Thu, 14 Feb 2008 18:36:15 -0500
+
+tbb (2.0r014-3) unstable; urgency=low
+
+ * Fix short descriptions of tbb-examples (Closes: #457442)
+ * Fix short descriptions of libtbb2-dbg (Closes: #457443)
+ * Add patch to allow build to succeed on Itanium
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Thu, 3 Jan 2008 15:21:50 -0500
+
+tbb (2.0r014-2) unstable; urgency=low
+
+ * debian/copyright: Fix license statement.
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Wed, 19 Dec 2007 21:17:16 -0500
+
+tbb (2.0r014-1) unstable; urgency=low
+
+ * Initial release (Closes: #434583)
+
+ -- Roberto C. Sanchez <roberto at connexer.com> Fri, 14 Dec 2007 23:10:58 -0500
+
diff --cc debian/patches/series
index 0000000,0000000..03ca13b
new file mode 100644
--- /dev/null
+++ b/debian/patches/series
@@@ -1,0 -1,0 +1,2 @@@
++tbb40_20120613oss-0002-ARM-support.patch
++tbb40_20120613oss-0003-Add-machine_fetchadd-48-intrinsics.patch
diff --cc debian/patches/tbb40_20120613oss-0001-Endianness.patch
index 0000000,0000000..71fc039
new file mode 100644
--- /dev/null
+++ b/debian/patches/tbb40_20120613oss-0001-Endianness.patch
@@@ -1,0 -1,0 +1,42 @@@
++From 2abd332fee526be68a0c30d1175599056a79f917 Mon Sep 17 00:00:00 2001
++From: Steve Capper <steve.capper at linaro.org>
++Date: Tue, 28 Aug 2012 04:11:16 -0400
++Subject: [PATCH 1/3] Endianness
++
++Fix the __TBB_BIG_ENDIAN preprocessor logic to correctly identify
++the unknown (at compile time) endianess check.
++
++Signed-off-by: Steve Capper <steve.capper at linaro.org>
++---
++ include/tbb/tbb_machine.h | 5 +++--
++ 1 file changed, 3 insertions(+), 2 deletions(-)
++
++diff --git a/include/tbb/tbb_machine.h b/include/tbb/tbb_machine.h
++index 6c83942..803fcda 100644
++--- a/include/tbb/tbb_machine.h
+++++ b/include/tbb/tbb_machine.h
++@@ -378,10 +378,12 @@ void spin_wait_until_eq( const volatile T& location, const U value ) {
++ // - The operation assumes that the architecture consistently uses either little-endian or big-endian:
++ // it does not support mixed-endian or page-specific bi-endian architectures.
++ // This function is the only use of __TBB_BIG_ENDIAN.
++-#if (__TBB_BIG_ENDIAN!=-1)
+++#if (__TBB_BIG_ENDIAN==-1)
++ #if ( __TBB_USE_GENERIC_PART_WORD_CAS)
++ #error generic implementation of part-word CAS was explicitly disabled for this configuration
++ #endif
+++#endif
+++
++ template<typename T>
++ inline T __TBB_MaskedCompareAndSwap (volatile T * const ptr, const T value, const T comparand ) {
++ struct endianness{ static bool is_big_endian(){
++@@ -419,7 +421,6 @@ inline T __TBB_MaskedCompareAndSwap (volatile T * const ptr, const T value, cons
++ else continue; // CAS failed but the bits of interest left unchanged
++ }
++ }
++-#endif
++ template<size_t S, typename T>
++ inline T __TBB_CompareAndSwapGeneric (volatile void *ptr, T value, T comparand );
++
++--
++1.7.11.4
++
diff --cc debian/patches/tbb40_20120613oss-0002-ARM-support.patch
index 0000000,0000000..58c4cc7
new file mode 100644
--- /dev/null
+++ b/debian/patches/tbb40_20120613oss-0002-ARM-support.patch
@@@ -1,0 -1,0 +1,240 @@@
++From 5690a53639758f6a15c0d2a60acea4aa86ae9209 Mon Sep 17 00:00:00 2001
++From: Steve Capper <steve.capper at linaro.org>
++Date: Tue, 28 Aug 2012 07:11:51 -0400
++Subject: [PATCH 2/3] ARM support.
++
++Add ARMv7 support to libTBB.
++
++Signed-off-by: Steve Capper <steve.capper at linaro.org>
++---
++ build/linux.gcc.inc | 5 ++
++ build/linux.inc | 6 ++
++ include/tbb/machine/linux_armv7.h | 177 ++++++++++++++++++++++++++++++++++++++
++ include/tbb/tbb_machine.h | 2 +
++ src/tbbmalloc/frontend.cpp | 8 +-
++ src/test/harness.h | 2 +-
++ 6 files changed, 198 insertions(+), 2 deletions(-)
++ create mode 100644 include/tbb/machine/linux_armv7.h
++
++Index: tbb41_20130613oss/build/linux.gcc.inc
++===================================================================
++--- tbb41_20130613oss.orig/build/linux.gcc.inc 2013-06-19 16:53:57.000000000 +0200
+++++ tbb41_20130613oss/build/linux.gcc.inc 2013-07-06 15:04:59.000000000 +0200
++@@ -120,6 +120,11 @@
++ CPLUS_FLAGS += -Wa,-mimplicit-it=thumb
++ endif
++
+++# automatically generate "IT" instructions when compiling for Thumb ISA
+++ifeq (armv7,$(arch))
+++ CPLUS_FLAGS += -Wa,-mimplicit-it=thumb
+++endif
+++
++ #------------------------------------------------------------------------------
++ # Setting assembler data.
++ #------------------------------------------------------------------------------
++Index: tbb41_20130613oss/build/linux.inc
++===================================================================
++--- tbb41_20130613oss.orig/build/linux.inc 2013-06-19 16:53:56.000000000 +0200
+++++ tbb41_20130613oss/build/linux.inc 2013-07-06 15:04:59.000000000 +0200
++@@ -59,6 +59,9 @@
++ ifeq ($(uname_m),armv71)
++ export arch :=armv7
++ endif
+++ ifeq ($(uname_m),armv7l)
+++ export arch:=armv7
+++ endif
++ ifndef arch
++ export arch:=$(uname_m)
++ endif
++@@ -109,6 +112,9 @@
++ endif
++ ifeq ($(arch),armv7)
++ def_prefix = lin32
+++endif
+++ifeq ($(arch),armv7)
+++ def_prefix = lin32
++ endif
++ ifeq (,$(def_prefix))
++ ifeq (64,$(findstring 64,$(arch)))
++Index: tbb41_20130613oss/include/tbb/machine/linux_armv7.h
++===================================================================
++--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++++ tbb41_20130613oss/include/tbb/machine/linux_armv7.h 2013-07-06 15:04:59.000000000 +0200
++@@ -0,0 +1,177 @@
+++/*
+++ Copyright 2012 ARM Limited All Rights Reserved.
+++
+++ This file is part of Threading Building Blocks.
+++
+++ Threading Building Blocks is free software; you can redistribute it
+++ and/or modify it under the terms of the GNU General Public License
+++ version 2 as published by the Free Software Foundation.
+++
+++ Threading Building Blocks is distributed in the hope that it will be
+++ useful, but WITHOUT ANY WARRANTY; without even the implied warranty
+++ of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+++ GNU General Public License for more details.
+++
+++ You should have received a copy of the GNU General Public License
+++ along with Threading Building Blocks; if not, write to the Free Software
+++ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+++
+++ As a special exception, you may use this file as part of a free software
+++ library without restriction. Specifically, if other files instantiate
+++ templates or use macros or inline functions from this file, or you compile
+++ this file and link it with other files to produce an executable, this
+++ file does not by itself cause the resulting executable to be covered by
+++ the GNU General Public License. This exception does not however
+++ invalidate any other reasons why the executable file might be covered by
+++ the GNU General Public License.
+++*/
+++
+++/*
+++ This is the TBB implementation for the ARMv7-a architecture.
+++*/
+++
+++#ifndef __TBB_machine_H
+++#error Do not include this file directly; include tbb_machine.h instead
+++#endif
+++
+++#if !(__ARM_ARCH_7A__)
+++#error Threading Building Blocks ARM port requires an ARMv7-a architecture.
+++#endif
+++
+++#include <sys/param.h>
+++#include <unistd.h>
+++
+++#define __TBB_WORDSIZE 4
+++
+++#ifndef __BYTE_ORDER__
+++ // Hopefully endianness can be validly determined at runtime.
+++ // This may silently fail in some embedded systems with page-specific endianness.
+++#elif __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
+++ #define __TBB_BIG_ENDIAN 1
+++#elif __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
+++ #define __TBB_BIG_ENDIAN 0
+++#else
+++ #define __TBB_BIG_ENDIAN -1 // not currently supported
+++#endif
+++
+++
+++#define __TBB_compiler_fence() __asm__ __volatile__("": : :"memory")
+++#define __TBB_control_consistency_helper() __TBB_compiler_fence()
+++
+++#define __TBB_armv7_inner_shareable_barrier() __asm__ __volatile__("dmb ish": : :"memory")
+++#define __TBB_acquire_consistency_helper() __TBB_armv7_inner_shareable_barrier()
+++#define __TBB_release_consistency_helper() __TBB_armv7_inner_shareable_barrier()
+++#define __TBB_full_memory_fence() __TBB_armv7_inner_shareable_barrier()
+++
+++
+++//--------------------------------------------------
+++// Compare and swap
+++//--------------------------------------------------
+++
+++/**
+++ * Atomic CAS for 32 bit values, if *ptr==comparand, then *ptr=value, returns *ptr
+++ * @param ptr pointer to value in memory to be swapped with value if *ptr==comparand
+++ * @param value value to assign *ptr to if *ptr==comparand
+++ * @param comparand value to compare with *ptr
+++ * @return value originally in memory at ptr, regardless of success
+++*/
+++static inline int32_t __TBB_machine_cmpswp4(volatile void *ptr, int32_t value, int32_t comparand )
+++{
+++ int32_t oldval, res;
+++
+++ __TBB_full_memory_fence();
+++
+++ do {
+++ __asm__ __volatile__(
+++ "ldrex %1, [%3]\n"
+++ "mov %0, #0\n"
+++ "cmp %1, %4\n"
+++ "strexeq %0, %5, [%3]\n"
+++ : "=&r" (res), "=&r" (oldval), "+Qo" (*(volatile int32_t*)ptr)
+++ : "r" ((int32_t *)ptr), "Ir" (comparand), "r" (value)
+++ : "cc");
+++ } while (res);
+++
+++ __TBB_full_memory_fence();
+++
+++ return oldval;
+++}
+++
+++/**
+++ * Atomic CAS for 64 bit values, if *ptr==comparand, then *ptr=value, returns *ptr
+++ * @param ptr pointer to value in memory to be swapped with value if *ptr==comparand
+++ * @param value value to assign *ptr to if *ptr==comparand
+++ * @param comparand value to compare with *ptr
+++ * @return value originally in memory at ptr, regardless of success
+++ */
+++static inline int64_t __TBB_machine_cmpswp8(volatile void *ptr, int64_t value, int64_t comparand )
+++{
+++ int64_t oldval;
+++ int32_t res;
+++
+++ __TBB_full_memory_fence();
+++
+++ do {
+++ __asm__ __volatile__(
+++ "mov %0, #0\n"
+++ "ldrexd %1, %H1, [%3]\n"
+++ "cmp %1, %4\n"
+++ "cmpeq %H1, %H4\n"
+++ "strexdeq %0, %5, %H5, [%3]"
+++ : "=&r" (res), "=&r" (oldval), "+Qo" (*(volatile int64_t*)ptr)
+++ : "r" ((int64_t *)ptr), "r" (comparand), "r" (value)
+++ : "cc");
+++ } while (res);
+++
+++ __TBB_full_memory_fence();
+++
+++ return oldval;
+++}
+++
+++inline void __TBB_machine_pause (int32_t delay )
+++{
+++ while(delay>0)
+++ {
+++ __TBB_compiler_fence();
+++ delay--;
+++ }
+++}
+++
+++namespace tbb {
+++namespace internal {
+++ template <typename T, size_t S>
+++ struct machine_load_store_relaxed {
+++ static inline T load ( const volatile T& location ) {
+++ const T value = location;
+++
+++ /*
+++ * An extra memory barrier is required for errata #761319
+++ * Please see http://infocenter.arm.com/help/topic/com.arm.doc.uan0004a
+++ */
+++ __TBB_armv7_inner_shareable_barrier();
+++ return value;
+++ }
+++
+++ static inline void store ( volatile T& location, T value ) {
+++ location = value;
+++ }
+++ };
+++}} // namespaces internal, tbb
+++
+++// Machine specific atomic operations
+++
+++#define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4(P,V,C)
+++#define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8(P,V,C)
+++#define __TBB_CompareAndSwapW(P,V,C) __TBB_machine_cmpswp4(P,V,C)
+++#define __TBB_Pause(V) __TBB_machine_pause(V)
+++
+++// Use generics for some things
+++#define __TBB_USE_GENERIC_PART_WORD_CAS 1
+++#define __TBB_USE_GENERIC_PART_WORD_FETCH_ADD 1
+++#define __TBB_USE_GENERIC_PART_WORD_FETCH_STORE 1
+++#define __TBB_USE_GENERIC_FETCH_ADD 1
+++#define __TBB_USE_GENERIC_FETCH_STORE 1
+++#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
+++#define __TBB_USE_GENERIC_DWORD_LOAD_STORE 1
+++#define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
+++
diff --cc debian/patches/tbb40_20120613oss-0003-Add-machine_fetchadd-48-intrinsics.patch
index 0000000,0000000..6e9ede0
new file mode 100644
--- /dev/null
+++ b/debian/patches/tbb40_20120613oss-0003-Add-machine_fetchadd-48-intrinsics.patch
@@@ -1,0 -1,0 +1,157 @@@
++From 327bde31309e8ce049f427f538c30af567d3783e Mon Sep 17 00:00:00 2001
++From: Steve Capper <steve.capper at linaro.org>
++Date: Tue, 28 Aug 2012 07:20:08 -0400
++Subject: [PATCH 3/3] Add machine_fetchadd[48] intrinsics.
++
++Unfortunately ittnotify also requires its own copy of fetchadd4.
++
++Signed-off-by: Steve Capper <steve.capper at linaro.org>
++---
++ include/tbb/machine/linux_armv7.h | 49 ++++++++++++++++++++++++++++++++++--
++ src/tbb/tools_api/ittnotify.h | 2 +-
++ src/tbb/tools_api/ittnotify_config.h | 32 ++++++++++++++++++++++-
++ 3 files changed, 79 insertions(+), 4 deletions(-)
++
++Index: tbb41_20130613oss/include/tbb/machine/linux_armv7.h
++===================================================================
++--- tbb41_20130613oss.orig/include/tbb/machine/linux_armv7.h 2013-07-06 15:04:59.000000000 +0200
+++++ tbb41_20130613oss/include/tbb/machine/linux_armv7.h 2013-07-06 15:05:05.000000000 +0200
++@@ -128,6 +128,53 @@
++ return oldval;
++ }
++
+++static inline int32_t __TBB_machine_fetchadd4(volatile void* ptr, int32_t addend)
+++{
+++ unsigned long tmp;
+++ int32_t result, tmp2;
+++
+++ __TBB_full_memory_fence();
+++
+++ __asm__ __volatile__(
+++"1: ldrex %0, [%4]\n"
+++" add %3, %0, %5\n"
+++" strex %1, %3, [%4]\n"
+++" cmp %1, #0\n"
+++" bne 1b\n"
+++ : "=&r" (result), "=&r" (tmp), "+Qo" (*(volatile int32_t*)ptr), "=&r"(tmp2)
+++ : "r" ((int32_t *)ptr), "Ir" (addend)
+++ : "cc");
+++
+++ __TBB_full_memory_fence();
+++
+++ return result;
+++}
+++
+++static inline int64_t __TBB_machine_fetchadd8(volatile void *ptr, int64_t addend)
+++{
+++ unsigned long tmp;
+++ int64_t result, tmp2;
+++
+++ __TBB_full_memory_fence();
+++
+++ __asm__ __volatile__(
+++"1: ldrexd %0, %H0, [%4]\n"
+++" adds %3, %0, %5\n"
+++" adc %H3, %H0, %H5\n"
+++" strexd %1, %3, %H3, [%4]\n"
+++" cmp %1, #0\n"
+++" bne 1b"
+++ : "=&r" (result), "=&r" (tmp), "+Qo" (*(volatile int64_t*)ptr), "=&r"(tmp2)
+++ : "r" ((int64_t *)ptr), "r" (addend)
+++ : "cc");
+++
+++
+++ __TBB_full_memory_fence();
+++
+++ return result;
+++}
+++
+++
++ inline void __TBB_machine_pause (int32_t delay )
++ {
++ while(delay>0)
++@@ -169,9 +216,7 @@
++ #define __TBB_USE_GENERIC_PART_WORD_CAS 1
++ #define __TBB_USE_GENERIC_PART_WORD_FETCH_ADD 1
++ #define __TBB_USE_GENERIC_PART_WORD_FETCH_STORE 1
++-#define __TBB_USE_GENERIC_FETCH_ADD 1
++ #define __TBB_USE_GENERIC_FETCH_STORE 1
++ #define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
++ #define __TBB_USE_GENERIC_DWORD_LOAD_STORE 1
++ #define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
++-
++Index: tbb41_20130613oss/src/tbb/tools_api/ittnotify.h
++===================================================================
++--- tbb41_20130613oss.orig/src/tbb/tools_api/ittnotify.h 2013-06-19 16:53:52.000000000 +0200
+++++ tbb41_20130613oss/src/tbb/tools_api/ittnotify.h 2013-07-06 15:05:05.000000000 +0200
++@@ -153,7 +153,7 @@
++ # if ITT_PLATFORM==ITT_PLATFORM_WIN
++ # define CDECL __cdecl
++ # else /* ITT_PLATFORM==ITT_PLATFORM_WIN */
++-# if defined _M_X64 || defined _M_AMD64 || defined __x86_64__
+++# if defined _M_X64 || defined _M_AMD64 || defined __x86_64__ || defined __arm__
++ # define CDECL /* not actual on x86_64 platform */
++ # else /* _M_X64 || _M_AMD64 || __x86_64__ */
++ # define CDECL __attribute__ ((cdecl))
++Index: tbb41_20130613oss/src/tbb/tools_api/ittnotify_config.h
++===================================================================
++--- tbb41_20130613oss.orig/src/tbb/tools_api/ittnotify_config.h 2013-06-19 16:53:52.000000000 +0200
+++++ tbb41_20130613oss/src/tbb/tools_api/ittnotify_config.h 2013-07-06 15:05:05.000000000 +0200
++@@ -86,7 +86,7 @@
++ # if ITT_PLATFORM==ITT_PLATFORM_WIN
++ # define CDECL __cdecl
++ # else /* ITT_PLATFORM==ITT_PLATFORM_WIN */
++-# if defined _M_X64 || defined _M_AMD64 || defined __x86_64__
+++# if defined _M_X64 || defined _M_AMD64 || defined __x86_64__ || defined __arm__
++ # define CDECL /* not actual on x86_64 platform */
++ # else /* _M_X64 || _M_AMD64 || __x86_64__ */
++ # define CDECL __attribute__ ((cdecl))
++@@ -144,11 +144,17 @@
++ # define ITT_ARCH_IA64 3
++ #endif /* ITT_ARCH_IA64 */
++
+++#ifndef ITT_ARCH_ARM
+++# define ITT_ARCH_ARM 4
+++#endif /* ITT_ARCH_ARM */
+++
++ #ifndef ITT_ARCH
++ # if defined _M_X64 || defined _M_AMD64 || defined __x86_64__
++ # define ITT_ARCH ITT_ARCH_IA32E
++ # elif defined _M_IA64 || defined __ia64
++ # define ITT_ARCH ITT_ARCH_IA64
+++# elif defined __arm__
+++# define ITT_ARCH ITT_ARCH_ARM
++ # else
++ # define ITT_ARCH ITT_ARCH_IA32
++ # endif
++@@ -258,6 +264,30 @@
++ #else /* __INTEL_COMPILER */
++ /* TODO: Add Support for not Intel compilers for IA-64 architecture*/
++ #endif /* __INTEL_COMPILER */
+++#elif ITT_ARCH==ITT_ARCH_ARM
+++#define __TBB_armv7_inner_shareable_barrier() __asm__ __volatile__("dmb ish": : :"memory")
+++#define __TBB_full_memory_fence() __TBB_armv7_inner_shareable_barrier()
+++INLINE int32_t __TBB_machine_fetchadd4(volatile void* ptr, int32_t addend)
+++{
+++ unsigned long tmp;
+++ int32_t result, tmp2;
+++
+++ __TBB_full_memory_fence();
+++
+++ __asm__ __volatile__(
+++"1: ldrex %0, [%4]\n"
+++" add %3, %0, %5\n"
+++" strex %1, %3, [%4]\n"
+++" cmp %1, #0\n"
+++" bne 1b\n"
+++ : "=&r" (result), "=&r" (tmp), "+Qo" (*(volatile int32_t*)ptr), "=&r"(tmp2)
+++ : "r" ((int32_t *)ptr), "Ir" (addend)
+++ : "cc");
+++
+++ __TBB_full_memory_fence();
+++
+++ return result;
+++}
++ #else /* ITT_ARCH!=ITT_ARCH_IA64 */
++ INLINE int __TBB_machine_fetchadd4(volatile void* ptr, long addend)
++ {
diff --cc debian/patches/toto
index 0000000,0000000..48b1a78
new file mode 100644
--- /dev/null
+++ b/debian/patches/toto
@@@ -1,0 -1,0 +1,11 @@@
++Index: tbb41_20130613oss/README
++===================================================================
++--- tbb41_20130613oss.orig/README 2013-07-06 15:04:22.000000000 +0200
+++++ tbb41_20130613oss/README 2013-07-06 15:04:24.000000000 +0200
++@@ -1,5 +1,6 @@
++ Intel(R) Threading Building Blocks - README
++
+++
++ See index.html for directions and documentation.
++
++ If source is present (./Makefile and src/ directories),
--
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