r2642 - trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches
Sven Luther
luther@costa.debian.org
Tue, 08 Mar 2005 10:18:04 +0100
Author: luther
Date: 2005-03-08 10:18:03 +0100 (Tue, 08 Mar 2005)
New Revision: 2642
Modified:
trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/powerpc-pegasos-marvell.dpatch
Log:
Builds now. Should at least :/
Modified: trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/powerpc-pegasos-marvell.dpatch
===================================================================
--- trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/powerpc-pegasos-marvell.dpatch 2005-03-08 09:05:56 UTC (rev 2641)
+++ trunk/kernel/source/kernel-source-2.6.11-2.6.11/debian/patches/powerpc-pegasos-marvell.dpatch 2005-03-08 09:18:03 UTC (rev 2642)
@@ -9,8 +9,133 @@
. $(dirname $0)/DPATCH
@DPATCH@
+diff -Nur kernel-source-2.6.11/arch/ppc/platforms/chrp_setup.c kernel-source-2.6.11-marvell/arch/ppc/platforms/chrp_setup.c
+--- kernel-source-2.6.11/arch/ppc/platforms/chrp_setup.c 2005-03-02 08:38:25.000000000 +0100
++++ kernel-source-2.6.11-marvell/arch/ppc/platforms/chrp_setup.c 2005-03-08 07:37:10.000000000 +0100
+@@ -217,6 +217,95 @@
+ }
+ }
+
++/* Pegasos 2 specific Marvell MV 64361 gigabit ethernet port setup */
++#ifdef CONFIG_MV643XX_ETH
++#include <linux/mv643xx.h>
++static struct resource mv643xx_eth_shared_resources[] = {
++ [0] = {
++ .name = "ethernet shared base",
++ .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
++ .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
++ MV643XX_ETH_SHARED_REGS_SIZE - 1,
++ .flags = IORESOURCE_MEM,
++ },
++};
++
++static struct platform_device mv643xx_eth_shared_device = {
++ .name = MV643XX_ETH_SHARED_NAME,
++ .id = 0,
++ .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
++ .resource = mv643xx_eth_shared_resources,
++};
++
++#ifdef CONFIG_MV643XX_ETH_0
++static struct resource mv643xx_eth0_resources[] = {
++ [0] = {
++ .name = "eth0 irq",
++ .start = 9,
++ .end = 9,
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct mv643xx_eth_platform_data eth0_pd;
++
++static struct platform_device eth0_device = {
++ .name = MV643XX_ETH_NAME,
++ .id = 0,
++ .num_resources = ARRAY_SIZE(mv643xx_eth0_resources),
++ .resource = mv643xx_eth0_resources,
++ .dev = {
++ .platform_data = ð0_pd,
++ },
++};
++#endif
++
++#ifdef CONFIG_MV643XX_ETH_1
++static struct resource mv643xx_eth1_resources[] = {
++ [0] = {
++ .name = "eth1 irq",
++ .start = 9,
++ .end = 9,
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static struct mv643xx_eth_platform_data eth1_pd;
++
++static struct platform_device eth1_device = {
++ .name = MV643XX_ETH_NAME,
++ .id = 1,
++ .num_resources = ARRAY_SIZE(mv643xx_eth1_resources),
++ .resource = mv643xx_eth1_resources,
++ .dev = {
++ .platform_data = ð1_pd,
++ },
++};
++#endif
++
++static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
++ &mv643xx_eth_shared_device,
++#ifdef CONFIG_MV643XX_ETH_0
++ ð0_device,
++#endif
++#ifdef CONFIG_MV643XX_ETH_1
++ ð1_device,
++#endif
++};
++
++static int __init
++mv643xx_eth_add_pds(void)
++{
++ int ret;
++ if ((_machine == _MACH_chrp) && (_chrp_type == _CHRP_Pegasos))
++ ret = platform_add_devices(mv643xx_eth_pd_devs,
++ ARRAY_SIZE(mv643xx_eth_pd_devs));
++ else
++ ret = 0;
++ return ret;
++}
++arch_initcall(mv643xx_eth_add_pds);
++#endif
+
+ static void __init pegasos_set_l2cr(void)
+ {
+@@ -244,6 +333,7 @@
+ }
+ }
+
++
+ void __init chrp_setup_arch(void)
+ {
+ struct device_node *device;
+diff -Nur kernel-source-2.6.11/drivers/net/Kconfig kernel-source-2.6.11-marvell/drivers/net/Kconfig
+--- kernel-source-2.6.11/drivers/net/Kconfig 2005-03-02 08:38:25.000000000 +0100
++++ kernel-source-2.6.11-marvell/drivers/net/Kconfig 2005-03-07 20:36:43.000000000 +0100
+@@ -2094,10 +2094,11 @@
+
+ config MV643XX_ETH
+ tristate "MV-643XX Ethernet support"
+- depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX
++ depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX || MV64360 || PPC_MULTIPLATFORM
+ help
+ This driver supports the gigabit Ethernet on the Marvell MV643XX
+- chipset which is used in the Momenco Ocelot C and Jaguar ATX.
++ chipset which is used in the Momenco Ocelot C and Jaguar ATX and
++ Pegasos II, amongst other PPC and MIPS boards.
+
+ config MV643XX_ETH_0
+ bool "MV-643XX Port 0"
+diff -Nur kernel-source-2.6.11/drivers/net/mv643xx_eth.c kernel-source-2.6.11-marvell/drivers/net/mv643xx_eth.c
--- kernel-source-2.6.11/drivers/net/mv643xx_eth.c 2005-03-02 08:38:01.000000000 +0100
-+++ kernel-source-2.6.11-marvell/drivers/net/mv643xx_eth.c 2005-03-08 07:36:06.000000000 +0100
++++ kernel-source-2.6.11-marvell/drivers/net/mv643xx_eth.c 2005-03-08 09:21:11.000000000 +0100
@@ -1,5 +1,5 @@
/*
- * drivers/net/mv64340_eth.c - Driver for MV64340X ethernet ports
@@ -31,7 +156,7 @@
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
-@@ -24,80 +30,100 @@
+@@ -24,80 +30,103 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
@@ -70,6 +195,9 @@
#include <asm/pgtable.h>
#include <asm/system.h>
+#include <asm/delay.h>
++#ifdef PPC_MULTIPLATEFORM
++#include <linux/mv643xx.h>
++#endif
#include "mv643xx_eth.h"
/*
@@ -136,7 +264,9 @@
+
+/* used to protect MV643XX_ETH_SMI_REG, which is shared across ports */
+static spinlock_t mv643xx_eth_phy_lock = SPIN_LOCK_UNLOCKED;
-+
+
+-unsigned char prom_mac_addr_base[6];
+-unsigned long mv64340_sram_base;
+static inline u32 mv_read(int offset)
+{
+ void *__iomem reg_base;
@@ -149,9 +279,7 @@
+static inline void mv_write(int offset, u32 data)
+{
+ void * __iomem reg_base;
-
--unsigned char prom_mac_addr_base[6];
--unsigned long mv64340_sram_base;
++
+ reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS;
+ writel(data, reg_base + offset);
+}
@@ -174,7 +302,7 @@
unsigned long flags;
spin_lock_irqsave(&mp->lock, flags);
-@@ -108,21 +134,21 @@
+@@ -108,21 +137,21 @@
}
dev->mtu = new_mtu;
@@ -203,7 +331,7 @@
}
spin_unlock_irqrestore(&mp->lock, flags);
-@@ -130,17 +156,17 @@
+@@ -130,17 +159,17 @@
}
/*
@@ -228,7 +356,7 @@
struct pkt_info pkt_info;
struct sk_buff *skb;
-@@ -148,28 +174,18 @@
+@@ -148,28 +177,18 @@
panic("%s: Error in test_set_bit / clear_bit", dev->name);
while (mp->rx_ring_skbs < (mp->rx_ring_size - 5)) {
@@ -262,7 +390,7 @@
break;
}
skb_reserve(skb, 2);
-@@ -186,46 +202,45 @@
+@@ -186,46 +205,45 @@
add_timer(&mp->timeout);
mp->rx_timer_flag = 1;
}
@@ -326,7 +454,7 @@
unsigned int port_num = mp->port_num;
eth_port_init_mac_tables(port_num);
-@@ -234,64 +249,59 @@
+@@ -234,64 +252,59 @@
}
/*
@@ -418,7 +546,7 @@
printk(KERN_INFO "%s: TX timeout ", dev->name);
-@@ -300,31 +310,31 @@
+@@ -300,31 +313,31 @@
}
/*
@@ -463,7 +591,7 @@
struct net_device_stats *stats = &mp->stats;
struct pkt_info pkt_info;
int released = 1;
-@@ -341,33 +351,36 @@
+@@ -341,33 +354,36 @@
stats->tx_errors++;
}
@@ -518,7 +646,7 @@
}
spin_unlock(&mp->lock);
-@@ -376,60 +389,59 @@
+@@ -376,60 +392,59 @@
}
/*
@@ -599,7 +727,7 @@
}
if (pkt_info.cmd_sts & ETH_ERROR_SUMMARY)
stats->rx_errors++;
-@@ -445,11 +457,11 @@
+@@ -445,11 +460,11 @@
if (pkt_info.cmd_sts & ETH_LAYER_4_CHECKSUM_OK) {
skb->ip_summed = CHECKSUM_UNNECESSARY;
@@ -614,7 +742,7 @@
netif_receive_skb(skb);
#else
netif_rx(skb);
-@@ -461,74 +473,74 @@
+@@ -461,74 +476,74 @@
}
/*
@@ -722,7 +850,7 @@
queue_task(&mp->rx_task, &tq_immediate);
mark_bh(IMMEDIATE_BH);
#else
-@@ -538,25 +550,15 @@
+@@ -538,25 +553,15 @@
}
/* PHY status changed */
if (eth_int_cause_ext & (BIT16 | BIT20)) {
@@ -756,7 +884,7 @@
}
}
-@@ -570,7 +572,7 @@
+@@ -570,7 +575,7 @@
return IRQ_HANDLED;
}
@@ -765,7 +893,7 @@
/*
* eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
-@@ -584,9 +586,9 @@
+@@ -584,9 +589,9 @@
* , and the required delay of the interrupt in usec.
*
* INPUT:
@@ -778,7 +906,7 @@
*
* OUTPUT:
* Interrupt coalescing mechanism value is set in MV-643xx chip.
-@@ -596,15 +598,15 @@
+@@ -596,15 +601,15 @@
*
*/
static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num,
@@ -799,7 +927,7 @@
return coal;
}
-@@ -618,13 +620,13 @@
+@@ -618,13 +623,13 @@
* This parameter is a timeout counter, that counts in 64 t_clk
* chunks ; that when timeout event occurs a maskable interrupt
* occurs.
@@ -817,7 +945,7 @@
*
* OUTPUT:
* Interrupt coalescing mechanism value is set in MV-643xx chip.
-@@ -634,48 +636,53 @@
+@@ -634,48 +639,53 @@
*
*/
static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num,
@@ -885,7 +1013,7 @@
printk("%s: Error opening interface\n", dev->name);
err = -EBUSY;
goto out_free;
-@@ -698,66 +705,35 @@
+@@ -698,66 +708,35 @@
* ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
*
* DESCRIPTION:
@@ -966,7 +1094,7 @@
}
/* Save Rx desc pointer to driver struct. */
-@@ -766,293 +742,288 @@
+@@ -766,293 +745,288 @@
mp->rx_desc_area_size = rx_desc_num * sizeof(struct eth_rx_desc);
@@ -1220,10 +1348,10 @@
mp->tx_int_coal =
- eth_port_set_tx_coal (port_num, 133000000, MV64340_TX_COAL);
--
-- /* Increase the Rx side buffer size */
+ eth_port_set_tx_coal(port_num, 133000000, MV643XX_TX_COAL);
+- /* Increase the Rx side buffer size */
+-
- MV_WRITE (MV64340_ETH_PORT_SERIAL_CONTROL_REG(port_num), (0x5 << 17) |
- (MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(port_num))
- & 0xfff1ffff));
@@ -1390,7 +1518,7 @@
free_irq(dev->irq, dev);
spin_unlock_irq(&mp->lock);
-@@ -1060,59 +1031,64 @@
+@@ -1060,59 +1034,64 @@
return 0;
}
@@ -1481,7 +1609,7 @@
mp->rx_task.func(dev);
*budget -= work_done;
dev->quota -= work_done;
-@@ -1123,12 +1099,12 @@
+@@ -1123,12 +1102,12 @@
if (done) {
spin_lock_irqsave(&mp->lock, flags);
__netif_rx_complete(dev);
@@ -1499,7 +1627,7 @@
spin_unlock_irqrestore(&mp->lock, flags);
}
-@@ -1137,19 +1113,19 @@
+@@ -1137,19 +1116,19 @@
#endif
/*
@@ -1526,7 +1654,7 @@
struct net_device_stats *stats = &mp->stats;
ETH_FUNC_RET_STATUS status;
unsigned long flags;
-@@ -1157,119 +1133,195 @@
+@@ -1157,119 +1136,195 @@
if (netif_queue_stopped(dev)) {
printk(KERN_ERR
@@ -1795,7 +1923,7 @@
* Stop getting skb's from upper layers.
* Getting skb's from upper layers will be enabled again after
* packets are released.
-@@ -1277,7 +1329,6 @@
+@@ -1277,7 +1332,6 @@
netif_stop_queue(dev);
/* Update statistics and start of transmittion time */
@@ -1803,7 +1931,7 @@
stats->tx_packets++;
dev->trans_start = jiffies;
-@@ -1287,214 +1338,304 @@
+@@ -1287,214 +1341,304 @@
}
/*
@@ -1876,8 +2004,6 @@
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ BUG_ON(!res);
+ dev->irq = res->start;
-+
-+ mp->port_num = port_num;
- dev->open = mv64340_eth_open;
- dev->stop = mv64340_eth_stop;
@@ -1885,6 +2011,8 @@
- dev->get_stats = mv64340_eth_get_stats;
- dev->set_mac_address = mv64340_eth_set_mac_address;
- dev->set_multicast_list = mv64340_eth_set_rx_mode;
++ mp->port_num = port_num;
++
+ dev->open = mv643xx_eth_open;
+ dev->stop = mv643xx_eth_stop;
+ dev->hard_start_xmit = mv643xx_eth_start_xmit;
@@ -2059,11 +2187,8 @@
free_netdev(dev);
+ dev_set_drvdata(ddev, NULL);
+ return 0;
- }
-
--static struct net_device *mv64340_dev0;
--static struct net_device *mv64340_dev1;
--static struct net_device *mv64340_dev2;
++}
++
+static int mv643xx_eth_shared_probe(struct device *ddev)
+{
+ struct platform_device *pdev = to_platform_device(ddev);
@@ -2090,8 +2215,11 @@
+ mv643xx_eth_shared_base = NULL;
+
+ return 0;
-+}
-+
+ }
+
+-static struct net_device *mv64340_dev0;
+-static struct net_device *mv64340_dev1;
+-static struct net_device *mv64340_dev2;
+static struct device_driver mv643xx_eth_driver = {
+ .name = MV643XX_ETH_NAME,
+ .bus = &platform_bus_type,
@@ -2216,7 +2344,7 @@
* - This low level driver is OS independent. Allocating memory for
* the descriptor rings and buffers are not within the scope of
* this driver.
-@@ -1511,12 +1652,12 @@
+@@ -1511,12 +1655,12 @@
* - PHY access and control API.
* - Port control register configuration API.
* - Full control over Unicast and Multicast MAC configurations.
@@ -2232,7 +2360,7 @@
* User information regarding port configuration has to be set
* prior to calling the port initialization routine.
*
-@@ -1525,7 +1666,7 @@
+@@ -1525,7 +1669,7 @@
* access to DRAM and internal SRAM memory spaces.
*
* Driver ring initialization
@@ -2241,7 +2369,7 @@
* within the scope of this driver. Thus, the user is required to
* allocate memory for the descriptors ring and buffers. Those
* memory parameters are used by the Rx and Tx ring initialization
-@@ -1533,49 +1674,50 @@
+@@ -1533,49 +1677,50 @@
* of a ring.
* Note: Pay special attention to alignment issues when using
* cached descriptors/buffers. In this phase the driver store
@@ -2312,7 +2440,7 @@
* It is the user responsibility to return this resource back
* to the Rx descriptor ring to enable the reuse of this source.
* Return Rx resource is done using the eth_rx_return_buff API.
-@@ -1596,27 +1738,21 @@
+@@ -1596,27 +1741,21 @@
*
* EXTERNAL INTERFACE
*
@@ -2350,7 +2478,7 @@
* cmd_sts Tx/Rx descriptor command status.
* buf_ptr Tx/Rx descriptor buffer pointer.
* return_info Tx/Rx user resource return information.
-@@ -1625,70 +1761,44 @@
+@@ -1625,70 +1764,44 @@
/* defines */
/* SDMA command macros */
#define ETH_ENABLE_TX_QUEUE(eth_port) \
@@ -2438,7 +2566,7 @@
mp->port_rx_queue_command = 0;
mp->port_tx_queue_command = 0;
-@@ -1706,77 +1816,73 @@
+@@ -1706,77 +1819,73 @@
* eth_port_start - Start the Ethernet port activity.
*
* DESCRIPTION:
@@ -2511,15 +2639,17 @@
- MV_WRITE(MV64340_ETH_PORT_CONFIG_REG(eth_port_num),
- mp->port_config);
+ mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num), mp->port_config);
-+
-+ mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num),
-+ mp->port_config_extend);
- MV_WRITE(MV64340_ETH_PORT_CONFIG_EXTEND_REG(eth_port_num),
- mp->port_config_extend);
++ mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num),
++ mp->port_config_extend);
- MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(eth_port_num),
- mp->port_serial_control);
+
+- MV_SET_REG_BITS(MV64340_ETH_PORT_SERIAL_CONTROL_REG(eth_port_num),
+- ETH_SERIAL_PORT_ENABLE);
+ /* Increase the Rx side buffer size if supporting GigE */
+ if (mp->port_serial_control & MV643XX_ETH_SET_GMII_SPEED_TO_1000)
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
@@ -2527,9 +2657,7 @@
+ else
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
+ mp->port_serial_control);
-
-- MV_SET_REG_BITS(MV64340_ETH_PORT_SERIAL_CONTROL_REG(eth_port_num),
-- ETH_SERIAL_PORT_ENABLE);
++
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
+ mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num)) |
+ MV643XX_ETH_SERIAL_PORT_ENABLE);
@@ -2556,7 +2684,7 @@
}
/*
-@@ -1786,29 +1892,29 @@
+@@ -1786,29 +1895,29 @@
* This function Set the port Ethernet MAC address.
*
* INPUT:
@@ -2595,7 +2723,7 @@
/* Accept frames of this address */
eth_port_uc_addr(eth_port_num, p_addr[5], ACCEPT_MAC_ADDR);
-@@ -1817,29 +1923,64 @@
+@@ -1817,29 +1926,64 @@
}
/*
@@ -2668,7 +2796,7 @@
{
unsigned int unicast_reg;
unsigned int tbl_offset;
-@@ -1852,29 +1993,26 @@
+@@ -1852,29 +1996,26 @@
switch (option) {
case REJECT_MAC_ADDR:
@@ -2707,7 +2835,7 @@
break;
-@@ -1889,17 +2027,17 @@
+@@ -1889,17 +2030,17 @@
* eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
*
* DESCRIPTION:
@@ -2730,7 +2858,7 @@
*/
static void eth_port_init_mac_tables(unsigned int eth_port_num)
{
-@@ -1907,18 +2045,16 @@
+@@ -1907,18 +2048,16 @@
/* Clear DA filter unicast table (Ex_dFUT) */
for (table_index = 0; table_index <= 0xC; table_index += 4)
@@ -2755,7 +2883,7 @@
}
}
-@@ -1926,17 +2062,17 @@
+@@ -1926,17 +2065,17 @@
* eth_clear_mib_counters - Clear all MIB counters
*
* DESCRIPTION:
@@ -2778,7 +2906,7 @@
*
*/
static void eth_clear_mib_counters(unsigned int eth_port_num)
-@@ -1944,72 +2080,155 @@
+@@ -1944,72 +2083,155 @@
int i;
/* Perform dummy reads from MIB counters */
@@ -2958,7 +3086,7 @@
}
/*
-@@ -2017,381 +2236,358 @@
+@@ -2017,381 +2239,358 @@
*
* DESCRIPTION:
* This routine resets the chip by aborting any SDMA engine activity and
@@ -3531,7 +3659,7 @@
unsigned int command_status;
/* Do not process Tx ring in case of Tx ring resource error */
-@@ -2403,39 +2599,24 @@
+@@ -2403,39 +2602,24 @@
tx_desc_used = mp->tx_used_desc_q;
current_descriptor = &mp->p_tx_desc_area[tx_desc_curr];
@@ -3576,7 +3704,7 @@
/* Check for ring index overlap in the Tx desc ring */
if (tx_desc_curr == tx_desc_used) {
-@@ -2452,62 +2633,55 @@
+@@ -2452,62 +2636,55 @@
*
* DESCRIPTION:
* This routine returns the transmitted packet information to the caller.
@@ -3662,7 +3790,7 @@
/* Pass the packet information to the caller */
p_pkt_info->cmd_sts = command_status;
-@@ -2515,7 +2689,7 @@
+@@ -2515,7 +2692,7 @@
mp->tx_skb[tx_desc_used] = NULL;
/* Update the next descriptor to release. */
@@ -3671,7 +3799,7 @@
/* Any Tx return cancels the Tx resource error status */
mp->tx_resource_err = 0;
-@@ -2527,30 +2701,30 @@
+@@ -2527,30 +2704,30 @@
* eth_port_receive - Get received information from Rx ring.
*
* DESCRIPTION:
@@ -3714,7 +3842,7 @@
unsigned int command_status;
/* Do not process Rx ring in case of Rx ring resource error */
-@@ -2565,6 +2739,7 @@
+@@ -2565,6 +2742,7 @@
/* The following parameters are used to save readings from memory */
command_status = p_rx_desc->cmd_sts;
@@ -3722,7 +3850,7 @@
/* Nothing to receive... */
if (command_status & (ETH_BUFFER_OWNED_BY_DMA))
-@@ -2577,18 +2752,17 @@
+@@ -2577,18 +2755,17 @@
p_pkt_info->l4i_chk = p_rx_desc->buf_size;
/* Clean the return info field to indicate that the packet has been */
@@ -3743,7 +3871,7 @@
return ETH_OK;
}
-@@ -2596,27 +2770,27 @@
+@@ -2596,27 +2773,27 @@
* eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
*
* DESCRIPTION:
@@ -3781,7 +3909,7 @@
/* Get 'used' Rx descriptor */
used_rx_desc = mp->rx_used_desc_q;
-@@ -2627,20 +2801,240 @@
+@@ -2627,20 +2804,240 @@
mp->rx_skb[used_rx_desc] = p_pkt_info->return_info;
/* Flush the write pipe */
@@ -4028,130 +4156,9 @@
+};
+
+/************* End ethtool support *************************/
---- kernel-source-2.6.11/arch/ppc/platforms/chrp_setup.c 2005-03-02 08:38:25.000000000 +0100
-+++ kernel-source-2.6.11-marvell/arch/ppc/platforms/chrp_setup.c 2005-03-08 07:37:10.000000000 +0100
-@@ -217,6 +217,95 @@
- }
- }
-
-+/* Pegasos 2 specific Marvell MV 64361 gigabit ethernet port setup */
-+#ifdef CONFIG_MV643XX_ETH
-+#include <linux/mv643xx.h>
-+static struct resource mv643xx_eth_shared_resources[] = {
-+ [0] = {
-+ .name = "ethernet shared base",
-+ .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
-+ .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
-+ MV643XX_ETH_SHARED_REGS_SIZE - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+};
-+
-+static struct platform_device mv643xx_eth_shared_device = {
-+ .name = MV643XX_ETH_SHARED_NAME,
-+ .id = 0,
-+ .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
-+ .resource = mv643xx_eth_shared_resources,
-+};
-+
-+#ifdef CONFIG_MV643XX_ETH_0
-+static struct resource mv643xx_eth0_resources[] = {
-+ [0] = {
-+ .name = "eth0 irq",
-+ .start = 9,
-+ .end = 9,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct mv643xx_eth_platform_data eth0_pd;
-+
-+static struct platform_device eth0_device = {
-+ .name = MV643XX_ETH_NAME,
-+ .id = 0,
-+ .num_resources = ARRAY_SIZE(mv643xx_eth0_resources),
-+ .resource = mv643xx_eth0_resources,
-+ .dev = {
-+ .platform_data = ð0_pd,
-+ },
-+};
-+#endif
-+
-+#ifdef CONFIG_MV643XX_ETH_1
-+static struct resource mv643xx_eth1_resources[] = {
-+ [0] = {
-+ .name = "eth1 irq",
-+ .start = 9,
-+ .end = 9,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct mv643xx_eth_platform_data eth1_pd;
-+
-+static struct platform_device eth1_device = {
-+ .name = MV643XX_ETH_NAME,
-+ .id = 1,
-+ .num_resources = ARRAY_SIZE(mv643xx_eth1_resources),
-+ .resource = mv643xx_eth1_resources,
-+ .dev = {
-+ .platform_data = ð1_pd,
-+ },
-+};
-+#endif
-+
-+static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
-+ &mv643xx_eth_shared_device,
-+#ifdef CONFIG_MV643XX_ETH_0
-+ ð0_device,
-+#endif
-+#ifdef CONFIG_MV643XX_ETH_1
-+ ð1_device,
-+#endif
-+};
-+
-+static int __init
-+mv643xx_eth_add_pds(void)
-+{
-+ int ret;
-+ if ((_machine == _MACH_chrp) && (_chrp_type == _CHRP_Pegasos))
-+ ret = platform_add_devices(mv643xx_eth_pd_devs,
-+ ARRAY_SIZE(mv643xx_eth_pd_devs));
-+ else
-+ ret = 0;
-+ return ret;
-+}
-+arch_initcall(mv643xx_eth_add_pds);
-+#endif
-
- static void __init pegasos_set_l2cr(void)
- {
-@@ -244,6 +333,7 @@
- }
- }
-
-+
- void __init chrp_setup_arch(void)
- {
- struct device_node *device;
---- kernel-source-2.6.11/drivers/net/Kconfig 2005-03-02 08:38:25.000000000 +0100
-+++ kernel-source-2.6.11-marvell/drivers/net/Kconfig 2005-03-07 20:36:43.000000000 +0100
-@@ -2094,10 +2094,11 @@
-
- config MV643XX_ETH
- tristate "MV-643XX Ethernet support"
-- depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX
-+ depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX || MV64360 || PPC_MULTIPLATFORM
- help
- This driver supports the gigabit Ethernet on the Marvell MV643XX
-- chipset which is used in the Momenco Ocelot C and Jaguar ATX.
-+ chipset which is used in the Momenco Ocelot C and Jaguar ATX and
-+ Pegasos II, amongst other PPC and MIPS boards.
-
- config MV643XX_ETH_0
- bool "MV-643XX Port 0"
+diff -Nur kernel-source-2.6.11/drivers/net/mv643xx_eth.h kernel-source-2.6.11-marvell/drivers/net/mv643xx_eth.h
--- kernel-source-2.6.11/drivers/net/mv643xx_eth.h 2005-03-02 08:38:09.000000000 +0100
-+++ linux-2.5-mv643xx-enet/drivers/net/mv643xx_eth.h 2005-03-07 14:15:29.000000000 +0100
++++ kernel-source-2.6.11-marvell/drivers/net/mv643xx_eth.h 2005-03-08 10:09:01.000000000 +0100
@@ -1,5 +1,5 @@
-#ifndef __MV64340_ETH_H__
-#define __MV64340_ETH_H__
@@ -4932,8 +4939,9 @@
-#endif /* __MV64340_ETH_H__ */
+#endif /* __MV643XX_ETH_H__ */
+diff -Nur kernel-source-2.6.11/include/linux/mv643xx.h kernel-source-2.6.11-marvell/include/linux/mv643xx.h
--- kernel-source-2.6.11/include/linux/mv643xx.h 2005-03-02 08:38:18.000000000 +0100
-+++ linux-dale/include/linux/mv643xx.h 2005-03-08 09:51:00.000000000 +0100
++++ kernel-source-2.6.11-marvell/include/linux/mv643xx.h 2005-03-08 10:08:28.000000000 +0100
@@ -1,5 +1,5 @@
/*
- * mv64340.h - MV-64340 Internal registers definition file.