[SCM] qtdeclarative packaging branch, experimental, updated. debian/5.7.0-4-2-gc8e6f18

[Dmitry Shachnev]

Gitweb-URL: http://git.debian.org/?p=pkg-kde/qt/qtdeclarative.git;a=commitdiff;h=c8e6f18

The following commit has been merged in the experimental branch:
commit c8e6f180ca9ebdb8f55ac67f5ee6551e18f467d1
Author: Dmitry Shachnev <mitya57 at gmail.com>
Date:   Thu Oct 6 23:38:18 2016 +0300

    Backport upstream patch to fix crashes on arm64 (yarr_arm64.diff).
---
 debian/changelog               |  2 ++
 debian/patches/series          |  1 +
 debian/patches/yarr_arm64.diff | 53 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 56 insertions(+)

diff --git a/debian/changelog b/debian/changelog
index b3a0189..57fe7b1 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,5 +1,7 @@
 qtdeclarative-opensource-src (5.7.0-5) UNRELEASED; urgency=medium
 
+  [ Dmitry Shachnev ]
+  * Backport upstream patch to fix crashes on arm64 (yarr_arm64.diff).
 
  -- Debian Qt/KDE Maintainers <debian-qt-kde at lists.debian.org>  Thu, 06 Oct 2016 23:36:44 +0300
 
diff --git a/debian/patches/series b/debian/patches/series
index 59eec11..a3ababe 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -4,6 +4,7 @@ no_value_without_tag.diff
 fix_engine_64bits_big_endian.diff
 fix-V4-on-big-endian.patch
 use_49_address_bits.diff
+yarr_arm64.diff
 
 # Forwarded upstream
 fix_tst_qqmlapplicationengine.diff
diff --git a/debian/patches/yarr_arm64.diff b/debian/patches/yarr_arm64.diff
new file mode 100644
index 0000000..e1afdda
--- /dev/null
+++ b/debian/patches/yarr_arm64.diff
@@ -0,0 +1,53 @@
+Description: V4: align stack on 16 byte boundaries in the YarrJIT
+ This is the required alignment for Aarch64, and a number of other ABIs
+ prefer this size too when calling into system libraries.
+Origin: upstream, https://code.qt.io/cgit/qt/qtdeclarative.git/commit/?id=4493524ec24afb94
+Last-Update: 2016-10-06
+
+--- a/src/3rdparty/masm/yarr/YarrJIT.cpp
++++ b/src/3rdparty/masm/yarr/YarrJIT.cpp
+@@ -338,17 +338,31 @@
+         jump(Address(stackPointerRegister, frameLocation * sizeof(void*)));
+     }
+ 
++    unsigned alignCallFrameSizeInBytes(unsigned callFrameSize)
++    {
++        callFrameSize *= sizeof(void*);
++        if (callFrameSize / sizeof(void*) != m_pattern.m_body->m_callFrameSize)
++            CRASH();
++        // Originally, the code was:
++//        callFrameSize = (callFrameSize + 0x3f) & ~0x3f;
++        // However, 64 bytes is a bit surprising. The biggest "alignment" requirement is on Aarch64, where:
++        // "SP mod 16 = 0. The stack must be quad-word aligned." (IHI0055B_aapcs64.pdf)
++        callFrameSize = (callFrameSize + 0xf) & ~0xf;
++        if (!callFrameSize)
++            CRASH();
++        return callFrameSize;
++    }
+     void initCallFrame()
+     {
+         unsigned callFrameSize = m_pattern.m_body->m_callFrameSize;
+         if (callFrameSize)
+-            subPtr(Imm32(callFrameSize * sizeof(void*)), stackPointerRegister);
++            subPtr(Imm32(alignCallFrameSizeInBytes(callFrameSize)), stackPointerRegister);
+     }
+     void removeCallFrame()
+     {
+         unsigned callFrameSize = m_pattern.m_body->m_callFrameSize;
+         if (callFrameSize)
+-            addPtr(Imm32(callFrameSize * sizeof(void*)), stackPointerRegister);
++            addPtr(Imm32(alignCallFrameSizeInBytes(callFrameSize)), stackPointerRegister);
+     }
+ 
+     // Used to record subpatters, should only be called if compileMode is IncludeSubpatterns.
+@@ -2565,6 +2579,10 @@
+         if (compileMode == IncludeSubpatterns)
+             loadPtr(Address(X86Registers::ebp, 2 * sizeof(void*)), output);
+     #endif
++#elif CPU(ARM64)
++        // The ABI doesn't guarantee the upper bits are zero on unsigned arguments, so clear them ourselves.
++        zeroExtend32ToPtr(index, index);
++        zeroExtend32ToPtr(length, length);
+ #elif CPU(ARM)
+         push(ARMRegisters::r4);
+         push(ARMRegisters::r5);

-- 
qtdeclarative packaging