[Pkg-octave-devel] broken m68k build

Richard Zidlicky rz@linux-m68k.org
Sat, 26 Feb 2005 00:51:42 +0100


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On Fri, Feb 25, 2005 at 09:15:18PM +0100, Rafael Laboissiere wrote:
> [Cc: to the Debian m68k crew and debian-admin]
> 
> * John W. Eaton <jwe@bevo.che.wisc.edu> [2005-02-25 14:34]:
> 
> > For some time now, the m68k build of octave2.1 has been failing with
> > 
> >   /usr/bin/g++ -c  -fPIC -I. -I.. -I../liboctave -I../src -I../libcruft/misc  -I../glob -I../glob -DHAVE_CONFIG_H  -Wall -W -Wshadow -O1 -g0 ls-mat5.cc -o pic/ls-mat5.o
> >   /tmp/cchqGuhc.s: Assembler messages:
> >   /tmp/cchqGuhc.s:20898: Error: operands mismatch -- statement `move.b %a4,%d1' ignored
> > 
> > I know that the proper fix for this problem is to fix the bug in the
> > compiler that is generating the bad code, but I'd also be willing to
> > take a look at the problem and see if I can come up with a
> > workaround.  To do that, I'd need ssh access to an m68k system with
> > all the current build tools.

I guess I already have the fixes for the compiler, can you see if
the appended patches make any difference? Alternatively, send me
.i file and compile flags to test.

Iirc the patches were already approved to go into gcc but possibly
not fast enough to get into Debian.

Btw note that extendqidi2 patch is a fix+improvement to the extbdi
patch and needs to be applied after that.

Richard

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Content-Type: text/plain; charset=iso-8859-1
Content-Disposition: attachment; filename="gcc-3.4-rz-extbdi"

--- gcc-3.4-20040218/gcc/config/m68k/m68k.md.rz-extbdi	2004-03-07 23:08:04.000000000 +0100
+++ gcc-3.4-20040218/gcc/config/m68k/m68k.md	2004-03-07 23:32:21.000000000 +0100
@@ -1455,10 +1455,20 @@
 {
   CC_STATUS_INIT;
   operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
-  if (TARGET_68020 || TARGET_COLDFIRE)
-    return "move%.b %1,%2\;extb%.l %2\;smi %0\;extb%.l %0";
+  if (ADDRESS_REG_P(operands[1]))
+    {
+      if (TARGET_68020 || TARGET_COLDFIRE)
+        return "move%.w %1,%2\;extb%.l %2\;smi %0\;extb%.l %0";
+      else
+        return "move%.w %1,%2\;ext%.w %0\;ext%.l %2\;move%.l %2,%0\;smi %0";
+    }
   else
-    return "move%.b %1,%2\;ext%.w %0\;ext%.l %2\;move%.l %2,%0\;smi %0";
+    {
+      if (TARGET_68020 || TARGET_COLDFIRE)
+        return "move%.b %1,%2\;extb%.l %2\;smi %0\;extb%.l %0";
+      else
+        return "move%.b %1,%2\;ext%.w %0\;ext%.l %2\;move%.l %2,%0\;smi %0";
+    }
 })
 
 (define_insn "extendhidi2"

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Content-Disposition: attachment; filename="gcc-3.4-rz-extbf"

--- gcc-3.4-20040218/gcc/config/m68k/m68k.md.extbf	2004-03-09 23:33:58.000000000 +0100
+++ gcc-3.4-20040218/gcc/config/m68k/m68k.md	2004-03-09 23:40:11.000000000 +0100
@@ -4844,8 +4844,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d")
 	(sign_extract:SI (match_operand:QI 1 "memory_operand" "o")
-			 (match_operand:SI 2 "general_operand" "di")
-			 (match_operand:SI 3 "general_operand" "di")))]
+			 (match_operand:SI 2 "general_operand" "dn")
+			 (match_operand:SI 3 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
   "bfexts %1{%b3:%b2},%0")
 
@@ -4860,8 +4860,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d")
 	(zero_extract:SI (match_operand:QI 1 "memory_operand" "o,d")
-			 (match_operand:SI 2 "general_operand" "di,di")
-			 (match_operand:SI 3 "general_operand" "di,di")))]
+			 (match_operand:SI 2 "general_operand" "dn,dn")
+			 (match_operand:SI 3 "general_operand" "dn,dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
   if (GET_CODE (operands[2]) == CONST_INT)
@@ -4878,8 +4878,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
-			 (match_operand:SI 1 "general_operand" "di")
-			 (match_operand:SI 2 "general_operand" "di"))
+			 (match_operand:SI 1 "general_operand" "dn")
+			 (match_operand:SI 2 "general_operand" "dn"))
         (xor:SI (zero_extract:SI (match_dup 0) (match_dup 1) (match_dup 2))
 		(match_operand 3 "const_int_operand" "n")))]
   "TARGET_68020 && TARGET_BITFIELD
@@ -4893,8 +4893,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
-			 (match_operand:SI 1 "general_operand" "di")
-			 (match_operand:SI 2 "general_operand" "di"))
+			 (match_operand:SI 1 "general_operand" "dn")
+			 (match_operand:SI 2 "general_operand" "dn"))
 	(const_int 0))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4904,8 +4904,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
-			 (match_operand:SI 1 "general_operand" "di")
-			 (match_operand:SI 2 "general_operand" "di"))
+			 (match_operand:SI 1 "general_operand" "dn")
+			 (match_operand:SI 2 "general_operand" "dn"))
 	(const_int -1))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4923,8 +4923,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
-			 (match_operand:SI 1 "general_operand" "di")
-			 (match_operand:SI 2 "general_operand" "di"))
+			 (match_operand:SI 1 "general_operand" "dn")
+			 (match_operand:SI 2 "general_operand" "dn"))
 	(match_operand:SI 3 "register_operand" "d"))]
   "TARGET_68020 && TARGET_BITFIELD"
   "bfins %3,%0{%b2:%b1}")
@@ -4935,16 +4935,16 @@
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d")
 	(sign_extract:SI (match_operand:SI 1 "register_operand" "d")
-			 (match_operand:SI 2 "general_operand" "di")
-			 (match_operand:SI 3 "general_operand" "di")))]
+			 (match_operand:SI 2 "general_operand" "dn")
+			 (match_operand:SI 3 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
   "bfexts %1{%b3:%b2},%0")
 
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d")
 	(zero_extract:SI (match_operand:SI 1 "register_operand" "d")
-			 (match_operand:SI 2 "general_operand" "di")
-			 (match_operand:SI 3 "general_operand" "di")))]
+			 (match_operand:SI 2 "general_operand" "dn")
+			 (match_operand:SI 3 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
   if (GET_CODE (operands[2]) == CONST_INT)
@@ -4961,8 +4961,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+d")
-			 (match_operand:SI 1 "general_operand" "di")
-			 (match_operand:SI 2 "general_operand" "di"))
+			 (match_operand:SI 1 "general_operand" "dn")
+			 (match_operand:SI 2 "general_operand" "dn"))
 	(const_int 0))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4972,8 +4972,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+d")
-			 (match_operand:SI 1 "general_operand" "di")
-			 (match_operand:SI 2 "general_operand" "di"))
+			 (match_operand:SI 1 "general_operand" "dn")
+			 (match_operand:SI 2 "general_operand" "dn"))
 	(const_int -1))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4983,8 +4983,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+d")
-			 (match_operand:SI 1 "general_operand" "di")
-			 (match_operand:SI 2 "general_operand" "di"))
+			 (match_operand:SI 1 "general_operand" "dn")
+			 (match_operand:SI 2 "general_operand" "dn"))
 	(match_operand:SI 3 "register_operand" "d"))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -5006,7 +5006,7 @@
   [(set (cc0)
 	(zero_extract:SI (match_operand:QI 0 "memory_operand" "o")
 			 (match_operand:SI 1 "const_int_operand" "n")
-			 (match_operand:SI 2 "general_operand" "di")))]
+			 (match_operand:SI 2 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
   if (operands[1] == const1_rtx
@@ -5031,7 +5031,7 @@
   [(set (cc0)
 	(zero_extract:SI (match_operand:SI 0 "register_operand" "d")
 			 (match_operand:SI 1 "const_int_operand" "n")
-			 (match_operand:SI 2 "general_operand" "di")))]
+			 (match_operand:SI 2 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
   if (operands[1] == const1_rtx

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Content-Type: text/plain; charset=iso-8859-1
Content-Disposition: attachment; filename="gcc-3.4-rz-extendqidi2.patch"

--- gcc-3.4-20040407/gcc/config/m68k/m68k.md.extendqidi2	2005-02-26 00:40:52.000000000 +0100
+++ gcc-3.4-20040407/gcc/config/m68k/m68k.md	2005-02-26 00:42:08.000000000 +0100
@@ -1454,20 +1454,19 @@
   ""
 {
   CC_STATUS_INIT;
-  operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
   if (ADDRESS_REG_P(operands[1]))
     {
       if (TARGET_68020 || TARGET_COLDFIRE)
-        return "move%.w %1,%2\;extb%.l %2\;smi %0\;extb%.l %0";
+        return "move%.w %1,%R0\;extb%.l %R0\;smi %0\;extb%.l %0";
       else
-        return "move%.w %1,%2\;ext%.w %0\;ext%.l %2\;move%.l %2,%0\;smi %0";
+        return "move%.w %1,%R0\;ext%.w %R0\;ext%.l %R0\;move%.l %R0,%0\;smi %0";
     }
   else
     {
       if (TARGET_68020 || TARGET_COLDFIRE)
-        return "move%.b %1,%2\;extb%.l %2\;smi %0\;extb%.l %0";
+        return "move%.b %1,%R0\;extb%.l %R0\;smi %0\;extb%.l %0";
       else
-        return "move%.b %1,%2\;ext%.w %0\;ext%.l %2\;move%.l %2,%0\;smi %0";
+        return "move%.b %1,%R0\;ext%.w %R0\;ext%.l %R0\;move%.l %R0,%0\;smi %0";
     }
 })
 

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